drivers/net/ethernet/mellanox/mlx4/en_ethtool.c

   1 /*
   2  * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  *
  32  */
  33
  34 #include <linux/kernel.h>
  35 #include <linux/ethtool.h>
  36 #include <linux/netdevice.h>
  37 #include <linux/mlx4/driver.h>
  38 #include <linux/mlx4/device.h>
  39 #include <linux/in.h>
  40 #include <net/ip.h>
  41 #include <linux/bitmap.h>
  42
  43 #include "mlx4_en.h"
  44 #include "en_port.h"
  45
  46 #define EN_ETHTOOL_QP_ATTACH (1ull << 63)
  47 #define EN_ETHTOOL_SHORT_MASK cpu_to_be16(0xffff)
  48 #define EN_ETHTOOL_WORD_MASK  cpu_to_be32(0xffffffff)
  49
  50 static int mlx4_en_moderation_update(struct mlx4_en_priv *priv)
  51 {
  52         int i, t;
  53         int err = 0;
  54
  55         for (t = 0 ; t < MLX4_EN_NUM_TX_TYPES; t++) {
  56                 for (i = 0; i < priv->tx_ring_num[t]; i++) {
  57                         priv->tx_cq[t][i]->moder_cnt = priv->tx_frames;
  58                         priv->tx_cq[t][i]->moder_time = priv->tx_usecs;
  59                         if (priv->port_up) {
  60                                 err = mlx4_en_set_cq_moder(priv,
  61                                                            priv->tx_cq[t][i]);
  62                                 if (err)
  63                                         return err;
  64                         }
  65                 }
  66         }
  67
  68         if (priv->adaptive_rx_coal)
  69                 return 0;
  70
  71         for (i = 0; i < priv->rx_ring_num; i++) {
  72                 priv->rx_cq[i]->moder_cnt = priv->rx_frames;
  73                 priv->rx_cq[i]->moder_time = priv->rx_usecs;
  74                 priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
  75                 if (priv->port_up) {
  76                         err = mlx4_en_set_cq_moder(priv, priv->rx_cq[i]);
  77                         if (err)
  78                                 return err;
  79                 }
  80         }
  81
  82         return err;
  83 }
  84
  85 static void
  86 mlx4_en_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *drvinfo)
  87 {
  88         struct mlx4_en_priv *priv = netdev_priv(dev);
  89         struct mlx4_en_dev *mdev = priv->mdev;
  90
  91         strlcpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
  92         strlcpy(drvinfo->version, DRV_VERSION " (" DRV_RELDATE ")",
  93                 sizeof(drvinfo->version));
  94         snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
  95                 "%d.%d.%d",
  96                 (u16) (mdev->dev->caps.fw_ver >> 32),
  97                 (u16) ((mdev->dev->caps.fw_ver >> 16) & 0xffff),
  98                 (u16) (mdev->dev->caps.fw_ver & 0xffff));
  99         strlcpy(drvinfo->bus_info, pci_name(mdev->dev->persist->pdev),
 100                 sizeof(drvinfo->bus_info));
 101 }
 102
 103 static const char mlx4_en_priv_flags[][ETH_GSTRING_LEN] = {
 104         "blueflame",
 105         "phv-bit"
 106 };
 107
 108 static const char main_strings[][ETH_GSTRING_LEN] = {
 109         /* main statistics */
 110         "rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors",
 111         "tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions",
 112         "rx_length_errors", "rx_over_errors", "rx_crc_errors",
 113         "rx_frame_errors", "rx_fifo_errors", "rx_missed_errors",
 114         "tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors",
 115         "tx_heartbeat_errors", "tx_window_errors",
 116
 117         /* port statistics */
 118         "tso_packets",
 119         "xmit_more",
 120         "queue_stopped", "wake_queue", "tx_timeout", "rx_alloc_pages",
 121         "rx_csum_good", "rx_csum_none", "rx_csum_complete", "tx_chksum_offload",
 122
 123         /* pf statistics */
 124         "pf_rx_packets",
 125         "pf_rx_bytes",
 126         "pf_tx_packets",
 127         "pf_tx_bytes",
 128
 129         /* priority flow control statistics rx */
 130         "rx_pause_prio_0", "rx_pause_duration_prio_0",
 131         "rx_pause_transition_prio_0",
 132         "rx_pause_prio_1", "rx_pause_duration_prio_1",
 133         "rx_pause_transition_prio_1",
 134         "rx_pause_prio_2", "rx_pause_duration_prio_2",
 135         "rx_pause_transition_prio_2",
 136         "rx_pause_prio_3", "rx_pause_duration_prio_3",
 137         "rx_pause_transition_prio_3",
 138         "rx_pause_prio_4", "rx_pause_duration_prio_4",
 139         "rx_pause_transition_prio_4",
 140         "rx_pause_prio_5", "rx_pause_duration_prio_5",
 141         "rx_pause_transition_prio_5",
 142         "rx_pause_prio_6", "rx_pause_duration_prio_6",
 143         "rx_pause_transition_prio_6",
 144         "rx_pause_prio_7", "rx_pause_duration_prio_7",
 145         "rx_pause_transition_prio_7",
 146
 147         /* flow control statistics rx */
 148         "rx_pause", "rx_pause_duration", "rx_pause_transition",
 149
 150         /* priority flow control statistics tx */
 151         "tx_pause_prio_0", "tx_pause_duration_prio_0",
 152         "tx_pause_transition_prio_0",
 153         "tx_pause_prio_1", "tx_pause_duration_prio_1",
 154         "tx_pause_transition_prio_1",
 155         "tx_pause_prio_2", "tx_pause_duration_prio_2",
 156         "tx_pause_transition_prio_2",
 157         "tx_pause_prio_3", "tx_pause_duration_prio_3",
 158         "tx_pause_transition_prio_3",
 159         "tx_pause_prio_4", "tx_pause_duration_prio_4",
 160         "tx_pause_transition_prio_4",
 161         "tx_pause_prio_5", "tx_pause_duration_prio_5",
 162         "tx_pause_transition_prio_5",
 163         "tx_pause_prio_6", "tx_pause_duration_prio_6",
 164         "tx_pause_transition_prio_6",
 165         "tx_pause_prio_7", "tx_pause_duration_prio_7",
 166         "tx_pause_transition_prio_7",
 167
 168         /* flow control statistics tx */
 169         "tx_pause", "tx_pause_duration", "tx_pause_transition",
 170
 171         /* packet statistics */
 172         "rx_multicast_packets",
 173         "rx_broadcast_packets",
 174         "rx_jabbers",
 175         "rx_in_range_length_error",
 176         "rx_out_range_length_error",
 177         "tx_multicast_packets",
 178         "tx_broadcast_packets",
 179         "rx_prio_0_packets", "rx_prio_0_bytes",
 180         "rx_prio_1_packets", "rx_prio_1_bytes",
 181         "rx_prio_2_packets", "rx_prio_2_bytes",
 182         "rx_prio_3_packets", "rx_prio_3_bytes",
 183         "rx_prio_4_packets", "rx_prio_4_bytes",
 184         "rx_prio_5_packets", "rx_prio_5_bytes",
 185         "rx_prio_6_packets", "rx_prio_6_bytes",
 186         "rx_prio_7_packets", "rx_prio_7_bytes",
 187         "rx_novlan_packets", "rx_novlan_bytes",
 188         "tx_prio_0_packets", "tx_prio_0_bytes",
 189         "tx_prio_1_packets", "tx_prio_1_bytes",
 190         "tx_prio_2_packets", "tx_prio_2_bytes",
 191         "tx_prio_3_packets", "tx_prio_3_bytes",
 192         "tx_prio_4_packets", "tx_prio_4_bytes",
 193         "tx_prio_5_packets", "tx_prio_5_bytes",
 194         "tx_prio_6_packets", "tx_prio_6_bytes",
 195         "tx_prio_7_packets", "tx_prio_7_bytes",
 196         "tx_novlan_packets", "tx_novlan_bytes",
 197
 198         /* xdp statistics */
 199         "rx_xdp_drop",
 200         "rx_xdp_tx",
 201         "rx_xdp_tx_full",
 202 };
 203
 204 static const char mlx4_en_test_names[][ETH_GSTRING_LEN]= {
 205         "Interrupt Test",
 206         "Link Test",
 207         "Speed Test",
 208         "Register Test",
 209         "Loopback Test",
 210 };
 211
 212 static u32 mlx4_en_get_msglevel(struct net_device *dev)
 213 {
 214         return ((struct mlx4_en_priv *) netdev_priv(dev))->msg_enable;
 215 }
 216
 217 static void mlx4_en_set_msglevel(struct net_device *dev, u32 val)
 218 {
 219         ((struct mlx4_en_priv *) netdev_priv(dev))->msg_enable = val;
 220 }
 221
 222 static void mlx4_en_get_wol(struct net_device *netdev,
 223                             struct ethtool_wolinfo *wol)
 224 {
 225         struct mlx4_en_priv *priv = netdev_priv(netdev);
 226         int err = 0;
 227         u64 config = 0;
 228         u64 mask;
 229
 230         if ((priv->port < 1) || (priv->port > 2)) {
 231                 en_err(priv, "Failed to get WoL information\n");
 232                 return;
 233         }
 234
 235         mask = (priv->port == 1) ? MLX4_DEV_CAP_FLAG_WOL_PORT1 :
 236                 MLX4_DEV_CAP_FLAG_WOL_PORT2;
 237
 238         if (!(priv->mdev->dev->caps.flags & mask)) {
 239                 wol->supported = 0;
 240                 wol->wolopts = 0;
 241                 return;
 242         }
 243
 244         err = mlx4_wol_read(priv->mdev->dev, &config, priv->port);
 245         if (err) {
 246                 en_err(priv, "Failed to get WoL information\n");
 247                 return;
 248         }
 249
 250         if (config & MLX4_EN_WOL_MAGIC)
 251                 wol->supported = WAKE_MAGIC;
 252         else
 253                 wol->supported = 0;
 254
 255         if (config & MLX4_EN_WOL_ENABLED)
 256                 wol->wolopts = WAKE_MAGIC;
 257         else
 258                 wol->wolopts = 0;
 259 }
 260
 261 static int mlx4_en_set_wol(struct net_device *netdev,
 262                             struct ethtool_wolinfo *wol)
 263 {
 264         struct mlx4_en_priv *priv = netdev_priv(netdev);
 265         u64 config = 0;
 266         int err = 0;
 267         u64 mask;
 268
 269         if ((priv->port < 1) || (priv->port > 2))
 270                 return -EOPNOTSUPP;
 271
 272         mask = (priv->port == 1) ? MLX4_DEV_CAP_FLAG_WOL_PORT1 :
 273                 MLX4_DEV_CAP_FLAG_WOL_PORT2;
 274
 275         if (!(priv->mdev->dev->caps.flags & mask))
 276                 return -EOPNOTSUPP;
 277
 278         if (wol->supported & ~WAKE_MAGIC)
 279                 return -EINVAL;
 280
 281         err = mlx4_wol_read(priv->mdev->dev, &config, priv->port);
 282         if (err) {
 283                 en_err(priv, "Failed to get WoL info, unable to modify\n");
 284                 return err;
 285         }
 286
 287         if (wol->wolopts & WAKE_MAGIC) {
 288                 config |= MLX4_EN_WOL_DO_MODIFY | MLX4_EN_WOL_ENABLED |
 289                                 MLX4_EN_WOL_MAGIC;
 290         } else {
 291                 config &= ~(MLX4_EN_WOL_ENABLED | MLX4_EN_WOL_MAGIC);
 292                 config |= MLX4_EN_WOL_DO_MODIFY;
 293         }
 294
 295         err = mlx4_wol_write(priv->mdev->dev, config, priv->port);
 296         if (err)
 297                 en_err(priv, "Failed to set WoL information\n");
 298
 299         return err;
 300 }
 301
 302 struct bitmap_iterator {
 303         unsigned long *stats_bitmap;
 304         unsigned int count;
 305         unsigned int iterator;
 306         bool advance_array; /* if set, force no increments */
 307 };
 308
 309 static inline void bitmap_iterator_init(struct bitmap_iterator *h,
 310                                         unsigned long *stats_bitmap,
 311                                         int count)
 312 {
 313         h->iterator = 0;
 314         h->advance_array = !bitmap_empty(stats_bitmap, count);
 315         h->count = h->advance_array ? bitmap_weight(stats_bitmap, count)
 316                 : count;
 317         h->stats_bitmap = stats_bitmap;
 318 }
 319
 320 static inline int bitmap_iterator_test(struct bitmap_iterator *h)
 321 {
 322         return !h->advance_array ? 1 : test_bit(h->iterator, h->stats_bitmap);
 323 }
 324
 325 static inline int bitmap_iterator_inc(struct bitmap_iterator *h)
 326 {
 327         return h->iterator++;
 328 }
 329
 330 static inline unsigned int
 331 bitmap_iterator_count(struct bitmap_iterator *h)
 332 {
 333         return h->count;
 334 }
 335
 336 static int mlx4_en_get_sset_count(struct net_device *dev, int sset)
 337 {
 338         struct mlx4_en_priv *priv = netdev_priv(dev);
 339         struct bitmap_iterator it;
 340
 341         bitmap_iterator_init(&it, priv->stats_bitmap.bitmap, NUM_ALL_STATS);
 342
 343         switch (sset) {
 344         case ETH_SS_STATS:
 345                 return bitmap_iterator_count(&it) +
 346                         (priv->tx_ring_num[TX] * 2) +
 347                         (priv->rx_ring_num * (3 + NUM_XDP_STATS));
 348         case ETH_SS_TEST:
 349                 return MLX4_EN_NUM_SELF_TEST - !(priv->mdev->dev->caps.flags
 350                                         & MLX4_DEV_CAP_FLAG_UC_LOOPBACK) * 2;
 351         case ETH_SS_PRIV_FLAGS:
 352                 return ARRAY_SIZE(mlx4_en_priv_flags);
 353         default:
 354                 return -EOPNOTSUPP;
 355         }
 356 }
 357
 358 static void mlx4_en_get_ethtool_stats(struct net_device *dev,
 359                 struct ethtool_stats *stats, uint64_t *data)
 360 {
 361         struct mlx4_en_priv *priv = netdev_priv(dev);
 362         int index = 0;
 363         int i;
 364         struct bitmap_iterator it;
 365
 366         bitmap_iterator_init(&it, priv->stats_bitmap.bitmap, NUM_ALL_STATS);
 367
 368         spin_lock_bh(&priv->stats_lock);
 369
 370         mlx4_en_fold_software_stats(dev);
 371
 372         for (i = 0; i < NUM_MAIN_STATS; i++, bitmap_iterator_inc(&it))
 373                 if (bitmap_iterator_test(&it))
 374                         data[index++] = ((unsigned long *)&dev->stats)[i];
 375
 376         for (i = 0; i < NUM_PORT_STATS; i++, bitmap_iterator_inc(&it))
 377                 if (bitmap_iterator_test(&it))
 378                         data[index++] = ((unsigned long *)&priv->port_stats)[i];
 379
 380         for (i = 0; i < NUM_PF_STATS; i++, bitmap_iterator_inc(&it))
 381                 if (bitmap_iterator_test(&it))
 382                         data[index++] =
 383                                 ((unsigned long *)&priv->pf_stats)[i];
 384
 385         for (i = 0; i < NUM_FLOW_PRIORITY_STATS_RX;
 386              i++, bitmap_iterator_inc(&it))
 387                 if (bitmap_iterator_test(&it))
 388                         data[index++] =
 389                                 ((u64 *)&priv->rx_priority_flowstats)[i];
 390
 391         for (i = 0; i < NUM_FLOW_STATS_RX; i++, bitmap_iterator_inc(&it))
 392                 if (bitmap_iterator_test(&it))
 393                         data[index++] = ((u64 *)&priv->rx_flowstats)[i];
 394
 395         for (i = 0; i < NUM_FLOW_PRIORITY_STATS_TX;
 396              i++, bitmap_iterator_inc(&it))
 397                 if (bitmap_iterator_test(&it))
 398                         data[index++] =
 399                                 ((u64 *)&priv->tx_priority_flowstats)[i];
 400
 401         for (i = 0; i < NUM_FLOW_STATS_TX; i++, bitmap_iterator_inc(&it))
 402                 if (bitmap_iterator_test(&it))
 403                         data[index++] = ((u64 *)&priv->tx_flowstats)[i];
 404
 405         for (i = 0; i < NUM_PKT_STATS; i++, bitmap_iterator_inc(&it))
 406                 if (bitmap_iterator_test(&it))
 407                         data[index++] = ((unsigned long *)&priv->pkstats)[i];
 408
 409         for (i = 0; i < NUM_XDP_STATS; i++, bitmap_iterator_inc(&it))
 410                 if (bitmap_iterator_test(&it))
 411                         data[index++] = ((unsigned long *)&priv->xdp_stats)[i];
 412
 413         for (i = 0; i < priv->tx_ring_num[TX]; i++) {
 414                 data[index++] = priv->tx_ring[TX][i]->packets;
 415                 data[index++] = priv->tx_ring[TX][i]->bytes;
 416         }
 417         for (i = 0; i < priv->rx_ring_num; i++) {
 418                 data[index++] = priv->rx_ring[i]->packets;
 419                 data[index++] = priv->rx_ring[i]->bytes;
 420                 data[index++] = priv->rx_ring[i]->dropped;
 421                 data[index++] = priv->rx_ring[i]->xdp_drop;
 422                 data[index++] = priv->rx_ring[i]->xdp_tx;
 423                 data[index++] = priv->rx_ring[i]->xdp_tx_full;
 424         }
 425         spin_unlock_bh(&priv->stats_lock);
 426
 427 }
 428
 429 static void mlx4_en_self_test(struct net_device *dev,
 430                               struct ethtool_test *etest, u64 *buf)
 431 {
 432         mlx4_en_ex_selftest(dev, &etest->flags, buf);
 433 }
 434
 435 static void mlx4_en_get_strings(struct net_device *dev,
 436                                 uint32_t stringset, uint8_t *data)
 437 {
 438         struct mlx4_en_priv *priv = netdev_priv(dev);
 439         int index = 0;
 440         int i, strings = 0;
 441         struct bitmap_iterator it;
 442
 443         bitmap_iterator_init(&it, priv->stats_bitmap.bitmap, NUM_ALL_STATS);
 444
 445         switch (stringset) {
 446         case ETH_SS_TEST:
 447                 for (i = 0; i < MLX4_EN_NUM_SELF_TEST - 2; i++)
 448                         strcpy(data + i * ETH_GSTRING_LEN, mlx4_en_test_names[i]);
 449                 if (priv->mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UC_LOOPBACK)
 450                         for (; i < MLX4_EN_NUM_SELF_TEST; i++)
 451                                 strcpy(data + i * ETH_GSTRING_LEN, mlx4_en_test_names[i]);
 452                 break;
 453
 454         case ETH_SS_STATS:
 455                 /* Add main counters */
 456                 for (i = 0; i < NUM_MAIN_STATS; i++, strings++,
 457                      bitmap_iterator_inc(&it))
 458                         if (bitmap_iterator_test(&it))
 459                                 strcpy(data + (index++) * ETH_GSTRING_LEN,
 460                                        main_strings[strings]);
 461
 462                 for (i = 0; i < NUM_PORT_STATS; i++, strings++,
 463                      bitmap_iterator_inc(&it))
 464                         if (bitmap_iterator_test(&it))
 465                                 strcpy(data + (index++) * ETH_GSTRING_LEN,
 466                                        main_strings[strings]);
 467
 468                 for (i = 0; i < NUM_PF_STATS; i++, strings++,
 469                      bitmap_iterator_inc(&it))
 470                         if (bitmap_iterator_test(&it))
 471                                 strcpy(data + (index++) * ETH_GSTRING_LEN,
 472                                        main_strings[strings]);
 473
 474                 for (i = 0; i < NUM_FLOW_STATS; i++, strings++,
 475                      bitmap_iterator_inc(&it))
 476                         if (bitmap_iterator_test(&it))
 477                                 strcpy(data + (index++) * ETH_GSTRING_LEN,
 478                                        main_strings[strings]);
 479
 480                 for (i = 0; i < NUM_PKT_STATS; i++, strings++,
 481                      bitmap_iterator_inc(&it))
 482                         if (bitmap_iterator_test(&it))
 483                                 strcpy(data + (index++) * ETH_GSTRING_LEN,
 484                                        main_strings[strings]);
 485
 486                 for (i = 0; i < NUM_XDP_STATS; i++, strings++,
 487                      bitmap_iterator_inc(&it))
 488                         if (bitmap_iterator_test(&it))
 489                                 strcpy(data + (index++) * ETH_GSTRING_LEN,
 490                                        main_strings[strings]);
 491
 492                 for (i = 0; i < priv->tx_ring_num[TX]; i++) {
 493                         sprintf(data + (index++) * ETH_GSTRING_LEN,
 494                                 "tx%d_packets", i);
 495                         sprintf(data + (index++) * ETH_GSTRING_LEN,
 496                                 "tx%d_bytes", i);
 497                 }
 498                 for (i = 0; i < priv->rx_ring_num; i++) {
 499                         sprintf(data + (index++) * ETH_GSTRING_LEN,
 500                                 "rx%d_packets", i);
 501                         sprintf(data + (index++) * ETH_GSTRING_LEN,
 502                                 "rx%d_bytes", i);
 503                         sprintf(data + (index++) * ETH_GSTRING_LEN,
 504                                 "rx%d_dropped", i);
 505                         sprintf(data + (index++) * ETH_GSTRING_LEN,
 506                                 "rx%d_xdp_drop", i);
 507                         sprintf(data + (index++) * ETH_GSTRING_LEN,
 508                                 "rx%d_xdp_tx", i);
 509                         sprintf(data + (index++) * ETH_GSTRING_LEN,
 510                                 "rx%d_xdp_tx_full", i);
 511                 }
 512                 break;
 513         case ETH_SS_PRIV_FLAGS:
 514                 for (i = 0; i < ARRAY_SIZE(mlx4_en_priv_flags); i++)
 515                         strcpy(data + i * ETH_GSTRING_LEN,
 516                                mlx4_en_priv_flags[i]);
 517                 break;
 518
 519         }
 520 }
 521
 522 static u32 mlx4_en_autoneg_get(struct net_device *dev)
 523 {
 524         struct mlx4_en_priv *priv = netdev_priv(dev);
 525         struct mlx4_en_dev *mdev = priv->mdev;
 526         u32 autoneg = AUTONEG_DISABLE;
 527
 528         if ((mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETH_BACKPL_AN_REP) &&
 529             (priv->port_state.flags & MLX4_EN_PORT_ANE))
 530                 autoneg = AUTONEG_ENABLE;
 531
 532         return autoneg;
 533 }
 534
 535 static void ptys2ethtool_update_supported_port(unsigned long *mask,
 536                                                struct mlx4_ptys_reg *ptys_reg)
 537 {
 538         u32 eth_proto = be32_to_cpu(ptys_reg->eth_proto_cap);
 539
 540         if (eth_proto & (MLX4_PROT_MASK(MLX4_10GBASE_T)
 541                          | MLX4_PROT_MASK(MLX4_1000BASE_T)
 542                          | MLX4_PROT_MASK(MLX4_100BASE_TX))) {
 543                 __set_bit(ETHTOOL_LINK_MODE_TP_BIT, mask);
 544         } else if (eth_proto & (MLX4_PROT_MASK(MLX4_10GBASE_CR)
 545                          | MLX4_PROT_MASK(MLX4_10GBASE_SR)
 546                          | MLX4_PROT_MASK(MLX4_56GBASE_SR4)
 547                          | MLX4_PROT_MASK(MLX4_40GBASE_CR4)
 548                          | MLX4_PROT_MASK(MLX4_40GBASE_SR4)
 549                          | MLX4_PROT_MASK(MLX4_1000BASE_CX_SGMII))) {
 550                 __set_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, mask);
 551         } else if (eth_proto & (MLX4_PROT_MASK(MLX4_56GBASE_KR4)
 552                          | MLX4_PROT_MASK(MLX4_40GBASE_KR4)
 553                          | MLX4_PROT_MASK(MLX4_20GBASE_KR2)
 554                          | MLX4_PROT_MASK(MLX4_10GBASE_KR)
 555                          | MLX4_PROT_MASK(MLX4_10GBASE_KX4)
 556                          | MLX4_PROT_MASK(MLX4_1000BASE_KX))) {
 557                 __set_bit(ETHTOOL_LINK_MODE_Backplane_BIT, mask);
 558         }
 559 }
 560
 561 static u32 ptys_get_active_port(struct mlx4_ptys_reg *ptys_reg)
 562 {
 563         u32 eth_proto = be32_to_cpu(ptys_reg->eth_proto_oper);
 564
 565         if (!eth_proto) /* link down */
 566                 eth_proto = be32_to_cpu(ptys_reg->eth_proto_cap);
 567
 568         if (eth_proto & (MLX4_PROT_MASK(MLX4_10GBASE_T)
 569                          | MLX4_PROT_MASK(MLX4_1000BASE_T)
 570                          | MLX4_PROT_MASK(MLX4_100BASE_TX))) {
 571                         return PORT_TP;
 572         }
 573
 574         if (eth_proto & (MLX4_PROT_MASK(MLX4_10GBASE_SR)
 575                          | MLX4_PROT_MASK(MLX4_56GBASE_SR4)
 576                          | MLX4_PROT_MASK(MLX4_40GBASE_SR4)
 577                          | MLX4_PROT_MASK(MLX4_1000BASE_CX_SGMII))) {
 578                         return PORT_FIBRE;
 579         }
 580
 581         if (eth_proto & (MLX4_PROT_MASK(MLX4_10GBASE_CR)
 582                          | MLX4_PROT_MASK(MLX4_56GBASE_CR4)
 583                          | MLX4_PROT_MASK(MLX4_40GBASE_CR4))) {
 584                         return PORT_DA;
 585         }
 586
 587         if (eth_proto & (MLX4_PROT_MASK(MLX4_56GBASE_KR4)
 588                          | MLX4_PROT_MASK(MLX4_40GBASE_KR4)
 589                          | MLX4_PROT_MASK(MLX4_20GBASE_KR2)
 590                          | MLX4_PROT_MASK(MLX4_10GBASE_KR)
 591                          | MLX4_PROT_MASK(MLX4_10GBASE_KX4)
 592                          | MLX4_PROT_MASK(MLX4_1000BASE_KX))) {
 593                         return PORT_NONE;
 594         }
 595         return PORT_OTHER;
 596 }
 597
 598 #define MLX4_LINK_MODES_SZ \
 599         (FIELD_SIZEOF(struct mlx4_ptys_reg, eth_proto_cap) * 8)
 600
 601 enum ethtool_report {
 602         SUPPORTED = 0,
 603         ADVERTISED = 1,
 604 };
 605
 606 struct ptys2ethtool_config {
 607         __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
 608         __ETHTOOL_DECLARE_LINK_MODE_MASK(advertised);
 609         u32 speed;
 610 };
 611
 612 static unsigned long *ptys2ethtool_link_mode(struct ptys2ethtool_config *cfg,
 613                                              enum ethtool_report report)
 614 {
 615         switch (report) {
 616         case SUPPORTED:
 617                 return cfg->supported;
 618         case ADVERTISED:
 619                 return cfg->advertised;
 620         }
 621         return NULL;
 622 }
 623
 624 #define MLX4_BUILD_PTYS2ETHTOOL_CONFIG(reg_, speed_, ...)               \
 625         ({                                                              \
 626                 struct ptys2ethtool_config *cfg;                        \
 627                 const unsigned int modes[] = { __VA_ARGS__ };           \
 628                 unsigned int i;                                         \
 629                 cfg = &ptys2ethtool_map[reg_];                          \
 630                 cfg->speed = speed_;                                    \
 631                 bitmap_zero(cfg->supported,                             \
 632                             __ETHTOOL_LINK_MODE_MASK_NBITS);            \
 633                 bitmap_zero(cfg->advertised,                            \
 634                             __ETHTOOL_LINK_MODE_MASK_NBITS);            \
 635                 for (i = 0 ; i < ARRAY_SIZE(modes) ; ++i) {             \
 636                         __set_bit(modes[i], cfg->supported);            \
 637                         __set_bit(modes[i], cfg->advertised);           \
 638                 }                                                       \
 639         })
 640
 641 /* Translates mlx4 link mode to equivalent ethtool Link modes/speed */
 642 static struct ptys2ethtool_config ptys2ethtool_map[MLX4_LINK_MODES_SZ];
 643
 644 void __init mlx4_en_init_ptys2ethtool_map(void)
 645 {
 646         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_100BASE_TX, SPEED_100,
 647                                        ETHTOOL_LINK_MODE_100baseT_Full_BIT);
 648         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_1000BASE_T, SPEED_1000,
 649                                        ETHTOOL_LINK_MODE_1000baseT_Full_BIT);
 650         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_1000BASE_CX_SGMII, SPEED_1000,
 651                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
 652         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_1000BASE_KX, SPEED_1000,
 653                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
 654         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_10GBASE_T, SPEED_10000,
 655                                        ETHTOOL_LINK_MODE_10000baseT_Full_BIT);
 656         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_10GBASE_CX4, SPEED_10000,
 657                                        ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
 658         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_10GBASE_KX4, SPEED_10000,
 659                                        ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
 660         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_10GBASE_KR, SPEED_10000,
 661                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
 662         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_10GBASE_CR, SPEED_10000,
 663                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
 664         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_10GBASE_SR, SPEED_10000,
 665                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
 666         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_20GBASE_KR2, SPEED_20000,
 667                                        ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT,
 668                                        ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT);
 669         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_40GBASE_CR4, SPEED_40000,
 670                                        ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT);
 671         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_40GBASE_KR4, SPEED_40000,
 672                                        ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT);
 673         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_40GBASE_SR4, SPEED_40000,
 674                                        ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT);
 675         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_56GBASE_KR4, SPEED_56000,
 676                                        ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT);
 677         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_56GBASE_CR4, SPEED_56000,
 678                                        ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT);
 679         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_56GBASE_SR4, SPEED_56000,
 680                                        ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT);
 681 };
 682
 683 static void ptys2ethtool_update_link_modes(unsigned long *link_modes,
 684                                            u32 eth_proto,
 685                                            enum ethtool_report report)
 686 {
 687         int i;
 688         for (i = 0; i < MLX4_LINK_MODES_SZ; i++) {
 689                 if (eth_proto & MLX4_PROT_MASK(i))
 690                         bitmap_or(link_modes, link_modes,
 691                                   ptys2ethtool_link_mode(&ptys2ethtool_map[i],
 692                                                          report),
 693                                   __ETHTOOL_LINK_MODE_MASK_NBITS);
 694         }
 695 }
 696
 697 static u32 ethtool2ptys_link_modes(const unsigned long *link_modes,
 698                                    enum ethtool_report report)
 699 {
 700         int i;
 701         u32 ptys_modes = 0;
 702
 703         for (i = 0; i < MLX4_LINK_MODES_SZ; i++) {
 704                 if (bitmap_intersects(
 705                             ptys2ethtool_link_mode(&ptys2ethtool_map[i],
 706                                                    report),
 707                             link_modes,
 708                             __ETHTOOL_LINK_MODE_MASK_NBITS))
 709                         ptys_modes |= 1 << i;
 710         }
 711         return ptys_modes;
 712 }
 713
 714 /* Convert actual speed (SPEED_XXX) to ptys link modes */
 715 static u32 speed2ptys_link_modes(u32 speed)
 716 {
 717         int i;
 718         u32 ptys_modes = 0;
 719
 720         for (i = 0; i < MLX4_LINK_MODES_SZ; i++) {
 721                 if (ptys2ethtool_map[i].speed == speed)
 722                         ptys_modes |= 1 << i;
 723         }
 724         return ptys_modes;
 725 }
 726
 727 static int
 728 ethtool_get_ptys_link_ksettings(struct net_device *dev,
 729                                 struct ethtool_link_ksettings *link_ksettings)
 730 {
 731         struct mlx4_en_priv *priv = netdev_priv(dev);
 732         struct mlx4_ptys_reg ptys_reg;
 733         u32 eth_proto;
 734         int ret;
 735
 736         memset(&ptys_reg, 0, sizeof(ptys_reg));
 737         ptys_reg.local_port = priv->port;
 738         ptys_reg.proto_mask = MLX4_PTYS_EN;
 739         ret = mlx4_ACCESS_PTYS_REG(priv->mdev->dev,
 740                                    MLX4_ACCESS_REG_QUERY, &ptys_reg);
 741         if (ret) {
 742                 en_warn(priv, "Failed to run mlx4_ACCESS_PTYS_REG status(%x)",
 743                         ret);
 744                 return ret;
 745         }
 746         en_dbg(DRV, priv, "ptys_reg.proto_mask       %x\n",
 747                ptys_reg.proto_mask);
 748         en_dbg(DRV, priv, "ptys_reg.eth_proto_cap    %x\n",
 749                be32_to_cpu(ptys_reg.eth_proto_cap));
 750         en_dbg(DRV, priv, "ptys_reg.eth_proto_admin  %x\n",
 751                be32_to_cpu(ptys_reg.eth_proto_admin));
 752         en_dbg(DRV, priv, "ptys_reg.eth_proto_oper   %x\n",
 753                be32_to_cpu(ptys_reg.eth_proto_oper));
 754         en_dbg(DRV, priv, "ptys_reg.eth_proto_lp_adv %x\n",
 755                be32_to_cpu(ptys_reg.eth_proto_lp_adv));
 756
 757         /* reset supported/advertising masks */
 758         ethtool_link_ksettings_zero_link_mode(link_ksettings, supported);
 759         ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising);
 760
 761         ptys2ethtool_update_supported_port(link_ksettings->link_modes.supported,
 762                                            &ptys_reg);
 763
 764         eth_proto = be32_to_cpu(ptys_reg.eth_proto_cap);
 765         ptys2ethtool_update_link_modes(link_ksettings->link_modes.supported,
 766                                        eth_proto, SUPPORTED);
 767
 768         eth_proto = be32_to_cpu(ptys_reg.eth_proto_admin);
 769         ptys2ethtool_update_link_modes(link_ksettings->link_modes.advertising,
 770                                        eth_proto, ADVERTISED);
 771
 772         ethtool_link_ksettings_add_link_mode(link_ksettings, supported,
 773                                              Pause);
 774         ethtool_link_ksettings_add_link_mode(link_ksettings, supported,
 775                                              Asym_Pause);
 776
 777         if (priv->prof->tx_pause)
 778                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 779                                                      advertising, Pause);
 780         if (priv->prof->tx_pause ^ priv->prof->rx_pause)
 781                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 782                                                      advertising, Asym_Pause);
 783
 784         link_ksettings->base.port = ptys_get_active_port(&ptys_reg);
 785
 786         if (mlx4_en_autoneg_get(dev)) {
 787                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 788                                                      supported, Autoneg);
 789                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 790                                                      advertising, Autoneg);
 791         }
 792
 793         link_ksettings->base.autoneg
 794                 = (priv->port_state.flags & MLX4_EN_PORT_ANC) ?
 795                 AUTONEG_ENABLE : AUTONEG_DISABLE;
 796
 797         eth_proto = be32_to_cpu(ptys_reg.eth_proto_lp_adv);
 798
 799         ethtool_link_ksettings_zero_link_mode(link_ksettings, lp_advertising);
 800         ptys2ethtool_update_link_modes(
 801                 link_ksettings->link_modes.lp_advertising,
 802                 eth_proto, ADVERTISED);
 803         if (priv->port_state.flags & MLX4_EN_PORT_ANC)
 804                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 805                                                      lp_advertising, Autoneg);
 806
 807         link_ksettings->base.phy_address = 0;
 808         link_ksettings->base.mdio_support = 0;
 809         link_ksettings->base.eth_tp_mdix = ETH_TP_MDI_INVALID;
 810         link_ksettings->base.eth_tp_mdix_ctrl = ETH_TP_MDI_AUTO;
 811
 812         return ret;
 813 }
 814
 815 static void
 816 ethtool_get_default_link_ksettings(
 817         struct net_device *dev, struct ethtool_link_ksettings *link_ksettings)
 818 {
 819         struct mlx4_en_priv *priv = netdev_priv(dev);
 820         int trans_type;
 821
 822         link_ksettings->base.autoneg = AUTONEG_DISABLE;
 823
 824         ethtool_link_ksettings_zero_link_mode(link_ksettings, supported);
 825         ethtool_link_ksettings_add_link_mode(link_ksettings, supported,
 826                                              10000baseT_Full);
 827
 828         ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising);
 829         ethtool_link_ksettings_add_link_mode(link_ksettings, advertising,
 830                                              10000baseT_Full);
 831
 832         trans_type = priv->port_state.transceiver;
 833         if (trans_type > 0 && trans_type <= 0xC) {
 834                 link_ksettings->base.port = PORT_FIBRE;
 835                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 836                                                      supported, FIBRE);
 837                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 838                                                      advertising, FIBRE);
 839         } else if (trans_type == 0x80 || trans_type == 0) {
 840                 link_ksettings->base.port = PORT_TP;
 841                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 842                                                      supported, TP);
 843                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 844                                                      advertising, TP);
 845         } else  {
 846                 link_ksettings->base.port = -1;
 847         }
 848 }
 849
 850 static int
 851 mlx4_en_get_link_ksettings(struct net_device *dev,
 852                            struct ethtool_link_ksettings *link_ksettings)
 853 {
 854         struct mlx4_en_priv *priv = netdev_priv(dev);
 855         int ret = -EINVAL;
 856
 857         if (mlx4_en_QUERY_PORT(priv->mdev, priv->port))
 858                 return -ENOMEM;
 859
 860         en_dbg(DRV, priv, "query port state.flags ANC(%x) ANE(%x)\n",
 861                priv->port_state.flags & MLX4_EN_PORT_ANC,
 862                priv->port_state.flags & MLX4_EN_PORT_ANE);
 863
 864         if (priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETH_PROT_CTRL)
 865                 ret = ethtool_get_ptys_link_ksettings(dev, link_ksettings);
 866         if (ret) /* ETH PROT CRTL is not supported or PTYS CMD failed */
 867                 ethtool_get_default_link_ksettings(dev, link_ksettings);
 868
 869         if (netif_carrier_ok(dev)) {
 870                 link_ksettings->base.speed = priv->port_state.link_speed;
 871                 link_ksettings->base.duplex = DUPLEX_FULL;
 872         } else {
 873                 link_ksettings->base.speed = SPEED_UNKNOWN;
 874                 link_ksettings->base.duplex = DUPLEX_UNKNOWN;
 875         }
 876         return 0;
 877 }
 878
 879 /* Calculate PTYS admin according ethtool speed (SPEED_XXX) */
 880 static __be32 speed_set_ptys_admin(struct mlx4_en_priv *priv, u32 speed,
 881                                    __be32 proto_cap)
 882 {
 883         __be32 proto_admin = 0;
 884
 885         if (!speed) { /* Speed = 0 ==> Reset Link modes */
 886                 proto_admin = proto_cap;
 887                 en_info(priv, "Speed was set to 0, Reset advertised Link Modes to default (%x)\n",
 888                         be32_to_cpu(proto_cap));
 889         } else {
 890                 u32 ptys_link_modes = speed2ptys_link_modes(speed);
 891
 892                 proto_admin = cpu_to_be32(ptys_link_modes) & proto_cap;
 893                 en_info(priv, "Setting Speed to %d\n", speed);
 894         }
 895         return proto_admin;
 896 }
 897
 898 static int
 899 mlx4_en_set_link_ksettings(struct net_device *dev,
 900                            const struct ethtool_link_ksettings *link_ksettings)
 901 {
 902         struct mlx4_en_priv *priv = netdev_priv(dev);
 903         struct mlx4_ptys_reg ptys_reg;
 904         __be32 proto_admin;
 905         u8 cur_autoneg;
 906         int ret;
 907
 908         u32 ptys_adv = ethtool2ptys_link_modes(
 909                 link_ksettings->link_modes.advertising, ADVERTISED);
 910         const int speed = link_ksettings->base.speed;
 911
 912         en_dbg(DRV, priv,
 913                "Set Speed=%d adv={%*pbl} autoneg=%d duplex=%d\n",
 914                speed, __ETHTOOL_LINK_MODE_MASK_NBITS,
 915                link_ksettings->link_modes.advertising,
 916                link_ksettings->base.autoneg,
 917                link_ksettings->base.duplex);
 918
 919         if (!(priv->mdev->dev->caps.flags2 &
 920               MLX4_DEV_CAP_FLAG2_ETH_PROT_CTRL) ||
 921             (link_ksettings->base.duplex == DUPLEX_HALF))
 922                 return -EINVAL;
 923
 924         memset(&ptys_reg, 0, sizeof(ptys_reg));
 925         ptys_reg.local_port = priv->port;
 926         ptys_reg.proto_mask = MLX4_PTYS_EN;
 927         ret = mlx4_ACCESS_PTYS_REG(priv->mdev->dev,
 928                                    MLX4_ACCESS_REG_QUERY, &ptys_reg);
 929         if (ret) {
 930                 en_warn(priv, "Failed to QUERY mlx4_ACCESS_PTYS_REG status(%x)\n",
 931                         ret);
 932                 return 0;
 933         }
 934
 935         cur_autoneg = ptys_reg.flags & MLX4_PTYS_AN_DISABLE_ADMIN ?
 936                                 AUTONEG_DISABLE : AUTONEG_ENABLE;
 937
 938         if (link_ksettings->base.autoneg == AUTONEG_DISABLE) {
 939                 proto_admin = speed_set_ptys_admin(priv, speed,
 940                                                    ptys_reg.eth_proto_cap);
 941                 if ((be32_to_cpu(proto_admin) &
 942                      (MLX4_PROT_MASK(MLX4_1000BASE_CX_SGMII) |
 943                       MLX4_PROT_MASK(MLX4_1000BASE_KX))) &&
 944                     (ptys_reg.flags & MLX4_PTYS_AN_DISABLE_CAP))
 945                         ptys_reg.flags |= MLX4_PTYS_AN_DISABLE_ADMIN;
 946         } else {
 947                 proto_admin = cpu_to_be32(ptys_adv);
 948                 ptys_reg.flags &= ~MLX4_PTYS_AN_DISABLE_ADMIN;
 949         }
 950
 951         proto_admin &= ptys_reg.eth_proto_cap;
 952         if (!proto_admin) {
 953                 en_warn(priv, "Not supported link mode(s) requested, check supported link modes.\n");
 954                 return -EINVAL; /* nothing to change due to bad input */
 955         }
 956
 957         if ((proto_admin == ptys_reg.eth_proto_admin) &&
 958             ((ptys_reg.flags & MLX4_PTYS_AN_DISABLE_CAP) &&
 959              (link_ksettings->base.autoneg == cur_autoneg)))
 960                 return 0; /* Nothing to change */
 961
 962         en_dbg(DRV, priv, "mlx4_ACCESS_PTYS_REG SET: ptys_reg.eth_proto_admin = 0x%x\n",
 963                be32_to_cpu(proto_admin));
 964
 965         ptys_reg.eth_proto_admin = proto_admin;
 966         ret = mlx4_ACCESS_PTYS_REG(priv->mdev->dev, MLX4_ACCESS_REG_WRITE,
 967                                    &ptys_reg);
 968         if (ret) {
 969                 en_warn(priv, "Failed to write mlx4_ACCESS_PTYS_REG eth_proto_admin(0x%x) status(0x%x)",
 970                         be32_to_cpu(ptys_reg.eth_proto_admin), ret);
 971                 return ret;
 972         }
 973
 974         mutex_lock(&priv->mdev->state_lock);
 975         if (priv->port_up) {
 976                 en_warn(priv, "Port link mode changed, restarting port...\n");
 977                 mlx4_en_stop_port(dev, 1);
 978                 if (mlx4_en_start_port(dev))
 979                         en_err(priv, "Failed restarting port %d\n", priv->port);
 980         }
 981         mutex_unlock(&priv->mdev->state_lock);
 982         return 0;
 983 }
 984
 985 static int mlx4_en_get_coalesce(struct net_device *dev,
 986                               struct ethtool_coalesce *coal)
 987 {
 988         struct mlx4_en_priv *priv = netdev_priv(dev);
 989
 990         coal->tx_coalesce_usecs = priv->tx_usecs;
 991         coal->tx_max_coalesced_frames = priv->tx_frames;
 992         coal->tx_max_coalesced_frames_irq = priv->tx_work_limit;
 993
 994         coal->rx_coalesce_usecs = priv->rx_usecs;
 995         coal->rx_max_coalesced_frames = priv->rx_frames;
 996
 997         coal->pkt_rate_low = priv->pkt_rate_low;
 998         coal->rx_coalesce_usecs_low = priv->rx_usecs_low;
 999         coal->pkt_rate_high = priv->pkt_rate_high;
1000         coal->rx_coalesce_usecs_high = priv->rx_usecs_high;
1001         coal->rate_sample_interval = priv->sample_interval;
1002         coal->use_adaptive_rx_coalesce = priv->adaptive_rx_coal;
1003
1004         return 0;
1005 }
1006
1007 static int mlx4_en_set_coalesce(struct net_device *dev,
1008                               struct ethtool_coalesce *coal)
1009 {
1010         struct mlx4_en_priv *priv = netdev_priv(dev);
1011
1012         if (!coal->tx_max_coalesced_frames_irq)
1013                 return -EINVAL;
1014
1015         priv->rx_frames = (coal->rx_max_coalesced_frames ==
1016                            MLX4_EN_AUTO_CONF) ?
1017                                 MLX4_EN_RX_COAL_TARGET :
1018                                 coal->rx_max_coalesced_frames;
1019         priv->rx_usecs = (coal->rx_coalesce_usecs ==
1020                           MLX4_EN_AUTO_CONF) ?
1021                                 MLX4_EN_RX_COAL_TIME :
1022                                 coal->rx_coalesce_usecs;
1023
1024         /* Setting TX coalescing parameters */
1025         if (coal->tx_coalesce_usecs != priv->tx_usecs ||
1026             coal->tx_max_coalesced_frames != priv->tx_frames) {
1027                 priv->tx_usecs = coal->tx_coalesce_usecs;
1028                 priv->tx_frames = coal->tx_max_coalesced_frames;
1029         }
1030
1031         /* Set adaptive coalescing params */
1032         priv->pkt_rate_low = coal->pkt_rate_low;
1033         priv->rx_usecs_low = coal->rx_coalesce_usecs_low;
1034         priv->pkt_rate_high = coal->pkt_rate_high;
1035         priv->rx_usecs_high = coal->rx_coalesce_usecs_high;
1036         priv->sample_interval = coal->rate_sample_interval;
1037         priv->adaptive_rx_coal = coal->use_adaptive_rx_coalesce;
1038         priv->tx_work_limit = coal->tx_max_coalesced_frames_irq;
1039
1040         return mlx4_en_moderation_update(priv);
1041 }
1042
1043 static int mlx4_en_set_pauseparam(struct net_device *dev,
1044                                 struct ethtool_pauseparam *pause)
1045 {
1046         struct mlx4_en_priv *priv = netdev_priv(dev);
1047         struct mlx4_en_dev *mdev = priv->mdev;
1048         int err;
1049
1050         if (pause->autoneg)
1051                 return -EINVAL;
1052
1053         priv->prof->tx_pause = pause->tx_pause != 0;
1054         priv->prof->rx_pause = pause->rx_pause != 0;
1055         err = mlx4_SET_PORT_general(mdev->dev, priv->port,
1056                                     priv->rx_skb_size + ETH_FCS_LEN,
1057                                     priv->prof->tx_pause,
1058                                     priv->prof->tx_ppp,
1059                                     priv->prof->rx_pause,
1060                                     priv->prof->rx_ppp);
1061         if (err)
1062                 en_err(priv, "Failed setting pause params\n");
1063         else
1064                 mlx4_en_update_pfc_stats_bitmap(mdev->dev, &priv->stats_bitmap,
1065                                                 priv->prof->rx_ppp,
1066                                                 priv->prof->rx_pause,
1067                                                 priv->prof->tx_ppp,
1068                                                 priv->prof->tx_pause);
1069
1070         return err;
1071 }
1072
1073 static void mlx4_en_get_pauseparam(struct net_device *dev,
1074                                  struct ethtool_pauseparam *pause)
1075 {
1076         struct mlx4_en_priv *priv = netdev_priv(dev);
1077
1078         pause->tx_pause = priv->prof->tx_pause;
1079         pause->rx_pause = priv->prof->rx_pause;
1080 }
1081
1082 static int mlx4_en_set_ringparam(struct net_device *dev,
1083                                  struct ethtool_ringparam *param)
1084 {
1085         struct mlx4_en_priv *priv = netdev_priv(dev);
1086         struct mlx4_en_dev *mdev = priv->mdev;
1087         struct mlx4_en_port_profile new_prof;
1088         struct mlx4_en_priv *tmp;
1089         u32 rx_size, tx_size;
1090         int port_up = 0;
1091         int err = 0;
1092
1093         if (param->rx_jumbo_pending || param->rx_mini_pending)
1094                 return -EINVAL;
1095
1096         rx_size = roundup_pow_of_two(param->rx_pending);
1097         rx_size = max_t(u32, rx_size, MLX4_EN_MIN_RX_SIZE);
1098         rx_size = min_t(u32, rx_size, MLX4_EN_MAX_RX_SIZE);
1099         tx_size = roundup_pow_of_two(param->tx_pending);
1100         tx_size = max_t(u32, tx_size, MLX4_EN_MIN_TX_SIZE);
1101         tx_size = min_t(u32, tx_size, MLX4_EN_MAX_TX_SIZE);
1102
1103         if (rx_size == (priv->port_up ? priv->rx_ring[0]->actual_size :
1104                                         priv->rx_ring[0]->size) &&
1105             tx_size == priv->tx_ring[TX][0]->size)
1106                 return 0;
1107
1108         tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
1109         if (!tmp)
1110                 return -ENOMEM;
1111
1112         mutex_lock(&mdev->state_lock);
1113         memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));
1114         new_prof.tx_ring_size = tx_size;
1115         new_prof.rx_ring_size = rx_size;
1116         err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, true);
1117         if (err)
1118                 goto out;
1119
1120         if (priv->port_up) {
1121                 port_up = 1;
1122                 mlx4_en_stop_port(dev, 1);
1123         }
1124
1125         mlx4_en_safe_replace_resources(priv, tmp);
1126
1127         if (port_up) {
1128                 err = mlx4_en_start_port(dev);
1129                 if (err)
1130                         en_err(priv, "Failed starting port\n");
1131         }
1132
1133         err = mlx4_en_moderation_update(priv);
1134 out:
1135         kfree(tmp);
1136         mutex_unlock(&mdev->state_lock);
1137         return err;
1138 }
1139
1140 static void mlx4_en_get_ringparam(struct net_device *dev,
1141                                   struct ethtool_ringparam *param)
1142 {
1143         struct mlx4_en_priv *priv = netdev_priv(dev);
1144
1145         memset(param, 0, sizeof(*param));
1146         param->rx_max_pending = MLX4_EN_MAX_RX_SIZE;
1147         param->tx_max_pending = MLX4_EN_MAX_TX_SIZE;
1148         param->rx_pending = priv->port_up ?
1149                 priv->rx_ring[0]->actual_size : priv->rx_ring[0]->size;
1150         param->tx_pending = priv->tx_ring[TX][0]->size;
1151 }
1152
1153 static u32 mlx4_en_get_rxfh_indir_size(struct net_device *dev)
1154 {
1155         struct mlx4_en_priv *priv = netdev_priv(dev);
1156
1157         return rounddown_pow_of_two(priv->rx_ring_num);
1158 }
1159
1160 static u32 mlx4_en_get_rxfh_key_size(struct net_device *netdev)
1161 {
1162         return MLX4_EN_RSS_KEY_SIZE;
1163 }
1164
1165 static int mlx4_en_check_rxfh_func(struct net_device *dev, u8 hfunc)
1166 {
1167         struct mlx4_en_priv *priv = netdev_priv(dev);
1168
1169         /* check if requested function is supported by the device */
1170         if (hfunc == ETH_RSS_HASH_TOP) {
1171                 if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_TOP))
1172                         return -EINVAL;
1173                 if (!(dev->features & NETIF_F_RXHASH))
1174                         en_warn(priv, "Toeplitz hash function should be used in conjunction with RX hashing for optimal performance\n");
1175                 return 0;
1176         } else if (hfunc == ETH_RSS_HASH_XOR) {
1177                 if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_XOR))
1178                         return -EINVAL;
1179                 if (dev->features & NETIF_F_RXHASH)
1180                         en_warn(priv, "Enabling both XOR Hash function and RX Hashing can limit RPS functionality\n");
1181                 return 0;
1182         }
1183
1184         return -EINVAL;
1185 }
1186
1187 static int mlx4_en_get_rxfh(struct net_device *dev, u32 *ring_index, u8 *key,
1188                             u8 *hfunc)
1189 {
1190         struct mlx4_en_priv *priv = netdev_priv(dev);
1191         u32 n = mlx4_en_get_rxfh_indir_size(dev);
1192         u32 i, rss_rings;
1193         int err = 0;
1194
1195         rss_rings = priv->prof->rss_rings ?: n;
1196         rss_rings = rounddown_pow_of_two(rss_rings);
1197
1198         for (i = 0; i < n; i++) {
1199                 if (!ring_index)
1200                         break;
1201                 ring_index[i] = i % rss_rings;
1202         }
1203         if (key)
1204                 memcpy(key, priv->rss_key, MLX4_EN_RSS_KEY_SIZE);
1205         if (hfunc)
1206                 *hfunc = priv->rss_hash_fn;
1207         return err;
1208 }
1209
1210 static int mlx4_en_set_rxfh(struct net_device *dev, const u32 *ring_index,
1211                             const u8 *key, const u8 hfunc)
1212 {
1213         struct mlx4_en_priv *priv = netdev_priv(dev);
1214         u32 n = mlx4_en_get_rxfh_indir_size(dev);
1215         struct mlx4_en_dev *mdev = priv->mdev;
1216         int port_up = 0;
1217         int err = 0;
1218         int i;
1219         int rss_rings = 0;
1220
1221         /* Calculate RSS table size and make sure flows are spread evenly
1222          * between rings
1223          */
1224         for (i = 0; i < n; i++) {
1225                 if (!ring_index)
1226                         break;
1227                 if (i > 0 && !ring_index[i] && !rss_rings)
1228                         rss_rings = i;
1229
1230                 if (ring_index[i] != (i % (rss_rings ?: n)))
1231                         return -EINVAL;
1232         }
1233
1234         if (!rss_rings)
1235                 rss_rings = n;
1236
1237         /* RSS table size must be an order of 2 */
1238         if (!is_power_of_2(rss_rings))
1239                 return -EINVAL;
1240
1241         if (hfunc != ETH_RSS_HASH_NO_CHANGE) {
1242                 err = mlx4_en_check_rxfh_func(dev, hfunc);
1243                 if (err)
1244                         return err;
1245         }
1246
1247         mutex_lock(&mdev->state_lock);
1248         if (priv->port_up) {
1249                 port_up = 1;
1250                 mlx4_en_stop_port(dev, 1);
1251         }
1252
1253         if (ring_index)
1254                 priv->prof->rss_rings = rss_rings;
1255         if (key)
1256                 memcpy(priv->rss_key, key, MLX4_EN_RSS_KEY_SIZE);
1257         if (hfunc !=  ETH_RSS_HASH_NO_CHANGE)
1258                 priv->rss_hash_fn = hfunc;
1259
1260         if (port_up) {
1261                 err = mlx4_en_start_port(dev);
1262                 if (err)
1263                         en_err(priv, "Failed starting port\n");
1264         }
1265
1266         mutex_unlock(&mdev->state_lock);
1267         return err;
1268 }
1269
1270 #define all_zeros_or_all_ones(field)            \
1271         ((field) == 0 || (field) == (__force typeof(field))-1)
1272
1273 static int mlx4_en_validate_flow(struct net_device *dev,
1274                                  struct ethtool_rxnfc *cmd)
1275 {
1276         struct ethtool_usrip4_spec *l3_mask;
1277         struct ethtool_tcpip4_spec *l4_mask;
1278         struct ethhdr *eth_mask;
1279
1280         if (cmd->fs.location >= MAX_NUM_OF_FS_RULES)
1281                 return -EINVAL;
1282
1283         if (cmd->fs.flow_type & FLOW_MAC_EXT) {
1284                 /* dest mac mask must be ff:ff:ff:ff:ff:ff */
1285                 if (!is_broadcast_ether_addr(cmd->fs.m_ext.h_dest))
1286                         return -EINVAL;
1287         }
1288
1289         switch (cmd->fs.flow_type & ~(FLOW_EXT | FLOW_MAC_EXT)) {
1290         case TCP_V4_FLOW:
1291         case UDP_V4_FLOW:
1292                 if (cmd->fs.m_u.tcp_ip4_spec.tos)
1293                         return -EINVAL;
1294                 l4_mask = &cmd->fs.m_u.tcp_ip4_spec;
1295                 /* don't allow mask which isn't all 0 or 1 */
1296                 if (!all_zeros_or_all_ones(l4_mask->ip4src) ||
1297                     !all_zeros_or_all_ones(l4_mask->ip4dst) ||
1298                     !all_zeros_or_all_ones(l4_mask->psrc) ||
1299                     !all_zeros_or_all_ones(l4_mask->pdst))
1300                         return -EINVAL;
1301                 break;
1302         case IP_USER_FLOW:
1303                 l3_mask = &cmd->fs.m_u.usr_ip4_spec;
1304                 if (l3_mask->l4_4_bytes || l3_mask->tos || l3_mask->proto ||
1305                     cmd->fs.h_u.usr_ip4_spec.ip_ver != ETH_RX_NFC_IP4 ||
1306                     (!l3_mask->ip4src && !l3_mask->ip4dst) ||
1307                     !all_zeros_or_all_ones(l3_mask->ip4src) ||
1308                     !all_zeros_or_all_ones(l3_mask->ip4dst))
1309                         return -EINVAL;
1310                 break;
1311         case ETHER_FLOW:
1312                 eth_mask = &cmd->fs.m_u.ether_spec;
1313                 /* source mac mask must not be set */
1314                 if (!is_zero_ether_addr(eth_mask->h_source))
1315                         return -EINVAL;
1316
1317                 /* dest mac mask must be ff:ff:ff:ff:ff:ff */
1318                 if (!is_broadcast_ether_addr(eth_mask->h_dest))
1319                         return -EINVAL;
1320
1321                 if (!all_zeros_or_all_ones(eth_mask->h_proto))
1322                         return -EINVAL;
1323                 break;
1324         default:
1325                 return -EINVAL;
1326         }
1327
1328         if ((cmd->fs.flow_type & FLOW_EXT)) {
1329                 if (cmd->fs.m_ext.vlan_etype ||
1330                     !((cmd->fs.m_ext.vlan_tci & cpu_to_be16(VLAN_VID_MASK)) ==
1331                       0 ||
1332                       (cmd->fs.m_ext.vlan_tci & cpu_to_be16(VLAN_VID_MASK)) ==
1333                       cpu_to_be16(VLAN_VID_MASK)))
1334                         return -EINVAL;
1335
1336                 if (cmd->fs.m_ext.vlan_tci) {
1337                         if (be16_to_cpu(cmd->fs.h_ext.vlan_tci) >= VLAN_N_VID)
1338                                 return -EINVAL;
1339
1340                 }
1341         }
1342
1343         return 0;
1344 }
1345
1346 static int mlx4_en_ethtool_add_mac_rule(struct ethtool_rxnfc *cmd,
1347                                         struct list_head *rule_list_h,
1348                                         struct mlx4_spec_list *spec_l2,
1349                                         unsigned char *mac)
1350 {
1351         int err = 0;
1352         __be64 mac_msk = cpu_to_be64(MLX4_MAC_MASK << 16);
1353
1354         spec_l2->id = MLX4_NET_TRANS_RULE_ID_ETH;
1355         memcpy(spec_l2->eth.dst_mac_msk, &mac_msk, ETH_ALEN);
1356         memcpy(spec_l2->eth.dst_mac, mac, ETH_ALEN);
1357
1358         if ((cmd->fs.flow_type & FLOW_EXT) &&
1359             (cmd->fs.m_ext.vlan_tci & cpu_to_be16(VLAN_VID_MASK))) {
1360                 spec_l2->eth.vlan_id = cmd->fs.h_ext.vlan_tci;
1361                 spec_l2->eth.vlan_id_msk = cpu_to_be16(VLAN_VID_MASK);
1362         }
1363
1364         list_add_tail(&spec_l2->list, rule_list_h);
1365
1366         return err;
1367 }
1368
1369 static int mlx4_en_ethtool_add_mac_rule_by_ipv4(struct mlx4_en_priv *priv,
1370                                                 struct ethtool_rxnfc *cmd,
1371                                                 struct list_head *rule_list_h,
1372                                                 struct mlx4_spec_list *spec_l2,
1373                                                 __be32 ipv4_dst)
1374 {
1375 #ifdef CONFIG_INET
1376         unsigned char mac[ETH_ALEN];
1377
1378         if (!ipv4_is_multicast(ipv4_dst)) {
1379                 if (cmd->fs.flow_type & FLOW_MAC_EXT)
1380                         memcpy(&mac, cmd->fs.h_ext.h_dest, ETH_ALEN);
1381                 else
1382                         memcpy(&mac, priv->dev->dev_addr, ETH_ALEN);
1383         } else {
1384                 ip_eth_mc_map(ipv4_dst, mac);
1385         }
1386
1387         return mlx4_en_ethtool_add_mac_rule(cmd, rule_list_h, spec_l2, &mac[0]);
1388 #else
1389         return -EINVAL;
1390 #endif
1391 }
1392
1393 static int add_ip_rule(struct mlx4_en_priv *priv,
1394                        struct ethtool_rxnfc *cmd,
1395                        struct list_head *list_h)
1396 {
1397         int err;
1398         struct mlx4_spec_list *spec_l2 = NULL;
1399         struct mlx4_spec_list *spec_l3 = NULL;
1400         struct ethtool_usrip4_spec *l3_mask = &cmd->fs.m_u.usr_ip4_spec;
1401
1402         spec_l3 = kzalloc(sizeof(*spec_l3), GFP_KERNEL);
1403         spec_l2 = kzalloc(sizeof(*spec_l2), GFP_KERNEL);
1404         if (!spec_l2 || !spec_l3) {
1405                 err = -ENOMEM;
1406                 goto free_spec;
1407         }
1408
1409         err = mlx4_en_ethtool_add_mac_rule_by_ipv4(priv, cmd, list_h, spec_l2,
1410                                                    cmd->fs.h_u.
1411                                                    usr_ip4_spec.ip4dst);
1412         if (err)
1413                 goto free_spec;
1414         spec_l3->id = MLX4_NET_TRANS_RULE_ID_IPV4;
1415         spec_l3->ipv4.src_ip = cmd->fs.h_u.usr_ip4_spec.ip4src;
1416         if (l3_mask->ip4src)
1417                 spec_l3->ipv4.src_ip_msk = EN_ETHTOOL_WORD_MASK;
1418         spec_l3->ipv4.dst_ip = cmd->fs.h_u.usr_ip4_spec.ip4dst;
1419         if (l3_mask->ip4dst)
1420                 spec_l3->ipv4.dst_ip_msk = EN_ETHTOOL_WORD_MASK;
1421         list_add_tail(&spec_l3->list, list_h);
1422
1423         return 0;
1424
1425 free_spec:
1426         kfree(spec_l2);
1427         kfree(spec_l3);
1428         return err;
1429 }
1430
1431 static int add_tcp_udp_rule(struct mlx4_en_priv *priv,
1432                              struct ethtool_rxnfc *cmd,
1433                              struct list_head *list_h, int proto)
1434 {
1435         int err;
1436         struct mlx4_spec_list *spec_l2 = NULL;
1437         struct mlx4_spec_list *spec_l3 = NULL;
1438         struct mlx4_spec_list *spec_l4 = NULL;
1439         struct ethtool_tcpip4_spec *l4_mask = &cmd->fs.m_u.tcp_ip4_spec;
1440
1441         spec_l2 = kzalloc(sizeof(*spec_l2), GFP_KERNEL);
1442         spec_l3 = kzalloc(sizeof(*spec_l3), GFP_KERNEL);
1443         spec_l4 = kzalloc(sizeof(*spec_l4), GFP_KERNEL);
1444         if (!spec_l2 || !spec_l3 || !spec_l4) {
1445                 err = -ENOMEM;
1446                 goto free_spec;
1447         }
1448
1449         spec_l3->id = MLX4_NET_TRANS_RULE_ID_IPV4;
1450
1451         if (proto == TCP_V4_FLOW) {
1452                 err = mlx4_en_ethtool_add_mac_rule_by_ipv4(priv, cmd, list_h,
1453                                                            spec_l2,
1454                                                            cmd->fs.h_u.
1455                                                            tcp_ip4_spec.ip4dst);
1456                 if (err)
1457                         goto free_spec;
1458                 spec_l4->id = MLX4_NET_TRANS_RULE_ID_TCP;
1459                 spec_l3->ipv4.src_ip = cmd->fs.h_u.tcp_ip4_spec.ip4src;
1460                 spec_l3->ipv4.dst_ip = cmd->fs.h_u.tcp_ip4_spec.ip4dst;
1461                 spec_l4->tcp_udp.src_port = cmd->fs.h_u.tcp_ip4_spec.psrc;
1462                 spec_l4->tcp_udp.dst_port = cmd->fs.h_u.tcp_ip4_spec.pdst;
1463         } else {
1464                 err = mlx4_en_ethtool_add_mac_rule_by_ipv4(priv, cmd, list_h,
1465                                                            spec_l2,
1466                                                            cmd->fs.h_u.
1467                                                            udp_ip4_spec.ip4dst);
1468                 if (err)
1469                         goto free_spec;
1470                 spec_l4->id = MLX4_NET_TRANS_RULE_ID_UDP;
1471                 spec_l3->ipv4.src_ip = cmd->fs.h_u.udp_ip4_spec.ip4src;
1472                 spec_l3->ipv4.dst_ip = cmd->fs.h_u.udp_ip4_spec.ip4dst;
1473                 spec_l4->tcp_udp.src_port = cmd->fs.h_u.udp_ip4_spec.psrc;
1474                 spec_l4->tcp_udp.dst_port = cmd->fs.h_u.udp_ip4_spec.pdst;
1475         }
1476
1477         if (l4_mask->ip4src)
1478                 spec_l3->ipv4.src_ip_msk = EN_ETHTOOL_WORD_MASK;
1479         if (l4_mask->ip4dst)
1480                 spec_l3->ipv4.dst_ip_msk = EN_ETHTOOL_WORD_MASK;
1481
1482         if (l4_mask->psrc)
1483                 spec_l4->tcp_udp.src_port_msk = EN_ETHTOOL_SHORT_MASK;
1484         if (l4_mask->pdst)
1485                 spec_l4->tcp_udp.dst_port_msk = EN_ETHTOOL_SHORT_MASK;
1486
1487         list_add_tail(&spec_l3->list, list_h);
1488         list_add_tail(&spec_l4->list, list_h);
1489
1490         return 0;
1491
1492 free_spec:
1493         kfree(spec_l2);
1494         kfree(spec_l3);
1495         kfree(spec_l4);
1496         return err;
1497 }
1498
1499 static int mlx4_en_ethtool_to_net_trans_rule(struct net_device *dev,
1500                                              struct ethtool_rxnfc *cmd,
1501                                              struct list_head *rule_list_h)
1502 {
1503         int err;
1504         struct ethhdr *eth_spec;
1505         struct mlx4_spec_list *spec_l2;
1506         struct mlx4_en_priv *priv = netdev_priv(dev);
1507
1508         err = mlx4_en_validate_flow(dev, cmd);
1509         if (err)
1510                 return err;
1511
1512         switch (cmd->fs.flow_type & ~(FLOW_EXT | FLOW_MAC_EXT)) {
1513         case ETHER_FLOW:
1514                 spec_l2 = kzalloc(sizeof(*spec_l2), GFP_KERNEL);
1515                 if (!spec_l2)
1516                         return -ENOMEM;
1517
1518                 eth_spec = &cmd->fs.h_u.ether_spec;
1519                 mlx4_en_ethtool_add_mac_rule(cmd, rule_list_h, spec_l2,
1520                                              &eth_spec->h_dest[0]);
1521                 spec_l2->eth.ether_type = eth_spec->h_proto;
1522                 if (eth_spec->h_proto)
1523                         spec_l2->eth.ether_type_enable = 1;
1524                 break;
1525         case IP_USER_FLOW:
1526                 err = add_ip_rule(priv, cmd, rule_list_h);
1527                 break;
1528         case TCP_V4_FLOW:
1529                 err = add_tcp_udp_rule(priv, cmd, rule_list_h, TCP_V4_FLOW);
1530                 break;
1531         case UDP_V4_FLOW:
1532                 err = add_tcp_udp_rule(priv, cmd, rule_list_h, UDP_V4_FLOW);
1533                 break;
1534         }
1535
1536         return err;
1537 }
1538
1539 static int mlx4_en_flow_replace(struct net_device *dev,
1540                                 struct ethtool_rxnfc *cmd)
1541 {
1542         int err;
1543         struct mlx4_en_priv *priv = netdev_priv(dev);
1544         struct ethtool_flow_id *loc_rule;
1545         struct mlx4_spec_list *spec, *tmp_spec;
1546         u32 qpn;
1547         u64 reg_id;
1548
1549         struct mlx4_net_trans_rule rule = {
1550                 .queue_mode = MLX4_NET_TRANS_Q_FIFO,
1551                 .exclusive = 0,
1552                 .allow_loopback = 1,
1553                 .promisc_mode = MLX4_FS_REGULAR,
1554         };
1555
1556         rule.port = priv->port;
1557         rule.priority = MLX4_DOMAIN_ETHTOOL | cmd->fs.location;
1558         INIT_LIST_HEAD(&rule.list);
1559
1560         /* Allow direct QP attaches if the EN_ETHTOOL_QP_ATTACH flag is set */
1561         if (cmd->fs.ring_cookie == RX_CLS_FLOW_DISC)
1562                 qpn = priv->drop_qp.qpn;
1563         else if (cmd->fs.ring_cookie & EN_ETHTOOL_QP_ATTACH) {
1564                 qpn = cmd->fs.ring_cookie & (EN_ETHTOOL_QP_ATTACH - 1);
1565         } else {
1566                 if (cmd->fs.ring_cookie >= priv->rx_ring_num) {
1567                         en_warn(priv, "rxnfc: RX ring (%llu) doesn't exist\n",
1568                                 cmd->fs.ring_cookie);
1569                         return -EINVAL;
1570                 }
1571                 qpn = priv->rss_map.qps[cmd->fs.ring_cookie].qpn;
1572                 if (!qpn) {
1573                         en_warn(priv, "rxnfc: RX ring (%llu) is inactive\n",
1574                                 cmd->fs.ring_cookie);
1575                         return -EINVAL;
1576                 }
1577         }
1578         rule.qpn = qpn;
1579         err = mlx4_en_ethtool_to_net_trans_rule(dev, cmd, &rule.list);
1580         if (err)
1581                 goto out_free_list;
1582
1583         loc_rule = &priv->ethtool_rules[cmd->fs.location];
1584         if (loc_rule->id) {
1585                 err = mlx4_flow_detach(priv->mdev->dev, loc_rule->id);
1586                 if (err) {
1587                         en_err(priv, "Fail to detach network rule at location %d. registration id = %llx\n",
1588                                cmd->fs.location, loc_rule->id);
1589                         goto out_free_list;
1590                 }
1591                 loc_rule->id = 0;
1592                 memset(&loc_rule->flow_spec, 0,
1593                        sizeof(struct ethtool_rx_flow_spec));
1594                 list_del(&loc_rule->list);
1595         }
1596         err = mlx4_flow_attach(priv->mdev->dev, &rule, &reg_id);
1597         if (err) {
1598                 en_err(priv, "Fail to attach network rule at location %d\n",
1599                        cmd->fs.location);
1600                 goto out_free_list;
1601         }
1602         loc_rule->id = reg_id;
1603         memcpy(&loc_rule->flow_spec, &cmd->fs,
1604                sizeof(struct ethtool_rx_flow_spec));
1605         list_add_tail(&loc_rule->list, &priv->ethtool_list);
1606
1607 out_free_list:
1608         list_for_each_entry_safe(spec, tmp_spec, &rule.list, list) {
1609                 list_del(&spec->list);
1610                 kfree(spec);
1611         }
1612         return err;
1613 }
1614
1615 static int mlx4_en_flow_detach(struct net_device *dev,
1616                                struct ethtool_rxnfc *cmd)
1617 {
1618         int err = 0;
1619         struct ethtool_flow_id *rule;
1620         struct mlx4_en_priv *priv = netdev_priv(dev);
1621
1622         if (cmd->fs.location >= MAX_NUM_OF_FS_RULES)
1623                 return -EINVAL;
1624
1625         rule = &priv->ethtool_rules[cmd->fs.location];
1626         if (!rule->id) {
1627                 err =  -ENOENT;
1628                 goto out;
1629         }
1630
1631         err = mlx4_flow_detach(priv->mdev->dev, rule->id);
1632         if (err) {
1633                 en_err(priv, "Fail to detach network rule at location %d. registration id = 0x%llx\n",
1634                        cmd->fs.location, rule->id);
1635                 goto out;
1636         }
1637         rule->id = 0;
1638         memset(&rule->flow_spec, 0, sizeof(struct ethtool_rx_flow_spec));
1639         list_del(&rule->list);
1640 out:
1641         return err;
1642
1643 }
1644
1645 static int mlx4_en_get_flow(struct net_device *dev, struct ethtool_rxnfc *cmd,
1646                             int loc)
1647 {
1648         int err = 0;
1649         struct ethtool_flow_id *rule;
1650         struct mlx4_en_priv *priv = netdev_priv(dev);
1651
1652         if (loc < 0 || loc >= MAX_NUM_OF_FS_RULES)
1653                 return -EINVAL;
1654
1655         rule = &priv->ethtool_rules[loc];
1656         if (rule->id)
1657                 memcpy(&cmd->fs, &rule->flow_spec,
1658                        sizeof(struct ethtool_rx_flow_spec));
1659         else
1660                 err = -ENOENT;
1661
1662         return err;
1663 }
1664
1665 static int mlx4_en_get_num_flows(struct mlx4_en_priv *priv)
1666 {
1667
1668         int i, res = 0;
1669         for (i = 0; i < MAX_NUM_OF_FS_RULES; i++) {
1670                 if (priv->ethtool_rules[i].id)
1671                         res++;
1672         }
1673         return res;
1674
1675 }
1676
1677 static int mlx4_en_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
1678                              u32 *rule_locs)
1679 {
1680         struct mlx4_en_priv *priv = netdev_priv(dev);
1681         struct mlx4_en_dev *mdev = priv->mdev;
1682         int err = 0;
1683         int i = 0, priority = 0;
1684
1685         if ((cmd->cmd == ETHTOOL_GRXCLSRLCNT ||
1686              cmd->cmd == ETHTOOL_GRXCLSRULE ||
1687              cmd->cmd == ETHTOOL_GRXCLSRLALL) &&
1688             (mdev->dev->caps.steering_mode !=
1689              MLX4_STEERING_MODE_DEVICE_MANAGED || !priv->port_up))
1690                 return -EINVAL;
1691
1692         switch (cmd->cmd) {
1693         case ETHTOOL_GRXRINGS:
1694                 cmd->data = priv->rx_ring_num;
1695                 break;
1696         case ETHTOOL_GRXCLSRLCNT:
1697                 cmd->rule_cnt = mlx4_en_get_num_flows(priv);
1698                 break;
1699         case ETHTOOL_GRXCLSRULE:
1700                 err = mlx4_en_get_flow(dev, cmd, cmd->fs.location);
1701                 break;
1702         case ETHTOOL_GRXCLSRLALL:
1703                 while ((!err || err == -ENOENT) && priority < cmd->rule_cnt) {
1704                         err = mlx4_en_get_flow(dev, cmd, i);
1705                         if (!err)
1706                                 rule_locs[priority++] = i;
1707                         i++;
1708                 }
1709                 err = 0;
1710                 break;
1711         default:
1712                 err = -EOPNOTSUPP;
1713                 break;
1714         }
1715
1716         return err;
1717 }
1718
1719 static int mlx4_en_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
1720 {
1721         int err = 0;
1722         struct mlx4_en_priv *priv = netdev_priv(dev);
1723         struct mlx4_en_dev *mdev = priv->mdev;
1724
1725         if (mdev->dev->caps.steering_mode !=
1726             MLX4_STEERING_MODE_DEVICE_MANAGED || !priv->port_up)
1727                 return -EINVAL;
1728
1729         switch (cmd->cmd) {
1730         case ETHTOOL_SRXCLSRLINS:
1731                 err = mlx4_en_flow_replace(dev, cmd);
1732                 break;
1733         case ETHTOOL_SRXCLSRLDEL:
1734                 err = mlx4_en_flow_detach(dev, cmd);
1735                 break;
1736         default:
1737                 en_warn(priv, "Unsupported ethtool command. (%d)\n", cmd->cmd);
1738                 return -EINVAL;
1739         }
1740
1741         return err;
1742 }
1743
1744 static void mlx4_en_get_channels(struct net_device *dev,
1745                                  struct ethtool_channels *channel)
1746 {
1747         struct mlx4_en_priv *priv = netdev_priv(dev);
1748
1749         channel->max_rx = MAX_RX_RINGS;
1750         channel->max_tx = MLX4_EN_MAX_TX_RING_P_UP;
1751
1752         channel->rx_count = priv->rx_ring_num;
1753         channel->tx_count = priv->tx_ring_num[TX] / MLX4_EN_NUM_UP;
1754 }
1755
1756 static int mlx4_en_set_channels(struct net_device *dev,
1757                                 struct ethtool_channels *channel)
1758 {
1759         struct mlx4_en_priv *priv = netdev_priv(dev);
1760         struct mlx4_en_dev *mdev = priv->mdev;
1761         struct mlx4_en_port_profile new_prof;
1762         struct mlx4_en_priv *tmp;
1763         int port_up = 0;
1764         int xdp_count;
1765         int err = 0;
1766
1767         if (!channel->tx_count || !channel->rx_count)
1768                 return -EINVAL;
1769
1770         tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
1771         if (!tmp)
1772                 return -ENOMEM;
1773
1774         mutex_lock(&mdev->state_lock);
1775         xdp_count = priv->tx_ring_num[TX_XDP] ? channel->rx_count : 0;
1776         if (channel->tx_count * MLX4_EN_NUM_UP + xdp_count > MAX_TX_RINGS) {
1777                 err = -EINVAL;
1778                 en_err(priv,
1779                        "Total number of TX and XDP rings (%d) exceeds the maximum supported (%d)\n",
1780                        channel->tx_count * MLX4_EN_NUM_UP + xdp_count,
1781                        MAX_TX_RINGS);
1782                 goto out;
1783         }
1784
1785         memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));
1786         new_prof.num_tx_rings_p_up = channel->tx_count;
1787         new_prof.tx_ring_num[TX] = channel->tx_count * MLX4_EN_NUM_UP;
1788         new_prof.tx_ring_num[TX_XDP] = xdp_count;
1789         new_prof.rx_ring_num = channel->rx_count;
1790
1791         err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, true);
1792         if (err)
1793                 goto out;
1794
1795         if (priv->port_up) {
1796                 port_up = 1;
1797                 mlx4_en_stop_port(dev, 1);
1798         }
1799
1800         mlx4_en_safe_replace_resources(priv, tmp);
1801
1802         netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]);
1803         netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
1804
1805         if (netdev_get_num_tc(dev))
1806                 mlx4_en_setup_tc(dev, MLX4_EN_NUM_UP);
1807
1808         en_warn(priv, "Using %d TX rings\n", priv->tx_ring_num[TX]);
1809         en_warn(priv, "Using %d RX rings\n", priv->rx_ring_num);
1810
1811         if (port_up) {
1812                 err = mlx4_en_start_port(dev);
1813                 if (err)
1814                         en_err(priv, "Failed starting port\n");
1815         }
1816
1817         err = mlx4_en_moderation_update(priv);
1818 out:
1819         mutex_unlock(&mdev->state_lock);
1820         kfree(tmp);
1821         return err;
1822 }
1823
1824 static int mlx4_en_get_ts_info(struct net_device *dev,
1825                                struct ethtool_ts_info *info)
1826 {
1827         struct mlx4_en_priv *priv = netdev_priv(dev);
1828         struct mlx4_en_dev *mdev = priv->mdev;
1829         int ret;
1830
1831         ret = ethtool_op_get_ts_info(dev, info);
1832         if (ret)
1833                 return ret;
1834
1835         if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) {
1836                 info->so_timestamping |=
1837                         SOF_TIMESTAMPING_TX_HARDWARE |
1838                         SOF_TIMESTAMPING_RX_HARDWARE |
1839                         SOF_TIMESTAMPING_RAW_HARDWARE;
1840
1841                 info->tx_types =
1842                         (1 << HWTSTAMP_TX_OFF) |
1843                         (1 << HWTSTAMP_TX_ON);
1844
1845                 info->rx_filters =
1846                         (1 << HWTSTAMP_FILTER_NONE) |
1847                         (1 << HWTSTAMP_FILTER_ALL);
1848
1849                 if (mdev->ptp_clock)
1850                         info->phc_index = ptp_clock_index(mdev->ptp_clock);
1851         }
1852
1853         return ret;
1854 }
1855
1856 static int mlx4_en_set_priv_flags(struct net_device *dev, u32 flags)
1857 {
1858         struct mlx4_en_priv *priv = netdev_priv(dev);
1859         struct mlx4_en_dev *mdev = priv->mdev;
1860         bool bf_enabled_new = !!(flags & MLX4_EN_PRIV_FLAGS_BLUEFLAME);
1861         bool bf_enabled_old = !!(priv->pflags & MLX4_EN_PRIV_FLAGS_BLUEFLAME);
1862         bool phv_enabled_new = !!(flags & MLX4_EN_PRIV_FLAGS_PHV);
1863         bool phv_enabled_old = !!(priv->pflags & MLX4_EN_PRIV_FLAGS_PHV);
1864         int i;
1865         int ret = 0;
1866
1867         if (bf_enabled_new != bf_enabled_old) {
1868                 int t;
1869
1870                 if (bf_enabled_new) {
1871                         bool bf_supported = true;
1872
1873                         for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++)
1874                                 for (i = 0; i < priv->tx_ring_num[t]; i++)
1875                                         bf_supported &=
1876                                                 priv->tx_ring[t][i]->bf_alloced;
1877
1878                         if (!bf_supported) {
1879                                 en_err(priv, "BlueFlame is not supported\n");
1880                                 return -EINVAL;
1881                         }
1882
1883                         priv->pflags |= MLX4_EN_PRIV_FLAGS_BLUEFLAME;
1884                 } else {
1885                         priv->pflags &= ~MLX4_EN_PRIV_FLAGS_BLUEFLAME;
1886                 }
1887
1888                 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++)
1889                         for (i = 0; i < priv->tx_ring_num[t]; i++)
1890                                 priv->tx_ring[t][i]->bf_enabled =
1891                                         bf_enabled_new;
1892
1893                 en_info(priv, "BlueFlame %s\n",
1894                         bf_enabled_new ?  "Enabled" : "Disabled");
1895         }
1896
1897         if (phv_enabled_new != phv_enabled_old) {
1898                 ret = set_phv_bit(mdev->dev, priv->port, (int)phv_enabled_new);
1899                 if (ret)
1900                         return ret;
1901                 else if (phv_enabled_new)
1902                         priv->pflags |= MLX4_EN_PRIV_FLAGS_PHV;
1903                 else
1904                         priv->pflags &= ~MLX4_EN_PRIV_FLAGS_PHV;
1905                 en_info(priv, "PHV bit %s\n",
1906                         phv_enabled_new ?  "Enabled" : "Disabled");
1907         }
1908         return 0;
1909 }
1910
1911 static u32 mlx4_en_get_priv_flags(struct net_device *dev)
1912 {
1913         struct mlx4_en_priv *priv = netdev_priv(dev);
1914
1915         return priv->pflags;
1916 }
1917
1918 static int mlx4_en_get_tunable(struct net_device *dev,
1919                                const struct ethtool_tunable *tuna,
1920                                void *data)
1921 {
1922         const struct mlx4_en_priv *priv = netdev_priv(dev);
1923         int ret = 0;
1924
1925         switch (tuna->id) {
1926         case ETHTOOL_TX_COPYBREAK:
1927                 *(u32 *)data = priv->prof->inline_thold;
1928                 break;
1929         default:
1930                 ret = -EINVAL;
1931                 break;
1932         }
1933
1934         return ret;
1935 }
1936
1937 static int mlx4_en_set_tunable(struct net_device *dev,
1938                                const struct ethtool_tunable *tuna,
1939                                const void *data)
1940 {
1941         struct mlx4_en_priv *priv = netdev_priv(dev);
1942         int val, ret = 0;
1943
1944         switch (tuna->id) {
1945         case ETHTOOL_TX_COPYBREAK:
1946                 val = *(u32 *)data;
1947                 if (val < MIN_PKT_LEN || val > MAX_INLINE)
1948                         ret = -EINVAL;
1949                 else
1950                         priv->prof->inline_thold = val;
1951                 break;
1952         default:
1953                 ret = -EINVAL;
1954                 break;
1955         }
1956
1957         return ret;
1958 }
1959
1960 static int mlx4_en_get_module_info(struct net_device *dev,
1961                                    struct ethtool_modinfo *modinfo)
1962 {
1963         struct mlx4_en_priv *priv = netdev_priv(dev);
1964         struct mlx4_en_dev *mdev = priv->mdev;
1965         int ret;
1966         u8 data[4];
1967
1968         /* Read first 2 bytes to get Module & REV ID */
1969         ret = mlx4_get_module_info(mdev->dev, priv->port,
1970                                    0/*offset*/, 2/*size*/, data);
1971         if (ret < 2)
1972                 return -EIO;
1973
1974         switch (data[0] /* identifier */) {
1975         case MLX4_MODULE_ID_QSFP:
1976                 modinfo->type = ETH_MODULE_SFF_8436;
1977                 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1978                 break;
1979         case MLX4_MODULE_ID_QSFP_PLUS:
1980                 if (data[1] >= 0x3) { /* revision id */
1981                         modinfo->type = ETH_MODULE_SFF_8636;
1982                         modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
1983                 } else {
1984                         modinfo->type = ETH_MODULE_SFF_8436;
1985                         modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1986                 }
1987                 break;
1988         case MLX4_MODULE_ID_QSFP28:
1989                 modinfo->type = ETH_MODULE_SFF_8636;
1990                 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
1991                 break;
1992         case MLX4_MODULE_ID_SFP:
1993                 modinfo->type = ETH_MODULE_SFF_8472;
1994                 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1995                 break;
1996         default:
1997                 return -EINVAL;
1998         }
1999
2000         return 0;
2001 }
2002
2003 static int mlx4_en_get_module_eeprom(struct net_device *dev,
2004                                      struct ethtool_eeprom *ee,
2005                                      u8 *data)
2006 {
2007         struct mlx4_en_priv *priv = netdev_priv(dev);
2008         struct mlx4_en_dev *mdev = priv->mdev;
2009         int offset = ee->offset;
2010         int i = 0, ret;
2011
2012         if (ee->len == 0)
2013                 return -EINVAL;
2014
2015         memset(data, 0, ee->len);
2016
2017         while (i < ee->len) {
2018                 en_dbg(DRV, priv,
2019                        "mlx4_get_module_info i(%d) offset(%d) len(%d)\n",
2020                        i, offset, ee->len - i);
2021
2022                 ret = mlx4_get_module_info(mdev->dev, priv->port,
2023                                            offset, ee->len - i, data + i);
2024
2025                 if (!ret) /* Done reading */
2026                         return 0;
2027
2028                 if (ret < 0) {
2029                         en_err(priv,
2030                                "mlx4_get_module_info i(%d) offset(%d) bytes_to_read(%d) - FAILED (0x%x)\n",
2031                                i, offset, ee->len - i, ret);
2032                         return 0;
2033                 }
2034
2035                 i += ret;
2036                 offset += ret;
2037         }
2038         return 0;
2039 }
2040
2041 static int mlx4_en_set_phys_id(struct net_device *dev,
2042                                enum ethtool_phys_id_state state)
2043 {
2044         int err;
2045         u16 beacon_duration;
2046         struct mlx4_en_priv *priv = netdev_priv(dev);
2047         struct mlx4_en_dev *mdev = priv->mdev;
2048
2049         if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PORT_BEACON))
2050                 return -EOPNOTSUPP;
2051
2052         switch (state) {
2053         case ETHTOOL_ID_ACTIVE:
2054                 beacon_duration = PORT_BEACON_MAX_LIMIT;
2055                 break;
2056         case ETHTOOL_ID_INACTIVE:
2057                 beacon_duration = 0;
2058                 break;
2059         default:
2060                 return -EOPNOTSUPP;
2061         }
2062
2063         err = mlx4_SET_PORT_BEACON(mdev->dev, priv->port, beacon_duration);
2064         return err;
2065 }
2066
2067 const struct ethtool_ops mlx4_en_ethtool_ops = {
2068         .get_drvinfo = mlx4_en_get_drvinfo,
2069         .get_link_ksettings = mlx4_en_get_link_ksettings,
2070         .set_link_ksettings = mlx4_en_set_link_ksettings,
2071         .get_link = ethtool_op_get_link,
2072         .get_strings = mlx4_en_get_strings,
2073         .get_sset_count = mlx4_en_get_sset_count,
2074         .get_ethtool_stats = mlx4_en_get_ethtool_stats,
2075         .self_test = mlx4_en_self_test,
2076         .set_phys_id = mlx4_en_set_phys_id,
2077         .get_wol = mlx4_en_get_wol,
2078         .set_wol = mlx4_en_set_wol,
2079         .get_msglevel = mlx4_en_get_msglevel,
2080         .set_msglevel = mlx4_en_set_msglevel,
2081         .get_coalesce = mlx4_en_get_coalesce,
2082         .set_coalesce = mlx4_en_set_coalesce,
2083         .get_pauseparam = mlx4_en_get_pauseparam,
2084         .set_pauseparam = mlx4_en_set_pauseparam,
2085         .get_ringparam = mlx4_en_get_ringparam,
2086         .set_ringparam = mlx4_en_set_ringparam,
2087         .get_rxnfc = mlx4_en_get_rxnfc,
2088         .set_rxnfc = mlx4_en_set_rxnfc,
2089         .get_rxfh_indir_size = mlx4_en_get_rxfh_indir_size,
2090         .get_rxfh_key_size = mlx4_en_get_rxfh_key_size,
2091         .get_rxfh = mlx4_en_get_rxfh,
2092         .set_rxfh = mlx4_en_set_rxfh,
2093         .get_channels = mlx4_en_get_channels,
2094         .set_channels = mlx4_en_set_channels,
2095         .get_ts_info = mlx4_en_get_ts_info,
2096         .set_priv_flags = mlx4_en_set_priv_flags,
2097         .get_priv_flags = mlx4_en_get_priv_flags,
2098         .get_tunable            = mlx4_en_get_tunable,
2099         .set_tunable            = mlx4_en_set_tunable,
2100         .get_module_info = mlx4_en_get_module_info,
2101         .get_module_eeprom = mlx4_en_get_module_eeprom
2102 };
2103
2104
2105
2106
2107