drivers/net/ethernet/korina.c

   1 /*
   2  *  Driver for the IDT RC32434 (Korina) on-chip ethernet controller.
   3  *
   4  *  Copyright 2004 IDT Inc. (rischelp@idt.com)
   5  *  Copyright 2006 Felix Fietkau <nbd@openwrt.org>
   6  *  Copyright 2008 Florian Fainelli <florian@openwrt.org>
   7  *  Copyright 2017 Roman Yeryomin <roman@advem.lv>
   8  *
   9  *  This program is free software; you can redistribute  it and/or modify it
  10  *  under  the terms of  the GNU General  Public License as published by the
  11  *  Free Software Foundation;  either version 2 of the  License, or (at your
  12  *  option) any later version.
  13  *
  14  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
  15  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  16  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  17  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
  18  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  19  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  20  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  21  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  22  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  23  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  24  *
  25  *  You should have received a copy of the  GNU General Public License along
  26  *  with this program; if not, write  to the Free Software Foundation, Inc.,
  27  *  675 Mass Ave, Cambridge, MA 02139, USA.
  28  *
  29  *  Writing to a DMA status register:
  30  *
  31  *  When writing to the status register, you should mask the bit you have
  32  *  been testing the status register with. Both Tx and Rx DMA registers
  33  *  should stick to this procedure.
  34  */
  35
  36 #include <linux/module.h>
  37 #include <linux/kernel.h>
  38 #include <linux/moduleparam.h>
  39 #include <linux/sched.h>
  40 #include <linux/ctype.h>
  41 #include <linux/types.h>
  42 #include <linux/interrupt.h>
  43 #include <linux/ioport.h>
  44 #include <linux/in.h>
  45 #include <linux/slab.h>
  46 #include <linux/string.h>
  47 #include <linux/delay.h>
  48 #include <linux/netdevice.h>
  49 #include <linux/etherdevice.h>
  50 #include <linux/skbuff.h>
  51 #include <linux/errno.h>
  52 #include <linux/platform_device.h>
  53 #include <linux/mii.h>
  54 #include <linux/ethtool.h>
  55 #include <linux/crc32.h>
  56
  57 #include <asm/bootinfo.h>
  58 #include <asm/bitops.h>
  59 #include <asm/pgtable.h>
  60 #include <asm/io.h>
  61 #include <asm/dma.h>
  62
  63 #include <asm/mach-rc32434/rb.h>
  64 #include <asm/mach-rc32434/rc32434.h>
  65 #include <asm/mach-rc32434/eth.h>
  66 #include <asm/mach-rc32434/dma_v.h>
  67
  68 #define DRV_NAME        "korina"
  69 #define DRV_VERSION     "0.20"
  70 #define DRV_RELDATE     "15Sep2017"
  71
  72 #define STATION_ADDRESS_HIGH(dev) (((dev)->dev_addr[0] << 8) | \
  73                                    ((dev)->dev_addr[1]))
  74 #define STATION_ADDRESS_LOW(dev)  (((dev)->dev_addr[2] << 24) | \
  75                                    ((dev)->dev_addr[3] << 16) | \
  76                                    ((dev)->dev_addr[4] << 8)  | \
  77                                    ((dev)->dev_addr[5]))
  78
  79 #define MII_CLOCK       1250000 /* no more than 2.5MHz */
  80
  81 /* the following must be powers of two */
  82 #define KORINA_NUM_RDS  64  /* number of receive descriptors */
  83 #define KORINA_NUM_TDS  64  /* number of transmit descriptors */
  84
  85 /* KORINA_RBSIZE is the hardware's default maximum receive
  86  * frame size in bytes. Having this hardcoded means that there
  87  * is no support for MTU sizes greater than 1500. */
  88 #define KORINA_RBSIZE   1536 /* size of one resource buffer = Ether MTU */
  89 #define KORINA_RDS_MASK (KORINA_NUM_RDS - 1)
  90 #define KORINA_TDS_MASK (KORINA_NUM_TDS - 1)
  91 #define RD_RING_SIZE    (KORINA_NUM_RDS * sizeof(struct dma_desc))
  92 #define TD_RING_SIZE    (KORINA_NUM_TDS * sizeof(struct dma_desc))
  93
  94 #define TX_TIMEOUT      (6000 * HZ / 1000)
  95
  96 enum chain_status {
  97         desc_filled,
  98         desc_empty
  99 };
 100
 101 #define IS_DMA_FINISHED(X)      (((X) & (DMA_DESC_FINI)) != 0)
 102 #define IS_DMA_DONE(X)          (((X) & (DMA_DESC_DONE)) != 0)
 103 #define RCVPKT_LENGTH(X)        (((X) & ETH_RX_LEN) >> ETH_RX_LEN_BIT)
 104
 105 /* Information that need to be kept for each board. */
 106 struct korina_private {
 107         struct eth_regs *eth_regs;
 108         struct dma_reg *rx_dma_regs;
 109         struct dma_reg *tx_dma_regs;
 110         struct dma_desc *td_ring; /* transmit descriptor ring */
 111         struct dma_desc *rd_ring; /* receive descriptor ring  */
 112
 113         struct sk_buff *tx_skb[KORINA_NUM_TDS];
 114         struct sk_buff *rx_skb[KORINA_NUM_RDS];
 115
 116         int rx_next_done;
 117         int rx_chain_head;
 118         int rx_chain_tail;
 119         enum chain_status rx_chain_status;
 120
 121         int tx_next_done;
 122         int tx_chain_head;
 123         int tx_chain_tail;
 124         enum chain_status tx_chain_status;
 125         int tx_count;
 126         int tx_full;
 127
 128         int rx_irq;
 129         int tx_irq;
 130
 131         spinlock_t lock;        /* NIC xmit lock */
 132
 133         int dma_halt_cnt;
 134         int dma_run_cnt;
 135         struct napi_struct napi;
 136         struct timer_list media_check_timer;
 137         struct mii_if_info mii_if;
 138         struct work_struct restart_task;
 139         struct net_device *dev;
 140         int phy_addr;
 141 };
 142
 143 extern unsigned int idt_cpu_freq;
 144
 145 static inline void korina_start_dma(struct dma_reg *ch, u32 dma_addr)
 146 {
 147         writel(0, &ch->dmandptr);
 148         writel(dma_addr, &ch->dmadptr);
 149 }
 150
 151 static inline void korina_abort_dma(struct net_device *dev,
 152                                         struct dma_reg *ch)
 153 {
 154         if (readl(&ch->dmac) & DMA_CHAN_RUN_BIT) {
 155                 writel(0x10, &ch->dmac);
 156
 157                 while (!(readl(&ch->dmas) & DMA_STAT_HALT))
 158                         netif_trans_update(dev);
 159
 160                 writel(0, &ch->dmas);
 161         }
 162
 163         writel(0, &ch->dmadptr);
 164         writel(0, &ch->dmandptr);
 165 }
 166
 167 static inline void korina_chain_dma(struct dma_reg *ch, u32 dma_addr)
 168 {
 169         writel(dma_addr, &ch->dmandptr);
 170 }
 171
 172 static void korina_abort_tx(struct net_device *dev)
 173 {
 174         struct korina_private *lp = netdev_priv(dev);
 175
 176         korina_abort_dma(dev, lp->tx_dma_regs);
 177 }
 178
 179 static void korina_abort_rx(struct net_device *dev)
 180 {
 181         struct korina_private *lp = netdev_priv(dev);
 182
 183         korina_abort_dma(dev, lp->rx_dma_regs);
 184 }
 185
 186 static void korina_start_rx(struct korina_private *lp,
 187                                         struct dma_desc *rd)
 188 {
 189         korina_start_dma(lp->rx_dma_regs, CPHYSADDR(rd));
 190 }
 191
 192 static void korina_chain_rx(struct korina_private *lp,
 193                                         struct dma_desc *rd)
 194 {
 195         korina_chain_dma(lp->rx_dma_regs, CPHYSADDR(rd));
 196 }
 197
 198 /* transmit packet */
 199 static int korina_send_packet(struct sk_buff *skb, struct net_device *dev)
 200 {
 201         struct korina_private *lp = netdev_priv(dev);
 202         unsigned long flags;
 203         u32 length;
 204         u32 chain_prev, chain_next;
 205         struct dma_desc *td;
 206
 207         spin_lock_irqsave(&lp->lock, flags);
 208
 209         td = &lp->td_ring[lp->tx_chain_tail];
 210
 211         /* stop queue when full, drop pkts if queue already full */
 212         if (lp->tx_count >= (KORINA_NUM_TDS - 2)) {
 213                 lp->tx_full = 1;
 214
 215                 if (lp->tx_count == (KORINA_NUM_TDS - 2))
 216                         netif_stop_queue(dev);
 217                 else {
 218                         dev->stats.tx_dropped++;
 219                         dev_kfree_skb_any(skb);
 220                         spin_unlock_irqrestore(&lp->lock, flags);
 221
 222                         return NETDEV_TX_BUSY;
 223                 }
 224         }
 225
 226         lp->tx_count++;
 227
 228         lp->tx_skb[lp->tx_chain_tail] = skb;
 229
 230         length = skb->len;
 231         dma_cache_wback((u32)skb->data, skb->len);
 232
 233         /* Setup the transmit descriptor. */
 234         dma_cache_inv((u32) td, sizeof(*td));
 235         td->ca = CPHYSADDR(skb->data);
 236         chain_prev = (lp->tx_chain_tail - 1) & KORINA_TDS_MASK;
 237         chain_next = (lp->tx_chain_tail + 1) & KORINA_TDS_MASK;
 238
 239         if (readl(&(lp->tx_dma_regs->dmandptr)) == 0) {
 240                 if (lp->tx_chain_status == desc_empty) {
 241                         /* Update tail */
 242                         td->control = DMA_COUNT(length) |
 243                                         DMA_DESC_COF | DMA_DESC_IOF;
 244                         /* Move tail */
 245                         lp->tx_chain_tail = chain_next;
 246                         /* Write to NDPTR */
 247                         writel(CPHYSADDR(&lp->td_ring[lp->tx_chain_head]),
 248                                         &lp->tx_dma_regs->dmandptr);
 249                         /* Move head to tail */
 250                         lp->tx_chain_head = lp->tx_chain_tail;
 251                 } else {
 252                         /* Update tail */
 253                         td->control = DMA_COUNT(length) |
 254                                         DMA_DESC_COF | DMA_DESC_IOF;
 255                         /* Link to prev */
 256                         lp->td_ring[chain_prev].control &=
 257                                         ~DMA_DESC_COF;
 258                         /* Link to prev */
 259                         lp->td_ring[chain_prev].link =  CPHYSADDR(td);
 260                         /* Move tail */
 261                         lp->tx_chain_tail = chain_next;
 262                         /* Write to NDPTR */
 263                         writel(CPHYSADDR(&lp->td_ring[lp->tx_chain_head]),
 264                                         &(lp->tx_dma_regs->dmandptr));
 265                         /* Move head to tail */
 266                         lp->tx_chain_head = lp->tx_chain_tail;
 267                         lp->tx_chain_status = desc_empty;
 268                 }
 269         } else {
 270                 if (lp->tx_chain_status == desc_empty) {
 271                         /* Update tail */
 272                         td->control = DMA_COUNT(length) |
 273                                         DMA_DESC_COF | DMA_DESC_IOF;
 274                         /* Move tail */
 275                         lp->tx_chain_tail = chain_next;
 276                         lp->tx_chain_status = desc_filled;
 277                 } else {
 278                         /* Update tail */
 279                         td->control = DMA_COUNT(length) |
 280                                         DMA_DESC_COF | DMA_DESC_IOF;
 281                         lp->td_ring[chain_prev].control &=
 282                                         ~DMA_DESC_COF;
 283                         lp->td_ring[chain_prev].link =  CPHYSADDR(td);
 284                         lp->tx_chain_tail = chain_next;
 285                 }
 286         }
 287         dma_cache_wback((u32) td, sizeof(*td));
 288
 289         netif_trans_update(dev);
 290         spin_unlock_irqrestore(&lp->lock, flags);
 291
 292         return NETDEV_TX_OK;
 293 }
 294
 295 static int mdio_read(struct net_device *dev, int mii_id, int reg)
 296 {
 297         struct korina_private *lp = netdev_priv(dev);
 298         int ret;
 299
 300         mii_id = ((lp->rx_irq == 0x2c ? 1 : 0) << 8);
 301
 302         writel(0, &lp->eth_regs->miimcfg);
 303         writel(0, &lp->eth_regs->miimcmd);
 304         writel(mii_id | reg, &lp->eth_regs->miimaddr);
 305         writel(ETH_MII_CMD_SCN, &lp->eth_regs->miimcmd);
 306
 307         ret = (int)(readl(&lp->eth_regs->miimrdd));
 308         return ret;
 309 }
 310
 311 static void mdio_write(struct net_device *dev, int mii_id, int reg, int val)
 312 {
 313         struct korina_private *lp = netdev_priv(dev);
 314
 315         mii_id = ((lp->rx_irq == 0x2c ? 1 : 0) << 8);
 316
 317         writel(0, &lp->eth_regs->miimcfg);
 318         writel(1, &lp->eth_regs->miimcmd);
 319         writel(mii_id | reg, &lp->eth_regs->miimaddr);
 320         writel(ETH_MII_CMD_SCN, &lp->eth_regs->miimcmd);
 321         writel(val, &lp->eth_regs->miimwtd);
 322 }
 323
 324 /* Ethernet Rx DMA interrupt */
 325 static irqreturn_t korina_rx_dma_interrupt(int irq, void *dev_id)
 326 {
 327         struct net_device *dev = dev_id;
 328         struct korina_private *lp = netdev_priv(dev);
 329         u32 dmas, dmasm;
 330         irqreturn_t retval;
 331
 332         dmas = readl(&lp->rx_dma_regs->dmas);
 333         if (dmas & (DMA_STAT_DONE | DMA_STAT_HALT | DMA_STAT_ERR)) {
 334                 dmasm = readl(&lp->rx_dma_regs->dmasm);
 335                 writel(dmasm | (DMA_STAT_DONE |
 336                                 DMA_STAT_HALT | DMA_STAT_ERR),
 337                                 &lp->rx_dma_regs->dmasm);
 338
 339                 napi_schedule(&lp->napi);
 340
 341                 if (dmas & DMA_STAT_ERR)
 342                         printk(KERN_ERR "%s: DMA error\n", dev->name);
 343
 344                 retval = IRQ_HANDLED;
 345         } else
 346                 retval = IRQ_NONE;
 347
 348         return retval;
 349 }
 350
 351 static int korina_rx(struct net_device *dev, int limit)
 352 {
 353         struct korina_private *lp = netdev_priv(dev);
 354         struct dma_desc *rd = &lp->rd_ring[lp->rx_next_done];
 355         struct sk_buff *skb, *skb_new;
 356         u8 *pkt_buf;
 357         u32 devcs, pkt_len, dmas;
 358         int count;
 359
 360         dma_cache_inv((u32)rd, sizeof(*rd));
 361
 362         for (count = 0; count < limit; count++) {
 363                 skb = lp->rx_skb[lp->rx_next_done];
 364                 skb_new = NULL;
 365
 366                 devcs = rd->devcs;
 367
 368                 if ((KORINA_RBSIZE - (u32)DMA_COUNT(rd->control)) == 0)
 369                         break;
 370
 371                 /* check that this is a whole packet
 372                  * WARNING: DMA_FD bit incorrectly set
 373                  * in Rc32434 (errata ref #077) */
 374                 if (!(devcs & ETH_RX_LD))
 375                         goto next;
 376
 377                 if (!(devcs & ETH_RX_ROK)) {
 378                         /* Update statistics counters */
 379                         dev->stats.rx_errors++;
 380                         dev->stats.rx_dropped++;
 381                         if (devcs & ETH_RX_CRC)
 382                                 dev->stats.rx_crc_errors++;
 383                         if (devcs & ETH_RX_LE)
 384                                 dev->stats.rx_length_errors++;
 385                         if (devcs & ETH_RX_OVR)
 386                                 dev->stats.rx_fifo_errors++;
 387                         if (devcs & ETH_RX_CV)
 388                                 dev->stats.rx_frame_errors++;
 389                         if (devcs & ETH_RX_CES)
 390                                 dev->stats.rx_frame_errors++;
 391
 392                         goto next;
 393                 }
 394
 395                 pkt_len = RCVPKT_LENGTH(devcs);
 396
 397                 /* must be the (first and) last
 398                  * descriptor then */
 399                 pkt_buf = (u8 *)lp->rx_skb[lp->rx_next_done]->data;
 400
 401                 /* invalidate the cache */
 402                 dma_cache_inv((unsigned long)pkt_buf, pkt_len - 4);
 403
 404                 /* Malloc up new buffer. */
 405                 skb_new = netdev_alloc_skb_ip_align(dev, KORINA_RBSIZE);
 406
 407                 if (!skb_new)
 408                         break;
 409                 /* Do not count the CRC */
 410                 skb_put(skb, pkt_len - 4);
 411                 skb->protocol = eth_type_trans(skb, dev);
 412
 413                 /* Pass the packet to upper layers */
 414                 napi_gro_receive(&lp->napi, skb);
 415                 dev->stats.rx_packets++;
 416                 dev->stats.rx_bytes += pkt_len;
 417
 418                 /* Update the mcast stats */
 419                 if (devcs & ETH_RX_MP)
 420                         dev->stats.multicast++;
 421
 422                 lp->rx_skb[lp->rx_next_done] = skb_new;
 423
 424 next:
 425                 rd->devcs = 0;
 426
 427                 /* Restore descriptor's curr_addr */
 428                 if (skb_new)
 429                         rd->ca = CPHYSADDR(skb_new->data);
 430                 else
 431                         rd->ca = CPHYSADDR(skb->data);
 432
 433                 rd->control = DMA_COUNT(KORINA_RBSIZE) |
 434                         DMA_DESC_COD | DMA_DESC_IOD;
 435                 lp->rd_ring[(lp->rx_next_done - 1) &
 436                         KORINA_RDS_MASK].control &=
 437                         ~DMA_DESC_COD;
 438
 439                 lp->rx_next_done = (lp->rx_next_done + 1) & KORINA_RDS_MASK;
 440                 dma_cache_wback((u32)rd, sizeof(*rd));
 441                 rd = &lp->rd_ring[lp->rx_next_done];
 442                 writel(~DMA_STAT_DONE, &lp->rx_dma_regs->dmas);
 443         }
 444
 445         dmas = readl(&lp->rx_dma_regs->dmas);
 446
 447         if (dmas & DMA_STAT_HALT) {
 448                 writel(~(DMA_STAT_HALT | DMA_STAT_ERR),
 449                                 &lp->rx_dma_regs->dmas);
 450
 451                 lp->dma_halt_cnt++;
 452                 rd->devcs = 0;
 453                 skb = lp->rx_skb[lp->rx_next_done];
 454                 rd->ca = CPHYSADDR(skb->data);
 455                 dma_cache_wback((u32)rd, sizeof(*rd));
 456                 korina_chain_rx(lp, rd);
 457         }
 458
 459         return count;
 460 }
 461
 462 static int korina_poll(struct napi_struct *napi, int budget)
 463 {
 464         struct korina_private *lp =
 465                 container_of(napi, struct korina_private, napi);
 466         struct net_device *dev = lp->dev;
 467         int work_done;
 468
 469         work_done = korina_rx(dev, budget);
 470         if (work_done < budget) {
 471                 napi_complete_done(napi, work_done);
 472
 473                 writel(readl(&lp->rx_dma_regs->dmasm) &
 474                         ~(DMA_STAT_DONE | DMA_STAT_HALT | DMA_STAT_ERR),
 475                         &lp->rx_dma_regs->dmasm);
 476         }
 477         return work_done;
 478 }
 479
 480 /*
 481  * Set or clear the multicast filter for this adaptor.
 482  */
 483 static void korina_multicast_list(struct net_device *dev)
 484 {
 485         struct korina_private *lp = netdev_priv(dev);
 486         unsigned long flags;
 487         struct netdev_hw_addr *ha;
 488         u32 recognise = ETH_ARC_AB;     /* always accept broadcasts */
 489
 490         /* Set promiscuous mode */
 491         if (dev->flags & IFF_PROMISC)
 492                 recognise |= ETH_ARC_PRO;
 493
 494         else if ((dev->flags & IFF_ALLMULTI) || (netdev_mc_count(dev) > 4))
 495                 /* All multicast and broadcast */
 496                 recognise |= ETH_ARC_AM;
 497
 498         /* Build the hash table */
 499         if (netdev_mc_count(dev) > 4) {
 500                 u16 hash_table[4] = { 0 };
 501                 u32 crc;
 502
 503                 netdev_for_each_mc_addr(ha, dev) {
 504                         crc = ether_crc_le(6, ha->addr);
 505                         crc >>= 26;
 506                         hash_table[crc >> 4] |= 1 << (15 - (crc & 0xf));
 507                 }
 508                 /* Accept filtered multicast */
 509                 recognise |= ETH_ARC_AFM;
 510
 511                 /* Fill the MAC hash tables with their values */
 512                 writel((u32)(hash_table[1] << 16 | hash_table[0]),
 513                                         &lp->eth_regs->ethhash0);
 514                 writel((u32)(hash_table[3] << 16 | hash_table[2]),
 515                                         &lp->eth_regs->ethhash1);
 516         }
 517
 518         spin_lock_irqsave(&lp->lock, flags);
 519         writel(recognise, &lp->eth_regs->etharc);
 520         spin_unlock_irqrestore(&lp->lock, flags);
 521 }
 522
 523 static void korina_tx(struct net_device *dev)
 524 {
 525         struct korina_private *lp = netdev_priv(dev);
 526         struct dma_desc *td = &lp->td_ring[lp->tx_next_done];
 527         u32 devcs;
 528         u32 dmas;
 529
 530         spin_lock(&lp->lock);
 531
 532         /* Process all desc that are done */
 533         while (IS_DMA_FINISHED(td->control)) {
 534                 if (lp->tx_full == 1) {
 535                         netif_wake_queue(dev);
 536                         lp->tx_full = 0;
 537                 }
 538
 539                 devcs = lp->td_ring[lp->tx_next_done].devcs;
 540                 if ((devcs & (ETH_TX_FD | ETH_TX_LD)) !=
 541                                 (ETH_TX_FD | ETH_TX_LD)) {
 542                         dev->stats.tx_errors++;
 543                         dev->stats.tx_dropped++;
 544
 545                         /* Should never happen */
 546                         printk(KERN_ERR "%s: split tx ignored\n",
 547                                                         dev->name);
 548                 } else if (devcs & ETH_TX_TOK) {
 549                         dev->stats.tx_packets++;
 550                         dev->stats.tx_bytes +=
 551                                         lp->tx_skb[lp->tx_next_done]->len;
 552                 } else {
 553                         dev->stats.tx_errors++;
 554                         dev->stats.tx_dropped++;
 555
 556                         /* Underflow */
 557                         if (devcs & ETH_TX_UND)
 558                                 dev->stats.tx_fifo_errors++;
 559
 560                         /* Oversized frame */
 561                         if (devcs & ETH_TX_OF)
 562                                 dev->stats.tx_aborted_errors++;
 563
 564                         /* Excessive deferrals */
 565                         if (devcs & ETH_TX_ED)
 566                                 dev->stats.tx_carrier_errors++;
 567
 568                         /* Collisions: medium busy */
 569                         if (devcs & ETH_TX_EC)
 570                                 dev->stats.collisions++;
 571
 572                         /* Late collision */
 573                         if (devcs & ETH_TX_LC)
 574                                 dev->stats.tx_window_errors++;
 575                 }
 576
 577                 /* We must always free the original skb */
 578                 if (lp->tx_skb[lp->tx_next_done]) {
 579                         dev_kfree_skb_any(lp->tx_skb[lp->tx_next_done]);
 580                         lp->tx_skb[lp->tx_next_done] = NULL;
 581                 }
 582
 583                 lp->td_ring[lp->tx_next_done].control = DMA_DESC_IOF;
 584                 lp->td_ring[lp->tx_next_done].devcs = ETH_TX_FD | ETH_TX_LD;
 585                 lp->td_ring[lp->tx_next_done].link = 0;
 586                 lp->td_ring[lp->tx_next_done].ca = 0;
 587                 lp->tx_count--;
 588
 589                 /* Go on to next transmission */
 590                 lp->tx_next_done = (lp->tx_next_done + 1) & KORINA_TDS_MASK;
 591                 td = &lp->td_ring[lp->tx_next_done];
 592
 593         }
 594
 595         /* Clear the DMA status register */
 596         dmas = readl(&lp->tx_dma_regs->dmas);
 597         writel(~dmas, &lp->tx_dma_regs->dmas);
 598
 599         writel(readl(&lp->tx_dma_regs->dmasm) &
 600                         ~(DMA_STAT_FINI | DMA_STAT_ERR),
 601                         &lp->tx_dma_regs->dmasm);
 602
 603         spin_unlock(&lp->lock);
 604 }
 605
 606 static irqreturn_t
 607 korina_tx_dma_interrupt(int irq, void *dev_id)
 608 {
 609         struct net_device *dev = dev_id;
 610         struct korina_private *lp = netdev_priv(dev);
 611         u32 dmas, dmasm;
 612         irqreturn_t retval;
 613
 614         dmas = readl(&lp->tx_dma_regs->dmas);
 615
 616         if (dmas & (DMA_STAT_FINI | DMA_STAT_ERR)) {
 617                 dmasm = readl(&lp->tx_dma_regs->dmasm);
 618                 writel(dmasm | (DMA_STAT_FINI | DMA_STAT_ERR),
 619                                 &lp->tx_dma_regs->dmasm);
 620
 621                 korina_tx(dev);
 622
 623                 if (lp->tx_chain_status == desc_filled &&
 624                         (readl(&(lp->tx_dma_regs->dmandptr)) == 0)) {
 625                         writel(CPHYSADDR(&lp->td_ring[lp->tx_chain_head]),
 626                                 &(lp->tx_dma_regs->dmandptr));
 627                         lp->tx_chain_status = desc_empty;
 628                         lp->tx_chain_head = lp->tx_chain_tail;
 629                         netif_trans_update(dev);
 630                 }
 631                 if (dmas & DMA_STAT_ERR)
 632                         printk(KERN_ERR "%s: DMA error\n", dev->name);
 633
 634                 retval = IRQ_HANDLED;
 635         } else
 636                 retval = IRQ_NONE;
 637
 638         return retval;
 639 }
 640
 641
 642 static void korina_check_media(struct net_device *dev, unsigned int init_media)
 643 {
 644         struct korina_private *lp = netdev_priv(dev);
 645
 646         mii_check_media(&lp->mii_if, 0, init_media);
 647
 648         if (lp->mii_if.full_duplex)
 649                 writel(readl(&lp->eth_regs->ethmac2) | ETH_MAC2_FD,
 650                                                 &lp->eth_regs->ethmac2);
 651         else
 652                 writel(readl(&lp->eth_regs->ethmac2) & ~ETH_MAC2_FD,
 653                                                 &lp->eth_regs->ethmac2);
 654 }
 655
 656 static void korina_poll_media(struct timer_list *t)
 657 {
 658         struct korina_private *lp = from_timer(lp, t, media_check_timer);
 659         struct net_device *dev = lp->dev;
 660
 661         korina_check_media(dev, 0);
 662         mod_timer(&lp->media_check_timer, jiffies + HZ);
 663 }
 664
 665 static void korina_set_carrier(struct mii_if_info *mii)
 666 {
 667         if (mii->force_media) {
 668                 /* autoneg is off: Link is always assumed to be up */
 669                 if (!netif_carrier_ok(mii->dev))
 670                         netif_carrier_on(mii->dev);
 671         } else  /* Let MMI library update carrier status */
 672                 korina_check_media(mii->dev, 0);
 673 }
 674
 675 static int korina_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
 676 {
 677         struct korina_private *lp = netdev_priv(dev);
 678         struct mii_ioctl_data *data = if_mii(rq);
 679         int rc;
 680
 681         if (!netif_running(dev))
 682                 return -EINVAL;
 683         spin_lock_irq(&lp->lock);
 684         rc = generic_mii_ioctl(&lp->mii_if, data, cmd, NULL);
 685         spin_unlock_irq(&lp->lock);
 686         korina_set_carrier(&lp->mii_if);
 687
 688         return rc;
 689 }
 690
 691 /* ethtool helpers */
 692 static void netdev_get_drvinfo(struct net_device *dev,
 693                                 struct ethtool_drvinfo *info)
 694 {
 695         struct korina_private *lp = netdev_priv(dev);
 696
 697         strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
 698         strlcpy(info->version, DRV_VERSION, sizeof(info->version));
 699         strlcpy(info->bus_info, lp->dev->name, sizeof(info->bus_info));
 700 }
 701
 702 static int netdev_get_link_ksettings(struct net_device *dev,
 703                                      struct ethtool_link_ksettings *cmd)
 704 {
 705         struct korina_private *lp = netdev_priv(dev);
 706
 707         spin_lock_irq(&lp->lock);
 708         mii_ethtool_get_link_ksettings(&lp->mii_if, cmd);
 709         spin_unlock_irq(&lp->lock);
 710
 711         return 0;
 712 }
 713
 714 static int netdev_set_link_ksettings(struct net_device *dev,
 715                                      const struct ethtool_link_ksettings *cmd)
 716 {
 717         struct korina_private *lp = netdev_priv(dev);
 718         int rc;
 719
 720         spin_lock_irq(&lp->lock);
 721         rc = mii_ethtool_set_link_ksettings(&lp->mii_if, cmd);
 722         spin_unlock_irq(&lp->lock);
 723         korina_set_carrier(&lp->mii_if);
 724
 725         return rc;
 726 }
 727
 728 static u32 netdev_get_link(struct net_device *dev)
 729 {
 730         struct korina_private *lp = netdev_priv(dev);
 731
 732         return mii_link_ok(&lp->mii_if);
 733 }
 734
 735 static const struct ethtool_ops netdev_ethtool_ops = {
 736         .get_drvinfo            = netdev_get_drvinfo,
 737         .get_link               = netdev_get_link,
 738         .get_link_ksettings     = netdev_get_link_ksettings,
 739         .set_link_ksettings     = netdev_set_link_ksettings,
 740 };
 741
 742 static int korina_alloc_ring(struct net_device *dev)
 743 {
 744         struct korina_private *lp = netdev_priv(dev);
 745         struct sk_buff *skb;
 746         int i;
 747
 748         /* Initialize the transmit descriptors */
 749         for (i = 0; i < KORINA_NUM_TDS; i++) {
 750                 lp->td_ring[i].control = DMA_DESC_IOF;
 751                 lp->td_ring[i].devcs = ETH_TX_FD | ETH_TX_LD;
 752                 lp->td_ring[i].ca = 0;
 753                 lp->td_ring[i].link = 0;
 754         }
 755         lp->tx_next_done = lp->tx_chain_head = lp->tx_chain_tail =
 756                         lp->tx_full = lp->tx_count = 0;
 757         lp->tx_chain_status = desc_empty;
 758
 759         /* Initialize the receive descriptors */
 760         for (i = 0; i < KORINA_NUM_RDS; i++) {
 761                 skb = netdev_alloc_skb_ip_align(dev, KORINA_RBSIZE);
 762                 if (!skb)
 763                         return -ENOMEM;
 764                 lp->rx_skb[i] = skb;
 765                 lp->rd_ring[i].control = DMA_DESC_IOD |
 766                                 DMA_COUNT(KORINA_RBSIZE);
 767                 lp->rd_ring[i].devcs = 0;
 768                 lp->rd_ring[i].ca = CPHYSADDR(skb->data);
 769                 lp->rd_ring[i].link = CPHYSADDR(&lp->rd_ring[i+1]);
 770         }
 771
 772         /* loop back receive descriptors, so the last
 773          * descriptor points to the first one */
 774         lp->rd_ring[i - 1].link = CPHYSADDR(&lp->rd_ring[0]);
 775         lp->rd_ring[i - 1].control |= DMA_DESC_COD;
 776
 777         lp->rx_next_done  = 0;
 778         lp->rx_chain_head = 0;
 779         lp->rx_chain_tail = 0;
 780         lp->rx_chain_status = desc_empty;
 781
 782         return 0;
 783 }
 784
 785 static void korina_free_ring(struct net_device *dev)
 786 {
 787         struct korina_private *lp = netdev_priv(dev);
 788         int i;
 789
 790         for (i = 0; i < KORINA_NUM_RDS; i++) {
 791                 lp->rd_ring[i].control = 0;
 792                 if (lp->rx_skb[i])
 793                         dev_kfree_skb_any(lp->rx_skb[i]);
 794                 lp->rx_skb[i] = NULL;
 795         }
 796
 797         for (i = 0; i < KORINA_NUM_TDS; i++) {
 798                 lp->td_ring[i].control = 0;
 799                 if (lp->tx_skb[i])
 800                         dev_kfree_skb_any(lp->tx_skb[i]);
 801                 lp->tx_skb[i] = NULL;
 802         }
 803 }
 804
 805 /*
 806  * Initialize the RC32434 ethernet controller.
 807  */
 808 static int korina_init(struct net_device *dev)
 809 {
 810         struct korina_private *lp = netdev_priv(dev);
 811
 812         /* Disable DMA */
 813         korina_abort_tx(dev);
 814         korina_abort_rx(dev);
 815
 816         /* reset ethernet logic */
 817         writel(0, &lp->eth_regs->ethintfc);
 818         while ((readl(&lp->eth_regs->ethintfc) & ETH_INT_FC_RIP))
 819                 netif_trans_update(dev);
 820
 821         /* Enable Ethernet Interface */
 822         writel(ETH_INT_FC_EN, &lp->eth_regs->ethintfc);
 823
 824         /* Allocate rings */
 825         if (korina_alloc_ring(dev)) {
 826                 printk(KERN_ERR "%s: descriptor allocation failed\n", dev->name);
 827                 korina_free_ring(dev);
 828                 return -ENOMEM;
 829         }
 830
 831         writel(0, &lp->rx_dma_regs->dmas);
 832         /* Start Rx DMA */
 833         korina_start_rx(lp, &lp->rd_ring[0]);
 834
 835         writel(readl(&lp->tx_dma_regs->dmasm) &
 836                         ~(DMA_STAT_FINI | DMA_STAT_ERR),
 837                         &lp->tx_dma_regs->dmasm);
 838         writel(readl(&lp->rx_dma_regs->dmasm) &
 839                         ~(DMA_STAT_DONE | DMA_STAT_HALT | DMA_STAT_ERR),
 840                         &lp->rx_dma_regs->dmasm);
 841
 842         /* Accept only packets destined for this Ethernet device address */
 843         writel(ETH_ARC_AB, &lp->eth_regs->etharc);
 844
 845         /* Set all Ether station address registers to their initial values */
 846         writel(STATION_ADDRESS_LOW(dev), &lp->eth_regs->ethsal0);
 847         writel(STATION_ADDRESS_HIGH(dev), &lp->eth_regs->ethsah0);
 848
 849         writel(STATION_ADDRESS_LOW(dev), &lp->eth_regs->ethsal1);
 850         writel(STATION_ADDRESS_HIGH(dev), &lp->eth_regs->ethsah1);
 851
 852         writel(STATION_ADDRESS_LOW(dev), &lp->eth_regs->ethsal2);
 853         writel(STATION_ADDRESS_HIGH(dev), &lp->eth_regs->ethsah2);
 854
 855         writel(STATION_ADDRESS_LOW(dev), &lp->eth_regs->ethsal3);
 856         writel(STATION_ADDRESS_HIGH(dev), &lp->eth_regs->ethsah3);
 857
 858
 859         /* Frame Length Checking, Pad Enable, CRC Enable, Full Duplex set */
 860         writel(ETH_MAC2_PE | ETH_MAC2_CEN | ETH_MAC2_FD,
 861                         &lp->eth_regs->ethmac2);
 862
 863         /* Back to back inter-packet-gap */
 864         writel(0x15, &lp->eth_regs->ethipgt);
 865         /* Non - Back to back inter-packet-gap */
 866         writel(0x12, &lp->eth_regs->ethipgr);
 867
 868         /* Management Clock Prescaler Divisor
 869          * Clock independent setting */
 870         writel(((idt_cpu_freq) / MII_CLOCK + 1) & ~1,
 871                         &lp->eth_regs->ethmcp);
 872
 873         /* don't transmit until fifo contains 48b */
 874         writel(48, &lp->eth_regs->ethfifott);
 875
 876         writel(ETH_MAC1_RE, &lp->eth_regs->ethmac1);
 877
 878         napi_enable(&lp->napi);
 879         netif_start_queue(dev);
 880
 881         return 0;
 882 }
 883
 884 /*
 885  * Restart the RC32434 ethernet controller.
 886  */
 887 static void korina_restart_task(struct work_struct *work)
 888 {
 889         struct korina_private *lp = container_of(work,
 890                         struct korina_private, restart_task);
 891         struct net_device *dev = lp->dev;
 892
 893         /*
 894          * Disable interrupts
 895          */
 896         disable_irq(lp->rx_irq);
 897         disable_irq(lp->tx_irq);
 898
 899         writel(readl(&lp->tx_dma_regs->dmasm) |
 900                                 DMA_STAT_FINI | DMA_STAT_ERR,
 901                                 &lp->tx_dma_regs->dmasm);
 902         writel(readl(&lp->rx_dma_regs->dmasm) |
 903                                 DMA_STAT_DONE | DMA_STAT_HALT | DMA_STAT_ERR,
 904                                 &lp->rx_dma_regs->dmasm);
 905
 906         napi_disable(&lp->napi);
 907
 908         korina_free_ring(dev);
 909
 910         if (korina_init(dev) < 0) {
 911                 printk(KERN_ERR "%s: cannot restart device\n", dev->name);
 912                 return;
 913         }
 914         korina_multicast_list(dev);
 915
 916         enable_irq(lp->tx_irq);
 917         enable_irq(lp->rx_irq);
 918 }
 919
 920 static void korina_tx_timeout(struct net_device *dev)
 921 {
 922         struct korina_private *lp = netdev_priv(dev);
 923
 924         schedule_work(&lp->restart_task);
 925 }
 926
 927 #ifdef CONFIG_NET_POLL_CONTROLLER
 928 static void korina_poll_controller(struct net_device *dev)
 929 {
 930         disable_irq(dev->irq);
 931         korina_tx_dma_interrupt(dev->irq, dev);
 932         enable_irq(dev->irq);
 933 }
 934 #endif
 935
 936 static int korina_open(struct net_device *dev)
 937 {
 938         struct korina_private *lp = netdev_priv(dev);
 939         int ret;
 940
 941         /* Initialize */
 942         ret = korina_init(dev);
 943         if (ret < 0) {
 944                 printk(KERN_ERR "%s: cannot open device\n", dev->name);
 945                 goto out;
 946         }
 947
 948         /* Install the interrupt handler
 949          * that handles the Done Finished */
 950         ret = request_irq(lp->rx_irq, korina_rx_dma_interrupt,
 951                         0, "Korina ethernet Rx", dev);
 952         if (ret < 0) {
 953                 printk(KERN_ERR "%s: unable to get Rx DMA IRQ %d\n",
 954                         dev->name, lp->rx_irq);
 955                 goto err_release;
 956         }
 957         ret = request_irq(lp->tx_irq, korina_tx_dma_interrupt,
 958                         0, "Korina ethernet Tx", dev);
 959         if (ret < 0) {
 960                 printk(KERN_ERR "%s: unable to get Tx DMA IRQ %d\n",
 961                         dev->name, lp->tx_irq);
 962                 goto err_free_rx_irq;
 963         }
 964
 965         mod_timer(&lp->media_check_timer, jiffies + 1);
 966 out:
 967         return ret;
 968
 969 err_free_rx_irq:
 970         free_irq(lp->rx_irq, dev);
 971 err_release:
 972         korina_free_ring(dev);
 973         goto out;
 974 }
 975
 976 static int korina_close(struct net_device *dev)
 977 {
 978         struct korina_private *lp = netdev_priv(dev);
 979         u32 tmp;
 980
 981         del_timer(&lp->media_check_timer);
 982
 983         /* Disable interrupts */
 984         disable_irq(lp->rx_irq);
 985         disable_irq(lp->tx_irq);
 986
 987         korina_abort_tx(dev);
 988         tmp = readl(&lp->tx_dma_regs->dmasm);
 989         tmp = tmp | DMA_STAT_FINI | DMA_STAT_ERR;
 990         writel(tmp, &lp->tx_dma_regs->dmasm);
 991
 992         korina_abort_rx(dev);
 993         tmp = readl(&lp->rx_dma_regs->dmasm);
 994         tmp = tmp | DMA_STAT_DONE | DMA_STAT_HALT | DMA_STAT_ERR;
 995         writel(tmp, &lp->rx_dma_regs->dmasm);
 996
 997         napi_disable(&lp->napi);
 998
 999         cancel_work_sync(&lp->restart_task);
1000
1001         korina_free_ring(dev);
1002
1003         free_irq(lp->rx_irq, dev);
1004         free_irq(lp->tx_irq, dev);
1005
1006         return 0;
1007 }
1008
1009 static const struct net_device_ops korina_netdev_ops = {
1010         .ndo_open               = korina_open,
1011         .ndo_stop               = korina_close,
1012         .ndo_start_xmit         = korina_send_packet,
1013         .ndo_set_rx_mode        = korina_multicast_list,
1014         .ndo_tx_timeout         = korina_tx_timeout,
1015         .ndo_do_ioctl           = korina_ioctl,
1016         .ndo_validate_addr      = eth_validate_addr,
1017         .ndo_set_mac_address    = eth_mac_addr,
1018 #ifdef CONFIG_NET_POLL_CONTROLLER
1019         .ndo_poll_controller    = korina_poll_controller,
1020 #endif
1021 };
1022
1023 static int korina_probe(struct platform_device *pdev)
1024 {
1025         struct korina_device *bif = platform_get_drvdata(pdev);
1026         struct korina_private *lp;
1027         struct net_device *dev;
1028         struct resource *r;
1029         int rc;
1030
1031         dev = alloc_etherdev(sizeof(struct korina_private));
1032         if (!dev)
1033                 return -ENOMEM;
1034
1035         SET_NETDEV_DEV(dev, &pdev->dev);
1036         lp = netdev_priv(dev);
1037
1038         bif->dev = dev;
1039         memcpy(dev->dev_addr, bif->mac, ETH_ALEN);
1040
1041         lp->rx_irq = platform_get_irq_byname(pdev, "korina_rx");
1042         lp->tx_irq = platform_get_irq_byname(pdev, "korina_tx");
1043
1044         r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "korina_regs");
1045         dev->base_addr = r->start;
1046         lp->eth_regs = ioremap_nocache(r->start, resource_size(r));
1047         if (!lp->eth_regs) {
1048                 printk(KERN_ERR DRV_NAME ": cannot remap registers\n");
1049                 rc = -ENXIO;
1050                 goto probe_err_out;
1051         }
1052
1053         r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "korina_dma_rx");
1054         lp->rx_dma_regs = ioremap_nocache(r->start, resource_size(r));
1055         if (!lp->rx_dma_regs) {
1056                 printk(KERN_ERR DRV_NAME ": cannot remap Rx DMA registers\n");
1057                 rc = -ENXIO;
1058                 goto probe_err_dma_rx;
1059         }
1060
1061         r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "korina_dma_tx");
1062         lp->tx_dma_regs = ioremap_nocache(r->start, resource_size(r));
1063         if (!lp->tx_dma_regs) {
1064                 printk(KERN_ERR DRV_NAME ": cannot remap Tx DMA registers\n");
1065                 rc = -ENXIO;
1066                 goto probe_err_dma_tx;
1067         }
1068
1069         lp->td_ring = kmalloc(TD_RING_SIZE + RD_RING_SIZE, GFP_KERNEL);
1070         if (!lp->td_ring) {
1071                 rc = -ENXIO;
1072                 goto probe_err_td_ring;
1073         }
1074
1075         dma_cache_inv((unsigned long)(lp->td_ring),
1076                         TD_RING_SIZE + RD_RING_SIZE);
1077
1078         /* now convert TD_RING pointer to KSEG1 */
1079         lp->td_ring = (struct dma_desc *)KSEG1ADDR(lp->td_ring);
1080         lp->rd_ring = &lp->td_ring[KORINA_NUM_TDS];
1081
1082         spin_lock_init(&lp->lock);
1083         /* just use the rx dma irq */
1084         dev->irq = lp->rx_irq;
1085         lp->dev = dev;
1086
1087         dev->netdev_ops = &korina_netdev_ops;
1088         dev->ethtool_ops = &netdev_ethtool_ops;
1089         dev->watchdog_timeo = TX_TIMEOUT;
1090         netif_napi_add(dev, &lp->napi, korina_poll, NAPI_POLL_WEIGHT);
1091
1092         lp->phy_addr = (((lp->rx_irq == 0x2c? 1:0) << 8) | 0x05);
1093         lp->mii_if.dev = dev;
1094         lp->mii_if.mdio_read = mdio_read;
1095         lp->mii_if.mdio_write = mdio_write;
1096         lp->mii_if.phy_id = lp->phy_addr;
1097         lp->mii_if.phy_id_mask = 0x1f;
1098         lp->mii_if.reg_num_mask = 0x1f;
1099
1100         rc = register_netdev(dev);
1101         if (rc < 0) {
1102                 printk(KERN_ERR DRV_NAME
1103                         ": cannot register net device: %d\n", rc);
1104                 goto probe_err_register;
1105         }
1106         timer_setup(&lp->media_check_timer, korina_poll_media, 0);
1107
1108         INIT_WORK(&lp->restart_task, korina_restart_task);
1109
1110         printk(KERN_INFO "%s: " DRV_NAME "-" DRV_VERSION " " DRV_RELDATE "\n",
1111                         dev->name);
1112 out:
1113         return rc;
1114
1115 probe_err_register:
1116         kfree(lp->td_ring);
1117 probe_err_td_ring:
1118         iounmap(lp->tx_dma_regs);
1119 probe_err_dma_tx:
1120         iounmap(lp->rx_dma_regs);
1121 probe_err_dma_rx:
1122         iounmap(lp->eth_regs);
1123 probe_err_out:
1124         free_netdev(dev);
1125         goto out;
1126 }
1127
1128 static int korina_remove(struct platform_device *pdev)
1129 {
1130         struct korina_device *bif = platform_get_drvdata(pdev);
1131         struct korina_private *lp = netdev_priv(bif->dev);
1132
1133         iounmap(lp->eth_regs);
1134         iounmap(lp->rx_dma_regs);
1135         iounmap(lp->tx_dma_regs);
1136
1137         unregister_netdev(bif->dev);
1138         free_netdev(bif->dev);
1139
1140         return 0;
1141 }
1142
1143 static struct platform_driver korina_driver = {
1144         .driver.name = "korina",
1145         .probe = korina_probe,
1146         .remove = korina_remove,
1147 };
1148
1149 module_platform_driver(korina_driver);
1150
1151 MODULE_AUTHOR("Philip Rischel <rischelp@idt.com>");
1152 MODULE_AUTHOR("Felix Fietkau <nbd@openwrt.org>");
1153 MODULE_AUTHOR("Florian Fainelli <florian@openwrt.org>");
1154 MODULE_AUTHOR("Roman Yeryomin <roman@advem.lv>");
1155 MODULE_DESCRIPTION("IDT RC32434 (Korina) Ethernet driver");
1156 MODULE_LICENSE("GPL");