drivers/net/ethernet/intel/ixgbe/ixgbe_main.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2016 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   Linux NICS <linux.nics@intel.com>
  24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27 *******************************************************************************/
  28
  29 #include <linux/types.h>
  30 #include <linux/module.h>
  31 #include <linux/pci.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/string.h>
  35 #include <linux/in.h>
  36 #include <linux/interrupt.h>
  37 #include <linux/ip.h>
  38 #include <linux/tcp.h>
  39 #include <linux/sctp.h>
  40 #include <linux/pkt_sched.h>
  41 #include <linux/ipv6.h>
  42 #include <linux/slab.h>
  43 #include <net/checksum.h>
  44 #include <net/ip6_checksum.h>
  45 #include <linux/etherdevice.h>
  46 #include <linux/ethtool.h>
  47 #include <linux/if.h>
  48 #include <linux/if_vlan.h>
  49 #include <linux/if_macvlan.h>
  50 #include <linux/if_bridge.h>
  51 #include <linux/prefetch.h>
  52 #include <linux/bpf.h>
  53 #include <linux/bpf_trace.h>
  54 #include <linux/atomic.h>
  55 #include <scsi/fc/fc_fcoe.h>
  56 #include <net/udp_tunnel.h>
  57 #include <net/pkt_cls.h>
  58 #include <net/tc_act/tc_gact.h>
  59 #include <net/tc_act/tc_mirred.h>
  60 #include <net/vxlan.h>
  61 #include <net/mpls.h>
  62
  63 #include "ixgbe.h"
  64 #include "ixgbe_common.h"
  65 #include "ixgbe_dcb_82599.h"
  66 #include "ixgbe_sriov.h"
  67 #include "ixgbe_model.h"
  68
  69 char ixgbe_driver_name[] = "ixgbe";
  70 static const char ixgbe_driver_string[] =
  71                               "Intel(R) 10 Gigabit PCI Express Network Driver";
  72 #ifdef IXGBE_FCOE
  73 char ixgbe_default_device_descr[] =
  74                               "Intel(R) 10 Gigabit Network Connection";
  75 #else
  76 static char ixgbe_default_device_descr[] =
  77                               "Intel(R) 10 Gigabit Network Connection";
  78 #endif
  79 #define DRV_VERSION "5.1.0-k"
  80 const char ixgbe_driver_version[] = DRV_VERSION;
  81 static const char ixgbe_copyright[] =
  82                                 "Copyright (c) 1999-2016 Intel Corporation.";
  83
  84 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
  85
  86 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  87         [board_82598]           = &ixgbe_82598_info,
  88         [board_82599]           = &ixgbe_82599_info,
  89         [board_X540]            = &ixgbe_X540_info,
  90         [board_X550]            = &ixgbe_X550_info,
  91         [board_X550EM_x]        = &ixgbe_X550EM_x_info,
  92         [board_x550em_x_fw]     = &ixgbe_x550em_x_fw_info,
  93         [board_x550em_a]        = &ixgbe_x550em_a_info,
  94         [board_x550em_a_fw]     = &ixgbe_x550em_a_fw_info,
  95 };
  96
  97 /* ixgbe_pci_tbl - PCI Device ID Table
  98  *
  99  * Wildcard entries (PCI_ANY_ID) should come last
 100  * Last entry must be all 0s
 101  *
 102  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
 103  *   Class, Class Mask, private data (not used) }
 104  */
 105 static const struct pci_device_id ixgbe_pci_tbl[] = {
 106         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
 107         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
 108         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
 109         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
 110         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
 111         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
 112         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
 113         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
 114         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
 115         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
 116         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
 117         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
 118         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
 119         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
 120         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
 121         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
 122         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
 123         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
 124         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
 125         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
 126         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
 127         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
 128         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
 129         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
 130         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
 131         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
 132         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
 133         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
 134         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
 135         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
 136         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
 137         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T1), board_X550},
 138         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
 139         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_XFI), board_X550EM_x},
 140         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
 141         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
 142         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), board_X550EM_x},
 143         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_1G_T), board_x550em_x_fw},
 144         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR), board_x550em_a },
 145         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR_L), board_x550em_a },
 146         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP_N), board_x550em_a },
 147         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII), board_x550em_a },
 148         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII_L), board_x550em_a },
 149         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_10G_T), board_x550em_a},
 150         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP), board_x550em_a },
 151         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T), board_x550em_a_fw },
 152         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T_L), board_x550em_a_fw },
 153         /* required last entry */
 154         {0, }
 155 };
 156 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
 157
 158 #ifdef CONFIG_IXGBE_DCA
 159 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
 160                             void *p);
 161 static struct notifier_block dca_notifier = {
 162         .notifier_call = ixgbe_notify_dca,
 163         .next          = NULL,
 164         .priority      = 0
 165 };
 166 #endif
 167
 168 #ifdef CONFIG_PCI_IOV
 169 static unsigned int max_vfs;
 170 module_param(max_vfs, uint, 0);
 171 MODULE_PARM_DESC(max_vfs,
 172                  "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
 173 #endif /* CONFIG_PCI_IOV */
 174
 175 static unsigned int allow_unsupported_sfp;
 176 module_param(allow_unsupported_sfp, uint, 0);
 177 MODULE_PARM_DESC(allow_unsupported_sfp,
 178                  "Allow unsupported and untested SFP+ modules on 82599-based adapters");
 179
 180 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 181 static int debug = -1;
 182 module_param(debug, int, 0);
 183 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 184
 185 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
 186 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
 187 MODULE_LICENSE("GPL");
 188 MODULE_VERSION(DRV_VERSION);
 189
 190 static struct workqueue_struct *ixgbe_wq;
 191
 192 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
 193 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *);
 194
 195 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
 196                                           u32 reg, u16 *value)
 197 {
 198         struct pci_dev *parent_dev;
 199         struct pci_bus *parent_bus;
 200
 201         parent_bus = adapter->pdev->bus->parent;
 202         if (!parent_bus)
 203                 return -1;
 204
 205         parent_dev = parent_bus->self;
 206         if (!parent_dev)
 207                 return -1;
 208
 209         if (!pci_is_pcie(parent_dev))
 210                 return -1;
 211
 212         pcie_capability_read_word(parent_dev, reg, value);
 213         if (*value == IXGBE_FAILED_READ_CFG_WORD &&
 214             ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
 215                 return -1;
 216         return 0;
 217 }
 218
 219 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
 220 {
 221         struct ixgbe_hw *hw = &adapter->hw;
 222         u16 link_status = 0;
 223         int err;
 224
 225         hw->bus.type = ixgbe_bus_type_pci_express;
 226
 227         /* Get the negotiated link width and speed from PCI config space of the
 228          * parent, as this device is behind a switch
 229          */
 230         err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
 231
 232         /* assume caller will handle error case */
 233         if (err)
 234                 return err;
 235
 236         hw->bus.width = ixgbe_convert_bus_width(link_status);
 237         hw->bus.speed = ixgbe_convert_bus_speed(link_status);
 238
 239         return 0;
 240 }
 241
 242 /**
 243  * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
 244  * @hw: hw specific details
 245  *
 246  * This function is used by probe to determine whether a device's PCI-Express
 247  * bandwidth details should be gathered from the parent bus instead of from the
 248  * device. Used to ensure that various locations all have the correct device ID
 249  * checks.
 250  */
 251 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
 252 {
 253         switch (hw->device_id) {
 254         case IXGBE_DEV_ID_82599_SFP_SF_QP:
 255         case IXGBE_DEV_ID_82599_QSFP_SF_QP:
 256                 return true;
 257         default:
 258                 return false;
 259         }
 260 }
 261
 262 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
 263                                      int expected_gts)
 264 {
 265         struct ixgbe_hw *hw = &adapter->hw;
 266         int max_gts = 0;
 267         enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;
 268         enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
 269         struct pci_dev *pdev;
 270
 271         /* Some devices are not connected over PCIe and thus do not negotiate
 272          * speed. These devices do not have valid bus info, and thus any report
 273          * we generate may not be correct.
 274          */
 275         if (hw->bus.type == ixgbe_bus_type_internal)
 276                 return;
 277
 278         /* determine whether to use the parent device */
 279         if (ixgbe_pcie_from_parent(&adapter->hw))
 280                 pdev = adapter->pdev->bus->parent->self;
 281         else
 282                 pdev = adapter->pdev;
 283
 284         if (pcie_get_minimum_link(pdev, &speed, &width) ||
 285             speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {
 286                 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
 287                 return;
 288         }
 289
 290         switch (speed) {
 291         case PCIE_SPEED_2_5GT:
 292                 /* 8b/10b encoding reduces max throughput by 20% */
 293                 max_gts = 2 * width;
 294                 break;
 295         case PCIE_SPEED_5_0GT:
 296                 /* 8b/10b encoding reduces max throughput by 20% */
 297                 max_gts = 4 * width;
 298                 break;
 299         case PCIE_SPEED_8_0GT:
 300                 /* 128b/130b encoding reduces throughput by less than 2% */
 301                 max_gts = 8 * width;
 302                 break;
 303         default:
 304                 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
 305                 return;
 306         }
 307
 308         e_dev_info("PCI Express bandwidth of %dGT/s available\n",
 309                    max_gts);
 310         e_dev_info("(Speed:%s, Width: x%d, Encoding Loss:%s)\n",
 311                    (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" :
 312                     speed == PCIE_SPEED_5_0GT ? "5.0GT/s" :
 313                     speed == PCIE_SPEED_2_5GT ? "2.5GT/s" :
 314                     "Unknown"),
 315                    width,
 316                    (speed == PCIE_SPEED_2_5GT ? "20%" :
 317                     speed == PCIE_SPEED_5_0GT ? "20%" :
 318                     speed == PCIE_SPEED_8_0GT ? "<2%" :
 319                     "Unknown"));
 320
 321         if (max_gts < expected_gts) {
 322                 e_dev_warn("This is not sufficient for optimal performance of this card.\n");
 323                 e_dev_warn("For optimal performance, at least %dGT/s of bandwidth is required.\n",
 324                         expected_gts);
 325                 e_dev_warn("A slot with more lanes and/or higher speed is suggested.\n");
 326         }
 327 }
 328
 329 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
 330 {
 331         if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
 332             !test_bit(__IXGBE_REMOVING, &adapter->state) &&
 333             !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
 334                 queue_work(ixgbe_wq, &adapter->service_task);
 335 }
 336
 337 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
 338 {
 339         struct ixgbe_adapter *adapter = hw->back;
 340
 341         if (!hw->hw_addr)
 342                 return;
 343         hw->hw_addr = NULL;
 344         e_dev_err("Adapter removed\n");
 345         if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
 346                 ixgbe_service_event_schedule(adapter);
 347 }
 348
 349 static void ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
 350 {
 351         u32 value;
 352
 353         /* The following check not only optimizes a bit by not
 354          * performing a read on the status register when the
 355          * register just read was a status register read that
 356          * returned IXGBE_FAILED_READ_REG. It also blocks any
 357          * potential recursion.
 358          */
 359         if (reg == IXGBE_STATUS) {
 360                 ixgbe_remove_adapter(hw);
 361                 return;
 362         }
 363         value = ixgbe_read_reg(hw, IXGBE_STATUS);
 364         if (value == IXGBE_FAILED_READ_REG)
 365                 ixgbe_remove_adapter(hw);
 366 }
 367
 368 /**
 369  * ixgbe_read_reg - Read from device register
 370  * @hw: hw specific details
 371  * @reg: offset of register to read
 372  *
 373  * Returns : value read or IXGBE_FAILED_READ_REG if removed
 374  *
 375  * This function is used to read device registers. It checks for device
 376  * removal by confirming any read that returns all ones by checking the
 377  * status register value for all ones. This function avoids reading from
 378  * the hardware if a removal was previously detected in which case it
 379  * returns IXGBE_FAILED_READ_REG (all ones).
 380  */
 381 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
 382 {
 383         u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr);
 384         u32 value;
 385
 386         if (ixgbe_removed(reg_addr))
 387                 return IXGBE_FAILED_READ_REG;
 388         if (unlikely(hw->phy.nw_mng_if_sel &
 389                      IXGBE_NW_MNG_IF_SEL_SGMII_ENABLE)) {
 390                 struct ixgbe_adapter *adapter;
 391                 int i;
 392
 393                 for (i = 0; i < 200; ++i) {
 394                         value = readl(reg_addr + IXGBE_MAC_SGMII_BUSY);
 395                         if (likely(!value))
 396                                 goto writes_completed;
 397                         if (value == IXGBE_FAILED_READ_REG) {
 398                                 ixgbe_remove_adapter(hw);
 399                                 return IXGBE_FAILED_READ_REG;
 400                         }
 401                         udelay(5);
 402                 }
 403
 404                 adapter = hw->back;
 405                 e_warn(hw, "register writes incomplete %08x\n", value);
 406         }
 407
 408 writes_completed:
 409         value = readl(reg_addr + reg);
 410         if (unlikely(value == IXGBE_FAILED_READ_REG))
 411                 ixgbe_check_remove(hw, reg);
 412         return value;
 413 }
 414
 415 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
 416 {
 417         u16 value;
 418
 419         pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
 420         if (value == IXGBE_FAILED_READ_CFG_WORD) {
 421                 ixgbe_remove_adapter(hw);
 422                 return true;
 423         }
 424         return false;
 425 }
 426
 427 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
 428 {
 429         struct ixgbe_adapter *adapter = hw->back;
 430         u16 value;
 431
 432         if (ixgbe_removed(hw->hw_addr))
 433                 return IXGBE_FAILED_READ_CFG_WORD;
 434         pci_read_config_word(adapter->pdev, reg, &value);
 435         if (value == IXGBE_FAILED_READ_CFG_WORD &&
 436             ixgbe_check_cfg_remove(hw, adapter->pdev))
 437                 return IXGBE_FAILED_READ_CFG_WORD;
 438         return value;
 439 }
 440
 441 #ifdef CONFIG_PCI_IOV
 442 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
 443 {
 444         struct ixgbe_adapter *adapter = hw->back;
 445         u32 value;
 446
 447         if (ixgbe_removed(hw->hw_addr))
 448                 return IXGBE_FAILED_READ_CFG_DWORD;
 449         pci_read_config_dword(adapter->pdev, reg, &value);
 450         if (value == IXGBE_FAILED_READ_CFG_DWORD &&
 451             ixgbe_check_cfg_remove(hw, adapter->pdev))
 452                 return IXGBE_FAILED_READ_CFG_DWORD;
 453         return value;
 454 }
 455 #endif /* CONFIG_PCI_IOV */
 456
 457 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
 458 {
 459         struct ixgbe_adapter *adapter = hw->back;
 460
 461         if (ixgbe_removed(hw->hw_addr))
 462                 return;
 463         pci_write_config_word(adapter->pdev, reg, value);
 464 }
 465
 466 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
 467 {
 468         BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
 469
 470         /* flush memory to make sure state is correct before next watchdog */
 471         smp_mb__before_atomic();
 472         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
 473 }
 474
 475 struct ixgbe_reg_info {
 476         u32 ofs;
 477         char *name;
 478 };
 479
 480 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
 481
 482         /* General Registers */
 483         {IXGBE_CTRL, "CTRL"},
 484         {IXGBE_STATUS, "STATUS"},
 485         {IXGBE_CTRL_EXT, "CTRL_EXT"},
 486
 487         /* Interrupt Registers */
 488         {IXGBE_EICR, "EICR"},
 489
 490         /* RX Registers */
 491         {IXGBE_SRRCTL(0), "SRRCTL"},
 492         {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
 493         {IXGBE_RDLEN(0), "RDLEN"},
 494         {IXGBE_RDH(0), "RDH"},
 495         {IXGBE_RDT(0), "RDT"},
 496         {IXGBE_RXDCTL(0), "RXDCTL"},
 497         {IXGBE_RDBAL(0), "RDBAL"},
 498         {IXGBE_RDBAH(0), "RDBAH"},
 499
 500         /* TX Registers */
 501         {IXGBE_TDBAL(0), "TDBAL"},
 502         {IXGBE_TDBAH(0), "TDBAH"},
 503         {IXGBE_TDLEN(0), "TDLEN"},
 504         {IXGBE_TDH(0), "TDH"},
 505         {IXGBE_TDT(0), "TDT"},
 506         {IXGBE_TXDCTL(0), "TXDCTL"},
 507
 508         /* List Terminator */
 509         { .name = NULL }
 510 };
 511
 512
 513 /*
 514  * ixgbe_regdump - register printout routine
 515  */
 516 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
 517 {
 518         int i;
 519         char rname[16];
 520         u32 regs[64];
 521
 522         switch (reginfo->ofs) {
 523         case IXGBE_SRRCTL(0):
 524                 for (i = 0; i < 64; i++)
 525                         regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 526                 break;
 527         case IXGBE_DCA_RXCTRL(0):
 528                 for (i = 0; i < 64; i++)
 529                         regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 530                 break;
 531         case IXGBE_RDLEN(0):
 532                 for (i = 0; i < 64; i++)
 533                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 534                 break;
 535         case IXGBE_RDH(0):
 536                 for (i = 0; i < 64; i++)
 537                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 538                 break;
 539         case IXGBE_RDT(0):
 540                 for (i = 0; i < 64; i++)
 541                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 542                 break;
 543         case IXGBE_RXDCTL(0):
 544                 for (i = 0; i < 64; i++)
 545                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 546                 break;
 547         case IXGBE_RDBAL(0):
 548                 for (i = 0; i < 64; i++)
 549                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 550                 break;
 551         case IXGBE_RDBAH(0):
 552                 for (i = 0; i < 64; i++)
 553                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 554                 break;
 555         case IXGBE_TDBAL(0):
 556                 for (i = 0; i < 64; i++)
 557                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 558                 break;
 559         case IXGBE_TDBAH(0):
 560                 for (i = 0; i < 64; i++)
 561                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 562                 break;
 563         case IXGBE_TDLEN(0):
 564                 for (i = 0; i < 64; i++)
 565                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 566                 break;
 567         case IXGBE_TDH(0):
 568                 for (i = 0; i < 64; i++)
 569                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 570                 break;
 571         case IXGBE_TDT(0):
 572                 for (i = 0; i < 64; i++)
 573                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 574                 break;
 575         case IXGBE_TXDCTL(0):
 576                 for (i = 0; i < 64; i++)
 577                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 578                 break;
 579         default:
 580                 pr_info("%-15s %08x\n",
 581                         reginfo->name, IXGBE_READ_REG(hw, reginfo->ofs));
 582                 return;
 583         }
 584
 585         i = 0;
 586         while (i < 64) {
 587                 int j;
 588                 char buf[9 * 8 + 1];
 589                 char *p = buf;
 590
 591                 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i, i + 7);
 592                 for (j = 0; j < 8; j++)
 593                         p += sprintf(p, " %08x", regs[i++]);
 594                 pr_err("%-15s%s\n", rname, buf);
 595         }
 596
 597 }
 598
 599 static void ixgbe_print_buffer(struct ixgbe_ring *ring, int n)
 600 {
 601         struct ixgbe_tx_buffer *tx_buffer;
 602
 603         tx_buffer = &ring->tx_buffer_info[ring->next_to_clean];
 604         pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
 605                 n, ring->next_to_use, ring->next_to_clean,
 606                 (u64)dma_unmap_addr(tx_buffer, dma),
 607                 dma_unmap_len(tx_buffer, len),
 608                 tx_buffer->next_to_watch,
 609                 (u64)tx_buffer->time_stamp);
 610 }
 611
 612 /*
 613  * ixgbe_dump - Print registers, tx-rings and rx-rings
 614  */
 615 static void ixgbe_dump(struct ixgbe_adapter *adapter)
 616 {
 617         struct net_device *netdev = adapter->netdev;
 618         struct ixgbe_hw *hw = &adapter->hw;
 619         struct ixgbe_reg_info *reginfo;
 620         int n = 0;
 621         struct ixgbe_ring *ring;
 622         struct ixgbe_tx_buffer *tx_buffer;
 623         union ixgbe_adv_tx_desc *tx_desc;
 624         struct my_u0 { u64 a; u64 b; } *u0;
 625         struct ixgbe_ring *rx_ring;
 626         union ixgbe_adv_rx_desc *rx_desc;
 627         struct ixgbe_rx_buffer *rx_buffer_info;
 628         int i = 0;
 629
 630         if (!netif_msg_hw(adapter))
 631                 return;
 632
 633         /* Print netdevice Info */
 634         if (netdev) {
 635                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 636                 pr_info("Device Name     state            "
 637                         "trans_start\n");
 638                 pr_info("%-15s %016lX %016lX\n",
 639                         netdev->name,
 640                         netdev->state,
 641                         dev_trans_start(netdev));
 642         }
 643
 644         /* Print Registers */
 645         dev_info(&adapter->pdev->dev, "Register Dump\n");
 646         pr_info(" Register Name   Value\n");
 647         for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
 648              reginfo->name; reginfo++) {
 649                 ixgbe_regdump(hw, reginfo);
 650         }
 651
 652         /* Print TX Ring Summary */
 653         if (!netdev || !netif_running(netdev))
 654                 return;
 655
 656         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 657         pr_info(" %s     %s              %s        %s\n",
 658                 "Queue [NTU] [NTC] [bi(ntc)->dma  ]",
 659                 "leng", "ntw", "timestamp");
 660         for (n = 0; n < adapter->num_tx_queues; n++) {
 661                 ring = adapter->tx_ring[n];
 662                 ixgbe_print_buffer(ring, n);
 663         }
 664
 665         for (n = 0; n < adapter->num_xdp_queues; n++) {
 666                 ring = adapter->xdp_ring[n];
 667                 ixgbe_print_buffer(ring, n);
 668         }
 669
 670         /* Print TX Rings */
 671         if (!netif_msg_tx_done(adapter))
 672                 goto rx_ring_summary;
 673
 674         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 675
 676         /* Transmit Descriptor Formats
 677          *
 678          * 82598 Advanced Transmit Descriptor
 679          *   +--------------------------------------------------------------+
 680          * 0 |         Buffer Address [63:0]                                |
 681          *   +--------------------------------------------------------------+
 682          * 8 |  PAYLEN  | POPTS  | IDX | STA | DCMD  |DTYP |  RSV |  DTALEN |
 683          *   +--------------------------------------------------------------+
 684          *   63       46 45    40 39 36 35 32 31   24 23 20 19              0
 685          *
 686          * 82598 Advanced Transmit Descriptor (Write-Back Format)
 687          *   +--------------------------------------------------------------+
 688          * 0 |                          RSV [63:0]                          |
 689          *   +--------------------------------------------------------------+
 690          * 8 |            RSV           |  STA  |          NXTSEQ           |
 691          *   +--------------------------------------------------------------+
 692          *   63                       36 35   32 31                         0
 693          *
 694          * 82599+ Advanced Transmit Descriptor
 695          *   +--------------------------------------------------------------+
 696          * 0 |         Buffer Address [63:0]                                |
 697          *   +--------------------------------------------------------------+
 698          * 8 |PAYLEN  |POPTS|CC|IDX  |STA  |DCMD  |DTYP |MAC  |RSV  |DTALEN |
 699          *   +--------------------------------------------------------------+
 700          *   63     46 45 40 39 38 36 35 32 31  24 23 20 19 18 17 16 15     0
 701          *
 702          * 82599+ Advanced Transmit Descriptor (Write-Back Format)
 703          *   +--------------------------------------------------------------+
 704          * 0 |                          RSV [63:0]                          |
 705          *   +--------------------------------------------------------------+
 706          * 8 |            RSV           |  STA  |           RSV             |
 707          *   +--------------------------------------------------------------+
 708          *   63                       36 35   32 31                         0
 709          */
 710
 711         for (n = 0; n < adapter->num_tx_queues; n++) {
 712                 ring = adapter->tx_ring[n];
 713                 pr_info("------------------------------------\n");
 714                 pr_info("TX QUEUE INDEX = %d\n", ring->queue_index);
 715                 pr_info("------------------------------------\n");
 716                 pr_info("%s%s    %s              %s        %s          %s\n",
 717                         "T [desc]     [address 63:0  ] ",
 718                         "[PlPOIdStDDt Ln] [bi->dma       ] ",
 719                         "leng", "ntw", "timestamp", "bi->skb");
 720
 721                 for (i = 0; ring->desc && (i < ring->count); i++) {
 722                         tx_desc = IXGBE_TX_DESC(ring, i);
 723                         tx_buffer = &ring->tx_buffer_info[i];
 724                         u0 = (struct my_u0 *)tx_desc;
 725                         if (dma_unmap_len(tx_buffer, len) > 0) {
 726                                 const char *ring_desc;
 727
 728                                 if (i == ring->next_to_use &&
 729                                     i == ring->next_to_clean)
 730                                         ring_desc = " NTC/U";
 731                                 else if (i == ring->next_to_use)
 732                                         ring_desc = " NTU";
 733                                 else if (i == ring->next_to_clean)
 734                                         ring_desc = " NTC";
 735                                 else
 736                                         ring_desc = "";
 737                                 pr_info("T [0x%03X]    %016llX %016llX %016llX %08X %p %016llX %p%s",
 738                                         i,
 739                                         le64_to_cpu(u0->a),
 740                                         le64_to_cpu(u0->b),
 741                                         (u64)dma_unmap_addr(tx_buffer, dma),
 742                                         dma_unmap_len(tx_buffer, len),
 743                                         tx_buffer->next_to_watch,
 744                                         (u64)tx_buffer->time_stamp,
 745                                         tx_buffer->skb,
 746                                         ring_desc);
 747
 748                                 if (netif_msg_pktdata(adapter) &&
 749                                     tx_buffer->skb)
 750                                         print_hex_dump(KERN_INFO, "",
 751                                                 DUMP_PREFIX_ADDRESS, 16, 1,
 752                                                 tx_buffer->skb->data,
 753                                                 dma_unmap_len(tx_buffer, len),
 754                                                 true);
 755                         }
 756                 }
 757         }
 758
 759         /* Print RX Rings Summary */
 760 rx_ring_summary:
 761         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 762         pr_info("Queue [NTU] [NTC]\n");
 763         for (n = 0; n < adapter->num_rx_queues; n++) {
 764                 rx_ring = adapter->rx_ring[n];
 765                 pr_info("%5d %5X %5X\n",
 766                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 767         }
 768
 769         /* Print RX Rings */
 770         if (!netif_msg_rx_status(adapter))
 771                 return;
 772
 773         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 774
 775         /* Receive Descriptor Formats
 776          *
 777          * 82598 Advanced Receive Descriptor (Read) Format
 778          *    63                                           1        0
 779          *    +-----------------------------------------------------+
 780          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 781          *    +----------------------------------------------+------+
 782          *  8 |       Header Buffer Address [63:1]           |  DD  |
 783          *    +-----------------------------------------------------+
 784          *
 785          *
 786          * 82598 Advanced Receive Descriptor (Write-Back) Format
 787          *
 788          *   63       48 47    32 31  30      21 20 16 15   4 3     0
 789          *   +------------------------------------------------------+
 790          * 0 |       RSS Hash /  |SPH| HDR_LEN  | RSV |Packet|  RSS |
 791          *   | Packet   | IP     |   |          |     | Type | Type |
 792          *   | Checksum | Ident  |   |          |     |      |      |
 793          *   +------------------------------------------------------+
 794          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 795          *   +------------------------------------------------------+
 796          *   63       48 47    32 31            20 19               0
 797          *
 798          * 82599+ Advanced Receive Descriptor (Read) Format
 799          *    63                                           1        0
 800          *    +-----------------------------------------------------+
 801          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 802          *    +----------------------------------------------+------+
 803          *  8 |       Header Buffer Address [63:1]           |  DD  |
 804          *    +-----------------------------------------------------+
 805          *
 806          *
 807          * 82599+ Advanced Receive Descriptor (Write-Back) Format
 808          *
 809          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 810          *   +------------------------------------------------------+
 811          * 0 |RSS / Frag Checksum|SPH| HDR_LEN  |RSC- |Packet|  RSS |
 812          *   |/ RTT / PCoE_PARAM |   |          | CNT | Type | Type |
 813          *   |/ Flow Dir Flt ID  |   |          |     |      |      |
 814          *   +------------------------------------------------------+
 815          * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
 816          *   +------------------------------------------------------+
 817          *   63       48 47    32 31          20 19                 0
 818          */
 819
 820         for (n = 0; n < adapter->num_rx_queues; n++) {
 821                 rx_ring = adapter->rx_ring[n];
 822                 pr_info("------------------------------------\n");
 823                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 824                 pr_info("------------------------------------\n");
 825                 pr_info("%s%s%s\n",
 826                         "R  [desc]      [ PktBuf     A0] ",
 827                         "[  HeadBuf   DD] [bi->dma       ] [bi->skb       ] ",
 828                         "<-- Adv Rx Read format");
 829                 pr_info("%s%s%s\n",
 830                         "RWB[desc]      [PcsmIpSHl PtRs] ",
 831                         "[vl er S cks ln] ---------------- [bi->skb       ] ",
 832                         "<-- Adv Rx Write-Back format");
 833
 834                 for (i = 0; i < rx_ring->count; i++) {
 835                         const char *ring_desc;
 836
 837                         if (i == rx_ring->next_to_use)
 838                                 ring_desc = " NTU";
 839                         else if (i == rx_ring->next_to_clean)
 840                                 ring_desc = " NTC";
 841                         else
 842                                 ring_desc = "";
 843
 844                         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 845                         rx_desc = IXGBE_RX_DESC(rx_ring, i);
 846                         u0 = (struct my_u0 *)rx_desc;
 847                         if (rx_desc->wb.upper.length) {
 848                                 /* Descriptor Done */
 849                                 pr_info("RWB[0x%03X]     %016llX %016llX ---------------- %p%s\n",
 850                                         i,
 851                                         le64_to_cpu(u0->a),
 852                                         le64_to_cpu(u0->b),
 853                                         rx_buffer_info->skb,
 854                                         ring_desc);
 855                         } else {
 856                                 pr_info("R  [0x%03X]     %016llX %016llX %016llX %p%s\n",
 857                                         i,
 858                                         le64_to_cpu(u0->a),
 859                                         le64_to_cpu(u0->b),
 860                                         (u64)rx_buffer_info->dma,
 861                                         rx_buffer_info->skb,
 862                                         ring_desc);
 863
 864                                 if (netif_msg_pktdata(adapter) &&
 865                                     rx_buffer_info->dma) {
 866                                         print_hex_dump(KERN_INFO, "",
 867                                            DUMP_PREFIX_ADDRESS, 16, 1,
 868                                            page_address(rx_buffer_info->page) +
 869                                                     rx_buffer_info->page_offset,
 870                                            ixgbe_rx_bufsz(rx_ring), true);
 871                                 }
 872                         }
 873                 }
 874         }
 875 }
 876
 877 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 878 {
 879         u32 ctrl_ext;
 880
 881         /* Let firmware take over control of h/w */
 882         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 883         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 884                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 885 }
 886
 887 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 888 {
 889         u32 ctrl_ext;
 890
 891         /* Let firmware know the driver has taken over */
 892         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 893         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 894                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 895 }
 896
 897 /**
 898  * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
 899  * @adapter: pointer to adapter struct
 900  * @direction: 0 for Rx, 1 for Tx, -1 for other causes
 901  * @queue: queue to map the corresponding interrupt to
 902  * @msix_vector: the vector to map to the corresponding queue
 903  *
 904  */
 905 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
 906                            u8 queue, u8 msix_vector)
 907 {
 908         u32 ivar, index;
 909         struct ixgbe_hw *hw = &adapter->hw;
 910         switch (hw->mac.type) {
 911         case ixgbe_mac_82598EB:
 912                 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 913                 if (direction == -1)
 914                         direction = 0;
 915                 index = (((direction * 64) + queue) >> 2) & 0x1F;
 916                 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
 917                 ivar &= ~(0xFF << (8 * (queue & 0x3)));
 918                 ivar |= (msix_vector << (8 * (queue & 0x3)));
 919                 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
 920                 break;
 921         case ixgbe_mac_82599EB:
 922         case ixgbe_mac_X540:
 923         case ixgbe_mac_X550:
 924         case ixgbe_mac_X550EM_x:
 925         case ixgbe_mac_x550em_a:
 926                 if (direction == -1) {
 927                         /* other causes */
 928                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 929                         index = ((queue & 1) * 8);
 930                         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
 931                         ivar &= ~(0xFF << index);
 932                         ivar |= (msix_vector << index);
 933                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
 934                         break;
 935                 } else {
 936                         /* tx or rx causes */
 937                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 938                         index = ((16 * (queue & 1)) + (8 * direction));
 939                         ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
 940                         ivar &= ~(0xFF << index);
 941                         ivar |= (msix_vector << index);
 942                         IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
 943                         break;
 944                 }
 945         default:
 946                 break;
 947         }
 948 }
 949
 950 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
 951                                           u64 qmask)
 952 {
 953         u32 mask;
 954
 955         switch (adapter->hw.mac.type) {
 956         case ixgbe_mac_82598EB:
 957                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
 958                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
 959                 break;
 960         case ixgbe_mac_82599EB:
 961         case ixgbe_mac_X540:
 962         case ixgbe_mac_X550:
 963         case ixgbe_mac_X550EM_x:
 964         case ixgbe_mac_x550em_a:
 965                 mask = (qmask & 0xFFFFFFFF);
 966                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
 967                 mask = (qmask >> 32);
 968                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
 969                 break;
 970         default:
 971                 break;
 972         }
 973 }
 974
 975 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
 976 {
 977         struct ixgbe_hw *hw = &adapter->hw;
 978         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 979         int i;
 980         u32 data;
 981
 982         if ((hw->fc.current_mode != ixgbe_fc_full) &&
 983             (hw->fc.current_mode != ixgbe_fc_rx_pause))
 984                 return;
 985
 986         switch (hw->mac.type) {
 987         case ixgbe_mac_82598EB:
 988                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
 989                 break;
 990         default:
 991                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
 992         }
 993         hwstats->lxoffrxc += data;
 994
 995         /* refill credits (no tx hang) if we received xoff */
 996         if (!data)
 997                 return;
 998
 999         for (i = 0; i < adapter->num_tx_queues; i++)
1000                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
1001                           &adapter->tx_ring[i]->state);
1002
1003         for (i = 0; i < adapter->num_xdp_queues; i++)
1004                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
1005                           &adapter->xdp_ring[i]->state);
1006 }
1007
1008 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
1009 {
1010         struct ixgbe_hw *hw = &adapter->hw;
1011         struct ixgbe_hw_stats *hwstats = &adapter->stats;
1012         u32 xoff[8] = {0};
1013         u8 tc;
1014         int i;
1015         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
1016
1017         if (adapter->ixgbe_ieee_pfc)
1018                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
1019
1020         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
1021                 ixgbe_update_xoff_rx_lfc(adapter);
1022                 return;
1023         }
1024
1025         /* update stats for each tc, only valid with PFC enabled */
1026         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
1027                 u32 pxoffrxc;
1028
1029                 switch (hw->mac.type) {
1030                 case ixgbe_mac_82598EB:
1031                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
1032                         break;
1033                 default:
1034                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
1035                 }
1036                 hwstats->pxoffrxc[i] += pxoffrxc;
1037                 /* Get the TC for given UP */
1038                 tc = netdev_get_prio_tc_map(adapter->netdev, i);
1039                 xoff[tc] += pxoffrxc;
1040         }
1041
1042         /* disarm tx queues that have received xoff frames */
1043         for (i = 0; i < adapter->num_tx_queues; i++) {
1044                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
1045
1046                 tc = tx_ring->dcb_tc;
1047                 if (xoff[tc])
1048                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1049         }
1050
1051         for (i = 0; i < adapter->num_xdp_queues; i++) {
1052                 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i];
1053
1054                 tc = xdp_ring->dcb_tc;
1055                 if (xoff[tc])
1056                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &xdp_ring->state);
1057         }
1058 }
1059
1060 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1061 {
1062         return ring->stats.packets;
1063 }
1064
1065 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1066 {
1067         struct ixgbe_adapter *adapter;
1068         struct ixgbe_hw *hw;
1069         u32 head, tail;
1070
1071         if (ring->l2_accel_priv)
1072                 adapter = ring->l2_accel_priv->real_adapter;
1073         else
1074                 adapter = netdev_priv(ring->netdev);
1075
1076         hw = &adapter->hw;
1077         head = IXGBE_READ_REG(hw, IXGBE_TDH(ring->reg_idx));
1078         tail = IXGBE_READ_REG(hw, IXGBE_TDT(ring->reg_idx));
1079
1080         if (head != tail)
1081                 return (head < tail) ?
1082                         tail - head : (tail + ring->count - head);
1083
1084         return 0;
1085 }
1086
1087 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1088 {
1089         u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1090         u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1091         u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1092
1093         clear_check_for_tx_hang(tx_ring);
1094
1095         /*
1096          * Check for a hung queue, but be thorough. This verifies
1097          * that a transmit has been completed since the previous
1098          * check AND there is at least one packet pending. The
1099          * ARMED bit is set to indicate a potential hang. The
1100          * bit is cleared if a pause frame is received to remove
1101          * false hang detection due to PFC or 802.3x frames. By
1102          * requiring this to fail twice we avoid races with
1103          * pfc clearing the ARMED bit and conditions where we
1104          * run the check_tx_hang logic with a transmit completion
1105          * pending but without time to complete it yet.
1106          */
1107         if (tx_done_old == tx_done && tx_pending)
1108                 /* make sure it is true for two checks in a row */
1109                 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1110                                         &tx_ring->state);
1111         /* update completed stats and continue */
1112         tx_ring->tx_stats.tx_done_old = tx_done;
1113         /* reset the countdown */
1114         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1115
1116         return false;
1117 }
1118
1119 /**
1120  * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1121  * @adapter: driver private struct
1122  **/
1123 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1124 {
1125
1126         /* Do the reset outside of interrupt context */
1127         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1128                 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
1129                 e_warn(drv, "initiating reset due to tx timeout\n");
1130                 ixgbe_service_event_schedule(adapter);
1131         }
1132 }
1133
1134 /**
1135  * ixgbe_tx_maxrate - callback to set the maximum per-queue bitrate
1136  **/
1137 static int ixgbe_tx_maxrate(struct net_device *netdev,
1138                             int queue_index, u32 maxrate)
1139 {
1140         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1141         struct ixgbe_hw *hw = &adapter->hw;
1142         u32 bcnrc_val = ixgbe_link_mbps(adapter);
1143
1144         if (!maxrate)
1145                 return 0;
1146
1147         /* Calculate the rate factor values to set */
1148         bcnrc_val <<= IXGBE_RTTBCNRC_RF_INT_SHIFT;
1149         bcnrc_val /= maxrate;
1150
1151         /* clear everything but the rate factor */
1152         bcnrc_val &= IXGBE_RTTBCNRC_RF_INT_MASK |
1153         IXGBE_RTTBCNRC_RF_DEC_MASK;
1154
1155         /* enable the rate scheduler */
1156         bcnrc_val |= IXGBE_RTTBCNRC_RS_ENA;
1157
1158         IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, queue_index);
1159         IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, bcnrc_val);
1160
1161         return 0;
1162 }
1163
1164 /**
1165  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1166  * @q_vector: structure containing interrupt and ring information
1167  * @tx_ring: tx ring to clean
1168  * @napi_budget: Used to determine if we are in netpoll
1169  **/
1170 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1171                                struct ixgbe_ring *tx_ring, int napi_budget)
1172 {
1173         struct ixgbe_adapter *adapter = q_vector->adapter;
1174         struct ixgbe_tx_buffer *tx_buffer;
1175         union ixgbe_adv_tx_desc *tx_desc;
1176         unsigned int total_bytes = 0, total_packets = 0;
1177         unsigned int budget = q_vector->tx.work_limit;
1178         unsigned int i = tx_ring->next_to_clean;
1179
1180         if (test_bit(__IXGBE_DOWN, &adapter->state))
1181                 return true;
1182
1183         tx_buffer = &tx_ring->tx_buffer_info[i];
1184         tx_desc = IXGBE_TX_DESC(tx_ring, i);
1185         i -= tx_ring->count;
1186
1187         do {
1188                 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1189
1190                 /* if next_to_watch is not set then there is no work pending */
1191                 if (!eop_desc)
1192                         break;
1193
1194                 /* prevent any other reads prior to eop_desc */
1195                 read_barrier_depends();
1196
1197                 /* if DD is not set pending work has not been completed */
1198                 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1199                         break;
1200
1201                 /* clear next_to_watch to prevent false hangs */
1202                 tx_buffer->next_to_watch = NULL;
1203
1204                 /* update the statistics for this packet */
1205                 total_bytes += tx_buffer->bytecount;
1206                 total_packets += tx_buffer->gso_segs;
1207
1208                 /* free the skb */
1209                 if (ring_is_xdp(tx_ring))
1210                         page_frag_free(tx_buffer->data);
1211                 else
1212                         napi_consume_skb(tx_buffer->skb, napi_budget);
1213
1214                 /* unmap skb header data */
1215                 dma_unmap_single(tx_ring->dev,
1216                                  dma_unmap_addr(tx_buffer, dma),
1217                                  dma_unmap_len(tx_buffer, len),
1218                                  DMA_TO_DEVICE);
1219
1220                 /* clear tx_buffer data */
1221                 dma_unmap_len_set(tx_buffer, len, 0);
1222
1223                 /* unmap remaining buffers */
1224                 while (tx_desc != eop_desc) {
1225                         tx_buffer++;
1226                         tx_desc++;
1227                         i++;
1228                         if (unlikely(!i)) {
1229                                 i -= tx_ring->count;
1230                                 tx_buffer = tx_ring->tx_buffer_info;
1231                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1232                         }
1233
1234                         /* unmap any remaining paged data */
1235                         if (dma_unmap_len(tx_buffer, len)) {
1236                                 dma_unmap_page(tx_ring->dev,
1237                                                dma_unmap_addr(tx_buffer, dma),
1238                                                dma_unmap_len(tx_buffer, len),
1239                                                DMA_TO_DEVICE);
1240                                 dma_unmap_len_set(tx_buffer, len, 0);
1241                         }
1242                 }
1243
1244                 /* move us one more past the eop_desc for start of next pkt */
1245                 tx_buffer++;
1246                 tx_desc++;
1247                 i++;
1248                 if (unlikely(!i)) {
1249                         i -= tx_ring->count;
1250                         tx_buffer = tx_ring->tx_buffer_info;
1251                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1252                 }
1253
1254                 /* issue prefetch for next Tx descriptor */
1255                 prefetch(tx_desc);
1256
1257                 /* update budget accounting */
1258                 budget--;
1259         } while (likely(budget));
1260
1261         i += tx_ring->count;
1262         tx_ring->next_to_clean = i;
1263         u64_stats_update_begin(&tx_ring->syncp);
1264         tx_ring->stats.bytes += total_bytes;
1265         tx_ring->stats.packets += total_packets;
1266         u64_stats_update_end(&tx_ring->syncp);
1267         q_vector->tx.total_bytes += total_bytes;
1268         q_vector->tx.total_packets += total_packets;
1269
1270         if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1271                 /* schedule immediate reset if we believe we hung */
1272                 struct ixgbe_hw *hw = &adapter->hw;
1273                 e_err(drv, "Detected Tx Unit Hang %s\n"
1274                         "  Tx Queue             <%d>\n"
1275                         "  TDH, TDT             <%x>, <%x>\n"
1276                         "  next_to_use          <%x>\n"
1277                         "  next_to_clean        <%x>\n"
1278                         "tx_buffer_info[next_to_clean]\n"
1279                         "  time_stamp           <%lx>\n"
1280                         "  jiffies              <%lx>\n",
1281                         ring_is_xdp(tx_ring) ? "(XDP)" : "",
1282                         tx_ring->queue_index,
1283                         IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1284                         IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1285                         tx_ring->next_to_use, i,
1286                         tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1287
1288                 if (!ring_is_xdp(tx_ring))
1289                         netif_stop_subqueue(tx_ring->netdev,
1290                                             tx_ring->queue_index);
1291
1292                 e_info(probe,
1293                        "tx hang %d detected on queue %d, resetting adapter\n",
1294                         adapter->tx_timeout_count + 1, tx_ring->queue_index);
1295
1296                 /* schedule immediate reset if we believe we hung */
1297                 ixgbe_tx_timeout_reset(adapter);
1298
1299                 /* the adapter is about to reset, no point in enabling stuff */
1300                 return true;
1301         }
1302
1303         if (ring_is_xdp(tx_ring))
1304                 return !!budget;
1305
1306         netdev_tx_completed_queue(txring_txq(tx_ring),
1307                                   total_packets, total_bytes);
1308
1309 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1310         if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1311                      (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1312                 /* Make sure that anybody stopping the queue after this
1313                  * sees the new next_to_clean.
1314                  */
1315                 smp_mb();
1316                 if (__netif_subqueue_stopped(tx_ring->netdev,
1317                                              tx_ring->queue_index)
1318                     && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1319                         netif_wake_subqueue(tx_ring->netdev,
1320                                             tx_ring->queue_index);
1321                         ++tx_ring->tx_stats.restart_queue;
1322                 }
1323         }
1324
1325         return !!budget;
1326 }
1327
1328 #ifdef CONFIG_IXGBE_DCA
1329 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1330                                 struct ixgbe_ring *tx_ring,
1331                                 int cpu)
1332 {
1333         struct ixgbe_hw *hw = &adapter->hw;
1334         u32 txctrl = 0;
1335         u16 reg_offset;
1336
1337         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1338                 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1339
1340         switch (hw->mac.type) {
1341         case ixgbe_mac_82598EB:
1342                 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1343                 break;
1344         case ixgbe_mac_82599EB:
1345         case ixgbe_mac_X540:
1346                 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1347                 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1348                 break;
1349         default:
1350                 /* for unknown hardware do not write register */
1351                 return;
1352         }
1353
1354         /*
1355          * We can enable relaxed ordering for reads, but not writes when
1356          * DCA is enabled.  This is due to a known issue in some chipsets
1357          * which will cause the DCA tag to be cleared.
1358          */
1359         txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1360                   IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1361                   IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1362
1363         IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1364 }
1365
1366 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1367                                 struct ixgbe_ring *rx_ring,
1368                                 int cpu)
1369 {
1370         struct ixgbe_hw *hw = &adapter->hw;
1371         u32 rxctrl = 0;
1372         u8 reg_idx = rx_ring->reg_idx;
1373
1374         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1375                 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1376
1377         switch (hw->mac.type) {
1378         case ixgbe_mac_82599EB:
1379         case ixgbe_mac_X540:
1380                 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1381                 break;
1382         default:
1383                 break;
1384         }
1385
1386         /*
1387          * We can enable relaxed ordering for reads, but not writes when
1388          * DCA is enabled.  This is due to a known issue in some chipsets
1389          * which will cause the DCA tag to be cleared.
1390          */
1391         rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1392                   IXGBE_DCA_RXCTRL_DATA_DCA_EN |
1393                   IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1394
1395         IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1396 }
1397
1398 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1399 {
1400         struct ixgbe_adapter *adapter = q_vector->adapter;
1401         struct ixgbe_ring *ring;
1402         int cpu = get_cpu();
1403
1404         if (q_vector->cpu == cpu)
1405                 goto out_no_update;
1406
1407         ixgbe_for_each_ring(ring, q_vector->tx)
1408                 ixgbe_update_tx_dca(adapter, ring, cpu);
1409
1410         ixgbe_for_each_ring(ring, q_vector->rx)
1411                 ixgbe_update_rx_dca(adapter, ring, cpu);
1412
1413         q_vector->cpu = cpu;
1414 out_no_update:
1415         put_cpu();
1416 }
1417
1418 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1419 {
1420         int i;
1421
1422         /* always use CB2 mode, difference is masked in the CB driver */
1423         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1424                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1425                                 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1426         else
1427                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1428                                 IXGBE_DCA_CTRL_DCA_DISABLE);
1429
1430         for (i = 0; i < adapter->num_q_vectors; i++) {
1431                 adapter->q_vector[i]->cpu = -1;
1432                 ixgbe_update_dca(adapter->q_vector[i]);
1433         }
1434 }
1435
1436 static int __ixgbe_notify_dca(struct device *dev, void *data)
1437 {
1438         struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1439         unsigned long event = *(unsigned long *)data;
1440
1441         if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1442                 return 0;
1443
1444         switch (event) {
1445         case DCA_PROVIDER_ADD:
1446                 /* if we're already enabled, don't do it again */
1447                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1448                         break;
1449                 if (dca_add_requester(dev) == 0) {
1450                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1451                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1452                                         IXGBE_DCA_CTRL_DCA_MODE_CB2);
1453                         break;
1454                 }
1455                 /* fall through - DCA is disabled. */
1456         case DCA_PROVIDER_REMOVE:
1457                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1458                         dca_remove_requester(dev);
1459                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1460                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1461                                         IXGBE_DCA_CTRL_DCA_DISABLE);
1462                 }
1463                 break;
1464         }
1465
1466         return 0;
1467 }
1468
1469 #endif /* CONFIG_IXGBE_DCA */
1470
1471 #define IXGBE_RSS_L4_TYPES_MASK \
1472         ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1473          (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1474          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1475          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1476
1477 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1478                                  union ixgbe_adv_rx_desc *rx_desc,
1479                                  struct sk_buff *skb)
1480 {
1481         u16 rss_type;
1482
1483         if (!(ring->netdev->features & NETIF_F_RXHASH))
1484                 return;
1485
1486         rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1487                    IXGBE_RXDADV_RSSTYPE_MASK;
1488
1489         if (!rss_type)
1490                 return;
1491
1492         skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1493                      (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1494                      PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1495 }
1496
1497 #ifdef IXGBE_FCOE
1498 /**
1499  * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1500  * @ring: structure containing ring specific data
1501  * @rx_desc: advanced rx descriptor
1502  *
1503  * Returns : true if it is FCoE pkt
1504  */
1505 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1506                                     union ixgbe_adv_rx_desc *rx_desc)
1507 {
1508         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1509
1510         return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1511                ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1512                 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1513                              IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1514 }
1515
1516 #endif /* IXGBE_FCOE */
1517 /**
1518  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1519  * @ring: structure containing ring specific data
1520  * @rx_desc: current Rx descriptor being processed
1521  * @skb: skb currently being received and modified
1522  **/
1523 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1524                                      union ixgbe_adv_rx_desc *rx_desc,
1525                                      struct sk_buff *skb)
1526 {
1527         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1528         bool encap_pkt = false;
1529
1530         skb_checksum_none_assert(skb);
1531
1532         /* Rx csum disabled */
1533         if (!(ring->netdev->features & NETIF_F_RXCSUM))
1534                 return;
1535
1536         /* check for VXLAN and Geneve packets */
1537         if (pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) {
1538                 encap_pkt = true;
1539                 skb->encapsulation = 1;
1540         }
1541
1542         /* if IP and error */
1543         if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1544             ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1545                 ring->rx_stats.csum_err++;
1546                 return;
1547         }
1548
1549         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1550                 return;
1551
1552         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1553                 /*
1554                  * 82599 errata, UDP frames with a 0 checksum can be marked as
1555                  * checksum errors.
1556                  */
1557                 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1558                     test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1559                         return;
1560
1561                 ring->rx_stats.csum_err++;
1562                 return;
1563         }
1564
1565         /* It must be a TCP or UDP packet with a valid checksum */
1566         skb->ip_summed = CHECKSUM_UNNECESSARY;
1567         if (encap_pkt) {
1568                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1569                         return;
1570
1571                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1572                         skb->ip_summed = CHECKSUM_NONE;
1573                         return;
1574                 }
1575                 /* If we checked the outer header let the stack know */
1576                 skb->csum_level = 1;
1577         }
1578 }
1579
1580 static inline unsigned int ixgbe_rx_offset(struct ixgbe_ring *rx_ring)
1581 {
1582         return ring_uses_build_skb(rx_ring) ? IXGBE_SKB_PAD : 0;
1583 }
1584
1585 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1586                                     struct ixgbe_rx_buffer *bi)
1587 {
1588         struct page *page = bi->page;
1589         dma_addr_t dma;
1590
1591         /* since we are recycling buffers we should seldom need to alloc */
1592         if (likely(page))
1593                 return true;
1594
1595         /* alloc new page for storage */
1596         page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1597         if (unlikely(!page)) {
1598                 rx_ring->rx_stats.alloc_rx_page_failed++;
1599                 return false;
1600         }
1601
1602         /* map page for use */
1603         dma = dma_map_page_attrs(rx_ring->dev, page, 0,
1604                                  ixgbe_rx_pg_size(rx_ring),
1605                                  DMA_FROM_DEVICE,
1606                                  IXGBE_RX_DMA_ATTR);
1607
1608         /*
1609          * if mapping failed free memory back to system since
1610          * there isn't much point in holding memory we can't use
1611          */
1612         if (dma_mapping_error(rx_ring->dev, dma)) {
1613                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1614
1615                 rx_ring->rx_stats.alloc_rx_page_failed++;
1616                 return false;
1617         }
1618
1619         bi->dma = dma;
1620         bi->page = page;
1621         bi->page_offset = ixgbe_rx_offset(rx_ring);
1622         bi->pagecnt_bias = 1;
1623         rx_ring->rx_stats.alloc_rx_page++;
1624
1625         return true;
1626 }
1627
1628 /**
1629  * ixgbe_alloc_rx_buffers - Replace used receive buffers
1630  * @rx_ring: ring to place buffers on
1631  * @cleaned_count: number of buffers to replace
1632  **/
1633 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1634 {
1635         union ixgbe_adv_rx_desc *rx_desc;
1636         struct ixgbe_rx_buffer *bi;
1637         u16 i = rx_ring->next_to_use;
1638         u16 bufsz;
1639
1640         /* nothing to do */
1641         if (!cleaned_count)
1642                 return;
1643
1644         rx_desc = IXGBE_RX_DESC(rx_ring, i);
1645         bi = &rx_ring->rx_buffer_info[i];
1646         i -= rx_ring->count;
1647
1648         bufsz = ixgbe_rx_bufsz(rx_ring);
1649
1650         do {
1651                 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1652                         break;
1653
1654                 /* sync the buffer for use by the device */
1655                 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
1656                                                  bi->page_offset, bufsz,
1657                                                  DMA_FROM_DEVICE);
1658
1659                 /*
1660                  * Refresh the desc even if buffer_addrs didn't change
1661                  * because each write-back erases this info.
1662                  */
1663                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1664
1665                 rx_desc++;
1666                 bi++;
1667                 i++;
1668                 if (unlikely(!i)) {
1669                         rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1670                         bi = rx_ring->rx_buffer_info;
1671                         i -= rx_ring->count;
1672                 }
1673
1674                 /* clear the length for the next_to_use descriptor */
1675                 rx_desc->wb.upper.length = 0;
1676
1677                 cleaned_count--;
1678         } while (cleaned_count);
1679
1680         i += rx_ring->count;
1681
1682         if (rx_ring->next_to_use != i) {
1683                 rx_ring->next_to_use = i;
1684
1685                 /* update next to alloc since we have filled the ring */
1686                 rx_ring->next_to_alloc = i;
1687
1688                 /* Force memory writes to complete before letting h/w
1689                  * know there are new descriptors to fetch.  (Only
1690                  * applicable for weak-ordered memory model archs,
1691                  * such as IA-64).
1692                  */
1693                 wmb();
1694                 writel(i, rx_ring->tail);
1695         }
1696 }
1697
1698 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1699                                    struct sk_buff *skb)
1700 {
1701         u16 hdr_len = skb_headlen(skb);
1702
1703         /* set gso_size to avoid messing up TCP MSS */
1704         skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1705                                                  IXGBE_CB(skb)->append_cnt);
1706         skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1707 }
1708
1709 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1710                                    struct sk_buff *skb)
1711 {
1712         /* if append_cnt is 0 then frame is not RSC */
1713         if (!IXGBE_CB(skb)->append_cnt)
1714                 return;
1715
1716         rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1717         rx_ring->rx_stats.rsc_flush++;
1718
1719         ixgbe_set_rsc_gso_size(rx_ring, skb);
1720
1721         /* gso_size is computed using append_cnt so always clear it last */
1722         IXGBE_CB(skb)->append_cnt = 0;
1723 }
1724
1725 /**
1726  * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1727  * @rx_ring: rx descriptor ring packet is being transacted on
1728  * @rx_desc: pointer to the EOP Rx descriptor
1729  * @skb: pointer to current skb being populated
1730  *
1731  * This function checks the ring, descriptor, and packet information in
1732  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1733  * other fields within the skb.
1734  **/
1735 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1736                                      union ixgbe_adv_rx_desc *rx_desc,
1737                                      struct sk_buff *skb)
1738 {
1739         struct net_device *dev = rx_ring->netdev;
1740         u32 flags = rx_ring->q_vector->adapter->flags;
1741
1742         ixgbe_update_rsc_stats(rx_ring, skb);
1743
1744         ixgbe_rx_hash(rx_ring, rx_desc, skb);
1745
1746         ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1747
1748         if (unlikely(flags & IXGBE_FLAG_RX_HWTSTAMP_ENABLED))
1749                 ixgbe_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
1750
1751         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1752             ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1753                 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1754                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1755         }
1756
1757         skb_record_rx_queue(skb, rx_ring->queue_index);
1758
1759         skb->protocol = eth_type_trans(skb, dev);
1760 }
1761
1762 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1763                          struct sk_buff *skb)
1764 {
1765         napi_gro_receive(&q_vector->napi, skb);
1766 }
1767
1768 /**
1769  * ixgbe_is_non_eop - process handling of non-EOP buffers
1770  * @rx_ring: Rx ring being processed
1771  * @rx_desc: Rx descriptor for current buffer
1772  * @skb: Current socket buffer containing buffer in progress
1773  *
1774  * This function updates next to clean.  If the buffer is an EOP buffer
1775  * this function exits returning false, otherwise it will place the
1776  * sk_buff in the next buffer to be chained and return true indicating
1777  * that this is in fact a non-EOP buffer.
1778  **/
1779 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1780                              union ixgbe_adv_rx_desc *rx_desc,
1781                              struct sk_buff *skb)
1782 {
1783         u32 ntc = rx_ring->next_to_clean + 1;
1784
1785         /* fetch, update, and store next to clean */
1786         ntc = (ntc < rx_ring->count) ? ntc : 0;
1787         rx_ring->next_to_clean = ntc;
1788
1789         prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1790
1791         /* update RSC append count if present */
1792         if (ring_is_rsc_enabled(rx_ring)) {
1793                 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1794                                      cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1795
1796                 if (unlikely(rsc_enabled)) {
1797                         u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1798
1799                         rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1800                         IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1801
1802                         /* update ntc based on RSC value */
1803                         ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1804                         ntc &= IXGBE_RXDADV_NEXTP_MASK;
1805                         ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1806                 }
1807         }
1808
1809         /* if we are the last buffer then there is nothing else to do */
1810         if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1811                 return false;
1812
1813         /* place skb in next buffer to be received */
1814         rx_ring->rx_buffer_info[ntc].skb = skb;
1815         rx_ring->rx_stats.non_eop_descs++;
1816
1817         return true;
1818 }
1819
1820 /**
1821  * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1822  * @rx_ring: rx descriptor ring packet is being transacted on
1823  * @skb: pointer to current skb being adjusted
1824  *
1825  * This function is an ixgbe specific version of __pskb_pull_tail.  The
1826  * main difference between this version and the original function is that
1827  * this function can make several assumptions about the state of things
1828  * that allow for significant optimizations versus the standard function.
1829  * As a result we can do things like drop a frag and maintain an accurate
1830  * truesize for the skb.
1831  */
1832 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1833                             struct sk_buff *skb)
1834 {
1835         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1836         unsigned char *va;
1837         unsigned int pull_len;
1838
1839         /*
1840          * it is valid to use page_address instead of kmap since we are
1841          * working with pages allocated out of the lomem pool per
1842          * alloc_page(GFP_ATOMIC)
1843          */
1844         va = skb_frag_address(frag);
1845
1846         /*
1847          * we need the header to contain the greater of either ETH_HLEN or
1848          * 60 bytes if the skb->len is less than 60 for skb_pad.
1849          */
1850         pull_len = eth_get_headlen(va, IXGBE_RX_HDR_SIZE);
1851
1852         /* align pull length to size of long to optimize memcpy performance */
1853         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1854
1855         /* update all of the pointers */
1856         skb_frag_size_sub(frag, pull_len);
1857         frag->page_offset += pull_len;
1858         skb->data_len -= pull_len;
1859         skb->tail += pull_len;
1860 }
1861
1862 /**
1863  * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1864  * @rx_ring: rx descriptor ring packet is being transacted on
1865  * @skb: pointer to current skb being updated
1866  *
1867  * This function provides a basic DMA sync up for the first fragment of an
1868  * skb.  The reason for doing this is that the first fragment cannot be
1869  * unmapped until we have reached the end of packet descriptor for a buffer
1870  * chain.
1871  */
1872 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1873                                 struct sk_buff *skb)
1874 {
1875         /* if the page was released unmap it, else just sync our portion */
1876         if (unlikely(IXGBE_CB(skb)->page_released)) {
1877                 dma_unmap_page_attrs(rx_ring->dev, IXGBE_CB(skb)->dma,
1878                                      ixgbe_rx_pg_size(rx_ring),
1879                                      DMA_FROM_DEVICE,
1880                                      IXGBE_RX_DMA_ATTR);
1881         } else {
1882                 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1883
1884                 dma_sync_single_range_for_cpu(rx_ring->dev,
1885                                               IXGBE_CB(skb)->dma,
1886                                               frag->page_offset,
1887                                               skb_frag_size(frag),
1888                                               DMA_FROM_DEVICE);
1889         }
1890 }
1891
1892 /**
1893  * ixgbe_cleanup_headers - Correct corrupted or empty headers
1894  * @rx_ring: rx descriptor ring packet is being transacted on
1895  * @rx_desc: pointer to the EOP Rx descriptor
1896  * @skb: pointer to current skb being fixed
1897  *
1898  * Check if the skb is valid in the XDP case it will be an error pointer.
1899  * Return true in this case to abort processing and advance to next
1900  * descriptor.
1901  *
1902  * Check for corrupted packet headers caused by senders on the local L2
1903  * embedded NIC switch not setting up their Tx Descriptors right.  These
1904  * should be very rare.
1905  *
1906  * Also address the case where we are pulling data in on pages only
1907  * and as such no data is present in the skb header.
1908  *
1909  * In addition if skb is not at least 60 bytes we need to pad it so that
1910  * it is large enough to qualify as a valid Ethernet frame.
1911  *
1912  * Returns true if an error was encountered and skb was freed.
1913  **/
1914 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1915                                   union ixgbe_adv_rx_desc *rx_desc,
1916                                   struct sk_buff *skb)
1917 {
1918         struct net_device *netdev = rx_ring->netdev;
1919
1920         /* XDP packets use error pointer so abort at this point */
1921         if (IS_ERR(skb))
1922                 return true;
1923
1924         /* verify that the packet does not have any known errors */
1925         if (unlikely(ixgbe_test_staterr(rx_desc,
1926                                         IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1927             !(netdev->features & NETIF_F_RXALL))) {
1928                 dev_kfree_skb_any(skb);
1929                 return true;
1930         }
1931
1932         /* place header in linear portion of buffer */
1933         if (!skb_headlen(skb))
1934                 ixgbe_pull_tail(rx_ring, skb);
1935
1936 #ifdef IXGBE_FCOE
1937         /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1938         if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1939                 return false;
1940
1941 #endif
1942         /* if eth_skb_pad returns an error the skb was freed */
1943         if (eth_skb_pad(skb))
1944                 return true;
1945
1946         return false;
1947 }
1948
1949 /**
1950  * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1951  * @rx_ring: rx descriptor ring to store buffers on
1952  * @old_buff: donor buffer to have page reused
1953  *
1954  * Synchronizes page for reuse by the adapter
1955  **/
1956 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1957                                 struct ixgbe_rx_buffer *old_buff)
1958 {
1959         struct ixgbe_rx_buffer *new_buff;
1960         u16 nta = rx_ring->next_to_alloc;
1961
1962         new_buff = &rx_ring->rx_buffer_info[nta];
1963
1964         /* update, and store next to alloc */
1965         nta++;
1966         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1967
1968         /* Transfer page from old buffer to new buffer.
1969          * Move each member individually to avoid possible store
1970          * forwarding stalls and unnecessary copy of skb.
1971          */
1972         new_buff->dma           = old_buff->dma;
1973         new_buff->page          = old_buff->page;
1974         new_buff->page_offset   = old_buff->page_offset;
1975         new_buff->pagecnt_bias  = old_buff->pagecnt_bias;
1976 }
1977
1978 static inline bool ixgbe_page_is_reserved(struct page *page)
1979 {
1980         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1981 }
1982
1983 static bool ixgbe_can_reuse_rx_page(struct ixgbe_rx_buffer *rx_buffer)
1984 {
1985         unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
1986         struct page *page = rx_buffer->page;
1987
1988         /* avoid re-using remote pages */
1989         if (unlikely(ixgbe_page_is_reserved(page)))
1990                 return false;
1991
1992 #if (PAGE_SIZE < 8192)
1993         /* if we are only owner of page we can reuse it */
1994         if (unlikely((page_ref_count(page) - pagecnt_bias) > 1))
1995                 return false;
1996 #else
1997         /* The last offset is a bit aggressive in that we assume the
1998          * worst case of FCoE being enabled and using a 3K buffer.
1999          * However this should have minimal impact as the 1K extra is
2000          * still less than one buffer in size.
2001          */
2002 #define IXGBE_LAST_OFFSET \
2003         (SKB_WITH_OVERHEAD(PAGE_SIZE) - IXGBE_RXBUFFER_3K)
2004         if (rx_buffer->page_offset > IXGBE_LAST_OFFSET)
2005                 return false;
2006 #endif
2007
2008         /* If we have drained the page fragment pool we need to update
2009          * the pagecnt_bias and page count so that we fully restock the
2010          * number of references the driver holds.
2011          */
2012         if (unlikely(!pagecnt_bias)) {
2013                 page_ref_add(page, USHRT_MAX);
2014                 rx_buffer->pagecnt_bias = USHRT_MAX;
2015         }
2016
2017         return true;
2018 }
2019
2020 /**
2021  * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
2022  * @rx_ring: rx descriptor ring to transact packets on
2023  * @rx_buffer: buffer containing page to add
2024  * @rx_desc: descriptor containing length of buffer written by hardware
2025  * @skb: sk_buff to place the data into
2026  *
2027  * This function will add the data contained in rx_buffer->page to the skb.
2028  * This is done either through a direct copy if the data in the buffer is
2029  * less than the skb header size, otherwise it will just attach the page as
2030  * a frag to the skb.
2031  *
2032  * The function will then update the page offset if necessary and return
2033  * true if the buffer can be reused by the adapter.
2034  **/
2035 static void ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
2036                               struct ixgbe_rx_buffer *rx_buffer,
2037                               struct sk_buff *skb,
2038                               unsigned int size)
2039 {
2040 #if (PAGE_SIZE < 8192)
2041         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2042 #else
2043         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
2044                                 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) :
2045                                 SKB_DATA_ALIGN(size);
2046 #endif
2047         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
2048                         rx_buffer->page_offset, size, truesize);
2049 #if (PAGE_SIZE < 8192)
2050         rx_buffer->page_offset ^= truesize;
2051 #else
2052         rx_buffer->page_offset += truesize;
2053 #endif
2054 }
2055
2056 static struct ixgbe_rx_buffer *ixgbe_get_rx_buffer(struct ixgbe_ring *rx_ring,
2057                                                    union ixgbe_adv_rx_desc *rx_desc,
2058                                                    struct sk_buff **skb,
2059                                                    const unsigned int size)
2060 {
2061         struct ixgbe_rx_buffer *rx_buffer;
2062
2063         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
2064         prefetchw(rx_buffer->page);
2065         *skb = rx_buffer->skb;
2066
2067         /* Delay unmapping of the first packet. It carries the header
2068          * information, HW may still access the header after the writeback.
2069          * Only unmap it when EOP is reached
2070          */
2071         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)) {
2072                 if (!*skb)
2073                         goto skip_sync;
2074         } else {
2075                 if (*skb)
2076                         ixgbe_dma_sync_frag(rx_ring, *skb);
2077         }
2078
2079         /* we are reusing so sync this buffer for CPU use */
2080         dma_sync_single_range_for_cpu(rx_ring->dev,
2081                                       rx_buffer->dma,
2082                                       rx_buffer->page_offset,
2083                                       size,
2084                                       DMA_FROM_DEVICE);
2085 skip_sync:
2086         rx_buffer->pagecnt_bias--;
2087
2088         return rx_buffer;
2089 }
2090
2091 static void ixgbe_put_rx_buffer(struct ixgbe_ring *rx_ring,
2092                                 struct ixgbe_rx_buffer *rx_buffer,
2093                                 struct sk_buff *skb)
2094 {
2095         if (ixgbe_can_reuse_rx_page(rx_buffer)) {
2096                 /* hand second half of page back to the ring */
2097                 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2098         } else {
2099                 if (!IS_ERR(skb) && IXGBE_CB(skb)->dma == rx_buffer->dma) {
2100                         /* the page has been released from the ring */
2101                         IXGBE_CB(skb)->page_released = true;
2102                 } else {
2103                         /* we are not reusing the buffer so unmap it */
2104                         dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
2105                                              ixgbe_rx_pg_size(rx_ring),
2106                                              DMA_FROM_DEVICE,
2107                                              IXGBE_RX_DMA_ATTR);
2108                 }
2109                 __page_frag_cache_drain(rx_buffer->page,
2110                                         rx_buffer->pagecnt_bias);
2111         }
2112
2113         /* clear contents of rx_buffer */
2114         rx_buffer->page = NULL;
2115         rx_buffer->skb = NULL;
2116 }
2117
2118 static struct sk_buff *ixgbe_construct_skb(struct ixgbe_ring *rx_ring,
2119                                            struct ixgbe_rx_buffer *rx_buffer,
2120                                            struct xdp_buff *xdp,
2121                                            union ixgbe_adv_rx_desc *rx_desc)
2122 {
2123         unsigned int size = xdp->data_end - xdp->data;
2124 #if (PAGE_SIZE < 8192)
2125         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2126 #else
2127         unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end -
2128                                                xdp->data_hard_start);
2129 #endif
2130         struct sk_buff *skb;
2131
2132         /* prefetch first cache line of first page */
2133         prefetch(xdp->data);
2134 #if L1_CACHE_BYTES < 128
2135         prefetch(xdp->data + L1_CACHE_BYTES);
2136 #endif
2137         /* Note, we get here by enabling legacy-rx via:
2138          *
2139          *    ethtool --set-priv-flags <dev> legacy-rx on
2140          *
2141          * In this mode, we currently get 0 extra XDP headroom as
2142          * opposed to having legacy-rx off, where we process XDP
2143          * packets going to stack via ixgbe_build_skb(). The latter
2144          * provides us currently with 192 bytes of headroom.
2145          *
2146          * For ixgbe_construct_skb() mode it means that the
2147          * xdp->data_meta will always point to xdp->data, since
2148          * the helper cannot expand the head. Should this ever
2149          * change in future for legacy-rx mode on, then lets also
2150          * add xdp->data_meta handling here.
2151          */
2152
2153         /* allocate a skb to store the frags */
2154         skb = napi_alloc_skb(&rx_ring->q_vector->napi, IXGBE_RX_HDR_SIZE);
2155         if (unlikely(!skb))
2156                 return NULL;
2157
2158         if (size > IXGBE_RX_HDR_SIZE) {
2159                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2160                         IXGBE_CB(skb)->dma = rx_buffer->dma;
2161
2162                 skb_add_rx_frag(skb, 0, rx_buffer->page,
2163                                 xdp->data - page_address(rx_buffer->page),
2164                                 size, truesize);
2165 #if (PAGE_SIZE < 8192)
2166                 rx_buffer->page_offset ^= truesize;
2167 #else
2168                 rx_buffer->page_offset += truesize;
2169 #endif
2170         } else {
2171                 memcpy(__skb_put(skb, size),
2172                        xdp->data, ALIGN(size, sizeof(long)));
2173                 rx_buffer->pagecnt_bias++;
2174         }
2175
2176         return skb;
2177 }
2178
2179 static struct sk_buff *ixgbe_build_skb(struct ixgbe_ring *rx_ring,
2180                                        struct ixgbe_rx_buffer *rx_buffer,
2181                                        struct xdp_buff *xdp,
2182                                        union ixgbe_adv_rx_desc *rx_desc)
2183 {
2184         unsigned int metasize = xdp->data - xdp->data_meta;
2185 #if (PAGE_SIZE < 8192)
2186         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2187 #else
2188         unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
2189                                 SKB_DATA_ALIGN(xdp->data_end -
2190                                                xdp->data_hard_start);
2191 #endif
2192         struct sk_buff *skb;
2193
2194         /* Prefetch first cache line of first page. If xdp->data_meta
2195          * is unused, this points extactly as xdp->data, otherwise we
2196          * likely have a consumer accessing first few bytes of meta
2197          * data, and then actual data.
2198          */
2199         prefetch(xdp->data_meta);
2200 #if L1_CACHE_BYTES < 128
2201         prefetch(xdp->data_meta + L1_CACHE_BYTES);
2202 #endif
2203
2204         /* build an skb to around the page buffer */
2205         skb = build_skb(xdp->data_hard_start, truesize);
2206         if (unlikely(!skb))
2207                 return NULL;
2208
2209         /* update pointers within the skb to store the data */
2210         skb_reserve(skb, xdp->data - xdp->data_hard_start);
2211         __skb_put(skb, xdp->data_end - xdp->data);
2212         if (metasize)
2213                 skb_metadata_set(skb, metasize);
2214
2215         /* record DMA address if this is the start of a chain of buffers */
2216         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2217                 IXGBE_CB(skb)->dma = rx_buffer->dma;
2218
2219         /* update buffer offset */
2220 #if (PAGE_SIZE < 8192)
2221         rx_buffer->page_offset ^= truesize;
2222 #else
2223         rx_buffer->page_offset += truesize;
2224 #endif
2225
2226         return skb;
2227 }
2228
2229 #define IXGBE_XDP_PASS 0
2230 #define IXGBE_XDP_CONSUMED 1
2231 #define IXGBE_XDP_TX 2
2232
2233 static int ixgbe_xmit_xdp_ring(struct ixgbe_adapter *adapter,
2234                                struct xdp_buff *xdp);
2235
2236 static struct sk_buff *ixgbe_run_xdp(struct ixgbe_adapter *adapter,
2237                                      struct ixgbe_ring *rx_ring,
2238                                      struct xdp_buff *xdp)
2239 {
2240         int err, result = IXGBE_XDP_PASS;
2241         struct bpf_prog *xdp_prog;
2242         u32 act;
2243
2244         rcu_read_lock();
2245         xdp_prog = READ_ONCE(rx_ring->xdp_prog);
2246
2247         if (!xdp_prog)
2248                 goto xdp_out;
2249
2250         act = bpf_prog_run_xdp(xdp_prog, xdp);
2251         switch (act) {
2252         case XDP_PASS:
2253                 break;
2254         case XDP_TX:
2255                 result = ixgbe_xmit_xdp_ring(adapter, xdp);
2256                 break;
2257         case XDP_REDIRECT:
2258                 err = xdp_do_redirect(adapter->netdev, xdp, xdp_prog);
2259                 if (!err)
2260                         result = IXGBE_XDP_TX;
2261                 else
2262                         result = IXGBE_XDP_CONSUMED;
2263                 break;
2264         default:
2265                 bpf_warn_invalid_xdp_action(act);
2266                 /* fallthrough */
2267         case XDP_ABORTED:
2268                 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
2269                 /* fallthrough -- handle aborts by dropping packet */
2270         case XDP_DROP:
2271                 result = IXGBE_XDP_CONSUMED;
2272                 break;
2273         }
2274 xdp_out:
2275         rcu_read_unlock();
2276         return ERR_PTR(-result);
2277 }
2278
2279 static void ixgbe_rx_buffer_flip(struct ixgbe_ring *rx_ring,
2280                                  struct ixgbe_rx_buffer *rx_buffer,
2281                                  unsigned int size)
2282 {
2283 #if (PAGE_SIZE < 8192)
2284         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2285
2286         rx_buffer->page_offset ^= truesize;
2287 #else
2288         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
2289                                 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) :
2290                                 SKB_DATA_ALIGN(size);
2291
2292         rx_buffer->page_offset += truesize;
2293 #endif
2294 }
2295
2296 /**
2297  * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2298  * @q_vector: structure containing interrupt and ring information
2299  * @rx_ring: rx descriptor ring to transact packets on
2300  * @budget: Total limit on number of packets to process
2301  *
2302  * This function provides a "bounce buffer" approach to Rx interrupt
2303  * processing.  The advantage to this is that on systems that have
2304  * expensive overhead for IOMMU access this provides a means of avoiding
2305  * it by maintaining the mapping of the page to the syste.
2306  *
2307  * Returns amount of work completed
2308  **/
2309 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2310                                struct ixgbe_ring *rx_ring,
2311                                const int budget)
2312 {
2313         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2314         struct ixgbe_adapter *adapter = q_vector->adapter;
2315 #ifdef IXGBE_FCOE
2316         int ddp_bytes;
2317         unsigned int mss = 0;
2318 #endif /* IXGBE_FCOE */
2319         u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2320         bool xdp_xmit = false;
2321
2322         while (likely(total_rx_packets < budget)) {
2323                 union ixgbe_adv_rx_desc *rx_desc;
2324                 struct ixgbe_rx_buffer *rx_buffer;
2325                 struct sk_buff *skb;
2326                 struct xdp_buff xdp;
2327                 unsigned int size;
2328
2329                 /* return some buffers to hardware, one at a time is too slow */
2330                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2331                         ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2332                         cleaned_count = 0;
2333                 }
2334
2335                 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2336                 size = le16_to_cpu(rx_desc->wb.upper.length);
2337                 if (!size)
2338                         break;
2339
2340                 /* This memory barrier is needed to keep us from reading
2341                  * any other fields out of the rx_desc until we know the
2342                  * descriptor has been written back
2343                  */
2344                 dma_rmb();
2345
2346                 rx_buffer = ixgbe_get_rx_buffer(rx_ring, rx_desc, &skb, size);
2347
2348                 /* retrieve a buffer from the ring */
2349                 if (!skb) {
2350                         xdp.data = page_address(rx_buffer->page) +
2351                                    rx_buffer->page_offset;
2352                         xdp.data_meta = xdp.data;
2353                         xdp.data_hard_start = xdp.data -
2354                                               ixgbe_rx_offset(rx_ring);
2355                         xdp.data_end = xdp.data + size;
2356
2357                         skb = ixgbe_run_xdp(adapter, rx_ring, &xdp);
2358                 }
2359
2360                 if (IS_ERR(skb)) {
2361                         if (PTR_ERR(skb) == -IXGBE_XDP_TX) {
2362                                 xdp_xmit = true;
2363                                 ixgbe_rx_buffer_flip(rx_ring, rx_buffer, size);
2364                         } else {
2365                                 rx_buffer->pagecnt_bias++;
2366                         }
2367                         total_rx_packets++;
2368                         total_rx_bytes += size;
2369                 } else if (skb) {
2370                         ixgbe_add_rx_frag(rx_ring, rx_buffer, skb, size);
2371                 } else if (ring_uses_build_skb(rx_ring)) {
2372                         skb = ixgbe_build_skb(rx_ring, rx_buffer,
2373                                               &xdp, rx_desc);
2374                 } else {
2375                         skb = ixgbe_construct_skb(rx_ring, rx_buffer,
2376                                                   &xdp, rx_desc);
2377                 }
2378
2379                 /* exit if we failed to retrieve a buffer */
2380                 if (!skb) {
2381                         rx_ring->rx_stats.alloc_rx_buff_failed++;
2382                         rx_buffer->pagecnt_bias++;
2383                         break;
2384                 }
2385
2386                 ixgbe_put_rx_buffer(rx_ring, rx_buffer, skb);
2387                 cleaned_count++;
2388
2389                 /* place incomplete frames back on ring for completion */
2390                 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2391                         continue;
2392
2393                 /* verify the packet layout is correct */
2394                 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2395                         continue;
2396
2397                 /* probably a little skewed due to removing CRC */
2398                 total_rx_bytes += skb->len;
2399
2400                 /* populate checksum, timestamp, VLAN, and protocol */
2401                 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2402
2403 #ifdef IXGBE_FCOE
2404                 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2405                 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2406                         ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2407                         /* include DDPed FCoE data */
2408                         if (ddp_bytes > 0) {
2409                                 if (!mss) {
2410                                         mss = rx_ring->netdev->mtu -
2411                                                 sizeof(struct fcoe_hdr) -
2412                                                 sizeof(struct fc_frame_header) -
2413                                                 sizeof(struct fcoe_crc_eof);
2414                                         if (mss > 512)
2415                                                 mss &= ~511;
2416                                 }
2417                                 total_rx_bytes += ddp_bytes;
2418                                 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2419                                                                  mss);
2420                         }
2421                         if (!ddp_bytes) {
2422                                 dev_kfree_skb_any(skb);
2423                                 continue;
2424                         }
2425                 }
2426
2427 #endif /* IXGBE_FCOE */
2428                 ixgbe_rx_skb(q_vector, skb);
2429
2430                 /* update budget accounting */
2431                 total_rx_packets++;
2432         }
2433
2434         if (xdp_xmit) {
2435                 struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
2436
2437                 /* Force memory writes to complete before letting h/w
2438                  * know there are new descriptors to fetch.
2439                  */
2440                 wmb();
2441                 writel(ring->next_to_use, ring->tail);
2442
2443                 xdp_do_flush_map();
2444         }
2445
2446         u64_stats_update_begin(&rx_ring->syncp);
2447         rx_ring->stats.packets += total_rx_packets;
2448         rx_ring->stats.bytes += total_rx_bytes;
2449         u64_stats_update_end(&rx_ring->syncp);
2450         q_vector->rx.total_packets += total_rx_packets;
2451         q_vector->rx.total_bytes += total_rx_bytes;
2452
2453         return total_rx_packets;
2454 }
2455
2456 /**
2457  * ixgbe_configure_msix - Configure MSI-X hardware
2458  * @adapter: board private structure
2459  *
2460  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2461  * interrupts.
2462  **/
2463 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2464 {
2465         struct ixgbe_q_vector *q_vector;
2466         int v_idx;
2467         u32 mask;
2468
2469         /* Populate MSIX to EITR Select */
2470         if (adapter->num_vfs > 32) {
2471                 u32 eitrsel = BIT(adapter->num_vfs - 32) - 1;
2472                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2473         }
2474
2475         /*
2476          * Populate the IVAR table and set the ITR values to the
2477          * corresponding register.
2478          */
2479         for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2480                 struct ixgbe_ring *ring;
2481                 q_vector = adapter->q_vector[v_idx];
2482
2483                 ixgbe_for_each_ring(ring, q_vector->rx)
2484                         ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2485
2486                 ixgbe_for_each_ring(ring, q_vector->tx)
2487                         ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2488
2489                 ixgbe_write_eitr(q_vector);
2490         }
2491
2492         switch (adapter->hw.mac.type) {
2493         case ixgbe_mac_82598EB:
2494                 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2495                                v_idx);
2496                 break;
2497         case ixgbe_mac_82599EB:
2498         case ixgbe_mac_X540:
2499         case ixgbe_mac_X550:
2500         case ixgbe_mac_X550EM_x:
2501         case ixgbe_mac_x550em_a:
2502                 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2503                 break;
2504         default:
2505                 break;
2506         }
2507         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2508
2509         /* set up to autoclear timer, and the vectors */
2510         mask = IXGBE_EIMS_ENABLE_MASK;
2511         mask &= ~(IXGBE_EIMS_OTHER |
2512                   IXGBE_EIMS_MAILBOX |
2513                   IXGBE_EIMS_LSC);
2514
2515         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2516 }
2517
2518 enum latency_range {
2519         lowest_latency = 0,
2520         low_latency = 1,
2521         bulk_latency = 2,
2522         latency_invalid = 255
2523 };
2524
2525 /**
2526  * ixgbe_update_itr - update the dynamic ITR value based on statistics
2527  * @q_vector: structure containing interrupt and ring information
2528  * @ring_container: structure containing ring performance data
2529  *
2530  *      Stores a new ITR value based on packets and byte
2531  *      counts during the last interrupt.  The advantage of per interrupt
2532  *      computation is faster updates and more accurate ITR for the current
2533  *      traffic pattern.  Constants in this function were computed
2534  *      based on theoretical maximum wire speed and thresholds were set based
2535  *      on testing data as well as attempting to minimize response time
2536  *      while increasing bulk throughput.
2537  *      this functionality is controlled by the InterruptThrottleRate module
2538  *      parameter (see ixgbe_param.c)
2539  **/
2540 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2541                              struct ixgbe_ring_container *ring_container)
2542 {
2543         unsigned int itr = IXGBE_ITR_ADAPTIVE_MIN_USECS |
2544                            IXGBE_ITR_ADAPTIVE_LATENCY;
2545         unsigned int avg_wire_size, packets, bytes;
2546         unsigned long next_update = jiffies;
2547
2548         /* If we don't have any rings just leave ourselves set for maximum
2549          * possible latency so we take ourselves out of the equation.
2550          */
2551         if (!ring_container->ring)
2552                 return;
2553
2554         /* If we didn't update within up to 1 - 2 jiffies we can assume
2555          * that either packets are coming in so slow there hasn't been
2556          * any work, or that there is so much work that NAPI is dealing
2557          * with interrupt moderation and we don't need to do anything.
2558          */
2559         if (time_after(next_update, ring_container->next_update))
2560                 goto clear_counts;
2561
2562         packets = ring_container->total_packets;
2563
2564         /* We have no packets to actually measure against. This means
2565          * either one of the other queues on this vector is active or
2566          * we are a Tx queue doing TSO with too high of an interrupt rate.
2567          *
2568          * When this occurs just tick up our delay by the minimum value
2569          * and hope that this extra delay will prevent us from being called
2570          * without any work on our queue.
2571          */
2572         if (!packets) {
2573                 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;
2574                 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)
2575                         itr = IXGBE_ITR_ADAPTIVE_MAX_USECS;
2576                 itr += ring_container->itr & IXGBE_ITR_ADAPTIVE_LATENCY;
2577                 goto clear_counts;
2578         }
2579
2580         bytes = ring_container->total_bytes;
2581
2582         /* If packets are less than 4 or bytes are less than 9000 assume
2583          * insufficient data to use bulk rate limiting approach. We are
2584          * likely latency driven.
2585          */
2586         if (packets < 4 && bytes < 9000) {
2587                 itr = IXGBE_ITR_ADAPTIVE_LATENCY;
2588                 goto adjust_by_size;
2589         }
2590
2591         /* Between 4 and 48 we can assume that our current interrupt delay
2592          * is only slightly too low. As such we should increase it by a small
2593          * fixed amount.
2594          */
2595         if (packets < 48) {
2596                 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;
2597                 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)
2598                         itr = IXGBE_ITR_ADAPTIVE_MAX_USECS;
2599                 goto clear_counts;
2600         }
2601
2602         /* Between 48 and 96 is our "goldilocks" zone where we are working
2603          * out "just right". Just report that our current ITR is good for us.
2604          */
2605         if (packets < 96) {
2606                 itr = q_vector->itr >> 2;
2607                 goto clear_counts;
2608         }
2609
2610         /* If packet count is 96 or greater we are likely looking at a slight
2611          * overrun of the delay we want. Try halving our delay to see if that
2612          * will cut the number of packets in half per interrupt.
2613          */
2614         if (packets < 256) {
2615                 itr = q_vector->itr >> 3;
2616                 if (itr < IXGBE_ITR_ADAPTIVE_MIN_USECS)
2617                         itr = IXGBE_ITR_ADAPTIVE_MIN_USECS;
2618                 goto clear_counts;
2619         }
2620
2621         /* The paths below assume we are dealing with a bulk ITR since number
2622          * of packets is 256 or greater. We are just going to have to compute
2623          * a value and try to bring the count under control, though for smaller
2624          * packet sizes there isn't much we can do as NAPI polling will likely
2625          * be kicking in sooner rather than later.
2626          */
2627         itr = IXGBE_ITR_ADAPTIVE_BULK;
2628
2629 adjust_by_size:
2630         /* If packet counts are 256 or greater we can assume we have a gross
2631          * overestimation of what the rate should be. Instead of trying to fine
2632          * tune it just use the formula below to try and dial in an exact value
2633          * give the current packet size of the frame.
2634          */
2635         avg_wire_size = bytes / packets;
2636
2637         /* The following is a crude approximation of:
2638          *  wmem_default / (size + overhead) = desired_pkts_per_int
2639          *  rate / bits_per_byte / (size + ethernet overhead) = pkt_rate
2640          *  (desired_pkt_rate / pkt_rate) * usecs_per_sec = ITR value
2641          *
2642          * Assuming wmem_default is 212992 and overhead is 640 bytes per
2643          * packet, (256 skb, 64 headroom, 320 shared info), we can reduce the
2644          * formula down to
2645          *
2646          *  (170 * (size + 24)) / (size + 640) = ITR
2647          *
2648          * We first do some math on the packet size and then finally bitshift
2649          * by 8 after rounding up. We also have to account for PCIe link speed
2650          * difference as ITR scales based on this.
2651          */
2652         if (avg_wire_size <= 60) {
2653                 /* Start at 50k ints/sec */
2654                 avg_wire_size = 5120;
2655         } else if (avg_wire_size <= 316) {
2656                 /* 50K ints/sec to 16K ints/sec */
2657                 avg_wire_size *= 40;
2658                 avg_wire_size += 2720;
2659         } else if (avg_wire_size <= 1084) {
2660                 /* 16K ints/sec to 9.2K ints/sec */
2661                 avg_wire_size *= 15;
2662                 avg_wire_size += 11452;
2663         } else if (avg_wire_size <= 1980) {
2664                 /* 9.2K ints/sec to 8K ints/sec */
2665                 avg_wire_size *= 5;
2666                 avg_wire_size += 22420;
2667         } else {
2668                 /* plateau at a limit of 8K ints/sec */
2669                 avg_wire_size = 32256;
2670         }
2671
2672         /* If we are in low latency mode half our delay which doubles the rate
2673          * to somewhere between 100K to 16K ints/sec
2674          */
2675         if (itr & IXGBE_ITR_ADAPTIVE_LATENCY)
2676                 avg_wire_size >>= 1;
2677
2678         /* Resultant value is 256 times larger than it needs to be. This
2679          * gives us room to adjust the value as needed to either increase
2680          * or decrease the value based on link speeds of 10G, 2.5G, 1G, etc.
2681          *
2682          * Use addition as we have already recorded the new latency flag
2683          * for the ITR value.
2684          */
2685         switch (q_vector->adapter->link_speed) {
2686         case IXGBE_LINK_SPEED_10GB_FULL:
2687         case IXGBE_LINK_SPEED_100_FULL:
2688         default:
2689                 itr += DIV_ROUND_UP(avg_wire_size,
2690                                     IXGBE_ITR_ADAPTIVE_MIN_INC * 256) *
2691                        IXGBE_ITR_ADAPTIVE_MIN_INC;
2692                 break;
2693         case IXGBE_LINK_SPEED_2_5GB_FULL:
2694         case IXGBE_LINK_SPEED_1GB_FULL:
2695         case IXGBE_LINK_SPEED_10_FULL:
2696                 itr += DIV_ROUND_UP(avg_wire_size,
2697                                     IXGBE_ITR_ADAPTIVE_MIN_INC * 64) *
2698                        IXGBE_ITR_ADAPTIVE_MIN_INC;
2699                 break;
2700         }
2701
2702 clear_counts:
2703         /* write back value */
2704         ring_container->itr = itr;
2705
2706         /* next update should occur within next jiffy */
2707         ring_container->next_update = next_update + 1;
2708
2709         ring_container->total_bytes = 0;
2710         ring_container->total_packets = 0;
2711 }
2712
2713 /**
2714  * ixgbe_write_eitr - write EITR register in hardware specific way
2715  * @q_vector: structure containing interrupt and ring information
2716  *
2717  * This function is made to be called by ethtool and by the driver
2718  * when it needs to update EITR registers at runtime.  Hardware
2719  * specific quirks/differences are taken care of here.
2720  */
2721 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2722 {
2723         struct ixgbe_adapter *adapter = q_vector->adapter;
2724         struct ixgbe_hw *hw = &adapter->hw;
2725         int v_idx = q_vector->v_idx;
2726         u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2727
2728         switch (adapter->hw.mac.type) {
2729         case ixgbe_mac_82598EB:
2730                 /* must write high and low 16 bits to reset counter */
2731                 itr_reg |= (itr_reg << 16);
2732                 break;
2733         case ixgbe_mac_82599EB:
2734         case ixgbe_mac_X540:
2735         case ixgbe_mac_X550:
2736         case ixgbe_mac_X550EM_x:
2737         case ixgbe_mac_x550em_a:
2738                 /*
2739                  * set the WDIS bit to not clear the timer bits and cause an
2740                  * immediate assertion of the interrupt
2741                  */
2742                 itr_reg |= IXGBE_EITR_CNT_WDIS;
2743                 break;
2744         default:
2745                 break;
2746         }
2747         IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2748 }
2749
2750 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2751 {
2752         u32 new_itr;
2753
2754         ixgbe_update_itr(q_vector, &q_vector->tx);
2755         ixgbe_update_itr(q_vector, &q_vector->rx);
2756
2757         /* use the smallest value of new ITR delay calculations */
2758         new_itr = min(q_vector->rx.itr, q_vector->tx.itr);
2759
2760         /* Clear latency flag if set, shift into correct position */
2761         new_itr &= ~IXGBE_ITR_ADAPTIVE_LATENCY;
2762         new_itr <<= 2;
2763
2764         if (new_itr != q_vector->itr) {
2765                 /* save the algorithm value here */
2766                 q_vector->itr = new_itr;
2767
2768                 ixgbe_write_eitr(q_vector);
2769         }
2770 }
2771
2772 /**
2773  * ixgbe_check_overtemp_subtask - check for over temperature
2774  * @adapter: pointer to adapter
2775  **/
2776 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2777 {
2778         struct ixgbe_hw *hw = &adapter->hw;
2779         u32 eicr = adapter->interrupt_event;
2780         s32 rc;
2781
2782         if (test_bit(__IXGBE_DOWN, &adapter->state))
2783                 return;
2784
2785         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2786                 return;
2787
2788         adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2789
2790         switch (hw->device_id) {
2791         case IXGBE_DEV_ID_82599_T3_LOM:
2792                 /*
2793                  * Since the warning interrupt is for both ports
2794                  * we don't have to check if:
2795                  *  - This interrupt wasn't for our port.
2796                  *  - We may have missed the interrupt so always have to
2797                  *    check if we  got a LSC
2798                  */
2799                 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2800                     !(eicr & IXGBE_EICR_LSC))
2801                         return;
2802
2803                 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2804                         u32 speed;
2805                         bool link_up = false;
2806
2807                         hw->mac.ops.check_link(hw, &speed, &link_up, false);
2808
2809                         if (link_up)
2810                                 return;
2811                 }
2812
2813                 /* Check if this is not due to overtemp */
2814                 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2815                         return;
2816
2817                 break;
2818         case IXGBE_DEV_ID_X550EM_A_1G_T:
2819         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
2820                 rc = hw->phy.ops.check_overtemp(hw);
2821                 if (rc != IXGBE_ERR_OVERTEMP)
2822                         return;
2823                 break;
2824         default:
2825                 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2826                         return;
2827                 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2828                         return;
2829                 break;
2830         }
2831         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2832
2833         adapter->interrupt_event = 0;
2834 }
2835
2836 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2837 {
2838         struct ixgbe_hw *hw = &adapter->hw;
2839
2840         if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2841             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2842                 e_crit(probe, "Fan has stopped, replace the adapter\n");
2843                 /* write to clear the interrupt */
2844                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2845         }
2846 }
2847
2848 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2849 {
2850         struct ixgbe_hw *hw = &adapter->hw;
2851
2852         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2853                 return;
2854
2855         switch (adapter->hw.mac.type) {
2856         case ixgbe_mac_82599EB:
2857                 /*
2858                  * Need to check link state so complete overtemp check
2859                  * on service task
2860                  */
2861                 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2862                      (eicr & IXGBE_EICR_LSC)) &&
2863                     (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2864                         adapter->interrupt_event = eicr;
2865                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2866                         ixgbe_service_event_schedule(adapter);
2867                         return;
2868                 }
2869                 return;
2870         case ixgbe_mac_x550em_a:
2871                 if (eicr & IXGBE_EICR_GPI_SDP0_X550EM_a) {
2872                         adapter->interrupt_event = eicr;
2873                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2874                         ixgbe_service_event_schedule(adapter);
2875                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
2876                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2877                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICR,
2878                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2879                 }
2880                 return;
2881         case ixgbe_mac_X550:
2882         case ixgbe_mac_X540:
2883                 if (!(eicr & IXGBE_EICR_TS))
2884                         return;
2885                 break;
2886         default:
2887                 return;
2888         }
2889
2890         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2891 }
2892
2893 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2894 {
2895         switch (hw->mac.type) {
2896         case ixgbe_mac_82598EB:
2897                 if (hw->phy.type == ixgbe_phy_nl)
2898                         return true;
2899                 return false;
2900         case ixgbe_mac_82599EB:
2901         case ixgbe_mac_X550EM_x:
2902         case ixgbe_mac_x550em_a:
2903                 switch (hw->mac.ops.get_media_type(hw)) {
2904                 case ixgbe_media_type_fiber:
2905                 case ixgbe_media_type_fiber_qsfp:
2906                         return true;
2907                 default:
2908                         return false;
2909                 }
2910         default:
2911                 return false;
2912         }
2913 }
2914
2915 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2916 {
2917         struct ixgbe_hw *hw = &adapter->hw;
2918         u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw);
2919
2920         if (!ixgbe_is_sfp(hw))
2921                 return;
2922
2923         /* Later MAC's use different SDP */
2924         if (hw->mac.type >= ixgbe_mac_X540)
2925                 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2926
2927         if (eicr & eicr_mask) {
2928                 /* Clear the interrupt */
2929                 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2930                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2931                         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2932                         adapter->sfp_poll_time = 0;
2933                         ixgbe_service_event_schedule(adapter);
2934                 }
2935         }
2936
2937         if (adapter->hw.mac.type == ixgbe_mac_82599EB &&
2938             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2939                 /* Clear the interrupt */
2940                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2941                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2942                         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2943                         ixgbe_service_event_schedule(adapter);
2944                 }
2945         }
2946 }
2947
2948 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2949 {
2950         struct ixgbe_hw *hw = &adapter->hw;
2951
2952         adapter->lsc_int++;
2953         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2954         adapter->link_check_timeout = jiffies;
2955         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2956                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2957                 IXGBE_WRITE_FLUSH(hw);
2958                 ixgbe_service_event_schedule(adapter);
2959         }
2960 }
2961
2962 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2963                                            u64 qmask)
2964 {
2965         u32 mask;
2966         struct ixgbe_hw *hw = &adapter->hw;
2967
2968         switch (hw->mac.type) {
2969         case ixgbe_mac_82598EB:
2970                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2971                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2972                 break;
2973         case ixgbe_mac_82599EB:
2974         case ixgbe_mac_X540:
2975         case ixgbe_mac_X550:
2976         case ixgbe_mac_X550EM_x:
2977         case ixgbe_mac_x550em_a:
2978                 mask = (qmask & 0xFFFFFFFF);
2979                 if (mask)
2980                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2981                 mask = (qmask >> 32);
2982                 if (mask)
2983                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2984                 break;
2985         default:
2986                 break;
2987         }
2988         /* skip the flush */
2989 }
2990
2991 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2992                                             u64 qmask)
2993 {
2994         u32 mask;
2995         struct ixgbe_hw *hw = &adapter->hw;
2996
2997         switch (hw->mac.type) {
2998         case ixgbe_mac_82598EB:
2999                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
3000                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
3001                 break;
3002         case ixgbe_mac_82599EB:
3003         case ixgbe_mac_X540:
3004         case ixgbe_mac_X550:
3005         case ixgbe_mac_X550EM_x:
3006         case ixgbe_mac_x550em_a:
3007                 mask = (qmask & 0xFFFFFFFF);
3008                 if (mask)
3009                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
3010                 mask = (qmask >> 32);
3011                 if (mask)
3012                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
3013                 break;
3014         default:
3015                 break;
3016         }
3017         /* skip the flush */
3018 }
3019
3020 /**
3021  * ixgbe_irq_enable - Enable default interrupt generation settings
3022  * @adapter: board private structure
3023  **/
3024 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
3025                                     bool flush)
3026 {
3027         struct ixgbe_hw *hw = &adapter->hw;
3028         u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
3029
3030         /* don't reenable LSC while waiting for link */
3031         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
3032                 mask &= ~IXGBE_EIMS_LSC;
3033
3034         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
3035                 switch (adapter->hw.mac.type) {
3036                 case ixgbe_mac_82599EB:
3037                         mask |= IXGBE_EIMS_GPI_SDP0(hw);
3038                         break;
3039                 case ixgbe_mac_X540:
3040                 case ixgbe_mac_X550:
3041                 case ixgbe_mac_X550EM_x:
3042                 case ixgbe_mac_x550em_a:
3043                         mask |= IXGBE_EIMS_TS;
3044                         break;
3045                 default:
3046                         break;
3047                 }
3048         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
3049                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
3050         switch (adapter->hw.mac.type) {
3051         case ixgbe_mac_82599EB:
3052                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
3053                 mask |= IXGBE_EIMS_GPI_SDP2(hw);
3054                 /* fall through */
3055         case ixgbe_mac_X540:
3056         case ixgbe_mac_X550:
3057         case ixgbe_mac_X550EM_x:
3058         case ixgbe_mac_x550em_a:
3059                 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP ||
3060                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP ||
3061                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP_N)
3062                         mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw);
3063                 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
3064                         mask |= IXGBE_EICR_GPI_SDP0_X540;
3065                 mask |= IXGBE_EIMS_ECC;
3066                 mask |= IXGBE_EIMS_MAILBOX;
3067                 break;
3068         default:
3069                 break;
3070         }
3071
3072         if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
3073             !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
3074                 mask |= IXGBE_EIMS_FLOW_DIR;
3075
3076         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
3077         if (queues)
3078                 ixgbe_irq_enable_queues(adapter, ~0);
3079         if (flush)
3080                 IXGBE_WRITE_FLUSH(&adapter->hw);
3081 }
3082
3083 static irqreturn_t ixgbe_msix_other(int irq, void *data)
3084 {
3085         struct ixgbe_adapter *adapter = data;
3086         struct ixgbe_hw *hw = &adapter->hw;
3087         u32 eicr;
3088
3089         /*
3090          * Workaround for Silicon errata.  Use clear-by-write instead
3091          * of clear-by-read.  Reading with EICS will return the
3092          * interrupt causes without clearing, which later be done
3093          * with the write to EICR.
3094          */
3095         eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
3096
3097         /* The lower 16bits of the EICR register are for the queue interrupts
3098          * which should be masked here in order to not accidentally clear them if
3099          * the bits are high when ixgbe_msix_other is called. There is a race
3100          * condition otherwise which results in possible performance loss
3101          * especially if the ixgbe_msix_other interrupt is triggering
3102          * consistently (as it would when PPS is turned on for the X540 device)
3103          */
3104         eicr &= 0xFFFF0000;
3105
3106         IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
3107
3108         if (eicr & IXGBE_EICR_LSC)
3109                 ixgbe_check_lsc(adapter);
3110
3111         if (eicr & IXGBE_EICR_MAILBOX)
3112                 ixgbe_msg_task(adapter);
3113
3114         switch (hw->mac.type) {
3115         case ixgbe_mac_82599EB:
3116         case ixgbe_mac_X540:
3117         case ixgbe_mac_X550:
3118         case ixgbe_mac_X550EM_x:
3119         case ixgbe_mac_x550em_a:
3120                 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
3121                     (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
3122                         adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
3123                         ixgbe_service_event_schedule(adapter);
3124                         IXGBE_WRITE_REG(hw, IXGBE_EICR,
3125                                         IXGBE_EICR_GPI_SDP0_X540);
3126                 }
3127                 if (eicr & IXGBE_EICR_ECC) {
3128                         e_info(link, "Received ECC Err, initiating reset\n");
3129                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3130                         ixgbe_service_event_schedule(adapter);
3131                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3132                 }
3133                 /* Handle Flow Director Full threshold interrupt */
3134                 if (eicr & IXGBE_EICR_FLOW_DIR) {
3135                         int reinit_count = 0;
3136                         int i;
3137                         for (i = 0; i < adapter->num_tx_queues; i++) {
3138                                 struct ixgbe_ring *ring = adapter->tx_ring[i];
3139                                 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
3140                                                        &ring->state))
3141                                         reinit_count++;
3142                         }
3143                         if (reinit_count) {
3144                                 /* no more flow director interrupts until after init */
3145                                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
3146                                 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
3147                                 ixgbe_service_event_schedule(adapter);
3148                         }
3149                 }
3150                 ixgbe_check_sfp_event(adapter, eicr);
3151                 ixgbe_check_overtemp_event(adapter, eicr);
3152                 break;
3153         default:
3154                 break;
3155         }
3156
3157         ixgbe_check_fan_failure(adapter, eicr);
3158
3159         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3160                 ixgbe_ptp_check_pps_event(adapter);
3161
3162         /* re-enable the original interrupt state, no lsc, no queues */
3163         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3164                 ixgbe_irq_enable(adapter, false, false);
3165
3166         return IRQ_HANDLED;
3167 }
3168
3169 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
3170 {
3171         struct ixgbe_q_vector *q_vector = data;
3172
3173         /* EIAM disabled interrupts (on this vector) for us */
3174
3175         if (q_vector->rx.ring || q_vector->tx.ring)
3176                 napi_schedule_irqoff(&q_vector->napi);
3177
3178         return IRQ_HANDLED;
3179 }
3180
3181 /**
3182  * ixgbe_poll - NAPI Rx polling callback
3183  * @napi: structure for representing this polling device
3184  * @budget: how many packets driver is allowed to clean
3185  *
3186  * This function is used for legacy and MSI, NAPI mode
3187  **/
3188 int ixgbe_poll(struct napi_struct *napi, int budget)
3189 {
3190         struct ixgbe_q_vector *q_vector =
3191                                 container_of(napi, struct ixgbe_q_vector, napi);
3192         struct ixgbe_adapter *adapter = q_vector->adapter;
3193         struct ixgbe_ring *ring;
3194         int per_ring_budget, work_done = 0;
3195         bool clean_complete = true;
3196
3197 #ifdef CONFIG_IXGBE_DCA
3198         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
3199                 ixgbe_update_dca(q_vector);
3200 #endif
3201
3202         ixgbe_for_each_ring(ring, q_vector->tx) {
3203                 if (!ixgbe_clean_tx_irq(q_vector, ring, budget))
3204                         clean_complete = false;
3205         }
3206
3207         /* Exit if we are called by netpoll */
3208         if (budget <= 0)
3209                 return budget;
3210
3211         /* attempt to distribute budget to each queue fairly, but don't allow
3212          * the budget to go below 1 because we'll exit polling */
3213         if (q_vector->rx.count > 1)
3214                 per_ring_budget = max(budget/q_vector->rx.count, 1);
3215         else
3216                 per_ring_budget = budget;
3217
3218         ixgbe_for_each_ring(ring, q_vector->rx) {
3219                 int cleaned = ixgbe_clean_rx_irq(q_vector, ring,
3220                                                  per_ring_budget);
3221
3222                 work_done += cleaned;
3223                 if (cleaned >= per_ring_budget)
3224                         clean_complete = false;
3225         }
3226
3227         /* If all work not completed, return budget and keep polling */
3228         if (!clean_complete)
3229                 return budget;
3230
3231         /* all work done, exit the polling mode */
3232         napi_complete_done(napi, work_done);
3233         if (adapter->rx_itr_setting & 1)
3234                 ixgbe_set_itr(q_vector);
3235         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3236                 ixgbe_irq_enable_queues(adapter, BIT_ULL(q_vector->v_idx));
3237
3238         return min(work_done, budget - 1);
3239 }
3240
3241 /**
3242  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
3243  * @adapter: board private structure
3244  *
3245  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
3246  * interrupts from the kernel.
3247  **/
3248 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
3249 {
3250         struct net_device *netdev = adapter->netdev;
3251         unsigned int ri = 0, ti = 0;
3252         int vector, err;
3253
3254         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3255                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3256                 struct msix_entry *entry = &adapter->msix_entries[vector];
3257
3258                 if (q_vector->tx.ring && q_vector->rx.ring) {
3259                         snprintf(q_vector->name, sizeof(q_vector->name),
3260                                  "%s-TxRx-%u", netdev->name, ri++);
3261                         ti++;
3262                 } else if (q_vector->rx.ring) {
3263                         snprintf(q_vector->name, sizeof(q_vector->name),
3264                                  "%s-rx-%u", netdev->name, ri++);
3265                 } else if (q_vector->tx.ring) {
3266                         snprintf(q_vector->name, sizeof(q_vector->name),
3267                                  "%s-tx-%u", netdev->name, ti++);
3268                 } else {
3269                         /* skip this unused q_vector */
3270                         continue;
3271                 }
3272                 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
3273                                   q_vector->name, q_vector);
3274                 if (err) {
3275                         e_err(probe, "request_irq failed for MSIX interrupt "
3276                               "Error: %d\n", err);
3277                         goto free_queue_irqs;
3278                 }
3279                 /* If Flow Director is enabled, set interrupt affinity */
3280                 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3281                         /* assign the mask for this irq */
3282                         irq_set_affinity_hint(entry->vector,
3283                                               &q_vector->affinity_mask);
3284                 }
3285         }
3286
3287         err = request_irq(adapter->msix_entries[vector].vector,
3288                           ixgbe_msix_other, 0, netdev->name, adapter);
3289         if (err) {
3290                 e_err(probe, "request_irq for msix_other failed: %d\n", err);
3291                 goto free_queue_irqs;
3292         }
3293
3294         return 0;
3295
3296 free_queue_irqs:
3297         while (vector) {
3298                 vector--;
3299                 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
3300                                       NULL);
3301                 free_irq(adapter->msix_entries[vector].vector,
3302                          adapter->q_vector[vector]);
3303         }
3304         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
3305         pci_disable_msix(adapter->pdev);
3306         kfree(adapter->msix_entries);
3307         adapter->msix_entries = NULL;
3308         return err;
3309 }
3310
3311 /**
3312  * ixgbe_intr - legacy mode Interrupt Handler
3313  * @irq: interrupt number
3314  * @data: pointer to a network interface device structure
3315  **/
3316 static irqreturn_t ixgbe_intr(int irq, void *data)
3317 {
3318         struct ixgbe_adapter *adapter = data;
3319         struct ixgbe_hw *hw = &adapter->hw;
3320         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3321         u32 eicr;
3322
3323         /*
3324          * Workaround for silicon errata #26 on 82598.  Mask the interrupt
3325          * before the read of EICR.
3326          */
3327         IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
3328
3329         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
3330          * therefore no explicit interrupt disable is necessary */
3331         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
3332         if (!eicr) {
3333                 /*
3334                  * shared interrupt alert!
3335                  * make sure interrupts are enabled because the read will
3336                  * have disabled interrupts due to EIAM
3337                  * finish the workaround of silicon errata on 82598.  Unmask
3338                  * the interrupt that we masked before the EICR read.
3339                  */
3340                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3341                         ixgbe_irq_enable(adapter, true, true);
3342                 return IRQ_NONE;        /* Not our interrupt */
3343         }
3344
3345         if (eicr & IXGBE_EICR_LSC)
3346                 ixgbe_check_lsc(adapter);
3347
3348         switch (hw->mac.type) {
3349         case ixgbe_mac_82599EB:
3350                 ixgbe_check_sfp_event(adapter, eicr);
3351                 /* Fall through */
3352         case ixgbe_mac_X540:
3353         case ixgbe_mac_X550:
3354         case ixgbe_mac_X550EM_x:
3355         case ixgbe_mac_x550em_a:
3356                 if (eicr & IXGBE_EICR_ECC) {
3357                         e_info(link, "Received ECC Err, initiating reset\n");
3358                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3359                         ixgbe_service_event_schedule(adapter);
3360                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3361                 }
3362                 ixgbe_check_overtemp_event(adapter, eicr);
3363                 break;
3364         default:
3365                 break;
3366         }
3367
3368         ixgbe_check_fan_failure(adapter, eicr);
3369         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3370                 ixgbe_ptp_check_pps_event(adapter);
3371
3372         /* would disable interrupts here but EIAM disabled it */
3373         napi_schedule_irqoff(&q_vector->napi);
3374
3375         /*
3376          * re-enable link(maybe) and non-queue interrupts, no flush.
3377          * ixgbe_poll will re-enable the queue interrupts
3378          */
3379         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3380                 ixgbe_irq_enable(adapter, false, false);
3381
3382         return IRQ_HANDLED;
3383 }
3384
3385 /**
3386  * ixgbe_request_irq - initialize interrupts
3387  * @adapter: board private structure
3388  *
3389  * Attempts to configure interrupts using the best available
3390  * capabilities of the hardware and kernel.
3391  **/
3392 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
3393 {
3394         struct net_device *netdev = adapter->netdev;
3395         int err;
3396
3397         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
3398                 err = ixgbe_request_msix_irqs(adapter);
3399         else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
3400                 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
3401                                   netdev->name, adapter);
3402         else
3403                 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
3404                                   netdev->name, adapter);
3405
3406         if (err)
3407                 e_err(probe, "request_irq failed, Error %d\n", err);
3408
3409         return err;
3410 }
3411
3412 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
3413 {
3414         int vector;
3415
3416         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
3417                 free_irq(adapter->pdev->irq, adapter);
3418                 return;
3419         }
3420
3421         if (!adapter->msix_entries)
3422                 return;
3423
3424         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3425                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3426                 struct msix_entry *entry = &adapter->msix_entries[vector];
3427
3428                 /* free only the irqs that were actually requested */
3429                 if (!q_vector->rx.ring && !q_vector->tx.ring)
3430                         continue;
3431
3432                 /* clear the affinity_mask in the IRQ descriptor */
3433                 irq_set_affinity_hint(entry->vector, NULL);
3434
3435                 free_irq(entry->vector, q_vector);
3436         }
3437
3438         free_irq(adapter->msix_entries[vector].vector, adapter);
3439 }
3440
3441 /**
3442  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3443  * @adapter: board private structure
3444  **/
3445 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3446 {
3447         switch (adapter->hw.mac.type) {
3448         case ixgbe_mac_82598EB:
3449                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3450                 break;
3451         case ixgbe_mac_82599EB:
3452         case ixgbe_mac_X540:
3453         case ixgbe_mac_X550:
3454         case ixgbe_mac_X550EM_x:
3455         case ixgbe_mac_x550em_a:
3456                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3457                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3458                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3459                 break;
3460         default:
3461                 break;
3462         }
3463         IXGBE_WRITE_FLUSH(&adapter->hw);
3464         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3465                 int vector;
3466
3467                 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3468                         synchronize_irq(adapter->msix_entries[vector].vector);
3469
3470                 synchronize_irq(adapter->msix_entries[vector++].vector);
3471         } else {
3472                 synchronize_irq(adapter->pdev->irq);
3473         }
3474 }
3475
3476 /**
3477  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3478  *
3479  **/
3480 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3481 {
3482         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3483
3484         ixgbe_write_eitr(q_vector);
3485
3486         ixgbe_set_ivar(adapter, 0, 0, 0);
3487         ixgbe_set_ivar(adapter, 1, 0, 0);
3488
3489         e_info(hw, "Legacy interrupt IVAR setup done\n");
3490 }
3491
3492 /**
3493  * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3494  * @adapter: board private structure
3495  * @ring: structure containing ring specific data
3496  *
3497  * Configure the Tx descriptor ring after a reset.
3498  **/
3499 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3500                              struct ixgbe_ring *ring)
3501 {
3502         struct ixgbe_hw *hw = &adapter->hw;
3503         u64 tdba = ring->dma;
3504         int wait_loop = 10;
3505         u32 txdctl = IXGBE_TXDCTL_ENABLE;
3506         u8 reg_idx = ring->reg_idx;
3507
3508         /* disable queue to avoid issues while updating state */
3509         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3510         IXGBE_WRITE_FLUSH(hw);
3511
3512         IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3513                         (tdba & DMA_BIT_MASK(32)));
3514         IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3515         IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3516                         ring->count * sizeof(union ixgbe_adv_tx_desc));
3517         IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3518         IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3519         ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3520
3521         /*
3522          * set WTHRESH to encourage burst writeback, it should not be set
3523          * higher than 1 when:
3524          * - ITR is 0 as it could cause false TX hangs
3525          * - ITR is set to > 100k int/sec and BQL is enabled
3526          *
3527          * In order to avoid issues WTHRESH + PTHRESH should always be equal
3528          * to or less than the number of on chip descriptors, which is
3529          * currently 40.
3530          */
3531         if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3532                 txdctl |= 1u << 16;     /* WTHRESH = 1 */
3533         else
3534                 txdctl |= 8u << 16;     /* WTHRESH = 8 */
3535
3536         /*
3537          * Setting PTHRESH to 32 both improves performance
3538          * and avoids a TX hang with DFP enabled
3539          */
3540         txdctl |= (1u << 8) |   /* HTHRESH = 1 */
3541                    32;          /* PTHRESH = 32 */
3542
3543         /* reinitialize flowdirector state */
3544         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3545                 ring->atr_sample_rate = adapter->atr_sample_rate;
3546                 ring->atr_count = 0;
3547                 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3548         } else {
3549                 ring->atr_sample_rate = 0;
3550         }
3551
3552         /* initialize XPS */
3553         if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3554                 struct ixgbe_q_vector *q_vector = ring->q_vector;
3555
3556                 if (q_vector)
3557                         netif_set_xps_queue(ring->netdev,
3558                                             &q_vector->affinity_mask,
3559                                             ring->queue_index);
3560         }
3561
3562         clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3563
3564         /* reinitialize tx_buffer_info */
3565         memset(ring->tx_buffer_info, 0,
3566                sizeof(struct ixgbe_tx_buffer) * ring->count);
3567
3568         /* enable queue */
3569         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3570
3571         /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3572         if (hw->mac.type == ixgbe_mac_82598EB &&
3573             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3574                 return;
3575
3576         /* poll to verify queue is enabled */
3577         do {
3578                 usleep_range(1000, 2000);
3579                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3580         } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3581         if (!wait_loop)
3582                 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx);
3583 }
3584
3585 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3586 {
3587         struct ixgbe_hw *hw = &adapter->hw;
3588         u32 rttdcs, mtqc;
3589         u8 tcs = netdev_get_num_tc(adapter->netdev);
3590
3591         if (hw->mac.type == ixgbe_mac_82598EB)
3592                 return;
3593
3594         /* disable the arbiter while setting MTQC */
3595         rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3596         rttdcs |= IXGBE_RTTDCS_ARBDIS;
3597         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3598
3599         /* set transmit pool layout */
3600         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3601                 mtqc = IXGBE_MTQC_VT_ENA;
3602                 if (tcs > 4)
3603                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3604                 else if (tcs > 1)
3605                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3606                 else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3607                          IXGBE_82599_VMDQ_4Q_MASK)
3608                         mtqc |= IXGBE_MTQC_32VF;
3609                 else
3610                         mtqc |= IXGBE_MTQC_64VF;
3611         } else {
3612                 if (tcs > 4)
3613                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3614                 else if (tcs > 1)
3615                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3616                 else
3617                         mtqc = IXGBE_MTQC_64Q_1PB;
3618         }
3619
3620         IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3621
3622         /* Enable Security TX Buffer IFG for multiple pb */
3623         if (tcs) {
3624                 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3625                 sectx |= IXGBE_SECTX_DCB;
3626                 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3627         }
3628
3629         /* re-enable the arbiter */
3630         rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3631         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3632 }
3633
3634 /**
3635  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3636  * @adapter: board private structure
3637  *
3638  * Configure the Tx unit of the MAC after a reset.
3639  **/
3640 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3641 {
3642         struct ixgbe_hw *hw = &adapter->hw;
3643         u32 dmatxctl;
3644         u32 i;
3645
3646         ixgbe_setup_mtqc(adapter);
3647
3648         if (hw->mac.type != ixgbe_mac_82598EB) {
3649                 /* DMATXCTL.EN must be before Tx queues are enabled */
3650                 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3651                 dmatxctl |= IXGBE_DMATXCTL_TE;
3652                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3653         }
3654
3655         /* Setup the HW Tx Head and Tail descriptor pointers */
3656         for (i = 0; i < adapter->num_tx_queues; i++)
3657                 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3658         for (i = 0; i < adapter->num_xdp_queues; i++)
3659                 ixgbe_configure_tx_ring(adapter, adapter->xdp_ring[i]);
3660 }
3661
3662 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3663                                  struct ixgbe_ring *ring)
3664 {
3665         struct ixgbe_hw *hw = &adapter->hw;
3666         u8 reg_idx = ring->reg_idx;
3667         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3668
3669         srrctl |= IXGBE_SRRCTL_DROP_EN;
3670
3671         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3672 }
3673
3674 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3675                                   struct ixgbe_ring *ring)
3676 {
3677         struct ixgbe_hw *hw = &adapter->hw;
3678         u8 reg_idx = ring->reg_idx;
3679         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3680
3681         srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3682
3683         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3684 }
3685
3686 #ifdef CONFIG_IXGBE_DCB
3687 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3688 #else
3689 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3690 #endif
3691 {
3692         int i;
3693         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3694
3695         if (adapter->ixgbe_ieee_pfc)
3696                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3697
3698         /*
3699          * We should set the drop enable bit if:
3700          *  SR-IOV is enabled
3701          *   or
3702          *  Number of Rx queues > 1 and flow control is disabled
3703          *
3704          *  This allows us to avoid head of line blocking for security
3705          *  and performance reasons.
3706          */
3707         if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3708             !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3709                 for (i = 0; i < adapter->num_rx_queues; i++)
3710                         ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3711         } else {
3712                 for (i = 0; i < adapter->num_rx_queues; i++)
3713                         ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3714         }
3715 }
3716
3717 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3718
3719 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3720                                    struct ixgbe_ring *rx_ring)
3721 {
3722         struct ixgbe_hw *hw = &adapter->hw;
3723         u32 srrctl;
3724         u8 reg_idx = rx_ring->reg_idx;
3725
3726         if (hw->mac.type == ixgbe_mac_82598EB) {
3727                 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3728
3729                 /*
3730                  * if VMDq is not active we must program one srrctl register
3731                  * per RSS queue since we have enabled RDRXCTL.MVMEN
3732                  */
3733                 reg_idx &= mask;
3734         }
3735
3736         /* configure header buffer length, needed for RSC */
3737         srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3738
3739         /* configure the packet buffer length */
3740         if (test_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state))
3741                 srrctl |= IXGBE_RXBUFFER_3K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3742         else
3743                 srrctl |= IXGBE_RXBUFFER_2K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3744
3745         /* configure descriptor type */
3746         srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3747
3748         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3749 }
3750
3751 /**
3752  * ixgbe_rss_indir_tbl_entries - Return RSS indirection table entries
3753  * @adapter: device handle
3754  *
3755  *  - 82598/82599/X540:     128
3756  *  - X550(non-SRIOV mode): 512
3757  *  - X550(SRIOV mode):     64
3758  */
3759 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3760 {
3761         if (adapter->hw.mac.type < ixgbe_mac_X550)
3762                 return 128;
3763         else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3764                 return 64;
3765         else
3766                 return 512;
3767 }
3768
3769 /**
3770  * ixgbe_store_key - Write the RSS key to HW
3771  * @adapter: device handle
3772  *
3773  * Write the RSS key stored in adapter.rss_key to HW.
3774  */
3775 void ixgbe_store_key(struct ixgbe_adapter *adapter)
3776 {
3777         struct ixgbe_hw *hw = &adapter->hw;
3778         int i;
3779
3780         for (i = 0; i < 10; i++)
3781                 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3782 }
3783
3784 /**
3785  * ixgbe_init_rss_key - Initialize adapter RSS key
3786  * @adapter: device handle
3787  *
3788  * Allocates and initializes the RSS key if it is not allocated.
3789  **/
3790 static inline int ixgbe_init_rss_key(struct ixgbe_adapter *adapter)
3791 {
3792         u32 *rss_key;
3793
3794         if (!adapter->rss_key) {
3795                 rss_key = kzalloc(IXGBE_RSS_KEY_SIZE, GFP_KERNEL);
3796                 if (unlikely(!rss_key))
3797                         return -ENOMEM;
3798
3799                 netdev_rss_key_fill(rss_key, IXGBE_RSS_KEY_SIZE);
3800                 adapter->rss_key = rss_key;
3801         }
3802
3803         return 0;
3804 }
3805
3806 /**
3807  * ixgbe_store_reta - Write the RETA table to HW
3808  * @adapter: device handle
3809  *
3810  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3811  */
3812 void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3813 {
3814         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3815         struct ixgbe_hw *hw = &adapter->hw;
3816         u32 reta = 0;
3817         u32 indices_multi;
3818         u8 *indir_tbl = adapter->rss_indir_tbl;
3819
3820         /* Fill out the redirection table as follows:
3821          *  - 82598:      8 bit wide entries containing pair of 4 bit RSS
3822          *    indices.
3823          *  - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3824          *  - X550:       8 bit wide entries containing 6 bit RSS index
3825          */
3826         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3827                 indices_multi = 0x11;
3828         else
3829                 indices_multi = 0x1;
3830
3831         /* Write redirection table to HW */
3832         for (i = 0; i < reta_entries; i++) {
3833                 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3834                 if ((i & 3) == 3) {
3835                         if (i < 128)
3836                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3837                         else
3838                                 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3839                                                 reta);
3840                         reta = 0;
3841                 }
3842         }
3843 }
3844
3845 /**
3846  * ixgbe_store_vfreta - Write the RETA table to HW (x550 devices in SRIOV mode)
3847  * @adapter: device handle
3848  *
3849  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3850  */
3851 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3852 {
3853         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3854         struct ixgbe_hw *hw = &adapter->hw;
3855         u32 vfreta = 0;
3856         unsigned int pf_pool = adapter->num_vfs;
3857
3858         /* Write redirection table to HW */
3859         for (i = 0; i < reta_entries; i++) {
3860                 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3861                 if ((i & 3) == 3) {
3862                         IXGBE_WRITE_REG(hw, IXGBE_PFVFRETA(i >> 2, pf_pool),
3863                                         vfreta);
3864                         vfreta = 0;
3865                 }
3866         }
3867 }
3868
3869 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3870 {
3871         u32 i, j;
3872         u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3873         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3874
3875         /* Program table for at least 4 queues w/ SR-IOV so that VFs can
3876          * make full use of any rings they may have.  We will use the
3877          * PSRTYPE register to control how many rings we use within the PF.
3878          */
3879         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 4))
3880                 rss_i = 4;
3881
3882         /* Fill out hash function seeds */
3883         ixgbe_store_key(adapter);
3884
3885         /* Fill out redirection table */
3886         memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3887
3888         for (i = 0, j = 0; i < reta_entries; i++, j++) {
3889                 if (j == rss_i)
3890                         j = 0;
3891
3892                 adapter->rss_indir_tbl[i] = j;
3893         }
3894
3895         ixgbe_store_reta(adapter);
3896 }
3897
3898 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3899 {
3900         struct ixgbe_hw *hw = &adapter->hw;
3901         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3902         unsigned int pf_pool = adapter->num_vfs;
3903         int i, j;
3904
3905         /* Fill out hash function seeds */
3906         for (i = 0; i < 10; i++)
3907                 IXGBE_WRITE_REG(hw, IXGBE_PFVFRSSRK(i, pf_pool),
3908                                 *(adapter->rss_key + i));
3909
3910         /* Fill out the redirection table */
3911         for (i = 0, j = 0; i < 64; i++, j++) {
3912                 if (j == rss_i)
3913                         j = 0;
3914
3915                 adapter->rss_indir_tbl[i] = j;
3916         }
3917
3918         ixgbe_store_vfreta(adapter);
3919 }
3920
3921 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3922 {
3923         struct ixgbe_hw *hw = &adapter->hw;
3924         u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3925         u32 rxcsum;
3926
3927         /* Disable indicating checksum in descriptor, enables RSS hash */
3928         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3929         rxcsum |= IXGBE_RXCSUM_PCSD;
3930         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3931
3932         if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3933                 if (adapter->ring_feature[RING_F_RSS].mask)
3934                         mrqc = IXGBE_MRQC_RSSEN;
3935         } else {
3936                 u8 tcs = netdev_get_num_tc(adapter->netdev);
3937
3938                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3939                         if (tcs > 4)
3940                                 mrqc = IXGBE_MRQC_VMDQRT8TCEN;  /* 8 TCs */
3941                         else if (tcs > 1)
3942                                 mrqc = IXGBE_MRQC_VMDQRT4TCEN;  /* 4 TCs */
3943                         else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3944                                  IXGBE_82599_VMDQ_4Q_MASK)
3945                                 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3946                         else
3947                                 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3948
3949                         /* Enable L3/L4 for Tx Switched packets */
3950                         mrqc |= IXGBE_MRQC_L3L4TXSWEN;
3951                 } else {
3952                         if (tcs > 4)
3953                                 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3954                         else if (tcs > 1)
3955                                 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3956                         else
3957                                 mrqc = IXGBE_MRQC_RSSEN;
3958                 }
3959         }
3960
3961         /* Perform hash on these packet types */
3962         rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3963                      IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3964                      IXGBE_MRQC_RSS_FIELD_IPV6 |
3965                      IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3966
3967         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3968                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3969         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3970                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3971
3972         if ((hw->mac.type >= ixgbe_mac_X550) &&
3973             (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3974                 unsigned int pf_pool = adapter->num_vfs;
3975
3976                 /* Enable VF RSS mode */
3977                 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3978                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3979
3980                 /* Setup RSS through the VF registers */
3981                 ixgbe_setup_vfreta(adapter);
3982                 vfmrqc = IXGBE_MRQC_RSSEN;
3983                 vfmrqc |= rss_field;
3984                 IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(pf_pool), vfmrqc);
3985         } else {
3986                 ixgbe_setup_reta(adapter);
3987                 mrqc |= rss_field;
3988                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3989         }
3990 }
3991
3992 /**
3993  * ixgbe_configure_rscctl - enable RSC for the indicated ring
3994  * @adapter:    address of board private structure
3995  * @index:      index of ring to set
3996  **/
3997 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
3998                                    struct ixgbe_ring *ring)
3999 {
4000         struct ixgbe_hw *hw = &adapter->hw;
4001         u32 rscctrl;
4002         u8 reg_idx = ring->reg_idx;
4003
4004         if (!ring_is_rsc_enabled(ring))
4005                 return;
4006
4007         rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
4008         rscctrl |= IXGBE_RSCCTL_RSCEN;
4009         /*
4010          * we must limit the number of descriptors so that the
4011          * total size of max desc * buf_len is not greater
4012          * than 65536
4013          */
4014         rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
4015         IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
4016 }
4017
4018 #define IXGBE_MAX_RX_DESC_POLL 10
4019 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
4020                                        struct ixgbe_ring *ring)
4021 {
4022         struct ixgbe_hw *hw = &adapter->hw;
4023         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
4024         u32 rxdctl;
4025         u8 reg_idx = ring->reg_idx;
4026
4027         if (ixgbe_removed(hw->hw_addr))
4028                 return;
4029         /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
4030         if (hw->mac.type == ixgbe_mac_82598EB &&
4031             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
4032                 return;
4033
4034         do {
4035                 usleep_range(1000, 2000);
4036                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4037         } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
4038
4039         if (!wait_loop) {
4040                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
4041                       "the polling period\n", reg_idx);
4042         }
4043 }
4044
4045 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
4046                             struct ixgbe_ring *ring)
4047 {
4048         struct ixgbe_hw *hw = &adapter->hw;
4049         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
4050         u32 rxdctl;
4051         u8 reg_idx = ring->reg_idx;
4052
4053         if (ixgbe_removed(hw->hw_addr))
4054                 return;
4055         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4056         rxdctl &= ~IXGBE_RXDCTL_ENABLE;
4057
4058         /* write value back with RXDCTL.ENABLE bit cleared */
4059         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4060
4061         if (hw->mac.type == ixgbe_mac_82598EB &&
4062             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
4063                 return;
4064
4065         /* the hardware may take up to 100us to really disable the rx queue */
4066         do {
4067                 udelay(10);
4068                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4069         } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
4070
4071         if (!wait_loop) {
4072                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
4073                       "the polling period\n", reg_idx);
4074         }
4075 }
4076
4077 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
4078                              struct ixgbe_ring *ring)
4079 {
4080         struct ixgbe_hw *hw = &adapter->hw;
4081         union ixgbe_adv_rx_desc *rx_desc;
4082         u64 rdba = ring->dma;
4083         u32 rxdctl;
4084         u8 reg_idx = ring->reg_idx;
4085
4086         /* disable queue to avoid issues while updating state */
4087         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4088         ixgbe_disable_rx_queue(adapter, ring);
4089
4090         IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
4091         IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
4092         IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
4093                         ring->count * sizeof(union ixgbe_adv_rx_desc));
4094         /* Force flushing of IXGBE_RDLEN to prevent MDD */
4095         IXGBE_WRITE_FLUSH(hw);
4096
4097         IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
4098         IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
4099         ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
4100
4101         ixgbe_configure_srrctl(adapter, ring);
4102         ixgbe_configure_rscctl(adapter, ring);
4103
4104         if (hw->mac.type == ixgbe_mac_82598EB) {
4105                 /*
4106                  * enable cache line friendly hardware writes:
4107                  * PTHRESH=32 descriptors (half the internal cache),
4108                  * this also removes ugly rx_no_buffer_count increment
4109                  * HTHRESH=4 descriptors (to minimize latency on fetch)
4110                  * WTHRESH=8 burst writeback up to two cache lines
4111                  */
4112                 rxdctl &= ~0x3FFFFF;
4113                 rxdctl |=  0x080420;
4114 #if (PAGE_SIZE < 8192)
4115         } else {
4116                 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
4117                             IXGBE_RXDCTL_RLPML_EN);
4118
4119                 /* Limit the maximum frame size so we don't overrun the skb */
4120                 if (ring_uses_build_skb(ring) &&
4121                     !test_bit(__IXGBE_RX_3K_BUFFER, &ring->state))
4122                         rxdctl |= IXGBE_MAX_2K_FRAME_BUILD_SKB |
4123                                   IXGBE_RXDCTL_RLPML_EN;
4124 #endif
4125         }
4126
4127         /* initialize rx_buffer_info */
4128         memset(ring->rx_buffer_info, 0,
4129                sizeof(struct ixgbe_rx_buffer) * ring->count);
4130
4131         /* initialize Rx descriptor 0 */
4132         rx_desc = IXGBE_RX_DESC(ring, 0);
4133         rx_desc->wb.upper.length = 0;
4134
4135         /* enable receive descriptor ring */
4136         rxdctl |= IXGBE_RXDCTL_ENABLE;
4137         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4138
4139         ixgbe_rx_desc_queue_enable(adapter, ring);
4140         ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
4141 }
4142
4143 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
4144 {
4145         struct ixgbe_hw *hw = &adapter->hw;
4146         int rss_i = adapter->ring_feature[RING_F_RSS].indices;
4147         u16 pool;
4148
4149         /* PSRTYPE must be initialized in non 82598 adapters */
4150         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4151                       IXGBE_PSRTYPE_UDPHDR |
4152                       IXGBE_PSRTYPE_IPV4HDR |
4153                       IXGBE_PSRTYPE_L2HDR |
4154                       IXGBE_PSRTYPE_IPV6HDR;
4155
4156         if (hw->mac.type == ixgbe_mac_82598EB)
4157                 return;
4158
4159         if (rss_i > 3)
4160                 psrtype |= 2u << 29;
4161         else if (rss_i > 1)
4162                 psrtype |= 1u << 29;
4163
4164         for_each_set_bit(pool, &adapter->fwd_bitmask, 32)
4165                 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4166 }
4167
4168 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
4169 {
4170         struct ixgbe_hw *hw = &adapter->hw;
4171         u32 reg_offset, vf_shift;
4172         u32 gcr_ext, vmdctl;
4173         int i;
4174
4175         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
4176                 return;
4177
4178         vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
4179         vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
4180         vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
4181         vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
4182         vmdctl |= IXGBE_VT_CTL_REPLEN;
4183         IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
4184
4185         vf_shift = VMDQ_P(0) % 32;
4186         reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
4187
4188         /* Enable only the PF's pool for Tx/Rx */
4189         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), GENMASK(31, vf_shift));
4190         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
4191         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), GENMASK(31, vf_shift));
4192         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
4193         if (adapter->bridge_mode == BRIDGE_MODE_VEB)
4194                 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
4195
4196         /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
4197         hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
4198
4199         /* clear VLAN promisc flag so VFTA will be updated if necessary */
4200         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4201
4202         /*
4203          * Set up VF register offsets for selected VT Mode,
4204          * i.e. 32 or 64 VFs for SR-IOV
4205          */
4206         switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4207         case IXGBE_82599_VMDQ_8Q_MASK:
4208                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
4209                 break;
4210         case IXGBE_82599_VMDQ_4Q_MASK:
4211                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
4212                 break;
4213         default:
4214                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
4215                 break;
4216         }
4217
4218         IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
4219
4220         for (i = 0; i < adapter->num_vfs; i++) {
4221                 /* configure spoof checking */
4222                 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i,
4223                                           adapter->vfinfo[i].spoofchk_enabled);
4224
4225                 /* Enable/Disable RSS query feature  */
4226                 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
4227                                           adapter->vfinfo[i].rss_query_enabled);
4228         }
4229 }
4230
4231 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
4232 {
4233         struct ixgbe_hw *hw = &adapter->hw;
4234         struct net_device *netdev = adapter->netdev;
4235         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4236         struct ixgbe_ring *rx_ring;
4237         int i;
4238         u32 mhadd, hlreg0;
4239
4240 #ifdef IXGBE_FCOE
4241         /* adjust max frame to be able to do baby jumbo for FCoE */
4242         if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
4243             (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
4244                 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4245
4246 #endif /* IXGBE_FCOE */
4247
4248         /* adjust max frame to be at least the size of a standard frame */
4249         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
4250                 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
4251
4252         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
4253         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
4254                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
4255                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
4256
4257                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
4258         }
4259
4260         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
4261         /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
4262         hlreg0 |= IXGBE_HLREG0_JUMBOEN;
4263         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
4264
4265         /*
4266          * Setup the HW Rx Head and Tail Descriptor Pointers and
4267          * the Base and Length of the Rx Descriptor Ring
4268          */
4269         for (i = 0; i < adapter->num_rx_queues; i++) {
4270                 rx_ring = adapter->rx_ring[i];
4271
4272                 clear_ring_rsc_enabled(rx_ring);
4273                 clear_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4274                 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4275
4276                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4277                         set_ring_rsc_enabled(rx_ring);
4278
4279                 if (test_bit(__IXGBE_RX_FCOE, &rx_ring->state))
4280                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4281
4282                 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4283                 if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY)
4284                         continue;
4285
4286                 set_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4287
4288 #if (PAGE_SIZE < 8192)
4289                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4290                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4291
4292                 if (IXGBE_2K_TOO_SMALL_WITH_PADDING ||
4293                     (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
4294                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4295 #endif
4296         }
4297 }
4298
4299 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
4300 {
4301         struct ixgbe_hw *hw = &adapter->hw;
4302         u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
4303
4304         switch (hw->mac.type) {
4305         case ixgbe_mac_82598EB:
4306                 /*
4307                  * For VMDq support of different descriptor types or
4308                  * buffer sizes through the use of multiple SRRCTL
4309                  * registers, RDRXCTL.MVMEN must be set to 1
4310                  *
4311                  * also, the manual doesn't mention it clearly but DCA hints
4312                  * will only use queue 0's tags unless this bit is set.  Side
4313                  * effects of setting this bit are only that SRRCTL must be
4314                  * fully programmed [0..15]
4315                  */
4316                 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
4317                 break;
4318         case ixgbe_mac_X550:
4319         case ixgbe_mac_X550EM_x:
4320         case ixgbe_mac_x550em_a:
4321                 if (adapter->num_vfs)
4322                         rdrxctl |= IXGBE_RDRXCTL_PSP;
4323                 /* fall through */
4324         case ixgbe_mac_82599EB:
4325         case ixgbe_mac_X540:
4326                 /* Disable RSC for ACK packets */
4327                 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
4328                    (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
4329                 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
4330                 /* hardware requires some bits to be set by default */
4331                 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
4332                 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
4333                 break;
4334         default:
4335                 /* We should do nothing since we don't know this hardware */
4336                 return;
4337         }
4338
4339         IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
4340 }
4341
4342 /**
4343  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
4344  * @adapter: board private structure
4345  *
4346  * Configure the Rx unit of the MAC after a reset.
4347  **/
4348 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
4349 {
4350         struct ixgbe_hw *hw = &adapter->hw;
4351         int i;
4352         u32 rxctrl, rfctl;
4353
4354         /* disable receives while setting up the descriptors */
4355         hw->mac.ops.disable_rx(hw);
4356
4357         ixgbe_setup_psrtype(adapter);
4358         ixgbe_setup_rdrxctl(adapter);
4359
4360         /* RSC Setup */
4361         rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
4362         rfctl &= ~IXGBE_RFCTL_RSC_DIS;
4363         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
4364                 rfctl |= IXGBE_RFCTL_RSC_DIS;
4365
4366         /* disable NFS filtering */
4367         rfctl |= (IXGBE_RFCTL_NFSW_DIS | IXGBE_RFCTL_NFSR_DIS);
4368         IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
4369
4370         /* Program registers for the distribution of queues */
4371         ixgbe_setup_mrqc(adapter);
4372
4373         /* set_rx_buffer_len must be called before ring initialization */
4374         ixgbe_set_rx_buffer_len(adapter);
4375
4376         /*
4377          * Setup the HW Rx Head and Tail Descriptor Pointers and
4378          * the Base and Length of the Rx Descriptor Ring
4379          */
4380         for (i = 0; i < adapter->num_rx_queues; i++)
4381                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
4382
4383         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
4384         /* disable drop enable for 82598 parts */
4385         if (hw->mac.type == ixgbe_mac_82598EB)
4386                 rxctrl |= IXGBE_RXCTRL_DMBYPS;
4387
4388         /* enable all receives */
4389         rxctrl |= IXGBE_RXCTRL_RXEN;
4390         hw->mac.ops.enable_rx_dma(hw, rxctrl);
4391 }
4392
4393 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
4394                                  __be16 proto, u16 vid)
4395 {
4396         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4397         struct ixgbe_hw *hw = &adapter->hw;
4398
4399         /* add VID to filter table */
4400         if (!vid || !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4401                 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true, !!vid);
4402
4403         set_bit(vid, adapter->active_vlans);
4404
4405         return 0;
4406 }
4407
4408 static int ixgbe_find_vlvf_entry(struct ixgbe_hw *hw, u32 vlan)
4409 {
4410         u32 vlvf;
4411         int idx;
4412
4413         /* short cut the special case */
4414         if (vlan == 0)
4415                 return 0;
4416
4417         /* Search for the vlan id in the VLVF entries */
4418         for (idx = IXGBE_VLVF_ENTRIES; --idx;) {
4419                 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(idx));
4420                 if ((vlvf & VLAN_VID_MASK) == vlan)
4421                         break;
4422         }
4423
4424         return idx;
4425 }
4426
4427 void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter *adapter, u32 vid)
4428 {
4429         struct ixgbe_hw *hw = &adapter->hw;
4430         u32 bits, word;
4431         int idx;
4432
4433         idx = ixgbe_find_vlvf_entry(hw, vid);
4434         if (!idx)
4435                 return;
4436
4437         /* See if any other pools are set for this VLAN filter
4438          * entry other than the PF.
4439          */
4440         word = idx * 2 + (VMDQ_P(0) / 32);
4441         bits = ~BIT(VMDQ_P(0) % 32);
4442         bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4443
4444         /* Disable the filter so this falls into the default pool. */
4445         if (!bits && !IXGBE_READ_REG(hw, IXGBE_VLVFB(word ^ 1))) {
4446                 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4447                         IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), 0);
4448                 IXGBE_WRITE_REG(hw, IXGBE_VLVF(idx), 0);
4449         }
4450 }
4451
4452 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
4453                                   __be16 proto, u16 vid)
4454 {
4455         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4456         struct ixgbe_hw *hw = &adapter->hw;
4457
4458         /* remove VID from filter table */
4459         if (vid && !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4460                 hw->mac.ops.set_vfta(hw, vid, VMDQ_P(0), false, true);
4461
4462         clear_bit(vid, adapter->active_vlans);
4463
4464         return 0;
4465 }
4466
4467 /**
4468  * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
4469  * @adapter: driver data
4470  */
4471 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
4472 {
4473         struct ixgbe_hw *hw = &adapter->hw;
4474         u32 vlnctrl;
4475         int i, j;
4476
4477         switch (hw->mac.type) {
4478         case ixgbe_mac_82598EB:
4479                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4480                 vlnctrl &= ~IXGBE_VLNCTRL_VME;
4481                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4482                 break;
4483         case ixgbe_mac_82599EB:
4484         case ixgbe_mac_X540:
4485         case ixgbe_mac_X550:
4486         case ixgbe_mac_X550EM_x:
4487         case ixgbe_mac_x550em_a:
4488                 for (i = 0; i < adapter->num_rx_queues; i++) {
4489                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4490
4491                         if (ring->l2_accel_priv)
4492                                 continue;
4493                         j = ring->reg_idx;
4494                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4495                         vlnctrl &= ~IXGBE_RXDCTL_VME;
4496                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4497                 }
4498                 break;
4499         default:
4500                 break;
4501         }
4502 }
4503
4504 /**
4505  * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
4506  * @adapter: driver data
4507  */
4508 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
4509 {
4510         struct ixgbe_hw *hw = &adapter->hw;
4511         u32 vlnctrl;
4512         int i, j;
4513
4514         switch (hw->mac.type) {
4515         case ixgbe_mac_82598EB:
4516                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4517                 vlnctrl |= IXGBE_VLNCTRL_VME;
4518                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4519                 break;
4520         case ixgbe_mac_82599EB:
4521         case ixgbe_mac_X540:
4522         case ixgbe_mac_X550:
4523         case ixgbe_mac_X550EM_x:
4524         case ixgbe_mac_x550em_a:
4525                 for (i = 0; i < adapter->num_rx_queues; i++) {
4526                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4527
4528                         if (ring->l2_accel_priv)
4529                                 continue;
4530                         j = ring->reg_idx;
4531                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4532                         vlnctrl |= IXGBE_RXDCTL_VME;
4533                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4534                 }
4535                 break;
4536         default:
4537                 break;
4538         }
4539 }
4540
4541 static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter *adapter)
4542 {
4543         struct ixgbe_hw *hw = &adapter->hw;
4544         u32 vlnctrl, i;
4545
4546         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4547
4548         if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
4549         /* For VMDq and SR-IOV we must leave VLAN filtering enabled */
4550                 vlnctrl |= IXGBE_VLNCTRL_VFE;
4551                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4552         } else {
4553                 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
4554                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4555                 return;
4556         }
4557
4558         /* Nothing to do for 82598 */
4559         if (hw->mac.type == ixgbe_mac_82598EB)
4560                 return;
4561
4562         /* We are already in VLAN promisc, nothing to do */
4563         if (adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)
4564                 return;
4565
4566         /* Set flag so we don't redo unnecessary work */
4567         adapter->flags2 |= IXGBE_FLAG2_VLAN_PROMISC;
4568
4569         /* Add PF to all active pools */
4570         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4571                 u32 reg_offset = IXGBE_VLVFB(i * 2 + VMDQ_P(0) / 32);
4572                 u32 vlvfb = IXGBE_READ_REG(hw, reg_offset);
4573
4574                 vlvfb |= BIT(VMDQ_P(0) % 32);
4575                 IXGBE_WRITE_REG(hw, reg_offset, vlvfb);
4576         }
4577
4578         /* Set all bits in the VLAN filter table array */
4579         for (i = hw->mac.vft_size; i--;)
4580                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U);
4581 }
4582
4583 #define VFTA_BLOCK_SIZE 8
4584 static void ixgbe_scrub_vfta(struct ixgbe_adapter *adapter, u32 vfta_offset)
4585 {
4586         struct ixgbe_hw *hw = &adapter->hw;
4587         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4588         u32 vid_start = vfta_offset * 32;
4589         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4590         u32 i, vid, word, bits;
4591
4592         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4593                 u32 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i));
4594
4595                 /* pull VLAN ID from VLVF */
4596                 vid = vlvf & VLAN_VID_MASK;
4597
4598                 /* only concern outselves with a certain range */
4599                 if (vid < vid_start || vid >= vid_end)
4600                         continue;
4601
4602                 if (vlvf) {
4603                         /* record VLAN ID in VFTA */
4604                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4605
4606                         /* if PF is part of this then continue */
4607                         if (test_bit(vid, adapter->active_vlans))
4608                                 continue;
4609                 }
4610
4611                 /* remove PF from the pool */
4612                 word = i * 2 + VMDQ_P(0) / 32;
4613                 bits = ~BIT(VMDQ_P(0) % 32);
4614                 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4615                 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), bits);
4616         }
4617
4618         /* extract values from active_vlans and write back to VFTA */
4619         for (i = VFTA_BLOCK_SIZE; i--;) {
4620                 vid = (vfta_offset + i) * 32;
4621                 word = vid / BITS_PER_LONG;
4622                 bits = vid % BITS_PER_LONG;
4623
4624                 vfta[i] |= adapter->active_vlans[word] >> bits;
4625
4626                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(vfta_offset + i), vfta[i]);
4627         }
4628 }
4629
4630 static void ixgbe_vlan_promisc_disable(struct ixgbe_adapter *adapter)
4631 {
4632         struct ixgbe_hw *hw = &adapter->hw;
4633         u32 vlnctrl, i;
4634
4635         /* Set VLAN filtering to enabled */
4636         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4637         vlnctrl |= IXGBE_VLNCTRL_VFE;
4638         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4639
4640         if (!(adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) ||
4641             hw->mac.type == ixgbe_mac_82598EB)
4642                 return;
4643
4644         /* We are not in VLAN promisc, nothing to do */
4645         if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4646                 return;
4647
4648         /* Set flag so we don't redo unnecessary work */
4649         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4650
4651         for (i = 0; i < hw->mac.vft_size; i += VFTA_BLOCK_SIZE)
4652                 ixgbe_scrub_vfta(adapter, i);
4653 }
4654
4655 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
4656 {
4657         u16 vid = 1;
4658
4659         ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
4660
4661         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
4662                 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
4663 }
4664
4665 /**
4666  * ixgbe_write_mc_addr_list - write multicast addresses to MTA
4667  * @netdev: network interface device structure
4668  *
4669  * Writes multicast address list to the MTA hash table.
4670  * Returns: -ENOMEM on failure
4671  *                0 on no addresses written
4672  *                X on writing X addresses to MTA
4673  **/
4674 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
4675 {
4676         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4677         struct ixgbe_hw *hw = &adapter->hw;
4678
4679         if (!netif_running(netdev))
4680                 return 0;
4681
4682         if (hw->mac.ops.update_mc_addr_list)
4683                 hw->mac.ops.update_mc_addr_list(hw, netdev);
4684         else
4685                 return -ENOMEM;
4686
4687 #ifdef CONFIG_PCI_IOV
4688         ixgbe_restore_vf_multicasts(adapter);
4689 #endif
4690
4691         return netdev_mc_count(netdev);
4692 }
4693
4694 #ifdef CONFIG_PCI_IOV
4695 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
4696 {
4697         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4698         struct ixgbe_hw *hw = &adapter->hw;
4699         int i;
4700
4701         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4702                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4703
4704                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4705                         hw->mac.ops.set_rar(hw, i,
4706                                             mac_table->addr,
4707                                             mac_table->pool,
4708                                             IXGBE_RAH_AV);
4709                 else
4710                         hw->mac.ops.clear_rar(hw, i);
4711         }
4712 }
4713
4714 #endif
4715 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4716 {
4717         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4718         struct ixgbe_hw *hw = &adapter->hw;
4719         int i;
4720
4721         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4722                 if (!(mac_table->state & IXGBE_MAC_STATE_MODIFIED))
4723                         continue;
4724
4725                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4726
4727                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4728                         hw->mac.ops.set_rar(hw, i,
4729                                             mac_table->addr,
4730                                             mac_table->pool,
4731                                             IXGBE_RAH_AV);
4732                 else
4733                         hw->mac.ops.clear_rar(hw, i);
4734         }
4735 }
4736
4737 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4738 {
4739         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4740         struct ixgbe_hw *hw = &adapter->hw;
4741         int i;
4742
4743         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4744                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4745                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4746         }
4747
4748         ixgbe_sync_mac_table(adapter);
4749 }
4750
4751 static int ixgbe_available_rars(struct ixgbe_adapter *adapter, u16 pool)
4752 {
4753         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4754         struct ixgbe_hw *hw = &adapter->hw;
4755         int i, count = 0;
4756
4757         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4758                 /* do not count default RAR as available */
4759                 if (mac_table->state & IXGBE_MAC_STATE_DEFAULT)
4760                         continue;
4761
4762                 /* only count unused and addresses that belong to us */
4763                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) {
4764                         if (mac_table->pool != pool)
4765                                 continue;
4766                 }
4767
4768                 count++;
4769         }
4770
4771         return count;
4772 }
4773
4774 /* this function destroys the first RAR entry */
4775 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter)
4776 {
4777         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4778         struct ixgbe_hw *hw = &adapter->hw;
4779
4780         memcpy(&mac_table->addr, hw->mac.addr, ETH_ALEN);
4781         mac_table->pool = VMDQ_P(0);
4782
4783         mac_table->state = IXGBE_MAC_STATE_DEFAULT | IXGBE_MAC_STATE_IN_USE;
4784
4785         hw->mac.ops.set_rar(hw, 0, mac_table->addr, mac_table->pool,
4786                             IXGBE_RAH_AV);
4787 }
4788
4789 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter,
4790                          const u8 *addr, u16 pool)
4791 {
4792         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4793         struct ixgbe_hw *hw = &adapter->hw;
4794         int i;
4795
4796         if (is_zero_ether_addr(addr))
4797                 return -EINVAL;
4798
4799         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4800                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4801                         continue;
4802
4803                 ether_addr_copy(mac_table->addr, addr);
4804                 mac_table->pool = pool;
4805
4806                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED |
4807                                     IXGBE_MAC_STATE_IN_USE;
4808
4809                 ixgbe_sync_mac_table(adapter);
4810
4811                 return i;
4812         }
4813
4814         return -ENOMEM;
4815 }
4816
4817 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter,
4818                          const u8 *addr, u16 pool)
4819 {
4820         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4821         struct ixgbe_hw *hw = &adapter->hw;
4822         int i;
4823
4824         if (is_zero_ether_addr(addr))
4825                 return -EINVAL;
4826
4827         /* search table for addr, if found clear IN_USE flag and sync */
4828         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4829                 /* we can only delete an entry if it is in use */
4830                 if (!(mac_table->state & IXGBE_MAC_STATE_IN_USE))
4831                         continue;
4832                 /* we only care about entries that belong to the given pool */
4833                 if (mac_table->pool != pool)
4834                         continue;
4835                 /* we only care about a specific MAC address */
4836                 if (!ether_addr_equal(addr, mac_table->addr))
4837                         continue;
4838
4839                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4840                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4841
4842                 ixgbe_sync_mac_table(adapter);
4843
4844                 return 0;
4845         }
4846
4847         return -ENOMEM;
4848 }
4849 /**
4850  * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
4851  * @netdev: network interface device structure
4852  *
4853  * Writes unicast address list to the RAR table.
4854  * Returns: -ENOMEM on failure/insufficient address space
4855  *                0 on no addresses written
4856  *                X on writing X addresses to the RAR table
4857  **/
4858 static int ixgbe_write_uc_addr_list(struct net_device *netdev, int vfn)
4859 {
4860         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4861         int count = 0;
4862
4863         /* return ENOMEM indicating insufficient memory for addresses */
4864         if (netdev_uc_count(netdev) > ixgbe_available_rars(adapter, vfn))
4865                 return -ENOMEM;
4866
4867         if (!netdev_uc_empty(netdev)) {
4868                 struct netdev_hw_addr *ha;
4869                 netdev_for_each_uc_addr(ha, netdev) {
4870                         ixgbe_del_mac_filter(adapter, ha->addr, vfn);
4871                         ixgbe_add_mac_filter(adapter, ha->addr, vfn);
4872                         count++;
4873                 }
4874         }
4875         return count;
4876 }
4877
4878 static int ixgbe_uc_sync(struct net_device *netdev, const unsigned char *addr)
4879 {
4880         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4881         int ret;
4882
4883         ret = ixgbe_add_mac_filter(adapter, addr, VMDQ_P(0));
4884
4885         return min_t(int, ret, 0);
4886 }
4887
4888 static int ixgbe_uc_unsync(struct net_device *netdev, const unsigned char *addr)
4889 {
4890         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4891
4892         ixgbe_del_mac_filter(adapter, addr, VMDQ_P(0));
4893
4894         return 0;
4895 }
4896
4897 /**
4898  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4899  * @netdev: network interface device structure
4900  *
4901  * The set_rx_method entry point is called whenever the unicast/multicast
4902  * address list or the network interface flags are updated.  This routine is
4903  * responsible for configuring the hardware for proper unicast, multicast and
4904  * promiscuous mode.
4905  **/
4906 void ixgbe_set_rx_mode(struct net_device *netdev)
4907 {
4908         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4909         struct ixgbe_hw *hw = &adapter->hw;
4910         u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4911         netdev_features_t features = netdev->features;
4912         int count;
4913
4914         /* Check for Promiscuous and All Multicast modes */
4915         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4916
4917         /* set all bits that we expect to always be set */
4918         fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4919         fctrl |= IXGBE_FCTRL_BAM;
4920         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4921         fctrl |= IXGBE_FCTRL_PMCF;
4922
4923         /* clear the bits we are changing the status of */
4924         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4925         if (netdev->flags & IFF_PROMISC) {
4926                 hw->addr_ctrl.user_set_promisc = true;
4927                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4928                 vmolr |= IXGBE_VMOLR_MPE;
4929                 features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
4930         } else {
4931                 if (netdev->flags & IFF_ALLMULTI) {
4932                         fctrl |= IXGBE_FCTRL_MPE;
4933                         vmolr |= IXGBE_VMOLR_MPE;
4934                 }
4935                 hw->addr_ctrl.user_set_promisc = false;
4936         }
4937
4938         /*
4939          * Write addresses to available RAR registers, if there is not
4940          * sufficient space to store all the addresses then enable
4941          * unicast promiscuous mode
4942          */
4943         if (__dev_uc_sync(netdev, ixgbe_uc_sync, ixgbe_uc_unsync)) {
4944                 fctrl |= IXGBE_FCTRL_UPE;
4945                 vmolr |= IXGBE_VMOLR_ROPE;
4946         }
4947
4948         /* Write addresses to the MTA, if the attempt fails
4949          * then we should just turn on promiscuous mode so
4950          * that we can at least receive multicast traffic
4951          */
4952         count = ixgbe_write_mc_addr_list(netdev);
4953         if (count < 0) {
4954                 fctrl |= IXGBE_FCTRL_MPE;
4955                 vmolr |= IXGBE_VMOLR_MPE;
4956         } else if (count) {
4957                 vmolr |= IXGBE_VMOLR_ROMPE;
4958         }
4959
4960         if (hw->mac.type != ixgbe_mac_82598EB) {
4961                 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4962                          ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4963                            IXGBE_VMOLR_ROPE);
4964                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4965         }
4966
4967         /* This is useful for sniffing bad packets. */
4968         if (features & NETIF_F_RXALL) {
4969                 /* UPE and MPE will be handled by normal PROMISC logic
4970                  * in e1000e_set_rx_mode */
4971                 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4972                           IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4973                           IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4974
4975                 fctrl &= ~(IXGBE_FCTRL_DPF);
4976                 /* NOTE:  VLAN filtering is disabled by setting PROMISC */
4977         }
4978
4979         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4980
4981         if (features & NETIF_F_HW_VLAN_CTAG_RX)
4982                 ixgbe_vlan_strip_enable(adapter);
4983         else
4984                 ixgbe_vlan_strip_disable(adapter);
4985
4986         if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
4987                 ixgbe_vlan_promisc_disable(adapter);
4988         else
4989                 ixgbe_vlan_promisc_enable(adapter);
4990 }
4991
4992 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4993 {
4994         int q_idx;
4995
4996         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
4997                 napi_enable(&adapter->q_vector[q_idx]->napi);
4998 }
4999
5000 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
5001 {
5002         int q_idx;
5003
5004         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
5005                 napi_disable(&adapter->q_vector[q_idx]->napi);
5006 }
5007
5008 static void ixgbe_clear_udp_tunnel_port(struct ixgbe_adapter *adapter, u32 mask)
5009 {
5010         struct ixgbe_hw *hw = &adapter->hw;
5011         u32 vxlanctrl;
5012
5013         if (!(adapter->flags & (IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE |
5014                                 IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)))
5015                 return;
5016
5017         vxlanctrl = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) & ~mask;
5018         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, vxlanctrl);
5019
5020         if (mask & IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK)
5021                 adapter->vxlan_port = 0;
5022
5023         if (mask & IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK)
5024                 adapter->geneve_port = 0;
5025 }
5026
5027 #ifdef CONFIG_IXGBE_DCB
5028 /**
5029  * ixgbe_configure_dcb - Configure DCB hardware
5030  * @adapter: ixgbe adapter struct
5031  *
5032  * This is called by the driver on open to configure the DCB hardware.
5033  * This is also called by the gennetlink interface when reconfiguring
5034  * the DCB state.
5035  */
5036 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
5037 {
5038         struct ixgbe_hw *hw = &adapter->hw;
5039         int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
5040
5041         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
5042                 if (hw->mac.type == ixgbe_mac_82598EB)
5043                         netif_set_gso_max_size(adapter->netdev, 65536);
5044                 return;
5045         }
5046
5047         if (hw->mac.type == ixgbe_mac_82598EB)
5048                 netif_set_gso_max_size(adapter->netdev, 32768);
5049
5050 #ifdef IXGBE_FCOE
5051         if (adapter->netdev->features & NETIF_F_FCOE_MTU)
5052                 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
5053 #endif
5054
5055         /* reconfigure the hardware */
5056         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
5057                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
5058                                                 DCB_TX_CONFIG);
5059                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
5060                                                 DCB_RX_CONFIG);
5061                 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
5062         } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
5063                 ixgbe_dcb_hw_ets(&adapter->hw,
5064                                  adapter->ixgbe_ieee_ets,
5065                                  max_frame);
5066                 ixgbe_dcb_hw_pfc_config(&adapter->hw,
5067                                         adapter->ixgbe_ieee_pfc->pfc_en,
5068                                         adapter->ixgbe_ieee_ets->prio_tc);
5069         }
5070
5071         /* Enable RSS Hash per TC */
5072         if (hw->mac.type != ixgbe_mac_82598EB) {
5073                 u32 msb = 0;
5074                 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
5075
5076                 while (rss_i) {
5077                         msb++;
5078                         rss_i >>= 1;
5079                 }
5080
5081                 /* write msb to all 8 TCs in one write */
5082                 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
5083         }
5084 }
5085 #endif
5086
5087 /* Additional bittime to account for IXGBE framing */
5088 #define IXGBE_ETH_FRAMING 20
5089
5090 /**
5091  * ixgbe_hpbthresh - calculate high water mark for flow control
5092  *
5093  * @adapter: board private structure to calculate for
5094  * @pb: packet buffer to calculate
5095  */
5096 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
5097 {
5098         struct ixgbe_hw *hw = &adapter->hw;
5099         struct net_device *dev = adapter->netdev;
5100         int link, tc, kb, marker;
5101         u32 dv_id, rx_pba;
5102
5103         /* Calculate max LAN frame size */
5104         tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
5105
5106 #ifdef IXGBE_FCOE
5107         /* FCoE traffic class uses FCOE jumbo frames */
5108         if ((dev->features & NETIF_F_FCOE_MTU) &&
5109             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5110             (pb == ixgbe_fcoe_get_tc(adapter)))
5111                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5112 #endif
5113
5114         /* Calculate delay value for device */
5115         switch (hw->mac.type) {
5116         case ixgbe_mac_X540:
5117         case ixgbe_mac_X550:
5118         case ixgbe_mac_X550EM_x:
5119         case ixgbe_mac_x550em_a:
5120                 dv_id = IXGBE_DV_X540(link, tc);
5121                 break;
5122         default:
5123                 dv_id = IXGBE_DV(link, tc);
5124                 break;
5125         }
5126
5127         /* Loopback switch introduces additional latency */
5128         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5129                 dv_id += IXGBE_B2BT(tc);
5130
5131         /* Delay value is calculated in bit times convert to KB */
5132         kb = IXGBE_BT2KB(dv_id);
5133         rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
5134
5135         marker = rx_pba - kb;
5136
5137         /* It is possible that the packet buffer is not large enough
5138          * to provide required headroom. In this case throw an error
5139          * to user and a do the best we can.
5140          */
5141         if (marker < 0) {
5142                 e_warn(drv, "Packet Buffer(%i) can not provide enough"
5143                             "headroom to support flow control."
5144                             "Decrease MTU or number of traffic classes\n", pb);
5145                 marker = tc + 1;
5146         }
5147
5148         return marker;
5149 }
5150
5151 /**
5152  * ixgbe_lpbthresh - calculate low water mark for for flow control
5153  *
5154  * @adapter: board private structure to calculate for
5155  * @pb: packet buffer to calculate
5156  */
5157 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
5158 {
5159         struct ixgbe_hw *hw = &adapter->hw;
5160         struct net_device *dev = adapter->netdev;
5161         int tc;
5162         u32 dv_id;
5163
5164         /* Calculate max LAN frame size */
5165         tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
5166
5167 #ifdef IXGBE_FCOE
5168         /* FCoE traffic class uses FCOE jumbo frames */
5169         if ((dev->features & NETIF_F_FCOE_MTU) &&
5170             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5171             (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
5172                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5173 #endif
5174
5175         /* Calculate delay value for device */
5176         switch (hw->mac.type) {
5177         case ixgbe_mac_X540:
5178         case ixgbe_mac_X550:
5179         case ixgbe_mac_X550EM_x:
5180         case ixgbe_mac_x550em_a:
5181                 dv_id = IXGBE_LOW_DV_X540(tc);
5182                 break;
5183         default:
5184                 dv_id = IXGBE_LOW_DV(tc);
5185                 break;
5186         }
5187
5188         /* Delay value is calculated in bit times convert to KB */
5189         return IXGBE_BT2KB(dv_id);
5190 }
5191
5192 /*
5193  * ixgbe_pbthresh_setup - calculate and setup high low water marks
5194  */
5195 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
5196 {
5197         struct ixgbe_hw *hw = &adapter->hw;
5198         int num_tc = netdev_get_num_tc(adapter->netdev);
5199         int i;
5200
5201         if (!num_tc)
5202                 num_tc = 1;
5203
5204         for (i = 0; i < num_tc; i++) {
5205                 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
5206                 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
5207
5208                 /* Low water marks must not be larger than high water marks */
5209                 if (hw->fc.low_water[i] > hw->fc.high_water[i])
5210                         hw->fc.low_water[i] = 0;
5211         }
5212
5213         for (; i < MAX_TRAFFIC_CLASS; i++)
5214                 hw->fc.high_water[i] = 0;
5215 }
5216
5217 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
5218 {
5219         struct ixgbe_hw *hw = &adapter->hw;
5220         int hdrm;
5221         u8 tc = netdev_get_num_tc(adapter->netdev);
5222
5223         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
5224             adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
5225                 hdrm = 32 << adapter->fdir_pballoc;
5226         else
5227                 hdrm = 0;
5228
5229         hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
5230         ixgbe_pbthresh_setup(adapter);
5231 }
5232
5233 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
5234 {
5235         struct ixgbe_hw *hw = &adapter->hw;
5236         struct hlist_node *node2;
5237         struct ixgbe_fdir_filter *filter;
5238
5239         spin_lock(&adapter->fdir_perfect_lock);
5240
5241         if (!hlist_empty(&adapter->fdir_filter_list))
5242                 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
5243
5244         hlist_for_each_entry_safe(filter, node2,
5245                                   &adapter->fdir_filter_list, fdir_node) {
5246                 ixgbe_fdir_write_perfect_filter_82599(hw,
5247                                 &filter->filter,
5248                                 filter->sw_idx,
5249                                 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
5250                                 IXGBE_FDIR_DROP_QUEUE :
5251                                 adapter->rx_ring[filter->action]->reg_idx);
5252         }
5253
5254         spin_unlock(&adapter->fdir_perfect_lock);
5255 }
5256
5257 static void ixgbe_macvlan_set_rx_mode(struct net_device *dev, unsigned int pool,
5258                                       struct ixgbe_adapter *adapter)
5259 {
5260         struct ixgbe_hw *hw = &adapter->hw;
5261         u32 vmolr;
5262
5263         /* No unicast promiscuous support for VMDQ devices. */
5264         vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(pool));
5265         vmolr |= (IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE);
5266
5267         /* clear the affected bit */
5268         vmolr &= ~IXGBE_VMOLR_MPE;
5269
5270         if (dev->flags & IFF_ALLMULTI) {
5271                 vmolr |= IXGBE_VMOLR_MPE;
5272         } else {
5273                 vmolr |= IXGBE_VMOLR_ROMPE;
5274                 hw->mac.ops.update_mc_addr_list(hw, dev);
5275         }
5276         ixgbe_write_uc_addr_list(adapter->netdev, pool);
5277         IXGBE_WRITE_REG(hw, IXGBE_VMOLR(pool), vmolr);
5278 }
5279
5280 static void ixgbe_fwd_psrtype(struct ixgbe_fwd_adapter *vadapter)
5281 {
5282         struct ixgbe_adapter *adapter = vadapter->real_adapter;
5283         int rss_i = adapter->num_rx_queues_per_pool;
5284         struct ixgbe_hw *hw = &adapter->hw;
5285         u16 pool = vadapter->pool;
5286         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
5287                       IXGBE_PSRTYPE_UDPHDR |
5288                       IXGBE_PSRTYPE_IPV4HDR |
5289                       IXGBE_PSRTYPE_L2HDR |
5290                       IXGBE_PSRTYPE_IPV6HDR;
5291
5292         if (hw->mac.type == ixgbe_mac_82598EB)
5293                 return;
5294
5295         if (rss_i > 3)
5296                 psrtype |= 2u << 29;
5297         else if (rss_i > 1)
5298                 psrtype |= 1u << 29;
5299
5300         IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
5301 }
5302
5303 /**
5304  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
5305  * @rx_ring: ring to free buffers from
5306  **/
5307 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
5308 {
5309         u16 i = rx_ring->next_to_clean;
5310         struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
5311
5312         /* Free all the Rx ring sk_buffs */
5313         while (i != rx_ring->next_to_alloc) {
5314                 if (rx_buffer->skb) {
5315                         struct sk_buff *skb = rx_buffer->skb;
5316                         if (IXGBE_CB(skb)->page_released)
5317                                 dma_unmap_page_attrs(rx_ring->dev,
5318                                                      IXGBE_CB(skb)->dma,
5319                                                      ixgbe_rx_pg_size(rx_ring),
5320                                                      DMA_FROM_DEVICE,
5321                                                      IXGBE_RX_DMA_ATTR);
5322                         dev_kfree_skb(skb);
5323                 }
5324
5325                 /* Invalidate cache lines that may have been written to by
5326                  * device so that we avoid corrupting memory.
5327                  */
5328                 dma_sync_single_range_for_cpu(rx_ring->dev,
5329                                               rx_buffer->dma,
5330                                               rx_buffer->page_offset,
5331                                               ixgbe_rx_bufsz(rx_ring),
5332                                               DMA_FROM_DEVICE);
5333
5334                 /* free resources associated with mapping */
5335                 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
5336                                      ixgbe_rx_pg_size(rx_ring),
5337                                      DMA_FROM_DEVICE,
5338                                      IXGBE_RX_DMA_ATTR);
5339                 __page_frag_cache_drain(rx_buffer->page,
5340                                         rx_buffer->pagecnt_bias);
5341
5342                 i++;
5343                 rx_buffer++;
5344                 if (i == rx_ring->count) {
5345                         i = 0;
5346                         rx_buffer = rx_ring->rx_buffer_info;
5347                 }
5348         }
5349
5350         rx_ring->next_to_alloc = 0;
5351         rx_ring->next_to_clean = 0;
5352         rx_ring->next_to_use = 0;
5353 }
5354
5355 static void ixgbe_disable_fwd_ring(struct ixgbe_fwd_adapter *vadapter,
5356                                    struct ixgbe_ring *rx_ring)
5357 {
5358         struct ixgbe_adapter *adapter = vadapter->real_adapter;
5359         int index = rx_ring->queue_index + vadapter->rx_base_queue;
5360
5361         /* shutdown specific queue receive and wait for dma to settle */
5362         ixgbe_disable_rx_queue(adapter, rx_ring);
5363         usleep_range(10000, 20000);
5364         ixgbe_irq_disable_queues(adapter, BIT_ULL(index));
5365         ixgbe_clean_rx_ring(rx_ring);
5366         rx_ring->l2_accel_priv = NULL;
5367 }
5368
5369 static int ixgbe_fwd_ring_down(struct net_device *vdev,
5370                                struct ixgbe_fwd_adapter *accel)
5371 {
5372         struct ixgbe_adapter *adapter = accel->real_adapter;
5373         unsigned int rxbase = accel->rx_base_queue;
5374         unsigned int txbase = accel->tx_base_queue;
5375         int i;
5376
5377         netif_tx_stop_all_queues(vdev);
5378
5379         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
5380                 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
5381                 adapter->rx_ring[rxbase + i]->netdev = adapter->netdev;
5382         }
5383
5384         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
5385                 adapter->tx_ring[txbase + i]->l2_accel_priv = NULL;
5386                 adapter->tx_ring[txbase + i]->netdev = adapter->netdev;
5387         }
5388
5389
5390         return 0;
5391 }
5392
5393 static int ixgbe_fwd_ring_up(struct net_device *vdev,
5394                              struct ixgbe_fwd_adapter *accel)
5395 {
5396         struct ixgbe_adapter *adapter = accel->real_adapter;
5397         unsigned int rxbase, txbase, queues;
5398         int i, baseq, err = 0;
5399
5400         if (!test_bit(accel->pool, &adapter->fwd_bitmask))
5401                 return 0;
5402
5403         baseq = accel->pool * adapter->num_rx_queues_per_pool;
5404         netdev_dbg(vdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
5405                    accel->pool, adapter->num_rx_pools,
5406                    baseq, baseq + adapter->num_rx_queues_per_pool,
5407                    adapter->fwd_bitmask);
5408
5409         accel->netdev = vdev;
5410         accel->rx_base_queue = rxbase = baseq;
5411         accel->tx_base_queue = txbase = baseq;
5412
5413         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5414                 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
5415
5416         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
5417                 adapter->rx_ring[rxbase + i]->netdev = vdev;
5418                 adapter->rx_ring[rxbase + i]->l2_accel_priv = accel;
5419                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[rxbase + i]);
5420         }
5421
5422         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
5423                 adapter->tx_ring[txbase + i]->netdev = vdev;
5424                 adapter->tx_ring[txbase + i]->l2_accel_priv = accel;
5425         }
5426
5427         queues = min_t(unsigned int,
5428                        adapter->num_rx_queues_per_pool, vdev->num_tx_queues);
5429         err = netif_set_real_num_tx_queues(vdev, queues);
5430         if (err)
5431                 goto fwd_queue_err;
5432
5433         err = netif_set_real_num_rx_queues(vdev, queues);
5434         if (err)
5435                 goto fwd_queue_err;
5436
5437         if (is_valid_ether_addr(vdev->dev_addr))
5438                 ixgbe_add_mac_filter(adapter, vdev->dev_addr, accel->pool);
5439
5440         ixgbe_fwd_psrtype(accel);
5441         ixgbe_macvlan_set_rx_mode(vdev, accel->pool, adapter);
5442         return err;
5443 fwd_queue_err:
5444         ixgbe_fwd_ring_down(vdev, accel);
5445         return err;
5446 }
5447
5448 static int ixgbe_upper_dev_walk(struct net_device *upper, void *data)
5449 {
5450         if (netif_is_macvlan(upper)) {
5451                 struct macvlan_dev *dfwd = netdev_priv(upper);
5452                 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
5453
5454                 if (dfwd->fwd_priv)
5455                         ixgbe_fwd_ring_up(upper, vadapter);
5456         }
5457
5458         return 0;
5459 }
5460
5461 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
5462 {
5463         netdev_walk_all_upper_dev_rcu(adapter->netdev,
5464                                       ixgbe_upper_dev_walk, NULL);
5465 }
5466
5467 static void ixgbe_configure(struct ixgbe_adapter *adapter)
5468 {
5469         struct ixgbe_hw *hw = &adapter->hw;
5470
5471         ixgbe_configure_pb(adapter);
5472 #ifdef CONFIG_IXGBE_DCB
5473         ixgbe_configure_dcb(adapter);
5474 #endif
5475         /*
5476          * We must restore virtualization before VLANs or else
5477          * the VLVF registers will not be populated
5478          */
5479         ixgbe_configure_virtualization(adapter);
5480
5481         ixgbe_set_rx_mode(adapter->netdev);
5482         ixgbe_restore_vlan(adapter);
5483
5484         switch (hw->mac.type) {
5485         case ixgbe_mac_82599EB:
5486         case ixgbe_mac_X540:
5487                 hw->mac.ops.disable_rx_buff(hw);
5488                 break;
5489         default:
5490                 break;
5491         }
5492
5493         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
5494                 ixgbe_init_fdir_signature_82599(&adapter->hw,
5495                                                 adapter->fdir_pballoc);
5496         } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
5497                 ixgbe_init_fdir_perfect_82599(&adapter->hw,
5498                                               adapter->fdir_pballoc);
5499                 ixgbe_fdir_filter_restore(adapter);
5500         }
5501
5502         switch (hw->mac.type) {
5503         case ixgbe_mac_82599EB:
5504         case ixgbe_mac_X540:
5505                 hw->mac.ops.enable_rx_buff(hw);
5506                 break;
5507         default:
5508                 break;
5509         }
5510
5511 #ifdef CONFIG_IXGBE_DCA
5512         /* configure DCA */
5513         if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE)
5514                 ixgbe_setup_dca(adapter);
5515 #endif /* CONFIG_IXGBE_DCA */
5516
5517 #ifdef IXGBE_FCOE
5518         /* configure FCoE L2 filters, redirection table, and Rx control */
5519         ixgbe_configure_fcoe(adapter);
5520
5521 #endif /* IXGBE_FCOE */
5522         ixgbe_configure_tx(adapter);
5523         ixgbe_configure_rx(adapter);
5524         ixgbe_configure_dfwd(adapter);
5525 }
5526
5527 /**
5528  * ixgbe_sfp_link_config - set up SFP+ link
5529  * @adapter: pointer to private adapter struct
5530  **/
5531 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
5532 {
5533         /*
5534          * We are assuming the worst case scenario here, and that
5535          * is that an SFP was inserted/removed after the reset
5536          * but before SFP detection was enabled.  As such the best
5537          * solution is to just start searching as soon as we start
5538          */
5539         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
5540                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
5541
5542         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
5543         adapter->sfp_poll_time = 0;
5544 }
5545
5546 /**
5547  * ixgbe_non_sfp_link_config - set up non-SFP+ link
5548  * @hw: pointer to private hardware struct
5549  *
5550  * Returns 0 on success, negative on failure
5551  **/
5552 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
5553 {
5554         u32 speed;
5555         bool autoneg, link_up = false;
5556         int ret = IXGBE_ERR_LINK_SETUP;
5557
5558         if (hw->mac.ops.check_link)
5559                 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
5560
5561         if (ret)
5562                 return ret;
5563
5564         speed = hw->phy.autoneg_advertised;
5565         if ((!speed) && (hw->mac.ops.get_link_capabilities))
5566                 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
5567                                                         &autoneg);
5568         if (ret)
5569                 return ret;
5570
5571         if (hw->mac.ops.setup_link)
5572                 ret = hw->mac.ops.setup_link(hw, speed, link_up);
5573
5574         return ret;
5575 }
5576
5577 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
5578 {
5579         struct ixgbe_hw *hw = &adapter->hw;
5580         u32 gpie = 0;
5581
5582         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
5583                 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
5584                        IXGBE_GPIE_OCD;
5585                 gpie |= IXGBE_GPIE_EIAME;
5586                 /*
5587                  * use EIAM to auto-mask when MSI-X interrupt is asserted
5588                  * this saves a register write for every interrupt
5589                  */
5590                 switch (hw->mac.type) {
5591                 case ixgbe_mac_82598EB:
5592                         IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5593                         break;
5594                 case ixgbe_mac_82599EB:
5595                 case ixgbe_mac_X540:
5596                 case ixgbe_mac_X550:
5597                 case ixgbe_mac_X550EM_x:
5598                 case ixgbe_mac_x550em_a:
5599                 default:
5600                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
5601                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
5602                         break;
5603                 }
5604         } else {
5605                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
5606                  * specifically only auto mask tx and rx interrupts */
5607                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5608         }
5609
5610         /* XXX: to interrupt immediately for EICS writes, enable this */
5611         /* gpie |= IXGBE_GPIE_EIMEN; */
5612
5613         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
5614                 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
5615
5616                 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
5617                 case IXGBE_82599_VMDQ_8Q_MASK:
5618                         gpie |= IXGBE_GPIE_VTMODE_16;
5619                         break;
5620                 case IXGBE_82599_VMDQ_4Q_MASK:
5621                         gpie |= IXGBE_GPIE_VTMODE_32;
5622                         break;
5623                 default:
5624                         gpie |= IXGBE_GPIE_VTMODE_64;
5625                         break;
5626                 }
5627         }
5628
5629         /* Enable Thermal over heat sensor interrupt */
5630         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
5631                 switch (adapter->hw.mac.type) {
5632                 case ixgbe_mac_82599EB:
5633                         gpie |= IXGBE_SDP0_GPIEN_8259X;
5634                         break;
5635                 default:
5636                         break;
5637                 }
5638         }
5639
5640         /* Enable fan failure interrupt */
5641         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
5642                 gpie |= IXGBE_SDP1_GPIEN(hw);
5643
5644         switch (hw->mac.type) {
5645         case ixgbe_mac_82599EB:
5646                 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X;
5647                 break;
5648         case ixgbe_mac_X550EM_x:
5649         case ixgbe_mac_x550em_a:
5650                 gpie |= IXGBE_SDP0_GPIEN_X540;
5651                 break;
5652         default:
5653                 break;
5654         }
5655
5656         IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
5657 }
5658
5659 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
5660 {
5661         struct ixgbe_hw *hw = &adapter->hw;
5662         int err;
5663         u32 ctrl_ext;
5664
5665         ixgbe_get_hw_control(adapter);
5666         ixgbe_setup_gpie(adapter);
5667
5668         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
5669                 ixgbe_configure_msix(adapter);
5670         else
5671                 ixgbe_configure_msi_and_legacy(adapter);
5672
5673         /* enable the optics for 82599 SFP+ fiber */
5674         if (hw->mac.ops.enable_tx_laser)
5675                 hw->mac.ops.enable_tx_laser(hw);
5676
5677         if (hw->phy.ops.set_phy_power)
5678                 hw->phy.ops.set_phy_power(hw, true);
5679
5680         smp_mb__before_atomic();
5681         clear_bit(__IXGBE_DOWN, &adapter->state);
5682         ixgbe_napi_enable_all(adapter);
5683
5684         if (ixgbe_is_sfp(hw)) {
5685                 ixgbe_sfp_link_config(adapter);
5686         } else {
5687                 err = ixgbe_non_sfp_link_config(hw);
5688                 if (err)
5689                         e_err(probe, "link_config FAILED %d\n", err);
5690         }
5691
5692         /* clear any pending interrupts, may auto mask */
5693         IXGBE_READ_REG(hw, IXGBE_EICR);
5694         ixgbe_irq_enable(adapter, true, true);
5695
5696         /*
5697          * If this adapter has a fan, check to see if we had a failure
5698          * before we enabled the interrupt.
5699          */
5700         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
5701                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
5702                 if (esdp & IXGBE_ESDP_SDP1)
5703                         e_crit(drv, "Fan has stopped, replace the adapter\n");
5704         }
5705
5706         /* bring the link up in the watchdog, this could race with our first
5707          * link up interrupt but shouldn't be a problem */
5708         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5709         adapter->link_check_timeout = jiffies;
5710         mod_timer(&adapter->service_timer, jiffies);
5711
5712         /* Set PF Reset Done bit so PF/VF Mail Ops can work */
5713         ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
5714         ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
5715         IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
5716 }
5717
5718 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
5719 {
5720         WARN_ON(in_interrupt());
5721         /* put off any impending NetWatchDogTimeout */
5722         netif_trans_update(adapter->netdev);
5723
5724         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
5725                 usleep_range(1000, 2000);
5726         if (adapter->hw.phy.type == ixgbe_phy_fw)
5727                 ixgbe_watchdog_link_is_down(adapter);
5728         ixgbe_down(adapter);
5729         /*
5730          * If SR-IOV enabled then wait a bit before bringing the adapter
5731          * back up to give the VFs time to respond to the reset.  The
5732          * two second wait is based upon the watchdog timer cycle in
5733          * the VF driver.
5734          */
5735         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5736                 msleep(2000);
5737         ixgbe_up(adapter);
5738         clear_bit(__IXGBE_RESETTING, &adapter->state);
5739 }
5740
5741 void ixgbe_up(struct ixgbe_adapter *adapter)
5742 {
5743         /* hardware has been reset, we need to reload some things */
5744         ixgbe_configure(adapter);
5745
5746         ixgbe_up_complete(adapter);
5747 }
5748
5749 void ixgbe_reset(struct ixgbe_adapter *adapter)
5750 {
5751         struct ixgbe_hw *hw = &adapter->hw;
5752         struct net_device *netdev = adapter->netdev;
5753         int err;
5754
5755         if (ixgbe_removed(hw->hw_addr))
5756                 return;
5757         /* lock SFP init bit to prevent race conditions with the watchdog */
5758         while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5759                 usleep_range(1000, 2000);
5760
5761         /* clear all SFP and link config related flags while holding SFP_INIT */
5762         adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
5763                              IXGBE_FLAG2_SFP_NEEDS_RESET);
5764         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5765
5766         err = hw->mac.ops.init_hw(hw);
5767         switch (err) {
5768         case 0:
5769         case IXGBE_ERR_SFP_NOT_PRESENT:
5770         case IXGBE_ERR_SFP_NOT_SUPPORTED:
5771                 break;
5772         case IXGBE_ERR_MASTER_REQUESTS_PENDING:
5773                 e_dev_err("master disable timed out\n");
5774                 break;
5775         case IXGBE_ERR_EEPROM_VERSION:
5776                 /* We are running on a pre-production device, log a warning */
5777                 e_dev_warn("This device is a pre-production adapter/LOM. "
5778                            "Please be aware there may be issues associated with "
5779                            "your hardware.  If you are experiencing problems "
5780                            "please contact your Intel or hardware "
5781                            "representative who provided you with this "
5782                            "hardware.\n");
5783                 break;
5784         default:
5785                 e_dev_err("Hardware Error: %d\n", err);
5786         }
5787
5788         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5789
5790         /* flush entries out of MAC table */
5791         ixgbe_flush_sw_mac_table(adapter);
5792         __dev_uc_unsync(netdev, NULL);
5793
5794         /* do not flush user set addresses */
5795         ixgbe_mac_set_default_filter(adapter);
5796
5797         /* update SAN MAC vmdq pool selection */
5798         if (hw->mac.san_mac_rar_index)
5799                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5800
5801         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5802                 ixgbe_ptp_reset(adapter);
5803
5804         if (hw->phy.ops.set_phy_power) {
5805                 if (!netif_running(adapter->netdev) && !adapter->wol)
5806                         hw->phy.ops.set_phy_power(hw, false);
5807                 else
5808                         hw->phy.ops.set_phy_power(hw, true);
5809         }
5810 }
5811
5812 /**
5813  * ixgbe_clean_tx_ring - Free Tx Buffers
5814  * @tx_ring: ring to be cleaned
5815  **/
5816 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5817 {
5818         u16 i = tx_ring->next_to_clean;
5819         struct ixgbe_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
5820
5821         while (i != tx_ring->next_to_use) {
5822                 union ixgbe_adv_tx_desc *eop_desc, *tx_desc;
5823
5824                 /* Free all the Tx ring sk_buffs */
5825                 if (ring_is_xdp(tx_ring))
5826                         page_frag_free(tx_buffer->data);
5827                 else
5828                         dev_kfree_skb_any(tx_buffer->skb);
5829
5830                 /* unmap skb header data */
5831                 dma_unmap_single(tx_ring->dev,
5832                                  dma_unmap_addr(tx_buffer, dma),
5833                                  dma_unmap_len(tx_buffer, len),
5834                                  DMA_TO_DEVICE);
5835
5836                 /* check for eop_desc to determine the end of the packet */
5837                 eop_desc = tx_buffer->next_to_watch;
5838                 tx_desc = IXGBE_TX_DESC(tx_ring, i);
5839
5840                 /* unmap remaining buffers */
5841                 while (tx_desc != eop_desc) {
5842                         tx_buffer++;
5843                         tx_desc++;
5844                         i++;
5845                         if (unlikely(i == tx_ring->count)) {
5846                                 i = 0;
5847                                 tx_buffer = tx_ring->tx_buffer_info;
5848                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
5849                         }
5850
5851                         /* unmap any remaining paged data */
5852                         if (dma_unmap_len(tx_buffer, len))
5853                                 dma_unmap_page(tx_ring->dev,
5854                                                dma_unmap_addr(tx_buffer, dma),
5855                                                dma_unmap_len(tx_buffer, len),
5856                                                DMA_TO_DEVICE);
5857                 }
5858
5859                 /* move us one more past the eop_desc for start of next pkt */
5860                 tx_buffer++;
5861                 i++;
5862                 if (unlikely(i == tx_ring->count)) {
5863                         i = 0;
5864                         tx_buffer = tx_ring->tx_buffer_info;
5865                 }
5866         }
5867
5868         /* reset BQL for queue */
5869         if (!ring_is_xdp(tx_ring))
5870                 netdev_tx_reset_queue(txring_txq(tx_ring));
5871
5872         /* reset next_to_use and next_to_clean */
5873         tx_ring->next_to_use = 0;
5874         tx_ring->next_to_clean = 0;
5875 }
5876
5877 /**
5878  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
5879  * @adapter: board private structure
5880  **/
5881 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
5882 {
5883         int i;
5884
5885         for (i = 0; i < adapter->num_rx_queues; i++)
5886                 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
5887 }
5888
5889 /**
5890  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
5891  * @adapter: board private structure
5892  **/
5893 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
5894 {
5895         int i;
5896
5897         for (i = 0; i < adapter->num_tx_queues; i++)
5898                 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
5899         for (i = 0; i < adapter->num_xdp_queues; i++)
5900                 ixgbe_clean_tx_ring(adapter->xdp_ring[i]);
5901 }
5902
5903 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
5904 {
5905         struct hlist_node *node2;
5906         struct ixgbe_fdir_filter *filter;
5907
5908         spin_lock(&adapter->fdir_perfect_lock);
5909
5910         hlist_for_each_entry_safe(filter, node2,
5911                                   &adapter->fdir_filter_list, fdir_node) {
5912                 hlist_del(&filter->fdir_node);
5913                 kfree(filter);
5914         }
5915         adapter->fdir_filter_count = 0;
5916
5917         spin_unlock(&adapter->fdir_perfect_lock);
5918 }
5919
5920 static int ixgbe_disable_macvlan(struct net_device *upper, void *data)
5921 {
5922         if (netif_is_macvlan(upper)) {
5923                 struct macvlan_dev *vlan = netdev_priv(upper);
5924
5925                 if (vlan->fwd_priv) {
5926                         netif_tx_stop_all_queues(upper);
5927                         netif_carrier_off(upper);
5928                         netif_tx_disable(upper);
5929                 }
5930         }
5931
5932         return 0;
5933 }
5934
5935 void ixgbe_down(struct ixgbe_adapter *adapter)
5936 {
5937         struct net_device *netdev = adapter->netdev;
5938         struct ixgbe_hw *hw = &adapter->hw;
5939         int i;
5940
5941         /* signal that we are down to the interrupt handler */
5942         if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
5943                 return; /* do nothing if already down */
5944
5945         /* disable receives */
5946         hw->mac.ops.disable_rx(hw);
5947
5948         /* disable all enabled rx queues */
5949         for (i = 0; i < adapter->num_rx_queues; i++)
5950                 /* this call also flushes the previous write */
5951                 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
5952
5953         usleep_range(10000, 20000);
5954
5955         /* synchronize_sched() needed for pending XDP buffers to drain */
5956         if (adapter->xdp_ring[0])
5957                 synchronize_sched();
5958         netif_tx_stop_all_queues(netdev);
5959
5960         /* call carrier off first to avoid false dev_watchdog timeouts */
5961         netif_carrier_off(netdev);
5962         netif_tx_disable(netdev);
5963
5964         /* disable any upper devices */
5965         netdev_walk_all_upper_dev_rcu(adapter->netdev,
5966                                       ixgbe_disable_macvlan, NULL);
5967
5968         ixgbe_irq_disable(adapter);
5969
5970         ixgbe_napi_disable_all(adapter);
5971
5972         clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
5973         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
5974         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
5975
5976         del_timer_sync(&adapter->service_timer);
5977
5978         if (adapter->num_vfs) {
5979                 /* Clear EITR Select mapping */
5980                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
5981
5982                 /* Mark all the VFs as inactive */
5983                 for (i = 0 ; i < adapter->num_vfs; i++)
5984                         adapter->vfinfo[i].clear_to_send = false;
5985
5986                 /* ping all the active vfs to let them know we are going down */
5987                 ixgbe_ping_all_vfs(adapter);
5988
5989                 /* Disable all VFTE/VFRE TX/RX */
5990                 ixgbe_disable_tx_rx(adapter);
5991         }
5992
5993         /* disable transmits in the hardware now that interrupts are off */
5994         for (i = 0; i < adapter->num_tx_queues; i++) {
5995                 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
5996                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5997         }
5998         for (i = 0; i < adapter->num_xdp_queues; i++) {
5999                 u8 reg_idx = adapter->xdp_ring[i]->reg_idx;
6000
6001                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
6002         }
6003
6004         /* Disable the Tx DMA engine on 82599 and later MAC */
6005         switch (hw->mac.type) {
6006         case ixgbe_mac_82599EB:
6007         case ixgbe_mac_X540:
6008         case ixgbe_mac_X550:
6009         case ixgbe_mac_X550EM_x:
6010         case ixgbe_mac_x550em_a:
6011                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
6012                                 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
6013                                  ~IXGBE_DMATXCTL_TE));
6014                 break;
6015         default:
6016                 break;
6017         }
6018
6019         if (!pci_channel_offline(adapter->pdev))
6020                 ixgbe_reset(adapter);
6021
6022         /* power down the optics for 82599 SFP+ fiber */
6023         if (hw->mac.ops.disable_tx_laser)
6024                 hw->mac.ops.disable_tx_laser(hw);
6025
6026         ixgbe_clean_all_tx_rings(adapter);
6027         ixgbe_clean_all_rx_rings(adapter);
6028 }
6029
6030 /**
6031  * ixgbe_eee_capable - helper function to determine EEE support on X550
6032  * @adapter: board private structure
6033  */
6034 static void ixgbe_set_eee_capable(struct ixgbe_adapter *adapter)
6035 {
6036         struct ixgbe_hw *hw = &adapter->hw;
6037
6038         switch (hw->device_id) {
6039         case IXGBE_DEV_ID_X550EM_A_1G_T:
6040         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
6041                 if (!hw->phy.eee_speeds_supported)
6042                         break;
6043                 adapter->flags2 |= IXGBE_FLAG2_EEE_CAPABLE;
6044                 if (!hw->phy.eee_speeds_advertised)
6045                         break;
6046                 adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED;
6047                 break;
6048         default:
6049                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_CAPABLE;
6050                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED;
6051                 break;
6052         }
6053 }
6054
6055 /**
6056  * ixgbe_tx_timeout - Respond to a Tx Hang
6057  * @netdev: network interface device structure
6058  **/
6059 static void ixgbe_tx_timeout(struct net_device *netdev)
6060 {
6061         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6062
6063         /* Do the reset outside of interrupt context */
6064         ixgbe_tx_timeout_reset(adapter);
6065 }
6066
6067 #ifdef CONFIG_IXGBE_DCB
6068 static void ixgbe_init_dcb(struct ixgbe_adapter *adapter)
6069 {
6070         struct ixgbe_hw *hw = &adapter->hw;
6071         struct tc_configuration *tc;
6072         int j;
6073
6074         switch (hw->mac.type) {
6075         case ixgbe_mac_82598EB:
6076         case ixgbe_mac_82599EB:
6077                 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
6078                 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
6079                 break;
6080         case ixgbe_mac_X540:
6081         case ixgbe_mac_X550:
6082                 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
6083                 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
6084                 break;
6085         case ixgbe_mac_X550EM_x:
6086         case ixgbe_mac_x550em_a:
6087         default:
6088                 adapter->dcb_cfg.num_tcs.pg_tcs = DEF_TRAFFIC_CLASS;
6089                 adapter->dcb_cfg.num_tcs.pfc_tcs = DEF_TRAFFIC_CLASS;
6090                 break;
6091         }
6092
6093         /* Configure DCB traffic classes */
6094         for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
6095                 tc = &adapter->dcb_cfg.tc_config[j];
6096                 tc->path[DCB_TX_CONFIG].bwg_id = 0;
6097                 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
6098                 tc->path[DCB_RX_CONFIG].bwg_id = 0;
6099                 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
6100                 tc->dcb_pfc = pfc_disabled;
6101         }
6102
6103         /* Initialize default user to priority mapping, UPx->TC0 */
6104         tc = &adapter->dcb_cfg.tc_config[0];
6105         tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
6106         tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
6107
6108         adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
6109         adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
6110         adapter->dcb_cfg.pfc_mode_enable = false;
6111         adapter->dcb_set_bitmap = 0x00;
6112         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
6113                 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
6114         memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
6115                sizeof(adapter->temp_dcb_cfg));
6116 }
6117 #endif
6118
6119 /**
6120  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
6121  * @adapter: board private structure to initialize
6122  *
6123  * ixgbe_sw_init initializes the Adapter private data structure.
6124  * Fields are initialized based on PCI device information and
6125  * OS network device settings (MTU size).
6126  **/
6127 static int ixgbe_sw_init(struct ixgbe_adapter *adapter,
6128                          const struct ixgbe_info *ii)
6129 {
6130         struct ixgbe_hw *hw = &adapter->hw;
6131         struct pci_dev *pdev = adapter->pdev;
6132         unsigned int rss, fdir;
6133         u32 fwsm;
6134         int i;
6135
6136         /* PCI config space info */
6137
6138         hw->vendor_id = pdev->vendor;
6139         hw->device_id = pdev->device;
6140         hw->revision_id = pdev->revision;
6141         hw->subsystem_vendor_id = pdev->subsystem_vendor;
6142         hw->subsystem_device_id = pdev->subsystem_device;
6143
6144         /* get_invariants needs the device IDs */
6145         ii->get_invariants(hw);
6146
6147         /* Set common capability flags and settings */
6148         rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
6149         adapter->ring_feature[RING_F_RSS].limit = rss;
6150         adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
6151         adapter->max_q_vectors = MAX_Q_VECTORS_82599;
6152         adapter->atr_sample_rate = 20;
6153         fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
6154         adapter->ring_feature[RING_F_FDIR].limit = fdir;
6155         adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
6156 #ifdef CONFIG_IXGBE_DCA
6157         adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
6158 #endif
6159 #ifdef CONFIG_IXGBE_DCB
6160         adapter->flags |= IXGBE_FLAG_DCB_CAPABLE;
6161         adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
6162 #endif
6163 #ifdef IXGBE_FCOE
6164         adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
6165         adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6166 #ifdef CONFIG_IXGBE_DCB
6167         /* Default traffic class to use for FCoE */
6168         adapter->fcoe.up = IXGBE_FCOE_DEFTC;
6169 #endif /* CONFIG_IXGBE_DCB */
6170 #endif /* IXGBE_FCOE */
6171
6172         /* initialize static ixgbe jump table entries */
6173         adapter->jump_tables[0] = kzalloc(sizeof(*adapter->jump_tables[0]),
6174                                           GFP_KERNEL);
6175         if (!adapter->jump_tables[0])
6176                 return -ENOMEM;
6177         adapter->jump_tables[0]->mat = ixgbe_ipv4_fields;
6178
6179         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++)
6180                 adapter->jump_tables[i] = NULL;
6181
6182         adapter->mac_table = kzalloc(sizeof(struct ixgbe_mac_addr) *
6183                                      hw->mac.num_rar_entries,
6184                                      GFP_ATOMIC);
6185         if (!adapter->mac_table)
6186                 return -ENOMEM;
6187
6188         if (ixgbe_init_rss_key(adapter))
6189                 return -ENOMEM;
6190
6191         /* Set MAC specific capability flags and exceptions */
6192         switch (hw->mac.type) {
6193         case ixgbe_mac_82598EB:
6194                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
6195
6196                 if (hw->device_id == IXGBE_DEV_ID_82598AT)
6197                         adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
6198
6199                 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
6200                 adapter->ring_feature[RING_F_FDIR].limit = 0;
6201                 adapter->atr_sample_rate = 0;
6202                 adapter->fdir_pballoc = 0;
6203 #ifdef IXGBE_FCOE
6204                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6205                 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6206 #ifdef CONFIG_IXGBE_DCB
6207                 adapter->fcoe.up = 0;
6208 #endif /* IXGBE_DCB */
6209 #endif /* IXGBE_FCOE */
6210                 break;
6211         case ixgbe_mac_82599EB:
6212                 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
6213                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6214                 break;
6215         case ixgbe_mac_X540:
6216                 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
6217                 if (fwsm & IXGBE_FWSM_TS_ENABLED)
6218                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6219                 break;
6220         case ixgbe_mac_x550em_a:
6221                 adapter->flags |= IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE;
6222                 switch (hw->device_id) {
6223                 case IXGBE_DEV_ID_X550EM_A_1G_T:
6224                 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
6225                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6226                         break;
6227                 default:
6228                         break;
6229                 }
6230         /* fall through */
6231         case ixgbe_mac_X550EM_x:
6232 #ifdef CONFIG_IXGBE_DCB
6233                 adapter->flags &= ~IXGBE_FLAG_DCB_CAPABLE;
6234 #endif
6235 #ifdef IXGBE_FCOE
6236                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6237 #ifdef CONFIG_IXGBE_DCB
6238                 adapter->fcoe.up = 0;
6239 #endif /* IXGBE_DCB */
6240 #endif /* IXGBE_FCOE */
6241         /* Fall Through */
6242         case ixgbe_mac_X550:
6243                 if (hw->mac.type == ixgbe_mac_X550)
6244                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6245 #ifdef CONFIG_IXGBE_DCA
6246                 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
6247 #endif
6248                 adapter->flags |= IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE;
6249                 break;
6250         default:
6251                 break;
6252         }
6253
6254 #ifdef IXGBE_FCOE
6255         /* FCoE support exists, always init the FCoE lock */
6256         spin_lock_init(&adapter->fcoe.lock);
6257
6258 #endif
6259         /* n-tuple support exists, always init our spinlock */
6260         spin_lock_init(&adapter->fdir_perfect_lock);
6261
6262 #ifdef CONFIG_IXGBE_DCB
6263         ixgbe_init_dcb(adapter);
6264 #endif
6265
6266         /* default flow control settings */
6267         hw->fc.requested_mode = ixgbe_fc_full;
6268         hw->fc.current_mode = ixgbe_fc_full;    /* init for ethtool output */
6269         ixgbe_pbthresh_setup(adapter);
6270         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
6271         hw->fc.send_xon = true;
6272         hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
6273
6274 #ifdef CONFIG_PCI_IOV
6275         if (max_vfs > 0)
6276                 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
6277
6278         /* assign number of SR-IOV VFs */
6279         if (hw->mac.type != ixgbe_mac_82598EB) {
6280                 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
6281                         max_vfs = 0;
6282                         e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
6283                 }
6284         }
6285 #endif /* CONFIG_PCI_IOV */
6286
6287         /* enable itr by default in dynamic mode */
6288         adapter->rx_itr_setting = 1;
6289         adapter->tx_itr_setting = 1;
6290
6291         /* set default ring sizes */
6292         adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
6293         adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
6294
6295         /* set default work limits */
6296         adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
6297
6298         /* initialize eeprom parameters */
6299         if (ixgbe_init_eeprom_params_generic(hw)) {
6300                 e_dev_err("EEPROM initialization failed\n");
6301                 return -EIO;
6302         }
6303
6304         /* PF holds first pool slot */
6305         set_bit(0, &adapter->fwd_bitmask);
6306         set_bit(__IXGBE_DOWN, &adapter->state);
6307
6308         return 0;
6309 }
6310
6311 /**
6312  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
6313  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
6314  *
6315  * Return 0 on success, negative on failure
6316  **/
6317 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
6318 {
6319         struct device *dev = tx_ring->dev;
6320         int orig_node = dev_to_node(dev);
6321         int ring_node = -1;
6322         int size;
6323
6324         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
6325
6326         if (tx_ring->q_vector)
6327                 ring_node = tx_ring->q_vector->numa_node;
6328
6329         tx_ring->tx_buffer_info = vmalloc_node(size, ring_node);
6330         if (!tx_ring->tx_buffer_info)
6331                 tx_ring->tx_buffer_info = vmalloc(size);
6332         if (!tx_ring->tx_buffer_info)
6333                 goto err;
6334
6335         /* round up to nearest 4K */
6336         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
6337         tx_ring->size = ALIGN(tx_ring->size, 4096);
6338
6339         set_dev_node(dev, ring_node);
6340         tx_ring->desc = dma_alloc_coherent(dev,
6341                                            tx_ring->size,
6342                                            &tx_ring->dma,
6343                                            GFP_KERNEL);
6344         set_dev_node(dev, orig_node);
6345         if (!tx_ring->desc)
6346                 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
6347                                                    &tx_ring->dma, GFP_KERNEL);
6348         if (!tx_ring->desc)
6349                 goto err;
6350
6351         tx_ring->next_to_use = 0;
6352         tx_ring->next_to_clean = 0;
6353         return 0;
6354
6355 err:
6356         vfree(tx_ring->tx_buffer_info);
6357         tx_ring->tx_buffer_info = NULL;
6358         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
6359         return -ENOMEM;
6360 }
6361
6362 /**
6363  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
6364  * @adapter: board private structure
6365  *
6366  * If this function returns with an error, then it's possible one or
6367  * more of the rings is populated (while the rest are not).  It is the
6368  * callers duty to clean those orphaned rings.
6369  *
6370  * Return 0 on success, negative on failure
6371  **/
6372 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
6373 {
6374         int i, j = 0, err = 0;
6375
6376         for (i = 0; i < adapter->num_tx_queues; i++) {
6377                 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
6378                 if (!err)
6379                         continue;
6380
6381                 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
6382                 goto err_setup_tx;
6383         }
6384         for (j = 0; j < adapter->num_xdp_queues; j++) {
6385                 err = ixgbe_setup_tx_resources(adapter->xdp_ring[j]);
6386                 if (!err)
6387                         continue;
6388
6389                 e_err(probe, "Allocation for Tx Queue %u failed\n", j);
6390                 goto err_setup_tx;
6391         }
6392
6393         return 0;
6394 err_setup_tx:
6395         /* rewind the index freeing the rings as we go */
6396         while (j--)
6397                 ixgbe_free_tx_resources(adapter->xdp_ring[j]);
6398         while (i--)
6399                 ixgbe_free_tx_resources(adapter->tx_ring[i]);
6400         return err;
6401 }
6402
6403 /**
6404  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
6405  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
6406  *
6407  * Returns 0 on success, negative on failure
6408  **/
6409 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
6410                              struct ixgbe_ring *rx_ring)
6411 {
6412         struct device *dev = rx_ring->dev;
6413         int orig_node = dev_to_node(dev);
6414         int ring_node = -1;
6415         int size;
6416
6417         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
6418
6419         if (rx_ring->q_vector)
6420                 ring_node = rx_ring->q_vector->numa_node;
6421
6422         rx_ring->rx_buffer_info = vmalloc_node(size, ring_node);
6423         if (!rx_ring->rx_buffer_info)
6424                 rx_ring->rx_buffer_info = vmalloc(size);
6425         if (!rx_ring->rx_buffer_info)
6426                 goto err;
6427
6428         /* Round up to nearest 4K */
6429         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
6430         rx_ring->size = ALIGN(rx_ring->size, 4096);
6431
6432         set_dev_node(dev, ring_node);
6433         rx_ring->desc = dma_alloc_coherent(dev,
6434                                            rx_ring->size,
6435                                            &rx_ring->dma,
6436                                            GFP_KERNEL);
6437         set_dev_node(dev, orig_node);
6438         if (!rx_ring->desc)
6439                 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
6440                                                    &rx_ring->dma, GFP_KERNEL);
6441         if (!rx_ring->desc)
6442                 goto err;
6443
6444         rx_ring->next_to_clean = 0;
6445         rx_ring->next_to_use = 0;
6446
6447         rx_ring->xdp_prog = adapter->xdp_prog;
6448
6449         return 0;
6450 err:
6451         vfree(rx_ring->rx_buffer_info);
6452         rx_ring->rx_buffer_info = NULL;
6453         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
6454         return -ENOMEM;
6455 }
6456
6457 /**
6458  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
6459  * @adapter: board private structure
6460  *
6461  * If this function returns with an error, then it's possible one or
6462  * more of the rings is populated (while the rest are not).  It is the
6463  * callers duty to clean those orphaned rings.
6464  *
6465  * Return 0 on success, negative on failure
6466  **/
6467 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
6468 {
6469         int i, err = 0;
6470
6471         for (i = 0; i < adapter->num_rx_queues; i++) {
6472                 err = ixgbe_setup_rx_resources(adapter, adapter->rx_ring[i]);
6473                 if (!err)
6474                         continue;
6475
6476                 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
6477                 goto err_setup_rx;
6478         }
6479
6480 #ifdef IXGBE_FCOE
6481         err = ixgbe_setup_fcoe_ddp_resources(adapter);
6482         if (!err)
6483 #endif
6484                 return 0;
6485 err_setup_rx:
6486         /* rewind the index freeing the rings as we go */
6487         while (i--)
6488                 ixgbe_free_rx_resources(adapter->rx_ring[i]);
6489         return err;
6490 }
6491
6492 /**
6493  * ixgbe_free_tx_resources - Free Tx Resources per Queue
6494  * @tx_ring: Tx descriptor ring for a specific queue
6495  *
6496  * Free all transmit software resources
6497  **/
6498 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
6499 {
6500         ixgbe_clean_tx_ring(tx_ring);
6501
6502         vfree(tx_ring->tx_buffer_info);
6503         tx_ring->tx_buffer_info = NULL;
6504
6505         /* if not set, then don't free */
6506         if (!tx_ring->desc)
6507                 return;
6508
6509         dma_free_coherent(tx_ring->dev, tx_ring->size,
6510                           tx_ring->desc, tx_ring->dma);
6511
6512         tx_ring->desc = NULL;
6513 }
6514
6515 /**
6516  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
6517  * @adapter: board private structure
6518  *
6519  * Free all transmit software resources
6520  **/
6521 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
6522 {
6523         int i;
6524
6525         for (i = 0; i < adapter->num_tx_queues; i++)
6526                 if (adapter->tx_ring[i]->desc)
6527                         ixgbe_free_tx_resources(adapter->tx_ring[i]);
6528         for (i = 0; i < adapter->num_xdp_queues; i++)
6529                 if (adapter->xdp_ring[i]->desc)
6530                         ixgbe_free_tx_resources(adapter->xdp_ring[i]);
6531 }
6532
6533 /**
6534  * ixgbe_free_rx_resources - Free Rx Resources
6535  * @rx_ring: ring to clean the resources from
6536  *
6537  * Free all receive software resources
6538  **/
6539 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
6540 {
6541         ixgbe_clean_rx_ring(rx_ring);
6542
6543         rx_ring->xdp_prog = NULL;
6544         vfree(rx_ring->rx_buffer_info);
6545         rx_ring->rx_buffer_info = NULL;
6546
6547         /* if not set, then don't free */
6548         if (!rx_ring->desc)
6549                 return;
6550
6551         dma_free_coherent(rx_ring->dev, rx_ring->size,
6552                           rx_ring->desc, rx_ring->dma);
6553
6554         rx_ring->desc = NULL;
6555 }
6556
6557 /**
6558  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
6559  * @adapter: board private structure
6560  *
6561  * Free all receive software resources
6562  **/
6563 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
6564 {
6565         int i;
6566
6567 #ifdef IXGBE_FCOE
6568         ixgbe_free_fcoe_ddp_resources(adapter);
6569
6570 #endif
6571         for (i = 0; i < adapter->num_rx_queues; i++)
6572                 if (adapter->rx_ring[i]->desc)
6573                         ixgbe_free_rx_resources(adapter->rx_ring[i]);
6574 }
6575
6576 /**
6577  * ixgbe_change_mtu - Change the Maximum Transfer Unit
6578  * @netdev: network interface device structure
6579  * @new_mtu: new value for maximum frame size
6580  *
6581  * Returns 0 on success, negative on failure
6582  **/
6583 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
6584 {
6585         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6586
6587         /*
6588          * For 82599EB we cannot allow legacy VFs to enable their receive
6589          * paths when MTU greater than 1500 is configured.  So display a
6590          * warning that legacy VFs will be disabled.
6591          */
6592         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
6593             (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
6594             (new_mtu > ETH_DATA_LEN))
6595                 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
6596
6597         e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
6598
6599         /* must set new MTU before calling down or up */
6600         netdev->mtu = new_mtu;
6601
6602         if (netif_running(netdev))
6603                 ixgbe_reinit_locked(adapter);
6604
6605         return 0;
6606 }
6607
6608 /**
6609  * ixgbe_open - Called when a network interface is made active
6610  * @netdev: network interface device structure
6611  *
6612  * Returns 0 on success, negative value on failure
6613  *
6614  * The open entry point is called when a network interface is made
6615  * active by the system (IFF_UP).  At this point all resources needed
6616  * for transmit and receive operations are allocated, the interrupt
6617  * handler is registered with the OS, the watchdog timer is started,
6618  * and the stack is notified that the interface is ready.
6619  **/
6620 int ixgbe_open(struct net_device *netdev)
6621 {
6622         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6623         struct ixgbe_hw *hw = &adapter->hw;
6624         int err, queues;
6625
6626         /* disallow open during test */
6627         if (test_bit(__IXGBE_TESTING, &adapter->state))
6628                 return -EBUSY;
6629
6630         netif_carrier_off(netdev);
6631
6632         /* allocate transmit descriptors */
6633         err = ixgbe_setup_all_tx_resources(adapter);
6634         if (err)
6635                 goto err_setup_tx;
6636
6637         /* allocate receive descriptors */
6638         err = ixgbe_setup_all_rx_resources(adapter);
6639         if (err)
6640                 goto err_setup_rx;
6641
6642         ixgbe_configure(adapter);
6643
6644         err = ixgbe_request_irq(adapter);
6645         if (err)
6646                 goto err_req_irq;
6647
6648         /* Notify the stack of the actual queue counts. */
6649         if (adapter->num_rx_pools > 1)
6650                 queues = adapter->num_rx_queues_per_pool;
6651         else
6652                 queues = adapter->num_tx_queues;
6653
6654         err = netif_set_real_num_tx_queues(netdev, queues);
6655         if (err)
6656                 goto err_set_queues;
6657
6658         if (adapter->num_rx_pools > 1 &&
6659             adapter->num_rx_queues > IXGBE_MAX_L2A_QUEUES)
6660                 queues = IXGBE_MAX_L2A_QUEUES;
6661         else
6662                 queues = adapter->num_rx_queues;
6663         err = netif_set_real_num_rx_queues(netdev, queues);
6664         if (err)
6665                 goto err_set_queues;
6666
6667         ixgbe_ptp_init(adapter);
6668
6669         ixgbe_up_complete(adapter);
6670
6671         ixgbe_clear_udp_tunnel_port(adapter, IXGBE_VXLANCTRL_ALL_UDPPORT_MASK);
6672         udp_tunnel_get_rx_info(netdev);
6673
6674         return 0;
6675
6676 err_set_queues:
6677         ixgbe_free_irq(adapter);
6678 err_req_irq:
6679         ixgbe_free_all_rx_resources(adapter);
6680         if (hw->phy.ops.set_phy_power && !adapter->wol)
6681                 hw->phy.ops.set_phy_power(&adapter->hw, false);
6682 err_setup_rx:
6683         ixgbe_free_all_tx_resources(adapter);
6684 err_setup_tx:
6685         ixgbe_reset(adapter);
6686
6687         return err;
6688 }
6689
6690 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
6691 {
6692         ixgbe_ptp_suspend(adapter);
6693
6694         if (adapter->hw.phy.ops.enter_lplu) {
6695                 adapter->hw.phy.reset_disable = true;
6696                 ixgbe_down(adapter);
6697                 adapter->hw.phy.ops.enter_lplu(&adapter->hw);
6698                 adapter->hw.phy.reset_disable = false;
6699         } else {
6700                 ixgbe_down(adapter);
6701         }
6702
6703         ixgbe_free_irq(adapter);
6704
6705         ixgbe_free_all_tx_resources(adapter);
6706         ixgbe_free_all_rx_resources(adapter);
6707 }
6708
6709 /**
6710  * ixgbe_close - Disables a network interface
6711  * @netdev: network interface device structure
6712  *
6713  * Returns 0, this is not allowed to fail
6714  *
6715  * The close entry point is called when an interface is de-activated
6716  * by the OS.  The hardware is still under the drivers control, but
6717  * needs to be disabled.  A global MAC reset is issued to stop the
6718  * hardware, and all transmit and receive resources are freed.
6719  **/
6720 int ixgbe_close(struct net_device *netdev)
6721 {
6722         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6723
6724         ixgbe_ptp_stop(adapter);
6725
6726         if (netif_device_present(netdev))
6727                 ixgbe_close_suspend(adapter);
6728
6729         ixgbe_fdir_filter_exit(adapter);
6730
6731         ixgbe_release_hw_control(adapter);
6732
6733         return 0;
6734 }
6735
6736 #ifdef CONFIG_PM
6737 static int ixgbe_resume(struct pci_dev *pdev)
6738 {
6739         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6740         struct net_device *netdev = adapter->netdev;
6741         u32 err;
6742
6743         adapter->hw.hw_addr = adapter->io_addr;
6744         pci_set_power_state(pdev, PCI_D0);
6745         pci_restore_state(pdev);
6746         /*
6747          * pci_restore_state clears dev->state_saved so call
6748          * pci_save_state to restore it.
6749          */
6750         pci_save_state(pdev);
6751
6752         err = pci_enable_device_mem(pdev);
6753         if (err) {
6754                 e_dev_err("Cannot enable PCI device from suspend\n");
6755                 return err;
6756         }
6757         smp_mb__before_atomic();
6758         clear_bit(__IXGBE_DISABLED, &adapter->state);
6759         pci_set_master(pdev);
6760
6761         pci_wake_from_d3(pdev, false);
6762
6763         ixgbe_reset(adapter);
6764
6765         IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
6766
6767         rtnl_lock();
6768         err = ixgbe_init_interrupt_scheme(adapter);
6769         if (!err && netif_running(netdev))
6770                 err = ixgbe_open(netdev);
6771
6772
6773         if (!err)
6774                 netif_device_attach(netdev);
6775         rtnl_unlock();
6776
6777         return err;
6778 }
6779 #endif /* CONFIG_PM */
6780
6781 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
6782 {
6783         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6784         struct net_device *netdev = adapter->netdev;
6785         struct ixgbe_hw *hw = &adapter->hw;
6786         u32 ctrl, fctrl;
6787         u32 wufc = adapter->wol;
6788 #ifdef CONFIG_PM
6789         int retval = 0;
6790 #endif
6791
6792         rtnl_lock();
6793         netif_device_detach(netdev);
6794
6795         if (netif_running(netdev))
6796                 ixgbe_close_suspend(adapter);
6797
6798         ixgbe_clear_interrupt_scheme(adapter);
6799         rtnl_unlock();
6800
6801 #ifdef CONFIG_PM
6802         retval = pci_save_state(pdev);
6803         if (retval)
6804                 return retval;
6805
6806 #endif
6807         if (hw->mac.ops.stop_link_on_d3)
6808                 hw->mac.ops.stop_link_on_d3(hw);
6809
6810         if (wufc) {
6811                 ixgbe_set_rx_mode(netdev);
6812
6813                 /* enable the optics for 82599 SFP+ fiber as we can WoL */
6814                 if (hw->mac.ops.enable_tx_laser)
6815                         hw->mac.ops.enable_tx_laser(hw);
6816
6817                 /* turn on all-multi mode if wake on multicast is enabled */
6818                 if (wufc & IXGBE_WUFC_MC) {
6819                         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6820                         fctrl |= IXGBE_FCTRL_MPE;
6821                         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
6822                 }
6823
6824                 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
6825                 ctrl |= IXGBE_CTRL_GIO_DIS;
6826                 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
6827
6828                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
6829         } else {
6830                 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
6831                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
6832         }
6833
6834         switch (hw->mac.type) {
6835         case ixgbe_mac_82598EB:
6836                 pci_wake_from_d3(pdev, false);
6837                 break;
6838         case ixgbe_mac_82599EB:
6839         case ixgbe_mac_X540:
6840         case ixgbe_mac_X550:
6841         case ixgbe_mac_X550EM_x:
6842         case ixgbe_mac_x550em_a:
6843                 pci_wake_from_d3(pdev, !!wufc);
6844                 break;
6845         default:
6846                 break;
6847         }
6848
6849         *enable_wake = !!wufc;
6850         if (hw->phy.ops.set_phy_power && !*enable_wake)
6851                 hw->phy.ops.set_phy_power(hw, false);
6852
6853         ixgbe_release_hw_control(adapter);
6854
6855         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
6856                 pci_disable_device(pdev);
6857
6858         return 0;
6859 }
6860
6861 #ifdef CONFIG_PM
6862 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
6863 {
6864         int retval;
6865         bool wake;
6866
6867         retval = __ixgbe_shutdown(pdev, &wake);
6868         if (retval)
6869                 return retval;
6870
6871         if (wake) {
6872                 pci_prepare_to_sleep(pdev);
6873         } else {
6874                 pci_wake_from_d3(pdev, false);
6875                 pci_set_power_state(pdev, PCI_D3hot);
6876         }
6877
6878         return 0;
6879 }
6880 #endif /* CONFIG_PM */
6881
6882 static void ixgbe_shutdown(struct pci_dev *pdev)
6883 {
6884         bool wake;
6885
6886         __ixgbe_shutdown(pdev, &wake);
6887
6888         if (system_state == SYSTEM_POWER_OFF) {
6889                 pci_wake_from_d3(pdev, wake);
6890                 pci_set_power_state(pdev, PCI_D3hot);
6891         }
6892 }
6893
6894 /**
6895  * ixgbe_update_stats - Update the board statistics counters.
6896  * @adapter: board private structure
6897  **/
6898 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
6899 {
6900         struct net_device *netdev = adapter->netdev;
6901         struct ixgbe_hw *hw = &adapter->hw;
6902         struct ixgbe_hw_stats *hwstats = &adapter->stats;
6903         u64 total_mpc = 0;
6904         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
6905         u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
6906         u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
6907         u64 alloc_rx_page = 0;
6908         u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
6909
6910         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6911             test_bit(__IXGBE_RESETTING, &adapter->state))
6912                 return;
6913
6914         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
6915                 u64 rsc_count = 0;
6916                 u64 rsc_flush = 0;
6917                 for (i = 0; i < adapter->num_rx_queues; i++) {
6918                         rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
6919                         rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
6920                 }
6921                 adapter->rsc_total_count = rsc_count;
6922                 adapter->rsc_total_flush = rsc_flush;
6923         }
6924
6925         for (i = 0; i < adapter->num_rx_queues; i++) {
6926                 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
6927                 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
6928                 alloc_rx_page += rx_ring->rx_stats.alloc_rx_page;
6929                 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
6930                 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
6931                 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
6932                 bytes += rx_ring->stats.bytes;
6933                 packets += rx_ring->stats.packets;
6934         }
6935         adapter->non_eop_descs = non_eop_descs;
6936         adapter->alloc_rx_page = alloc_rx_page;
6937         adapter->alloc_rx_page_failed = alloc_rx_page_failed;
6938         adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
6939         adapter->hw_csum_rx_error = hw_csum_rx_error;
6940         netdev->stats.rx_bytes = bytes;
6941         netdev->stats.rx_packets = packets;
6942
6943         bytes = 0;
6944         packets = 0;
6945         /* gather some stats to the adapter struct that are per queue */
6946         for (i = 0; i < adapter->num_tx_queues; i++) {
6947                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6948                 restart_queue += tx_ring->tx_stats.restart_queue;
6949                 tx_busy += tx_ring->tx_stats.tx_busy;
6950                 bytes += tx_ring->stats.bytes;
6951                 packets += tx_ring->stats.packets;
6952         }
6953         for (i = 0; i < adapter->num_xdp_queues; i++) {
6954                 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i];
6955
6956                 restart_queue += xdp_ring->tx_stats.restart_queue;
6957                 tx_busy += xdp_ring->tx_stats.tx_busy;
6958                 bytes += xdp_ring->stats.bytes;
6959                 packets += xdp_ring->stats.packets;
6960         }
6961         adapter->restart_queue = restart_queue;
6962         adapter->tx_busy = tx_busy;
6963         netdev->stats.tx_bytes = bytes;
6964         netdev->stats.tx_packets = packets;
6965
6966         hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
6967
6968         /* 8 register reads */
6969         for (i = 0; i < 8; i++) {
6970                 /* for packet buffers not used, the register should read 0 */
6971                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
6972                 missed_rx += mpc;
6973                 hwstats->mpc[i] += mpc;
6974                 total_mpc += hwstats->mpc[i];
6975                 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
6976                 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
6977                 switch (hw->mac.type) {
6978                 case ixgbe_mac_82598EB:
6979                         hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
6980                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
6981                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
6982                         hwstats->pxonrxc[i] +=
6983                                 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
6984                         break;
6985                 case ixgbe_mac_82599EB:
6986                 case ixgbe_mac_X540:
6987                 case ixgbe_mac_X550:
6988                 case ixgbe_mac_X550EM_x:
6989                 case ixgbe_mac_x550em_a:
6990                         hwstats->pxonrxc[i] +=
6991                                 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
6992                         break;
6993                 default:
6994                         break;
6995                 }
6996         }
6997
6998         /*16 register reads */
6999         for (i = 0; i < 16; i++) {
7000                 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
7001                 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
7002                 if ((hw->mac.type == ixgbe_mac_82599EB) ||
7003                     (hw->mac.type == ixgbe_mac_X540) ||
7004                     (hw->mac.type == ixgbe_mac_X550) ||
7005                     (hw->mac.type == ixgbe_mac_X550EM_x) ||
7006                     (hw->mac.type == ixgbe_mac_x550em_a)) {
7007                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
7008                         IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
7009                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
7010                         IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
7011                 }
7012         }
7013
7014         hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
7015         /* work around hardware counting issue */
7016         hwstats->gprc -= missed_rx;
7017
7018         ixgbe_update_xoff_received(adapter);
7019
7020         /* 82598 hardware only has a 32 bit counter in the high register */
7021         switch (hw->mac.type) {
7022         case ixgbe_mac_82598EB:
7023                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
7024                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
7025                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
7026                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
7027                 break;
7028         case ixgbe_mac_X540:
7029         case ixgbe_mac_X550:
7030         case ixgbe_mac_X550EM_x:
7031         case ixgbe_mac_x550em_a:
7032                 /* OS2BMC stats are X540 and later */
7033                 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
7034                 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
7035                 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
7036                 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
7037                 /* fall through */
7038         case ixgbe_mac_82599EB:
7039                 for (i = 0; i < 16; i++)
7040                         adapter->hw_rx_no_dma_resources +=
7041                                              IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
7042                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
7043                 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
7044                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
7045                 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
7046                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
7047                 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
7048                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
7049                 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
7050                 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
7051 #ifdef IXGBE_FCOE
7052                 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
7053                 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
7054                 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
7055                 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
7056                 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
7057                 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
7058                 /* Add up per cpu counters for total ddp aloc fail */
7059                 if (adapter->fcoe.ddp_pool) {
7060                         struct ixgbe_fcoe *fcoe = &adapter->fcoe;
7061                         struct ixgbe_fcoe_ddp_pool *ddp_pool;
7062                         unsigned int cpu;
7063                         u64 noddp = 0, noddp_ext_buff = 0;
7064                         for_each_possible_cpu(cpu) {
7065                                 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
7066                                 noddp += ddp_pool->noddp;
7067                                 noddp_ext_buff += ddp_pool->noddp_ext_buff;
7068                         }
7069                         hwstats->fcoe_noddp = noddp;
7070                         hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
7071                 }
7072 #endif /* IXGBE_FCOE */
7073                 break;
7074         default:
7075                 break;
7076         }
7077         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
7078         hwstats->bprc += bprc;
7079         hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
7080         if (hw->mac.type == ixgbe_mac_82598EB)
7081                 hwstats->mprc -= bprc;
7082         hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
7083         hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
7084         hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
7085         hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
7086         hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
7087         hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
7088         hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
7089         hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
7090         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
7091         hwstats->lxontxc += lxon;
7092         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
7093         hwstats->lxofftxc += lxoff;
7094         hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
7095         hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
7096         /*
7097          * 82598 errata - tx of flow control packets is included in tx counters
7098          */
7099         xon_off_tot = lxon + lxoff;
7100         hwstats->gptc -= xon_off_tot;
7101         hwstats->mptc -= xon_off_tot;
7102         hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
7103         hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
7104         hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
7105         hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
7106         hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
7107         hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
7108         hwstats->ptc64 -= xon_off_tot;
7109         hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
7110         hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
7111         hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
7112         hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
7113         hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
7114         hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
7115
7116         /* Fill out the OS statistics structure */
7117         netdev->stats.multicast = hwstats->mprc;
7118
7119         /* Rx Errors */
7120         netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
7121         netdev->stats.rx_dropped = 0;
7122         netdev->stats.rx_length_errors = hwstats->rlec;
7123         netdev->stats.rx_crc_errors = hwstats->crcerrs;
7124         netdev->stats.rx_missed_errors = total_mpc;
7125 }
7126
7127 /**
7128  * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
7129  * @adapter: pointer to the device adapter structure
7130  **/
7131 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
7132 {
7133         struct ixgbe_hw *hw = &adapter->hw;
7134         int i;
7135
7136         if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
7137                 return;
7138
7139         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
7140
7141         /* if interface is down do nothing */
7142         if (test_bit(__IXGBE_DOWN, &adapter->state))
7143                 return;
7144
7145         /* do nothing if we are not using signature filters */
7146         if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
7147                 return;
7148
7149         adapter->fdir_overflow++;
7150
7151         if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
7152                 for (i = 0; i < adapter->num_tx_queues; i++)
7153                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7154                                 &(adapter->tx_ring[i]->state));
7155                 for (i = 0; i < adapter->num_xdp_queues; i++)
7156                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7157                                 &adapter->xdp_ring[i]->state);
7158                 /* re-enable flow director interrupts */
7159                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
7160         } else {
7161                 e_err(probe, "failed to finish FDIR re-initialization, "
7162                       "ignored adding FDIR ATR filters\n");
7163         }
7164 }
7165
7166 /**
7167  * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
7168  * @adapter: pointer to the device adapter structure
7169  *
7170  * This function serves two purposes.  First it strobes the interrupt lines
7171  * in order to make certain interrupts are occurring.  Secondly it sets the
7172  * bits needed to check for TX hangs.  As a result we should immediately
7173  * determine if a hang has occurred.
7174  */
7175 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
7176 {
7177         struct ixgbe_hw *hw = &adapter->hw;
7178         u64 eics = 0;
7179         int i;
7180
7181         /* If we're down, removing or resetting, just bail */
7182         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7183             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7184             test_bit(__IXGBE_RESETTING, &adapter->state))
7185                 return;
7186
7187         /* Force detection of hung controller */
7188         if (netif_carrier_ok(adapter->netdev)) {
7189                 for (i = 0; i < adapter->num_tx_queues; i++)
7190                         set_check_for_tx_hang(adapter->tx_ring[i]);
7191                 for (i = 0; i < adapter->num_xdp_queues; i++)
7192                         set_check_for_tx_hang(adapter->xdp_ring[i]);
7193         }
7194
7195         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
7196                 /*
7197                  * for legacy and MSI interrupts don't set any bits
7198                  * that are enabled for EIAM, because this operation
7199                  * would set *both* EIMS and EICS for any bit in EIAM
7200                  */
7201                 IXGBE_WRITE_REG(hw, IXGBE_EICS,
7202                         (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
7203         } else {
7204                 /* get one bit for every active tx/rx interrupt vector */
7205                 for (i = 0; i < adapter->num_q_vectors; i++) {
7206                         struct ixgbe_q_vector *qv = adapter->q_vector[i];
7207                         if (qv->rx.ring || qv->tx.ring)
7208                                 eics |= BIT_ULL(i);
7209                 }
7210         }
7211
7212         /* Cause software interrupt to ensure rings are cleaned */
7213         ixgbe_irq_rearm_queues(adapter, eics);
7214 }
7215
7216 /**
7217  * ixgbe_watchdog_update_link - update the link status
7218  * @adapter: pointer to the device adapter structure
7219  * @link_speed: pointer to a u32 to store the link_speed
7220  **/
7221 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
7222 {
7223         struct ixgbe_hw *hw = &adapter->hw;
7224         u32 link_speed = adapter->link_speed;
7225         bool link_up = adapter->link_up;
7226         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
7227
7228         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
7229                 return;
7230
7231         if (hw->mac.ops.check_link) {
7232                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
7233         } else {
7234                 /* always assume link is up, if no check link function */
7235                 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
7236                 link_up = true;
7237         }
7238
7239         if (adapter->ixgbe_ieee_pfc)
7240                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
7241
7242         if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
7243                 hw->mac.ops.fc_enable(hw);
7244                 ixgbe_set_rx_drop_en(adapter);
7245         }
7246
7247         if (link_up ||
7248             time_after(jiffies, (adapter->link_check_timeout +
7249                                  IXGBE_TRY_LINK_TIMEOUT))) {
7250                 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
7251                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
7252                 IXGBE_WRITE_FLUSH(hw);
7253         }
7254
7255         adapter->link_up = link_up;
7256         adapter->link_speed = link_speed;
7257 }
7258
7259 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
7260 {
7261 #ifdef CONFIG_IXGBE_DCB
7262         struct net_device *netdev = adapter->netdev;
7263         struct dcb_app app = {
7264                               .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
7265                               .protocol = 0,
7266                              };
7267         u8 up = 0;
7268
7269         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
7270                 up = dcb_ieee_getapp_mask(netdev, &app);
7271
7272         adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
7273 #endif
7274 }
7275
7276 static int ixgbe_enable_macvlan(struct net_device *upper, void *data)
7277 {
7278         if (netif_is_macvlan(upper)) {
7279                 struct macvlan_dev *vlan = netdev_priv(upper);
7280
7281                 if (vlan->fwd_priv)
7282                         netif_tx_wake_all_queues(upper);
7283         }
7284
7285         return 0;
7286 }
7287
7288 /**
7289  * ixgbe_watchdog_link_is_up - update netif_carrier status and
7290  *                             print link up message
7291  * @adapter: pointer to the device adapter structure
7292  **/
7293 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
7294 {
7295         struct net_device *netdev = adapter->netdev;
7296         struct ixgbe_hw *hw = &adapter->hw;
7297         u32 link_speed = adapter->link_speed;
7298         const char *speed_str;
7299         bool flow_rx, flow_tx;
7300
7301         /* only continue if link was previously down */
7302         if (netif_carrier_ok(netdev))
7303                 return;
7304
7305         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
7306
7307         switch (hw->mac.type) {
7308         case ixgbe_mac_82598EB: {
7309                 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
7310                 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
7311                 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
7312                 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
7313         }
7314                 break;
7315         case ixgbe_mac_X540:
7316         case ixgbe_mac_X550:
7317         case ixgbe_mac_X550EM_x:
7318         case ixgbe_mac_x550em_a:
7319         case ixgbe_mac_82599EB: {
7320                 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
7321                 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
7322                 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
7323                 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
7324         }
7325                 break;
7326         default:
7327                 flow_tx = false;
7328                 flow_rx = false;
7329                 break;
7330         }
7331
7332         adapter->last_rx_ptp_check = jiffies;
7333
7334         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7335                 ixgbe_ptp_start_cyclecounter(adapter);
7336
7337         switch (link_speed) {
7338         case IXGBE_LINK_SPEED_10GB_FULL:
7339                 speed_str = "10 Gbps";
7340                 break;
7341         case IXGBE_LINK_SPEED_2_5GB_FULL:
7342                 speed_str = "2.5 Gbps";
7343                 break;
7344         case IXGBE_LINK_SPEED_1GB_FULL:
7345                 speed_str = "1 Gbps";
7346                 break;
7347         case IXGBE_LINK_SPEED_100_FULL:
7348                 speed_str = "100 Mbps";
7349                 break;
7350         case IXGBE_LINK_SPEED_10_FULL:
7351                 speed_str = "10 Mbps";
7352                 break;
7353         default:
7354                 speed_str = "unknown speed";
7355                 break;
7356         }
7357         e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str,
7358                ((flow_rx && flow_tx) ? "RX/TX" :
7359                (flow_rx ? "RX" :
7360                (flow_tx ? "TX" : "None"))));
7361
7362         netif_carrier_on(netdev);
7363         ixgbe_check_vf_rate_limit(adapter);
7364
7365         /* enable transmits */
7366         netif_tx_wake_all_queues(adapter->netdev);
7367
7368         /* enable any upper devices */
7369         rtnl_lock();
7370         netdev_walk_all_upper_dev_rcu(adapter->netdev,
7371                                       ixgbe_enable_macvlan, NULL);
7372         rtnl_unlock();
7373
7374         /* update the default user priority for VFs */
7375         ixgbe_update_default_up(adapter);
7376
7377         /* ping all the active vfs to let them know link has changed */
7378         ixgbe_ping_all_vfs(adapter);
7379 }
7380
7381 /**
7382  * ixgbe_watchdog_link_is_down - update netif_carrier status and
7383  *                               print link down message
7384  * @adapter: pointer to the adapter structure
7385  **/
7386 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
7387 {
7388         struct net_device *netdev = adapter->netdev;
7389         struct ixgbe_hw *hw = &adapter->hw;
7390
7391         adapter->link_up = false;
7392         adapter->link_speed = 0;
7393
7394         /* only continue if link was up previously */
7395         if (!netif_carrier_ok(netdev))
7396                 return;
7397
7398         /* poll for SFP+ cable when link is down */
7399         if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
7400                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
7401
7402         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7403                 ixgbe_ptp_start_cyclecounter(adapter);
7404
7405         e_info(drv, "NIC Link is Down\n");
7406         netif_carrier_off(netdev);
7407
7408         /* ping all the active vfs to let them know link has changed */
7409         ixgbe_ping_all_vfs(adapter);
7410 }
7411
7412 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
7413 {
7414         int i;
7415
7416         for (i = 0; i < adapter->num_tx_queues; i++) {
7417                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
7418
7419                 if (tx_ring->next_to_use != tx_ring->next_to_clean)
7420                         return true;
7421         }
7422
7423         for (i = 0; i < adapter->num_xdp_queues; i++) {
7424                 struct ixgbe_ring *ring = adapter->xdp_ring[i];
7425
7426                 if (ring->next_to_use != ring->next_to_clean)
7427                         return true;
7428         }
7429
7430         return false;
7431 }
7432
7433 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
7434 {
7435         struct ixgbe_hw *hw = &adapter->hw;
7436         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
7437         u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
7438
7439         int i, j;
7440
7441         if (!adapter->num_vfs)
7442                 return false;
7443
7444         /* resetting the PF is only needed for MAC before X550 */
7445         if (hw->mac.type >= ixgbe_mac_X550)
7446                 return false;
7447
7448         for (i = 0; i < adapter->num_vfs; i++) {
7449                 for (j = 0; j < q_per_pool; j++) {
7450                         u32 h, t;
7451
7452                         h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
7453                         t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
7454
7455                         if (h != t)
7456                                 return true;
7457                 }
7458         }
7459
7460         return false;
7461 }
7462
7463 /**
7464  * ixgbe_watchdog_flush_tx - flush queues on link down
7465  * @adapter: pointer to the device adapter structure
7466  **/
7467 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
7468 {
7469         if (!netif_carrier_ok(adapter->netdev)) {
7470                 if (ixgbe_ring_tx_pending(adapter) ||
7471                     ixgbe_vf_tx_pending(adapter)) {
7472                         /* We've lost link, so the controller stops DMA,
7473                          * but we've got queued Tx work that's never going
7474                          * to get done, so reset controller to flush Tx.
7475                          * (Do the reset outside of interrupt context).
7476                          */
7477                         e_warn(drv, "initiating reset to clear Tx work after link loss\n");
7478                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
7479                 }
7480         }
7481 }
7482
7483 #ifdef CONFIG_PCI_IOV
7484 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
7485 {
7486         struct ixgbe_hw *hw = &adapter->hw;
7487         struct pci_dev *pdev = adapter->pdev;
7488         unsigned int vf;
7489         u32 gpc;
7490
7491         if (!(netif_carrier_ok(adapter->netdev)))
7492                 return;
7493
7494         gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
7495         if (gpc) /* If incrementing then no need for the check below */
7496                 return;
7497         /* Check to see if a bad DMA write target from an errant or
7498          * malicious VF has caused a PCIe error.  If so then we can
7499          * issue a VFLR to the offending VF(s) and then resume without
7500          * requesting a full slot reset.
7501          */
7502
7503         if (!pdev)
7504                 return;
7505
7506         /* check status reg for all VFs owned by this PF */
7507         for (vf = 0; vf < adapter->num_vfs; ++vf) {
7508                 struct pci_dev *vfdev = adapter->vfinfo[vf].vfdev;
7509                 u16 status_reg;
7510
7511                 if (!vfdev)
7512                         continue;
7513                 pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
7514                 if (status_reg != IXGBE_FAILED_READ_CFG_WORD &&
7515                     status_reg & PCI_STATUS_REC_MASTER_ABORT)
7516                         pcie_flr(vfdev);
7517         }
7518 }
7519
7520 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
7521 {
7522         u32 ssvpc;
7523
7524         /* Do not perform spoof check for 82598 or if not in IOV mode */
7525         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
7526             adapter->num_vfs == 0)
7527                 return;
7528
7529         ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
7530
7531         /*
7532          * ssvpc register is cleared on read, if zero then no
7533          * spoofed packets in the last interval.
7534          */
7535         if (!ssvpc)
7536                 return;
7537
7538         e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
7539 }
7540 #else
7541 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
7542 {
7543 }
7544
7545 static void
7546 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
7547 {
7548 }
7549 #endif /* CONFIG_PCI_IOV */
7550
7551
7552 /**
7553  * ixgbe_watchdog_subtask - check and bring link up
7554  * @adapter: pointer to the device adapter structure
7555  **/
7556 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
7557 {
7558         /* if interface is down, removing or resetting, do nothing */
7559         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7560             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7561             test_bit(__IXGBE_RESETTING, &adapter->state))
7562                 return;
7563
7564         ixgbe_watchdog_update_link(adapter);
7565
7566         if (adapter->link_up)
7567                 ixgbe_watchdog_link_is_up(adapter);
7568         else
7569                 ixgbe_watchdog_link_is_down(adapter);
7570
7571         ixgbe_check_for_bad_vf(adapter);
7572         ixgbe_spoof_check(adapter);
7573         ixgbe_update_stats(adapter);
7574
7575         ixgbe_watchdog_flush_tx(adapter);
7576 }
7577
7578 /**
7579  * ixgbe_sfp_detection_subtask - poll for SFP+ cable
7580  * @adapter: the ixgbe adapter structure
7581  **/
7582 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
7583 {
7584         struct ixgbe_hw *hw = &adapter->hw;
7585         s32 err;
7586
7587         /* not searching for SFP so there is nothing to do here */
7588         if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
7589             !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7590                 return;
7591
7592         if (adapter->sfp_poll_time &&
7593             time_after(adapter->sfp_poll_time, jiffies))
7594                 return; /* If not yet time to poll for SFP */
7595
7596         /* someone else is in init, wait until next service event */
7597         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7598                 return;
7599
7600         adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1;
7601
7602         err = hw->phy.ops.identify_sfp(hw);
7603         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7604                 goto sfp_out;
7605
7606         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
7607                 /* If no cable is present, then we need to reset
7608                  * the next time we find a good cable. */
7609                 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
7610         }
7611
7612         /* exit on error */
7613         if (err)
7614                 goto sfp_out;
7615
7616         /* exit if reset not needed */
7617         if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7618                 goto sfp_out;
7619
7620         adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
7621
7622         /*
7623          * A module may be identified correctly, but the EEPROM may not have
7624          * support for that module.  setup_sfp() will fail in that case, so
7625          * we should not allow that module to load.
7626          */
7627         if (hw->mac.type == ixgbe_mac_82598EB)
7628                 err = hw->phy.ops.reset(hw);
7629         else
7630                 err = hw->mac.ops.setup_sfp(hw);
7631
7632         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7633                 goto sfp_out;
7634
7635         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
7636         e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
7637
7638 sfp_out:
7639         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7640
7641         if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
7642             (adapter->netdev->reg_state == NETREG_REGISTERED)) {
7643                 e_dev_err("failed to initialize because an unsupported "
7644                           "SFP+ module type was detected.\n");
7645                 e_dev_err("Reload the driver after installing a "
7646                           "supported module.\n");
7647                 unregister_netdev(adapter->netdev);
7648         }
7649 }
7650
7651 /**
7652  * ixgbe_sfp_link_config_subtask - set up link SFP after module install
7653  * @adapter: the ixgbe adapter structure
7654  **/
7655 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
7656 {
7657         struct ixgbe_hw *hw = &adapter->hw;
7658         u32 speed;
7659         bool autoneg = false;
7660
7661         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
7662                 return;
7663
7664         /* someone else is in init, wait until next service event */
7665         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7666                 return;
7667
7668         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
7669
7670         speed = hw->phy.autoneg_advertised;
7671         if ((!speed) && (hw->mac.ops.get_link_capabilities)) {
7672                 hw->mac.ops.get_link_capabilities(hw, &speed, &autoneg);
7673
7674                 /* setup the highest link when no autoneg */
7675                 if (!autoneg) {
7676                         if (speed & IXGBE_LINK_SPEED_10GB_FULL)
7677                                 speed = IXGBE_LINK_SPEED_10GB_FULL;
7678                 }
7679         }
7680
7681         if (hw->mac.ops.setup_link)
7682                 hw->mac.ops.setup_link(hw, speed, true);
7683
7684         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
7685         adapter->link_check_timeout = jiffies;
7686         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7687 }
7688
7689 /**
7690  * ixgbe_service_timer - Timer Call-back
7691  * @data: pointer to adapter cast into an unsigned long
7692  **/
7693 static void ixgbe_service_timer(struct timer_list *t)
7694 {
7695         struct ixgbe_adapter *adapter = from_timer(adapter, t, service_timer);
7696         unsigned long next_event_offset;
7697
7698         /* poll faster when waiting for link */
7699         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
7700                 next_event_offset = HZ / 10;
7701         else
7702                 next_event_offset = HZ * 2;
7703
7704         /* Reset the timer */
7705         mod_timer(&adapter->service_timer, next_event_offset + jiffies);
7706
7707         ixgbe_service_event_schedule(adapter);
7708 }
7709
7710 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
7711 {
7712         struct ixgbe_hw *hw = &adapter->hw;
7713         u32 status;
7714
7715         if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
7716                 return;
7717
7718         adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
7719
7720         if (!hw->phy.ops.handle_lasi)
7721                 return;
7722
7723         status = hw->phy.ops.handle_lasi(&adapter->hw);
7724         if (status != IXGBE_ERR_OVERTEMP)
7725                 return;
7726
7727         e_crit(drv, "%s\n", ixgbe_overheat_msg);
7728 }
7729
7730 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
7731 {
7732         if (!test_and_clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state))
7733                 return;
7734
7735         /* If we're already down, removing or resetting, just bail */
7736         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7737             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7738             test_bit(__IXGBE_RESETTING, &adapter->state))
7739                 return;
7740
7741         ixgbe_dump(adapter);
7742         netdev_err(adapter->netdev, "Reset adapter\n");
7743         adapter->tx_timeout_count++;
7744
7745         rtnl_lock();
7746         ixgbe_reinit_locked(adapter);
7747         rtnl_unlock();
7748 }
7749
7750 /**
7751  * ixgbe_service_task - manages and runs subtasks
7752  * @work: pointer to work_struct containing our data
7753  **/
7754 static void ixgbe_service_task(struct work_struct *work)
7755 {
7756         struct ixgbe_adapter *adapter = container_of(work,
7757                                                      struct ixgbe_adapter,
7758                                                      service_task);
7759         if (ixgbe_removed(adapter->hw.hw_addr)) {
7760                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
7761                         rtnl_lock();
7762                         ixgbe_down(adapter);
7763                         rtnl_unlock();
7764                 }
7765                 ixgbe_service_event_complete(adapter);
7766                 return;
7767         }
7768         if (adapter->flags2 & IXGBE_FLAG2_UDP_TUN_REREG_NEEDED) {
7769                 rtnl_lock();
7770                 adapter->flags2 &= ~IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
7771                 udp_tunnel_get_rx_info(adapter->netdev);
7772                 rtnl_unlock();
7773         }
7774         ixgbe_reset_subtask(adapter);
7775         ixgbe_phy_interrupt_subtask(adapter);
7776         ixgbe_sfp_detection_subtask(adapter);
7777         ixgbe_sfp_link_config_subtask(adapter);
7778         ixgbe_check_overtemp_subtask(adapter);
7779         ixgbe_watchdog_subtask(adapter);
7780         ixgbe_fdir_reinit_subtask(adapter);
7781         ixgbe_check_hang_subtask(adapter);
7782
7783         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
7784                 ixgbe_ptp_overflow_check(adapter);
7785                 ixgbe_ptp_rx_hang(adapter);
7786                 ixgbe_ptp_tx_hang(adapter);
7787         }
7788
7789         ixgbe_service_event_complete(adapter);
7790 }
7791
7792 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
7793                      struct ixgbe_tx_buffer *first,
7794                      u8 *hdr_len)
7795 {
7796         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
7797         struct sk_buff *skb = first->skb;
7798         union {
7799                 struct iphdr *v4;
7800                 struct ipv6hdr *v6;
7801                 unsigned char *hdr;
7802         } ip;
7803         union {
7804                 struct tcphdr *tcp;
7805                 unsigned char *hdr;
7806         } l4;
7807         u32 paylen, l4_offset;
7808         int err;
7809
7810         if (skb->ip_summed != CHECKSUM_PARTIAL)
7811                 return 0;
7812
7813         if (!skb_is_gso(skb))
7814                 return 0;
7815
7816         err = skb_cow_head(skb, 0);
7817         if (err < 0)
7818                 return err;
7819
7820         if (eth_p_mpls(first->protocol))
7821                 ip.hdr = skb_inner_network_header(skb);
7822         else
7823                 ip.hdr = skb_network_header(skb);
7824         l4.hdr = skb_checksum_start(skb);
7825
7826         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
7827         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7828
7829         /* initialize outer IP header fields */
7830         if (ip.v4->version == 4) {
7831                 unsigned char *csum_start = skb_checksum_start(skb);
7832                 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
7833
7834                 /* IP header will have to cancel out any data that
7835                  * is not a part of the outer IP header
7836                  */
7837                 ip.v4->check = csum_fold(csum_partial(trans_start,
7838                                                       csum_start - trans_start,
7839                                                       0));
7840                 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7841
7842                 ip.v4->tot_len = 0;
7843                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7844                                    IXGBE_TX_FLAGS_CSUM |
7845                                    IXGBE_TX_FLAGS_IPV4;
7846         } else {
7847                 ip.v6->payload_len = 0;
7848                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7849                                    IXGBE_TX_FLAGS_CSUM;
7850         }
7851
7852         /* determine offset of inner transport header */
7853         l4_offset = l4.hdr - skb->data;
7854
7855         /* compute length of segmentation header */
7856         *hdr_len = (l4.tcp->doff * 4) + l4_offset;
7857
7858         /* remove payload length from inner checksum */
7859         paylen = skb->len - l4_offset;
7860         csum_replace_by_diff(&l4.tcp->check, htonl(paylen));
7861
7862         /* update gso size and bytecount with header size */
7863         first->gso_segs = skb_shinfo(skb)->gso_segs;
7864         first->bytecount += (first->gso_segs - 1) * *hdr_len;
7865
7866         /* mss_l4len_id: use 0 as index for TSO */
7867         mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
7868         mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
7869
7870         /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
7871         vlan_macip_lens = l4.hdr - ip.hdr;
7872         vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
7873         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7874
7875         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
7876                           mss_l4len_idx);
7877
7878         return 1;
7879 }
7880
7881 static inline bool ixgbe_ipv6_csum_is_sctp(struct sk_buff *skb)
7882 {
7883         unsigned int offset = 0;
7884
7885         ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
7886
7887         return offset == skb_checksum_start_offset(skb);
7888 }
7889
7890 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
7891                           struct ixgbe_tx_buffer *first)
7892 {
7893         struct sk_buff *skb = first->skb;
7894         u32 vlan_macip_lens = 0;
7895         u32 type_tucmd = 0;
7896
7897         if (skb->ip_summed != CHECKSUM_PARTIAL) {
7898 csum_failed:
7899                 if (!(first->tx_flags & (IXGBE_TX_FLAGS_HW_VLAN |
7900                                          IXGBE_TX_FLAGS_CC)))
7901                         return;
7902                 goto no_csum;
7903         }
7904
7905         switch (skb->csum_offset) {
7906         case offsetof(struct tcphdr, check):
7907                 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7908                 /* fall through */
7909         case offsetof(struct udphdr, check):
7910                 break;
7911         case offsetof(struct sctphdr, checksum):
7912                 /* validate that this is actually an SCTP request */
7913                 if (((first->protocol == htons(ETH_P_IP)) &&
7914                      (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
7915                     ((first->protocol == htons(ETH_P_IPV6)) &&
7916                      ixgbe_ipv6_csum_is_sctp(skb))) {
7917                         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
7918                         break;
7919                 }
7920                 /* fall through */
7921         default:
7922                 skb_checksum_help(skb);
7923                 goto csum_failed;
7924         }
7925
7926         /* update TX checksum flag */
7927         first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
7928         vlan_macip_lens = skb_checksum_start_offset(skb) -
7929                           skb_network_offset(skb);
7930 no_csum:
7931         /* vlan_macip_lens: MACLEN, VLAN tag */
7932         vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
7933         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7934
7935         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd, 0);
7936 }
7937
7938 #define IXGBE_SET_FLAG(_input, _flag, _result) \
7939         ((_flag <= _result) ? \
7940          ((u32)(_input & _flag) * (_result / _flag)) : \
7941          ((u32)(_input & _flag) / (_flag / _result)))
7942
7943 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
7944 {
7945         /* set type for advanced descriptor with frame checksum insertion */
7946         u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
7947                        IXGBE_ADVTXD_DCMD_DEXT |
7948                        IXGBE_ADVTXD_DCMD_IFCS;
7949
7950         /* set HW vlan bit if vlan is present */
7951         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
7952                                    IXGBE_ADVTXD_DCMD_VLE);
7953
7954         /* set segmentation enable bits for TSO/FSO */
7955         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
7956                                    IXGBE_ADVTXD_DCMD_TSE);
7957
7958         /* set timestamp bit if present */
7959         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
7960                                    IXGBE_ADVTXD_MAC_TSTAMP);
7961
7962         /* insert frame checksum */
7963         cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
7964
7965         return cmd_type;
7966 }
7967
7968 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
7969                                    u32 tx_flags, unsigned int paylen)
7970 {
7971         u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
7972
7973         /* enable L4 checksum for TSO and TX checksum offload */
7974         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7975                                         IXGBE_TX_FLAGS_CSUM,
7976                                         IXGBE_ADVTXD_POPTS_TXSM);
7977
7978         /* enble IPv4 checksum for TSO */
7979         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7980                                         IXGBE_TX_FLAGS_IPV4,
7981                                         IXGBE_ADVTXD_POPTS_IXSM);
7982
7983         /*
7984          * Check Context must be set if Tx switch is enabled, which it
7985          * always is for case where virtual functions are running
7986          */
7987         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7988                                         IXGBE_TX_FLAGS_CC,
7989                                         IXGBE_ADVTXD_CC);
7990
7991         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
7992 }
7993
7994 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7995 {
7996         netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
7997
7998         /* Herbert's original patch had:
7999          *  smp_mb__after_netif_stop_queue();
8000          * but since that doesn't exist yet, just open code it.
8001          */
8002         smp_mb();
8003
8004         /* We need to check again in a case another CPU has just
8005          * made room available.
8006          */
8007         if (likely(ixgbe_desc_unused(tx_ring) < size))
8008                 return -EBUSY;
8009
8010         /* A reprieve! - use start_queue because it doesn't call schedule */
8011         netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
8012         ++tx_ring->tx_stats.restart_queue;
8013         return 0;
8014 }
8015
8016 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
8017 {
8018         if (likely(ixgbe_desc_unused(tx_ring) >= size))
8019                 return 0;
8020
8021         return __ixgbe_maybe_stop_tx(tx_ring, size);
8022 }
8023
8024 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
8025                        IXGBE_TXD_CMD_RS)
8026
8027 static int ixgbe_tx_map(struct ixgbe_ring *tx_ring,
8028                         struct ixgbe_tx_buffer *first,
8029                         const u8 hdr_len)
8030 {
8031         struct sk_buff *skb = first->skb;
8032         struct ixgbe_tx_buffer *tx_buffer;
8033         union ixgbe_adv_tx_desc *tx_desc;
8034         struct skb_frag_struct *frag;
8035         dma_addr_t dma;
8036         unsigned int data_len, size;
8037         u32 tx_flags = first->tx_flags;
8038         u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
8039         u16 i = tx_ring->next_to_use;
8040
8041         tx_desc = IXGBE_TX_DESC(tx_ring, i);
8042
8043         ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
8044
8045         size = skb_headlen(skb);
8046         data_len = skb->data_len;
8047
8048 #ifdef IXGBE_FCOE
8049         if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
8050                 if (data_len < sizeof(struct fcoe_crc_eof)) {
8051                         size -= sizeof(struct fcoe_crc_eof) - data_len;
8052                         data_len = 0;
8053                 } else {
8054                         data_len -= sizeof(struct fcoe_crc_eof);
8055                 }
8056         }
8057
8058 #endif
8059         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
8060
8061         tx_buffer = first;
8062
8063         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
8064                 if (dma_mapping_error(tx_ring->dev, dma))
8065                         goto dma_error;
8066
8067                 /* record length, and DMA address */
8068                 dma_unmap_len_set(tx_buffer, len, size);
8069                 dma_unmap_addr_set(tx_buffer, dma, dma);
8070
8071                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
8072
8073                 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
8074                         tx_desc->read.cmd_type_len =
8075                                 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
8076
8077                         i++;
8078                         tx_desc++;
8079                         if (i == tx_ring->count) {
8080                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
8081                                 i = 0;
8082                         }
8083                         tx_desc->read.olinfo_status = 0;
8084
8085                         dma += IXGBE_MAX_DATA_PER_TXD;
8086                         size -= IXGBE_MAX_DATA_PER_TXD;
8087
8088                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
8089                 }
8090
8091                 if (likely(!data_len))
8092                         break;
8093
8094                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
8095
8096                 i++;
8097                 tx_desc++;
8098                 if (i == tx_ring->count) {
8099                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
8100                         i = 0;
8101                 }
8102                 tx_desc->read.olinfo_status = 0;
8103
8104 #ifdef IXGBE_FCOE
8105                 size = min_t(unsigned int, data_len, skb_frag_size(frag));
8106 #else
8107                 size = skb_frag_size(frag);
8108 #endif
8109                 data_len -= size;
8110
8111                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
8112                                        DMA_TO_DEVICE);
8113
8114                 tx_buffer = &tx_ring->tx_buffer_info[i];
8115         }
8116
8117         /* write last descriptor with RS and EOP bits */
8118         cmd_type |= size | IXGBE_TXD_CMD;
8119         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8120
8121         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
8122
8123         /* set the timestamp */
8124         first->time_stamp = jiffies;
8125
8126         /*
8127          * Force memory writes to complete before letting h/w know there
8128          * are new descriptors to fetch.  (Only applicable for weak-ordered
8129          * memory model archs, such as IA-64).
8130          *
8131          * We also need this memory barrier to make certain all of the
8132          * status bits have been updated before next_to_watch is written.
8133          */
8134         wmb();
8135
8136         /* set next_to_watch value indicating a packet is present */
8137         first->next_to_watch = tx_desc;
8138
8139         i++;
8140         if (i == tx_ring->count)
8141                 i = 0;
8142
8143         tx_ring->next_to_use = i;
8144
8145         ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
8146
8147         if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
8148                 writel(i, tx_ring->tail);
8149
8150                 /* we need this if more than one processor can write to our tail
8151                  * at a time, it synchronizes IO on IA64/Altix systems
8152                  */
8153                 mmiowb();
8154         }
8155
8156         return 0;
8157 dma_error:
8158         dev_err(tx_ring->dev, "TX DMA map failed\n");
8159
8160         /* clear dma mappings for failed tx_buffer_info map */
8161         for (;;) {
8162                 tx_buffer = &tx_ring->tx_buffer_info[i];
8163                 if (dma_unmap_len(tx_buffer, len))
8164                         dma_unmap_page(tx_ring->dev,
8165                                        dma_unmap_addr(tx_buffer, dma),
8166                                        dma_unmap_len(tx_buffer, len),
8167                                        DMA_TO_DEVICE);
8168                 dma_unmap_len_set(tx_buffer, len, 0);
8169                 if (tx_buffer == first)
8170                         break;
8171                 if (i == 0)
8172                         i += tx_ring->count;
8173                 i--;
8174         }
8175
8176         dev_kfree_skb_any(first->skb);
8177         first->skb = NULL;
8178
8179         tx_ring->next_to_use = i;
8180
8181         return -1;
8182 }
8183
8184 static void ixgbe_atr(struct ixgbe_ring *ring,
8185                       struct ixgbe_tx_buffer *first)
8186 {
8187         struct ixgbe_q_vector *q_vector = ring->q_vector;
8188         union ixgbe_atr_hash_dword input = { .dword = 0 };
8189         union ixgbe_atr_hash_dword common = { .dword = 0 };
8190         union {
8191                 unsigned char *network;
8192                 struct iphdr *ipv4;
8193                 struct ipv6hdr *ipv6;
8194         } hdr;
8195         struct tcphdr *th;
8196         unsigned int hlen;
8197         struct sk_buff *skb;
8198         __be16 vlan_id;
8199         int l4_proto;
8200
8201         /* if ring doesn't have a interrupt vector, cannot perform ATR */
8202         if (!q_vector)
8203                 return;
8204
8205         /* do nothing if sampling is disabled */
8206         if (!ring->atr_sample_rate)
8207                 return;
8208
8209         ring->atr_count++;
8210
8211         /* currently only IPv4/IPv6 with TCP is supported */
8212         if ((first->protocol != htons(ETH_P_IP)) &&
8213             (first->protocol != htons(ETH_P_IPV6)))
8214                 return;
8215
8216         /* snag network header to get L4 type and address */
8217         skb = first->skb;
8218         hdr.network = skb_network_header(skb);
8219         if (unlikely(hdr.network <= skb->data))
8220                 return;
8221         if (skb->encapsulation &&
8222             first->protocol == htons(ETH_P_IP) &&
8223             hdr.ipv4->protocol == IPPROTO_UDP) {
8224                 struct ixgbe_adapter *adapter = q_vector->adapter;
8225
8226                 if (unlikely(skb_tail_pointer(skb) < hdr.network +
8227                              VXLAN_HEADROOM))
8228                         return;
8229
8230                 /* verify the port is recognized as VXLAN */
8231                 if (adapter->vxlan_port &&
8232                     udp_hdr(skb)->dest == adapter->vxlan_port)
8233                         hdr.network = skb_inner_network_header(skb);
8234
8235                 if (adapter->geneve_port &&
8236                     udp_hdr(skb)->dest == adapter->geneve_port)
8237                         hdr.network = skb_inner_network_header(skb);
8238         }
8239
8240         /* Make sure we have at least [minimum IPv4 header + TCP]
8241          * or [IPv6 header] bytes
8242          */
8243         if (unlikely(skb_tail_pointer(skb) < hdr.network + 40))
8244                 return;
8245
8246         /* Currently only IPv4/IPv6 with TCP is supported */
8247         switch (hdr.ipv4->version) {
8248         case IPVERSION:
8249                 /* access ihl as u8 to avoid unaligned access on ia64 */
8250                 hlen = (hdr.network[0] & 0x0F) << 2;
8251                 l4_proto = hdr.ipv4->protocol;
8252                 break;
8253         case 6:
8254                 hlen = hdr.network - skb->data;
8255                 l4_proto = ipv6_find_hdr(skb, &hlen, IPPROTO_TCP, NULL, NULL);
8256                 hlen -= hdr.network - skb->data;
8257                 break;
8258         default:
8259                 return;
8260         }
8261
8262         if (l4_proto != IPPROTO_TCP)
8263                 return;
8264
8265         if (unlikely(skb_tail_pointer(skb) < hdr.network +
8266                      hlen + sizeof(struct tcphdr)))
8267                 return;
8268
8269         th = (struct tcphdr *)(hdr.network + hlen);
8270
8271         /* skip this packet since the socket is closing */
8272         if (th->fin)
8273                 return;
8274
8275         /* sample on all syn packets or once every atr sample count */
8276         if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
8277                 return;
8278
8279         /* reset sample count */
8280         ring->atr_count = 0;
8281
8282         vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
8283
8284         /*
8285          * src and dst are inverted, think how the receiver sees them
8286          *
8287          * The input is broken into two sections, a non-compressed section
8288          * containing vm_pool, vlan_id, and flow_type.  The rest of the data
8289          * is XORed together and stored in the compressed dword.
8290          */
8291         input.formatted.vlan_id = vlan_id;
8292
8293         /*
8294          * since src port and flex bytes occupy the same word XOR them together
8295          * and write the value to source port portion of compressed dword
8296          */
8297         if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
8298                 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
8299         else
8300                 common.port.src ^= th->dest ^ first->protocol;
8301         common.port.dst ^= th->source;
8302
8303         switch (hdr.ipv4->version) {
8304         case IPVERSION:
8305                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
8306                 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
8307                 break;
8308         case 6:
8309                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
8310                 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
8311                              hdr.ipv6->saddr.s6_addr32[1] ^
8312                              hdr.ipv6->saddr.s6_addr32[2] ^
8313                              hdr.ipv6->saddr.s6_addr32[3] ^
8314                              hdr.ipv6->daddr.s6_addr32[0] ^
8315                              hdr.ipv6->daddr.s6_addr32[1] ^
8316                              hdr.ipv6->daddr.s6_addr32[2] ^
8317                              hdr.ipv6->daddr.s6_addr32[3];
8318                 break;
8319         default:
8320                 break;
8321         }
8322
8323         if (hdr.network != skb_network_header(skb))
8324                 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK;
8325
8326         /* This assumes the Rx queue and Tx queue are bound to the same CPU */
8327         ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
8328                                               input, common, ring->queue_index);
8329 }
8330
8331 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
8332                               void *accel_priv, select_queue_fallback_t fallback)
8333 {
8334         struct ixgbe_fwd_adapter *fwd_adapter = accel_priv;
8335 #ifdef IXGBE_FCOE
8336         struct ixgbe_adapter *adapter;
8337         struct ixgbe_ring_feature *f;
8338         int txq;
8339 #endif
8340
8341         if (fwd_adapter)
8342                 return skb->queue_mapping + fwd_adapter->tx_base_queue;
8343
8344 #ifdef IXGBE_FCOE
8345
8346         /*
8347          * only execute the code below if protocol is FCoE
8348          * or FIP and we have FCoE enabled on the adapter
8349          */
8350         switch (vlan_get_protocol(skb)) {
8351         case htons(ETH_P_FCOE):
8352         case htons(ETH_P_FIP):
8353                 adapter = netdev_priv(dev);
8354
8355                 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
8356                         break;
8357                 /* fall through */
8358         default:
8359                 return fallback(dev, skb);
8360         }
8361
8362         f = &adapter->ring_feature[RING_F_FCOE];
8363
8364         txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
8365                                            smp_processor_id();
8366
8367         while (txq >= f->indices)
8368                 txq -= f->indices;
8369
8370         return txq + f->offset;
8371 #else
8372         return fallback(dev, skb);
8373 #endif
8374 }
8375
8376 static int ixgbe_xmit_xdp_ring(struct ixgbe_adapter *adapter,
8377                                struct xdp_buff *xdp)
8378 {
8379         struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
8380         struct ixgbe_tx_buffer *tx_buffer;
8381         union ixgbe_adv_tx_desc *tx_desc;
8382         u32 len, cmd_type;
8383         dma_addr_t dma;
8384         u16 i;
8385
8386         len = xdp->data_end - xdp->data;
8387
8388         if (unlikely(!ixgbe_desc_unused(ring)))
8389                 return IXGBE_XDP_CONSUMED;
8390
8391         dma = dma_map_single(ring->dev, xdp->data, len, DMA_TO_DEVICE);
8392         if (dma_mapping_error(ring->dev, dma))
8393                 return IXGBE_XDP_CONSUMED;
8394
8395         /* record the location of the first descriptor for this packet */
8396         tx_buffer = &ring->tx_buffer_info[ring->next_to_use];
8397         tx_buffer->bytecount = len;
8398         tx_buffer->gso_segs = 1;
8399         tx_buffer->protocol = 0;
8400
8401         i = ring->next_to_use;
8402         tx_desc = IXGBE_TX_DESC(ring, i);
8403
8404         dma_unmap_len_set(tx_buffer, len, len);
8405         dma_unmap_addr_set(tx_buffer, dma, dma);
8406         tx_buffer->data = xdp->data;
8407         tx_desc->read.buffer_addr = cpu_to_le64(dma);
8408
8409         /* put descriptor type bits */
8410         cmd_type = IXGBE_ADVTXD_DTYP_DATA |
8411                    IXGBE_ADVTXD_DCMD_DEXT |
8412                    IXGBE_ADVTXD_DCMD_IFCS;
8413         cmd_type |= len | IXGBE_TXD_CMD;
8414         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8415         tx_desc->read.olinfo_status =
8416                 cpu_to_le32(len << IXGBE_ADVTXD_PAYLEN_SHIFT);
8417
8418         /* Avoid any potential race with xdp_xmit and cleanup */
8419         smp_wmb();
8420
8421         /* set next_to_watch value indicating a packet is present */
8422         i++;
8423         if (i == ring->count)
8424                 i = 0;
8425
8426         tx_buffer->next_to_watch = tx_desc;
8427         ring->next_to_use = i;
8428
8429         return IXGBE_XDP_TX;
8430 }
8431
8432 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
8433                           struct ixgbe_adapter *adapter,
8434                           struct ixgbe_ring *tx_ring)
8435 {
8436         struct ixgbe_tx_buffer *first;
8437         int tso;
8438         u32 tx_flags = 0;
8439         unsigned short f;
8440         u16 count = TXD_USE_COUNT(skb_headlen(skb));
8441         __be16 protocol = skb->protocol;
8442         u8 hdr_len = 0;
8443
8444         /*
8445          * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
8446          *       + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
8447          *       + 2 desc gap to keep tail from touching head,
8448          *       + 1 desc for context descriptor,
8449          * otherwise try next time
8450          */
8451         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
8452                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
8453
8454         if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
8455                 tx_ring->tx_stats.tx_busy++;
8456                 return NETDEV_TX_BUSY;
8457         }
8458
8459         /* record the location of the first descriptor for this packet */
8460         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
8461         first->skb = skb;
8462         first->bytecount = skb->len;
8463         first->gso_segs = 1;
8464
8465         /* if we have a HW VLAN tag being added default to the HW one */
8466         if (skb_vlan_tag_present(skb)) {
8467                 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
8468                 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8469         /* else if it is a SW VLAN check the next protocol and store the tag */
8470         } else if (protocol == htons(ETH_P_8021Q)) {
8471                 struct vlan_hdr *vhdr, _vhdr;
8472                 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
8473                 if (!vhdr)
8474                         goto out_drop;
8475
8476                 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
8477                                   IXGBE_TX_FLAGS_VLAN_SHIFT;
8478                 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
8479         }
8480         protocol = vlan_get_protocol(skb);
8481
8482         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
8483             adapter->ptp_clock) {
8484                 if (!test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
8485                                            &adapter->state)) {
8486                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
8487                         tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
8488
8489                         /* schedule check for Tx timestamp */
8490                         adapter->ptp_tx_skb = skb_get(skb);
8491                         adapter->ptp_tx_start = jiffies;
8492                         schedule_work(&adapter->ptp_tx_work);
8493                 } else {
8494                         adapter->tx_hwtstamp_skipped++;
8495                 }
8496         }
8497
8498         skb_tx_timestamp(skb);
8499
8500 #ifdef CONFIG_PCI_IOV
8501         /*
8502          * Use the l2switch_enable flag - would be false if the DMA
8503          * Tx switch had been disabled.
8504          */
8505         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
8506                 tx_flags |= IXGBE_TX_FLAGS_CC;
8507
8508 #endif
8509         /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
8510         if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
8511             ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
8512              (skb->priority != TC_PRIO_CONTROL))) {
8513                 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
8514                 tx_flags |= (skb->priority & 0x7) <<
8515                                         IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
8516                 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
8517                         struct vlan_ethhdr *vhdr;
8518
8519                         if (skb_cow_head(skb, 0))
8520                                 goto out_drop;
8521                         vhdr = (struct vlan_ethhdr *)skb->data;
8522                         vhdr->h_vlan_TCI = htons(tx_flags >>
8523                                                  IXGBE_TX_FLAGS_VLAN_SHIFT);
8524                 } else {
8525                         tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8526                 }
8527         }
8528
8529         /* record initial flags and protocol */
8530         first->tx_flags = tx_flags;
8531         first->protocol = protocol;
8532
8533 #ifdef IXGBE_FCOE
8534         /* setup tx offload for FCoE */
8535         if ((protocol == htons(ETH_P_FCOE)) &&
8536             (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
8537                 tso = ixgbe_fso(tx_ring, first, &hdr_len);
8538                 if (tso < 0)
8539                         goto out_drop;
8540
8541                 goto xmit_fcoe;
8542         }
8543
8544 #endif /* IXGBE_FCOE */
8545         tso = ixgbe_tso(tx_ring, first, &hdr_len);
8546         if (tso < 0)
8547                 goto out_drop;
8548         else if (!tso)
8549                 ixgbe_tx_csum(tx_ring, first);
8550
8551         /* add the ATR filter if ATR is on */
8552         if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
8553                 ixgbe_atr(tx_ring, first);
8554
8555 #ifdef IXGBE_FCOE
8556 xmit_fcoe:
8557 #endif /* IXGBE_FCOE */
8558         if (ixgbe_tx_map(tx_ring, first, hdr_len))
8559                 goto cleanup_tx_timestamp;
8560
8561         return NETDEV_TX_OK;
8562
8563 out_drop:
8564         dev_kfree_skb_any(first->skb);
8565         first->skb = NULL;
8566 cleanup_tx_timestamp:
8567         if (unlikely(tx_flags & IXGBE_TX_FLAGS_TSTAMP)) {
8568                 dev_kfree_skb_any(adapter->ptp_tx_skb);
8569                 adapter->ptp_tx_skb = NULL;
8570                 cancel_work_sync(&adapter->ptp_tx_work);
8571                 clear_bit_unlock(__IXGBE_PTP_TX_IN_PROGRESS, &adapter->state);
8572         }
8573
8574         return NETDEV_TX_OK;
8575 }
8576
8577 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
8578                                       struct net_device *netdev,
8579                                       struct ixgbe_ring *ring)
8580 {
8581         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8582         struct ixgbe_ring *tx_ring;
8583
8584         /*
8585          * The minimum packet size for olinfo paylen is 17 so pad the skb
8586          * in order to meet this minimum size requirement.
8587          */
8588         if (skb_put_padto(skb, 17))
8589                 return NETDEV_TX_OK;
8590
8591         tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
8592
8593         return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
8594 }
8595
8596 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
8597                                     struct net_device *netdev)
8598 {
8599         return __ixgbe_xmit_frame(skb, netdev, NULL);
8600 }
8601
8602 /**
8603  * ixgbe_set_mac - Change the Ethernet Address of the NIC
8604  * @netdev: network interface device structure
8605  * @p: pointer to an address structure
8606  *
8607  * Returns 0 on success, negative on failure
8608  **/
8609 static int ixgbe_set_mac(struct net_device *netdev, void *p)
8610 {
8611         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8612         struct ixgbe_hw *hw = &adapter->hw;
8613         struct sockaddr *addr = p;
8614
8615         if (!is_valid_ether_addr(addr->sa_data))
8616                 return -EADDRNOTAVAIL;
8617
8618         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
8619         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
8620
8621         ixgbe_mac_set_default_filter(adapter);
8622
8623         return 0;
8624 }
8625
8626 static int
8627 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
8628 {
8629         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8630         struct ixgbe_hw *hw = &adapter->hw;
8631         u16 value;
8632         int rc;
8633
8634         if (prtad != hw->phy.mdio.prtad)
8635                 return -EINVAL;
8636         rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
8637         if (!rc)
8638                 rc = value;
8639         return rc;
8640 }
8641
8642 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
8643                             u16 addr, u16 value)
8644 {
8645         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8646         struct ixgbe_hw *hw = &adapter->hw;
8647
8648         if (prtad != hw->phy.mdio.prtad)
8649                 return -EINVAL;
8650         return hw->phy.ops.write_reg(hw, addr, devad, value);
8651 }
8652
8653 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
8654 {
8655         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8656
8657         switch (cmd) {
8658         case SIOCSHWTSTAMP:
8659                 return ixgbe_ptp_set_ts_config(adapter, req);
8660         case SIOCGHWTSTAMP:
8661                 return ixgbe_ptp_get_ts_config(adapter, req);
8662         case SIOCGMIIPHY:
8663                 if (!adapter->hw.phy.ops.read_reg)
8664                         return -EOPNOTSUPP;
8665                 /* fall through */
8666         default:
8667                 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
8668         }
8669 }
8670
8671 /**
8672  * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
8673  * netdev->dev_addrs
8674  * @netdev: network interface device structure
8675  *
8676  * Returns non-zero on failure
8677  **/
8678 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
8679 {
8680         int err = 0;
8681         struct ixgbe_adapter *adapter = netdev_priv(dev);
8682         struct ixgbe_hw *hw = &adapter->hw;
8683
8684         if (is_valid_ether_addr(hw->mac.san_addr)) {
8685                 rtnl_lock();
8686                 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
8687                 rtnl_unlock();
8688
8689                 /* update SAN MAC vmdq pool selection */
8690                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
8691         }
8692         return err;
8693 }
8694
8695 /**
8696  * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
8697  * netdev->dev_addrs
8698  * @netdev: network interface device structure
8699  *
8700  * Returns non-zero on failure
8701  **/
8702 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
8703 {
8704         int err = 0;
8705         struct ixgbe_adapter *adapter = netdev_priv(dev);
8706         struct ixgbe_mac_info *mac = &adapter->hw.mac;
8707
8708         if (is_valid_ether_addr(mac->san_addr)) {
8709                 rtnl_lock();
8710                 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
8711                 rtnl_unlock();
8712         }
8713         return err;
8714 }
8715
8716 #ifdef CONFIG_NET_POLL_CONTROLLER
8717 /*
8718  * Polling 'interrupt' - used by things like netconsole to send skbs
8719  * without having to re-enable interrupts. It's not called while
8720  * the interrupt routine is executing.
8721  */
8722 static void ixgbe_netpoll(struct net_device *netdev)
8723 {
8724         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8725         int i;
8726
8727         /* if interface is down do nothing */
8728         if (test_bit(__IXGBE_DOWN, &adapter->state))
8729                 return;
8730
8731         /* loop through and schedule all active queues */
8732         for (i = 0; i < adapter->num_q_vectors; i++)
8733                 ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
8734 }
8735
8736 #endif
8737
8738 static void ixgbe_get_ring_stats64(struct rtnl_link_stats64 *stats,
8739                                    struct ixgbe_ring *ring)
8740 {
8741         u64 bytes, packets;
8742         unsigned int start;
8743
8744         if (ring) {
8745                 do {
8746                         start = u64_stats_fetch_begin_irq(&ring->syncp);
8747                         packets = ring->stats.packets;
8748                         bytes   = ring->stats.bytes;
8749                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8750                 stats->tx_packets += packets;
8751                 stats->tx_bytes   += bytes;
8752         }
8753 }
8754
8755 static void ixgbe_get_stats64(struct net_device *netdev,
8756                               struct rtnl_link_stats64 *stats)
8757 {
8758         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8759         int i;
8760
8761         rcu_read_lock();
8762         for (i = 0; i < adapter->num_rx_queues; i++) {
8763                 struct ixgbe_ring *ring = READ_ONCE(adapter->rx_ring[i]);
8764                 u64 bytes, packets;
8765                 unsigned int start;
8766
8767                 if (ring) {
8768                         do {
8769                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
8770                                 packets = ring->stats.packets;
8771                                 bytes   = ring->stats.bytes;
8772                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8773                         stats->rx_packets += packets;
8774                         stats->rx_bytes   += bytes;
8775                 }
8776         }
8777
8778         for (i = 0; i < adapter->num_tx_queues; i++) {
8779                 struct ixgbe_ring *ring = READ_ONCE(adapter->tx_ring[i]);
8780
8781                 ixgbe_get_ring_stats64(stats, ring);
8782         }
8783         for (i = 0; i < adapter->num_xdp_queues; i++) {
8784                 struct ixgbe_ring *ring = READ_ONCE(adapter->xdp_ring[i]);
8785
8786                 ixgbe_get_ring_stats64(stats, ring);
8787         }
8788         rcu_read_unlock();
8789
8790         /* following stats updated by ixgbe_watchdog_task() */
8791         stats->multicast        = netdev->stats.multicast;
8792         stats->rx_errors        = netdev->stats.rx_errors;
8793         stats->rx_length_errors = netdev->stats.rx_length_errors;
8794         stats->rx_crc_errors    = netdev->stats.rx_crc_errors;
8795         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
8796 }
8797
8798 #ifdef CONFIG_IXGBE_DCB
8799 /**
8800  * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
8801  * @adapter: pointer to ixgbe_adapter
8802  * @tc: number of traffic classes currently enabled
8803  *
8804  * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
8805  * 802.1Q priority maps to a packet buffer that exists.
8806  */
8807 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
8808 {
8809         struct ixgbe_hw *hw = &adapter->hw;
8810         u32 reg, rsave;
8811         int i;
8812
8813         /* 82598 have a static priority to TC mapping that can not
8814          * be changed so no validation is needed.
8815          */
8816         if (hw->mac.type == ixgbe_mac_82598EB)
8817                 return;
8818
8819         reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
8820         rsave = reg;
8821
8822         for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
8823                 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
8824
8825                 /* If up2tc is out of bounds default to zero */
8826                 if (up2tc > tc)
8827                         reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
8828         }
8829
8830         if (reg != rsave)
8831                 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
8832
8833         return;
8834 }
8835
8836 /**
8837  * ixgbe_set_prio_tc_map - Configure netdev prio tc map
8838  * @adapter: Pointer to adapter struct
8839  *
8840  * Populate the netdev user priority to tc map
8841  */
8842 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
8843 {
8844         struct net_device *dev = adapter->netdev;
8845         struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
8846         struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
8847         u8 prio;
8848
8849         for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
8850                 u8 tc = 0;
8851
8852                 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
8853                         tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
8854                 else if (ets)
8855                         tc = ets->prio_tc[prio];
8856
8857                 netdev_set_prio_tc_map(dev, prio, tc);
8858         }
8859 }
8860
8861 #endif /* CONFIG_IXGBE_DCB */
8862 /**
8863  * ixgbe_setup_tc - configure net_device for multiple traffic classes
8864  *
8865  * @netdev: net device to configure
8866  * @tc: number of traffic classes to enable
8867  */
8868 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
8869 {
8870         struct ixgbe_adapter *adapter = netdev_priv(dev);
8871         struct ixgbe_hw *hw = &adapter->hw;
8872         bool pools;
8873
8874         /* Hardware supports up to 8 traffic classes */
8875         if (tc > adapter->dcb_cfg.num_tcs.pg_tcs)
8876                 return -EINVAL;
8877
8878         if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)
8879                 return -EINVAL;
8880
8881         pools = (find_first_zero_bit(&adapter->fwd_bitmask, 32) > 1);
8882         if (tc && pools && adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS)
8883                 return -EBUSY;
8884
8885         /* Hardware has to reinitialize queues and interrupts to
8886          * match packet buffer alignment. Unfortunately, the
8887          * hardware is not flexible enough to do this dynamically.
8888          */
8889         if (netif_running(dev))
8890                 ixgbe_close(dev);
8891         else
8892                 ixgbe_reset(adapter);
8893
8894         ixgbe_clear_interrupt_scheme(adapter);
8895
8896 #ifdef CONFIG_IXGBE_DCB
8897         if (tc) {
8898                 netdev_set_num_tc(dev, tc);
8899                 ixgbe_set_prio_tc_map(adapter);
8900
8901                 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
8902
8903                 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
8904                         adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
8905                         adapter->hw.fc.requested_mode = ixgbe_fc_none;
8906                 }
8907         } else {
8908                 netdev_reset_tc(dev);
8909
8910                 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
8911                         adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
8912
8913                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
8914
8915                 adapter->temp_dcb_cfg.pfc_mode_enable = false;
8916                 adapter->dcb_cfg.pfc_mode_enable = false;
8917         }
8918
8919         ixgbe_validate_rtr(adapter, tc);
8920
8921 #endif /* CONFIG_IXGBE_DCB */
8922         ixgbe_init_interrupt_scheme(adapter);
8923
8924         if (netif_running(dev))
8925                 return ixgbe_open(dev);
8926
8927         return 0;
8928 }
8929
8930 static int ixgbe_delete_clsu32(struct ixgbe_adapter *adapter,
8931                                struct tc_cls_u32_offload *cls)
8932 {
8933         u32 hdl = cls->knode.handle;
8934         u32 uhtid = TC_U32_USERHTID(cls->knode.handle);
8935         u32 loc = cls->knode.handle & 0xfffff;
8936         int err = 0, i, j;
8937         struct ixgbe_jump_table *jump = NULL;
8938
8939         if (loc > IXGBE_MAX_HW_ENTRIES)
8940                 return -EINVAL;
8941
8942         if ((uhtid != 0x800) && (uhtid >= IXGBE_MAX_LINK_HANDLE))
8943                 return -EINVAL;
8944
8945         /* Clear this filter in the link data it is associated with */
8946         if (uhtid != 0x800) {
8947                 jump = adapter->jump_tables[uhtid];
8948                 if (!jump)
8949                         return -EINVAL;
8950                 if (!test_bit(loc - 1, jump->child_loc_map))
8951                         return -EINVAL;
8952                 clear_bit(loc - 1, jump->child_loc_map);
8953         }
8954
8955         /* Check if the filter being deleted is a link */
8956         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
8957                 jump = adapter->jump_tables[i];
8958                 if (jump && jump->link_hdl == hdl) {
8959                         /* Delete filters in the hardware in the child hash
8960                          * table associated with this link
8961                          */
8962                         for (j = 0; j < IXGBE_MAX_HW_ENTRIES; j++) {
8963                                 if (!test_bit(j, jump->child_loc_map))
8964                                         continue;
8965                                 spin_lock(&adapter->fdir_perfect_lock);
8966                                 err = ixgbe_update_ethtool_fdir_entry(adapter,
8967                                                                       NULL,
8968                                                                       j + 1);
8969                                 spin_unlock(&adapter->fdir_perfect_lock);
8970                                 clear_bit(j, jump->child_loc_map);
8971                         }
8972                         /* Remove resources for this link */
8973                         kfree(jump->input);
8974                         kfree(jump->mask);
8975                         kfree(jump);
8976                         adapter->jump_tables[i] = NULL;
8977                         return err;
8978                 }
8979         }
8980
8981         spin_lock(&adapter->fdir_perfect_lock);
8982         err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, loc);
8983         spin_unlock(&adapter->fdir_perfect_lock);
8984         return err;
8985 }
8986
8987 static int ixgbe_configure_clsu32_add_hnode(struct ixgbe_adapter *adapter,
8988                                             struct tc_cls_u32_offload *cls)
8989 {
8990         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
8991
8992         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8993                 return -EINVAL;
8994
8995         /* This ixgbe devices do not support hash tables at the moment
8996          * so abort when given hash tables.
8997          */
8998         if (cls->hnode.divisor > 0)
8999                 return -EINVAL;
9000
9001         set_bit(uhtid - 1, &adapter->tables);
9002         return 0;
9003 }
9004
9005 static int ixgbe_configure_clsu32_del_hnode(struct ixgbe_adapter *adapter,
9006                                             struct tc_cls_u32_offload *cls)
9007 {
9008         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
9009
9010         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9011                 return -EINVAL;
9012
9013         clear_bit(uhtid - 1, &adapter->tables);
9014         return 0;
9015 }
9016
9017 #ifdef CONFIG_NET_CLS_ACT
9018 struct upper_walk_data {
9019         struct ixgbe_adapter *adapter;
9020         u64 action;
9021         int ifindex;
9022         u8 queue;
9023 };
9024
9025 static int get_macvlan_queue(struct net_device *upper, void *_data)
9026 {
9027         if (netif_is_macvlan(upper)) {
9028                 struct macvlan_dev *dfwd = netdev_priv(upper);
9029                 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
9030                 struct upper_walk_data *data = _data;
9031                 struct ixgbe_adapter *adapter = data->adapter;
9032                 int ifindex = data->ifindex;
9033
9034                 if (vadapter && vadapter->netdev->ifindex == ifindex) {
9035                         data->queue = adapter->rx_ring[vadapter->rx_base_queue]->reg_idx;
9036                         data->action = data->queue;
9037                         return 1;
9038                 }
9039         }
9040
9041         return 0;
9042 }
9043
9044 static int handle_redirect_action(struct ixgbe_adapter *adapter, int ifindex,
9045                                   u8 *queue, u64 *action)
9046 {
9047         unsigned int num_vfs = adapter->num_vfs, vf;
9048         struct upper_walk_data data;
9049         struct net_device *upper;
9050
9051         /* redirect to a SRIOV VF */
9052         for (vf = 0; vf < num_vfs; ++vf) {
9053                 upper = pci_get_drvdata(adapter->vfinfo[vf].vfdev);
9054                 if (upper->ifindex == ifindex) {
9055                         if (adapter->num_rx_pools > 1)
9056                                 *queue = vf * 2;
9057                         else
9058                                 *queue = vf * adapter->num_rx_queues_per_pool;
9059
9060                         *action = vf + 1;
9061                         *action <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
9062                         return 0;
9063                 }
9064         }
9065
9066         /* redirect to a offloaded macvlan netdev */
9067         data.adapter = adapter;
9068         data.ifindex = ifindex;
9069         data.action = 0;
9070         data.queue = 0;
9071         if (netdev_walk_all_upper_dev_rcu(adapter->netdev,
9072                                           get_macvlan_queue, &data)) {
9073                 *action = data.action;
9074                 *queue = data.queue;
9075
9076                 return 0;
9077         }
9078
9079         return -EINVAL;
9080 }
9081
9082 static int parse_tc_actions(struct ixgbe_adapter *adapter,
9083                             struct tcf_exts *exts, u64 *action, u8 *queue)
9084 {
9085         const struct tc_action *a;
9086         LIST_HEAD(actions);
9087         int err;
9088
9089         if (!tcf_exts_has_actions(exts))
9090                 return -EINVAL;
9091
9092         tcf_exts_to_list(exts, &actions);
9093         list_for_each_entry(a, &actions, list) {
9094
9095                 /* Drop action */
9096                 if (is_tcf_gact_shot(a)) {
9097                         *action = IXGBE_FDIR_DROP_QUEUE;
9098                         *queue = IXGBE_FDIR_DROP_QUEUE;
9099                         return 0;
9100                 }
9101
9102                 /* Redirect to a VF or a offloaded macvlan */
9103                 if (is_tcf_mirred_egress_redirect(a)) {
9104                         int ifindex = tcf_mirred_ifindex(a);
9105
9106                         err = handle_redirect_action(adapter, ifindex, queue,
9107                                                      action);
9108                         if (err == 0)
9109                                 return err;
9110                 }
9111         }
9112
9113         return -EINVAL;
9114 }
9115 #else
9116 static int parse_tc_actions(struct ixgbe_adapter *adapter,
9117                             struct tcf_exts *exts, u64 *action, u8 *queue)
9118 {
9119         return -EINVAL;
9120 }
9121 #endif /* CONFIG_NET_CLS_ACT */
9122
9123 static int ixgbe_clsu32_build_input(struct ixgbe_fdir_filter *input,
9124                                     union ixgbe_atr_input *mask,
9125                                     struct tc_cls_u32_offload *cls,
9126                                     struct ixgbe_mat_field *field_ptr,
9127                                     struct ixgbe_nexthdr *nexthdr)
9128 {
9129         int i, j, off;
9130         __be32 val, m;
9131         bool found_entry = false, found_jump_field = false;
9132
9133         for (i = 0; i < cls->knode.sel->nkeys; i++) {
9134                 off = cls->knode.sel->keys[i].off;
9135                 val = cls->knode.sel->keys[i].val;
9136                 m = cls->knode.sel->keys[i].mask;
9137
9138                 for (j = 0; field_ptr[j].val; j++) {
9139                         if (field_ptr[j].off == off) {
9140                                 field_ptr[j].val(input, mask, val, m);
9141                                 input->filter.formatted.flow_type |=
9142                                         field_ptr[j].type;
9143                                 found_entry = true;
9144                                 break;
9145                         }
9146                 }
9147                 if (nexthdr) {
9148                         if (nexthdr->off == cls->knode.sel->keys[i].off &&
9149                             nexthdr->val == cls->knode.sel->keys[i].val &&
9150                             nexthdr->mask == cls->knode.sel->keys[i].mask)
9151                                 found_jump_field = true;
9152                         else
9153                                 continue;
9154                 }
9155         }
9156
9157         if (nexthdr && !found_jump_field)
9158                 return -EINVAL;
9159
9160         if (!found_entry)
9161                 return 0;
9162
9163         mask->formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
9164                                     IXGBE_ATR_L4TYPE_MASK;
9165
9166         if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
9167                 mask->formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
9168
9169         return 0;
9170 }
9171
9172 static int ixgbe_configure_clsu32(struct ixgbe_adapter *adapter,
9173                                   struct tc_cls_u32_offload *cls)
9174 {
9175         __be16 protocol = cls->common.protocol;
9176         u32 loc = cls->knode.handle & 0xfffff;
9177         struct ixgbe_hw *hw = &adapter->hw;
9178         struct ixgbe_mat_field *field_ptr;
9179         struct ixgbe_fdir_filter *input = NULL;
9180         union ixgbe_atr_input *mask = NULL;
9181         struct ixgbe_jump_table *jump = NULL;
9182         int i, err = -EINVAL;
9183         u8 queue;
9184         u32 uhtid, link_uhtid;
9185
9186         uhtid = TC_U32_USERHTID(cls->knode.handle);
9187         link_uhtid = TC_U32_USERHTID(cls->knode.link_handle);
9188
9189         /* At the moment cls_u32 jumps to network layer and skips past
9190          * L2 headers. The canonical method to match L2 frames is to use
9191          * negative values. However this is error prone at best but really
9192          * just broken because there is no way to "know" what sort of hdr
9193          * is in front of the network layer. Fix cls_u32 to support L2
9194          * headers when needed.
9195          */
9196         if (protocol != htons(ETH_P_IP))
9197                 return err;
9198
9199         if (loc >= ((1024 << adapter->fdir_pballoc) - 2)) {
9200                 e_err(drv, "Location out of range\n");
9201                 return err;
9202         }
9203
9204         /* cls u32 is a graph starting at root node 0x800. The driver tracks
9205          * links and also the fields used to advance the parser across each
9206          * link (e.g. nexthdr/eat parameters from 'tc'). This way we can map
9207          * the u32 graph onto the hardware parse graph denoted in ixgbe_model.h
9208          * To add support for new nodes update ixgbe_model.h parse structures
9209          * this function _should_ be generic try not to hardcode values here.
9210          */
9211         if (uhtid == 0x800) {
9212                 field_ptr = (adapter->jump_tables[0])->mat;
9213         } else {
9214                 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9215                         return err;
9216                 if (!adapter->jump_tables[uhtid])
9217                         return err;
9218                 field_ptr = (adapter->jump_tables[uhtid])->mat;
9219         }
9220
9221         if (!field_ptr)
9222                 return err;
9223
9224         /* At this point we know the field_ptr is valid and need to either
9225          * build cls_u32 link or attach filter. Because adding a link to
9226          * a handle that does not exist is invalid and the same for adding
9227          * rules to handles that don't exist.
9228          */
9229
9230         if (link_uhtid) {
9231                 struct ixgbe_nexthdr *nexthdr = ixgbe_ipv4_jumps;
9232
9233                 if (link_uhtid >= IXGBE_MAX_LINK_HANDLE)
9234                         return err;
9235
9236                 if (!test_bit(link_uhtid - 1, &adapter->tables))
9237                         return err;
9238
9239                 /* Multiple filters as links to the same hash table are not
9240                  * supported. To add a new filter with the same next header
9241                  * but different match/jump conditions, create a new hash table
9242                  * and link to it.
9243                  */
9244                 if (adapter->jump_tables[link_uhtid] &&
9245                     (adapter->jump_tables[link_uhtid])->link_hdl) {
9246                         e_err(drv, "Link filter exists for link: %x\n",
9247                               link_uhtid);
9248                         return err;
9249                 }
9250
9251                 for (i = 0; nexthdr[i].jump; i++) {
9252                         if (nexthdr[i].o != cls->knode.sel->offoff ||
9253                             nexthdr[i].s != cls->knode.sel->offshift ||
9254                             nexthdr[i].m != cls->knode.sel->offmask)
9255                                 return err;
9256
9257                         jump = kzalloc(sizeof(*jump), GFP_KERNEL);
9258                         if (!jump)
9259                                 return -ENOMEM;
9260                         input = kzalloc(sizeof(*input), GFP_KERNEL);
9261                         if (!input) {
9262                                 err = -ENOMEM;
9263                                 goto free_jump;
9264                         }
9265                         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9266                         if (!mask) {
9267                                 err = -ENOMEM;
9268                                 goto free_input;
9269                         }
9270                         jump->input = input;
9271                         jump->mask = mask;
9272                         jump->link_hdl = cls->knode.handle;
9273
9274                         err = ixgbe_clsu32_build_input(input, mask, cls,
9275                                                        field_ptr, &nexthdr[i]);
9276                         if (!err) {
9277                                 jump->mat = nexthdr[i].jump;
9278                                 adapter->jump_tables[link_uhtid] = jump;
9279                                 break;
9280                         }
9281                 }
9282                 return 0;
9283         }
9284
9285         input = kzalloc(sizeof(*input), GFP_KERNEL);
9286         if (!input)
9287                 return -ENOMEM;
9288         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9289         if (!mask) {
9290                 err = -ENOMEM;
9291                 goto free_input;
9292         }
9293
9294         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid])) {
9295                 if ((adapter->jump_tables[uhtid])->input)
9296                         memcpy(input, (adapter->jump_tables[uhtid])->input,
9297                                sizeof(*input));
9298                 if ((adapter->jump_tables[uhtid])->mask)
9299                         memcpy(mask, (adapter->jump_tables[uhtid])->mask,
9300                                sizeof(*mask));
9301
9302                 /* Lookup in all child hash tables if this location is already
9303                  * filled with a filter
9304                  */
9305                 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
9306                         struct ixgbe_jump_table *link = adapter->jump_tables[i];
9307
9308                         if (link && (test_bit(loc - 1, link->child_loc_map))) {
9309                                 e_err(drv, "Filter exists in location: %x\n",
9310                                       loc);
9311                                 err = -EINVAL;
9312                                 goto err_out;
9313                         }
9314                 }
9315         }
9316         err = ixgbe_clsu32_build_input(input, mask, cls, field_ptr, NULL);
9317         if (err)
9318                 goto err_out;
9319
9320         err = parse_tc_actions(adapter, cls->knode.exts, &input->action,
9321                                &queue);
9322         if (err < 0)
9323                 goto err_out;
9324
9325         input->sw_idx = loc;
9326
9327         spin_lock(&adapter->fdir_perfect_lock);
9328
9329         if (hlist_empty(&adapter->fdir_filter_list)) {
9330                 memcpy(&adapter->fdir_mask, mask, sizeof(*mask));
9331                 err = ixgbe_fdir_set_input_mask_82599(hw, mask);
9332                 if (err)
9333                         goto err_out_w_lock;
9334         } else if (memcmp(&adapter->fdir_mask, mask, sizeof(*mask))) {
9335                 err = -EINVAL;
9336                 goto err_out_w_lock;
9337         }
9338
9339         ixgbe_atr_compute_perfect_hash_82599(&input->filter, mask);
9340         err = ixgbe_fdir_write_perfect_filter_82599(hw, &input->filter,
9341                                                     input->sw_idx, queue);
9342         if (!err)
9343                 ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
9344         spin_unlock(&adapter->fdir_perfect_lock);
9345
9346         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid]))
9347                 set_bit(loc - 1, (adapter->jump_tables[uhtid])->child_loc_map);
9348
9349         kfree(mask);
9350         return err;
9351 err_out_w_lock:
9352         spin_unlock(&adapter->fdir_perfect_lock);
9353 err_out:
9354         kfree(mask);
9355 free_input:
9356         kfree(input);
9357 free_jump:
9358         kfree(jump);
9359         return err;
9360 }
9361
9362 static int ixgbe_setup_tc_cls_u32(struct ixgbe_adapter *adapter,
9363                                   struct tc_cls_u32_offload *cls_u32)
9364 {
9365         if (cls_u32->common.chain_index)
9366                 return -EOPNOTSUPP;
9367
9368         switch (cls_u32->command) {
9369         case TC_CLSU32_NEW_KNODE:
9370         case TC_CLSU32_REPLACE_KNODE:
9371                 return ixgbe_configure_clsu32(adapter, cls_u32);
9372         case TC_CLSU32_DELETE_KNODE:
9373                 return ixgbe_delete_clsu32(adapter, cls_u32);
9374         case TC_CLSU32_NEW_HNODE:
9375         case TC_CLSU32_REPLACE_HNODE:
9376                 return ixgbe_configure_clsu32_add_hnode(adapter, cls_u32);
9377         case TC_CLSU32_DELETE_HNODE:
9378                 return ixgbe_configure_clsu32_del_hnode(adapter, cls_u32);
9379         default:
9380                 return -EOPNOTSUPP;
9381         }
9382 }
9383
9384 static int ixgbe_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
9385                                    void *cb_priv)
9386 {
9387         struct ixgbe_adapter *adapter = cb_priv;
9388
9389         if (!tc_can_offload(adapter->netdev))
9390                 return -EOPNOTSUPP;
9391
9392         switch (type) {
9393         case TC_SETUP_CLSU32:
9394                 return ixgbe_setup_tc_cls_u32(adapter, type_data);
9395         default:
9396                 return -EOPNOTSUPP;
9397         }
9398 }
9399
9400 static int ixgbe_setup_tc_block(struct net_device *dev,
9401                                 struct tc_block_offload *f)
9402 {
9403         struct ixgbe_adapter *adapter = netdev_priv(dev);
9404
9405         if (f->binder_type != TCF_BLOCK_BINDER_TYPE_CLSACT_INGRESS)
9406                 return -EOPNOTSUPP;
9407
9408         switch (f->command) {
9409         case TC_BLOCK_BIND:
9410                 return tcf_block_cb_register(f->block, ixgbe_setup_tc_block_cb,
9411                                              adapter, adapter);
9412         case TC_BLOCK_UNBIND:
9413                 tcf_block_cb_unregister(f->block, ixgbe_setup_tc_block_cb,
9414                                         adapter);
9415                 return 0;
9416         default:
9417                 return -EOPNOTSUPP;
9418         }
9419 }
9420
9421 static int ixgbe_setup_tc_mqprio(struct net_device *dev,
9422                                  struct tc_mqprio_qopt *mqprio)
9423 {
9424         mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
9425         return ixgbe_setup_tc(dev, mqprio->num_tc);
9426 }
9427
9428 static int __ixgbe_setup_tc(struct net_device *dev, enum tc_setup_type type,
9429                             void *type_data)
9430 {
9431         switch (type) {
9432         case TC_SETUP_BLOCK:
9433                 return ixgbe_setup_tc_block(dev, type_data);
9434         case TC_SETUP_QDISC_MQPRIO:
9435                 return ixgbe_setup_tc_mqprio(dev, type_data);
9436         default:
9437                 return -EOPNOTSUPP;
9438         }
9439 }
9440
9441 #ifdef CONFIG_PCI_IOV
9442 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
9443 {
9444         struct net_device *netdev = adapter->netdev;
9445
9446         rtnl_lock();
9447         ixgbe_setup_tc(netdev, netdev_get_num_tc(netdev));
9448         rtnl_unlock();
9449 }
9450
9451 #endif
9452 void ixgbe_do_reset(struct net_device *netdev)
9453 {
9454         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9455
9456         if (netif_running(netdev))
9457                 ixgbe_reinit_locked(adapter);
9458         else
9459                 ixgbe_reset(adapter);
9460 }
9461
9462 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
9463                                             netdev_features_t features)
9464 {
9465         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9466
9467         /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
9468         if (!(features & NETIF_F_RXCSUM))
9469                 features &= ~NETIF_F_LRO;
9470
9471         /* Turn off LRO if not RSC capable */
9472         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
9473                 features &= ~NETIF_F_LRO;
9474
9475         return features;
9476 }
9477
9478 static int ixgbe_set_features(struct net_device *netdev,
9479                               netdev_features_t features)
9480 {
9481         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9482         netdev_features_t changed = netdev->features ^ features;
9483         bool need_reset = false;
9484
9485         /* Make sure RSC matches LRO, reset if change */
9486         if (!(features & NETIF_F_LRO)) {
9487                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
9488                         need_reset = true;
9489                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
9490         } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
9491                    !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
9492                 if (adapter->rx_itr_setting == 1 ||
9493                     adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
9494                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
9495                         need_reset = true;
9496                 } else if ((changed ^ features) & NETIF_F_LRO) {
9497                         e_info(probe, "rx-usecs set too low, "
9498                                "disabling RSC\n");
9499                 }
9500         }
9501
9502         /*
9503          * Check if Flow Director n-tuple support or hw_tc support was
9504          * enabled or disabled.  If the state changed, we need to reset.
9505          */
9506         if ((features & NETIF_F_NTUPLE) || (features & NETIF_F_HW_TC)) {
9507                 /* turn off ATR, enable perfect filters and reset */
9508                 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
9509                         need_reset = true;
9510
9511                 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
9512                 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9513         } else {
9514                 /* turn off perfect filters, enable ATR and reset */
9515                 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
9516                         need_reset = true;
9517
9518                 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9519
9520                 /* We cannot enable ATR if SR-IOV is enabled */
9521                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED ||
9522                     /* We cannot enable ATR if we have 2 or more tcs */
9523                     (netdev_get_num_tc(netdev) > 1) ||
9524                     /* We cannot enable ATR if RSS is disabled */
9525                     (adapter->ring_feature[RING_F_RSS].limit <= 1) ||
9526                     /* A sample rate of 0 indicates ATR disabled */
9527                     (!adapter->atr_sample_rate))
9528                         ; /* do nothing not supported */
9529                 else /* otherwise supported and set the flag */
9530                         adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
9531         }
9532
9533         if (changed & NETIF_F_RXALL)
9534                 need_reset = true;
9535
9536         netdev->features = features;
9537
9538         if ((adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE)) {
9539                 if (features & NETIF_F_RXCSUM) {
9540                         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9541                 } else {
9542                         u32 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9543
9544                         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9545                 }
9546         }
9547
9548         if ((adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)) {
9549                 if (features & NETIF_F_RXCSUM) {
9550                         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9551                 } else {
9552                         u32 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9553
9554                         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9555                 }
9556         }
9557
9558         if (need_reset)
9559                 ixgbe_do_reset(netdev);
9560         else if (changed & (NETIF_F_HW_VLAN_CTAG_RX |
9561                             NETIF_F_HW_VLAN_CTAG_FILTER))
9562                 ixgbe_set_rx_mode(netdev);
9563
9564         return 0;
9565 }
9566
9567 /**
9568  * ixgbe_add_udp_tunnel_port - Get notifications about adding UDP tunnel ports
9569  * @dev: The port's netdev
9570  * @ti: Tunnel endpoint information
9571  **/
9572 static void ixgbe_add_udp_tunnel_port(struct net_device *dev,
9573                                       struct udp_tunnel_info *ti)
9574 {
9575         struct ixgbe_adapter *adapter = netdev_priv(dev);
9576         struct ixgbe_hw *hw = &adapter->hw;
9577         __be16 port = ti->port;
9578         u32 port_shift = 0;
9579         u32 reg;
9580
9581         if (ti->sa_family != AF_INET)
9582                 return;
9583
9584         switch (ti->type) {
9585         case UDP_TUNNEL_TYPE_VXLAN:
9586                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9587                         return;
9588
9589                 if (adapter->vxlan_port == port)
9590                         return;
9591
9592                 if (adapter->vxlan_port) {
9593                         netdev_info(dev,
9594                                     "VXLAN port %d set, not adding port %d\n",
9595                                     ntohs(adapter->vxlan_port),
9596                                     ntohs(port));
9597                         return;
9598                 }
9599
9600                 adapter->vxlan_port = port;
9601                 break;
9602         case UDP_TUNNEL_TYPE_GENEVE:
9603                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9604                         return;
9605
9606                 if (adapter->geneve_port == port)
9607                         return;
9608
9609                 if (adapter->geneve_port) {
9610                         netdev_info(dev,
9611                                     "GENEVE port %d set, not adding port %d\n",
9612                                     ntohs(adapter->geneve_port),
9613                                     ntohs(port));
9614                         return;
9615                 }
9616
9617                 port_shift = IXGBE_VXLANCTRL_GENEVE_UDPPORT_SHIFT;
9618                 adapter->geneve_port = port;
9619                 break;
9620         default:
9621                 return;
9622         }
9623
9624         reg = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) | ntohs(port) << port_shift;
9625         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, reg);
9626 }
9627
9628 /**
9629  * ixgbe_del_udp_tunnel_port - Get notifications about removing UDP tunnel ports
9630  * @dev: The port's netdev
9631  * @ti: Tunnel endpoint information
9632  **/
9633 static void ixgbe_del_udp_tunnel_port(struct net_device *dev,
9634                                       struct udp_tunnel_info *ti)
9635 {
9636         struct ixgbe_adapter *adapter = netdev_priv(dev);
9637         u32 port_mask;
9638
9639         if (ti->type != UDP_TUNNEL_TYPE_VXLAN &&
9640             ti->type != UDP_TUNNEL_TYPE_GENEVE)
9641                 return;
9642
9643         if (ti->sa_family != AF_INET)
9644                 return;
9645
9646         switch (ti->type) {
9647         case UDP_TUNNEL_TYPE_VXLAN:
9648                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9649                         return;
9650
9651                 if (adapter->vxlan_port != ti->port) {
9652                         netdev_info(dev, "VXLAN port %d not found\n",
9653                                     ntohs(ti->port));
9654                         return;
9655                 }
9656
9657                 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9658                 break;
9659         case UDP_TUNNEL_TYPE_GENEVE:
9660                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9661                         return;
9662
9663                 if (adapter->geneve_port != ti->port) {
9664                         netdev_info(dev, "GENEVE port %d not found\n",
9665                                     ntohs(ti->port));
9666                         return;
9667                 }
9668
9669                 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9670                 break;
9671         default:
9672                 return;
9673         }
9674
9675         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9676         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9677 }
9678
9679 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
9680                              struct net_device *dev,
9681                              const unsigned char *addr, u16 vid,
9682                              u16 flags)
9683 {
9684         /* guarantee we can provide a unique filter for the unicast address */
9685         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
9686                 struct ixgbe_adapter *adapter = netdev_priv(dev);
9687                 u16 pool = VMDQ_P(0);
9688
9689                 if (netdev_uc_count(dev) >= ixgbe_available_rars(adapter, pool))
9690                         return -ENOMEM;
9691         }
9692
9693         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
9694 }
9695
9696 /**
9697  * ixgbe_configure_bridge_mode - set various bridge modes
9698  * @adapter - the private structure
9699  * @mode - requested bridge mode
9700  *
9701  * Configure some settings require for various bridge modes.
9702  **/
9703 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
9704                                        __u16 mode)
9705 {
9706         struct ixgbe_hw *hw = &adapter->hw;
9707         unsigned int p, num_pools;
9708         u32 vmdctl;
9709
9710         switch (mode) {
9711         case BRIDGE_MODE_VEPA:
9712                 /* disable Tx loopback, rely on switch hairpin mode */
9713                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
9714
9715                 /* must enable Rx switching replication to allow multicast
9716                  * packet reception on all VFs, and to enable source address
9717                  * pruning.
9718                  */
9719                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9720                 vmdctl |= IXGBE_VT_CTL_REPLEN;
9721                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9722
9723                 /* enable Rx source address pruning. Note, this requires
9724                  * replication to be enabled or else it does nothing.
9725                  */
9726                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9727                 for (p = 0; p < num_pools; p++) {
9728                         if (hw->mac.ops.set_source_address_pruning)
9729                                 hw->mac.ops.set_source_address_pruning(hw,
9730                                                                        true,
9731                                                                        p);
9732                 }
9733                 break;
9734         case BRIDGE_MODE_VEB:
9735                 /* enable Tx loopback for internal VF/PF communication */
9736                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
9737                                 IXGBE_PFDTXGSWC_VT_LBEN);
9738
9739                 /* disable Rx switching replication unless we have SR-IOV
9740                  * virtual functions
9741                  */
9742                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9743                 if (!adapter->num_vfs)
9744                         vmdctl &= ~IXGBE_VT_CTL_REPLEN;
9745                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9746
9747                 /* disable Rx source address pruning, since we don't expect to
9748                  * be receiving external loopback of our transmitted frames.
9749                  */
9750                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9751                 for (p = 0; p < num_pools; p++) {
9752                         if (hw->mac.ops.set_source_address_pruning)
9753                                 hw->mac.ops.set_source_address_pruning(hw,
9754                                                                        false,
9755                                                                        p);
9756                 }
9757                 break;
9758         default:
9759                 return -EINVAL;
9760         }
9761
9762         adapter->bridge_mode = mode;
9763
9764         e_info(drv, "enabling bridge mode: %s\n",
9765                mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
9766
9767         return 0;
9768 }
9769
9770 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
9771                                     struct nlmsghdr *nlh, u16 flags)
9772 {
9773         struct ixgbe_adapter *adapter = netdev_priv(dev);
9774         struct nlattr *attr, *br_spec;
9775         int rem;
9776
9777         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9778                 return -EOPNOTSUPP;
9779
9780         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
9781         if (!br_spec)
9782                 return -EINVAL;
9783
9784         nla_for_each_nested(attr, br_spec, rem) {
9785                 int status;
9786                 __u16 mode;
9787
9788                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
9789                         continue;
9790
9791                 if (nla_len(attr) < sizeof(mode))
9792                         return -EINVAL;
9793
9794                 mode = nla_get_u16(attr);
9795                 status = ixgbe_configure_bridge_mode(adapter, mode);
9796                 if (status)
9797                         return status;
9798
9799                 break;
9800         }
9801
9802         return 0;
9803 }
9804
9805 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
9806                                     struct net_device *dev,
9807                                     u32 filter_mask, int nlflags)
9808 {
9809         struct ixgbe_adapter *adapter = netdev_priv(dev);
9810
9811         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9812                 return 0;
9813
9814         return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
9815                                        adapter->bridge_mode, 0, 0, nlflags,
9816                                        filter_mask, NULL);
9817 }
9818
9819 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
9820 {
9821         struct ixgbe_fwd_adapter *fwd_adapter = NULL;
9822         struct ixgbe_adapter *adapter = netdev_priv(pdev);
9823         int used_pools = adapter->num_vfs + adapter->num_rx_pools;
9824         unsigned int limit;
9825         int pool, err;
9826
9827         /* Hardware has a limited number of available pools. Each VF, and the
9828          * PF require a pool. Check to ensure we don't attempt to use more
9829          * then the available number of pools.
9830          */
9831         if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
9832                 return ERR_PTR(-EINVAL);
9833
9834 #ifdef CONFIG_RPS
9835         if (vdev->num_rx_queues != vdev->num_tx_queues) {
9836                 netdev_info(pdev, "%s: Only supports a single queue count for TX and RX\n",
9837                             vdev->name);
9838                 return ERR_PTR(-EINVAL);
9839         }
9840 #endif
9841         /* Check for hardware restriction on number of rx/tx queues */
9842         if (vdev->num_tx_queues > IXGBE_MAX_L2A_QUEUES ||
9843             vdev->num_tx_queues == IXGBE_BAD_L2A_QUEUE) {
9844                 netdev_info(pdev,
9845                             "%s: Supports RX/TX Queue counts 1,2, and 4\n",
9846                             pdev->name);
9847                 return ERR_PTR(-EINVAL);
9848         }
9849
9850         if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
9851               adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS - 1) ||
9852             (adapter->num_rx_pools > IXGBE_MAX_MACVLANS))
9853                 return ERR_PTR(-EBUSY);
9854
9855         fwd_adapter = kzalloc(sizeof(*fwd_adapter), GFP_KERNEL);
9856         if (!fwd_adapter)
9857                 return ERR_PTR(-ENOMEM);
9858
9859         pool = find_first_zero_bit(&adapter->fwd_bitmask, 32);
9860         adapter->num_rx_pools++;
9861         set_bit(pool, &adapter->fwd_bitmask);
9862         limit = find_last_bit(&adapter->fwd_bitmask, 32);
9863
9864         /* Enable VMDq flag so device will be set in VM mode */
9865         adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED | IXGBE_FLAG_SRIOV_ENABLED;
9866         adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
9867         adapter->ring_feature[RING_F_RSS].limit = vdev->num_tx_queues;
9868
9869         /* Force reinit of ring allocation with VMDQ enabled */
9870         err = ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
9871         if (err)
9872                 goto fwd_add_err;
9873         fwd_adapter->pool = pool;
9874         fwd_adapter->real_adapter = adapter;
9875
9876         if (netif_running(pdev)) {
9877                 err = ixgbe_fwd_ring_up(vdev, fwd_adapter);
9878                 if (err)
9879                         goto fwd_add_err;
9880                 netif_tx_start_all_queues(vdev);
9881         }
9882
9883         return fwd_adapter;
9884 fwd_add_err:
9885         /* unwind counter and free adapter struct */
9886         netdev_info(pdev,
9887                     "%s: dfwd hardware acceleration failed\n", vdev->name);
9888         clear_bit(pool, &adapter->fwd_bitmask);
9889         adapter->num_rx_pools--;
9890         kfree(fwd_adapter);
9891         return ERR_PTR(err);
9892 }
9893
9894 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
9895 {
9896         struct ixgbe_fwd_adapter *fwd_adapter = priv;
9897         struct ixgbe_adapter *adapter = fwd_adapter->real_adapter;
9898         unsigned int limit;
9899
9900         clear_bit(fwd_adapter->pool, &adapter->fwd_bitmask);
9901         adapter->num_rx_pools--;
9902
9903         limit = find_last_bit(&adapter->fwd_bitmask, 32);
9904         adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
9905         ixgbe_fwd_ring_down(fwd_adapter->netdev, fwd_adapter);
9906
9907         /* go back to full RSS if we're done with our VMQs */
9908         if (adapter->ring_feature[RING_F_VMDQ].limit == 1) {
9909                 int rss = min_t(int, ixgbe_max_rss_indices(adapter),
9910                                 num_online_cpus());
9911
9912                 adapter->flags &= ~IXGBE_FLAG_VMDQ_ENABLED;
9913                 adapter->flags &= ~IXGBE_FLAG_SRIOV_ENABLED;
9914                 adapter->ring_feature[RING_F_RSS].limit = rss;
9915         }
9916
9917         ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
9918         netdev_dbg(pdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
9919                    fwd_adapter->pool, adapter->num_rx_pools,
9920                    fwd_adapter->rx_base_queue,
9921                    fwd_adapter->rx_base_queue + adapter->num_rx_queues_per_pool,
9922                    adapter->fwd_bitmask);
9923         kfree(fwd_adapter);
9924 }
9925
9926 #define IXGBE_MAX_MAC_HDR_LEN           127
9927 #define IXGBE_MAX_NETWORK_HDR_LEN       511
9928
9929 static netdev_features_t
9930 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,
9931                      netdev_features_t features)
9932 {
9933         unsigned int network_hdr_len, mac_hdr_len;
9934
9935         /* Make certain the headers can be described by a context descriptor */
9936         mac_hdr_len = skb_network_header(skb) - skb->data;
9937         if (unlikely(mac_hdr_len > IXGBE_MAX_MAC_HDR_LEN))
9938                 return features & ~(NETIF_F_HW_CSUM |
9939                                     NETIF_F_SCTP_CRC |
9940                                     NETIF_F_HW_VLAN_CTAG_TX |
9941                                     NETIF_F_TSO |
9942                                     NETIF_F_TSO6);
9943
9944         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
9945         if (unlikely(network_hdr_len >  IXGBE_MAX_NETWORK_HDR_LEN))
9946                 return features & ~(NETIF_F_HW_CSUM |
9947                                     NETIF_F_SCTP_CRC |
9948                                     NETIF_F_TSO |
9949                                     NETIF_F_TSO6);
9950
9951         /* We can only support IPV4 TSO in tunnels if we can mangle the
9952          * inner IP ID field, so strip TSO if MANGLEID is not supported.
9953          */
9954         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
9955                 features &= ~NETIF_F_TSO;
9956
9957         return features;
9958 }
9959
9960 static int ixgbe_xdp_setup(struct net_device *dev, struct bpf_prog *prog)
9961 {
9962         int i, frame_size = dev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
9963         struct ixgbe_adapter *adapter = netdev_priv(dev);
9964         struct bpf_prog *old_prog;
9965
9966         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
9967                 return -EINVAL;
9968
9969         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
9970                 return -EINVAL;
9971
9972         /* verify ixgbe ring attributes are sufficient for XDP */
9973         for (i = 0; i < adapter->num_rx_queues; i++) {
9974                 struct ixgbe_ring *ring = adapter->rx_ring[i];
9975
9976                 if (ring_is_rsc_enabled(ring))
9977                         return -EINVAL;
9978
9979                 if (frame_size > ixgbe_rx_bufsz(ring))
9980                         return -EINVAL;
9981         }
9982
9983         if (nr_cpu_ids > MAX_XDP_QUEUES)
9984                 return -ENOMEM;
9985
9986         old_prog = xchg(&adapter->xdp_prog, prog);
9987
9988         /* If transitioning XDP modes reconfigure rings */
9989         if (!!prog != !!old_prog) {
9990                 int err = ixgbe_setup_tc(dev, netdev_get_num_tc(dev));
9991
9992                 if (err) {
9993                         rcu_assign_pointer(adapter->xdp_prog, old_prog);
9994                         return -EINVAL;
9995                 }
9996         } else {
9997                 for (i = 0; i < adapter->num_rx_queues; i++)
9998                         xchg(&adapter->rx_ring[i]->xdp_prog, adapter->xdp_prog);
9999         }
10000
10001         if (old_prog)
10002                 bpf_prog_put(old_prog);
10003
10004         return 0;
10005 }
10006
10007 static int ixgbe_xdp(struct net_device *dev, struct netdev_bpf *xdp)
10008 {
10009         struct ixgbe_adapter *adapter = netdev_priv(dev);
10010
10011         switch (xdp->command) {
10012         case XDP_SETUP_PROG:
10013                 return ixgbe_xdp_setup(dev, xdp->prog);
10014         case XDP_QUERY_PROG:
10015                 xdp->prog_attached = !!(adapter->xdp_prog);
10016                 xdp->prog_id = adapter->xdp_prog ?
10017                         adapter->xdp_prog->aux->id : 0;
10018                 return 0;
10019         default:
10020                 return -EINVAL;
10021         }
10022 }
10023
10024 static int ixgbe_xdp_xmit(struct net_device *dev, struct xdp_buff *xdp)
10025 {
10026         struct ixgbe_adapter *adapter = netdev_priv(dev);
10027         struct ixgbe_ring *ring;
10028         int err;
10029
10030         if (unlikely(test_bit(__IXGBE_DOWN, &adapter->state)))
10031                 return -ENETDOWN;
10032
10033         /* During program transitions its possible adapter->xdp_prog is assigned
10034          * but ring has not been configured yet. In this case simply abort xmit.
10035          */
10036         ring = adapter->xdp_prog ? adapter->xdp_ring[smp_processor_id()] : NULL;
10037         if (unlikely(!ring))
10038                 return -ENXIO;
10039
10040         err = ixgbe_xmit_xdp_ring(adapter, xdp);
10041         if (err != IXGBE_XDP_TX)
10042                 return -ENOSPC;
10043
10044         return 0;
10045 }
10046
10047 static void ixgbe_xdp_flush(struct net_device *dev)
10048 {
10049         struct ixgbe_adapter *adapter = netdev_priv(dev);
10050         struct ixgbe_ring *ring;
10051
10052         /* Its possible the device went down between xdp xmit and flush so
10053          * we need to ensure device is still up.
10054          */
10055         if (unlikely(test_bit(__IXGBE_DOWN, &adapter->state)))
10056                 return;
10057
10058         ring = adapter->xdp_prog ? adapter->xdp_ring[smp_processor_id()] : NULL;
10059         if (unlikely(!ring))
10060                 return;
10061
10062         /* Force memory writes to complete before letting h/w know there
10063          * are new descriptors to fetch.
10064          */
10065         wmb();
10066         writel(ring->next_to_use, ring->tail);
10067
10068         return;
10069 }
10070
10071 static const struct net_device_ops ixgbe_netdev_ops = {
10072         .ndo_open               = ixgbe_open,
10073         .ndo_stop               = ixgbe_close,
10074         .ndo_start_xmit         = ixgbe_xmit_frame,
10075         .ndo_select_queue       = ixgbe_select_queue,
10076         .ndo_set_rx_mode        = ixgbe_set_rx_mode,
10077         .ndo_validate_addr      = eth_validate_addr,
10078         .ndo_set_mac_address    = ixgbe_set_mac,
10079         .ndo_change_mtu         = ixgbe_change_mtu,
10080         .ndo_tx_timeout         = ixgbe_tx_timeout,
10081         .ndo_set_tx_maxrate     = ixgbe_tx_maxrate,
10082         .ndo_vlan_rx_add_vid    = ixgbe_vlan_rx_add_vid,
10083         .ndo_vlan_rx_kill_vid   = ixgbe_vlan_rx_kill_vid,
10084         .ndo_do_ioctl           = ixgbe_ioctl,
10085         .ndo_set_vf_mac         = ixgbe_ndo_set_vf_mac,
10086         .ndo_set_vf_vlan        = ixgbe_ndo_set_vf_vlan,
10087         .ndo_set_vf_rate        = ixgbe_ndo_set_vf_bw,
10088         .ndo_set_vf_spoofchk    = ixgbe_ndo_set_vf_spoofchk,
10089         .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
10090         .ndo_set_vf_trust       = ixgbe_ndo_set_vf_trust,
10091         .ndo_get_vf_config      = ixgbe_ndo_get_vf_config,
10092         .ndo_get_stats64        = ixgbe_get_stats64,
10093         .ndo_setup_tc           = __ixgbe_setup_tc,
10094 #ifdef CONFIG_NET_POLL_CONTROLLER
10095         .ndo_poll_controller    = ixgbe_netpoll,
10096 #endif
10097 #ifdef IXGBE_FCOE
10098         .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
10099         .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
10100         .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
10101         .ndo_fcoe_enable = ixgbe_fcoe_enable,
10102         .ndo_fcoe_disable = ixgbe_fcoe_disable,
10103         .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
10104         .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
10105 #endif /* IXGBE_FCOE */
10106         .ndo_set_features = ixgbe_set_features,
10107         .ndo_fix_features = ixgbe_fix_features,
10108         .ndo_fdb_add            = ixgbe_ndo_fdb_add,
10109         .ndo_bridge_setlink     = ixgbe_ndo_bridge_setlink,
10110         .ndo_bridge_getlink     = ixgbe_ndo_bridge_getlink,
10111         .ndo_dfwd_add_station   = ixgbe_fwd_add,
10112         .ndo_dfwd_del_station   = ixgbe_fwd_del,
10113         .ndo_udp_tunnel_add     = ixgbe_add_udp_tunnel_port,
10114         .ndo_udp_tunnel_del     = ixgbe_del_udp_tunnel_port,
10115         .ndo_features_check     = ixgbe_features_check,
10116         .ndo_bpf                = ixgbe_xdp,
10117         .ndo_xdp_xmit           = ixgbe_xdp_xmit,
10118         .ndo_xdp_flush          = ixgbe_xdp_flush,
10119 };
10120
10121 /**
10122  * ixgbe_enumerate_functions - Get the number of ports this device has
10123  * @adapter: adapter structure
10124  *
10125  * This function enumerates the phsyical functions co-located on a single slot,
10126  * in order to determine how many ports a device has. This is most useful in
10127  * determining the required GT/s of PCIe bandwidth necessary for optimal
10128  * performance.
10129  **/
10130 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
10131 {
10132         struct pci_dev *entry, *pdev = adapter->pdev;
10133         int physfns = 0;
10134
10135         /* Some cards can not use the generic count PCIe functions method,
10136          * because they are behind a parent switch, so we hardcode these with
10137          * the correct number of functions.
10138          */
10139         if (ixgbe_pcie_from_parent(&adapter->hw))
10140                 physfns = 4;
10141
10142         list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
10143                 /* don't count virtual functions */
10144                 if (entry->is_virtfn)
10145                         continue;
10146
10147                 /* When the devices on the bus don't all match our device ID,
10148                  * we can't reliably determine the correct number of
10149                  * functions. This can occur if a function has been direct
10150                  * attached to a virtual machine using VT-d, for example. In
10151                  * this case, simply return -1 to indicate this.
10152                  */
10153                 if ((entry->vendor != pdev->vendor) ||
10154                     (entry->device != pdev->device))
10155                         return -1;
10156
10157                 physfns++;
10158         }
10159
10160         return physfns;
10161 }
10162
10163 /**
10164  * ixgbe_wol_supported - Check whether device supports WoL
10165  * @adapter: the adapter private structure
10166  * @device_id: the device ID
10167  * @subdev_id: the subsystem device ID
10168  *
10169  * This function is used by probe and ethtool to determine
10170  * which devices have WoL support
10171  *
10172  **/
10173 bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
10174                          u16 subdevice_id)
10175 {
10176         struct ixgbe_hw *hw = &adapter->hw;
10177         u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
10178
10179         /* WOL not supported on 82598 */
10180         if (hw->mac.type == ixgbe_mac_82598EB)
10181                 return false;
10182
10183         /* check eeprom to see if WOL is enabled for X540 and newer */
10184         if (hw->mac.type >= ixgbe_mac_X540) {
10185                 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
10186                     ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
10187                      (hw->bus.func == 0)))
10188                         return true;
10189         }
10190
10191         /* WOL is determined based on device IDs for 82599 MACs */
10192         switch (device_id) {
10193         case IXGBE_DEV_ID_82599_SFP:
10194                 /* Only these subdevices could supports WOL */
10195                 switch (subdevice_id) {
10196                 case IXGBE_SUBDEV_ID_82599_560FLR:
10197                 case IXGBE_SUBDEV_ID_82599_LOM_SNAP6:
10198                 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
10199                 case IXGBE_SUBDEV_ID_82599_SFP_2OCP:
10200                         /* only support first port */
10201                         if (hw->bus.func != 0)
10202                                 break;
10203                         /* fall through */
10204                 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
10205                 case IXGBE_SUBDEV_ID_82599_SFP:
10206                 case IXGBE_SUBDEV_ID_82599_RNDC:
10207                 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
10208                 case IXGBE_SUBDEV_ID_82599_SFP_1OCP:
10209                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM1:
10210                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM2:
10211                         return true;
10212                 }
10213                 break;
10214         case IXGBE_DEV_ID_82599EN_SFP:
10215                 /* Only these subdevices support WOL */
10216                 switch (subdevice_id) {
10217                 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
10218                         return true;
10219                 }
10220                 break;
10221         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
10222                 /* All except this subdevice support WOL */
10223                 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
10224                         return true;
10225                 break;
10226         case IXGBE_DEV_ID_82599_KX4:
10227                 return  true;
10228         default:
10229                 break;
10230         }
10231
10232         return false;
10233 }
10234
10235 /**
10236  * ixgbe_probe - Device Initialization Routine
10237  * @pdev: PCI device information struct
10238  * @ent: entry in ixgbe_pci_tbl
10239  *
10240  * Returns 0 on success, negative on failure
10241  *
10242  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
10243  * The OS initialization, configuring of the adapter private structure,
10244  * and a hardware reset occur.
10245  **/
10246 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10247 {
10248         struct net_device *netdev;
10249         struct ixgbe_adapter *adapter = NULL;
10250         struct ixgbe_hw *hw;
10251         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
10252         int i, err, pci_using_dac, expected_gts;
10253         unsigned int indices = MAX_TX_QUEUES;
10254         u8 part_str[IXGBE_PBANUM_LENGTH];
10255         bool disable_dev = false;
10256 #ifdef IXGBE_FCOE
10257         u16 device_caps;
10258 #endif
10259         u32 eec;
10260
10261         /* Catch broken hardware that put the wrong VF device ID in
10262          * the PCIe SR-IOV capability.
10263          */
10264         if (pdev->is_virtfn) {
10265                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
10266                      pci_name(pdev), pdev->vendor, pdev->device);
10267                 return -EINVAL;
10268         }
10269
10270         err = pci_enable_device_mem(pdev);
10271         if (err)
10272                 return err;
10273
10274         if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
10275                 pci_using_dac = 1;
10276         } else {
10277                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10278                 if (err) {
10279                         dev_err(&pdev->dev,
10280                                 "No usable DMA configuration, aborting\n");
10281                         goto err_dma;
10282                 }
10283                 pci_using_dac = 0;
10284         }
10285
10286         err = pci_request_mem_regions(pdev, ixgbe_driver_name);
10287         if (err) {
10288                 dev_err(&pdev->dev,
10289                         "pci_request_selected_regions failed 0x%x\n", err);
10290                 goto err_pci_reg;
10291         }
10292
10293         pci_enable_pcie_error_reporting(pdev);
10294
10295         pci_set_master(pdev);
10296         pci_save_state(pdev);
10297
10298         if (ii->mac == ixgbe_mac_82598EB) {
10299 #ifdef CONFIG_IXGBE_DCB
10300                 /* 8 TC w/ 4 queues per TC */
10301                 indices = 4 * MAX_TRAFFIC_CLASS;
10302 #else
10303                 indices = IXGBE_MAX_RSS_INDICES;
10304 #endif
10305         }
10306
10307         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
10308         if (!netdev) {
10309                 err = -ENOMEM;
10310                 goto err_alloc_etherdev;
10311         }
10312
10313         SET_NETDEV_DEV(netdev, &pdev->dev);
10314
10315         adapter = netdev_priv(netdev);
10316
10317         adapter->netdev = netdev;
10318         adapter->pdev = pdev;
10319         hw = &adapter->hw;
10320         hw->back = adapter;
10321         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
10322
10323         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
10324                               pci_resource_len(pdev, 0));
10325         adapter->io_addr = hw->hw_addr;
10326         if (!hw->hw_addr) {
10327                 err = -EIO;
10328                 goto err_ioremap;
10329         }
10330
10331         netdev->netdev_ops = &ixgbe_netdev_ops;
10332         ixgbe_set_ethtool_ops(netdev);
10333         netdev->watchdog_timeo = 5 * HZ;
10334         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
10335
10336         /* Setup hw api */
10337         hw->mac.ops   = *ii->mac_ops;
10338         hw->mac.type  = ii->mac;
10339         hw->mvals     = ii->mvals;
10340         if (ii->link_ops)
10341                 hw->link.ops  = *ii->link_ops;
10342
10343         /* EEPROM */
10344         hw->eeprom.ops = *ii->eeprom_ops;
10345         eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
10346         if (ixgbe_removed(hw->hw_addr)) {
10347                 err = -EIO;
10348                 goto err_ioremap;
10349         }
10350         /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
10351         if (!(eec & BIT(8)))
10352                 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
10353
10354         /* PHY */
10355         hw->phy.ops = *ii->phy_ops;
10356         hw->phy.sfp_type = ixgbe_sfp_type_unknown;
10357         /* ixgbe_identify_phy_generic will set prtad and mmds properly */
10358         hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
10359         hw->phy.mdio.mmds = 0;
10360         hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
10361         hw->phy.mdio.dev = netdev;
10362         hw->phy.mdio.mdio_read = ixgbe_mdio_read;
10363         hw->phy.mdio.mdio_write = ixgbe_mdio_write;
10364
10365         /* setup the private structure */
10366         err = ixgbe_sw_init(adapter, ii);
10367         if (err)
10368                 goto err_sw_init;
10369
10370         /* Make sure the SWFW semaphore is in a valid state */
10371         if (hw->mac.ops.init_swfw_sync)
10372                 hw->mac.ops.init_swfw_sync(hw);
10373
10374         /* Make it possible the adapter to be woken up via WOL */
10375         switch (adapter->hw.mac.type) {
10376         case ixgbe_mac_82599EB:
10377         case ixgbe_mac_X540:
10378         case ixgbe_mac_X550:
10379         case ixgbe_mac_X550EM_x:
10380         case ixgbe_mac_x550em_a:
10381                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
10382                 break;
10383         default:
10384                 break;
10385         }
10386
10387         /*
10388          * If there is a fan on this device and it has failed log the
10389          * failure.
10390          */
10391         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
10392                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
10393                 if (esdp & IXGBE_ESDP_SDP1)
10394                         e_crit(probe, "Fan has stopped, replace the adapter\n");
10395         }
10396
10397         if (allow_unsupported_sfp)
10398                 hw->allow_unsupported_sfp = allow_unsupported_sfp;
10399
10400         /* reset_hw fills in the perm_addr as well */
10401         hw->phy.reset_if_overtemp = true;
10402         err = hw->mac.ops.reset_hw(hw);
10403         hw->phy.reset_if_overtemp = false;
10404         ixgbe_set_eee_capable(adapter);
10405         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
10406                 err = 0;
10407         } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
10408                 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
10409                 e_dev_err("Reload the driver after installing a supported module.\n");
10410                 goto err_sw_init;
10411         } else if (err) {
10412                 e_dev_err("HW Init failed: %d\n", err);
10413                 goto err_sw_init;
10414         }
10415
10416 #ifdef CONFIG_PCI_IOV
10417         /* SR-IOV not supported on the 82598 */
10418         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
10419                 goto skip_sriov;
10420         /* Mailbox */
10421         ixgbe_init_mbx_params_pf(hw);
10422         hw->mbx.ops = ii->mbx_ops;
10423         pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
10424         ixgbe_enable_sriov(adapter, max_vfs);
10425 skip_sriov:
10426
10427 #endif
10428         netdev->features = NETIF_F_SG |
10429                            NETIF_F_TSO |
10430                            NETIF_F_TSO6 |
10431                            NETIF_F_RXHASH |
10432                            NETIF_F_RXCSUM |
10433                            NETIF_F_HW_CSUM;
10434
10435 #define IXGBE_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
10436                                     NETIF_F_GSO_GRE_CSUM | \
10437                                     NETIF_F_GSO_IPXIP4 | \
10438                                     NETIF_F_GSO_IPXIP6 | \
10439                                     NETIF_F_GSO_UDP_TUNNEL | \
10440                                     NETIF_F_GSO_UDP_TUNNEL_CSUM)
10441
10442         netdev->gso_partial_features = IXGBE_GSO_PARTIAL_FEATURES;
10443         netdev->features |= NETIF_F_GSO_PARTIAL |
10444                             IXGBE_GSO_PARTIAL_FEATURES;
10445
10446         if (hw->mac.type >= ixgbe_mac_82599EB)
10447                 netdev->features |= NETIF_F_SCTP_CRC;
10448
10449         /* copy netdev features into list of user selectable features */
10450         netdev->hw_features |= netdev->features |
10451                                NETIF_F_HW_VLAN_CTAG_FILTER |
10452                                NETIF_F_HW_VLAN_CTAG_RX |
10453                                NETIF_F_HW_VLAN_CTAG_TX |
10454                                NETIF_F_RXALL |
10455                                NETIF_F_HW_L2FW_DOFFLOAD;
10456
10457         if (hw->mac.type >= ixgbe_mac_82599EB)
10458                 netdev->hw_features |= NETIF_F_NTUPLE |
10459                                        NETIF_F_HW_TC;
10460
10461         if (pci_using_dac)
10462                 netdev->features |= NETIF_F_HIGHDMA;
10463
10464         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
10465         netdev->hw_enc_features |= netdev->vlan_features;
10466         netdev->mpls_features |= NETIF_F_SG |
10467                                  NETIF_F_TSO |
10468                                  NETIF_F_TSO6 |
10469                                  NETIF_F_HW_CSUM;
10470         netdev->mpls_features |= IXGBE_GSO_PARTIAL_FEATURES;
10471
10472         /* set this bit last since it cannot be part of vlan_features */
10473         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
10474                             NETIF_F_HW_VLAN_CTAG_RX |
10475                             NETIF_F_HW_VLAN_CTAG_TX;
10476
10477         netdev->priv_flags |= IFF_UNICAST_FLT;
10478         netdev->priv_flags |= IFF_SUPP_NOFCS;
10479
10480         /* MTU range: 68 - 9710 */
10481         netdev->min_mtu = ETH_MIN_MTU;
10482         netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN);
10483
10484 #ifdef CONFIG_IXGBE_DCB
10485         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
10486                 netdev->dcbnl_ops = &ixgbe_dcbnl_ops;
10487 #endif
10488
10489 #ifdef IXGBE_FCOE
10490         if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
10491                 unsigned int fcoe_l;
10492
10493                 if (hw->mac.ops.get_device_caps) {
10494                         hw->mac.ops.get_device_caps(hw, &device_caps);
10495                         if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
10496                                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
10497                 }
10498
10499
10500                 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
10501                 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
10502
10503                 netdev->features |= NETIF_F_FSO |
10504                                     NETIF_F_FCOE_CRC;
10505
10506                 netdev->vlan_features |= NETIF_F_FSO |
10507                                          NETIF_F_FCOE_CRC |
10508                                          NETIF_F_FCOE_MTU;
10509         }
10510 #endif /* IXGBE_FCOE */
10511
10512         if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
10513                 netdev->hw_features |= NETIF_F_LRO;
10514         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
10515                 netdev->features |= NETIF_F_LRO;
10516
10517         /* make sure the EEPROM is good */
10518         if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
10519                 e_dev_err("The EEPROM Checksum Is Not Valid\n");
10520                 err = -EIO;
10521                 goto err_sw_init;
10522         }
10523
10524         eth_platform_get_mac_address(&adapter->pdev->dev,
10525                                      adapter->hw.mac.perm_addr);
10526
10527         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
10528
10529         if (!is_valid_ether_addr(netdev->dev_addr)) {
10530                 e_dev_err("invalid MAC address\n");
10531                 err = -EIO;
10532                 goto err_sw_init;
10533         }
10534
10535         /* Set hw->mac.addr to permanent MAC address */
10536         ether_addr_copy(hw->mac.addr, hw->mac.perm_addr);
10537         ixgbe_mac_set_default_filter(adapter);
10538
10539         timer_setup(&adapter->service_timer, ixgbe_service_timer, 0);
10540
10541         if (ixgbe_removed(hw->hw_addr)) {
10542                 err = -EIO;
10543                 goto err_sw_init;
10544         }
10545         INIT_WORK(&adapter->service_task, ixgbe_service_task);
10546         set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
10547         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
10548
10549         err = ixgbe_init_interrupt_scheme(adapter);
10550         if (err)
10551                 goto err_sw_init;
10552
10553         for (i = 0; i < adapter->num_rx_queues; i++)
10554                 u64_stats_init(&adapter->rx_ring[i]->syncp);
10555         for (i = 0; i < adapter->num_tx_queues; i++)
10556                 u64_stats_init(&adapter->tx_ring[i]->syncp);
10557         for (i = 0; i < adapter->num_xdp_queues; i++)
10558                 u64_stats_init(&adapter->xdp_ring[i]->syncp);
10559
10560         /* WOL not supported for all devices */
10561         adapter->wol = 0;
10562         hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
10563         hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
10564                                                 pdev->subsystem_device);
10565         if (hw->wol_enabled)
10566                 adapter->wol = IXGBE_WUFC_MAG;
10567
10568         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
10569
10570         /* save off EEPROM version number */
10571         hw->eeprom.ops.read(hw, 0x2e, &adapter->eeprom_verh);
10572         hw->eeprom.ops.read(hw, 0x2d, &adapter->eeprom_verl);
10573
10574         /* pick up the PCI bus settings for reporting later */
10575         if (ixgbe_pcie_from_parent(hw))
10576                 ixgbe_get_parent_bus_info(adapter);
10577         else
10578                  hw->mac.ops.get_bus_info(hw);
10579
10580         /* calculate the expected PCIe bandwidth required for optimal
10581          * performance. Note that some older parts will never have enough
10582          * bandwidth due to being older generation PCIe parts. We clamp these
10583          * parts to ensure no warning is displayed if it can't be fixed.
10584          */
10585         switch (hw->mac.type) {
10586         case ixgbe_mac_82598EB:
10587                 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
10588                 break;
10589         default:
10590                 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
10591                 break;
10592         }
10593
10594         /* don't check link if we failed to enumerate functions */
10595         if (expected_gts > 0)
10596                 ixgbe_check_minimum_link(adapter, expected_gts);
10597
10598         err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
10599         if (err)
10600                 strlcpy(part_str, "Unknown", sizeof(part_str));
10601         if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
10602                 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
10603                            hw->mac.type, hw->phy.type, hw->phy.sfp_type,
10604                            part_str);
10605         else
10606                 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
10607                            hw->mac.type, hw->phy.type, part_str);
10608
10609         e_dev_info("%pM\n", netdev->dev_addr);
10610
10611         /* reset the hardware with the new settings */
10612         err = hw->mac.ops.start_hw(hw);
10613         if (err == IXGBE_ERR_EEPROM_VERSION) {
10614                 /* We are running on a pre-production device, log a warning */
10615                 e_dev_warn("This device is a pre-production adapter/LOM. "
10616                            "Please be aware there may be issues associated "
10617                            "with your hardware.  If you are experiencing "
10618                            "problems please contact your Intel or hardware "
10619                            "representative who provided you with this "
10620                            "hardware.\n");
10621         }
10622         strcpy(netdev->name, "eth%d");
10623         pci_set_drvdata(pdev, adapter);
10624         err = register_netdev(netdev);
10625         if (err)
10626                 goto err_register;
10627
10628
10629         /* power down the optics for 82599 SFP+ fiber */
10630         if (hw->mac.ops.disable_tx_laser)
10631                 hw->mac.ops.disable_tx_laser(hw);
10632
10633         /* carrier off reporting is important to ethtool even BEFORE open */
10634         netif_carrier_off(netdev);
10635
10636 #ifdef CONFIG_IXGBE_DCA
10637         if (dca_add_requester(&pdev->dev) == 0) {
10638                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
10639                 ixgbe_setup_dca(adapter);
10640         }
10641 #endif
10642         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
10643                 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
10644                 for (i = 0; i < adapter->num_vfs; i++)
10645                         ixgbe_vf_configuration(pdev, (i | 0x10000000));
10646         }
10647
10648         /* firmware requires driver version to be 0xFFFFFFFF
10649          * since os does not support feature
10650          */
10651         if (hw->mac.ops.set_fw_drv_ver)
10652                 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF, 0xFF,
10653                                            sizeof(ixgbe_driver_version) - 1,
10654                                            ixgbe_driver_version);
10655
10656         /* add san mac addr to netdev */
10657         ixgbe_add_sanmac_netdev(netdev);
10658
10659         e_dev_info("%s\n", ixgbe_default_device_descr);
10660
10661 #ifdef CONFIG_IXGBE_HWMON
10662         if (ixgbe_sysfs_init(adapter))
10663                 e_err(probe, "failed to allocate sysfs resources\n");
10664 #endif /* CONFIG_IXGBE_HWMON */
10665
10666         ixgbe_dbg_adapter_init(adapter);
10667
10668         /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
10669         if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
10670                 hw->mac.ops.setup_link(hw,
10671                         IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
10672                         true);
10673
10674         return 0;
10675
10676 err_register:
10677         ixgbe_release_hw_control(adapter);
10678         ixgbe_clear_interrupt_scheme(adapter);
10679 err_sw_init:
10680         ixgbe_disable_sriov(adapter);
10681         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
10682         iounmap(adapter->io_addr);
10683         kfree(adapter->jump_tables[0]);
10684         kfree(adapter->mac_table);
10685         kfree(adapter->rss_key);
10686 err_ioremap:
10687         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
10688         free_netdev(netdev);
10689 err_alloc_etherdev:
10690         pci_release_mem_regions(pdev);
10691 err_pci_reg:
10692 err_dma:
10693         if (!adapter || disable_dev)
10694                 pci_disable_device(pdev);
10695         return err;
10696 }
10697
10698 /**
10699  * ixgbe_remove - Device Removal Routine
10700  * @pdev: PCI device information struct
10701  *
10702  * ixgbe_remove is called by the PCI subsystem to alert the driver
10703  * that it should release a PCI device.  The could be caused by a
10704  * Hot-Plug event, or because the driver is going to be removed from
10705  * memory.
10706  **/
10707 static void ixgbe_remove(struct pci_dev *pdev)
10708 {
10709         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10710         struct net_device *netdev;
10711         bool disable_dev;
10712         int i;
10713
10714         /* if !adapter then we already cleaned up in probe */
10715         if (!adapter)
10716                 return;
10717
10718         netdev  = adapter->netdev;
10719         ixgbe_dbg_adapter_exit(adapter);
10720
10721         set_bit(__IXGBE_REMOVING, &adapter->state);
10722         cancel_work_sync(&adapter->service_task);
10723
10724
10725 #ifdef CONFIG_IXGBE_DCA
10726         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
10727                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
10728                 dca_remove_requester(&pdev->dev);
10729                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
10730                                 IXGBE_DCA_CTRL_DCA_DISABLE);
10731         }
10732
10733 #endif
10734 #ifdef CONFIG_IXGBE_HWMON
10735         ixgbe_sysfs_exit(adapter);
10736 #endif /* CONFIG_IXGBE_HWMON */
10737
10738         /* remove the added san mac */
10739         ixgbe_del_sanmac_netdev(netdev);
10740
10741 #ifdef CONFIG_PCI_IOV
10742         ixgbe_disable_sriov(adapter);
10743 #endif
10744         if (netdev->reg_state == NETREG_REGISTERED)
10745                 unregister_netdev(netdev);
10746
10747         ixgbe_clear_interrupt_scheme(adapter);
10748
10749         ixgbe_release_hw_control(adapter);
10750
10751 #ifdef CONFIG_DCB
10752         kfree(adapter->ixgbe_ieee_pfc);
10753         kfree(adapter->ixgbe_ieee_ets);
10754
10755 #endif
10756         iounmap(adapter->io_addr);
10757         pci_release_mem_regions(pdev);
10758
10759         e_dev_info("complete\n");
10760
10761         for (i = 0; i < IXGBE_MAX_LINK_HANDLE; i++) {
10762                 if (adapter->jump_tables[i]) {
10763                         kfree(adapter->jump_tables[i]->input);
10764                         kfree(adapter->jump_tables[i]->mask);
10765                 }
10766                 kfree(adapter->jump_tables[i]);
10767         }
10768
10769         kfree(adapter->mac_table);
10770         kfree(adapter->rss_key);
10771         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
10772         free_netdev(netdev);
10773
10774         pci_disable_pcie_error_reporting(pdev);
10775
10776         if (disable_dev)
10777                 pci_disable_device(pdev);
10778 }
10779
10780 /**
10781  * ixgbe_io_error_detected - called when PCI error is detected
10782  * @pdev: Pointer to PCI device
10783  * @state: The current pci connection state
10784  *
10785  * This function is called after a PCI bus error affecting
10786  * this device has been detected.
10787  */
10788 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
10789                                                 pci_channel_state_t state)
10790 {
10791         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10792         struct net_device *netdev = adapter->netdev;
10793
10794 #ifdef CONFIG_PCI_IOV
10795         struct ixgbe_hw *hw = &adapter->hw;
10796         struct pci_dev *bdev, *vfdev;
10797         u32 dw0, dw1, dw2, dw3;
10798         int vf, pos;
10799         u16 req_id, pf_func;
10800
10801         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
10802             adapter->num_vfs == 0)
10803                 goto skip_bad_vf_detection;
10804
10805         bdev = pdev->bus->self;
10806         while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
10807                 bdev = bdev->bus->self;
10808
10809         if (!bdev)
10810                 goto skip_bad_vf_detection;
10811
10812         pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
10813         if (!pos)
10814                 goto skip_bad_vf_detection;
10815
10816         dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
10817         dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
10818         dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
10819         dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
10820         if (ixgbe_removed(hw->hw_addr))
10821                 goto skip_bad_vf_detection;
10822
10823         req_id = dw1 >> 16;
10824         /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
10825         if (!(req_id & 0x0080))
10826                 goto skip_bad_vf_detection;
10827
10828         pf_func = req_id & 0x01;
10829         if ((pf_func & 1) == (pdev->devfn & 1)) {
10830                 unsigned int device_id;
10831
10832                 vf = (req_id & 0x7F) >> 1;
10833                 e_dev_err("VF %d has caused a PCIe error\n", vf);
10834                 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
10835                                 "%8.8x\tdw3: %8.8x\n",
10836                 dw0, dw1, dw2, dw3);
10837                 switch (adapter->hw.mac.type) {
10838                 case ixgbe_mac_82599EB:
10839                         device_id = IXGBE_82599_VF_DEVICE_ID;
10840                         break;
10841                 case ixgbe_mac_X540:
10842                         device_id = IXGBE_X540_VF_DEVICE_ID;
10843                         break;
10844                 case ixgbe_mac_X550:
10845                         device_id = IXGBE_DEV_ID_X550_VF;
10846                         break;
10847                 case ixgbe_mac_X550EM_x:
10848                         device_id = IXGBE_DEV_ID_X550EM_X_VF;
10849                         break;
10850                 case ixgbe_mac_x550em_a:
10851                         device_id = IXGBE_DEV_ID_X550EM_A_VF;
10852                         break;
10853                 default:
10854                         device_id = 0;
10855                         break;
10856                 }
10857
10858                 /* Find the pci device of the offending VF */
10859                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
10860                 while (vfdev) {
10861                         if (vfdev->devfn == (req_id & 0xFF))
10862                                 break;
10863                         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
10864                                                device_id, vfdev);
10865                 }
10866                 /*
10867                  * There's a slim chance the VF could have been hot plugged,
10868                  * so if it is no longer present we don't need to issue the
10869                  * VFLR.  Just clean up the AER in that case.
10870                  */
10871                 if (vfdev) {
10872                         pcie_flr(vfdev);
10873                         /* Free device reference count */
10874                         pci_dev_put(vfdev);
10875                 }
10876
10877                 pci_cleanup_aer_uncorrect_error_status(pdev);
10878         }
10879
10880         /*
10881          * Even though the error may have occurred on the other port
10882          * we still need to increment the vf error reference count for
10883          * both ports because the I/O resume function will be called
10884          * for both of them.
10885          */
10886         adapter->vferr_refcount++;
10887
10888         return PCI_ERS_RESULT_RECOVERED;
10889
10890 skip_bad_vf_detection:
10891 #endif /* CONFIG_PCI_IOV */
10892         if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
10893                 return PCI_ERS_RESULT_DISCONNECT;
10894
10895         if (!netif_device_present(netdev))
10896                 return PCI_ERS_RESULT_DISCONNECT;
10897
10898         rtnl_lock();
10899         netif_device_detach(netdev);
10900
10901         if (state == pci_channel_io_perm_failure) {
10902                 rtnl_unlock();
10903                 return PCI_ERS_RESULT_DISCONNECT;
10904         }
10905
10906         if (netif_running(netdev))
10907                 ixgbe_close_suspend(adapter);
10908
10909         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
10910                 pci_disable_device(pdev);
10911         rtnl_unlock();
10912
10913         /* Request a slot reset. */
10914         return PCI_ERS_RESULT_NEED_RESET;
10915 }
10916
10917 /**
10918  * ixgbe_io_slot_reset - called after the pci bus has been reset.
10919  * @pdev: Pointer to PCI device
10920  *
10921  * Restart the card from scratch, as if from a cold-boot.
10922  */
10923 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
10924 {
10925         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10926         pci_ers_result_t result;
10927         int err;
10928
10929         if (pci_enable_device_mem(pdev)) {
10930                 e_err(probe, "Cannot re-enable PCI device after reset.\n");
10931                 result = PCI_ERS_RESULT_DISCONNECT;
10932         } else {
10933                 smp_mb__before_atomic();
10934                 clear_bit(__IXGBE_DISABLED, &adapter->state);
10935                 adapter->hw.hw_addr = adapter->io_addr;
10936                 pci_set_master(pdev);
10937                 pci_restore_state(pdev);
10938                 pci_save_state(pdev);
10939
10940                 pci_wake_from_d3(pdev, false);
10941
10942                 ixgbe_reset(adapter);
10943                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
10944                 result = PCI_ERS_RESULT_RECOVERED;
10945         }
10946
10947         err = pci_cleanup_aer_uncorrect_error_status(pdev);
10948         if (err) {
10949                 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
10950                           "failed 0x%0x\n", err);
10951                 /* non-fatal, continue */
10952         }
10953
10954         return result;
10955 }
10956
10957 /**
10958  * ixgbe_io_resume - called when traffic can start flowing again.
10959  * @pdev: Pointer to PCI device
10960  *
10961  * This callback is called when the error recovery driver tells us that
10962  * its OK to resume normal operation.
10963  */
10964 static void ixgbe_io_resume(struct pci_dev *pdev)
10965 {
10966         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10967         struct net_device *netdev = adapter->netdev;
10968
10969 #ifdef CONFIG_PCI_IOV
10970         if (adapter->vferr_refcount) {
10971                 e_info(drv, "Resuming after VF err\n");
10972                 adapter->vferr_refcount--;
10973                 return;
10974         }
10975
10976 #endif
10977         rtnl_lock();
10978         if (netif_running(netdev))
10979                 ixgbe_open(netdev);
10980
10981         netif_device_attach(netdev);
10982         rtnl_unlock();
10983 }
10984
10985 static const struct pci_error_handlers ixgbe_err_handler = {
10986         .error_detected = ixgbe_io_error_detected,
10987         .slot_reset = ixgbe_io_slot_reset,
10988         .resume = ixgbe_io_resume,
10989 };
10990
10991 static struct pci_driver ixgbe_driver = {
10992         .name     = ixgbe_driver_name,
10993         .id_table = ixgbe_pci_tbl,
10994         .probe    = ixgbe_probe,
10995         .remove   = ixgbe_remove,
10996 #ifdef CONFIG_PM
10997         .suspend  = ixgbe_suspend,
10998         .resume   = ixgbe_resume,
10999 #endif
11000         .shutdown = ixgbe_shutdown,
11001         .sriov_configure = ixgbe_pci_sriov_configure,
11002         .err_handler = &ixgbe_err_handler
11003 };
11004
11005 /**
11006  * ixgbe_init_module - Driver Registration Routine
11007  *
11008  * ixgbe_init_module is the first routine called when the driver is
11009  * loaded. All it does is register with the PCI subsystem.
11010  **/
11011 static int __init ixgbe_init_module(void)
11012 {
11013         int ret;
11014         pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
11015         pr_info("%s\n", ixgbe_copyright);
11016
11017         ixgbe_wq = create_singlethread_workqueue(ixgbe_driver_name);
11018         if (!ixgbe_wq) {
11019                 pr_err("%s: Failed to create workqueue\n", ixgbe_driver_name);
11020                 return -ENOMEM;
11021         }
11022
11023         ixgbe_dbg_init();
11024
11025         ret = pci_register_driver(&ixgbe_driver);
11026         if (ret) {
11027                 destroy_workqueue(ixgbe_wq);
11028                 ixgbe_dbg_exit();
11029                 return ret;
11030         }
11031
11032 #ifdef CONFIG_IXGBE_DCA
11033         dca_register_notify(&dca_notifier);
11034 #endif
11035
11036         return 0;
11037 }
11038
11039 module_init(ixgbe_init_module);
11040
11041 /**
11042  * ixgbe_exit_module - Driver Exit Cleanup Routine
11043  *
11044  * ixgbe_exit_module is called just before the driver is removed
11045  * from memory.
11046  **/
11047 static void __exit ixgbe_exit_module(void)
11048 {
11049 #ifdef CONFIG_IXGBE_DCA
11050         dca_unregister_notify(&dca_notifier);
11051 #endif
11052         pci_unregister_driver(&ixgbe_driver);
11053
11054         ixgbe_dbg_exit();
11055         if (ixgbe_wq) {
11056                 destroy_workqueue(ixgbe_wq);
11057                 ixgbe_wq = NULL;
11058         }
11059 }
11060
11061 #ifdef CONFIG_IXGBE_DCA
11062 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
11063                             void *p)
11064 {
11065         int ret_val;
11066
11067         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
11068                                          __ixgbe_notify_dca);
11069
11070         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
11071 }
11072
11073 #endif /* CONFIG_IXGBE_DCA */
11074
11075 module_exit(ixgbe_exit_module);
11076
11077 /* ixgbe_main.c */