drivers/net/ethernet/intel/ixgbe/ixgbe_main.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
   3
   4 #include <linux/types.h>
   5 #include <linux/module.h>
   6 #include <linux/pci.h>
   7 #include <linux/netdevice.h>
   8 #include <linux/vmalloc.h>
   9 #include <linux/string.h>
  10 #include <linux/in.h>
  11 #include <linux/interrupt.h>
  12 #include <linux/ip.h>
  13 #include <linux/tcp.h>
  14 #include <linux/sctp.h>
  15 #include <linux/pkt_sched.h>
  16 #include <linux/ipv6.h>
  17 #include <linux/slab.h>
  18 #include <net/checksum.h>
  19 #include <net/ip6_checksum.h>
  20 #include <linux/etherdevice.h>
  21 #include <linux/ethtool.h>
  22 #include <linux/if.h>
  23 #include <linux/if_vlan.h>
  24 #include <linux/if_macvlan.h>
  25 #include <linux/if_bridge.h>
  26 #include <linux/prefetch.h>
  27 #include <linux/bpf.h>
  28 #include <linux/bpf_trace.h>
  29 #include <linux/atomic.h>
  30 #include <scsi/fc/fc_fcoe.h>
  31 #include <net/udp_tunnel.h>
  32 #include <net/pkt_cls.h>
  33 #include <net/tc_act/tc_gact.h>
  34 #include <net/tc_act/tc_mirred.h>
  35 #include <net/vxlan.h>
  36 #include <net/mpls.h>
  37 #include <net/xdp_sock.h>
  38
  39 #include "ixgbe.h"
  40 #include "ixgbe_common.h"
  41 #include "ixgbe_dcb_82599.h"
  42 #include "ixgbe_sriov.h"
  43 #include "ixgbe_model.h"
  44 #include "ixgbe_txrx_common.h"
  45
  46 char ixgbe_driver_name[] = "ixgbe";
  47 static const char ixgbe_driver_string[] =
  48                               "Intel(R) 10 Gigabit PCI Express Network Driver";
  49 #ifdef IXGBE_FCOE
  50 char ixgbe_default_device_descr[] =
  51                               "Intel(R) 10 Gigabit Network Connection";
  52 #else
  53 static char ixgbe_default_device_descr[] =
  54                               "Intel(R) 10 Gigabit Network Connection";
  55 #endif
  56 #define DRV_VERSION "5.1.0-k"
  57 const char ixgbe_driver_version[] = DRV_VERSION;
  58 static const char ixgbe_copyright[] =
  59                                 "Copyright (c) 1999-2016 Intel Corporation.";
  60
  61 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
  62
  63 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  64         [board_82598]           = &ixgbe_82598_info,
  65         [board_82599]           = &ixgbe_82599_info,
  66         [board_X540]            = &ixgbe_X540_info,
  67         [board_X550]            = &ixgbe_X550_info,
  68         [board_X550EM_x]        = &ixgbe_X550EM_x_info,
  69         [board_x550em_x_fw]     = &ixgbe_x550em_x_fw_info,
  70         [board_x550em_a]        = &ixgbe_x550em_a_info,
  71         [board_x550em_a_fw]     = &ixgbe_x550em_a_fw_info,
  72 };
  73
  74 /* ixgbe_pci_tbl - PCI Device ID Table
  75  *
  76  * Wildcard entries (PCI_ANY_ID) should come last
  77  * Last entry must be all 0s
  78  *
  79  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  80  *   Class, Class Mask, private data (not used) }
  81  */
  82 static const struct pci_device_id ixgbe_pci_tbl[] = {
  83         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
  84         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
  85         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
  86         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
  87         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
  88         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
  89         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
  90         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
  91         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
  92         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
  93         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
  94         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
  95         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
  96         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
  97         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
  98         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
  99         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
 100         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
 101         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
 102         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
 103         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
 104         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
 105         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
 106         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
 107         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
 108         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
 109         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
 110         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
 111         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
 112         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
 113         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
 114         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T1), board_X550},
 115         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
 116         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_XFI), board_X550EM_x},
 117         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
 118         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
 119         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), board_X550EM_x},
 120         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_1G_T), board_x550em_x_fw},
 121         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR), board_x550em_a },
 122         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR_L), board_x550em_a },
 123         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP_N), board_x550em_a },
 124         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII), board_x550em_a },
 125         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII_L), board_x550em_a },
 126         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_10G_T), board_x550em_a},
 127         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP), board_x550em_a },
 128         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T), board_x550em_a_fw },
 129         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T_L), board_x550em_a_fw },
 130         /* required last entry */
 131         {0, }
 132 };
 133 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
 134
 135 #ifdef CONFIG_IXGBE_DCA
 136 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
 137                             void *p);
 138 static struct notifier_block dca_notifier = {
 139         .notifier_call = ixgbe_notify_dca,
 140         .next          = NULL,
 141         .priority      = 0
 142 };
 143 #endif
 144
 145 #ifdef CONFIG_PCI_IOV
 146 static unsigned int max_vfs;
 147 module_param(max_vfs, uint, 0);
 148 MODULE_PARM_DESC(max_vfs,
 149                  "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
 150 #endif /* CONFIG_PCI_IOV */
 151
 152 static unsigned int allow_unsupported_sfp;
 153 module_param(allow_unsupported_sfp, uint, 0);
 154 MODULE_PARM_DESC(allow_unsupported_sfp,
 155                  "Allow unsupported and untested SFP+ modules on 82599-based adapters");
 156
 157 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 158 static int debug = -1;
 159 module_param(debug, int, 0);
 160 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 161
 162 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
 163 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
 164 MODULE_LICENSE("GPL v2");
 165 MODULE_VERSION(DRV_VERSION);
 166
 167 static struct workqueue_struct *ixgbe_wq;
 168
 169 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
 170 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *);
 171
 172 static const struct net_device_ops ixgbe_netdev_ops;
 173
 174 static bool netif_is_ixgbe(struct net_device *dev)
 175 {
 176         return dev && (dev->netdev_ops == &ixgbe_netdev_ops);
 177 }
 178
 179 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
 180                                           u32 reg, u16 *value)
 181 {
 182         struct pci_dev *parent_dev;
 183         struct pci_bus *parent_bus;
 184
 185         parent_bus = adapter->pdev->bus->parent;
 186         if (!parent_bus)
 187                 return -1;
 188
 189         parent_dev = parent_bus->self;
 190         if (!parent_dev)
 191                 return -1;
 192
 193         if (!pci_is_pcie(parent_dev))
 194                 return -1;
 195
 196         pcie_capability_read_word(parent_dev, reg, value);
 197         if (*value == IXGBE_FAILED_READ_CFG_WORD &&
 198             ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
 199                 return -1;
 200         return 0;
 201 }
 202
 203 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
 204 {
 205         struct ixgbe_hw *hw = &adapter->hw;
 206         u16 link_status = 0;
 207         int err;
 208
 209         hw->bus.type = ixgbe_bus_type_pci_express;
 210
 211         /* Get the negotiated link width and speed from PCI config space of the
 212          * parent, as this device is behind a switch
 213          */
 214         err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
 215
 216         /* assume caller will handle error case */
 217         if (err)
 218                 return err;
 219
 220         hw->bus.width = ixgbe_convert_bus_width(link_status);
 221         hw->bus.speed = ixgbe_convert_bus_speed(link_status);
 222
 223         return 0;
 224 }
 225
 226 /**
 227  * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
 228  * @hw: hw specific details
 229  *
 230  * This function is used by probe to determine whether a device's PCI-Express
 231  * bandwidth details should be gathered from the parent bus instead of from the
 232  * device. Used to ensure that various locations all have the correct device ID
 233  * checks.
 234  */
 235 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
 236 {
 237         switch (hw->device_id) {
 238         case IXGBE_DEV_ID_82599_SFP_SF_QP:
 239         case IXGBE_DEV_ID_82599_QSFP_SF_QP:
 240                 return true;
 241         default:
 242                 return false;
 243         }
 244 }
 245
 246 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
 247                                      int expected_gts)
 248 {
 249         struct ixgbe_hw *hw = &adapter->hw;
 250         struct pci_dev *pdev;
 251
 252         /* Some devices are not connected over PCIe and thus do not negotiate
 253          * speed. These devices do not have valid bus info, and thus any report
 254          * we generate may not be correct.
 255          */
 256         if (hw->bus.type == ixgbe_bus_type_internal)
 257                 return;
 258
 259         /* determine whether to use the parent device */
 260         if (ixgbe_pcie_from_parent(&adapter->hw))
 261                 pdev = adapter->pdev->bus->parent->self;
 262         else
 263                 pdev = adapter->pdev;
 264
 265         pcie_print_link_status(pdev);
 266 }
 267
 268 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
 269 {
 270         if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
 271             !test_bit(__IXGBE_REMOVING, &adapter->state) &&
 272             !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
 273                 queue_work(ixgbe_wq, &adapter->service_task);
 274 }
 275
 276 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
 277 {
 278         struct ixgbe_adapter *adapter = hw->back;
 279
 280         if (!hw->hw_addr)
 281                 return;
 282         hw->hw_addr = NULL;
 283         e_dev_err("Adapter removed\n");
 284         if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
 285                 ixgbe_service_event_schedule(adapter);
 286 }
 287
 288 static u32 ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
 289 {
 290         u8 __iomem *reg_addr;
 291         u32 value;
 292         int i;
 293
 294         reg_addr = READ_ONCE(hw->hw_addr);
 295         if (ixgbe_removed(reg_addr))
 296                 return IXGBE_FAILED_READ_REG;
 297
 298         /* Register read of 0xFFFFFFF can indicate the adapter has been removed,
 299          * so perform several status register reads to determine if the adapter
 300          * has been removed.
 301          */
 302         for (i = 0; i < IXGBE_FAILED_READ_RETRIES; i++) {
 303                 value = readl(reg_addr + IXGBE_STATUS);
 304                 if (value != IXGBE_FAILED_READ_REG)
 305                         break;
 306                 mdelay(3);
 307         }
 308
 309         if (value == IXGBE_FAILED_READ_REG)
 310                 ixgbe_remove_adapter(hw);
 311         else
 312                 value = readl(reg_addr + reg);
 313         return value;
 314 }
 315
 316 /**
 317  * ixgbe_read_reg - Read from device register
 318  * @hw: hw specific details
 319  * @reg: offset of register to read
 320  *
 321  * Returns : value read or IXGBE_FAILED_READ_REG if removed
 322  *
 323  * This function is used to read device registers. It checks for device
 324  * removal by confirming any read that returns all ones by checking the
 325  * status register value for all ones. This function avoids reading from
 326  * the hardware if a removal was previously detected in which case it
 327  * returns IXGBE_FAILED_READ_REG (all ones).
 328  */
 329 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
 330 {
 331         u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr);
 332         u32 value;
 333
 334         if (ixgbe_removed(reg_addr))
 335                 return IXGBE_FAILED_READ_REG;
 336         if (unlikely(hw->phy.nw_mng_if_sel &
 337                      IXGBE_NW_MNG_IF_SEL_SGMII_ENABLE)) {
 338                 struct ixgbe_adapter *adapter;
 339                 int i;
 340
 341                 for (i = 0; i < 200; ++i) {
 342                         value = readl(reg_addr + IXGBE_MAC_SGMII_BUSY);
 343                         if (likely(!value))
 344                                 goto writes_completed;
 345                         if (value == IXGBE_FAILED_READ_REG) {
 346                                 ixgbe_remove_adapter(hw);
 347                                 return IXGBE_FAILED_READ_REG;
 348                         }
 349                         udelay(5);
 350                 }
 351
 352                 adapter = hw->back;
 353                 e_warn(hw, "register writes incomplete %08x\n", value);
 354         }
 355
 356 writes_completed:
 357         value = readl(reg_addr + reg);
 358         if (unlikely(value == IXGBE_FAILED_READ_REG))
 359                 value = ixgbe_check_remove(hw, reg);
 360         return value;
 361 }
 362
 363 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
 364 {
 365         u16 value;
 366
 367         pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
 368         if (value == IXGBE_FAILED_READ_CFG_WORD) {
 369                 ixgbe_remove_adapter(hw);
 370                 return true;
 371         }
 372         return false;
 373 }
 374
 375 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
 376 {
 377         struct ixgbe_adapter *adapter = hw->back;
 378         u16 value;
 379
 380         if (ixgbe_removed(hw->hw_addr))
 381                 return IXGBE_FAILED_READ_CFG_WORD;
 382         pci_read_config_word(adapter->pdev, reg, &value);
 383         if (value == IXGBE_FAILED_READ_CFG_WORD &&
 384             ixgbe_check_cfg_remove(hw, adapter->pdev))
 385                 return IXGBE_FAILED_READ_CFG_WORD;
 386         return value;
 387 }
 388
 389 #ifdef CONFIG_PCI_IOV
 390 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
 391 {
 392         struct ixgbe_adapter *adapter = hw->back;
 393         u32 value;
 394
 395         if (ixgbe_removed(hw->hw_addr))
 396                 return IXGBE_FAILED_READ_CFG_DWORD;
 397         pci_read_config_dword(adapter->pdev, reg, &value);
 398         if (value == IXGBE_FAILED_READ_CFG_DWORD &&
 399             ixgbe_check_cfg_remove(hw, adapter->pdev))
 400                 return IXGBE_FAILED_READ_CFG_DWORD;
 401         return value;
 402 }
 403 #endif /* CONFIG_PCI_IOV */
 404
 405 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
 406 {
 407         struct ixgbe_adapter *adapter = hw->back;
 408
 409         if (ixgbe_removed(hw->hw_addr))
 410                 return;
 411         pci_write_config_word(adapter->pdev, reg, value);
 412 }
 413
 414 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
 415 {
 416         BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
 417
 418         /* flush memory to make sure state is correct before next watchdog */
 419         smp_mb__before_atomic();
 420         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
 421 }
 422
 423 struct ixgbe_reg_info {
 424         u32 ofs;
 425         char *name;
 426 };
 427
 428 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
 429
 430         /* General Registers */
 431         {IXGBE_CTRL, "CTRL"},
 432         {IXGBE_STATUS, "STATUS"},
 433         {IXGBE_CTRL_EXT, "CTRL_EXT"},
 434
 435         /* Interrupt Registers */
 436         {IXGBE_EICR, "EICR"},
 437
 438         /* RX Registers */
 439         {IXGBE_SRRCTL(0), "SRRCTL"},
 440         {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
 441         {IXGBE_RDLEN(0), "RDLEN"},
 442         {IXGBE_RDH(0), "RDH"},
 443         {IXGBE_RDT(0), "RDT"},
 444         {IXGBE_RXDCTL(0), "RXDCTL"},
 445         {IXGBE_RDBAL(0), "RDBAL"},
 446         {IXGBE_RDBAH(0), "RDBAH"},
 447
 448         /* TX Registers */
 449         {IXGBE_TDBAL(0), "TDBAL"},
 450         {IXGBE_TDBAH(0), "TDBAH"},
 451         {IXGBE_TDLEN(0), "TDLEN"},
 452         {IXGBE_TDH(0), "TDH"},
 453         {IXGBE_TDT(0), "TDT"},
 454         {IXGBE_TXDCTL(0), "TXDCTL"},
 455
 456         /* List Terminator */
 457         { .name = NULL }
 458 };
 459
 460
 461 /*
 462  * ixgbe_regdump - register printout routine
 463  */
 464 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
 465 {
 466         int i;
 467         char rname[16];
 468         u32 regs[64];
 469
 470         switch (reginfo->ofs) {
 471         case IXGBE_SRRCTL(0):
 472                 for (i = 0; i < 64; i++)
 473                         regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 474                 break;
 475         case IXGBE_DCA_RXCTRL(0):
 476                 for (i = 0; i < 64; i++)
 477                         regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 478                 break;
 479         case IXGBE_RDLEN(0):
 480                 for (i = 0; i < 64; i++)
 481                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 482                 break;
 483         case IXGBE_RDH(0):
 484                 for (i = 0; i < 64; i++)
 485                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 486                 break;
 487         case IXGBE_RDT(0):
 488                 for (i = 0; i < 64; i++)
 489                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 490                 break;
 491         case IXGBE_RXDCTL(0):
 492                 for (i = 0; i < 64; i++)
 493                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 494                 break;
 495         case IXGBE_RDBAL(0):
 496                 for (i = 0; i < 64; i++)
 497                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 498                 break;
 499         case IXGBE_RDBAH(0):
 500                 for (i = 0; i < 64; i++)
 501                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 502                 break;
 503         case IXGBE_TDBAL(0):
 504                 for (i = 0; i < 64; i++)
 505                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 506                 break;
 507         case IXGBE_TDBAH(0):
 508                 for (i = 0; i < 64; i++)
 509                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 510                 break;
 511         case IXGBE_TDLEN(0):
 512                 for (i = 0; i < 64; i++)
 513                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 514                 break;
 515         case IXGBE_TDH(0):
 516                 for (i = 0; i < 64; i++)
 517                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 518                 break;
 519         case IXGBE_TDT(0):
 520                 for (i = 0; i < 64; i++)
 521                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 522                 break;
 523         case IXGBE_TXDCTL(0):
 524                 for (i = 0; i < 64; i++)
 525                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 526                 break;
 527         default:
 528                 pr_info("%-15s %08x\n",
 529                         reginfo->name, IXGBE_READ_REG(hw, reginfo->ofs));
 530                 return;
 531         }
 532
 533         i = 0;
 534         while (i < 64) {
 535                 int j;
 536                 char buf[9 * 8 + 1];
 537                 char *p = buf;
 538
 539                 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i, i + 7);
 540                 for (j = 0; j < 8; j++)
 541                         p += sprintf(p, " %08x", regs[i++]);
 542                 pr_err("%-15s%s\n", rname, buf);
 543         }
 544
 545 }
 546
 547 static void ixgbe_print_buffer(struct ixgbe_ring *ring, int n)
 548 {
 549         struct ixgbe_tx_buffer *tx_buffer;
 550
 551         tx_buffer = &ring->tx_buffer_info[ring->next_to_clean];
 552         pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
 553                 n, ring->next_to_use, ring->next_to_clean,
 554                 (u64)dma_unmap_addr(tx_buffer, dma),
 555                 dma_unmap_len(tx_buffer, len),
 556                 tx_buffer->next_to_watch,
 557                 (u64)tx_buffer->time_stamp);
 558 }
 559
 560 /*
 561  * ixgbe_dump - Print registers, tx-rings and rx-rings
 562  */
 563 static void ixgbe_dump(struct ixgbe_adapter *adapter)
 564 {
 565         struct net_device *netdev = adapter->netdev;
 566         struct ixgbe_hw *hw = &adapter->hw;
 567         struct ixgbe_reg_info *reginfo;
 568         int n = 0;
 569         struct ixgbe_ring *ring;
 570         struct ixgbe_tx_buffer *tx_buffer;
 571         union ixgbe_adv_tx_desc *tx_desc;
 572         struct my_u0 { u64 a; u64 b; } *u0;
 573         struct ixgbe_ring *rx_ring;
 574         union ixgbe_adv_rx_desc *rx_desc;
 575         struct ixgbe_rx_buffer *rx_buffer_info;
 576         int i = 0;
 577
 578         if (!netif_msg_hw(adapter))
 579                 return;
 580
 581         /* Print netdevice Info */
 582         if (netdev) {
 583                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 584                 pr_info("Device Name     state            "
 585                         "trans_start\n");
 586                 pr_info("%-15s %016lX %016lX\n",
 587                         netdev->name,
 588                         netdev->state,
 589                         dev_trans_start(netdev));
 590         }
 591
 592         /* Print Registers */
 593         dev_info(&adapter->pdev->dev, "Register Dump\n");
 594         pr_info(" Register Name   Value\n");
 595         for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
 596              reginfo->name; reginfo++) {
 597                 ixgbe_regdump(hw, reginfo);
 598         }
 599
 600         /* Print TX Ring Summary */
 601         if (!netdev || !netif_running(netdev))
 602                 return;
 603
 604         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 605         pr_info(" %s     %s              %s        %s\n",
 606                 "Queue [NTU] [NTC] [bi(ntc)->dma  ]",
 607                 "leng", "ntw", "timestamp");
 608         for (n = 0; n < adapter->num_tx_queues; n++) {
 609                 ring = adapter->tx_ring[n];
 610                 ixgbe_print_buffer(ring, n);
 611         }
 612
 613         for (n = 0; n < adapter->num_xdp_queues; n++) {
 614                 ring = adapter->xdp_ring[n];
 615                 ixgbe_print_buffer(ring, n);
 616         }
 617
 618         /* Print TX Rings */
 619         if (!netif_msg_tx_done(adapter))
 620                 goto rx_ring_summary;
 621
 622         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 623
 624         /* Transmit Descriptor Formats
 625          *
 626          * 82598 Advanced Transmit Descriptor
 627          *   +--------------------------------------------------------------+
 628          * 0 |         Buffer Address [63:0]                                |
 629          *   +--------------------------------------------------------------+
 630          * 8 |  PAYLEN  | POPTS  | IDX | STA | DCMD  |DTYP |  RSV |  DTALEN |
 631          *   +--------------------------------------------------------------+
 632          *   63       46 45    40 39 36 35 32 31   24 23 20 19              0
 633          *
 634          * 82598 Advanced Transmit Descriptor (Write-Back Format)
 635          *   +--------------------------------------------------------------+
 636          * 0 |                          RSV [63:0]                          |
 637          *   +--------------------------------------------------------------+
 638          * 8 |            RSV           |  STA  |          NXTSEQ           |
 639          *   +--------------------------------------------------------------+
 640          *   63                       36 35   32 31                         0
 641          *
 642          * 82599+ Advanced Transmit Descriptor
 643          *   +--------------------------------------------------------------+
 644          * 0 |         Buffer Address [63:0]                                |
 645          *   +--------------------------------------------------------------+
 646          * 8 |PAYLEN  |POPTS|CC|IDX  |STA  |DCMD  |DTYP |MAC  |RSV  |DTALEN |
 647          *   +--------------------------------------------------------------+
 648          *   63     46 45 40 39 38 36 35 32 31  24 23 20 19 18 17 16 15     0
 649          *
 650          * 82599+ Advanced Transmit Descriptor (Write-Back Format)
 651          *   +--------------------------------------------------------------+
 652          * 0 |                          RSV [63:0]                          |
 653          *   +--------------------------------------------------------------+
 654          * 8 |            RSV           |  STA  |           RSV             |
 655          *   +--------------------------------------------------------------+
 656          *   63                       36 35   32 31                         0
 657          */
 658
 659         for (n = 0; n < adapter->num_tx_queues; n++) {
 660                 ring = adapter->tx_ring[n];
 661                 pr_info("------------------------------------\n");
 662                 pr_info("TX QUEUE INDEX = %d\n", ring->queue_index);
 663                 pr_info("------------------------------------\n");
 664                 pr_info("%s%s    %s              %s        %s          %s\n",
 665                         "T [desc]     [address 63:0  ] ",
 666                         "[PlPOIdStDDt Ln] [bi->dma       ] ",
 667                         "leng", "ntw", "timestamp", "bi->skb");
 668
 669                 for (i = 0; ring->desc && (i < ring->count); i++) {
 670                         tx_desc = IXGBE_TX_DESC(ring, i);
 671                         tx_buffer = &ring->tx_buffer_info[i];
 672                         u0 = (struct my_u0 *)tx_desc;
 673                         if (dma_unmap_len(tx_buffer, len) > 0) {
 674                                 const char *ring_desc;
 675
 676                                 if (i == ring->next_to_use &&
 677                                     i == ring->next_to_clean)
 678                                         ring_desc = " NTC/U";
 679                                 else if (i == ring->next_to_use)
 680                                         ring_desc = " NTU";
 681                                 else if (i == ring->next_to_clean)
 682                                         ring_desc = " NTC";
 683                                 else
 684                                         ring_desc = "";
 685                                 pr_info("T [0x%03X]    %016llX %016llX %016llX %08X %p %016llX %p%s",
 686                                         i,
 687                                         le64_to_cpu((__force __le64)u0->a),
 688                                         le64_to_cpu((__force __le64)u0->b),
 689                                         (u64)dma_unmap_addr(tx_buffer, dma),
 690                                         dma_unmap_len(tx_buffer, len),
 691                                         tx_buffer->next_to_watch,
 692                                         (u64)tx_buffer->time_stamp,
 693                                         tx_buffer->skb,
 694                                         ring_desc);
 695
 696                                 if (netif_msg_pktdata(adapter) &&
 697                                     tx_buffer->skb)
 698                                         print_hex_dump(KERN_INFO, "",
 699                                                 DUMP_PREFIX_ADDRESS, 16, 1,
 700                                                 tx_buffer->skb->data,
 701                                                 dma_unmap_len(tx_buffer, len),
 702                                                 true);
 703                         }
 704                 }
 705         }
 706
 707         /* Print RX Rings Summary */
 708 rx_ring_summary:
 709         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 710         pr_info("Queue [NTU] [NTC]\n");
 711         for (n = 0; n < adapter->num_rx_queues; n++) {
 712                 rx_ring = adapter->rx_ring[n];
 713                 pr_info("%5d %5X %5X\n",
 714                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 715         }
 716
 717         /* Print RX Rings */
 718         if (!netif_msg_rx_status(adapter))
 719                 return;
 720
 721         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 722
 723         /* Receive Descriptor Formats
 724          *
 725          * 82598 Advanced Receive Descriptor (Read) Format
 726          *    63                                           1        0
 727          *    +-----------------------------------------------------+
 728          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 729          *    +----------------------------------------------+------+
 730          *  8 |       Header Buffer Address [63:1]           |  DD  |
 731          *    +-----------------------------------------------------+
 732          *
 733          *
 734          * 82598 Advanced Receive Descriptor (Write-Back) Format
 735          *
 736          *   63       48 47    32 31  30      21 20 16 15   4 3     0
 737          *   +------------------------------------------------------+
 738          * 0 |       RSS Hash /  |SPH| HDR_LEN  | RSV |Packet|  RSS |
 739          *   | Packet   | IP     |   |          |     | Type | Type |
 740          *   | Checksum | Ident  |   |          |     |      |      |
 741          *   +------------------------------------------------------+
 742          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 743          *   +------------------------------------------------------+
 744          *   63       48 47    32 31            20 19               0
 745          *
 746          * 82599+ Advanced Receive Descriptor (Read) Format
 747          *    63                                           1        0
 748          *    +-----------------------------------------------------+
 749          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 750          *    +----------------------------------------------+------+
 751          *  8 |       Header Buffer Address [63:1]           |  DD  |
 752          *    +-----------------------------------------------------+
 753          *
 754          *
 755          * 82599+ Advanced Receive Descriptor (Write-Back) Format
 756          *
 757          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 758          *   +------------------------------------------------------+
 759          * 0 |RSS / Frag Checksum|SPH| HDR_LEN  |RSC- |Packet|  RSS |
 760          *   |/ RTT / PCoE_PARAM |   |          | CNT | Type | Type |
 761          *   |/ Flow Dir Flt ID  |   |          |     |      |      |
 762          *   +------------------------------------------------------+
 763          * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
 764          *   +------------------------------------------------------+
 765          *   63       48 47    32 31          20 19                 0
 766          */
 767
 768         for (n = 0; n < adapter->num_rx_queues; n++) {
 769                 rx_ring = adapter->rx_ring[n];
 770                 pr_info("------------------------------------\n");
 771                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 772                 pr_info("------------------------------------\n");
 773                 pr_info("%s%s%s\n",
 774                         "R  [desc]      [ PktBuf     A0] ",
 775                         "[  HeadBuf   DD] [bi->dma       ] [bi->skb       ] ",
 776                         "<-- Adv Rx Read format");
 777                 pr_info("%s%s%s\n",
 778                         "RWB[desc]      [PcsmIpSHl PtRs] ",
 779                         "[vl er S cks ln] ---------------- [bi->skb       ] ",
 780                         "<-- Adv Rx Write-Back format");
 781
 782                 for (i = 0; i < rx_ring->count; i++) {
 783                         const char *ring_desc;
 784
 785                         if (i == rx_ring->next_to_use)
 786                                 ring_desc = " NTU";
 787                         else if (i == rx_ring->next_to_clean)
 788                                 ring_desc = " NTC";
 789                         else
 790                                 ring_desc = "";
 791
 792                         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 793                         rx_desc = IXGBE_RX_DESC(rx_ring, i);
 794                         u0 = (struct my_u0 *)rx_desc;
 795                         if (rx_desc->wb.upper.length) {
 796                                 /* Descriptor Done */
 797                                 pr_info("RWB[0x%03X]     %016llX %016llX ---------------- %p%s\n",
 798                                         i,
 799                                         le64_to_cpu((__force __le64)u0->a),
 800                                         le64_to_cpu((__force __le64)u0->b),
 801                                         rx_buffer_info->skb,
 802                                         ring_desc);
 803                         } else {
 804                                 pr_info("R  [0x%03X]     %016llX %016llX %016llX %p%s\n",
 805                                         i,
 806                                         le64_to_cpu((__force __le64)u0->a),
 807                                         le64_to_cpu((__force __le64)u0->b),
 808                                         (u64)rx_buffer_info->dma,
 809                                         rx_buffer_info->skb,
 810                                         ring_desc);
 811
 812                                 if (netif_msg_pktdata(adapter) &&
 813                                     rx_buffer_info->dma) {
 814                                         print_hex_dump(KERN_INFO, "",
 815                                            DUMP_PREFIX_ADDRESS, 16, 1,
 816                                            page_address(rx_buffer_info->page) +
 817                                                     rx_buffer_info->page_offset,
 818                                            ixgbe_rx_bufsz(rx_ring), true);
 819                                 }
 820                         }
 821                 }
 822         }
 823 }
 824
 825 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 826 {
 827         u32 ctrl_ext;
 828
 829         /* Let firmware take over control of h/w */
 830         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 831         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 832                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 833 }
 834
 835 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 836 {
 837         u32 ctrl_ext;
 838
 839         /* Let firmware know the driver has taken over */
 840         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 841         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 842                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 843 }
 844
 845 /**
 846  * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
 847  * @adapter: pointer to adapter struct
 848  * @direction: 0 for Rx, 1 for Tx, -1 for other causes
 849  * @queue: queue to map the corresponding interrupt to
 850  * @msix_vector: the vector to map to the corresponding queue
 851  *
 852  */
 853 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
 854                            u8 queue, u8 msix_vector)
 855 {
 856         u32 ivar, index;
 857         struct ixgbe_hw *hw = &adapter->hw;
 858         switch (hw->mac.type) {
 859         case ixgbe_mac_82598EB:
 860                 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 861                 if (direction == -1)
 862                         direction = 0;
 863                 index = (((direction * 64) + queue) >> 2) & 0x1F;
 864                 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
 865                 ivar &= ~(0xFF << (8 * (queue & 0x3)));
 866                 ivar |= (msix_vector << (8 * (queue & 0x3)));
 867                 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
 868                 break;
 869         case ixgbe_mac_82599EB:
 870         case ixgbe_mac_X540:
 871         case ixgbe_mac_X550:
 872         case ixgbe_mac_X550EM_x:
 873         case ixgbe_mac_x550em_a:
 874                 if (direction == -1) {
 875                         /* other causes */
 876                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 877                         index = ((queue & 1) * 8);
 878                         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
 879                         ivar &= ~(0xFF << index);
 880                         ivar |= (msix_vector << index);
 881                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
 882                         break;
 883                 } else {
 884                         /* tx or rx causes */
 885                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 886                         index = ((16 * (queue & 1)) + (8 * direction));
 887                         ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
 888                         ivar &= ~(0xFF << index);
 889                         ivar |= (msix_vector << index);
 890                         IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
 891                         break;
 892                 }
 893         default:
 894                 break;
 895         }
 896 }
 897
 898 void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
 899                             u64 qmask)
 900 {
 901         u32 mask;
 902
 903         switch (adapter->hw.mac.type) {
 904         case ixgbe_mac_82598EB:
 905                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
 906                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
 907                 break;
 908         case ixgbe_mac_82599EB:
 909         case ixgbe_mac_X540:
 910         case ixgbe_mac_X550:
 911         case ixgbe_mac_X550EM_x:
 912         case ixgbe_mac_x550em_a:
 913                 mask = (qmask & 0xFFFFFFFF);
 914                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
 915                 mask = (qmask >> 32);
 916                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
 917                 break;
 918         default:
 919                 break;
 920         }
 921 }
 922
 923 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
 924 {
 925         struct ixgbe_hw *hw = &adapter->hw;
 926         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 927         int i;
 928         u32 data;
 929
 930         if ((hw->fc.current_mode != ixgbe_fc_full) &&
 931             (hw->fc.current_mode != ixgbe_fc_rx_pause))
 932                 return;
 933
 934         switch (hw->mac.type) {
 935         case ixgbe_mac_82598EB:
 936                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
 937                 break;
 938         default:
 939                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
 940         }
 941         hwstats->lxoffrxc += data;
 942
 943         /* refill credits (no tx hang) if we received xoff */
 944         if (!data)
 945                 return;
 946
 947         for (i = 0; i < adapter->num_tx_queues; i++)
 948                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
 949                           &adapter->tx_ring[i]->state);
 950
 951         for (i = 0; i < adapter->num_xdp_queues; i++)
 952                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
 953                           &adapter->xdp_ring[i]->state);
 954 }
 955
 956 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
 957 {
 958         struct ixgbe_hw *hw = &adapter->hw;
 959         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 960         u32 xoff[8] = {0};
 961         u8 tc;
 962         int i;
 963         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
 964
 965         if (adapter->ixgbe_ieee_pfc)
 966                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
 967
 968         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
 969                 ixgbe_update_xoff_rx_lfc(adapter);
 970                 return;
 971         }
 972
 973         /* update stats for each tc, only valid with PFC enabled */
 974         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
 975                 u32 pxoffrxc;
 976
 977                 switch (hw->mac.type) {
 978                 case ixgbe_mac_82598EB:
 979                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
 980                         break;
 981                 default:
 982                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
 983                 }
 984                 hwstats->pxoffrxc[i] += pxoffrxc;
 985                 /* Get the TC for given UP */
 986                 tc = netdev_get_prio_tc_map(adapter->netdev, i);
 987                 xoff[tc] += pxoffrxc;
 988         }
 989
 990         /* disarm tx queues that have received xoff frames */
 991         for (i = 0; i < adapter->num_tx_queues; i++) {
 992                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
 993
 994                 tc = tx_ring->dcb_tc;
 995                 if (xoff[tc])
 996                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
 997         }
 998
 999         for (i = 0; i < adapter->num_xdp_queues; i++) {
1000                 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i];
1001
1002                 tc = xdp_ring->dcb_tc;
1003                 if (xoff[tc])
1004                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &xdp_ring->state);
1005         }
1006 }
1007
1008 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1009 {
1010         return ring->stats.packets;
1011 }
1012
1013 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1014 {
1015         unsigned int head, tail;
1016
1017         head = ring->next_to_clean;
1018         tail = ring->next_to_use;
1019
1020         return ((head <= tail) ? tail : tail + ring->count) - head;
1021 }
1022
1023 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1024 {
1025         u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1026         u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1027         u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1028
1029         clear_check_for_tx_hang(tx_ring);
1030
1031         /*
1032          * Check for a hung queue, but be thorough. This verifies
1033          * that a transmit has been completed since the previous
1034          * check AND there is at least one packet pending. The
1035          * ARMED bit is set to indicate a potential hang. The
1036          * bit is cleared if a pause frame is received to remove
1037          * false hang detection due to PFC or 802.3x frames. By
1038          * requiring this to fail twice we avoid races with
1039          * pfc clearing the ARMED bit and conditions where we
1040          * run the check_tx_hang logic with a transmit completion
1041          * pending but without time to complete it yet.
1042          */
1043         if (tx_done_old == tx_done && tx_pending)
1044                 /* make sure it is true for two checks in a row */
1045                 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1046                                         &tx_ring->state);
1047         /* update completed stats and continue */
1048         tx_ring->tx_stats.tx_done_old = tx_done;
1049         /* reset the countdown */
1050         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1051
1052         return false;
1053 }
1054
1055 /**
1056  * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1057  * @adapter: driver private struct
1058  **/
1059 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1060 {
1061
1062         /* Do the reset outside of interrupt context */
1063         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1064                 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
1065                 e_warn(drv, "initiating reset due to tx timeout\n");
1066                 ixgbe_service_event_schedule(adapter);
1067         }
1068 }
1069
1070 /**
1071  * ixgbe_tx_maxrate - callback to set the maximum per-queue bitrate
1072  * @netdev: network interface device structure
1073  * @queue_index: Tx queue to set
1074  * @maxrate: desired maximum transmit bitrate
1075  **/
1076 static int ixgbe_tx_maxrate(struct net_device *netdev,
1077                             int queue_index, u32 maxrate)
1078 {
1079         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1080         struct ixgbe_hw *hw = &adapter->hw;
1081         u32 bcnrc_val = ixgbe_link_mbps(adapter);
1082
1083         if (!maxrate)
1084                 return 0;
1085
1086         /* Calculate the rate factor values to set */
1087         bcnrc_val <<= IXGBE_RTTBCNRC_RF_INT_SHIFT;
1088         bcnrc_val /= maxrate;
1089
1090         /* clear everything but the rate factor */
1091         bcnrc_val &= IXGBE_RTTBCNRC_RF_INT_MASK |
1092         IXGBE_RTTBCNRC_RF_DEC_MASK;
1093
1094         /* enable the rate scheduler */
1095         bcnrc_val |= IXGBE_RTTBCNRC_RS_ENA;
1096
1097         IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, queue_index);
1098         IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, bcnrc_val);
1099
1100         return 0;
1101 }
1102
1103 /**
1104  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1105  * @q_vector: structure containing interrupt and ring information
1106  * @tx_ring: tx ring to clean
1107  * @napi_budget: Used to determine if we are in netpoll
1108  **/
1109 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1110                                struct ixgbe_ring *tx_ring, int napi_budget)
1111 {
1112         struct ixgbe_adapter *adapter = q_vector->adapter;
1113         struct ixgbe_tx_buffer *tx_buffer;
1114         union ixgbe_adv_tx_desc *tx_desc;
1115         unsigned int total_bytes = 0, total_packets = 0, total_ipsec = 0;
1116         unsigned int budget = q_vector->tx.work_limit;
1117         unsigned int i = tx_ring->next_to_clean;
1118
1119         if (test_bit(__IXGBE_DOWN, &adapter->state))
1120                 return true;
1121
1122         tx_buffer = &tx_ring->tx_buffer_info[i];
1123         tx_desc = IXGBE_TX_DESC(tx_ring, i);
1124         i -= tx_ring->count;
1125
1126         do {
1127                 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1128
1129                 /* if next_to_watch is not set then there is no work pending */
1130                 if (!eop_desc)
1131                         break;
1132
1133                 /* prevent any other reads prior to eop_desc */
1134                 smp_rmb();
1135
1136                 /* if DD is not set pending work has not been completed */
1137                 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1138                         break;
1139
1140                 /* clear next_to_watch to prevent false hangs */
1141                 tx_buffer->next_to_watch = NULL;
1142
1143                 /* update the statistics for this packet */
1144                 total_bytes += tx_buffer->bytecount;
1145                 total_packets += tx_buffer->gso_segs;
1146                 if (tx_buffer->tx_flags & IXGBE_TX_FLAGS_IPSEC)
1147                         total_ipsec++;
1148
1149                 /* free the skb */
1150                 if (ring_is_xdp(tx_ring))
1151                         xdp_return_frame(tx_buffer->xdpf);
1152                 else
1153                         napi_consume_skb(tx_buffer->skb, napi_budget);
1154
1155                 /* unmap skb header data */
1156                 dma_unmap_single(tx_ring->dev,
1157                                  dma_unmap_addr(tx_buffer, dma),
1158                                  dma_unmap_len(tx_buffer, len),
1159                                  DMA_TO_DEVICE);
1160
1161                 /* clear tx_buffer data */
1162                 dma_unmap_len_set(tx_buffer, len, 0);
1163
1164                 /* unmap remaining buffers */
1165                 while (tx_desc != eop_desc) {
1166                         tx_buffer++;
1167                         tx_desc++;
1168                         i++;
1169                         if (unlikely(!i)) {
1170                                 i -= tx_ring->count;
1171                                 tx_buffer = tx_ring->tx_buffer_info;
1172                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1173                         }
1174
1175                         /* unmap any remaining paged data */
1176                         if (dma_unmap_len(tx_buffer, len)) {
1177                                 dma_unmap_page(tx_ring->dev,
1178                                                dma_unmap_addr(tx_buffer, dma),
1179                                                dma_unmap_len(tx_buffer, len),
1180                                                DMA_TO_DEVICE);
1181                                 dma_unmap_len_set(tx_buffer, len, 0);
1182                         }
1183                 }
1184
1185                 /* move us one more past the eop_desc for start of next pkt */
1186                 tx_buffer++;
1187                 tx_desc++;
1188                 i++;
1189                 if (unlikely(!i)) {
1190                         i -= tx_ring->count;
1191                         tx_buffer = tx_ring->tx_buffer_info;
1192                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1193                 }
1194
1195                 /* issue prefetch for next Tx descriptor */
1196                 prefetch(tx_desc);
1197
1198                 /* update budget accounting */
1199                 budget--;
1200         } while (likely(budget));
1201
1202         i += tx_ring->count;
1203         tx_ring->next_to_clean = i;
1204         u64_stats_update_begin(&tx_ring->syncp);
1205         tx_ring->stats.bytes += total_bytes;
1206         tx_ring->stats.packets += total_packets;
1207         u64_stats_update_end(&tx_ring->syncp);
1208         q_vector->tx.total_bytes += total_bytes;
1209         q_vector->tx.total_packets += total_packets;
1210         adapter->tx_ipsec += total_ipsec;
1211
1212         if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1213                 /* schedule immediate reset if we believe we hung */
1214                 struct ixgbe_hw *hw = &adapter->hw;
1215                 e_err(drv, "Detected Tx Unit Hang %s\n"
1216                         "  Tx Queue             <%d>\n"
1217                         "  TDH, TDT             <%x>, <%x>\n"
1218                         "  next_to_use          <%x>\n"
1219                         "  next_to_clean        <%x>\n"
1220                         "tx_buffer_info[next_to_clean]\n"
1221                         "  time_stamp           <%lx>\n"
1222                         "  jiffies              <%lx>\n",
1223                         ring_is_xdp(tx_ring) ? "(XDP)" : "",
1224                         tx_ring->queue_index,
1225                         IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1226                         IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1227                         tx_ring->next_to_use, i,
1228                         tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1229
1230                 if (!ring_is_xdp(tx_ring))
1231                         netif_stop_subqueue(tx_ring->netdev,
1232                                             tx_ring->queue_index);
1233
1234                 e_info(probe,
1235                        "tx hang %d detected on queue %d, resetting adapter\n",
1236                         adapter->tx_timeout_count + 1, tx_ring->queue_index);
1237
1238                 /* schedule immediate reset if we believe we hung */
1239                 ixgbe_tx_timeout_reset(adapter);
1240
1241                 /* the adapter is about to reset, no point in enabling stuff */
1242                 return true;
1243         }
1244
1245         if (ring_is_xdp(tx_ring))
1246                 return !!budget;
1247
1248         netdev_tx_completed_queue(txring_txq(tx_ring),
1249                                   total_packets, total_bytes);
1250
1251 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1252         if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1253                      (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1254                 /* Make sure that anybody stopping the queue after this
1255                  * sees the new next_to_clean.
1256                  */
1257                 smp_mb();
1258                 if (__netif_subqueue_stopped(tx_ring->netdev,
1259                                              tx_ring->queue_index)
1260                     && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1261                         netif_wake_subqueue(tx_ring->netdev,
1262                                             tx_ring->queue_index);
1263                         ++tx_ring->tx_stats.restart_queue;
1264                 }
1265         }
1266
1267         return !!budget;
1268 }
1269
1270 #ifdef CONFIG_IXGBE_DCA
1271 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1272                                 struct ixgbe_ring *tx_ring,
1273                                 int cpu)
1274 {
1275         struct ixgbe_hw *hw = &adapter->hw;
1276         u32 txctrl = 0;
1277         u16 reg_offset;
1278
1279         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1280                 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1281
1282         switch (hw->mac.type) {
1283         case ixgbe_mac_82598EB:
1284                 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1285                 break;
1286         case ixgbe_mac_82599EB:
1287         case ixgbe_mac_X540:
1288                 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1289                 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1290                 break;
1291         default:
1292                 /* for unknown hardware do not write register */
1293                 return;
1294         }
1295
1296         /*
1297          * We can enable relaxed ordering for reads, but not writes when
1298          * DCA is enabled.  This is due to a known issue in some chipsets
1299          * which will cause the DCA tag to be cleared.
1300          */
1301         txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1302                   IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1303                   IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1304
1305         IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1306 }
1307
1308 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1309                                 struct ixgbe_ring *rx_ring,
1310                                 int cpu)
1311 {
1312         struct ixgbe_hw *hw = &adapter->hw;
1313         u32 rxctrl = 0;
1314         u8 reg_idx = rx_ring->reg_idx;
1315
1316         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1317                 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1318
1319         switch (hw->mac.type) {
1320         case ixgbe_mac_82599EB:
1321         case ixgbe_mac_X540:
1322                 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1323                 break;
1324         default:
1325                 break;
1326         }
1327
1328         /*
1329          * We can enable relaxed ordering for reads, but not writes when
1330          * DCA is enabled.  This is due to a known issue in some chipsets
1331          * which will cause the DCA tag to be cleared.
1332          */
1333         rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1334                   IXGBE_DCA_RXCTRL_DATA_DCA_EN |
1335                   IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1336
1337         IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1338 }
1339
1340 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1341 {
1342         struct ixgbe_adapter *adapter = q_vector->adapter;
1343         struct ixgbe_ring *ring;
1344         int cpu = get_cpu();
1345
1346         if (q_vector->cpu == cpu)
1347                 goto out_no_update;
1348
1349         ixgbe_for_each_ring(ring, q_vector->tx)
1350                 ixgbe_update_tx_dca(adapter, ring, cpu);
1351
1352         ixgbe_for_each_ring(ring, q_vector->rx)
1353                 ixgbe_update_rx_dca(adapter, ring, cpu);
1354
1355         q_vector->cpu = cpu;
1356 out_no_update:
1357         put_cpu();
1358 }
1359
1360 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1361 {
1362         int i;
1363
1364         /* always use CB2 mode, difference is masked in the CB driver */
1365         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1366                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1367                                 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1368         else
1369                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1370                                 IXGBE_DCA_CTRL_DCA_DISABLE);
1371
1372         for (i = 0; i < adapter->num_q_vectors; i++) {
1373                 adapter->q_vector[i]->cpu = -1;
1374                 ixgbe_update_dca(adapter->q_vector[i]);
1375         }
1376 }
1377
1378 static int __ixgbe_notify_dca(struct device *dev, void *data)
1379 {
1380         struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1381         unsigned long event = *(unsigned long *)data;
1382
1383         if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1384                 return 0;
1385
1386         switch (event) {
1387         case DCA_PROVIDER_ADD:
1388                 /* if we're already enabled, don't do it again */
1389                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1390                         break;
1391                 if (dca_add_requester(dev) == 0) {
1392                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1393                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1394                                         IXGBE_DCA_CTRL_DCA_MODE_CB2);
1395                         break;
1396                 }
1397                 /* fall through - DCA is disabled. */
1398         case DCA_PROVIDER_REMOVE:
1399                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1400                         dca_remove_requester(dev);
1401                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1402                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1403                                         IXGBE_DCA_CTRL_DCA_DISABLE);
1404                 }
1405                 break;
1406         }
1407
1408         return 0;
1409 }
1410
1411 #endif /* CONFIG_IXGBE_DCA */
1412
1413 #define IXGBE_RSS_L4_TYPES_MASK \
1414         ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1415          (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1416          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1417          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1418
1419 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1420                                  union ixgbe_adv_rx_desc *rx_desc,
1421                                  struct sk_buff *skb)
1422 {
1423         u16 rss_type;
1424
1425         if (!(ring->netdev->features & NETIF_F_RXHASH))
1426                 return;
1427
1428         rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1429                    IXGBE_RXDADV_RSSTYPE_MASK;
1430
1431         if (!rss_type)
1432                 return;
1433
1434         skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1435                      (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1436                      PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1437 }
1438
1439 #ifdef IXGBE_FCOE
1440 /**
1441  * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1442  * @ring: structure containing ring specific data
1443  * @rx_desc: advanced rx descriptor
1444  *
1445  * Returns : true if it is FCoE pkt
1446  */
1447 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1448                                     union ixgbe_adv_rx_desc *rx_desc)
1449 {
1450         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1451
1452         return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1453                ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1454                 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1455                              IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1456 }
1457
1458 #endif /* IXGBE_FCOE */
1459 /**
1460  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1461  * @ring: structure containing ring specific data
1462  * @rx_desc: current Rx descriptor being processed
1463  * @skb: skb currently being received and modified
1464  **/
1465 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1466                                      union ixgbe_adv_rx_desc *rx_desc,
1467                                      struct sk_buff *skb)
1468 {
1469         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1470         bool encap_pkt = false;
1471
1472         skb_checksum_none_assert(skb);
1473
1474         /* Rx csum disabled */
1475         if (!(ring->netdev->features & NETIF_F_RXCSUM))
1476                 return;
1477
1478         /* check for VXLAN and Geneve packets */
1479         if (pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) {
1480                 encap_pkt = true;
1481                 skb->encapsulation = 1;
1482         }
1483
1484         /* if IP and error */
1485         if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1486             ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1487                 ring->rx_stats.csum_err++;
1488                 return;
1489         }
1490
1491         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1492                 return;
1493
1494         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1495                 /*
1496                  * 82599 errata, UDP frames with a 0 checksum can be marked as
1497                  * checksum errors.
1498                  */
1499                 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1500                     test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1501                         return;
1502
1503                 ring->rx_stats.csum_err++;
1504                 return;
1505         }
1506
1507         /* It must be a TCP or UDP packet with a valid checksum */
1508         skb->ip_summed = CHECKSUM_UNNECESSARY;
1509         if (encap_pkt) {
1510                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1511                         return;
1512
1513                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1514                         skb->ip_summed = CHECKSUM_NONE;
1515                         return;
1516                 }
1517                 /* If we checked the outer header let the stack know */
1518                 skb->csum_level = 1;
1519         }
1520 }
1521
1522 static inline unsigned int ixgbe_rx_offset(struct ixgbe_ring *rx_ring)
1523 {
1524         return ring_uses_build_skb(rx_ring) ? IXGBE_SKB_PAD : 0;
1525 }
1526
1527 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1528                                     struct ixgbe_rx_buffer *bi)
1529 {
1530         struct page *page = bi->page;
1531         dma_addr_t dma;
1532
1533         /* since we are recycling buffers we should seldom need to alloc */
1534         if (likely(page))
1535                 return true;
1536
1537         /* alloc new page for storage */
1538         page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1539         if (unlikely(!page)) {
1540                 rx_ring->rx_stats.alloc_rx_page_failed++;
1541                 return false;
1542         }
1543
1544         /* map page for use */
1545         dma = dma_map_page_attrs(rx_ring->dev, page, 0,
1546                                  ixgbe_rx_pg_size(rx_ring),
1547                                  DMA_FROM_DEVICE,
1548                                  IXGBE_RX_DMA_ATTR);
1549
1550         /*
1551          * if mapping failed free memory back to system since
1552          * there isn't much point in holding memory we can't use
1553          */
1554         if (dma_mapping_error(rx_ring->dev, dma)) {
1555                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1556
1557                 rx_ring->rx_stats.alloc_rx_page_failed++;
1558                 return false;
1559         }
1560
1561         bi->dma = dma;
1562         bi->page = page;
1563         bi->page_offset = ixgbe_rx_offset(rx_ring);
1564         page_ref_add(page, USHRT_MAX - 1);
1565         bi->pagecnt_bias = USHRT_MAX;
1566         rx_ring->rx_stats.alloc_rx_page++;
1567
1568         return true;
1569 }
1570
1571 /**
1572  * ixgbe_alloc_rx_buffers - Replace used receive buffers
1573  * @rx_ring: ring to place buffers on
1574  * @cleaned_count: number of buffers to replace
1575  **/
1576 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1577 {
1578         union ixgbe_adv_rx_desc *rx_desc;
1579         struct ixgbe_rx_buffer *bi;
1580         u16 i = rx_ring->next_to_use;
1581         u16 bufsz;
1582
1583         /* nothing to do */
1584         if (!cleaned_count)
1585                 return;
1586
1587         rx_desc = IXGBE_RX_DESC(rx_ring, i);
1588         bi = &rx_ring->rx_buffer_info[i];
1589         i -= rx_ring->count;
1590
1591         bufsz = ixgbe_rx_bufsz(rx_ring);
1592
1593         do {
1594                 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1595                         break;
1596
1597                 /* sync the buffer for use by the device */
1598                 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
1599                                                  bi->page_offset, bufsz,
1600                                                  DMA_FROM_DEVICE);
1601
1602                 /*
1603                  * Refresh the desc even if buffer_addrs didn't change
1604                  * because each write-back erases this info.
1605                  */
1606                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1607
1608                 rx_desc++;
1609                 bi++;
1610                 i++;
1611                 if (unlikely(!i)) {
1612                         rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1613                         bi = rx_ring->rx_buffer_info;
1614                         i -= rx_ring->count;
1615                 }
1616
1617                 /* clear the length for the next_to_use descriptor */
1618                 rx_desc->wb.upper.length = 0;
1619
1620                 cleaned_count--;
1621         } while (cleaned_count);
1622
1623         i += rx_ring->count;
1624
1625         if (rx_ring->next_to_use != i) {
1626                 rx_ring->next_to_use = i;
1627
1628                 /* update next to alloc since we have filled the ring */
1629                 rx_ring->next_to_alloc = i;
1630
1631                 /* Force memory writes to complete before letting h/w
1632                  * know there are new descriptors to fetch.  (Only
1633                  * applicable for weak-ordered memory model archs,
1634                  * such as IA-64).
1635                  */
1636                 wmb();
1637                 writel(i, rx_ring->tail);
1638         }
1639 }
1640
1641 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1642                                    struct sk_buff *skb)
1643 {
1644         u16 hdr_len = skb_headlen(skb);
1645
1646         /* set gso_size to avoid messing up TCP MSS */
1647         skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1648                                                  IXGBE_CB(skb)->append_cnt);
1649         skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1650 }
1651
1652 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1653                                    struct sk_buff *skb)
1654 {
1655         /* if append_cnt is 0 then frame is not RSC */
1656         if (!IXGBE_CB(skb)->append_cnt)
1657                 return;
1658
1659         rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1660         rx_ring->rx_stats.rsc_flush++;
1661
1662         ixgbe_set_rsc_gso_size(rx_ring, skb);
1663
1664         /* gso_size is computed using append_cnt so always clear it last */
1665         IXGBE_CB(skb)->append_cnt = 0;
1666 }
1667
1668 /**
1669  * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1670  * @rx_ring: rx descriptor ring packet is being transacted on
1671  * @rx_desc: pointer to the EOP Rx descriptor
1672  * @skb: pointer to current skb being populated
1673  *
1674  * This function checks the ring, descriptor, and packet information in
1675  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1676  * other fields within the skb.
1677  **/
1678 void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1679                               union ixgbe_adv_rx_desc *rx_desc,
1680                               struct sk_buff *skb)
1681 {
1682         struct net_device *dev = rx_ring->netdev;
1683         u32 flags = rx_ring->q_vector->adapter->flags;
1684
1685         ixgbe_update_rsc_stats(rx_ring, skb);
1686
1687         ixgbe_rx_hash(rx_ring, rx_desc, skb);
1688
1689         ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1690
1691         if (unlikely(flags & IXGBE_FLAG_RX_HWTSTAMP_ENABLED))
1692                 ixgbe_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
1693
1694         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1695             ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1696                 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1697                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1698         }
1699
1700         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_SECP))
1701                 ixgbe_ipsec_rx(rx_ring, rx_desc, skb);
1702
1703         /* record Rx queue, or update MACVLAN statistics */
1704         if (netif_is_ixgbe(dev))
1705                 skb_record_rx_queue(skb, rx_ring->queue_index);
1706         else
1707                 macvlan_count_rx(netdev_priv(dev), skb->len + ETH_HLEN, true,
1708                                  false);
1709
1710         skb->protocol = eth_type_trans(skb, dev);
1711 }
1712
1713 void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1714                   struct sk_buff *skb)
1715 {
1716         napi_gro_receive(&q_vector->napi, skb);
1717 }
1718
1719 /**
1720  * ixgbe_is_non_eop - process handling of non-EOP buffers
1721  * @rx_ring: Rx ring being processed
1722  * @rx_desc: Rx descriptor for current buffer
1723  * @skb: Current socket buffer containing buffer in progress
1724  *
1725  * This function updates next to clean.  If the buffer is an EOP buffer
1726  * this function exits returning false, otherwise it will place the
1727  * sk_buff in the next buffer to be chained and return true indicating
1728  * that this is in fact a non-EOP buffer.
1729  **/
1730 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1731                              union ixgbe_adv_rx_desc *rx_desc,
1732                              struct sk_buff *skb)
1733 {
1734         u32 ntc = rx_ring->next_to_clean + 1;
1735
1736         /* fetch, update, and store next to clean */
1737         ntc = (ntc < rx_ring->count) ? ntc : 0;
1738         rx_ring->next_to_clean = ntc;
1739
1740         prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1741
1742         /* update RSC append count if present */
1743         if (ring_is_rsc_enabled(rx_ring)) {
1744                 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1745                                      cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1746
1747                 if (unlikely(rsc_enabled)) {
1748                         u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1749
1750                         rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1751                         IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1752
1753                         /* update ntc based on RSC value */
1754                         ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1755                         ntc &= IXGBE_RXDADV_NEXTP_MASK;
1756                         ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1757                 }
1758         }
1759
1760         /* if we are the last buffer then there is nothing else to do */
1761         if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1762                 return false;
1763
1764         /* place skb in next buffer to be received */
1765         rx_ring->rx_buffer_info[ntc].skb = skb;
1766         rx_ring->rx_stats.non_eop_descs++;
1767
1768         return true;
1769 }
1770
1771 /**
1772  * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1773  * @rx_ring: rx descriptor ring packet is being transacted on
1774  * @skb: pointer to current skb being adjusted
1775  *
1776  * This function is an ixgbe specific version of __pskb_pull_tail.  The
1777  * main difference between this version and the original function is that
1778  * this function can make several assumptions about the state of things
1779  * that allow for significant optimizations versus the standard function.
1780  * As a result we can do things like drop a frag and maintain an accurate
1781  * truesize for the skb.
1782  */
1783 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1784                             struct sk_buff *skb)
1785 {
1786         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1787         unsigned char *va;
1788         unsigned int pull_len;
1789
1790         /*
1791          * it is valid to use page_address instead of kmap since we are
1792          * working with pages allocated out of the lomem pool per
1793          * alloc_page(GFP_ATOMIC)
1794          */
1795         va = skb_frag_address(frag);
1796
1797         /*
1798          * we need the header to contain the greater of either ETH_HLEN or
1799          * 60 bytes if the skb->len is less than 60 for skb_pad.
1800          */
1801         pull_len = eth_get_headlen(va, IXGBE_RX_HDR_SIZE);
1802
1803         /* align pull length to size of long to optimize memcpy performance */
1804         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1805
1806         /* update all of the pointers */
1807         skb_frag_size_sub(frag, pull_len);
1808         frag->page_offset += pull_len;
1809         skb->data_len -= pull_len;
1810         skb->tail += pull_len;
1811 }
1812
1813 /**
1814  * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1815  * @rx_ring: rx descriptor ring packet is being transacted on
1816  * @skb: pointer to current skb being updated
1817  *
1818  * This function provides a basic DMA sync up for the first fragment of an
1819  * skb.  The reason for doing this is that the first fragment cannot be
1820  * unmapped until we have reached the end of packet descriptor for a buffer
1821  * chain.
1822  */
1823 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1824                                 struct sk_buff *skb)
1825 {
1826         /* if the page was released unmap it, else just sync our portion */
1827         if (unlikely(IXGBE_CB(skb)->page_released)) {
1828                 dma_unmap_page_attrs(rx_ring->dev, IXGBE_CB(skb)->dma,
1829                                      ixgbe_rx_pg_size(rx_ring),
1830                                      DMA_FROM_DEVICE,
1831                                      IXGBE_RX_DMA_ATTR);
1832         } else if (ring_uses_build_skb(rx_ring)) {
1833                 unsigned long offset = (unsigned long)(skb->data) & ~PAGE_MASK;
1834
1835                 dma_sync_single_range_for_cpu(rx_ring->dev,
1836                                               IXGBE_CB(skb)->dma,
1837                                               offset,
1838                                               skb_headlen(skb),
1839                                               DMA_FROM_DEVICE);
1840         } else {
1841                 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1842
1843                 dma_sync_single_range_for_cpu(rx_ring->dev,
1844                                               IXGBE_CB(skb)->dma,
1845                                               frag->page_offset,
1846                                               skb_frag_size(frag),
1847                                               DMA_FROM_DEVICE);
1848         }
1849 }
1850
1851 /**
1852  * ixgbe_cleanup_headers - Correct corrupted or empty headers
1853  * @rx_ring: rx descriptor ring packet is being transacted on
1854  * @rx_desc: pointer to the EOP Rx descriptor
1855  * @skb: pointer to current skb being fixed
1856  *
1857  * Check if the skb is valid in the XDP case it will be an error pointer.
1858  * Return true in this case to abort processing and advance to next
1859  * descriptor.
1860  *
1861  * Check for corrupted packet headers caused by senders on the local L2
1862  * embedded NIC switch not setting up their Tx Descriptors right.  These
1863  * should be very rare.
1864  *
1865  * Also address the case where we are pulling data in on pages only
1866  * and as such no data is present in the skb header.
1867  *
1868  * In addition if skb is not at least 60 bytes we need to pad it so that
1869  * it is large enough to qualify as a valid Ethernet frame.
1870  *
1871  * Returns true if an error was encountered and skb was freed.
1872  **/
1873 bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1874                            union ixgbe_adv_rx_desc *rx_desc,
1875                            struct sk_buff *skb)
1876 {
1877         struct net_device *netdev = rx_ring->netdev;
1878
1879         /* XDP packets use error pointer so abort at this point */
1880         if (IS_ERR(skb))
1881                 return true;
1882
1883         /* Verify netdev is present, and that packet does not have any
1884          * errors that would be unacceptable to the netdev.
1885          */
1886         if (!netdev ||
1887             (unlikely(ixgbe_test_staterr(rx_desc,
1888                                          IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1889              !(netdev->features & NETIF_F_RXALL)))) {
1890                 dev_kfree_skb_any(skb);
1891                 return true;
1892         }
1893
1894         /* place header in linear portion of buffer */
1895         if (!skb_headlen(skb))
1896                 ixgbe_pull_tail(rx_ring, skb);
1897
1898 #ifdef IXGBE_FCOE
1899         /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1900         if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1901                 return false;
1902
1903 #endif
1904         /* if eth_skb_pad returns an error the skb was freed */
1905         if (eth_skb_pad(skb))
1906                 return true;
1907
1908         return false;
1909 }
1910
1911 /**
1912  * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1913  * @rx_ring: rx descriptor ring to store buffers on
1914  * @old_buff: donor buffer to have page reused
1915  *
1916  * Synchronizes page for reuse by the adapter
1917  **/
1918 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1919                                 struct ixgbe_rx_buffer *old_buff)
1920 {
1921         struct ixgbe_rx_buffer *new_buff;
1922         u16 nta = rx_ring->next_to_alloc;
1923
1924         new_buff = &rx_ring->rx_buffer_info[nta];
1925
1926         /* update, and store next to alloc */
1927         nta++;
1928         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1929
1930         /* Transfer page from old buffer to new buffer.
1931          * Move each member individually to avoid possible store
1932          * forwarding stalls and unnecessary copy of skb.
1933          */
1934         new_buff->dma           = old_buff->dma;
1935         new_buff->page          = old_buff->page;
1936         new_buff->page_offset   = old_buff->page_offset;
1937         new_buff->pagecnt_bias  = old_buff->pagecnt_bias;
1938 }
1939
1940 static inline bool ixgbe_page_is_reserved(struct page *page)
1941 {
1942         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1943 }
1944
1945 static bool ixgbe_can_reuse_rx_page(struct ixgbe_rx_buffer *rx_buffer)
1946 {
1947         unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
1948         struct page *page = rx_buffer->page;
1949
1950         /* avoid re-using remote pages */
1951         if (unlikely(ixgbe_page_is_reserved(page)))
1952                 return false;
1953
1954 #if (PAGE_SIZE < 8192)
1955         /* if we are only owner of page we can reuse it */
1956         if (unlikely((page_ref_count(page) - pagecnt_bias) > 1))
1957                 return false;
1958 #else
1959         /* The last offset is a bit aggressive in that we assume the
1960          * worst case of FCoE being enabled and using a 3K buffer.
1961          * However this should have minimal impact as the 1K extra is
1962          * still less than one buffer in size.
1963          */
1964 #define IXGBE_LAST_OFFSET \
1965         (SKB_WITH_OVERHEAD(PAGE_SIZE) - IXGBE_RXBUFFER_3K)
1966         if (rx_buffer->page_offset > IXGBE_LAST_OFFSET)
1967                 return false;
1968 #endif
1969
1970         /* If we have drained the page fragment pool we need to update
1971          * the pagecnt_bias and page count so that we fully restock the
1972          * number of references the driver holds.
1973          */
1974         if (unlikely(pagecnt_bias == 1)) {
1975                 page_ref_add(page, USHRT_MAX - 1);
1976                 rx_buffer->pagecnt_bias = USHRT_MAX;
1977         }
1978
1979         return true;
1980 }
1981
1982 /**
1983  * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1984  * @rx_ring: rx descriptor ring to transact packets on
1985  * @rx_buffer: buffer containing page to add
1986  * @skb: sk_buff to place the data into
1987  * @size: size of data in rx_buffer
1988  *
1989  * This function will add the data contained in rx_buffer->page to the skb.
1990  * This is done either through a direct copy if the data in the buffer is
1991  * less than the skb header size, otherwise it will just attach the page as
1992  * a frag to the skb.
1993  *
1994  * The function will then update the page offset if necessary and return
1995  * true if the buffer can be reused by the adapter.
1996  **/
1997 static void ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
1998                               struct ixgbe_rx_buffer *rx_buffer,
1999                               struct sk_buff *skb,
2000                               unsigned int size)
2001 {
2002 #if (PAGE_SIZE < 8192)
2003         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2004 #else
2005         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
2006                                 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) :
2007                                 SKB_DATA_ALIGN(size);
2008 #endif
2009         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
2010                         rx_buffer->page_offset, size, truesize);
2011 #if (PAGE_SIZE < 8192)
2012         rx_buffer->page_offset ^= truesize;
2013 #else
2014         rx_buffer->page_offset += truesize;
2015 #endif
2016 }
2017
2018 static struct ixgbe_rx_buffer *ixgbe_get_rx_buffer(struct ixgbe_ring *rx_ring,
2019                                                    union ixgbe_adv_rx_desc *rx_desc,
2020                                                    struct sk_buff **skb,
2021                                                    const unsigned int size)
2022 {
2023         struct ixgbe_rx_buffer *rx_buffer;
2024
2025         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
2026         prefetchw(rx_buffer->page);
2027         *skb = rx_buffer->skb;
2028
2029         /* Delay unmapping of the first packet. It carries the header
2030          * information, HW may still access the header after the writeback.
2031          * Only unmap it when EOP is reached
2032          */
2033         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)) {
2034                 if (!*skb)
2035                         goto skip_sync;
2036         } else {
2037                 if (*skb)
2038                         ixgbe_dma_sync_frag(rx_ring, *skb);
2039         }
2040
2041         /* we are reusing so sync this buffer for CPU use */
2042         dma_sync_single_range_for_cpu(rx_ring->dev,
2043                                       rx_buffer->dma,
2044                                       rx_buffer->page_offset,
2045                                       size,
2046                                       DMA_FROM_DEVICE);
2047 skip_sync:
2048         rx_buffer->pagecnt_bias--;
2049
2050         return rx_buffer;
2051 }
2052
2053 static void ixgbe_put_rx_buffer(struct ixgbe_ring *rx_ring,
2054                                 struct ixgbe_rx_buffer *rx_buffer,
2055                                 struct sk_buff *skb)
2056 {
2057         if (ixgbe_can_reuse_rx_page(rx_buffer)) {
2058                 /* hand second half of page back to the ring */
2059                 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2060         } else {
2061                 if (!IS_ERR(skb) && IXGBE_CB(skb)->dma == rx_buffer->dma) {
2062                         /* the page has been released from the ring */
2063                         IXGBE_CB(skb)->page_released = true;
2064                 } else {
2065                         /* we are not reusing the buffer so unmap it */
2066                         dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
2067                                              ixgbe_rx_pg_size(rx_ring),
2068                                              DMA_FROM_DEVICE,
2069                                              IXGBE_RX_DMA_ATTR);
2070                 }
2071                 __page_frag_cache_drain(rx_buffer->page,
2072                                         rx_buffer->pagecnt_bias);
2073         }
2074
2075         /* clear contents of rx_buffer */
2076         rx_buffer->page = NULL;
2077         rx_buffer->skb = NULL;
2078 }
2079
2080 static struct sk_buff *ixgbe_construct_skb(struct ixgbe_ring *rx_ring,
2081                                            struct ixgbe_rx_buffer *rx_buffer,
2082                                            struct xdp_buff *xdp,
2083                                            union ixgbe_adv_rx_desc *rx_desc)
2084 {
2085         unsigned int size = xdp->data_end - xdp->data;
2086 #if (PAGE_SIZE < 8192)
2087         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2088 #else
2089         unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end -
2090                                                xdp->data_hard_start);
2091 #endif
2092         struct sk_buff *skb;
2093
2094         /* prefetch first cache line of first page */
2095         prefetch(xdp->data);
2096 #if L1_CACHE_BYTES < 128
2097         prefetch(xdp->data + L1_CACHE_BYTES);
2098 #endif
2099         /* Note, we get here by enabling legacy-rx via:
2100          *
2101          *    ethtool --set-priv-flags <dev> legacy-rx on
2102          *
2103          * In this mode, we currently get 0 extra XDP headroom as
2104          * opposed to having legacy-rx off, where we process XDP
2105          * packets going to stack via ixgbe_build_skb(). The latter
2106          * provides us currently with 192 bytes of headroom.
2107          *
2108          * For ixgbe_construct_skb() mode it means that the
2109          * xdp->data_meta will always point to xdp->data, since
2110          * the helper cannot expand the head. Should this ever
2111          * change in future for legacy-rx mode on, then lets also
2112          * add xdp->data_meta handling here.
2113          */
2114
2115         /* allocate a skb to store the frags */
2116         skb = napi_alloc_skb(&rx_ring->q_vector->napi, IXGBE_RX_HDR_SIZE);
2117         if (unlikely(!skb))
2118                 return NULL;
2119
2120         if (size > IXGBE_RX_HDR_SIZE) {
2121                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2122                         IXGBE_CB(skb)->dma = rx_buffer->dma;
2123
2124                 skb_add_rx_frag(skb, 0, rx_buffer->page,
2125                                 xdp->data - page_address(rx_buffer->page),
2126                                 size, truesize);
2127 #if (PAGE_SIZE < 8192)
2128                 rx_buffer->page_offset ^= truesize;
2129 #else
2130                 rx_buffer->page_offset += truesize;
2131 #endif
2132         } else {
2133                 memcpy(__skb_put(skb, size),
2134                        xdp->data, ALIGN(size, sizeof(long)));
2135                 rx_buffer->pagecnt_bias++;
2136         }
2137
2138         return skb;
2139 }
2140
2141 static struct sk_buff *ixgbe_build_skb(struct ixgbe_ring *rx_ring,
2142                                        struct ixgbe_rx_buffer *rx_buffer,
2143                                        struct xdp_buff *xdp,
2144                                        union ixgbe_adv_rx_desc *rx_desc)
2145 {
2146         unsigned int metasize = xdp->data - xdp->data_meta;
2147 #if (PAGE_SIZE < 8192)
2148         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2149 #else
2150         unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
2151                                 SKB_DATA_ALIGN(xdp->data_end -
2152                                                xdp->data_hard_start);
2153 #endif
2154         struct sk_buff *skb;
2155
2156         /* Prefetch first cache line of first page. If xdp->data_meta
2157          * is unused, this points extactly as xdp->data, otherwise we
2158          * likely have a consumer accessing first few bytes of meta
2159          * data, and then actual data.
2160          */
2161         prefetch(xdp->data_meta);
2162 #if L1_CACHE_BYTES < 128
2163         prefetch(xdp->data_meta + L1_CACHE_BYTES);
2164 #endif
2165
2166         /* build an skb to around the page buffer */
2167         skb = build_skb(xdp->data_hard_start, truesize);
2168         if (unlikely(!skb))
2169                 return NULL;
2170
2171         /* update pointers within the skb to store the data */
2172         skb_reserve(skb, xdp->data - xdp->data_hard_start);
2173         __skb_put(skb, xdp->data_end - xdp->data);
2174         if (metasize)
2175                 skb_metadata_set(skb, metasize);
2176
2177         /* record DMA address if this is the start of a chain of buffers */
2178         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2179                 IXGBE_CB(skb)->dma = rx_buffer->dma;
2180
2181         /* update buffer offset */
2182 #if (PAGE_SIZE < 8192)
2183         rx_buffer->page_offset ^= truesize;
2184 #else
2185         rx_buffer->page_offset += truesize;
2186 #endif
2187
2188         return skb;
2189 }
2190
2191 static struct sk_buff *ixgbe_run_xdp(struct ixgbe_adapter *adapter,
2192                                      struct ixgbe_ring *rx_ring,
2193                                      struct xdp_buff *xdp)
2194 {
2195         int err, result = IXGBE_XDP_PASS;
2196         struct bpf_prog *xdp_prog;
2197         struct xdp_frame *xdpf;
2198         u32 act;
2199
2200         rcu_read_lock();
2201         xdp_prog = READ_ONCE(rx_ring->xdp_prog);
2202
2203         if (!xdp_prog)
2204                 goto xdp_out;
2205
2206         prefetchw(xdp->data_hard_start); /* xdp_frame write */
2207
2208         act = bpf_prog_run_xdp(xdp_prog, xdp);
2209         switch (act) {
2210         case XDP_PASS:
2211                 break;
2212         case XDP_TX:
2213                 xdpf = convert_to_xdp_frame(xdp);
2214                 if (unlikely(!xdpf)) {
2215                         result = IXGBE_XDP_CONSUMED;
2216                         break;
2217                 }
2218                 result = ixgbe_xmit_xdp_ring(adapter, xdpf);
2219                 break;
2220         case XDP_REDIRECT:
2221                 err = xdp_do_redirect(adapter->netdev, xdp, xdp_prog);
2222                 if (!err)
2223                         result = IXGBE_XDP_REDIR;
2224                 else
2225                         result = IXGBE_XDP_CONSUMED;
2226                 break;
2227         default:
2228                 bpf_warn_invalid_xdp_action(act);
2229                 /* fallthrough */
2230         case XDP_ABORTED:
2231                 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
2232                 /* fallthrough -- handle aborts by dropping packet */
2233         case XDP_DROP:
2234                 result = IXGBE_XDP_CONSUMED;
2235                 break;
2236         }
2237 xdp_out:
2238         rcu_read_unlock();
2239         return ERR_PTR(-result);
2240 }
2241
2242 static void ixgbe_rx_buffer_flip(struct ixgbe_ring *rx_ring,
2243                                  struct ixgbe_rx_buffer *rx_buffer,
2244                                  unsigned int size)
2245 {
2246 #if (PAGE_SIZE < 8192)
2247         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2248
2249         rx_buffer->page_offset ^= truesize;
2250 #else
2251         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
2252                                 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) :
2253                                 SKB_DATA_ALIGN(size);
2254
2255         rx_buffer->page_offset += truesize;
2256 #endif
2257 }
2258
2259 /**
2260  * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2261  * @q_vector: structure containing interrupt and ring information
2262  * @rx_ring: rx descriptor ring to transact packets on
2263  * @budget: Total limit on number of packets to process
2264  *
2265  * This function provides a "bounce buffer" approach to Rx interrupt
2266  * processing.  The advantage to this is that on systems that have
2267  * expensive overhead for IOMMU access this provides a means of avoiding
2268  * it by maintaining the mapping of the page to the syste.
2269  *
2270  * Returns amount of work completed
2271  **/
2272 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2273                                struct ixgbe_ring *rx_ring,
2274                                const int budget)
2275 {
2276         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2277         struct ixgbe_adapter *adapter = q_vector->adapter;
2278 #ifdef IXGBE_FCOE
2279         int ddp_bytes;
2280         unsigned int mss = 0;
2281 #endif /* IXGBE_FCOE */
2282         u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2283         unsigned int xdp_xmit = 0;
2284         struct xdp_buff xdp;
2285
2286         xdp.rxq = &rx_ring->xdp_rxq;
2287
2288         while (likely(total_rx_packets < budget)) {
2289                 union ixgbe_adv_rx_desc *rx_desc;
2290                 struct ixgbe_rx_buffer *rx_buffer;
2291                 struct sk_buff *skb;
2292                 unsigned int size;
2293
2294                 /* return some buffers to hardware, one at a time is too slow */
2295                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2296                         ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2297                         cleaned_count = 0;
2298                 }
2299
2300                 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2301                 size = le16_to_cpu(rx_desc->wb.upper.length);
2302                 if (!size)
2303                         break;
2304
2305                 /* This memory barrier is needed to keep us from reading
2306                  * any other fields out of the rx_desc until we know the
2307                  * descriptor has been written back
2308                  */
2309                 dma_rmb();
2310
2311                 rx_buffer = ixgbe_get_rx_buffer(rx_ring, rx_desc, &skb, size);
2312
2313                 /* retrieve a buffer from the ring */
2314                 if (!skb) {
2315                         xdp.data = page_address(rx_buffer->page) +
2316                                    rx_buffer->page_offset;
2317                         xdp.data_meta = xdp.data;
2318                         xdp.data_hard_start = xdp.data -
2319                                               ixgbe_rx_offset(rx_ring);
2320                         xdp.data_end = xdp.data + size;
2321
2322                         skb = ixgbe_run_xdp(adapter, rx_ring, &xdp);
2323                 }
2324
2325                 if (IS_ERR(skb)) {
2326                         unsigned int xdp_res = -PTR_ERR(skb);
2327
2328                         if (xdp_res & (IXGBE_XDP_TX | IXGBE_XDP_REDIR)) {
2329                                 xdp_xmit |= xdp_res;
2330                                 ixgbe_rx_buffer_flip(rx_ring, rx_buffer, size);
2331                         } else {
2332                                 rx_buffer->pagecnt_bias++;
2333                         }
2334                         total_rx_packets++;
2335                         total_rx_bytes += size;
2336                 } else if (skb) {
2337                         ixgbe_add_rx_frag(rx_ring, rx_buffer, skb, size);
2338                 } else if (ring_uses_build_skb(rx_ring)) {
2339                         skb = ixgbe_build_skb(rx_ring, rx_buffer,
2340                                               &xdp, rx_desc);
2341                 } else {
2342                         skb = ixgbe_construct_skb(rx_ring, rx_buffer,
2343                                                   &xdp, rx_desc);
2344                 }
2345
2346                 /* exit if we failed to retrieve a buffer */
2347                 if (!skb) {
2348                         rx_ring->rx_stats.alloc_rx_buff_failed++;
2349                         rx_buffer->pagecnt_bias++;
2350                         break;
2351                 }
2352
2353                 ixgbe_put_rx_buffer(rx_ring, rx_buffer, skb);
2354                 cleaned_count++;
2355
2356                 /* place incomplete frames back on ring for completion */
2357                 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2358                         continue;
2359
2360                 /* verify the packet layout is correct */
2361                 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2362                         continue;
2363
2364                 /* probably a little skewed due to removing CRC */
2365                 total_rx_bytes += skb->len;
2366
2367                 /* populate checksum, timestamp, VLAN, and protocol */
2368                 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2369
2370 #ifdef IXGBE_FCOE
2371                 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2372                 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2373                         ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2374                         /* include DDPed FCoE data */
2375                         if (ddp_bytes > 0) {
2376                                 if (!mss) {
2377                                         mss = rx_ring->netdev->mtu -
2378                                                 sizeof(struct fcoe_hdr) -
2379                                                 sizeof(struct fc_frame_header) -
2380                                                 sizeof(struct fcoe_crc_eof);
2381                                         if (mss > 512)
2382                                                 mss &= ~511;
2383                                 }
2384                                 total_rx_bytes += ddp_bytes;
2385                                 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2386                                                                  mss);
2387                         }
2388                         if (!ddp_bytes) {
2389                                 dev_kfree_skb_any(skb);
2390                                 continue;
2391                         }
2392                 }
2393
2394 #endif /* IXGBE_FCOE */
2395                 ixgbe_rx_skb(q_vector, skb);
2396
2397                 /* update budget accounting */
2398                 total_rx_packets++;
2399         }
2400
2401         if (xdp_xmit & IXGBE_XDP_REDIR)
2402                 xdp_do_flush_map();
2403
2404         if (xdp_xmit & IXGBE_XDP_TX) {
2405                 struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
2406
2407                 /* Force memory writes to complete before letting h/w
2408                  * know there are new descriptors to fetch.
2409                  */
2410                 wmb();
2411                 writel(ring->next_to_use, ring->tail);
2412         }
2413
2414         u64_stats_update_begin(&rx_ring->syncp);
2415         rx_ring->stats.packets += total_rx_packets;
2416         rx_ring->stats.bytes += total_rx_bytes;
2417         u64_stats_update_end(&rx_ring->syncp);
2418         q_vector->rx.total_packets += total_rx_packets;
2419         q_vector->rx.total_bytes += total_rx_bytes;
2420
2421         return total_rx_packets;
2422 }
2423
2424 /**
2425  * ixgbe_configure_msix - Configure MSI-X hardware
2426  * @adapter: board private structure
2427  *
2428  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2429  * interrupts.
2430  **/
2431 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2432 {
2433         struct ixgbe_q_vector *q_vector;
2434         int v_idx;
2435         u32 mask;
2436
2437         /* Populate MSIX to EITR Select */
2438         if (adapter->num_vfs > 32) {
2439                 u32 eitrsel = BIT(adapter->num_vfs - 32) - 1;
2440                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2441         }
2442
2443         /*
2444          * Populate the IVAR table and set the ITR values to the
2445          * corresponding register.
2446          */
2447         for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2448                 struct ixgbe_ring *ring;
2449                 q_vector = adapter->q_vector[v_idx];
2450
2451                 ixgbe_for_each_ring(ring, q_vector->rx)
2452                         ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2453
2454                 ixgbe_for_each_ring(ring, q_vector->tx)
2455                         ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2456
2457                 ixgbe_write_eitr(q_vector);
2458         }
2459
2460         switch (adapter->hw.mac.type) {
2461         case ixgbe_mac_82598EB:
2462                 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2463                                v_idx);
2464                 break;
2465         case ixgbe_mac_82599EB:
2466         case ixgbe_mac_X540:
2467         case ixgbe_mac_X550:
2468         case ixgbe_mac_X550EM_x:
2469         case ixgbe_mac_x550em_a:
2470                 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2471                 break;
2472         default:
2473                 break;
2474         }
2475         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2476
2477         /* set up to autoclear timer, and the vectors */
2478         mask = IXGBE_EIMS_ENABLE_MASK;
2479         mask &= ~(IXGBE_EIMS_OTHER |
2480                   IXGBE_EIMS_MAILBOX |
2481                   IXGBE_EIMS_LSC);
2482
2483         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2484 }
2485
2486 /**
2487  * ixgbe_update_itr - update the dynamic ITR value based on statistics
2488  * @q_vector: structure containing interrupt and ring information
2489  * @ring_container: structure containing ring performance data
2490  *
2491  *      Stores a new ITR value based on packets and byte
2492  *      counts during the last interrupt.  The advantage of per interrupt
2493  *      computation is faster updates and more accurate ITR for the current
2494  *      traffic pattern.  Constants in this function were computed
2495  *      based on theoretical maximum wire speed and thresholds were set based
2496  *      on testing data as well as attempting to minimize response time
2497  *      while increasing bulk throughput.
2498  **/
2499 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2500                              struct ixgbe_ring_container *ring_container)
2501 {
2502         unsigned int itr = IXGBE_ITR_ADAPTIVE_MIN_USECS |
2503                            IXGBE_ITR_ADAPTIVE_LATENCY;
2504         unsigned int avg_wire_size, packets, bytes;
2505         unsigned long next_update = jiffies;
2506
2507         /* If we don't have any rings just leave ourselves set for maximum
2508          * possible latency so we take ourselves out of the equation.
2509          */
2510         if (!ring_container->ring)
2511                 return;
2512
2513         /* If we didn't update within up to 1 - 2 jiffies we can assume
2514          * that either packets are coming in so slow there hasn't been
2515          * any work, or that there is so much work that NAPI is dealing
2516          * with interrupt moderation and we don't need to do anything.
2517          */
2518         if (time_after(next_update, ring_container->next_update))
2519                 goto clear_counts;
2520
2521         packets = ring_container->total_packets;
2522
2523         /* We have no packets to actually measure against. This means
2524          * either one of the other queues on this vector is active or
2525          * we are a Tx queue doing TSO with too high of an interrupt rate.
2526          *
2527          * When this occurs just tick up our delay by the minimum value
2528          * and hope that this extra delay will prevent us from being called
2529          * without any work on our queue.
2530          */
2531         if (!packets) {
2532                 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;
2533                 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)
2534                         itr = IXGBE_ITR_ADAPTIVE_MAX_USECS;
2535                 itr += ring_container->itr & IXGBE_ITR_ADAPTIVE_LATENCY;
2536                 goto clear_counts;
2537         }
2538
2539         bytes = ring_container->total_bytes;
2540
2541         /* If packets are less than 4 or bytes are less than 9000 assume
2542          * insufficient data to use bulk rate limiting approach. We are
2543          * likely latency driven.
2544          */
2545         if (packets < 4 && bytes < 9000) {
2546                 itr = IXGBE_ITR_ADAPTIVE_LATENCY;
2547                 goto adjust_by_size;
2548         }
2549
2550         /* Between 4 and 48 we can assume that our current interrupt delay
2551          * is only slightly too low. As such we should increase it by a small
2552          * fixed amount.
2553          */
2554         if (packets < 48) {
2555                 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;
2556                 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)
2557                         itr = IXGBE_ITR_ADAPTIVE_MAX_USECS;
2558                 goto clear_counts;
2559         }
2560
2561         /* Between 48 and 96 is our "goldilocks" zone where we are working
2562          * out "just right". Just report that our current ITR is good for us.
2563          */
2564         if (packets < 96) {
2565                 itr = q_vector->itr >> 2;
2566                 goto clear_counts;
2567         }
2568
2569         /* If packet count is 96 or greater we are likely looking at a slight
2570          * overrun of the delay we want. Try halving our delay to see if that
2571          * will cut the number of packets in half per interrupt.
2572          */
2573         if (packets < 256) {
2574                 itr = q_vector->itr >> 3;
2575                 if (itr < IXGBE_ITR_ADAPTIVE_MIN_USECS)
2576                         itr = IXGBE_ITR_ADAPTIVE_MIN_USECS;
2577                 goto clear_counts;
2578         }
2579
2580         /* The paths below assume we are dealing with a bulk ITR since number
2581          * of packets is 256 or greater. We are just going to have to compute
2582          * a value and try to bring the count under control, though for smaller
2583          * packet sizes there isn't much we can do as NAPI polling will likely
2584          * be kicking in sooner rather than later.
2585          */
2586         itr = IXGBE_ITR_ADAPTIVE_BULK;
2587
2588 adjust_by_size:
2589         /* If packet counts are 256 or greater we can assume we have a gross
2590          * overestimation of what the rate should be. Instead of trying to fine
2591          * tune it just use the formula below to try and dial in an exact value
2592          * give the current packet size of the frame.
2593          */
2594         avg_wire_size = bytes / packets;
2595
2596         /* The following is a crude approximation of:
2597          *  wmem_default / (size + overhead) = desired_pkts_per_int
2598          *  rate / bits_per_byte / (size + ethernet overhead) = pkt_rate
2599          *  (desired_pkt_rate / pkt_rate) * usecs_per_sec = ITR value
2600          *
2601          * Assuming wmem_default is 212992 and overhead is 640 bytes per
2602          * packet, (256 skb, 64 headroom, 320 shared info), we can reduce the
2603          * formula down to
2604          *
2605          *  (170 * (size + 24)) / (size + 640) = ITR
2606          *
2607          * We first do some math on the packet size and then finally bitshift
2608          * by 8 after rounding up. We also have to account for PCIe link speed
2609          * difference as ITR scales based on this.
2610          */
2611         if (avg_wire_size <= 60) {
2612                 /* Start at 50k ints/sec */
2613                 avg_wire_size = 5120;
2614         } else if (avg_wire_size <= 316) {
2615                 /* 50K ints/sec to 16K ints/sec */
2616                 avg_wire_size *= 40;
2617                 avg_wire_size += 2720;
2618         } else if (avg_wire_size <= 1084) {
2619                 /* 16K ints/sec to 9.2K ints/sec */
2620                 avg_wire_size *= 15;
2621                 avg_wire_size += 11452;
2622         } else if (avg_wire_size <= 1980) {
2623                 /* 9.2K ints/sec to 8K ints/sec */
2624                 avg_wire_size *= 5;
2625                 avg_wire_size += 22420;
2626         } else {
2627                 /* plateau at a limit of 8K ints/sec */
2628                 avg_wire_size = 32256;
2629         }
2630
2631         /* If we are in low latency mode half our delay which doubles the rate
2632          * to somewhere between 100K to 16K ints/sec
2633          */
2634         if (itr & IXGBE_ITR_ADAPTIVE_LATENCY)
2635                 avg_wire_size >>= 1;
2636
2637         /* Resultant value is 256 times larger than it needs to be. This
2638          * gives us room to adjust the value as needed to either increase
2639          * or decrease the value based on link speeds of 10G, 2.5G, 1G, etc.
2640          *
2641          * Use addition as we have already recorded the new latency flag
2642          * for the ITR value.
2643          */
2644         switch (q_vector->adapter->link_speed) {
2645         case IXGBE_LINK_SPEED_10GB_FULL:
2646         case IXGBE_LINK_SPEED_100_FULL:
2647         default:
2648                 itr += DIV_ROUND_UP(avg_wire_size,
2649                                     IXGBE_ITR_ADAPTIVE_MIN_INC * 256) *
2650                        IXGBE_ITR_ADAPTIVE_MIN_INC;
2651                 break;
2652         case IXGBE_LINK_SPEED_2_5GB_FULL:
2653         case IXGBE_LINK_SPEED_1GB_FULL:
2654         case IXGBE_LINK_SPEED_10_FULL:
2655                 itr += DIV_ROUND_UP(avg_wire_size,
2656                                     IXGBE_ITR_ADAPTIVE_MIN_INC * 64) *
2657                        IXGBE_ITR_ADAPTIVE_MIN_INC;
2658                 break;
2659         }
2660
2661 clear_counts:
2662         /* write back value */
2663         ring_container->itr = itr;
2664
2665         /* next update should occur within next jiffy */
2666         ring_container->next_update = next_update + 1;
2667
2668         ring_container->total_bytes = 0;
2669         ring_container->total_packets = 0;
2670 }
2671
2672 /**
2673  * ixgbe_write_eitr - write EITR register in hardware specific way
2674  * @q_vector: structure containing interrupt and ring information
2675  *
2676  * This function is made to be called by ethtool and by the driver
2677  * when it needs to update EITR registers at runtime.  Hardware
2678  * specific quirks/differences are taken care of here.
2679  */
2680 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2681 {
2682         struct ixgbe_adapter *adapter = q_vector->adapter;
2683         struct ixgbe_hw *hw = &adapter->hw;
2684         int v_idx = q_vector->v_idx;
2685         u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2686
2687         switch (adapter->hw.mac.type) {
2688         case ixgbe_mac_82598EB:
2689                 /* must write high and low 16 bits to reset counter */
2690                 itr_reg |= (itr_reg << 16);
2691                 break;
2692         case ixgbe_mac_82599EB:
2693         case ixgbe_mac_X540:
2694         case ixgbe_mac_X550:
2695         case ixgbe_mac_X550EM_x:
2696         case ixgbe_mac_x550em_a:
2697                 /*
2698                  * set the WDIS bit to not clear the timer bits and cause an
2699                  * immediate assertion of the interrupt
2700                  */
2701                 itr_reg |= IXGBE_EITR_CNT_WDIS;
2702                 break;
2703         default:
2704                 break;
2705         }
2706         IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2707 }
2708
2709 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2710 {
2711         u32 new_itr;
2712
2713         ixgbe_update_itr(q_vector, &q_vector->tx);
2714         ixgbe_update_itr(q_vector, &q_vector->rx);
2715
2716         /* use the smallest value of new ITR delay calculations */
2717         new_itr = min(q_vector->rx.itr, q_vector->tx.itr);
2718
2719         /* Clear latency flag if set, shift into correct position */
2720         new_itr &= ~IXGBE_ITR_ADAPTIVE_LATENCY;
2721         new_itr <<= 2;
2722
2723         if (new_itr != q_vector->itr) {
2724                 /* save the algorithm value here */
2725                 q_vector->itr = new_itr;
2726
2727                 ixgbe_write_eitr(q_vector);
2728         }
2729 }
2730
2731 /**
2732  * ixgbe_check_overtemp_subtask - check for over temperature
2733  * @adapter: pointer to adapter
2734  **/
2735 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2736 {
2737         struct ixgbe_hw *hw = &adapter->hw;
2738         u32 eicr = adapter->interrupt_event;
2739         s32 rc;
2740
2741         if (test_bit(__IXGBE_DOWN, &adapter->state))
2742                 return;
2743
2744         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2745                 return;
2746
2747         adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2748
2749         switch (hw->device_id) {
2750         case IXGBE_DEV_ID_82599_T3_LOM:
2751                 /*
2752                  * Since the warning interrupt is for both ports
2753                  * we don't have to check if:
2754                  *  - This interrupt wasn't for our port.
2755                  *  - We may have missed the interrupt so always have to
2756                  *    check if we  got a LSC
2757                  */
2758                 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2759                     !(eicr & IXGBE_EICR_LSC))
2760                         return;
2761
2762                 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2763                         u32 speed;
2764                         bool link_up = false;
2765
2766                         hw->mac.ops.check_link(hw, &speed, &link_up, false);
2767
2768                         if (link_up)
2769                                 return;
2770                 }
2771
2772                 /* Check if this is not due to overtemp */
2773                 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2774                         return;
2775
2776                 break;
2777         case IXGBE_DEV_ID_X550EM_A_1G_T:
2778         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
2779                 rc = hw->phy.ops.check_overtemp(hw);
2780                 if (rc != IXGBE_ERR_OVERTEMP)
2781                         return;
2782                 break;
2783         default:
2784                 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2785                         return;
2786                 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2787                         return;
2788                 break;
2789         }
2790         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2791
2792         adapter->interrupt_event = 0;
2793 }
2794
2795 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2796 {
2797         struct ixgbe_hw *hw = &adapter->hw;
2798
2799         if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2800             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2801                 e_crit(probe, "Fan has stopped, replace the adapter\n");
2802                 /* write to clear the interrupt */
2803                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2804         }
2805 }
2806
2807 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2808 {
2809         struct ixgbe_hw *hw = &adapter->hw;
2810
2811         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2812                 return;
2813
2814         switch (adapter->hw.mac.type) {
2815         case ixgbe_mac_82599EB:
2816                 /*
2817                  * Need to check link state so complete overtemp check
2818                  * on service task
2819                  */
2820                 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2821                      (eicr & IXGBE_EICR_LSC)) &&
2822                     (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2823                         adapter->interrupt_event = eicr;
2824                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2825                         ixgbe_service_event_schedule(adapter);
2826                         return;
2827                 }
2828                 return;
2829         case ixgbe_mac_x550em_a:
2830                 if (eicr & IXGBE_EICR_GPI_SDP0_X550EM_a) {
2831                         adapter->interrupt_event = eicr;
2832                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2833                         ixgbe_service_event_schedule(adapter);
2834                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
2835                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2836                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICR,
2837                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2838                 }
2839                 return;
2840         case ixgbe_mac_X550:
2841         case ixgbe_mac_X540:
2842                 if (!(eicr & IXGBE_EICR_TS))
2843                         return;
2844                 break;
2845         default:
2846                 return;
2847         }
2848
2849         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2850 }
2851
2852 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2853 {
2854         switch (hw->mac.type) {
2855         case ixgbe_mac_82598EB:
2856                 if (hw->phy.type == ixgbe_phy_nl)
2857                         return true;
2858                 return false;
2859         case ixgbe_mac_82599EB:
2860         case ixgbe_mac_X550EM_x:
2861         case ixgbe_mac_x550em_a:
2862                 switch (hw->mac.ops.get_media_type(hw)) {
2863                 case ixgbe_media_type_fiber:
2864                 case ixgbe_media_type_fiber_qsfp:
2865                         return true;
2866                 default:
2867                         return false;
2868                 }
2869         default:
2870                 return false;
2871         }
2872 }
2873
2874 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2875 {
2876         struct ixgbe_hw *hw = &adapter->hw;
2877         u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw);
2878
2879         if (!ixgbe_is_sfp(hw))
2880                 return;
2881
2882         /* Later MAC's use different SDP */
2883         if (hw->mac.type >= ixgbe_mac_X540)
2884                 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2885
2886         if (eicr & eicr_mask) {
2887                 /* Clear the interrupt */
2888                 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2889                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2890                         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2891                         adapter->sfp_poll_time = 0;
2892                         ixgbe_service_event_schedule(adapter);
2893                 }
2894         }
2895
2896         if (adapter->hw.mac.type == ixgbe_mac_82599EB &&
2897             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2898                 /* Clear the interrupt */
2899                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2900                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2901                         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2902                         ixgbe_service_event_schedule(adapter);
2903                 }
2904         }
2905 }
2906
2907 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2908 {
2909         struct ixgbe_hw *hw = &adapter->hw;
2910
2911         adapter->lsc_int++;
2912         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2913         adapter->link_check_timeout = jiffies;
2914         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2915                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2916                 IXGBE_WRITE_FLUSH(hw);
2917                 ixgbe_service_event_schedule(adapter);
2918         }
2919 }
2920
2921 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2922                                            u64 qmask)
2923 {
2924         u32 mask;
2925         struct ixgbe_hw *hw = &adapter->hw;
2926
2927         switch (hw->mac.type) {
2928         case ixgbe_mac_82598EB:
2929                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2930                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2931                 break;
2932         case ixgbe_mac_82599EB:
2933         case ixgbe_mac_X540:
2934         case ixgbe_mac_X550:
2935         case ixgbe_mac_X550EM_x:
2936         case ixgbe_mac_x550em_a:
2937                 mask = (qmask & 0xFFFFFFFF);
2938                 if (mask)
2939                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2940                 mask = (qmask >> 32);
2941                 if (mask)
2942                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2943                 break;
2944         default:
2945                 break;
2946         }
2947         /* skip the flush */
2948 }
2949
2950 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2951                                             u64 qmask)
2952 {
2953         u32 mask;
2954         struct ixgbe_hw *hw = &adapter->hw;
2955
2956         switch (hw->mac.type) {
2957         case ixgbe_mac_82598EB:
2958                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2959                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2960                 break;
2961         case ixgbe_mac_82599EB:
2962         case ixgbe_mac_X540:
2963         case ixgbe_mac_X550:
2964         case ixgbe_mac_X550EM_x:
2965         case ixgbe_mac_x550em_a:
2966                 mask = (qmask & 0xFFFFFFFF);
2967                 if (mask)
2968                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2969                 mask = (qmask >> 32);
2970                 if (mask)
2971                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2972                 break;
2973         default:
2974                 break;
2975         }
2976         /* skip the flush */
2977 }
2978
2979 /**
2980  * ixgbe_irq_enable - Enable default interrupt generation settings
2981  * @adapter: board private structure
2982  * @queues: enable irqs for queues
2983  * @flush: flush register write
2984  **/
2985 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2986                                     bool flush)
2987 {
2988         struct ixgbe_hw *hw = &adapter->hw;
2989         u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2990
2991         /* don't reenable LSC while waiting for link */
2992         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2993                 mask &= ~IXGBE_EIMS_LSC;
2994
2995         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2996                 switch (adapter->hw.mac.type) {
2997                 case ixgbe_mac_82599EB:
2998                         mask |= IXGBE_EIMS_GPI_SDP0(hw);
2999                         break;
3000                 case ixgbe_mac_X540:
3001                 case ixgbe_mac_X550:
3002                 case ixgbe_mac_X550EM_x:
3003                 case ixgbe_mac_x550em_a:
3004                         mask |= IXGBE_EIMS_TS;
3005                         break;
3006                 default:
3007                         break;
3008                 }
3009         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
3010                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
3011         switch (adapter->hw.mac.type) {
3012         case ixgbe_mac_82599EB:
3013                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
3014                 mask |= IXGBE_EIMS_GPI_SDP2(hw);
3015                 /* fall through */
3016         case ixgbe_mac_X540:
3017         case ixgbe_mac_X550:
3018         case ixgbe_mac_X550EM_x:
3019         case ixgbe_mac_x550em_a:
3020                 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP ||
3021                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP ||
3022                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP_N)
3023                         mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw);
3024                 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
3025                         mask |= IXGBE_EICR_GPI_SDP0_X540;
3026                 mask |= IXGBE_EIMS_ECC;
3027                 mask |= IXGBE_EIMS_MAILBOX;
3028                 break;
3029         default:
3030                 break;
3031         }
3032
3033         if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
3034             !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
3035                 mask |= IXGBE_EIMS_FLOW_DIR;
3036
3037         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
3038         if (queues)
3039                 ixgbe_irq_enable_queues(adapter, ~0);
3040         if (flush)
3041                 IXGBE_WRITE_FLUSH(&adapter->hw);
3042 }
3043
3044 static irqreturn_t ixgbe_msix_other(int irq, void *data)
3045 {
3046         struct ixgbe_adapter *adapter = data;
3047         struct ixgbe_hw *hw = &adapter->hw;
3048         u32 eicr;
3049
3050         /*
3051          * Workaround for Silicon errata.  Use clear-by-write instead
3052          * of clear-by-read.  Reading with EICS will return the
3053          * interrupt causes without clearing, which later be done
3054          * with the write to EICR.
3055          */
3056         eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
3057
3058         /* The lower 16bits of the EICR register are for the queue interrupts
3059          * which should be masked here in order to not accidentally clear them if
3060          * the bits are high when ixgbe_msix_other is called. There is a race
3061          * condition otherwise which results in possible performance loss
3062          * especially if the ixgbe_msix_other interrupt is triggering
3063          * consistently (as it would when PPS is turned on for the X540 device)
3064          */
3065         eicr &= 0xFFFF0000;
3066
3067         IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
3068
3069         if (eicr & IXGBE_EICR_LSC)
3070                 ixgbe_check_lsc(adapter);
3071
3072         if (eicr & IXGBE_EICR_MAILBOX)
3073                 ixgbe_msg_task(adapter);
3074
3075         switch (hw->mac.type) {
3076         case ixgbe_mac_82599EB:
3077         case ixgbe_mac_X540:
3078         case ixgbe_mac_X550:
3079         case ixgbe_mac_X550EM_x:
3080         case ixgbe_mac_x550em_a:
3081                 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
3082                     (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
3083                         adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
3084                         ixgbe_service_event_schedule(adapter);
3085                         IXGBE_WRITE_REG(hw, IXGBE_EICR,
3086                                         IXGBE_EICR_GPI_SDP0_X540);
3087                 }
3088                 if (eicr & IXGBE_EICR_ECC) {
3089                         e_info(link, "Received ECC Err, initiating reset\n");
3090                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3091                         ixgbe_service_event_schedule(adapter);
3092                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3093                 }
3094                 /* Handle Flow Director Full threshold interrupt */
3095                 if (eicr & IXGBE_EICR_FLOW_DIR) {
3096                         int reinit_count = 0;
3097                         int i;
3098                         for (i = 0; i < adapter->num_tx_queues; i++) {
3099                                 struct ixgbe_ring *ring = adapter->tx_ring[i];
3100                                 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
3101                                                        &ring->state))
3102                                         reinit_count++;
3103                         }
3104                         if (reinit_count) {
3105                                 /* no more flow director interrupts until after init */
3106                                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
3107                                 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
3108                                 ixgbe_service_event_schedule(adapter);
3109                         }
3110                 }
3111                 ixgbe_check_sfp_event(adapter, eicr);
3112                 ixgbe_check_overtemp_event(adapter, eicr);
3113                 break;
3114         default:
3115                 break;
3116         }
3117
3118         ixgbe_check_fan_failure(adapter, eicr);
3119
3120         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3121                 ixgbe_ptp_check_pps_event(adapter);
3122
3123         /* re-enable the original interrupt state, no lsc, no queues */
3124         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3125                 ixgbe_irq_enable(adapter, false, false);
3126
3127         return IRQ_HANDLED;
3128 }
3129
3130 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
3131 {
3132         struct ixgbe_q_vector *q_vector = data;
3133
3134         /* EIAM disabled interrupts (on this vector) for us */
3135
3136         if (q_vector->rx.ring || q_vector->tx.ring)
3137                 napi_schedule_irqoff(&q_vector->napi);
3138
3139         return IRQ_HANDLED;
3140 }
3141
3142 /**
3143  * ixgbe_poll - NAPI Rx polling callback
3144  * @napi: structure for representing this polling device
3145  * @budget: how many packets driver is allowed to clean
3146  *
3147  * This function is used for legacy and MSI, NAPI mode
3148  **/
3149 int ixgbe_poll(struct napi_struct *napi, int budget)
3150 {
3151         struct ixgbe_q_vector *q_vector =
3152                                 container_of(napi, struct ixgbe_q_vector, napi);
3153         struct ixgbe_adapter *adapter = q_vector->adapter;
3154         struct ixgbe_ring *ring;
3155         int per_ring_budget, work_done = 0;
3156         bool clean_complete = true;
3157
3158 #ifdef CONFIG_IXGBE_DCA
3159         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
3160                 ixgbe_update_dca(q_vector);
3161 #endif
3162
3163         ixgbe_for_each_ring(ring, q_vector->tx) {
3164                 bool wd = ring->xsk_umem ?
3165                           ixgbe_clean_xdp_tx_irq(q_vector, ring, budget) :
3166                           ixgbe_clean_tx_irq(q_vector, ring, budget);
3167
3168                 if (!wd)
3169                         clean_complete = false;
3170         }
3171
3172         /* Exit if we are called by netpoll */
3173         if (budget <= 0)
3174                 return budget;
3175
3176         /* attempt to distribute budget to each queue fairly, but don't allow
3177          * the budget to go below 1 because we'll exit polling */
3178         if (q_vector->rx.count > 1)
3179                 per_ring_budget = max(budget/q_vector->rx.count, 1);
3180         else
3181                 per_ring_budget = budget;
3182
3183         ixgbe_for_each_ring(ring, q_vector->rx) {
3184                 int cleaned = ring->xsk_umem ?
3185                               ixgbe_clean_rx_irq_zc(q_vector, ring,
3186                                                     per_ring_budget) :
3187                               ixgbe_clean_rx_irq(q_vector, ring,
3188                                                  per_ring_budget);
3189
3190                 work_done += cleaned;
3191                 if (cleaned >= per_ring_budget)
3192                         clean_complete = false;
3193         }
3194
3195         /* If all work not completed, return budget and keep polling */
3196         if (!clean_complete)
3197                 return budget;
3198
3199         /* all work done, exit the polling mode */
3200         if (likely(napi_complete_done(napi, work_done))) {
3201                 if (adapter->rx_itr_setting & 1)
3202                         ixgbe_set_itr(q_vector);
3203                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3204                         ixgbe_irq_enable_queues(adapter,
3205                                                 BIT_ULL(q_vector->v_idx));
3206         }
3207
3208         return min(work_done, budget - 1);
3209 }
3210
3211 /**
3212  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
3213  * @adapter: board private structure
3214  *
3215  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
3216  * interrupts from the kernel.
3217  **/
3218 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
3219 {
3220         struct net_device *netdev = adapter->netdev;
3221         unsigned int ri = 0, ti = 0;
3222         int vector, err;
3223
3224         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3225                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3226                 struct msix_entry *entry = &adapter->msix_entries[vector];
3227
3228                 if (q_vector->tx.ring && q_vector->rx.ring) {
3229                         snprintf(q_vector->name, sizeof(q_vector->name),
3230                                  "%s-TxRx-%u", netdev->name, ri++);
3231                         ti++;
3232                 } else if (q_vector->rx.ring) {
3233                         snprintf(q_vector->name, sizeof(q_vector->name),
3234                                  "%s-rx-%u", netdev->name, ri++);
3235                 } else if (q_vector->tx.ring) {
3236                         snprintf(q_vector->name, sizeof(q_vector->name),
3237                                  "%s-tx-%u", netdev->name, ti++);
3238                 } else {
3239                         /* skip this unused q_vector */
3240                         continue;
3241                 }
3242                 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
3243                                   q_vector->name, q_vector);
3244                 if (err) {
3245                         e_err(probe, "request_irq failed for MSIX interrupt "
3246                               "Error: %d\n", err);
3247                         goto free_queue_irqs;
3248                 }
3249                 /* If Flow Director is enabled, set interrupt affinity */
3250                 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3251                         /* assign the mask for this irq */
3252                         irq_set_affinity_hint(entry->vector,
3253                                               &q_vector->affinity_mask);
3254                 }
3255         }
3256
3257         err = request_irq(adapter->msix_entries[vector].vector,
3258                           ixgbe_msix_other, 0, netdev->name, adapter);
3259         if (err) {
3260                 e_err(probe, "request_irq for msix_other failed: %d\n", err);
3261                 goto free_queue_irqs;
3262         }
3263
3264         return 0;
3265
3266 free_queue_irqs:
3267         while (vector) {
3268                 vector--;
3269                 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
3270                                       NULL);
3271                 free_irq(adapter->msix_entries[vector].vector,
3272                          adapter->q_vector[vector]);
3273         }
3274         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
3275         pci_disable_msix(adapter->pdev);
3276         kfree(adapter->msix_entries);
3277         adapter->msix_entries = NULL;
3278         return err;
3279 }
3280
3281 /**
3282  * ixgbe_intr - legacy mode Interrupt Handler
3283  * @irq: interrupt number
3284  * @data: pointer to a network interface device structure
3285  **/
3286 static irqreturn_t ixgbe_intr(int irq, void *data)
3287 {
3288         struct ixgbe_adapter *adapter = data;
3289         struct ixgbe_hw *hw = &adapter->hw;
3290         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3291         u32 eicr;
3292
3293         /*
3294          * Workaround for silicon errata #26 on 82598.  Mask the interrupt
3295          * before the read of EICR.
3296          */
3297         IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
3298
3299         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
3300          * therefore no explicit interrupt disable is necessary */
3301         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
3302         if (!eicr) {
3303                 /*
3304                  * shared interrupt alert!
3305                  * make sure interrupts are enabled because the read will
3306                  * have disabled interrupts due to EIAM
3307                  * finish the workaround of silicon errata on 82598.  Unmask
3308                  * the interrupt that we masked before the EICR read.
3309                  */
3310                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3311                         ixgbe_irq_enable(adapter, true, true);
3312                 return IRQ_NONE;        /* Not our interrupt */
3313         }
3314
3315         if (eicr & IXGBE_EICR_LSC)
3316                 ixgbe_check_lsc(adapter);
3317
3318         switch (hw->mac.type) {
3319         case ixgbe_mac_82599EB:
3320                 ixgbe_check_sfp_event(adapter, eicr);
3321                 /* Fall through */
3322         case ixgbe_mac_X540:
3323         case ixgbe_mac_X550:
3324         case ixgbe_mac_X550EM_x:
3325         case ixgbe_mac_x550em_a:
3326                 if (eicr & IXGBE_EICR_ECC) {
3327                         e_info(link, "Received ECC Err, initiating reset\n");
3328                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3329                         ixgbe_service_event_schedule(adapter);
3330                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3331                 }
3332                 ixgbe_check_overtemp_event(adapter, eicr);
3333                 break;
3334         default:
3335                 break;
3336         }
3337
3338         ixgbe_check_fan_failure(adapter, eicr);
3339         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3340                 ixgbe_ptp_check_pps_event(adapter);
3341
3342         /* would disable interrupts here but EIAM disabled it */
3343         napi_schedule_irqoff(&q_vector->napi);
3344
3345         /*
3346          * re-enable link(maybe) and non-queue interrupts, no flush.
3347          * ixgbe_poll will re-enable the queue interrupts
3348          */
3349         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3350                 ixgbe_irq_enable(adapter, false, false);
3351
3352         return IRQ_HANDLED;
3353 }
3354
3355 /**
3356  * ixgbe_request_irq - initialize interrupts
3357  * @adapter: board private structure
3358  *
3359  * Attempts to configure interrupts using the best available
3360  * capabilities of the hardware and kernel.
3361  **/
3362 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
3363 {
3364         struct net_device *netdev = adapter->netdev;
3365         int err;
3366
3367         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
3368                 err = ixgbe_request_msix_irqs(adapter);
3369         else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
3370                 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
3371                                   netdev->name, adapter);
3372         else
3373                 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
3374                                   netdev->name, adapter);
3375
3376         if (err)
3377                 e_err(probe, "request_irq failed, Error %d\n", err);
3378
3379         return err;
3380 }
3381
3382 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
3383 {
3384         int vector;
3385
3386         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
3387                 free_irq(adapter->pdev->irq, adapter);
3388                 return;
3389         }
3390
3391         if (!adapter->msix_entries)
3392                 return;
3393
3394         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3395                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3396                 struct msix_entry *entry = &adapter->msix_entries[vector];
3397
3398                 /* free only the irqs that were actually requested */
3399                 if (!q_vector->rx.ring && !q_vector->tx.ring)
3400                         continue;
3401
3402                 /* clear the affinity_mask in the IRQ descriptor */
3403                 irq_set_affinity_hint(entry->vector, NULL);
3404
3405                 free_irq(entry->vector, q_vector);
3406         }
3407
3408         free_irq(adapter->msix_entries[vector].vector, adapter);
3409 }
3410
3411 /**
3412  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3413  * @adapter: board private structure
3414  **/
3415 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3416 {
3417         switch (adapter->hw.mac.type) {
3418         case ixgbe_mac_82598EB:
3419                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3420                 break;
3421         case ixgbe_mac_82599EB:
3422         case ixgbe_mac_X540:
3423         case ixgbe_mac_X550:
3424         case ixgbe_mac_X550EM_x:
3425         case ixgbe_mac_x550em_a:
3426                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3427                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3428                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3429                 break;
3430         default:
3431                 break;
3432         }
3433         IXGBE_WRITE_FLUSH(&adapter->hw);
3434         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3435                 int vector;
3436
3437                 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3438                         synchronize_irq(adapter->msix_entries[vector].vector);
3439
3440                 synchronize_irq(adapter->msix_entries[vector++].vector);
3441         } else {
3442                 synchronize_irq(adapter->pdev->irq);
3443         }
3444 }
3445
3446 /**
3447  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3448  * @adapter: board private structure
3449  *
3450  **/
3451 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3452 {
3453         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3454
3455         ixgbe_write_eitr(q_vector);
3456
3457         ixgbe_set_ivar(adapter, 0, 0, 0);
3458         ixgbe_set_ivar(adapter, 1, 0, 0);
3459
3460         e_info(hw, "Legacy interrupt IVAR setup done\n");
3461 }
3462
3463 /**
3464  * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3465  * @adapter: board private structure
3466  * @ring: structure containing ring specific data
3467  *
3468  * Configure the Tx descriptor ring after a reset.
3469  **/
3470 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3471                              struct ixgbe_ring *ring)
3472 {
3473         struct ixgbe_hw *hw = &adapter->hw;
3474         u64 tdba = ring->dma;
3475         int wait_loop = 10;
3476         u32 txdctl = IXGBE_TXDCTL_ENABLE;
3477         u8 reg_idx = ring->reg_idx;
3478
3479         ring->xsk_umem = NULL;
3480         if (ring_is_xdp(ring))
3481                 ring->xsk_umem = ixgbe_xsk_umem(adapter, ring);
3482
3483         /* disable queue to avoid issues while updating state */
3484         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3485         IXGBE_WRITE_FLUSH(hw);
3486
3487         IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3488                         (tdba & DMA_BIT_MASK(32)));
3489         IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3490         IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3491                         ring->count * sizeof(union ixgbe_adv_tx_desc));
3492         IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3493         IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3494         ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3495
3496         /*
3497          * set WTHRESH to encourage burst writeback, it should not be set
3498          * higher than 1 when:
3499          * - ITR is 0 as it could cause false TX hangs
3500          * - ITR is set to > 100k int/sec and BQL is enabled
3501          *
3502          * In order to avoid issues WTHRESH + PTHRESH should always be equal
3503          * to or less than the number of on chip descriptors, which is
3504          * currently 40.
3505          */
3506         if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3507                 txdctl |= 1u << 16;     /* WTHRESH = 1 */
3508         else
3509                 txdctl |= 8u << 16;     /* WTHRESH = 8 */
3510
3511         /*
3512          * Setting PTHRESH to 32 both improves performance
3513          * and avoids a TX hang with DFP enabled
3514          */
3515         txdctl |= (1u << 8) |   /* HTHRESH = 1 */
3516                    32;          /* PTHRESH = 32 */
3517
3518         /* reinitialize flowdirector state */
3519         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3520                 ring->atr_sample_rate = adapter->atr_sample_rate;
3521                 ring->atr_count = 0;
3522                 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3523         } else {
3524                 ring->atr_sample_rate = 0;
3525         }
3526
3527         /* initialize XPS */
3528         if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3529                 struct ixgbe_q_vector *q_vector = ring->q_vector;
3530
3531                 if (q_vector)
3532                         netif_set_xps_queue(ring->netdev,
3533                                             &q_vector->affinity_mask,
3534                                             ring->queue_index);
3535         }
3536
3537         clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3538
3539         /* reinitialize tx_buffer_info */
3540         memset(ring->tx_buffer_info, 0,
3541                sizeof(struct ixgbe_tx_buffer) * ring->count);
3542
3543         /* enable queue */
3544         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3545
3546         /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3547         if (hw->mac.type == ixgbe_mac_82598EB &&
3548             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3549                 return;
3550
3551         /* poll to verify queue is enabled */
3552         do {
3553                 usleep_range(1000, 2000);
3554                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3555         } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3556         if (!wait_loop)
3557                 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx);
3558 }
3559
3560 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3561 {
3562         struct ixgbe_hw *hw = &adapter->hw;
3563         u32 rttdcs, mtqc;
3564         u8 tcs = adapter->hw_tcs;
3565
3566         if (hw->mac.type == ixgbe_mac_82598EB)
3567                 return;
3568
3569         /* disable the arbiter while setting MTQC */
3570         rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3571         rttdcs |= IXGBE_RTTDCS_ARBDIS;
3572         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3573
3574         /* set transmit pool layout */
3575         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3576                 mtqc = IXGBE_MTQC_VT_ENA;
3577                 if (tcs > 4)
3578                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3579                 else if (tcs > 1)
3580                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3581                 else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3582                          IXGBE_82599_VMDQ_4Q_MASK)
3583                         mtqc |= IXGBE_MTQC_32VF;
3584                 else
3585                         mtqc |= IXGBE_MTQC_64VF;
3586         } else {
3587                 if (tcs > 4) {
3588                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3589                 } else if (tcs > 1) {
3590                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3591                 } else {
3592                         u8 max_txq = adapter->num_tx_queues +
3593                                 adapter->num_xdp_queues;
3594                         if (max_txq > 63)
3595                                 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3596                         else
3597                                 mtqc = IXGBE_MTQC_64Q_1PB;
3598                 }
3599         }
3600
3601         IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3602
3603         /* Enable Security TX Buffer IFG for multiple pb */
3604         if (tcs) {
3605                 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3606                 sectx |= IXGBE_SECTX_DCB;
3607                 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3608         }
3609
3610         /* re-enable the arbiter */
3611         rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3612         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3613 }
3614
3615 /**
3616  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3617  * @adapter: board private structure
3618  *
3619  * Configure the Tx unit of the MAC after a reset.
3620  **/
3621 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3622 {
3623         struct ixgbe_hw *hw = &adapter->hw;
3624         u32 dmatxctl;
3625         u32 i;
3626
3627         ixgbe_setup_mtqc(adapter);
3628
3629         if (hw->mac.type != ixgbe_mac_82598EB) {
3630                 /* DMATXCTL.EN must be before Tx queues are enabled */
3631                 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3632                 dmatxctl |= IXGBE_DMATXCTL_TE;
3633                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3634         }
3635
3636         /* Setup the HW Tx Head and Tail descriptor pointers */
3637         for (i = 0; i < adapter->num_tx_queues; i++)
3638                 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3639         for (i = 0; i < adapter->num_xdp_queues; i++)
3640                 ixgbe_configure_tx_ring(adapter, adapter->xdp_ring[i]);
3641 }
3642
3643 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3644                                  struct ixgbe_ring *ring)
3645 {
3646         struct ixgbe_hw *hw = &adapter->hw;
3647         u8 reg_idx = ring->reg_idx;
3648         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3649
3650         srrctl |= IXGBE_SRRCTL_DROP_EN;
3651
3652         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3653 }
3654
3655 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3656                                   struct ixgbe_ring *ring)
3657 {
3658         struct ixgbe_hw *hw = &adapter->hw;
3659         u8 reg_idx = ring->reg_idx;
3660         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3661
3662         srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3663
3664         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3665 }
3666
3667 #ifdef CONFIG_IXGBE_DCB
3668 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3669 #else
3670 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3671 #endif
3672 {
3673         int i;
3674         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3675
3676         if (adapter->ixgbe_ieee_pfc)
3677                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3678
3679         /*
3680          * We should set the drop enable bit if:
3681          *  SR-IOV is enabled
3682          *   or
3683          *  Number of Rx queues > 1 and flow control is disabled
3684          *
3685          *  This allows us to avoid head of line blocking for security
3686          *  and performance reasons.
3687          */
3688         if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3689             !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3690                 for (i = 0; i < adapter->num_rx_queues; i++)
3691                         ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3692         } else {
3693                 for (i = 0; i < adapter->num_rx_queues; i++)
3694                         ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3695         }
3696 }
3697
3698 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3699
3700 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3701                                    struct ixgbe_ring *rx_ring)
3702 {
3703         struct ixgbe_hw *hw = &adapter->hw;
3704         u32 srrctl;
3705         u8 reg_idx = rx_ring->reg_idx;
3706
3707         if (hw->mac.type == ixgbe_mac_82598EB) {
3708                 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3709
3710                 /*
3711                  * if VMDq is not active we must program one srrctl register
3712                  * per RSS queue since we have enabled RDRXCTL.MVMEN
3713                  */
3714                 reg_idx &= mask;
3715         }
3716
3717         /* configure header buffer length, needed for RSC */
3718         srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3719
3720         /* configure the packet buffer length */
3721         if (rx_ring->xsk_umem) {
3722                 u32 xsk_buf_len = rx_ring->xsk_umem->chunk_size_nohr -
3723                                   XDP_PACKET_HEADROOM;
3724
3725                 /* If the MAC support setting RXDCTL.RLPML, the
3726                  * SRRCTL[n].BSIZEPKT is set to PAGE_SIZE and
3727                  * RXDCTL.RLPML is set to the actual UMEM buffer
3728                  * size. If not, then we are stuck with a 1k buffer
3729                  * size resolution. In this case frames larger than
3730                  * the UMEM buffer size viewed in a 1k resolution will
3731                  * be dropped.
3732                  */
3733                 if (hw->mac.type != ixgbe_mac_82599EB)
3734                         srrctl |= PAGE_SIZE >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3735                 else
3736                         srrctl |= xsk_buf_len >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3737         } else if (test_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state)) {
3738                 srrctl |= IXGBE_RXBUFFER_3K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3739         } else {
3740                 srrctl |= IXGBE_RXBUFFER_2K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3741         }
3742
3743         /* configure descriptor type */
3744         srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3745
3746         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3747 }
3748
3749 /**
3750  * ixgbe_rss_indir_tbl_entries - Return RSS indirection table entries
3751  * @adapter: device handle
3752  *
3753  *  - 82598/82599/X540:     128
3754  *  - X550(non-SRIOV mode): 512
3755  *  - X550(SRIOV mode):     64
3756  */
3757 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3758 {
3759         if (adapter->hw.mac.type < ixgbe_mac_X550)
3760                 return 128;
3761         else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3762                 return 64;
3763         else
3764                 return 512;
3765 }
3766
3767 /**
3768  * ixgbe_store_key - Write the RSS key to HW
3769  * @adapter: device handle
3770  *
3771  * Write the RSS key stored in adapter.rss_key to HW.
3772  */
3773 void ixgbe_store_key(struct ixgbe_adapter *adapter)
3774 {
3775         struct ixgbe_hw *hw = &adapter->hw;
3776         int i;
3777
3778         for (i = 0; i < 10; i++)
3779                 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3780 }
3781
3782 /**
3783  * ixgbe_init_rss_key - Initialize adapter RSS key
3784  * @adapter: device handle
3785  *
3786  * Allocates and initializes the RSS key if it is not allocated.
3787  **/
3788 static inline int ixgbe_init_rss_key(struct ixgbe_adapter *adapter)
3789 {
3790         u32 *rss_key;
3791
3792         if (!adapter->rss_key) {
3793                 rss_key = kzalloc(IXGBE_RSS_KEY_SIZE, GFP_KERNEL);
3794                 if (unlikely(!rss_key))
3795                         return -ENOMEM;
3796
3797                 netdev_rss_key_fill(rss_key, IXGBE_RSS_KEY_SIZE);
3798                 adapter->rss_key = rss_key;
3799         }
3800
3801         return 0;
3802 }
3803
3804 /**
3805  * ixgbe_store_reta - Write the RETA table to HW
3806  * @adapter: device handle
3807  *
3808  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3809  */
3810 void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3811 {
3812         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3813         struct ixgbe_hw *hw = &adapter->hw;
3814         u32 reta = 0;
3815         u32 indices_multi;
3816         u8 *indir_tbl = adapter->rss_indir_tbl;
3817
3818         /* Fill out the redirection table as follows:
3819          *  - 82598:      8 bit wide entries containing pair of 4 bit RSS
3820          *    indices.
3821          *  - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3822          *  - X550:       8 bit wide entries containing 6 bit RSS index
3823          */
3824         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3825                 indices_multi = 0x11;
3826         else
3827                 indices_multi = 0x1;
3828
3829         /* Write redirection table to HW */
3830         for (i = 0; i < reta_entries; i++) {
3831                 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3832                 if ((i & 3) == 3) {
3833                         if (i < 128)
3834                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3835                         else
3836                                 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3837                                                 reta);
3838                         reta = 0;
3839                 }
3840         }
3841 }
3842
3843 /**
3844  * ixgbe_store_vfreta - Write the RETA table to HW (x550 devices in SRIOV mode)
3845  * @adapter: device handle
3846  *
3847  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3848  */
3849 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3850 {
3851         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3852         struct ixgbe_hw *hw = &adapter->hw;
3853         u32 vfreta = 0;
3854
3855         /* Write redirection table to HW */
3856         for (i = 0; i < reta_entries; i++) {
3857                 u16 pool = adapter->num_rx_pools;
3858
3859                 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3860                 if ((i & 3) != 3)
3861                         continue;
3862
3863                 while (pool--)
3864                         IXGBE_WRITE_REG(hw,
3865                                         IXGBE_PFVFRETA(i >> 2, VMDQ_P(pool)),
3866                                         vfreta);
3867                 vfreta = 0;
3868         }
3869 }
3870
3871 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3872 {
3873         u32 i, j;
3874         u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3875         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3876
3877         /* Program table for at least 4 queues w/ SR-IOV so that VFs can
3878          * make full use of any rings they may have.  We will use the
3879          * PSRTYPE register to control how many rings we use within the PF.
3880          */
3881         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 4))
3882                 rss_i = 4;
3883
3884         /* Fill out hash function seeds */
3885         ixgbe_store_key(adapter);
3886
3887         /* Fill out redirection table */
3888         memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3889
3890         for (i = 0, j = 0; i < reta_entries; i++, j++) {
3891                 if (j == rss_i)
3892                         j = 0;
3893
3894                 adapter->rss_indir_tbl[i] = j;
3895         }
3896
3897         ixgbe_store_reta(adapter);
3898 }
3899
3900 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3901 {
3902         struct ixgbe_hw *hw = &adapter->hw;
3903         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3904         int i, j;
3905
3906         /* Fill out hash function seeds */
3907         for (i = 0; i < 10; i++) {
3908                 u16 pool = adapter->num_rx_pools;
3909
3910                 while (pool--)
3911                         IXGBE_WRITE_REG(hw,
3912                                         IXGBE_PFVFRSSRK(i, VMDQ_P(pool)),
3913                                         *(adapter->rss_key + i));
3914         }
3915
3916         /* Fill out the redirection table */
3917         for (i = 0, j = 0; i < 64; i++, j++) {
3918                 if (j == rss_i)
3919                         j = 0;
3920
3921                 adapter->rss_indir_tbl[i] = j;
3922         }
3923
3924         ixgbe_store_vfreta(adapter);
3925 }
3926
3927 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3928 {
3929         struct ixgbe_hw *hw = &adapter->hw;
3930         u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3931         u32 rxcsum;
3932
3933         /* Disable indicating checksum in descriptor, enables RSS hash */
3934         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3935         rxcsum |= IXGBE_RXCSUM_PCSD;
3936         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3937
3938         if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3939                 if (adapter->ring_feature[RING_F_RSS].mask)
3940                         mrqc = IXGBE_MRQC_RSSEN;
3941         } else {
3942                 u8 tcs = adapter->hw_tcs;
3943
3944                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3945                         if (tcs > 4)
3946                                 mrqc = IXGBE_MRQC_VMDQRT8TCEN;  /* 8 TCs */
3947                         else if (tcs > 1)
3948                                 mrqc = IXGBE_MRQC_VMDQRT4TCEN;  /* 4 TCs */
3949                         else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3950                                  IXGBE_82599_VMDQ_4Q_MASK)
3951                                 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3952                         else
3953                                 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3954
3955                         /* Enable L3/L4 for Tx Switched packets */
3956                         mrqc |= IXGBE_MRQC_L3L4TXSWEN;
3957                 } else {
3958                         if (tcs > 4)
3959                                 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3960                         else if (tcs > 1)
3961                                 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3962                         else
3963                                 mrqc = IXGBE_MRQC_RSSEN;
3964                 }
3965         }
3966
3967         /* Perform hash on these packet types */
3968         rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3969                      IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3970                      IXGBE_MRQC_RSS_FIELD_IPV6 |
3971                      IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3972
3973         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3974                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3975         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3976                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3977
3978         if ((hw->mac.type >= ixgbe_mac_X550) &&
3979             (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3980                 u16 pool = adapter->num_rx_pools;
3981
3982                 /* Enable VF RSS mode */
3983                 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3984                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3985
3986                 /* Setup RSS through the VF registers */
3987                 ixgbe_setup_vfreta(adapter);
3988                 vfmrqc = IXGBE_MRQC_RSSEN;
3989                 vfmrqc |= rss_field;
3990
3991                 while (pool--)
3992                         IXGBE_WRITE_REG(hw,
3993                                         IXGBE_PFVFMRQC(VMDQ_P(pool)),
3994                                         vfmrqc);
3995         } else {
3996                 ixgbe_setup_reta(adapter);
3997                 mrqc |= rss_field;
3998                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3999         }
4000 }
4001
4002 /**
4003  * ixgbe_configure_rscctl - enable RSC for the indicated ring
4004  * @adapter: address of board private structure
4005  * @ring: structure containing ring specific data
4006  **/
4007 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
4008                                    struct ixgbe_ring *ring)
4009 {
4010         struct ixgbe_hw *hw = &adapter->hw;
4011         u32 rscctrl;
4012         u8 reg_idx = ring->reg_idx;
4013
4014         if (!ring_is_rsc_enabled(ring))
4015                 return;
4016
4017         rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
4018         rscctrl |= IXGBE_RSCCTL_RSCEN;
4019         /*
4020          * we must limit the number of descriptors so that the
4021          * total size of max desc * buf_len is not greater
4022          * than 65536
4023          */
4024         rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
4025         IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
4026 }
4027
4028 #define IXGBE_MAX_RX_DESC_POLL 10
4029 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
4030                                        struct ixgbe_ring *ring)
4031 {
4032         struct ixgbe_hw *hw = &adapter->hw;
4033         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
4034         u32 rxdctl;
4035         u8 reg_idx = ring->reg_idx;
4036
4037         if (ixgbe_removed(hw->hw_addr))
4038                 return;
4039         /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
4040         if (hw->mac.type == ixgbe_mac_82598EB &&
4041             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
4042                 return;
4043
4044         do {
4045                 usleep_range(1000, 2000);
4046                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4047         } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
4048
4049         if (!wait_loop) {
4050                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
4051                       "the polling period\n", reg_idx);
4052         }
4053 }
4054
4055 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
4056                              struct ixgbe_ring *ring)
4057 {
4058         struct ixgbe_hw *hw = &adapter->hw;
4059         union ixgbe_adv_rx_desc *rx_desc;
4060         u64 rdba = ring->dma;
4061         u32 rxdctl;
4062         u8 reg_idx = ring->reg_idx;
4063
4064         xdp_rxq_info_unreg_mem_model(&ring->xdp_rxq);
4065         ring->xsk_umem = ixgbe_xsk_umem(adapter, ring);
4066         if (ring->xsk_umem) {
4067                 ring->zca.free = ixgbe_zca_free;
4068                 WARN_ON(xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
4069                                                    MEM_TYPE_ZERO_COPY,
4070                                                    &ring->zca));
4071
4072         } else {
4073                 WARN_ON(xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
4074                                                    MEM_TYPE_PAGE_SHARED, NULL));
4075         }
4076
4077         /* disable queue to avoid use of these values while updating state */
4078         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4079         rxdctl &= ~IXGBE_RXDCTL_ENABLE;
4080
4081         /* write value back with RXDCTL.ENABLE bit cleared */
4082         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4083         IXGBE_WRITE_FLUSH(hw);
4084
4085         IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
4086         IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
4087         IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
4088                         ring->count * sizeof(union ixgbe_adv_rx_desc));
4089         /* Force flushing of IXGBE_RDLEN to prevent MDD */
4090         IXGBE_WRITE_FLUSH(hw);
4091
4092         IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
4093         IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
4094         ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
4095
4096         ixgbe_configure_srrctl(adapter, ring);
4097         ixgbe_configure_rscctl(adapter, ring);
4098
4099         if (hw->mac.type == ixgbe_mac_82598EB) {
4100                 /*
4101                  * enable cache line friendly hardware writes:
4102                  * PTHRESH=32 descriptors (half the internal cache),
4103                  * this also removes ugly rx_no_buffer_count increment
4104                  * HTHRESH=4 descriptors (to minimize latency on fetch)
4105                  * WTHRESH=8 burst writeback up to two cache lines
4106                  */
4107                 rxdctl &= ~0x3FFFFF;
4108                 rxdctl |=  0x080420;
4109 #if (PAGE_SIZE < 8192)
4110         /* RXDCTL.RLPML does not work on 82599 */
4111         } else if (hw->mac.type != ixgbe_mac_82599EB) {
4112                 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
4113                             IXGBE_RXDCTL_RLPML_EN);
4114
4115                 /* Limit the maximum frame size so we don't overrun the skb.
4116                  * This can happen in SRIOV mode when the MTU of the VF is
4117                  * higher than the MTU of the PF.
4118                  */
4119                 if (ring_uses_build_skb(ring) &&
4120                     !test_bit(__IXGBE_RX_3K_BUFFER, &ring->state))
4121                         rxdctl |= IXGBE_MAX_2K_FRAME_BUILD_SKB |
4122                                   IXGBE_RXDCTL_RLPML_EN;
4123 #endif
4124         }
4125
4126         if (ring->xsk_umem && hw->mac.type != ixgbe_mac_82599EB) {
4127                 u32 xsk_buf_len = ring->xsk_umem->chunk_size_nohr -
4128                                   XDP_PACKET_HEADROOM;
4129
4130                 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
4131                             IXGBE_RXDCTL_RLPML_EN);
4132                 rxdctl |= xsk_buf_len | IXGBE_RXDCTL_RLPML_EN;
4133
4134                 ring->rx_buf_len = xsk_buf_len;
4135         }
4136
4137         /* initialize rx_buffer_info */
4138         memset(ring->rx_buffer_info, 0,
4139                sizeof(struct ixgbe_rx_buffer) * ring->count);
4140
4141         /* initialize Rx descriptor 0 */
4142         rx_desc = IXGBE_RX_DESC(ring, 0);
4143         rx_desc->wb.upper.length = 0;
4144
4145         /* enable receive descriptor ring */
4146         rxdctl |= IXGBE_RXDCTL_ENABLE;
4147         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4148
4149         ixgbe_rx_desc_queue_enable(adapter, ring);
4150         if (ring->xsk_umem)
4151                 ixgbe_alloc_rx_buffers_zc(ring, ixgbe_desc_unused(ring));
4152         else
4153                 ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
4154 }
4155
4156 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
4157 {
4158         struct ixgbe_hw *hw = &adapter->hw;
4159         int rss_i = adapter->ring_feature[RING_F_RSS].indices;
4160         u16 pool = adapter->num_rx_pools;
4161
4162         /* PSRTYPE must be initialized in non 82598 adapters */
4163         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4164                       IXGBE_PSRTYPE_UDPHDR |
4165                       IXGBE_PSRTYPE_IPV4HDR |
4166                       IXGBE_PSRTYPE_L2HDR |
4167                       IXGBE_PSRTYPE_IPV6HDR;
4168
4169         if (hw->mac.type == ixgbe_mac_82598EB)
4170                 return;
4171
4172         if (rss_i > 3)
4173                 psrtype |= 2u << 29;
4174         else if (rss_i > 1)
4175                 psrtype |= 1u << 29;
4176
4177         while (pool--)
4178                 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4179 }
4180
4181 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
4182 {
4183         struct ixgbe_hw *hw = &adapter->hw;
4184         u16 pool = adapter->num_rx_pools;
4185         u32 reg_offset, vf_shift, vmolr;
4186         u32 gcr_ext, vmdctl;
4187         int i;
4188
4189         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
4190                 return;
4191
4192         vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
4193         vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
4194         vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
4195         vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
4196         vmdctl |= IXGBE_VT_CTL_REPLEN;
4197         IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
4198
4199         /* accept untagged packets until a vlan tag is
4200          * specifically set for the VMDQ queue/pool
4201          */
4202         vmolr = IXGBE_VMOLR_AUPE;
4203         while (pool--)
4204                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(pool)), vmolr);
4205
4206         vf_shift = VMDQ_P(0) % 32;
4207         reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
4208
4209         /* Enable only the PF's pool for Tx/Rx */
4210         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), GENMASK(31, vf_shift));
4211         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
4212         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), GENMASK(31, vf_shift));
4213         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
4214         if (adapter->bridge_mode == BRIDGE_MODE_VEB)
4215                 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
4216
4217         /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
4218         hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
4219
4220         /* clear VLAN promisc flag so VFTA will be updated if necessary */
4221         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4222
4223         /*
4224          * Set up VF register offsets for selected VT Mode,
4225          * i.e. 32 or 64 VFs for SR-IOV
4226          */
4227         switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4228         case IXGBE_82599_VMDQ_8Q_MASK:
4229                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
4230                 break;
4231         case IXGBE_82599_VMDQ_4Q_MASK:
4232                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
4233                 break;
4234         default:
4235                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
4236                 break;
4237         }
4238
4239         IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
4240
4241         for (i = 0; i < adapter->num_vfs; i++) {
4242                 /* configure spoof checking */
4243                 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i,
4244                                           adapter->vfinfo[i].spoofchk_enabled);
4245
4246                 /* Enable/Disable RSS query feature  */
4247                 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
4248                                           adapter->vfinfo[i].rss_query_enabled);
4249         }
4250 }
4251
4252 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
4253 {
4254         struct ixgbe_hw *hw = &adapter->hw;
4255         struct net_device *netdev = adapter->netdev;
4256         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4257         struct ixgbe_ring *rx_ring;
4258         int i;
4259         u32 mhadd, hlreg0;
4260
4261 #ifdef IXGBE_FCOE
4262         /* adjust max frame to be able to do baby jumbo for FCoE */
4263         if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
4264             (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
4265                 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4266
4267 #endif /* IXGBE_FCOE */
4268
4269         /* adjust max frame to be at least the size of a standard frame */
4270         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
4271                 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
4272
4273         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
4274         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
4275                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
4276                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
4277
4278                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
4279         }
4280
4281         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
4282         /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
4283         hlreg0 |= IXGBE_HLREG0_JUMBOEN;
4284         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
4285
4286         /*
4287          * Setup the HW Rx Head and Tail Descriptor Pointers and
4288          * the Base and Length of the Rx Descriptor Ring
4289          */
4290         for (i = 0; i < adapter->num_rx_queues; i++) {
4291                 rx_ring = adapter->rx_ring[i];
4292
4293                 clear_ring_rsc_enabled(rx_ring);
4294                 clear_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4295                 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4296
4297                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4298                         set_ring_rsc_enabled(rx_ring);
4299
4300                 if (test_bit(__IXGBE_RX_FCOE, &rx_ring->state))
4301                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4302
4303                 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4304                 if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY)
4305                         continue;
4306
4307                 set_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4308
4309 #if (PAGE_SIZE < 8192)
4310                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4311                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4312
4313                 if (IXGBE_2K_TOO_SMALL_WITH_PADDING ||
4314                     (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
4315                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4316 #endif
4317         }
4318 }
4319
4320 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
4321 {
4322         struct ixgbe_hw *hw = &adapter->hw;
4323         u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
4324
4325         switch (hw->mac.type) {
4326         case ixgbe_mac_82598EB:
4327                 /*
4328                  * For VMDq support of different descriptor types or
4329                  * buffer sizes through the use of multiple SRRCTL
4330                  * registers, RDRXCTL.MVMEN must be set to 1
4331                  *
4332                  * also, the manual doesn't mention it clearly but DCA hints
4333                  * will only use queue 0's tags unless this bit is set.  Side
4334                  * effects of setting this bit are only that SRRCTL must be
4335                  * fully programmed [0..15]
4336                  */
4337                 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
4338                 break;
4339         case ixgbe_mac_X550:
4340         case ixgbe_mac_X550EM_x:
4341         case ixgbe_mac_x550em_a:
4342                 if (adapter->num_vfs)
4343                         rdrxctl |= IXGBE_RDRXCTL_PSP;
4344                 /* fall through */
4345         case ixgbe_mac_82599EB:
4346         case ixgbe_mac_X540:
4347                 /* Disable RSC for ACK packets */
4348                 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
4349                    (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
4350                 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
4351                 /* hardware requires some bits to be set by default */
4352                 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
4353                 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
4354                 break;
4355         default:
4356                 /* We should do nothing since we don't know this hardware */
4357                 return;
4358         }
4359
4360         IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
4361 }
4362
4363 /**
4364  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
4365  * @adapter: board private structure
4366  *
4367  * Configure the Rx unit of the MAC after a reset.
4368  **/
4369 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
4370 {
4371         struct ixgbe_hw *hw = &adapter->hw;
4372         int i;
4373         u32 rxctrl, rfctl;
4374
4375         /* disable receives while setting up the descriptors */
4376         hw->mac.ops.disable_rx(hw);
4377
4378         ixgbe_setup_psrtype(adapter);
4379         ixgbe_setup_rdrxctl(adapter);
4380
4381         /* RSC Setup */
4382         rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
4383         rfctl &= ~IXGBE_RFCTL_RSC_DIS;
4384         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
4385                 rfctl |= IXGBE_RFCTL_RSC_DIS;
4386
4387         /* disable NFS filtering */
4388         rfctl |= (IXGBE_RFCTL_NFSW_DIS | IXGBE_RFCTL_NFSR_DIS);
4389         IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
4390
4391         /* Program registers for the distribution of queues */
4392         ixgbe_setup_mrqc(adapter);
4393
4394         /* set_rx_buffer_len must be called before ring initialization */
4395         ixgbe_set_rx_buffer_len(adapter);
4396
4397         /*
4398          * Setup the HW Rx Head and Tail Descriptor Pointers and
4399          * the Base and Length of the Rx Descriptor Ring
4400          */
4401         for (i = 0; i < adapter->num_rx_queues; i++)
4402                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
4403
4404         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
4405         /* disable drop enable for 82598 parts */
4406         if (hw->mac.type == ixgbe_mac_82598EB)
4407                 rxctrl |= IXGBE_RXCTRL_DMBYPS;
4408
4409         /* enable all receives */
4410         rxctrl |= IXGBE_RXCTRL_RXEN;
4411         hw->mac.ops.enable_rx_dma(hw, rxctrl);
4412 }
4413
4414 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
4415                                  __be16 proto, u16 vid)
4416 {
4417         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4418         struct ixgbe_hw *hw = &adapter->hw;
4419
4420         /* add VID to filter table */
4421         if (!vid || !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4422                 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true, !!vid);
4423
4424         set_bit(vid, adapter->active_vlans);
4425
4426         return 0;
4427 }
4428
4429 static int ixgbe_find_vlvf_entry(struct ixgbe_hw *hw, u32 vlan)
4430 {
4431         u32 vlvf;
4432         int idx;
4433
4434         /* short cut the special case */
4435         if (vlan == 0)
4436                 return 0;
4437
4438         /* Search for the vlan id in the VLVF entries */
4439         for (idx = IXGBE_VLVF_ENTRIES; --idx;) {
4440                 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(idx));
4441                 if ((vlvf & VLAN_VID_MASK) == vlan)
4442                         break;
4443         }
4444
4445         return idx;
4446 }
4447
4448 void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter *adapter, u32 vid)
4449 {
4450         struct ixgbe_hw *hw = &adapter->hw;
4451         u32 bits, word;
4452         int idx;
4453
4454         idx = ixgbe_find_vlvf_entry(hw, vid);
4455         if (!idx)
4456                 return;
4457
4458         /* See if any other pools are set for this VLAN filter
4459          * entry other than the PF.
4460          */
4461         word = idx * 2 + (VMDQ_P(0) / 32);
4462         bits = ~BIT(VMDQ_P(0) % 32);
4463         bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4464
4465         /* Disable the filter so this falls into the default pool. */
4466         if (!bits && !IXGBE_READ_REG(hw, IXGBE_VLVFB(word ^ 1))) {
4467                 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4468                         IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), 0);
4469                 IXGBE_WRITE_REG(hw, IXGBE_VLVF(idx), 0);
4470         }
4471 }
4472
4473 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
4474                                   __be16 proto, u16 vid)
4475 {
4476         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4477         struct ixgbe_hw *hw = &adapter->hw;
4478
4479         /* remove VID from filter table */
4480         if (vid && !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4481                 hw->mac.ops.set_vfta(hw, vid, VMDQ_P(0), false, true);
4482
4483         clear_bit(vid, adapter->active_vlans);
4484
4485         return 0;
4486 }
4487
4488 /**
4489  * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
4490  * @adapter: driver data
4491  */
4492 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
4493 {
4494         struct ixgbe_hw *hw = &adapter->hw;
4495         u32 vlnctrl;
4496         int i, j;
4497
4498         switch (hw->mac.type) {
4499         case ixgbe_mac_82598EB:
4500                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4501                 vlnctrl &= ~IXGBE_VLNCTRL_VME;
4502                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4503                 break;
4504         case ixgbe_mac_82599EB:
4505         case ixgbe_mac_X540:
4506         case ixgbe_mac_X550:
4507         case ixgbe_mac_X550EM_x:
4508         case ixgbe_mac_x550em_a:
4509                 for (i = 0; i < adapter->num_rx_queues; i++) {
4510                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4511
4512                         if (!netif_is_ixgbe(ring->netdev))
4513                                 continue;
4514
4515                         j = ring->reg_idx;
4516                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4517                         vlnctrl &= ~IXGBE_RXDCTL_VME;
4518                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4519                 }
4520                 break;
4521         default:
4522                 break;
4523         }
4524 }
4525
4526 /**
4527  * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
4528  * @adapter: driver data
4529  */
4530 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
4531 {
4532         struct ixgbe_hw *hw = &adapter->hw;
4533         u32 vlnctrl;
4534         int i, j;
4535
4536         switch (hw->mac.type) {
4537         case ixgbe_mac_82598EB:
4538                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4539                 vlnctrl |= IXGBE_VLNCTRL_VME;
4540                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4541                 break;
4542         case ixgbe_mac_82599EB:
4543         case ixgbe_mac_X540:
4544         case ixgbe_mac_X550:
4545         case ixgbe_mac_X550EM_x:
4546         case ixgbe_mac_x550em_a:
4547                 for (i = 0; i < adapter->num_rx_queues; i++) {
4548                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4549
4550                         if (!netif_is_ixgbe(ring->netdev))
4551                                 continue;
4552
4553                         j = ring->reg_idx;
4554                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4555                         vlnctrl |= IXGBE_RXDCTL_VME;
4556                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4557                 }
4558                 break;
4559         default:
4560                 break;
4561         }
4562 }
4563
4564 static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter *adapter)
4565 {
4566         struct ixgbe_hw *hw = &adapter->hw;
4567         u32 vlnctrl, i;
4568
4569         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4570
4571         if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
4572         /* For VMDq and SR-IOV we must leave VLAN filtering enabled */
4573                 vlnctrl |= IXGBE_VLNCTRL_VFE;
4574                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4575         } else {
4576                 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
4577                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4578                 return;
4579         }
4580
4581         /* Nothing to do for 82598 */
4582         if (hw->mac.type == ixgbe_mac_82598EB)
4583                 return;
4584
4585         /* We are already in VLAN promisc, nothing to do */
4586         if (adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)
4587                 return;
4588
4589         /* Set flag so we don't redo unnecessary work */
4590         adapter->flags2 |= IXGBE_FLAG2_VLAN_PROMISC;
4591
4592         /* Add PF to all active pools */
4593         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4594                 u32 reg_offset = IXGBE_VLVFB(i * 2 + VMDQ_P(0) / 32);
4595                 u32 vlvfb = IXGBE_READ_REG(hw, reg_offset);
4596
4597                 vlvfb |= BIT(VMDQ_P(0) % 32);
4598                 IXGBE_WRITE_REG(hw, reg_offset, vlvfb);
4599         }
4600
4601         /* Set all bits in the VLAN filter table array */
4602         for (i = hw->mac.vft_size; i--;)
4603                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U);
4604 }
4605
4606 #define VFTA_BLOCK_SIZE 8
4607 static void ixgbe_scrub_vfta(struct ixgbe_adapter *adapter, u32 vfta_offset)
4608 {
4609         struct ixgbe_hw *hw = &adapter->hw;
4610         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4611         u32 vid_start = vfta_offset * 32;
4612         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4613         u32 i, vid, word, bits;
4614
4615         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4616                 u32 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i));
4617
4618                 /* pull VLAN ID from VLVF */
4619                 vid = vlvf & VLAN_VID_MASK;
4620
4621                 /* only concern outselves with a certain range */
4622                 if (vid < vid_start || vid >= vid_end)
4623                         continue;
4624
4625                 if (vlvf) {
4626                         /* record VLAN ID in VFTA */
4627                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4628
4629                         /* if PF is part of this then continue */
4630                         if (test_bit(vid, adapter->active_vlans))
4631                                 continue;
4632                 }
4633
4634                 /* remove PF from the pool */
4635                 word = i * 2 + VMDQ_P(0) / 32;
4636                 bits = ~BIT(VMDQ_P(0) % 32);
4637                 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4638                 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), bits);
4639         }
4640
4641         /* extract values from active_vlans and write back to VFTA */
4642         for (i = VFTA_BLOCK_SIZE; i--;) {
4643                 vid = (vfta_offset + i) * 32;
4644                 word = vid / BITS_PER_LONG;
4645                 bits = vid % BITS_PER_LONG;
4646
4647                 vfta[i] |= adapter->active_vlans[word] >> bits;
4648
4649                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(vfta_offset + i), vfta[i]);
4650         }
4651 }
4652
4653 static void ixgbe_vlan_promisc_disable(struct ixgbe_adapter *adapter)
4654 {
4655         struct ixgbe_hw *hw = &adapter->hw;
4656         u32 vlnctrl, i;
4657
4658         /* Set VLAN filtering to enabled */
4659         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4660         vlnctrl |= IXGBE_VLNCTRL_VFE;
4661         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4662
4663         if (!(adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) ||
4664             hw->mac.type == ixgbe_mac_82598EB)
4665                 return;
4666
4667         /* We are not in VLAN promisc, nothing to do */
4668         if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4669                 return;
4670
4671         /* Set flag so we don't redo unnecessary work */
4672         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4673
4674         for (i = 0; i < hw->mac.vft_size; i += VFTA_BLOCK_SIZE)
4675                 ixgbe_scrub_vfta(adapter, i);
4676 }
4677
4678 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
4679 {
4680         u16 vid = 1;
4681
4682         ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
4683
4684         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
4685                 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
4686 }
4687
4688 /**
4689  * ixgbe_write_mc_addr_list - write multicast addresses to MTA
4690  * @netdev: network interface device structure
4691  *
4692  * Writes multicast address list to the MTA hash table.
4693  * Returns: -ENOMEM on failure
4694  *                0 on no addresses written
4695  *                X on writing X addresses to MTA
4696  **/
4697 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
4698 {
4699         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4700         struct ixgbe_hw *hw = &adapter->hw;
4701
4702         if (!netif_running(netdev))
4703                 return 0;
4704
4705         if (hw->mac.ops.update_mc_addr_list)
4706                 hw->mac.ops.update_mc_addr_list(hw, netdev);
4707         else
4708                 return -ENOMEM;
4709
4710 #ifdef CONFIG_PCI_IOV
4711         ixgbe_restore_vf_multicasts(adapter);
4712 #endif
4713
4714         return netdev_mc_count(netdev);
4715 }
4716
4717 #ifdef CONFIG_PCI_IOV
4718 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
4719 {
4720         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4721         struct ixgbe_hw *hw = &adapter->hw;
4722         int i;
4723
4724         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4725                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4726
4727                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4728                         hw->mac.ops.set_rar(hw, i,
4729                                             mac_table->addr,
4730                                             mac_table->pool,
4731                                             IXGBE_RAH_AV);
4732                 else
4733                         hw->mac.ops.clear_rar(hw, i);
4734         }
4735 }
4736
4737 #endif
4738 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4739 {
4740         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4741         struct ixgbe_hw *hw = &adapter->hw;
4742         int i;
4743
4744         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4745                 if (!(mac_table->state & IXGBE_MAC_STATE_MODIFIED))
4746                         continue;
4747
4748                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4749
4750                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4751                         hw->mac.ops.set_rar(hw, i,
4752                                             mac_table->addr,
4753                                             mac_table->pool,
4754                                             IXGBE_RAH_AV);
4755                 else
4756                         hw->mac.ops.clear_rar(hw, i);
4757         }
4758 }
4759
4760 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4761 {
4762         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4763         struct ixgbe_hw *hw = &adapter->hw;
4764         int i;
4765
4766         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4767                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4768                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4769         }
4770
4771         ixgbe_sync_mac_table(adapter);
4772 }
4773
4774 static int ixgbe_available_rars(struct ixgbe_adapter *adapter, u16 pool)
4775 {
4776         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4777         struct ixgbe_hw *hw = &adapter->hw;
4778         int i, count = 0;
4779
4780         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4781                 /* do not count default RAR as available */
4782                 if (mac_table->state & IXGBE_MAC_STATE_DEFAULT)
4783                         continue;
4784
4785                 /* only count unused and addresses that belong to us */
4786                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) {
4787                         if (mac_table->pool != pool)
4788                                 continue;
4789                 }
4790
4791                 count++;
4792         }
4793
4794         return count;
4795 }
4796
4797 /* this function destroys the first RAR entry */
4798 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter)
4799 {
4800         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4801         struct ixgbe_hw *hw = &adapter->hw;
4802
4803         memcpy(&mac_table->addr, hw->mac.addr, ETH_ALEN);
4804         mac_table->pool = VMDQ_P(0);
4805
4806         mac_table->state = IXGBE_MAC_STATE_DEFAULT | IXGBE_MAC_STATE_IN_USE;
4807
4808         hw->mac.ops.set_rar(hw, 0, mac_table->addr, mac_table->pool,
4809                             IXGBE_RAH_AV);
4810 }
4811
4812 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter,
4813                          const u8 *addr, u16 pool)
4814 {
4815         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4816         struct ixgbe_hw *hw = &adapter->hw;
4817         int i;
4818
4819         if (is_zero_ether_addr(addr))
4820                 return -EINVAL;
4821
4822         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4823                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4824                         continue;
4825
4826                 ether_addr_copy(mac_table->addr, addr);
4827                 mac_table->pool = pool;
4828
4829                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED |
4830                                     IXGBE_MAC_STATE_IN_USE;
4831
4832                 ixgbe_sync_mac_table(adapter);
4833
4834                 return i;
4835         }
4836
4837         return -ENOMEM;
4838 }
4839
4840 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter,
4841                          const u8 *addr, u16 pool)
4842 {
4843         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4844         struct ixgbe_hw *hw = &adapter->hw;
4845         int i;
4846
4847         if (is_zero_ether_addr(addr))
4848                 return -EINVAL;
4849
4850         /* search table for addr, if found clear IN_USE flag and sync */
4851         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4852                 /* we can only delete an entry if it is in use */
4853                 if (!(mac_table->state & IXGBE_MAC_STATE_IN_USE))
4854                         continue;
4855                 /* we only care about entries that belong to the given pool */
4856                 if (mac_table->pool != pool)
4857                         continue;
4858                 /* we only care about a specific MAC address */
4859                 if (!ether_addr_equal(addr, mac_table->addr))
4860                         continue;
4861
4862                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4863                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4864
4865                 ixgbe_sync_mac_table(adapter);
4866
4867                 return 0;
4868         }
4869
4870         return -ENOMEM;
4871 }
4872
4873 static int ixgbe_uc_sync(struct net_device *netdev, const unsigned char *addr)
4874 {
4875         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4876         int ret;
4877
4878         ret = ixgbe_add_mac_filter(adapter, addr, VMDQ_P(0));
4879
4880         return min_t(int, ret, 0);
4881 }
4882
4883 static int ixgbe_uc_unsync(struct net_device *netdev, const unsigned char *addr)
4884 {
4885         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4886
4887         ixgbe_del_mac_filter(adapter, addr, VMDQ_P(0));
4888
4889         return 0;
4890 }
4891
4892 /**
4893  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4894  * @netdev: network interface device structure
4895  *
4896  * The set_rx_method entry point is called whenever the unicast/multicast
4897  * address list or the network interface flags are updated.  This routine is
4898  * responsible for configuring the hardware for proper unicast, multicast and
4899  * promiscuous mode.
4900  **/
4901 void ixgbe_set_rx_mode(struct net_device *netdev)
4902 {
4903         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4904         struct ixgbe_hw *hw = &adapter->hw;
4905         u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4906         netdev_features_t features = netdev->features;
4907         int count;
4908
4909         /* Check for Promiscuous and All Multicast modes */
4910         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4911
4912         /* set all bits that we expect to always be set */
4913         fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4914         fctrl |= IXGBE_FCTRL_BAM;
4915         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4916         fctrl |= IXGBE_FCTRL_PMCF;
4917
4918         /* clear the bits we are changing the status of */
4919         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4920         if (netdev->flags & IFF_PROMISC) {
4921                 hw->addr_ctrl.user_set_promisc = true;
4922                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4923                 vmolr |= IXGBE_VMOLR_MPE;
4924                 features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
4925         } else {
4926                 if (netdev->flags & IFF_ALLMULTI) {
4927                         fctrl |= IXGBE_FCTRL_MPE;
4928                         vmolr |= IXGBE_VMOLR_MPE;
4929                 }
4930                 hw->addr_ctrl.user_set_promisc = false;
4931         }
4932
4933         /*
4934          * Write addresses to available RAR registers, if there is not
4935          * sufficient space to store all the addresses then enable
4936          * unicast promiscuous mode
4937          */
4938         if (__dev_uc_sync(netdev, ixgbe_uc_sync, ixgbe_uc_unsync)) {
4939                 fctrl |= IXGBE_FCTRL_UPE;
4940                 vmolr |= IXGBE_VMOLR_ROPE;
4941         }
4942
4943         /* Write addresses to the MTA, if the attempt fails
4944          * then we should just turn on promiscuous mode so
4945          * that we can at least receive multicast traffic
4946          */
4947         count = ixgbe_write_mc_addr_list(netdev);
4948         if (count < 0) {
4949                 fctrl |= IXGBE_FCTRL_MPE;
4950                 vmolr |= IXGBE_VMOLR_MPE;
4951         } else if (count) {
4952                 vmolr |= IXGBE_VMOLR_ROMPE;
4953         }
4954
4955         if (hw->mac.type != ixgbe_mac_82598EB) {
4956                 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4957                          ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4958                            IXGBE_VMOLR_ROPE);
4959                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4960         }
4961
4962         /* This is useful for sniffing bad packets. */
4963         if (features & NETIF_F_RXALL) {
4964                 /* UPE and MPE will be handled by normal PROMISC logic
4965                  * in e1000e_set_rx_mode */
4966                 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4967                           IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4968                           IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4969
4970                 fctrl &= ~(IXGBE_FCTRL_DPF);
4971                 /* NOTE:  VLAN filtering is disabled by setting PROMISC */
4972         }
4973
4974         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4975
4976         if (features & NETIF_F_HW_VLAN_CTAG_RX)
4977                 ixgbe_vlan_strip_enable(adapter);
4978         else
4979                 ixgbe_vlan_strip_disable(adapter);
4980
4981         if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
4982                 ixgbe_vlan_promisc_disable(adapter);
4983         else
4984                 ixgbe_vlan_promisc_enable(adapter);
4985 }
4986
4987 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4988 {
4989         int q_idx;
4990
4991         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
4992                 napi_enable(&adapter->q_vector[q_idx]->napi);
4993 }
4994
4995 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
4996 {
4997         int q_idx;
4998
4999         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
5000                 napi_disable(&adapter->q_vector[q_idx]->napi);
5001 }
5002
5003 static void ixgbe_clear_udp_tunnel_port(struct ixgbe_adapter *adapter, u32 mask)
5004 {
5005         struct ixgbe_hw *hw = &adapter->hw;
5006         u32 vxlanctrl;
5007
5008         if (!(adapter->flags & (IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE |
5009                                 IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)))
5010                 return;
5011
5012         vxlanctrl = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) & ~mask;
5013         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, vxlanctrl);
5014
5015         if (mask & IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK)
5016                 adapter->vxlan_port = 0;
5017
5018         if (mask & IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK)
5019                 adapter->geneve_port = 0;
5020 }
5021
5022 #ifdef CONFIG_IXGBE_DCB
5023 /**
5024  * ixgbe_configure_dcb - Configure DCB hardware
5025  * @adapter: ixgbe adapter struct
5026  *
5027  * This is called by the driver on open to configure the DCB hardware.
5028  * This is also called by the gennetlink interface when reconfiguring
5029  * the DCB state.
5030  */
5031 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
5032 {
5033         struct ixgbe_hw *hw = &adapter->hw;
5034         int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
5035
5036         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
5037                 if (hw->mac.type == ixgbe_mac_82598EB)
5038                         netif_set_gso_max_size(adapter->netdev, 65536);
5039                 return;
5040         }
5041
5042         if (hw->mac.type == ixgbe_mac_82598EB)
5043                 netif_set_gso_max_size(adapter->netdev, 32768);
5044
5045 #ifdef IXGBE_FCOE
5046         if (adapter->netdev->features & NETIF_F_FCOE_MTU)
5047                 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
5048 #endif
5049
5050         /* reconfigure the hardware */
5051         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
5052                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
5053                                                 DCB_TX_CONFIG);
5054                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
5055                                                 DCB_RX_CONFIG);
5056                 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
5057         } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
5058                 ixgbe_dcb_hw_ets(&adapter->hw,
5059                                  adapter->ixgbe_ieee_ets,
5060                                  max_frame);
5061                 ixgbe_dcb_hw_pfc_config(&adapter->hw,
5062                                         adapter->ixgbe_ieee_pfc->pfc_en,
5063                                         adapter->ixgbe_ieee_ets->prio_tc);
5064         }
5065
5066         /* Enable RSS Hash per TC */
5067         if (hw->mac.type != ixgbe_mac_82598EB) {
5068                 u32 msb = 0;
5069                 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
5070
5071                 while (rss_i) {
5072                         msb++;
5073                         rss_i >>= 1;
5074                 }
5075
5076                 /* write msb to all 8 TCs in one write */
5077                 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
5078         }
5079 }
5080 #endif
5081
5082 /* Additional bittime to account for IXGBE framing */
5083 #define IXGBE_ETH_FRAMING 20
5084
5085 /**
5086  * ixgbe_hpbthresh - calculate high water mark for flow control
5087  *
5088  * @adapter: board private structure to calculate for
5089  * @pb: packet buffer to calculate
5090  */
5091 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
5092 {
5093         struct ixgbe_hw *hw = &adapter->hw;
5094         struct net_device *dev = adapter->netdev;
5095         int link, tc, kb, marker;
5096         u32 dv_id, rx_pba;
5097
5098         /* Calculate max LAN frame size */
5099         tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
5100
5101 #ifdef IXGBE_FCOE
5102         /* FCoE traffic class uses FCOE jumbo frames */
5103         if ((dev->features & NETIF_F_FCOE_MTU) &&
5104             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5105             (pb == ixgbe_fcoe_get_tc(adapter)))
5106                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5107 #endif
5108
5109         /* Calculate delay value for device */
5110         switch (hw->mac.type) {
5111         case ixgbe_mac_X540:
5112         case ixgbe_mac_X550:
5113         case ixgbe_mac_X550EM_x:
5114         case ixgbe_mac_x550em_a:
5115                 dv_id = IXGBE_DV_X540(link, tc);
5116                 break;
5117         default:
5118                 dv_id = IXGBE_DV(link, tc);
5119                 break;
5120         }
5121
5122         /* Loopback switch introduces additional latency */
5123         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5124                 dv_id += IXGBE_B2BT(tc);
5125
5126         /* Delay value is calculated in bit times convert to KB */
5127         kb = IXGBE_BT2KB(dv_id);
5128         rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
5129
5130         marker = rx_pba - kb;
5131
5132         /* It is possible that the packet buffer is not large enough
5133          * to provide required headroom. In this case throw an error
5134          * to user and a do the best we can.
5135          */
5136         if (marker < 0) {
5137                 e_warn(drv, "Packet Buffer(%i) can not provide enough"
5138                             "headroom to support flow control."
5139                             "Decrease MTU or number of traffic classes\n", pb);
5140                 marker = tc + 1;
5141         }
5142
5143         return marker;
5144 }
5145
5146 /**
5147  * ixgbe_lpbthresh - calculate low water mark for for flow control
5148  *
5149  * @adapter: board private structure to calculate for
5150  * @pb: packet buffer to calculate
5151  */
5152 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
5153 {
5154         struct ixgbe_hw *hw = &adapter->hw;
5155         struct net_device *dev = adapter->netdev;
5156         int tc;
5157         u32 dv_id;
5158
5159         /* Calculate max LAN frame size */
5160         tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
5161
5162 #ifdef IXGBE_FCOE
5163         /* FCoE traffic class uses FCOE jumbo frames */
5164         if ((dev->features & NETIF_F_FCOE_MTU) &&
5165             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5166             (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
5167                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5168 #endif
5169
5170         /* Calculate delay value for device */
5171         switch (hw->mac.type) {
5172         case ixgbe_mac_X540:
5173         case ixgbe_mac_X550:
5174         case ixgbe_mac_X550EM_x:
5175         case ixgbe_mac_x550em_a:
5176                 dv_id = IXGBE_LOW_DV_X540(tc);
5177                 break;
5178         default:
5179                 dv_id = IXGBE_LOW_DV(tc);
5180                 break;
5181         }
5182
5183         /* Delay value is calculated in bit times convert to KB */
5184         return IXGBE_BT2KB(dv_id);
5185 }
5186
5187 /*
5188  * ixgbe_pbthresh_setup - calculate and setup high low water marks
5189  */
5190 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
5191 {
5192         struct ixgbe_hw *hw = &adapter->hw;
5193         int num_tc = adapter->hw_tcs;
5194         int i;
5195
5196         if (!num_tc)
5197                 num_tc = 1;
5198
5199         for (i = 0; i < num_tc; i++) {
5200                 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
5201                 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
5202
5203                 /* Low water marks must not be larger than high water marks */
5204                 if (hw->fc.low_water[i] > hw->fc.high_water[i])
5205                         hw->fc.low_water[i] = 0;
5206         }
5207
5208         for (; i < MAX_TRAFFIC_CLASS; i++)
5209                 hw->fc.high_water[i] = 0;
5210 }
5211
5212 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
5213 {
5214         struct ixgbe_hw *hw = &adapter->hw;
5215         int hdrm;
5216         u8 tc = adapter->hw_tcs;
5217
5218         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
5219             adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
5220                 hdrm = 32 << adapter->fdir_pballoc;
5221         else
5222                 hdrm = 0;
5223
5224         hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
5225         ixgbe_pbthresh_setup(adapter);
5226 }
5227
5228 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
5229 {
5230         struct ixgbe_hw *hw = &adapter->hw;
5231         struct hlist_node *node2;
5232         struct ixgbe_fdir_filter *filter;
5233         u64 action;
5234
5235         spin_lock(&adapter->fdir_perfect_lock);
5236
5237         if (!hlist_empty(&adapter->fdir_filter_list))
5238                 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
5239
5240         hlist_for_each_entry_safe(filter, node2,
5241                                   &adapter->fdir_filter_list, fdir_node) {
5242                 action = filter->action;
5243                 if (action != IXGBE_FDIR_DROP_QUEUE && action != 0)
5244                         action =
5245                         (action >> ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF) - 1;
5246
5247                 ixgbe_fdir_write_perfect_filter_82599(hw,
5248                                 &filter->filter,
5249                                 filter->sw_idx,
5250                                 (action == IXGBE_FDIR_DROP_QUEUE) ?
5251                                 IXGBE_FDIR_DROP_QUEUE :
5252                                 adapter->rx_ring[action]->reg_idx);
5253         }
5254
5255         spin_unlock(&adapter->fdir_perfect_lock);
5256 }
5257
5258 /**
5259  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
5260  * @rx_ring: ring to free buffers from
5261  **/
5262 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
5263 {
5264         u16 i = rx_ring->next_to_clean;
5265         struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
5266
5267         if (rx_ring->xsk_umem) {
5268                 ixgbe_xsk_clean_rx_ring(rx_ring);
5269                 goto skip_free;
5270         }
5271
5272         /* Free all the Rx ring sk_buffs */
5273         while (i != rx_ring->next_to_alloc) {
5274                 if (rx_buffer->skb) {
5275                         struct sk_buff *skb = rx_buffer->skb;
5276                         if (IXGBE_CB(skb)->page_released)
5277                                 dma_unmap_page_attrs(rx_ring->dev,
5278                                                      IXGBE_CB(skb)->dma,
5279                                                      ixgbe_rx_pg_size(rx_ring),
5280                                                      DMA_FROM_DEVICE,
5281                                                      IXGBE_RX_DMA_ATTR);
5282                         dev_kfree_skb(skb);
5283                 }
5284
5285                 /* Invalidate cache lines that may have been written to by
5286                  * device so that we avoid corrupting memory.
5287                  */
5288                 dma_sync_single_range_for_cpu(rx_ring->dev,
5289                                               rx_buffer->dma,
5290                                               rx_buffer->page_offset,
5291                                               ixgbe_rx_bufsz(rx_ring),
5292                                               DMA_FROM_DEVICE);
5293
5294                 /* free resources associated with mapping */
5295                 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
5296                                      ixgbe_rx_pg_size(rx_ring),
5297                                      DMA_FROM_DEVICE,
5298                                      IXGBE_RX_DMA_ATTR);
5299                 __page_frag_cache_drain(rx_buffer->page,
5300                                         rx_buffer->pagecnt_bias);
5301
5302                 i++;
5303                 rx_buffer++;
5304                 if (i == rx_ring->count) {
5305                         i = 0;
5306                         rx_buffer = rx_ring->rx_buffer_info;
5307                 }
5308         }
5309
5310 skip_free:
5311         rx_ring->next_to_alloc = 0;
5312         rx_ring->next_to_clean = 0;
5313         rx_ring->next_to_use = 0;
5314 }
5315
5316 static int ixgbe_fwd_ring_up(struct ixgbe_adapter *adapter,
5317                              struct ixgbe_fwd_adapter *accel)
5318 {
5319         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
5320         int num_tc = netdev_get_num_tc(adapter->netdev);
5321         struct net_device *vdev = accel->netdev;
5322         int i, baseq, err;
5323
5324         baseq = accel->pool * adapter->num_rx_queues_per_pool;
5325         netdev_dbg(vdev, "pool %i:%i queues %i:%i\n",
5326                    accel->pool, adapter->num_rx_pools,
5327                    baseq, baseq + adapter->num_rx_queues_per_pool);
5328
5329         accel->rx_base_queue = baseq;
5330         accel->tx_base_queue = baseq;
5331
5332         /* record configuration for macvlan interface in vdev */
5333         for (i = 0; i < num_tc; i++)
5334                 netdev_bind_sb_channel_queue(adapter->netdev, vdev,
5335                                              i, rss_i, baseq + (rss_i * i));
5336
5337         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5338                 adapter->rx_ring[baseq + i]->netdev = vdev;
5339
5340         /* Guarantee all rings are updated before we update the
5341          * MAC address filter.
5342          */
5343         wmb();
5344
5345         /* ixgbe_add_mac_filter will return an index if it succeeds, so we
5346          * need to only treat it as an error value if it is negative.
5347          */
5348         err = ixgbe_add_mac_filter(adapter, vdev->dev_addr,
5349                                    VMDQ_P(accel->pool));
5350         if (err >= 0)
5351                 return 0;
5352
5353         /* if we cannot add the MAC rule then disable the offload */
5354         macvlan_release_l2fw_offload(vdev);
5355
5356         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5357                 adapter->rx_ring[baseq + i]->netdev = NULL;
5358
5359         netdev_err(vdev, "L2FW offload disabled due to L2 filter error\n");
5360
5361         /* unbind the queues and drop the subordinate channel config */
5362         netdev_unbind_sb_channel(adapter->netdev, vdev);
5363         netdev_set_sb_channel(vdev, 0);
5364
5365         clear_bit(accel->pool, adapter->fwd_bitmask);
5366         kfree(accel);
5367
5368         return err;
5369 }
5370
5371 static int ixgbe_macvlan_up(struct net_device *vdev, void *data)
5372 {
5373         struct ixgbe_adapter *adapter = data;
5374         struct ixgbe_fwd_adapter *accel;
5375
5376         if (!netif_is_macvlan(vdev))
5377                 return 0;
5378
5379         accel = macvlan_accel_priv(vdev);
5380         if (!accel)
5381                 return 0;
5382
5383         ixgbe_fwd_ring_up(adapter, accel);
5384
5385         return 0;
5386 }
5387
5388 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
5389 {
5390         netdev_walk_all_upper_dev_rcu(adapter->netdev,
5391                                       ixgbe_macvlan_up, adapter);
5392 }
5393
5394 static void ixgbe_configure(struct ixgbe_adapter *adapter)
5395 {
5396         struct ixgbe_hw *hw = &adapter->hw;
5397
5398         ixgbe_configure_pb(adapter);
5399 #ifdef CONFIG_IXGBE_DCB
5400         ixgbe_configure_dcb(adapter);
5401 #endif
5402         /*
5403          * We must restore virtualization before VLANs or else
5404          * the VLVF registers will not be populated
5405          */
5406         ixgbe_configure_virtualization(adapter);
5407
5408         ixgbe_set_rx_mode(adapter->netdev);
5409         ixgbe_restore_vlan(adapter);
5410         ixgbe_ipsec_restore(adapter);
5411
5412         switch (hw->mac.type) {
5413         case ixgbe_mac_82599EB:
5414         case ixgbe_mac_X540:
5415                 hw->mac.ops.disable_rx_buff(hw);
5416                 break;
5417         default:
5418                 break;
5419         }
5420
5421         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
5422                 ixgbe_init_fdir_signature_82599(&adapter->hw,
5423                                                 adapter->fdir_pballoc);
5424         } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
5425                 ixgbe_init_fdir_perfect_82599(&adapter->hw,
5426                                               adapter->fdir_pballoc);
5427                 ixgbe_fdir_filter_restore(adapter);
5428         }
5429
5430         switch (hw->mac.type) {
5431         case ixgbe_mac_82599EB:
5432         case ixgbe_mac_X540:
5433                 hw->mac.ops.enable_rx_buff(hw);
5434                 break;
5435         default:
5436                 break;
5437         }
5438
5439 #ifdef CONFIG_IXGBE_DCA
5440         /* configure DCA */
5441         if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE)
5442                 ixgbe_setup_dca(adapter);
5443 #endif /* CONFIG_IXGBE_DCA */
5444
5445 #ifdef IXGBE_FCOE
5446         /* configure FCoE L2 filters, redirection table, and Rx control */
5447         ixgbe_configure_fcoe(adapter);
5448
5449 #endif /* IXGBE_FCOE */
5450         ixgbe_configure_tx(adapter);
5451         ixgbe_configure_rx(adapter);
5452         ixgbe_configure_dfwd(adapter);
5453 }
5454
5455 /**
5456  * ixgbe_sfp_link_config - set up SFP+ link
5457  * @adapter: pointer to private adapter struct
5458  **/
5459 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
5460 {
5461         /*
5462          * We are assuming the worst case scenario here, and that
5463          * is that an SFP was inserted/removed after the reset
5464          * but before SFP detection was enabled.  As such the best
5465          * solution is to just start searching as soon as we start
5466          */
5467         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
5468                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
5469
5470         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
5471         adapter->sfp_poll_time = 0;
5472 }
5473
5474 /**
5475  * ixgbe_non_sfp_link_config - set up non-SFP+ link
5476  * @hw: pointer to private hardware struct
5477  *
5478  * Returns 0 on success, negative on failure
5479  **/
5480 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
5481 {
5482         u32 speed;
5483         bool autoneg, link_up = false;
5484         int ret = IXGBE_ERR_LINK_SETUP;
5485
5486         if (hw->mac.ops.check_link)
5487                 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
5488
5489         if (ret)
5490                 return ret;
5491
5492         speed = hw->phy.autoneg_advertised;
5493         if ((!speed) && (hw->mac.ops.get_link_capabilities))
5494                 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
5495                                                         &autoneg);
5496         if (ret)
5497                 return ret;
5498
5499         if (hw->mac.ops.setup_link)
5500                 ret = hw->mac.ops.setup_link(hw, speed, link_up);
5501
5502         return ret;
5503 }
5504
5505 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
5506 {
5507         struct ixgbe_hw *hw = &adapter->hw;
5508         u32 gpie = 0;
5509
5510         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
5511                 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
5512                        IXGBE_GPIE_OCD;
5513                 gpie |= IXGBE_GPIE_EIAME;
5514                 /*
5515                  * use EIAM to auto-mask when MSI-X interrupt is asserted
5516                  * this saves a register write for every interrupt
5517                  */
5518                 switch (hw->mac.type) {
5519                 case ixgbe_mac_82598EB:
5520                         IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5521                         break;
5522                 case ixgbe_mac_82599EB:
5523                 case ixgbe_mac_X540:
5524                 case ixgbe_mac_X550:
5525                 case ixgbe_mac_X550EM_x:
5526                 case ixgbe_mac_x550em_a:
5527                 default:
5528                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
5529                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
5530                         break;
5531                 }
5532         } else {
5533                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
5534                  * specifically only auto mask tx and rx interrupts */
5535                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5536         }
5537
5538         /* XXX: to interrupt immediately for EICS writes, enable this */
5539         /* gpie |= IXGBE_GPIE_EIMEN; */
5540
5541         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
5542                 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
5543
5544                 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
5545                 case IXGBE_82599_VMDQ_8Q_MASK:
5546                         gpie |= IXGBE_GPIE_VTMODE_16;
5547                         break;
5548                 case IXGBE_82599_VMDQ_4Q_MASK:
5549                         gpie |= IXGBE_GPIE_VTMODE_32;
5550                         break;
5551                 default:
5552                         gpie |= IXGBE_GPIE_VTMODE_64;
5553                         break;
5554                 }
5555         }
5556
5557         /* Enable Thermal over heat sensor interrupt */
5558         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
5559                 switch (adapter->hw.mac.type) {
5560                 case ixgbe_mac_82599EB:
5561                         gpie |= IXGBE_SDP0_GPIEN_8259X;
5562                         break;
5563                 default:
5564                         break;
5565                 }
5566         }
5567
5568         /* Enable fan failure interrupt */
5569         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
5570                 gpie |= IXGBE_SDP1_GPIEN(hw);
5571
5572         switch (hw->mac.type) {
5573         case ixgbe_mac_82599EB:
5574                 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X;
5575                 break;
5576         case ixgbe_mac_X550EM_x:
5577         case ixgbe_mac_x550em_a:
5578                 gpie |= IXGBE_SDP0_GPIEN_X540;
5579                 break;
5580         default:
5581                 break;
5582         }
5583
5584         IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
5585 }
5586
5587 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
5588 {
5589         struct ixgbe_hw *hw = &adapter->hw;
5590         int err;
5591         u32 ctrl_ext;
5592
5593         ixgbe_get_hw_control(adapter);
5594         ixgbe_setup_gpie(adapter);
5595
5596         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
5597                 ixgbe_configure_msix(adapter);
5598         else
5599                 ixgbe_configure_msi_and_legacy(adapter);
5600
5601         /* enable the optics for 82599 SFP+ fiber */
5602         if (hw->mac.ops.enable_tx_laser)
5603                 hw->mac.ops.enable_tx_laser(hw);
5604
5605         if (hw->phy.ops.set_phy_power)
5606                 hw->phy.ops.set_phy_power(hw, true);
5607
5608         smp_mb__before_atomic();
5609         clear_bit(__IXGBE_DOWN, &adapter->state);
5610         ixgbe_napi_enable_all(adapter);
5611
5612         if (ixgbe_is_sfp(hw)) {
5613                 ixgbe_sfp_link_config(adapter);
5614         } else {
5615                 err = ixgbe_non_sfp_link_config(hw);
5616                 if (err)
5617                         e_err(probe, "link_config FAILED %d\n", err);
5618         }
5619
5620         /* clear any pending interrupts, may auto mask */
5621         IXGBE_READ_REG(hw, IXGBE_EICR);
5622         ixgbe_irq_enable(adapter, true, true);
5623
5624         /*
5625          * If this adapter has a fan, check to see if we had a failure
5626          * before we enabled the interrupt.
5627          */
5628         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
5629                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
5630                 if (esdp & IXGBE_ESDP_SDP1)
5631                         e_crit(drv, "Fan has stopped, replace the adapter\n");
5632         }
5633
5634         /* bring the link up in the watchdog, this could race with our first
5635          * link up interrupt but shouldn't be a problem */
5636         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5637         adapter->link_check_timeout = jiffies;
5638         mod_timer(&adapter->service_timer, jiffies);
5639
5640         /* Set PF Reset Done bit so PF/VF Mail Ops can work */
5641         ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
5642         ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
5643         IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
5644 }
5645
5646 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
5647 {
5648         WARN_ON(in_interrupt());
5649         /* put off any impending NetWatchDogTimeout */
5650         netif_trans_update(adapter->netdev);
5651
5652         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
5653                 usleep_range(1000, 2000);
5654         if (adapter->hw.phy.type == ixgbe_phy_fw)
5655                 ixgbe_watchdog_link_is_down(adapter);
5656         ixgbe_down(adapter);
5657         /*
5658          * If SR-IOV enabled then wait a bit before bringing the adapter
5659          * back up to give the VFs time to respond to the reset.  The
5660          * two second wait is based upon the watchdog timer cycle in
5661          * the VF driver.
5662          */
5663         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5664                 msleep(2000);
5665         ixgbe_up(adapter);
5666         clear_bit(__IXGBE_RESETTING, &adapter->state);
5667 }
5668
5669 void ixgbe_up(struct ixgbe_adapter *adapter)
5670 {
5671         /* hardware has been reset, we need to reload some things */
5672         ixgbe_configure(adapter);
5673
5674         ixgbe_up_complete(adapter);
5675 }
5676
5677 static unsigned long ixgbe_get_completion_timeout(struct ixgbe_adapter *adapter)
5678 {
5679         u16 devctl2;
5680
5681         pcie_capability_read_word(adapter->pdev, PCI_EXP_DEVCTL2, &devctl2);
5682
5683         switch (devctl2 & IXGBE_PCIDEVCTRL2_TIMEO_MASK) {
5684         case IXGBE_PCIDEVCTRL2_17_34s:
5685         case IXGBE_PCIDEVCTRL2_4_8s:
5686                 /* For now we cap the upper limit on delay to 2 seconds
5687                  * as we end up going up to 34 seconds of delay in worst
5688                  * case timeout value.
5689                  */
5690         case IXGBE_PCIDEVCTRL2_1_2s:
5691                 return 2000000ul;       /* 2.0 s */
5692         case IXGBE_PCIDEVCTRL2_260_520ms:
5693                 return 520000ul;        /* 520 ms */
5694         case IXGBE_PCIDEVCTRL2_65_130ms:
5695                 return 130000ul;        /* 130 ms */
5696         case IXGBE_PCIDEVCTRL2_16_32ms:
5697                 return 32000ul;         /* 32 ms */
5698         case IXGBE_PCIDEVCTRL2_1_2ms:
5699                 return 2000ul;          /* 2 ms */
5700         case IXGBE_PCIDEVCTRL2_50_100us:
5701                 return 100ul;           /* 100 us */
5702         case IXGBE_PCIDEVCTRL2_16_32ms_def:
5703                 return 32000ul;         /* 32 ms */
5704         default:
5705                 break;
5706         }
5707
5708         /* We shouldn't need to hit this path, but just in case default as
5709          * though completion timeout is not supported and support 32ms.
5710          */
5711         return 32000ul;
5712 }
5713
5714 void ixgbe_disable_rx(struct ixgbe_adapter *adapter)
5715 {
5716         unsigned long wait_delay, delay_interval;
5717         struct ixgbe_hw *hw = &adapter->hw;
5718         int i, wait_loop;
5719         u32 rxdctl;
5720
5721         /* disable receives */
5722         hw->mac.ops.disable_rx(hw);
5723
5724         if (ixgbe_removed(hw->hw_addr))
5725                 return;
5726
5727         /* disable all enabled Rx queues */
5728         for (i = 0; i < adapter->num_rx_queues; i++) {
5729                 struct ixgbe_ring *ring = adapter->rx_ring[i];
5730                 u8 reg_idx = ring->reg_idx;
5731
5732                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
5733                 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
5734                 rxdctl |= IXGBE_RXDCTL_SWFLSH;
5735
5736                 /* write value back with RXDCTL.ENABLE bit cleared */
5737                 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
5738         }
5739
5740         /* RXDCTL.EN may not change on 82598 if link is down, so skip it */
5741         if (hw->mac.type == ixgbe_mac_82598EB &&
5742             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
5743                 return;
5744
5745         /* Determine our minimum delay interval. We will increase this value
5746          * with each subsequent test. This way if the device returns quickly
5747          * we should spend as little time as possible waiting, however as
5748          * the time increases we will wait for larger periods of time.
5749          *
5750          * The trick here is that we increase the interval using the
5751          * following pattern: 1x 3x 5x 7x 9x 11x 13x 15x 17x 19x. The result
5752          * of that wait is that it totals up to 100x whatever interval we
5753          * choose. Since our minimum wait is 100us we can just divide the
5754          * total timeout by 100 to get our minimum delay interval.
5755          */
5756         delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
5757
5758         wait_loop = IXGBE_MAX_RX_DESC_POLL;
5759         wait_delay = delay_interval;
5760
5761         while (wait_loop--) {
5762                 usleep_range(wait_delay, wait_delay + 10);
5763                 wait_delay += delay_interval * 2;
5764                 rxdctl = 0;
5765
5766                 /* OR together the reading of all the active RXDCTL registers,
5767                  * and then test the result. We need the disable to complete
5768                  * before we start freeing the memory and invalidating the
5769                  * DMA mappings.
5770                  */
5771                 for (i = 0; i < adapter->num_rx_queues; i++) {
5772                         struct ixgbe_ring *ring = adapter->rx_ring[i];
5773                         u8 reg_idx = ring->reg_idx;
5774
5775                         rxdctl |= IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
5776                 }
5777
5778                 if (!(rxdctl & IXGBE_RXDCTL_ENABLE))
5779                         return;
5780         }
5781
5782         e_err(drv,
5783               "RXDCTL.ENABLE for one or more queues not cleared within the polling period\n");
5784 }
5785
5786 void ixgbe_disable_tx(struct ixgbe_adapter *adapter)
5787 {
5788         unsigned long wait_delay, delay_interval;
5789         struct ixgbe_hw *hw = &adapter->hw;
5790         int i, wait_loop;
5791         u32 txdctl;
5792
5793         if (ixgbe_removed(hw->hw_addr))
5794                 return;
5795
5796         /* disable all enabled Tx queues */
5797         for (i = 0; i < adapter->num_tx_queues; i++) {
5798                 struct ixgbe_ring *ring = adapter->tx_ring[i];
5799                 u8 reg_idx = ring->reg_idx;
5800
5801                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5802         }
5803
5804         /* disable all enabled XDP Tx queues */
5805         for (i = 0; i < adapter->num_xdp_queues; i++) {
5806                 struct ixgbe_ring *ring = adapter->xdp_ring[i];
5807                 u8 reg_idx = ring->reg_idx;
5808
5809                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5810         }
5811
5812         /* If the link is not up there shouldn't be much in the way of
5813          * pending transactions. Those that are left will be flushed out
5814          * when the reset logic goes through the flush sequence to clean out
5815          * the pending Tx transactions.
5816          */
5817         if (!(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
5818                 goto dma_engine_disable;
5819
5820         /* Determine our minimum delay interval. We will increase this value
5821          * with each subsequent test. This way if the device returns quickly
5822          * we should spend as little time as possible waiting, however as
5823          * the time increases we will wait for larger periods of time.
5824          *
5825          * The trick here is that we increase the interval using the
5826          * following pattern: 1x 3x 5x 7x 9x 11x 13x 15x 17x 19x. The result
5827          * of that wait is that it totals up to 100x whatever interval we
5828          * choose. Since our minimum wait is 100us we can just divide the
5829          * total timeout by 100 to get our minimum delay interval.
5830          */
5831         delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
5832
5833         wait_loop = IXGBE_MAX_RX_DESC_POLL;
5834         wait_delay = delay_interval;
5835
5836         while (wait_loop--) {
5837                 usleep_range(wait_delay, wait_delay + 10);
5838                 wait_delay += delay_interval * 2;
5839                 txdctl = 0;
5840
5841                 /* OR together the reading of all the active TXDCTL registers,
5842                  * and then test the result. We need the disable to complete
5843                  * before we start freeing the memory and invalidating the
5844                  * DMA mappings.
5845                  */
5846                 for (i = 0; i < adapter->num_tx_queues; i++) {
5847                         struct ixgbe_ring *ring = adapter->tx_ring[i];
5848                         u8 reg_idx = ring->reg_idx;
5849
5850                         txdctl |= IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
5851                 }
5852                 for (i = 0; i < adapter->num_xdp_queues; i++) {
5853                         struct ixgbe_ring *ring = adapter->xdp_ring[i];
5854                         u8 reg_idx = ring->reg_idx;
5855
5856                         txdctl |= IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
5857                 }
5858
5859                 if (!(txdctl & IXGBE_TXDCTL_ENABLE))
5860                         goto dma_engine_disable;
5861         }
5862
5863         e_err(drv,
5864               "TXDCTL.ENABLE for one or more queues not cleared within the polling period\n");
5865
5866 dma_engine_disable:
5867         /* Disable the Tx DMA engine on 82599 and later MAC */
5868         switch (hw->mac.type) {
5869         case ixgbe_mac_82599EB:
5870         case ixgbe_mac_X540:
5871         case ixgbe_mac_X550:
5872         case ixgbe_mac_X550EM_x:
5873         case ixgbe_mac_x550em_a:
5874                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5875                                 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5876                                  ~IXGBE_DMATXCTL_TE));
5877                 /* fall through */
5878         default:
5879                 break;
5880         }
5881 }
5882
5883 void ixgbe_reset(struct ixgbe_adapter *adapter)
5884 {
5885         struct ixgbe_hw *hw = &adapter->hw;
5886         struct net_device *netdev = adapter->netdev;
5887         int err;
5888
5889         if (ixgbe_removed(hw->hw_addr))
5890                 return;
5891         /* lock SFP init bit to prevent race conditions with the watchdog */
5892         while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5893                 usleep_range(1000, 2000);
5894
5895         /* clear all SFP and link config related flags while holding SFP_INIT */
5896         adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
5897                              IXGBE_FLAG2_SFP_NEEDS_RESET);
5898         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5899
5900         err = hw->mac.ops.init_hw(hw);
5901         switch (err) {
5902         case 0:
5903         case IXGBE_ERR_SFP_NOT_PRESENT:
5904         case IXGBE_ERR_SFP_NOT_SUPPORTED:
5905                 break;
5906         case IXGBE_ERR_MASTER_REQUESTS_PENDING:
5907                 e_dev_err("master disable timed out\n");
5908                 break;
5909         case IXGBE_ERR_EEPROM_VERSION:
5910                 /* We are running on a pre-production device, log a warning */
5911                 e_dev_warn("This device is a pre-production adapter/LOM. "
5912                            "Please be aware there may be issues associated with "
5913                            "your hardware.  If you are experiencing problems "
5914                            "please contact your Intel or hardware "
5915                            "representative who provided you with this "
5916                            "hardware.\n");
5917                 break;
5918         default:
5919                 e_dev_err("Hardware Error: %d\n", err);
5920         }
5921
5922         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5923
5924         /* flush entries out of MAC table */
5925         ixgbe_flush_sw_mac_table(adapter);
5926         __dev_uc_unsync(netdev, NULL);
5927
5928         /* do not flush user set addresses */
5929         ixgbe_mac_set_default_filter(adapter);
5930
5931         /* update SAN MAC vmdq pool selection */
5932         if (hw->mac.san_mac_rar_index)
5933                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5934
5935         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5936                 ixgbe_ptp_reset(adapter);
5937
5938         if (hw->phy.ops.set_phy_power) {
5939                 if (!netif_running(adapter->netdev) && !adapter->wol)
5940                         hw->phy.ops.set_phy_power(hw, false);
5941                 else
5942                         hw->phy.ops.set_phy_power(hw, true);
5943         }
5944 }
5945
5946 /**
5947  * ixgbe_clean_tx_ring - Free Tx Buffers
5948  * @tx_ring: ring to be cleaned
5949  **/
5950 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5951 {
5952         u16 i = tx_ring->next_to_clean;
5953         struct ixgbe_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
5954
5955         if (tx_ring->xsk_umem) {
5956                 ixgbe_xsk_clean_tx_ring(tx_ring);
5957                 goto out;
5958         }
5959
5960         while (i != tx_ring->next_to_use) {
5961                 union ixgbe_adv_tx_desc *eop_desc, *tx_desc;
5962
5963                 /* Free all the Tx ring sk_buffs */
5964                 if (ring_is_xdp(tx_ring))
5965                         xdp_return_frame(tx_buffer->xdpf);
5966                 else
5967                         dev_kfree_skb_any(tx_buffer->skb);
5968
5969                 /* unmap skb header data */
5970                 dma_unmap_single(tx_ring->dev,
5971                                  dma_unmap_addr(tx_buffer, dma),
5972                                  dma_unmap_len(tx_buffer, len),
5973                                  DMA_TO_DEVICE);
5974
5975                 /* check for eop_desc to determine the end of the packet */
5976                 eop_desc = tx_buffer->next_to_watch;
5977                 tx_desc = IXGBE_TX_DESC(tx_ring, i);
5978
5979                 /* unmap remaining buffers */
5980                 while (tx_desc != eop_desc) {
5981                         tx_buffer++;
5982                         tx_desc++;
5983                         i++;
5984                         if (unlikely(i == tx_ring->count)) {
5985                                 i = 0;
5986                                 tx_buffer = tx_ring->tx_buffer_info;
5987                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
5988                         }
5989
5990                         /* unmap any remaining paged data */
5991                         if (dma_unmap_len(tx_buffer, len))
5992                                 dma_unmap_page(tx_ring->dev,
5993                                                dma_unmap_addr(tx_buffer, dma),
5994                                                dma_unmap_len(tx_buffer, len),
5995                                                DMA_TO_DEVICE);
5996                 }
5997
5998                 /* move us one more past the eop_desc for start of next pkt */
5999                 tx_buffer++;
6000                 i++;
6001                 if (unlikely(i == tx_ring->count)) {
6002                         i = 0;
6003                         tx_buffer = tx_ring->tx_buffer_info;
6004                 }
6005         }
6006
6007         /* reset BQL for queue */
6008         if (!ring_is_xdp(tx_ring))
6009                 netdev_tx_reset_queue(txring_txq(tx_ring));
6010
6011 out:
6012         /* reset next_to_use and next_to_clean */
6013         tx_ring->next_to_use = 0;
6014         tx_ring->next_to_clean = 0;
6015 }
6016
6017 /**
6018  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
6019  * @adapter: board private structure
6020  **/
6021 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
6022 {
6023         int i;
6024
6025         for (i = 0; i < adapter->num_rx_queues; i++)
6026                 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
6027 }
6028
6029 /**
6030  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
6031  * @adapter: board private structure
6032  **/
6033 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
6034 {
6035         int i;
6036
6037         for (i = 0; i < adapter->num_tx_queues; i++)
6038                 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
6039         for (i = 0; i < adapter->num_xdp_queues; i++)
6040                 ixgbe_clean_tx_ring(adapter->xdp_ring[i]);
6041 }
6042
6043 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
6044 {
6045         struct hlist_node *node2;
6046         struct ixgbe_fdir_filter *filter;
6047
6048         spin_lock(&adapter->fdir_perfect_lock);
6049
6050         hlist_for_each_entry_safe(filter, node2,
6051                                   &adapter->fdir_filter_list, fdir_node) {
6052                 hlist_del(&filter->fdir_node);
6053                 kfree(filter);
6054         }
6055         adapter->fdir_filter_count = 0;
6056
6057         spin_unlock(&adapter->fdir_perfect_lock);
6058 }
6059
6060 void ixgbe_down(struct ixgbe_adapter *adapter)
6061 {
6062         struct net_device *netdev = adapter->netdev;
6063         struct ixgbe_hw *hw = &adapter->hw;
6064         int i;
6065
6066         /* signal that we are down to the interrupt handler */
6067         if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
6068                 return; /* do nothing if already down */
6069
6070         /* Shut off incoming Tx traffic */
6071         netif_tx_stop_all_queues(netdev);
6072
6073         /* call carrier off first to avoid false dev_watchdog timeouts */
6074         netif_carrier_off(netdev);
6075         netif_tx_disable(netdev);
6076
6077         /* Disable Rx */
6078         ixgbe_disable_rx(adapter);
6079
6080         /* synchronize_sched() needed for pending XDP buffers to drain */
6081         if (adapter->xdp_ring[0])
6082                 synchronize_sched();
6083
6084         ixgbe_irq_disable(adapter);
6085
6086         ixgbe_napi_disable_all(adapter);
6087
6088         clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
6089         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
6090         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
6091
6092         del_timer_sync(&adapter->service_timer);
6093
6094         if (adapter->num_vfs) {
6095                 /* Clear EITR Select mapping */
6096                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
6097
6098                 /* Mark all the VFs as inactive */
6099                 for (i = 0 ; i < adapter->num_vfs; i++)
6100                         adapter->vfinfo[i].clear_to_send = false;
6101
6102                 /* ping all the active vfs to let them know we are going down */
6103                 ixgbe_ping_all_vfs(adapter);
6104
6105                 /* Disable all VFTE/VFRE TX/RX */
6106                 ixgbe_disable_tx_rx(adapter);
6107         }
6108
6109         /* disable transmits in the hardware now that interrupts are off */
6110         ixgbe_disable_tx(adapter);
6111
6112         if (!pci_channel_offline(adapter->pdev))
6113                 ixgbe_reset(adapter);
6114
6115         /* power down the optics for 82599 SFP+ fiber */
6116         if (hw->mac.ops.disable_tx_laser)
6117                 hw->mac.ops.disable_tx_laser(hw);
6118
6119         ixgbe_clean_all_tx_rings(adapter);
6120         ixgbe_clean_all_rx_rings(adapter);
6121 }
6122
6123 /**
6124  * ixgbe_eee_capable - helper function to determine EEE support on X550
6125  * @adapter: board private structure
6126  */
6127 static void ixgbe_set_eee_capable(struct ixgbe_adapter *adapter)
6128 {
6129         struct ixgbe_hw *hw = &adapter->hw;
6130
6131         switch (hw->device_id) {
6132         case IXGBE_DEV_ID_X550EM_A_1G_T:
6133         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
6134                 if (!hw->phy.eee_speeds_supported)
6135                         break;
6136                 adapter->flags2 |= IXGBE_FLAG2_EEE_CAPABLE;
6137                 if (!hw->phy.eee_speeds_advertised)
6138                         break;
6139                 adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED;
6140                 break;
6141         default:
6142                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_CAPABLE;
6143                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED;
6144                 break;
6145         }
6146 }
6147
6148 /**
6149  * ixgbe_tx_timeout - Respond to a Tx Hang
6150  * @netdev: network interface device structure
6151  **/
6152 static void ixgbe_tx_timeout(struct net_device *netdev)
6153 {
6154         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6155
6156         /* Do the reset outside of interrupt context */
6157         ixgbe_tx_timeout_reset(adapter);
6158 }
6159
6160 #ifdef CONFIG_IXGBE_DCB
6161 static void ixgbe_init_dcb(struct ixgbe_adapter *adapter)
6162 {
6163         struct ixgbe_hw *hw = &adapter->hw;
6164         struct tc_configuration *tc;
6165         int j;
6166
6167         switch (hw->mac.type) {
6168         case ixgbe_mac_82598EB:
6169         case ixgbe_mac_82599EB:
6170                 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
6171                 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
6172                 break;
6173         case ixgbe_mac_X540:
6174         case ixgbe_mac_X550:
6175                 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
6176                 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
6177                 break;
6178         case ixgbe_mac_X550EM_x:
6179         case ixgbe_mac_x550em_a:
6180         default:
6181                 adapter->dcb_cfg.num_tcs.pg_tcs = DEF_TRAFFIC_CLASS;
6182                 adapter->dcb_cfg.num_tcs.pfc_tcs = DEF_TRAFFIC_CLASS;
6183                 break;
6184         }
6185
6186         /* Configure DCB traffic classes */
6187         for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
6188                 tc = &adapter->dcb_cfg.tc_config[j];
6189                 tc->path[DCB_TX_CONFIG].bwg_id = 0;
6190                 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
6191                 tc->path[DCB_RX_CONFIG].bwg_id = 0;
6192                 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
6193                 tc->dcb_pfc = pfc_disabled;
6194         }
6195
6196         /* Initialize default user to priority mapping, UPx->TC0 */
6197         tc = &adapter->dcb_cfg.tc_config[0];
6198         tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
6199         tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
6200
6201         adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
6202         adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
6203         adapter->dcb_cfg.pfc_mode_enable = false;
6204         adapter->dcb_set_bitmap = 0x00;
6205         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
6206                 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
6207         memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
6208                sizeof(adapter->temp_dcb_cfg));
6209 }
6210 #endif
6211
6212 /**
6213  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
6214  * @adapter: board private structure to initialize
6215  * @ii: pointer to ixgbe_info for device
6216  *
6217  * ixgbe_sw_init initializes the Adapter private data structure.
6218  * Fields are initialized based on PCI device information and
6219  * OS network device settings (MTU size).
6220  **/
6221 static int ixgbe_sw_init(struct ixgbe_adapter *adapter,
6222                          const struct ixgbe_info *ii)
6223 {
6224         struct ixgbe_hw *hw = &adapter->hw;
6225         struct pci_dev *pdev = adapter->pdev;
6226         unsigned int rss, fdir;
6227         u32 fwsm;
6228         int i;
6229
6230         /* PCI config space info */
6231
6232         hw->vendor_id = pdev->vendor;
6233         hw->device_id = pdev->device;
6234         hw->revision_id = pdev->revision;
6235         hw->subsystem_vendor_id = pdev->subsystem_vendor;
6236         hw->subsystem_device_id = pdev->subsystem_device;
6237
6238         /* get_invariants needs the device IDs */
6239         ii->get_invariants(hw);
6240
6241         /* Set common capability flags and settings */
6242         rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
6243         adapter->ring_feature[RING_F_RSS].limit = rss;
6244         adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
6245         adapter->max_q_vectors = MAX_Q_VECTORS_82599;
6246         adapter->atr_sample_rate = 20;
6247         fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
6248         adapter->ring_feature[RING_F_FDIR].limit = fdir;
6249         adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
6250         adapter->ring_feature[RING_F_VMDQ].limit = 1;
6251 #ifdef CONFIG_IXGBE_DCA
6252         adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
6253 #endif
6254 #ifdef CONFIG_IXGBE_DCB
6255         adapter->flags |= IXGBE_FLAG_DCB_CAPABLE;
6256         adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
6257 #endif
6258 #ifdef IXGBE_FCOE
6259         adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
6260         adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6261 #ifdef CONFIG_IXGBE_DCB
6262         /* Default traffic class to use for FCoE */
6263         adapter->fcoe.up = IXGBE_FCOE_DEFTC;
6264 #endif /* CONFIG_IXGBE_DCB */
6265 #endif /* IXGBE_FCOE */
6266
6267         /* initialize static ixgbe jump table entries */
6268         adapter->jump_tables[0] = kzalloc(sizeof(*adapter->jump_tables[0]),
6269                                           GFP_KERNEL);
6270         if (!adapter->jump_tables[0])
6271                 return -ENOMEM;
6272         adapter->jump_tables[0]->mat = ixgbe_ipv4_fields;
6273
6274         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++)
6275                 adapter->jump_tables[i] = NULL;
6276
6277         adapter->mac_table = kcalloc(hw->mac.num_rar_entries,
6278                                      sizeof(struct ixgbe_mac_addr),
6279                                      GFP_KERNEL);
6280         if (!adapter->mac_table)
6281                 return -ENOMEM;
6282
6283         if (ixgbe_init_rss_key(adapter))
6284                 return -ENOMEM;
6285
6286         /* Set MAC specific capability flags and exceptions */
6287         switch (hw->mac.type) {
6288         case ixgbe_mac_82598EB:
6289                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
6290
6291                 if (hw->device_id == IXGBE_DEV_ID_82598AT)
6292                         adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
6293
6294                 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
6295                 adapter->ring_feature[RING_F_FDIR].limit = 0;
6296                 adapter->atr_sample_rate = 0;
6297                 adapter->fdir_pballoc = 0;
6298 #ifdef IXGBE_FCOE
6299                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6300                 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6301 #ifdef CONFIG_IXGBE_DCB
6302                 adapter->fcoe.up = 0;
6303 #endif /* IXGBE_DCB */
6304 #endif /* IXGBE_FCOE */
6305                 break;
6306         case ixgbe_mac_82599EB:
6307                 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
6308                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6309                 break;
6310         case ixgbe_mac_X540:
6311                 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
6312                 if (fwsm & IXGBE_FWSM_TS_ENABLED)
6313                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6314                 break;
6315         case ixgbe_mac_x550em_a:
6316                 adapter->flags |= IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE;
6317                 switch (hw->device_id) {
6318                 case IXGBE_DEV_ID_X550EM_A_1G_T:
6319                 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
6320                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6321                         break;
6322                 default:
6323                         break;
6324                 }
6325         /* fall through */
6326         case ixgbe_mac_X550EM_x:
6327 #ifdef CONFIG_IXGBE_DCB
6328                 adapter->flags &= ~IXGBE_FLAG_DCB_CAPABLE;
6329 #endif
6330 #ifdef IXGBE_FCOE
6331                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6332 #ifdef CONFIG_IXGBE_DCB
6333                 adapter->fcoe.up = 0;
6334 #endif /* IXGBE_DCB */
6335 #endif /* IXGBE_FCOE */
6336         /* Fall Through */
6337         case ixgbe_mac_X550:
6338                 if (hw->mac.type == ixgbe_mac_X550)
6339                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6340 #ifdef CONFIG_IXGBE_DCA
6341                 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
6342 #endif
6343                 adapter->flags |= IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE;
6344                 break;
6345         default:
6346                 break;
6347         }
6348
6349 #ifdef IXGBE_FCOE
6350         /* FCoE support exists, always init the FCoE lock */
6351         spin_lock_init(&adapter->fcoe.lock);
6352
6353 #endif
6354         /* n-tuple support exists, always init our spinlock */
6355         spin_lock_init(&adapter->fdir_perfect_lock);
6356
6357 #ifdef CONFIG_IXGBE_DCB
6358         ixgbe_init_dcb(adapter);
6359 #endif
6360         ixgbe_init_ipsec_offload(adapter);
6361
6362         /* default flow control settings */
6363         hw->fc.requested_mode = ixgbe_fc_full;
6364         hw->fc.current_mode = ixgbe_fc_full;    /* init for ethtool output */
6365         ixgbe_pbthresh_setup(adapter);
6366         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
6367         hw->fc.send_xon = true;
6368         hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
6369
6370 #ifdef CONFIG_PCI_IOV
6371         if (max_vfs > 0)
6372                 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
6373
6374         /* assign number of SR-IOV VFs */
6375         if (hw->mac.type != ixgbe_mac_82598EB) {
6376                 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
6377                         max_vfs = 0;
6378                         e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
6379                 }
6380         }
6381 #endif /* CONFIG_PCI_IOV */
6382
6383         /* enable itr by default in dynamic mode */
6384         adapter->rx_itr_setting = 1;
6385         adapter->tx_itr_setting = 1;
6386
6387         /* set default ring sizes */
6388         adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
6389         adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
6390
6391         /* set default work limits */
6392         adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
6393
6394         /* initialize eeprom parameters */
6395         if (ixgbe_init_eeprom_params_generic(hw)) {
6396                 e_dev_err("EEPROM initialization failed\n");
6397                 return -EIO;
6398         }
6399
6400         /* PF holds first pool slot */
6401         set_bit(0, adapter->fwd_bitmask);
6402         set_bit(__IXGBE_DOWN, &adapter->state);
6403
6404         return 0;
6405 }
6406
6407 /**
6408  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
6409  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
6410  *
6411  * Return 0 on success, negative on failure
6412  **/
6413 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
6414 {
6415         struct device *dev = tx_ring->dev;
6416         int orig_node = dev_to_node(dev);
6417         int ring_node = -1;
6418         int size;
6419
6420         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
6421
6422         if (tx_ring->q_vector)
6423                 ring_node = tx_ring->q_vector->numa_node;
6424
6425         tx_ring->tx_buffer_info = vmalloc_node(size, ring_node);
6426         if (!tx_ring->tx_buffer_info)
6427                 tx_ring->tx_buffer_info = vmalloc(size);
6428         if (!tx_ring->tx_buffer_info)
6429                 goto err;
6430
6431         /* round up to nearest 4K */
6432         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
6433         tx_ring->size = ALIGN(tx_ring->size, 4096);
6434
6435         set_dev_node(dev, ring_node);
6436         tx_ring->desc = dma_alloc_coherent(dev,
6437                                            tx_ring->size,
6438                                            &tx_ring->dma,
6439                                            GFP_KERNEL);
6440         set_dev_node(dev, orig_node);
6441         if (!tx_ring->desc)
6442                 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
6443                                                    &tx_ring->dma, GFP_KERNEL);
6444         if (!tx_ring->desc)
6445                 goto err;
6446
6447         tx_ring->next_to_use = 0;
6448         tx_ring->next_to_clean = 0;
6449         return 0;
6450
6451 err:
6452         vfree(tx_ring->tx_buffer_info);
6453         tx_ring->tx_buffer_info = NULL;
6454         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
6455         return -ENOMEM;
6456 }
6457
6458 /**
6459  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
6460  * @adapter: board private structure
6461  *
6462  * If this function returns with an error, then it's possible one or
6463  * more of the rings is populated (while the rest are not).  It is the
6464  * callers duty to clean those orphaned rings.
6465  *
6466  * Return 0 on success, negative on failure
6467  **/
6468 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
6469 {
6470         int i, j = 0, err = 0;
6471
6472         for (i = 0; i < adapter->num_tx_queues; i++) {
6473                 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
6474                 if (!err)
6475                         continue;
6476
6477                 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
6478                 goto err_setup_tx;
6479         }
6480         for (j = 0; j < adapter->num_xdp_queues; j++) {
6481                 err = ixgbe_setup_tx_resources(adapter->xdp_ring[j]);
6482                 if (!err)
6483                         continue;
6484
6485                 e_err(probe, "Allocation for Tx Queue %u failed\n", j);
6486                 goto err_setup_tx;
6487         }
6488
6489         return 0;
6490 err_setup_tx:
6491         /* rewind the index freeing the rings as we go */
6492         while (j--)
6493                 ixgbe_free_tx_resources(adapter->xdp_ring[j]);
6494         while (i--)
6495                 ixgbe_free_tx_resources(adapter->tx_ring[i]);
6496         return err;
6497 }
6498
6499 /**
6500  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
6501  * @adapter: pointer to ixgbe_adapter
6502  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
6503  *
6504  * Returns 0 on success, negative on failure
6505  **/
6506 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
6507                              struct ixgbe_ring *rx_ring)
6508 {
6509         struct device *dev = rx_ring->dev;
6510         int orig_node = dev_to_node(dev);
6511         int ring_node = -1;
6512         int size;
6513
6514         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
6515
6516         if (rx_ring->q_vector)
6517                 ring_node = rx_ring->q_vector->numa_node;
6518
6519         rx_ring->rx_buffer_info = vmalloc_node(size, ring_node);
6520         if (!rx_ring->rx_buffer_info)
6521                 rx_ring->rx_buffer_info = vmalloc(size);
6522         if (!rx_ring->rx_buffer_info)
6523                 goto err;
6524
6525         /* Round up to nearest 4K */
6526         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
6527         rx_ring->size = ALIGN(rx_ring->size, 4096);
6528
6529         set_dev_node(dev, ring_node);
6530         rx_ring->desc = dma_alloc_coherent(dev,
6531                                            rx_ring->size,
6532                                            &rx_ring->dma,
6533                                            GFP_KERNEL);
6534         set_dev_node(dev, orig_node);
6535         if (!rx_ring->desc)
6536                 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
6537                                                    &rx_ring->dma, GFP_KERNEL);
6538         if (!rx_ring->desc)
6539                 goto err;
6540
6541         rx_ring->next_to_clean = 0;
6542         rx_ring->next_to_use = 0;
6543
6544         /* XDP RX-queue info */
6545         if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, adapter->netdev,
6546                              rx_ring->queue_index) < 0)
6547                 goto err;
6548
6549         rx_ring->xdp_prog = adapter->xdp_prog;
6550
6551         return 0;
6552 err:
6553         vfree(rx_ring->rx_buffer_info);
6554         rx_ring->rx_buffer_info = NULL;
6555         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
6556         return -ENOMEM;
6557 }
6558
6559 /**
6560  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
6561  * @adapter: board private structure
6562  *
6563  * If this function returns with an error, then it's possible one or
6564  * more of the rings is populated (while the rest are not).  It is the
6565  * callers duty to clean those orphaned rings.
6566  *
6567  * Return 0 on success, negative on failure
6568  **/
6569 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
6570 {
6571         int i, err = 0;
6572
6573         for (i = 0; i < adapter->num_rx_queues; i++) {
6574                 err = ixgbe_setup_rx_resources(adapter, adapter->rx_ring[i]);
6575                 if (!err)
6576                         continue;
6577
6578                 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
6579                 goto err_setup_rx;
6580         }
6581
6582 #ifdef IXGBE_FCOE
6583         err = ixgbe_setup_fcoe_ddp_resources(adapter);
6584         if (!err)
6585 #endif
6586                 return 0;
6587 err_setup_rx:
6588         /* rewind the index freeing the rings as we go */
6589         while (i--)
6590                 ixgbe_free_rx_resources(adapter->rx_ring[i]);
6591         return err;
6592 }
6593
6594 /**
6595  * ixgbe_free_tx_resources - Free Tx Resources per Queue
6596  * @tx_ring: Tx descriptor ring for a specific queue
6597  *
6598  * Free all transmit software resources
6599  **/
6600 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
6601 {
6602         ixgbe_clean_tx_ring(tx_ring);
6603
6604         vfree(tx_ring->tx_buffer_info);
6605         tx_ring->tx_buffer_info = NULL;
6606
6607         /* if not set, then don't free */
6608         if (!tx_ring->desc)
6609                 return;
6610
6611         dma_free_coherent(tx_ring->dev, tx_ring->size,
6612                           tx_ring->desc, tx_ring->dma);
6613
6614         tx_ring->desc = NULL;
6615 }
6616
6617 /**
6618  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
6619  * @adapter: board private structure
6620  *
6621  * Free all transmit software resources
6622  **/
6623 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
6624 {
6625         int i;
6626
6627         for (i = 0; i < adapter->num_tx_queues; i++)
6628                 if (adapter->tx_ring[i]->desc)
6629                         ixgbe_free_tx_resources(adapter->tx_ring[i]);
6630         for (i = 0; i < adapter->num_xdp_queues; i++)
6631                 if (adapter->xdp_ring[i]->desc)
6632                         ixgbe_free_tx_resources(adapter->xdp_ring[i]);
6633 }
6634
6635 /**
6636  * ixgbe_free_rx_resources - Free Rx Resources
6637  * @rx_ring: ring to clean the resources from
6638  *
6639  * Free all receive software resources
6640  **/
6641 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
6642 {
6643         ixgbe_clean_rx_ring(rx_ring);
6644
6645         rx_ring->xdp_prog = NULL;
6646         xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
6647         vfree(rx_ring->rx_buffer_info);
6648         rx_ring->rx_buffer_info = NULL;
6649
6650         /* if not set, then don't free */
6651         if (!rx_ring->desc)
6652                 return;
6653
6654         dma_free_coherent(rx_ring->dev, rx_ring->size,
6655                           rx_ring->desc, rx_ring->dma);
6656
6657         rx_ring->desc = NULL;
6658 }
6659
6660 /**
6661  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
6662  * @adapter: board private structure
6663  *
6664  * Free all receive software resources
6665  **/
6666 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
6667 {
6668         int i;
6669
6670 #ifdef IXGBE_FCOE
6671         ixgbe_free_fcoe_ddp_resources(adapter);
6672
6673 #endif
6674         for (i = 0; i < adapter->num_rx_queues; i++)
6675                 if (adapter->rx_ring[i]->desc)
6676                         ixgbe_free_rx_resources(adapter->rx_ring[i]);
6677 }
6678
6679 /**
6680  * ixgbe_change_mtu - Change the Maximum Transfer Unit
6681  * @netdev: network interface device structure
6682  * @new_mtu: new value for maximum frame size
6683  *
6684  * Returns 0 on success, negative on failure
6685  **/
6686 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
6687 {
6688         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6689
6690         if (adapter->xdp_prog) {
6691                 int new_frame_size = new_mtu + ETH_HLEN + ETH_FCS_LEN +
6692                                      VLAN_HLEN;
6693                 int i;
6694
6695                 for (i = 0; i < adapter->num_rx_queues; i++) {
6696                         struct ixgbe_ring *ring = adapter->rx_ring[i];
6697
6698                         if (new_frame_size > ixgbe_rx_bufsz(ring)) {
6699                                 e_warn(probe, "Requested MTU size is not supported with XDP\n");
6700                                 return -EINVAL;
6701                         }
6702                 }
6703         }
6704
6705         /*
6706          * For 82599EB we cannot allow legacy VFs to enable their receive
6707          * paths when MTU greater than 1500 is configured.  So display a
6708          * warning that legacy VFs will be disabled.
6709          */
6710         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
6711             (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
6712             (new_mtu > ETH_DATA_LEN))
6713                 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
6714
6715         e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
6716
6717         /* must set new MTU before calling down or up */
6718         netdev->mtu = new_mtu;
6719
6720         if (netif_running(netdev))
6721                 ixgbe_reinit_locked(adapter);
6722
6723         return 0;
6724 }
6725
6726 /**
6727  * ixgbe_open - Called when a network interface is made active
6728  * @netdev: network interface device structure
6729  *
6730  * Returns 0 on success, negative value on failure
6731  *
6732  * The open entry point is called when a network interface is made
6733  * active by the system (IFF_UP).  At this point all resources needed
6734  * for transmit and receive operations are allocated, the interrupt
6735  * handler is registered with the OS, the watchdog timer is started,
6736  * and the stack is notified that the interface is ready.
6737  **/
6738 int ixgbe_open(struct net_device *netdev)
6739 {
6740         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6741         struct ixgbe_hw *hw = &adapter->hw;
6742         int err, queues;
6743
6744         /* disallow open during test */
6745         if (test_bit(__IXGBE_TESTING, &adapter->state))
6746                 return -EBUSY;
6747
6748         netif_carrier_off(netdev);
6749
6750         /* allocate transmit descriptors */
6751         err = ixgbe_setup_all_tx_resources(adapter);
6752         if (err)
6753                 goto err_setup_tx;
6754
6755         /* allocate receive descriptors */
6756         err = ixgbe_setup_all_rx_resources(adapter);
6757         if (err)
6758                 goto err_setup_rx;
6759
6760         ixgbe_configure(adapter);
6761
6762         err = ixgbe_request_irq(adapter);
6763         if (err)
6764                 goto err_req_irq;
6765
6766         /* Notify the stack of the actual queue counts. */
6767         queues = adapter->num_tx_queues;
6768         err = netif_set_real_num_tx_queues(netdev, queues);
6769         if (err)
6770                 goto err_set_queues;
6771
6772         queues = adapter->num_rx_queues;
6773         err = netif_set_real_num_rx_queues(netdev, queues);
6774         if (err)
6775                 goto err_set_queues;
6776
6777         ixgbe_ptp_init(adapter);
6778
6779         ixgbe_up_complete(adapter);
6780
6781         ixgbe_clear_udp_tunnel_port(adapter, IXGBE_VXLANCTRL_ALL_UDPPORT_MASK);
6782         udp_tunnel_get_rx_info(netdev);
6783
6784         return 0;
6785
6786 err_set_queues:
6787         ixgbe_free_irq(adapter);
6788 err_req_irq:
6789         ixgbe_free_all_rx_resources(adapter);
6790         if (hw->phy.ops.set_phy_power && !adapter->wol)
6791                 hw->phy.ops.set_phy_power(&adapter->hw, false);
6792 err_setup_rx:
6793         ixgbe_free_all_tx_resources(adapter);
6794 err_setup_tx:
6795         ixgbe_reset(adapter);
6796
6797         return err;
6798 }
6799
6800 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
6801 {
6802         ixgbe_ptp_suspend(adapter);
6803
6804         if (adapter->hw.phy.ops.enter_lplu) {
6805                 adapter->hw.phy.reset_disable = true;
6806                 ixgbe_down(adapter);
6807                 adapter->hw.phy.ops.enter_lplu(&adapter->hw);
6808                 adapter->hw.phy.reset_disable = false;
6809         } else {
6810                 ixgbe_down(adapter);
6811         }
6812
6813         ixgbe_free_irq(adapter);
6814
6815         ixgbe_free_all_tx_resources(adapter);
6816         ixgbe_free_all_rx_resources(adapter);
6817 }
6818
6819 /**
6820  * ixgbe_close - Disables a network interface
6821  * @netdev: network interface device structure
6822  *
6823  * Returns 0, this is not allowed to fail
6824  *
6825  * The close entry point is called when an interface is de-activated
6826  * by the OS.  The hardware is still under the drivers control, but
6827  * needs to be disabled.  A global MAC reset is issued to stop the
6828  * hardware, and all transmit and receive resources are freed.
6829  **/
6830 int ixgbe_close(struct net_device *netdev)
6831 {
6832         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6833
6834         ixgbe_ptp_stop(adapter);
6835
6836         if (netif_device_present(netdev))
6837                 ixgbe_close_suspend(adapter);
6838
6839         ixgbe_fdir_filter_exit(adapter);
6840
6841         ixgbe_release_hw_control(adapter);
6842
6843         return 0;
6844 }
6845
6846 #ifdef CONFIG_PM
6847 static int ixgbe_resume(struct pci_dev *pdev)
6848 {
6849         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6850         struct net_device *netdev = adapter->netdev;
6851         u32 err;
6852
6853         adapter->hw.hw_addr = adapter->io_addr;
6854         pci_set_power_state(pdev, PCI_D0);
6855         pci_restore_state(pdev);
6856         /*
6857          * pci_restore_state clears dev->state_saved so call
6858          * pci_save_state to restore it.
6859          */
6860         pci_save_state(pdev);
6861
6862         err = pci_enable_device_mem(pdev);
6863         if (err) {
6864                 e_dev_err("Cannot enable PCI device from suspend\n");
6865                 return err;
6866         }
6867         smp_mb__before_atomic();
6868         clear_bit(__IXGBE_DISABLED, &adapter->state);
6869         pci_set_master(pdev);
6870
6871         pci_wake_from_d3(pdev, false);
6872
6873         ixgbe_reset(adapter);
6874
6875         IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
6876
6877         rtnl_lock();
6878         err = ixgbe_init_interrupt_scheme(adapter);
6879         if (!err && netif_running(netdev))
6880                 err = ixgbe_open(netdev);
6881
6882
6883         if (!err)
6884                 netif_device_attach(netdev);
6885         rtnl_unlock();
6886
6887         return err;
6888 }
6889 #endif /* CONFIG_PM */
6890
6891 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
6892 {
6893         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6894         struct net_device *netdev = adapter->netdev;
6895         struct ixgbe_hw *hw = &adapter->hw;
6896         u32 ctrl;
6897         u32 wufc = adapter->wol;
6898 #ifdef CONFIG_PM
6899         int retval = 0;
6900 #endif
6901
6902         rtnl_lock();
6903         netif_device_detach(netdev);
6904
6905         if (netif_running(netdev))
6906                 ixgbe_close_suspend(adapter);
6907
6908         ixgbe_clear_interrupt_scheme(adapter);
6909         rtnl_unlock();
6910
6911 #ifdef CONFIG_PM
6912         retval = pci_save_state(pdev);
6913         if (retval)
6914                 return retval;
6915
6916 #endif
6917         if (hw->mac.ops.stop_link_on_d3)
6918                 hw->mac.ops.stop_link_on_d3(hw);
6919
6920         if (wufc) {
6921                 u32 fctrl;
6922
6923                 ixgbe_set_rx_mode(netdev);
6924
6925                 /* enable the optics for 82599 SFP+ fiber as we can WoL */
6926                 if (hw->mac.ops.enable_tx_laser)
6927                         hw->mac.ops.enable_tx_laser(hw);
6928
6929                 /* enable the reception of multicast packets */
6930                 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6931                 fctrl |= IXGBE_FCTRL_MPE;
6932                 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
6933
6934                 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
6935                 ctrl |= IXGBE_CTRL_GIO_DIS;
6936                 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
6937
6938                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
6939         } else {
6940                 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
6941                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
6942         }
6943
6944         switch (hw->mac.type) {
6945         case ixgbe_mac_82598EB:
6946                 pci_wake_from_d3(pdev, false);
6947                 break;
6948         case ixgbe_mac_82599EB:
6949         case ixgbe_mac_X540:
6950         case ixgbe_mac_X550:
6951         case ixgbe_mac_X550EM_x:
6952         case ixgbe_mac_x550em_a:
6953                 pci_wake_from_d3(pdev, !!wufc);
6954                 break;
6955         default:
6956                 break;
6957         }
6958
6959         *enable_wake = !!wufc;
6960         if (hw->phy.ops.set_phy_power && !*enable_wake)
6961                 hw->phy.ops.set_phy_power(hw, false);
6962
6963         ixgbe_release_hw_control(adapter);
6964
6965         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
6966                 pci_disable_device(pdev);
6967
6968         return 0;
6969 }
6970
6971 #ifdef CONFIG_PM
6972 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
6973 {
6974         int retval;
6975         bool wake;
6976
6977         retval = __ixgbe_shutdown(pdev, &wake);
6978         if (retval)
6979                 return retval;
6980
6981         if (wake) {
6982                 pci_prepare_to_sleep(pdev);
6983         } else {
6984                 pci_wake_from_d3(pdev, false);
6985                 pci_set_power_state(pdev, PCI_D3hot);
6986         }
6987
6988         return 0;
6989 }
6990 #endif /* CONFIG_PM */
6991
6992 static void ixgbe_shutdown(struct pci_dev *pdev)
6993 {
6994         bool wake;
6995
6996         __ixgbe_shutdown(pdev, &wake);
6997
6998         if (system_state == SYSTEM_POWER_OFF) {
6999                 pci_wake_from_d3(pdev, wake);
7000                 pci_set_power_state(pdev, PCI_D3hot);
7001         }
7002 }
7003
7004 /**
7005  * ixgbe_update_stats - Update the board statistics counters.
7006  * @adapter: board private structure
7007  **/
7008 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
7009 {
7010         struct net_device *netdev = adapter->netdev;
7011         struct ixgbe_hw *hw = &adapter->hw;
7012         struct ixgbe_hw_stats *hwstats = &adapter->stats;
7013         u64 total_mpc = 0;
7014         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
7015         u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
7016         u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
7017         u64 alloc_rx_page = 0;
7018         u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
7019
7020         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7021             test_bit(__IXGBE_RESETTING, &adapter->state))
7022                 return;
7023
7024         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
7025                 u64 rsc_count = 0;
7026                 u64 rsc_flush = 0;
7027                 for (i = 0; i < adapter->num_rx_queues; i++) {
7028                         rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
7029                         rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
7030                 }
7031                 adapter->rsc_total_count = rsc_count;
7032                 adapter->rsc_total_flush = rsc_flush;
7033         }
7034
7035         for (i = 0; i < adapter->num_rx_queues; i++) {
7036                 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
7037                 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
7038                 alloc_rx_page += rx_ring->rx_stats.alloc_rx_page;
7039                 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
7040                 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
7041                 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
7042                 bytes += rx_ring->stats.bytes;
7043                 packets += rx_ring->stats.packets;
7044         }
7045         adapter->non_eop_descs = non_eop_descs;
7046         adapter->alloc_rx_page = alloc_rx_page;
7047         adapter->alloc_rx_page_failed = alloc_rx_page_failed;
7048         adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
7049         adapter->hw_csum_rx_error = hw_csum_rx_error;
7050         netdev->stats.rx_bytes = bytes;
7051         netdev->stats.rx_packets = packets;
7052
7053         bytes = 0;
7054         packets = 0;
7055         /* gather some stats to the adapter struct that are per queue */
7056         for (i = 0; i < adapter->num_tx_queues; i++) {
7057                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
7058                 restart_queue += tx_ring->tx_stats.restart_queue;
7059                 tx_busy += tx_ring->tx_stats.tx_busy;
7060                 bytes += tx_ring->stats.bytes;
7061                 packets += tx_ring->stats.packets;
7062         }
7063         for (i = 0; i < adapter->num_xdp_queues; i++) {
7064                 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i];
7065
7066                 restart_queue += xdp_ring->tx_stats.restart_queue;
7067                 tx_busy += xdp_ring->tx_stats.tx_busy;
7068                 bytes += xdp_ring->stats.bytes;
7069                 packets += xdp_ring->stats.packets;
7070         }
7071         adapter->restart_queue = restart_queue;
7072         adapter->tx_busy = tx_busy;
7073         netdev->stats.tx_bytes = bytes;
7074         netdev->stats.tx_packets = packets;
7075
7076         hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
7077
7078         /* 8 register reads */
7079         for (i = 0; i < 8; i++) {
7080                 /* for packet buffers not used, the register should read 0 */
7081                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
7082                 missed_rx += mpc;
7083                 hwstats->mpc[i] += mpc;
7084                 total_mpc += hwstats->mpc[i];
7085                 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
7086                 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
7087                 switch (hw->mac.type) {
7088                 case ixgbe_mac_82598EB:
7089                         hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
7090                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
7091                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
7092                         hwstats->pxonrxc[i] +=
7093                                 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
7094                         break;
7095                 case ixgbe_mac_82599EB:
7096                 case ixgbe_mac_X540:
7097                 case ixgbe_mac_X550:
7098                 case ixgbe_mac_X550EM_x:
7099                 case ixgbe_mac_x550em_a:
7100                         hwstats->pxonrxc[i] +=
7101                                 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
7102                         break;
7103                 default:
7104                         break;
7105                 }
7106         }
7107
7108         /*16 register reads */
7109         for (i = 0; i < 16; i++) {
7110                 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
7111                 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
7112                 if ((hw->mac.type == ixgbe_mac_82599EB) ||
7113                     (hw->mac.type == ixgbe_mac_X540) ||
7114                     (hw->mac.type == ixgbe_mac_X550) ||
7115                     (hw->mac.type == ixgbe_mac_X550EM_x) ||
7116                     (hw->mac.type == ixgbe_mac_x550em_a)) {
7117                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
7118                         IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
7119                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
7120                         IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
7121                 }
7122         }
7123
7124         hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
7125         /* work around hardware counting issue */
7126         hwstats->gprc -= missed_rx;
7127
7128         ixgbe_update_xoff_received(adapter);
7129
7130         /* 82598 hardware only has a 32 bit counter in the high register */
7131         switch (hw->mac.type) {
7132         case ixgbe_mac_82598EB:
7133                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
7134                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
7135                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
7136                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
7137                 break;
7138         case ixgbe_mac_X540:
7139         case ixgbe_mac_X550:
7140         case ixgbe_mac_X550EM_x:
7141         case ixgbe_mac_x550em_a:
7142                 /* OS2BMC stats are X540 and later */
7143                 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
7144                 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
7145                 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
7146                 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
7147                 /* fall through */
7148         case ixgbe_mac_82599EB:
7149                 for (i = 0; i < 16; i++)
7150                         adapter->hw_rx_no_dma_resources +=
7151                                              IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
7152                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
7153                 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
7154                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
7155                 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
7156                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
7157                 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
7158                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
7159                 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
7160                 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
7161 #ifdef IXGBE_FCOE
7162                 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
7163                 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
7164                 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
7165                 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
7166                 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
7167                 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
7168                 /* Add up per cpu counters for total ddp aloc fail */
7169                 if (adapter->fcoe.ddp_pool) {
7170                         struct ixgbe_fcoe *fcoe = &adapter->fcoe;
7171                         struct ixgbe_fcoe_ddp_pool *ddp_pool;
7172                         unsigned int cpu;
7173                         u64 noddp = 0, noddp_ext_buff = 0;
7174                         for_each_possible_cpu(cpu) {
7175                                 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
7176                                 noddp += ddp_pool->noddp;
7177                                 noddp_ext_buff += ddp_pool->noddp_ext_buff;
7178                         }
7179                         hwstats->fcoe_noddp = noddp;
7180                         hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
7181                 }
7182 #endif /* IXGBE_FCOE */
7183                 break;
7184         default:
7185                 break;
7186         }
7187         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
7188         hwstats->bprc += bprc;
7189         hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
7190         if (hw->mac.type == ixgbe_mac_82598EB)
7191                 hwstats->mprc -= bprc;
7192         hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
7193         hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
7194         hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
7195         hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
7196         hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
7197         hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
7198         hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
7199         hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
7200         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
7201         hwstats->lxontxc += lxon;
7202         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
7203         hwstats->lxofftxc += lxoff;
7204         hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
7205         hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
7206         /*
7207          * 82598 errata - tx of flow control packets is included in tx counters
7208          */
7209         xon_off_tot = lxon + lxoff;
7210         hwstats->gptc -= xon_off_tot;
7211         hwstats->mptc -= xon_off_tot;
7212         hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
7213         hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
7214         hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
7215         hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
7216         hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
7217         hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
7218         hwstats->ptc64 -= xon_off_tot;
7219         hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
7220         hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
7221         hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
7222         hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
7223         hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
7224         hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
7225
7226         /* Fill out the OS statistics structure */
7227         netdev->stats.multicast = hwstats->mprc;
7228
7229         /* Rx Errors */
7230         netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
7231         netdev->stats.rx_dropped = 0;
7232         netdev->stats.rx_length_errors = hwstats->rlec;
7233         netdev->stats.rx_crc_errors = hwstats->crcerrs;
7234         netdev->stats.rx_missed_errors = total_mpc;
7235 }
7236
7237 /**
7238  * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
7239  * @adapter: pointer to the device adapter structure
7240  **/
7241 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
7242 {
7243         struct ixgbe_hw *hw = &adapter->hw;
7244         int i;
7245
7246         if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
7247                 return;
7248
7249         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
7250
7251         /* if interface is down do nothing */
7252         if (test_bit(__IXGBE_DOWN, &adapter->state))
7253                 return;
7254
7255         /* do nothing if we are not using signature filters */
7256         if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
7257                 return;
7258
7259         adapter->fdir_overflow++;
7260
7261         if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
7262                 for (i = 0; i < adapter->num_tx_queues; i++)
7263                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7264                                 &(adapter->tx_ring[i]->state));
7265                 for (i = 0; i < adapter->num_xdp_queues; i++)
7266                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7267                                 &adapter->xdp_ring[i]->state);
7268                 /* re-enable flow director interrupts */
7269                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
7270         } else {
7271                 e_err(probe, "failed to finish FDIR re-initialization, "
7272                       "ignored adding FDIR ATR filters\n");
7273         }
7274 }
7275
7276 /**
7277  * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
7278  * @adapter: pointer to the device adapter structure
7279  *
7280  * This function serves two purposes.  First it strobes the interrupt lines
7281  * in order to make certain interrupts are occurring.  Secondly it sets the
7282  * bits needed to check for TX hangs.  As a result we should immediately
7283  * determine if a hang has occurred.
7284  */
7285 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
7286 {
7287         struct ixgbe_hw *hw = &adapter->hw;
7288         u64 eics = 0;
7289         int i;
7290
7291         /* If we're down, removing or resetting, just bail */
7292         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7293             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7294             test_bit(__IXGBE_RESETTING, &adapter->state))
7295                 return;
7296
7297         /* Force detection of hung controller */
7298         if (netif_carrier_ok(adapter->netdev)) {
7299                 for (i = 0; i < adapter->num_tx_queues; i++)
7300                         set_check_for_tx_hang(adapter->tx_ring[i]);
7301                 for (i = 0; i < adapter->num_xdp_queues; i++)
7302                         set_check_for_tx_hang(adapter->xdp_ring[i]);
7303         }
7304
7305         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
7306                 /*
7307                  * for legacy and MSI interrupts don't set any bits
7308                  * that are enabled for EIAM, because this operation
7309                  * would set *both* EIMS and EICS for any bit in EIAM
7310                  */
7311                 IXGBE_WRITE_REG(hw, IXGBE_EICS,
7312                         (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
7313         } else {
7314                 /* get one bit for every active tx/rx interrupt vector */
7315                 for (i = 0; i < adapter->num_q_vectors; i++) {
7316                         struct ixgbe_q_vector *qv = adapter->q_vector[i];
7317                         if (qv->rx.ring || qv->tx.ring)
7318                                 eics |= BIT_ULL(i);
7319                 }
7320         }
7321
7322         /* Cause software interrupt to ensure rings are cleaned */
7323         ixgbe_irq_rearm_queues(adapter, eics);
7324 }
7325
7326 /**
7327  * ixgbe_watchdog_update_link - update the link status
7328  * @adapter: pointer to the device adapter structure
7329  **/
7330 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
7331 {
7332         struct ixgbe_hw *hw = &adapter->hw;
7333         u32 link_speed = adapter->link_speed;
7334         bool link_up = adapter->link_up;
7335         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
7336
7337         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
7338                 return;
7339
7340         if (hw->mac.ops.check_link) {
7341                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
7342         } else {
7343                 /* always assume link is up, if no check link function */
7344                 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
7345                 link_up = true;
7346         }
7347
7348         if (adapter->ixgbe_ieee_pfc)
7349                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
7350
7351         if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
7352                 hw->mac.ops.fc_enable(hw);
7353                 ixgbe_set_rx_drop_en(adapter);
7354         }
7355
7356         if (link_up ||
7357             time_after(jiffies, (adapter->link_check_timeout +
7358                                  IXGBE_TRY_LINK_TIMEOUT))) {
7359                 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
7360                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
7361                 IXGBE_WRITE_FLUSH(hw);
7362         }
7363
7364         adapter->link_up = link_up;
7365         adapter->link_speed = link_speed;
7366 }
7367
7368 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
7369 {
7370 #ifdef CONFIG_IXGBE_DCB
7371         struct net_device *netdev = adapter->netdev;
7372         struct dcb_app app = {
7373                               .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
7374                               .protocol = 0,
7375                              };
7376         u8 up = 0;
7377
7378         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
7379                 up = dcb_ieee_getapp_mask(netdev, &app);
7380
7381         adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
7382 #endif
7383 }
7384
7385 /**
7386  * ixgbe_watchdog_link_is_up - update netif_carrier status and
7387  *                             print link up message
7388  * @adapter: pointer to the device adapter structure
7389  **/
7390 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
7391 {
7392         struct net_device *netdev = adapter->netdev;
7393         struct ixgbe_hw *hw = &adapter->hw;
7394         u32 link_speed = adapter->link_speed;
7395         const char *speed_str;
7396         bool flow_rx, flow_tx;
7397
7398         /* only continue if link was previously down */
7399         if (netif_carrier_ok(netdev))
7400                 return;
7401
7402         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
7403
7404         switch (hw->mac.type) {
7405         case ixgbe_mac_82598EB: {
7406                 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
7407                 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
7408                 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
7409                 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
7410         }
7411                 break;
7412         case ixgbe_mac_X540:
7413         case ixgbe_mac_X550:
7414         case ixgbe_mac_X550EM_x:
7415         case ixgbe_mac_x550em_a:
7416         case ixgbe_mac_82599EB: {
7417                 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
7418                 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
7419                 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
7420                 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
7421         }
7422                 break;
7423         default:
7424                 flow_tx = false;
7425                 flow_rx = false;
7426                 break;
7427         }
7428
7429         adapter->last_rx_ptp_check = jiffies;
7430
7431         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7432                 ixgbe_ptp_start_cyclecounter(adapter);
7433
7434         switch (link_speed) {
7435         case IXGBE_LINK_SPEED_10GB_FULL:
7436                 speed_str = "10 Gbps";
7437                 break;
7438         case IXGBE_LINK_SPEED_5GB_FULL:
7439                 speed_str = "5 Gbps";
7440                 break;
7441         case IXGBE_LINK_SPEED_2_5GB_FULL:
7442                 speed_str = "2.5 Gbps";
7443                 break;
7444         case IXGBE_LINK_SPEED_1GB_FULL:
7445                 speed_str = "1 Gbps";
7446                 break;
7447         case IXGBE_LINK_SPEED_100_FULL:
7448                 speed_str = "100 Mbps";
7449                 break;
7450         case IXGBE_LINK_SPEED_10_FULL:
7451                 speed_str = "10 Mbps";
7452                 break;
7453         default:
7454                 speed_str = "unknown speed";
7455                 break;
7456         }
7457         e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str,
7458                ((flow_rx && flow_tx) ? "RX/TX" :
7459                (flow_rx ? "RX" :
7460                (flow_tx ? "TX" : "None"))));
7461
7462         netif_carrier_on(netdev);
7463         ixgbe_check_vf_rate_limit(adapter);
7464
7465         /* enable transmits */
7466         netif_tx_wake_all_queues(adapter->netdev);
7467
7468         /* update the default user priority for VFs */
7469         ixgbe_update_default_up(adapter);
7470
7471         /* ping all the active vfs to let them know link has changed */
7472         ixgbe_ping_all_vfs(adapter);
7473 }
7474
7475 /**
7476  * ixgbe_watchdog_link_is_down - update netif_carrier status and
7477  *                               print link down message
7478  * @adapter: pointer to the adapter structure
7479  **/
7480 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
7481 {
7482         struct net_device *netdev = adapter->netdev;
7483         struct ixgbe_hw *hw = &adapter->hw;
7484
7485         adapter->link_up = false;
7486         adapter->link_speed = 0;
7487
7488         /* only continue if link was up previously */
7489         if (!netif_carrier_ok(netdev))
7490                 return;
7491
7492         /* poll for SFP+ cable when link is down */
7493         if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
7494                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
7495
7496         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7497                 ixgbe_ptp_start_cyclecounter(adapter);
7498
7499         e_info(drv, "NIC Link is Down\n");
7500         netif_carrier_off(netdev);
7501
7502         /* ping all the active vfs to let them know link has changed */
7503         ixgbe_ping_all_vfs(adapter);
7504 }
7505
7506 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
7507 {
7508         int i;
7509
7510         for (i = 0; i < adapter->num_tx_queues; i++) {
7511                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
7512
7513                 if (tx_ring->next_to_use != tx_ring->next_to_clean)
7514                         return true;
7515         }
7516
7517         for (i = 0; i < adapter->num_xdp_queues; i++) {
7518                 struct ixgbe_ring *ring = adapter->xdp_ring[i];
7519
7520                 if (ring->next_to_use != ring->next_to_clean)
7521                         return true;
7522         }
7523
7524         return false;
7525 }
7526
7527 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
7528 {
7529         struct ixgbe_hw *hw = &adapter->hw;
7530         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
7531         u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
7532
7533         int i, j;
7534
7535         if (!adapter->num_vfs)
7536                 return false;
7537
7538         /* resetting the PF is only needed for MAC before X550 */
7539         if (hw->mac.type >= ixgbe_mac_X550)
7540                 return false;
7541
7542         for (i = 0; i < adapter->num_vfs; i++) {
7543                 for (j = 0; j < q_per_pool; j++) {
7544                         u32 h, t;
7545
7546                         h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
7547                         t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
7548
7549                         if (h != t)
7550                                 return true;
7551                 }
7552         }
7553
7554         return false;
7555 }
7556
7557 /**
7558  * ixgbe_watchdog_flush_tx - flush queues on link down
7559  * @adapter: pointer to the device adapter structure
7560  **/
7561 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
7562 {
7563         if (!netif_carrier_ok(adapter->netdev)) {
7564                 if (ixgbe_ring_tx_pending(adapter) ||
7565                     ixgbe_vf_tx_pending(adapter)) {
7566                         /* We've lost link, so the controller stops DMA,
7567                          * but we've got queued Tx work that's never going
7568                          * to get done, so reset controller to flush Tx.
7569                          * (Do the reset outside of interrupt context).
7570                          */
7571                         e_warn(drv, "initiating reset to clear Tx work after link loss\n");
7572                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
7573                 }
7574         }
7575 }
7576
7577 #ifdef CONFIG_PCI_IOV
7578 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
7579 {
7580         struct ixgbe_hw *hw = &adapter->hw;
7581         struct pci_dev *pdev = adapter->pdev;
7582         unsigned int vf;
7583         u32 gpc;
7584
7585         if (!(netif_carrier_ok(adapter->netdev)))
7586                 return;
7587
7588         gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
7589         if (gpc) /* If incrementing then no need for the check below */
7590                 return;
7591         /* Check to see if a bad DMA write target from an errant or
7592          * malicious VF has caused a PCIe error.  If so then we can
7593          * issue a VFLR to the offending VF(s) and then resume without
7594          * requesting a full slot reset.
7595          */
7596
7597         if (!pdev)
7598                 return;
7599
7600         /* check status reg for all VFs owned by this PF */
7601         for (vf = 0; vf < adapter->num_vfs; ++vf) {
7602                 struct pci_dev *vfdev = adapter->vfinfo[vf].vfdev;
7603                 u16 status_reg;
7604
7605                 if (!vfdev)
7606                         continue;
7607                 pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
7608                 if (status_reg != IXGBE_FAILED_READ_CFG_WORD &&
7609                     status_reg & PCI_STATUS_REC_MASTER_ABORT)
7610                         pcie_flr(vfdev);
7611         }
7612 }
7613
7614 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
7615 {
7616         u32 ssvpc;
7617
7618         /* Do not perform spoof check for 82598 or if not in IOV mode */
7619         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
7620             adapter->num_vfs == 0)
7621                 return;
7622
7623         ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
7624
7625         /*
7626          * ssvpc register is cleared on read, if zero then no
7627          * spoofed packets in the last interval.
7628          */
7629         if (!ssvpc)
7630                 return;
7631
7632         e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
7633 }
7634 #else
7635 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
7636 {
7637 }
7638
7639 static void
7640 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
7641 {
7642 }
7643 #endif /* CONFIG_PCI_IOV */
7644
7645
7646 /**
7647  * ixgbe_watchdog_subtask - check and bring link up
7648  * @adapter: pointer to the device adapter structure
7649  **/
7650 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
7651 {
7652         /* if interface is down, removing or resetting, do nothing */
7653         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7654             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7655             test_bit(__IXGBE_RESETTING, &adapter->state))
7656                 return;
7657
7658         ixgbe_watchdog_update_link(adapter);
7659
7660         if (adapter->link_up)
7661                 ixgbe_watchdog_link_is_up(adapter);
7662         else
7663                 ixgbe_watchdog_link_is_down(adapter);
7664
7665         ixgbe_check_for_bad_vf(adapter);
7666         ixgbe_spoof_check(adapter);
7667         ixgbe_update_stats(adapter);
7668
7669         ixgbe_watchdog_flush_tx(adapter);
7670 }
7671
7672 /**
7673  * ixgbe_sfp_detection_subtask - poll for SFP+ cable
7674  * @adapter: the ixgbe adapter structure
7675  **/
7676 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
7677 {
7678         struct ixgbe_hw *hw = &adapter->hw;
7679         s32 err;
7680
7681         /* not searching for SFP so there is nothing to do here */
7682         if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
7683             !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7684                 return;
7685
7686         if (adapter->sfp_poll_time &&
7687             time_after(adapter->sfp_poll_time, jiffies))
7688                 return; /* If not yet time to poll for SFP */
7689
7690         /* someone else is in init, wait until next service event */
7691         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7692                 return;
7693
7694         adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1;
7695
7696         err = hw->phy.ops.identify_sfp(hw);
7697         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7698                 goto sfp_out;
7699
7700         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
7701                 /* If no cable is present, then we need to reset
7702                  * the next time we find a good cable. */
7703                 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
7704         }
7705
7706         /* exit on error */
7707         if (err)
7708                 goto sfp_out;
7709
7710         /* exit if reset not needed */
7711         if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7712                 goto sfp_out;
7713
7714         adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
7715
7716         /*
7717          * A module may be identified correctly, but the EEPROM may not have
7718          * support for that module.  setup_sfp() will fail in that case, so
7719          * we should not allow that module to load.
7720          */
7721         if (hw->mac.type == ixgbe_mac_82598EB)
7722                 err = hw->phy.ops.reset(hw);
7723         else
7724                 err = hw->mac.ops.setup_sfp(hw);
7725
7726         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7727                 goto sfp_out;
7728
7729         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
7730         e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
7731
7732 sfp_out:
7733         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7734
7735         if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
7736             (adapter->netdev->reg_state == NETREG_REGISTERED)) {
7737                 e_dev_err("failed to initialize because an unsupported "
7738                           "SFP+ module type was detected.\n");
7739                 e_dev_err("Reload the driver after installing a "
7740                           "supported module.\n");
7741                 unregister_netdev(adapter->netdev);
7742         }
7743 }
7744
7745 /**
7746  * ixgbe_sfp_link_config_subtask - set up link SFP after module install
7747  * @adapter: the ixgbe adapter structure
7748  **/
7749 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
7750 {
7751         struct ixgbe_hw *hw = &adapter->hw;
7752         u32 cap_speed;
7753         u32 speed;
7754         bool autoneg = false;
7755
7756         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
7757                 return;
7758
7759         /* someone else is in init, wait until next service event */
7760         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7761                 return;
7762
7763         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
7764
7765         hw->mac.ops.get_link_capabilities(hw, &cap_speed, &autoneg);
7766
7767         /* advertise highest capable link speed */
7768         if (!autoneg && (cap_speed & IXGBE_LINK_SPEED_10GB_FULL))
7769                 speed = IXGBE_LINK_SPEED_10GB_FULL;
7770         else
7771                 speed = cap_speed & (IXGBE_LINK_SPEED_10GB_FULL |
7772                                      IXGBE_LINK_SPEED_1GB_FULL);
7773
7774         if (hw->mac.ops.setup_link)
7775                 hw->mac.ops.setup_link(hw, speed, true);
7776
7777         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
7778         adapter->link_check_timeout = jiffies;
7779         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7780 }
7781
7782 /**
7783  * ixgbe_service_timer - Timer Call-back
7784  * @t: pointer to timer_list structure
7785  **/
7786 static void ixgbe_service_timer(struct timer_list *t)
7787 {
7788         struct ixgbe_adapter *adapter = from_timer(adapter, t, service_timer);
7789         unsigned long next_event_offset;
7790
7791         /* poll faster when waiting for link */
7792         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
7793                 next_event_offset = HZ / 10;
7794         else
7795                 next_event_offset = HZ * 2;
7796
7797         /* Reset the timer */
7798         mod_timer(&adapter->service_timer, next_event_offset + jiffies);
7799
7800         ixgbe_service_event_schedule(adapter);
7801 }
7802
7803 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
7804 {
7805         struct ixgbe_hw *hw = &adapter->hw;
7806         u32 status;
7807
7808         if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
7809                 return;
7810
7811         adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
7812
7813         if (!hw->phy.ops.handle_lasi)
7814                 return;
7815
7816         status = hw->phy.ops.handle_lasi(&adapter->hw);
7817         if (status != IXGBE_ERR_OVERTEMP)
7818                 return;
7819
7820         e_crit(drv, "%s\n", ixgbe_overheat_msg);
7821 }
7822
7823 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
7824 {
7825         if (!test_and_clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state))
7826                 return;
7827
7828         rtnl_lock();
7829         /* If we're already down, removing or resetting, just bail */
7830         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7831             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7832             test_bit(__IXGBE_RESETTING, &adapter->state)) {
7833                 rtnl_unlock();
7834                 return;
7835         }
7836
7837         ixgbe_dump(adapter);
7838         netdev_err(adapter->netdev, "Reset adapter\n");
7839         adapter->tx_timeout_count++;
7840
7841         ixgbe_reinit_locked(adapter);
7842         rtnl_unlock();
7843 }
7844
7845 /**
7846  * ixgbe_check_fw_error - Check firmware for errors
7847  * @adapter: the adapter private structure
7848  *
7849  * Check firmware errors in register FWSM
7850  */
7851 static bool ixgbe_check_fw_error(struct ixgbe_adapter *adapter)
7852 {
7853         struct ixgbe_hw *hw = &adapter->hw;
7854         u32 fwsm;
7855
7856         /* read fwsm.ext_err_ind register and log errors */
7857         fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
7858
7859         if (fwsm & IXGBE_FWSM_EXT_ERR_IND_MASK ||
7860             !(fwsm & IXGBE_FWSM_FW_VAL_BIT))
7861                 e_dev_warn("Warning firmware error detected FWSM: 0x%08X\n",
7862                            fwsm);
7863
7864         if (hw->mac.ops.fw_recovery_mode && hw->mac.ops.fw_recovery_mode(hw)) {
7865                 e_dev_err("Firmware recovery mode detected. Limiting functionality. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware recovery mode.\n");
7866                 return true;
7867         }
7868
7869         return false;
7870 }
7871
7872 /**
7873  * ixgbe_service_task - manages and runs subtasks
7874  * @work: pointer to work_struct containing our data
7875  **/
7876 static void ixgbe_service_task(struct work_struct *work)
7877 {
7878         struct ixgbe_adapter *adapter = container_of(work,
7879                                                      struct ixgbe_adapter,
7880                                                      service_task);
7881         if (ixgbe_removed(adapter->hw.hw_addr)) {
7882                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
7883                         rtnl_lock();
7884                         ixgbe_down(adapter);
7885                         rtnl_unlock();
7886                 }
7887                 ixgbe_service_event_complete(adapter);
7888                 return;
7889         }
7890         if (ixgbe_check_fw_error(adapter)) {
7891                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
7892                         rtnl_lock();
7893                         unregister_netdev(adapter->netdev);
7894                         rtnl_unlock();
7895                 }
7896                 ixgbe_service_event_complete(adapter);
7897                 return;
7898         }
7899         if (adapter->flags2 & IXGBE_FLAG2_UDP_TUN_REREG_NEEDED) {
7900                 rtnl_lock();
7901                 adapter->flags2 &= ~IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
7902                 udp_tunnel_get_rx_info(adapter->netdev);
7903                 rtnl_unlock();
7904         }
7905         ixgbe_reset_subtask(adapter);
7906         ixgbe_phy_interrupt_subtask(adapter);
7907         ixgbe_sfp_detection_subtask(adapter);
7908         ixgbe_sfp_link_config_subtask(adapter);
7909         ixgbe_check_overtemp_subtask(adapter);
7910         ixgbe_watchdog_subtask(adapter);
7911         ixgbe_fdir_reinit_subtask(adapter);
7912         ixgbe_check_hang_subtask(adapter);
7913
7914         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
7915                 ixgbe_ptp_overflow_check(adapter);
7916                 if (adapter->flags & IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER)
7917                         ixgbe_ptp_rx_hang(adapter);
7918                 ixgbe_ptp_tx_hang(adapter);
7919         }
7920
7921         ixgbe_service_event_complete(adapter);
7922 }
7923
7924 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
7925                      struct ixgbe_tx_buffer *first,
7926                      u8 *hdr_len,
7927                      struct ixgbe_ipsec_tx_data *itd)
7928 {
7929         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
7930         struct sk_buff *skb = first->skb;
7931         union {
7932                 struct iphdr *v4;
7933                 struct ipv6hdr *v6;
7934                 unsigned char *hdr;
7935         } ip;
7936         union {
7937                 struct tcphdr *tcp;
7938                 unsigned char *hdr;
7939         } l4;
7940         u32 paylen, l4_offset;
7941         u32 fceof_saidx = 0;
7942         int err;
7943
7944         if (skb->ip_summed != CHECKSUM_PARTIAL)
7945                 return 0;
7946
7947         if (!skb_is_gso(skb))
7948                 return 0;
7949
7950         err = skb_cow_head(skb, 0);
7951         if (err < 0)
7952                 return err;
7953
7954         if (eth_p_mpls(first->protocol))
7955                 ip.hdr = skb_inner_network_header(skb);
7956         else
7957                 ip.hdr = skb_network_header(skb);
7958         l4.hdr = skb_checksum_start(skb);
7959
7960         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
7961         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7962
7963         /* initialize outer IP header fields */
7964         if (ip.v4->version == 4) {
7965                 unsigned char *csum_start = skb_checksum_start(skb);
7966                 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
7967                 int len = csum_start - trans_start;
7968
7969                 /* IP header will have to cancel out any data that
7970                  * is not a part of the outer IP header, so set to
7971                  * a reverse csum if needed, else init check to 0.
7972                  */
7973                 ip.v4->check = (skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL) ?
7974                                            csum_fold(csum_partial(trans_start,
7975                                                                   len, 0)) : 0;
7976                 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7977
7978                 ip.v4->tot_len = 0;
7979                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7980                                    IXGBE_TX_FLAGS_CSUM |
7981                                    IXGBE_TX_FLAGS_IPV4;
7982         } else {
7983                 ip.v6->payload_len = 0;
7984                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7985                                    IXGBE_TX_FLAGS_CSUM;
7986         }
7987
7988         /* determine offset of inner transport header */
7989         l4_offset = l4.hdr - skb->data;
7990
7991         /* compute length of segmentation header */
7992         *hdr_len = (l4.tcp->doff * 4) + l4_offset;
7993
7994         /* remove payload length from inner checksum */
7995         paylen = skb->len - l4_offset;
7996         csum_replace_by_diff(&l4.tcp->check, (__force __wsum)htonl(paylen));
7997
7998         /* update gso size and bytecount with header size */
7999         first->gso_segs = skb_shinfo(skb)->gso_segs;
8000         first->bytecount += (first->gso_segs - 1) * *hdr_len;
8001
8002         /* mss_l4len_id: use 0 as index for TSO */
8003         mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
8004         mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
8005
8006         fceof_saidx |= itd->sa_idx;
8007         type_tucmd |= itd->flags | itd->trailer_len;
8008
8009         /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
8010         vlan_macip_lens = l4.hdr - ip.hdr;
8011         vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
8012         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
8013
8014         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, fceof_saidx, type_tucmd,
8015                           mss_l4len_idx);
8016
8017         return 1;
8018 }
8019
8020 static inline bool ixgbe_ipv6_csum_is_sctp(struct sk_buff *skb)
8021 {
8022         unsigned int offset = 0;
8023
8024         ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
8025
8026         return offset == skb_checksum_start_offset(skb);
8027 }
8028
8029 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
8030                           struct ixgbe_tx_buffer *first,
8031                           struct ixgbe_ipsec_tx_data *itd)
8032 {
8033         struct sk_buff *skb = first->skb;
8034         u32 vlan_macip_lens = 0;
8035         u32 fceof_saidx = 0;
8036         u32 type_tucmd = 0;
8037
8038         if (skb->ip_summed != CHECKSUM_PARTIAL) {
8039 csum_failed:
8040                 if (!(first->tx_flags & (IXGBE_TX_FLAGS_HW_VLAN |
8041                                          IXGBE_TX_FLAGS_CC)))
8042                         return;
8043                 goto no_csum;
8044         }
8045
8046         switch (skb->csum_offset) {
8047         case offsetof(struct tcphdr, check):
8048                 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
8049                 /* fall through */
8050         case offsetof(struct udphdr, check):
8051                 break;
8052         case offsetof(struct sctphdr, checksum):
8053                 /* validate that this is actually an SCTP request */
8054                 if (((first->protocol == htons(ETH_P_IP)) &&
8055                      (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
8056                     ((first->protocol == htons(ETH_P_IPV6)) &&
8057                      ixgbe_ipv6_csum_is_sctp(skb))) {
8058                         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
8059                         break;
8060                 }
8061                 /* fall through */
8062         default:
8063                 skb_checksum_help(skb);
8064                 goto csum_failed;
8065         }
8066
8067         /* update TX checksum flag */
8068         first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
8069         vlan_macip_lens = skb_checksum_start_offset(skb) -
8070                           skb_network_offset(skb);
8071 no_csum:
8072         /* vlan_macip_lens: MACLEN, VLAN tag */
8073         vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
8074         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
8075
8076         fceof_saidx |= itd->sa_idx;
8077         type_tucmd |= itd->flags | itd->trailer_len;
8078
8079         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, fceof_saidx, type_tucmd, 0);
8080 }
8081
8082 #define IXGBE_SET_FLAG(_input, _flag, _result) \
8083         ((_flag <= _result) ? \
8084          ((u32)(_input & _flag) * (_result / _flag)) : \
8085          ((u32)(_input & _flag) / (_flag / _result)))
8086
8087 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
8088 {
8089         /* set type for advanced descriptor with frame checksum insertion */
8090         u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
8091                        IXGBE_ADVTXD_DCMD_DEXT |
8092                        IXGBE_ADVTXD_DCMD_IFCS;
8093
8094         /* set HW vlan bit if vlan is present */
8095         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
8096                                    IXGBE_ADVTXD_DCMD_VLE);
8097
8098         /* set segmentation enable bits for TSO/FSO */
8099         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
8100                                    IXGBE_ADVTXD_DCMD_TSE);
8101
8102         /* set timestamp bit if present */
8103         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
8104                                    IXGBE_ADVTXD_MAC_TSTAMP);
8105
8106         /* insert frame checksum */
8107         cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
8108
8109         return cmd_type;
8110 }
8111
8112 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
8113                                    u32 tx_flags, unsigned int paylen)
8114 {
8115         u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
8116
8117         /* enable L4 checksum for TSO and TX checksum offload */
8118         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8119                                         IXGBE_TX_FLAGS_CSUM,
8120                                         IXGBE_ADVTXD_POPTS_TXSM);
8121
8122         /* enable IPv4 checksum for TSO */
8123         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8124                                         IXGBE_TX_FLAGS_IPV4,
8125                                         IXGBE_ADVTXD_POPTS_IXSM);
8126
8127         /* enable IPsec */
8128         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8129                                         IXGBE_TX_FLAGS_IPSEC,
8130                                         IXGBE_ADVTXD_POPTS_IPSEC);
8131
8132         /*
8133          * Check Context must be set if Tx switch is enabled, which it
8134          * always is for case where virtual functions are running
8135          */
8136         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8137                                         IXGBE_TX_FLAGS_CC,
8138                                         IXGBE_ADVTXD_CC);
8139
8140         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
8141 }
8142
8143 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
8144 {
8145         netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
8146
8147         /* Herbert's original patch had:
8148          *  smp_mb__after_netif_stop_queue();
8149          * but since that doesn't exist yet, just open code it.
8150          */
8151         smp_mb();
8152
8153         /* We need to check again in a case another CPU has just
8154          * made room available.
8155          */
8156         if (likely(ixgbe_desc_unused(tx_ring) < size))
8157                 return -EBUSY;
8158
8159         /* A reprieve! - use start_queue because it doesn't call schedule */
8160         netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
8161         ++tx_ring->tx_stats.restart_queue;
8162         return 0;
8163 }
8164
8165 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
8166 {
8167         if (likely(ixgbe_desc_unused(tx_ring) >= size))
8168                 return 0;
8169
8170         return __ixgbe_maybe_stop_tx(tx_ring, size);
8171 }
8172
8173 static int ixgbe_tx_map(struct ixgbe_ring *tx_ring,
8174                         struct ixgbe_tx_buffer *first,
8175                         const u8 hdr_len)
8176 {
8177         struct sk_buff *skb = first->skb;
8178         struct ixgbe_tx_buffer *tx_buffer;
8179         union ixgbe_adv_tx_desc *tx_desc;
8180         struct skb_frag_struct *frag;
8181         dma_addr_t dma;
8182         unsigned int data_len, size;
8183         u32 tx_flags = first->tx_flags;
8184         u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
8185         u16 i = tx_ring->next_to_use;
8186
8187         tx_desc = IXGBE_TX_DESC(tx_ring, i);
8188
8189         ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
8190
8191         size = skb_headlen(skb);
8192         data_len = skb->data_len;
8193
8194 #ifdef IXGBE_FCOE
8195         if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
8196                 if (data_len < sizeof(struct fcoe_crc_eof)) {
8197                         size -= sizeof(struct fcoe_crc_eof) - data_len;
8198                         data_len = 0;
8199                 } else {
8200                         data_len -= sizeof(struct fcoe_crc_eof);
8201                 }
8202         }
8203
8204 #endif
8205         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
8206
8207         tx_buffer = first;
8208
8209         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
8210                 if (dma_mapping_error(tx_ring->dev, dma))
8211                         goto dma_error;
8212
8213                 /* record length, and DMA address */
8214                 dma_unmap_len_set(tx_buffer, len, size);
8215                 dma_unmap_addr_set(tx_buffer, dma, dma);
8216
8217                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
8218
8219                 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
8220                         tx_desc->read.cmd_type_len =
8221                                 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
8222
8223                         i++;
8224                         tx_desc++;
8225                         if (i == tx_ring->count) {
8226                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
8227                                 i = 0;
8228                         }
8229                         tx_desc->read.olinfo_status = 0;
8230
8231                         dma += IXGBE_MAX_DATA_PER_TXD;
8232                         size -= IXGBE_MAX_DATA_PER_TXD;
8233
8234                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
8235                 }
8236
8237                 if (likely(!data_len))
8238                         break;
8239
8240                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
8241
8242                 i++;
8243                 tx_desc++;
8244                 if (i == tx_ring->count) {
8245                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
8246                         i = 0;
8247                 }
8248                 tx_desc->read.olinfo_status = 0;
8249
8250 #ifdef IXGBE_FCOE
8251                 size = min_t(unsigned int, data_len, skb_frag_size(frag));
8252 #else
8253                 size = skb_frag_size(frag);
8254 #endif
8255                 data_len -= size;
8256
8257                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
8258                                        DMA_TO_DEVICE);
8259
8260                 tx_buffer = &tx_ring->tx_buffer_info[i];
8261         }
8262
8263         /* write last descriptor with RS and EOP bits */
8264         cmd_type |= size | IXGBE_TXD_CMD;
8265         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8266
8267         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
8268
8269         /* set the timestamp */
8270         first->time_stamp = jiffies;
8271
8272         /*
8273          * Force memory writes to complete before letting h/w know there
8274          * are new descriptors to fetch.  (Only applicable for weak-ordered
8275          * memory model archs, such as IA-64).
8276          *
8277          * We also need this memory barrier to make certain all of the
8278          * status bits have been updated before next_to_watch is written.
8279          */
8280         wmb();
8281
8282         /* set next_to_watch value indicating a packet is present */
8283         first->next_to_watch = tx_desc;
8284
8285         i++;
8286         if (i == tx_ring->count)
8287                 i = 0;
8288
8289         tx_ring->next_to_use = i;
8290
8291         ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
8292
8293         if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
8294                 writel(i, tx_ring->tail);
8295
8296                 /* we need this if more than one processor can write to our tail
8297                  * at a time, it synchronizes IO on IA64/Altix systems
8298                  */
8299                 mmiowb();
8300         }
8301
8302         return 0;
8303 dma_error:
8304         dev_err(tx_ring->dev, "TX DMA map failed\n");
8305
8306         /* clear dma mappings for failed tx_buffer_info map */
8307         for (;;) {
8308                 tx_buffer = &tx_ring->tx_buffer_info[i];
8309                 if (dma_unmap_len(tx_buffer, len))
8310                         dma_unmap_page(tx_ring->dev,
8311                                        dma_unmap_addr(tx_buffer, dma),
8312                                        dma_unmap_len(tx_buffer, len),
8313                                        DMA_TO_DEVICE);
8314                 dma_unmap_len_set(tx_buffer, len, 0);
8315                 if (tx_buffer == first)
8316                         break;
8317                 if (i == 0)
8318                         i += tx_ring->count;
8319                 i--;
8320         }
8321
8322         dev_kfree_skb_any(first->skb);
8323         first->skb = NULL;
8324
8325         tx_ring->next_to_use = i;
8326
8327         return -1;
8328 }
8329
8330 static void ixgbe_atr(struct ixgbe_ring *ring,
8331                       struct ixgbe_tx_buffer *first)
8332 {
8333         struct ixgbe_q_vector *q_vector = ring->q_vector;
8334         union ixgbe_atr_hash_dword input = { .dword = 0 };
8335         union ixgbe_atr_hash_dword common = { .dword = 0 };
8336         union {
8337                 unsigned char *network;
8338                 struct iphdr *ipv4;
8339                 struct ipv6hdr *ipv6;
8340         } hdr;
8341         struct tcphdr *th;
8342         unsigned int hlen;
8343         struct sk_buff *skb;
8344         __be16 vlan_id;
8345         int l4_proto;
8346
8347         /* if ring doesn't have a interrupt vector, cannot perform ATR */
8348         if (!q_vector)
8349                 return;
8350
8351         /* do nothing if sampling is disabled */
8352         if (!ring->atr_sample_rate)
8353                 return;
8354
8355         ring->atr_count++;
8356
8357         /* currently only IPv4/IPv6 with TCP is supported */
8358         if ((first->protocol != htons(ETH_P_IP)) &&
8359             (first->protocol != htons(ETH_P_IPV6)))
8360                 return;
8361
8362         /* snag network header to get L4 type and address */
8363         skb = first->skb;
8364         hdr.network = skb_network_header(skb);
8365         if (unlikely(hdr.network <= skb->data))
8366                 return;
8367         if (skb->encapsulation &&
8368             first->protocol == htons(ETH_P_IP) &&
8369             hdr.ipv4->protocol == IPPROTO_UDP) {
8370                 struct ixgbe_adapter *adapter = q_vector->adapter;
8371
8372                 if (unlikely(skb_tail_pointer(skb) < hdr.network +
8373                              VXLAN_HEADROOM))
8374                         return;
8375
8376                 /* verify the port is recognized as VXLAN */
8377                 if (adapter->vxlan_port &&
8378                     udp_hdr(skb)->dest == adapter->vxlan_port)
8379                         hdr.network = skb_inner_network_header(skb);
8380
8381                 if (adapter->geneve_port &&
8382                     udp_hdr(skb)->dest == adapter->geneve_port)
8383                         hdr.network = skb_inner_network_header(skb);
8384         }
8385
8386         /* Make sure we have at least [minimum IPv4 header + TCP]
8387          * or [IPv6 header] bytes
8388          */
8389         if (unlikely(skb_tail_pointer(skb) < hdr.network + 40))
8390                 return;
8391
8392         /* Currently only IPv4/IPv6 with TCP is supported */
8393         switch (hdr.ipv4->version) {
8394         case IPVERSION:
8395                 /* access ihl as u8 to avoid unaligned access on ia64 */
8396                 hlen = (hdr.network[0] & 0x0F) << 2;
8397                 l4_proto = hdr.ipv4->protocol;
8398                 break;
8399         case 6:
8400                 hlen = hdr.network - skb->data;
8401                 l4_proto = ipv6_find_hdr(skb, &hlen, IPPROTO_TCP, NULL, NULL);
8402                 hlen -= hdr.network - skb->data;
8403                 break;
8404         default:
8405                 return;
8406         }
8407
8408         if (l4_proto != IPPROTO_TCP)
8409                 return;
8410
8411         if (unlikely(skb_tail_pointer(skb) < hdr.network +
8412                      hlen + sizeof(struct tcphdr)))
8413                 return;
8414
8415         th = (struct tcphdr *)(hdr.network + hlen);
8416
8417         /* skip this packet since the socket is closing */
8418         if (th->fin)
8419                 return;
8420
8421         /* sample on all syn packets or once every atr sample count */
8422         if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
8423                 return;
8424
8425         /* reset sample count */
8426         ring->atr_count = 0;
8427
8428         vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
8429
8430         /*
8431          * src and dst are inverted, think how the receiver sees them
8432          *
8433          * The input is broken into two sections, a non-compressed section
8434          * containing vm_pool, vlan_id, and flow_type.  The rest of the data
8435          * is XORed together and stored in the compressed dword.
8436          */
8437         input.formatted.vlan_id = vlan_id;
8438
8439         /*
8440          * since src port and flex bytes occupy the same word XOR them together
8441          * and write the value to source port portion of compressed dword
8442          */
8443         if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
8444                 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
8445         else
8446                 common.port.src ^= th->dest ^ first->protocol;
8447         common.port.dst ^= th->source;
8448
8449         switch (hdr.ipv4->version) {
8450         case IPVERSION:
8451                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
8452                 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
8453                 break;
8454         case 6:
8455                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
8456                 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
8457                              hdr.ipv6->saddr.s6_addr32[1] ^
8458                              hdr.ipv6->saddr.s6_addr32[2] ^
8459                              hdr.ipv6->saddr.s6_addr32[3] ^
8460                              hdr.ipv6->daddr.s6_addr32[0] ^
8461                              hdr.ipv6->daddr.s6_addr32[1] ^
8462                              hdr.ipv6->daddr.s6_addr32[2] ^
8463                              hdr.ipv6->daddr.s6_addr32[3];
8464                 break;
8465         default:
8466                 break;
8467         }
8468
8469         if (hdr.network != skb_network_header(skb))
8470                 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK;
8471
8472         /* This assumes the Rx queue and Tx queue are bound to the same CPU */
8473         ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
8474                                               input, common, ring->queue_index);
8475 }
8476
8477 #ifdef IXGBE_FCOE
8478 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
8479                               struct net_device *sb_dev,
8480                               select_queue_fallback_t fallback)
8481 {
8482         struct ixgbe_adapter *adapter;
8483         struct ixgbe_ring_feature *f;
8484         int txq;
8485
8486         if (sb_dev) {
8487                 u8 tc = netdev_get_prio_tc_map(dev, skb->priority);
8488                 struct net_device *vdev = sb_dev;
8489
8490                 txq = vdev->tc_to_txq[tc].offset;
8491                 txq += reciprocal_scale(skb_get_hash(skb),
8492                                         vdev->tc_to_txq[tc].count);
8493
8494                 return txq;
8495         }
8496
8497         /*
8498          * only execute the code below if protocol is FCoE
8499          * or FIP and we have FCoE enabled on the adapter
8500          */
8501         switch (vlan_get_protocol(skb)) {
8502         case htons(ETH_P_FCOE):
8503         case htons(ETH_P_FIP):
8504                 adapter = netdev_priv(dev);
8505
8506                 if (!sb_dev && (adapter->flags & IXGBE_FLAG_FCOE_ENABLED))
8507                         break;
8508                 /* fall through */
8509         default:
8510                 return fallback(dev, skb, sb_dev);
8511         }
8512
8513         f = &adapter->ring_feature[RING_F_FCOE];
8514
8515         txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
8516                                            smp_processor_id();
8517
8518         while (txq >= f->indices)
8519                 txq -= f->indices;
8520
8521         return txq + f->offset;
8522 }
8523
8524 #endif
8525 int ixgbe_xmit_xdp_ring(struct ixgbe_adapter *adapter,
8526                         struct xdp_frame *xdpf)
8527 {
8528         struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
8529         struct ixgbe_tx_buffer *tx_buffer;
8530         union ixgbe_adv_tx_desc *tx_desc;
8531         u32 len, cmd_type;
8532         dma_addr_t dma;
8533         u16 i;
8534
8535         len = xdpf->len;
8536
8537         if (unlikely(!ixgbe_desc_unused(ring)))
8538                 return IXGBE_XDP_CONSUMED;
8539
8540         dma = dma_map_single(ring->dev, xdpf->data, len, DMA_TO_DEVICE);
8541         if (dma_mapping_error(ring->dev, dma))
8542                 return IXGBE_XDP_CONSUMED;
8543
8544         /* record the location of the first descriptor for this packet */
8545         tx_buffer = &ring->tx_buffer_info[ring->next_to_use];
8546         tx_buffer->bytecount = len;
8547         tx_buffer->gso_segs = 1;
8548         tx_buffer->protocol = 0;
8549
8550         i = ring->next_to_use;
8551         tx_desc = IXGBE_TX_DESC(ring, i);
8552
8553         dma_unmap_len_set(tx_buffer, len, len);
8554         dma_unmap_addr_set(tx_buffer, dma, dma);
8555         tx_buffer->xdpf = xdpf;
8556
8557         tx_desc->read.buffer_addr = cpu_to_le64(dma);
8558
8559         /* put descriptor type bits */
8560         cmd_type = IXGBE_ADVTXD_DTYP_DATA |
8561                    IXGBE_ADVTXD_DCMD_DEXT |
8562                    IXGBE_ADVTXD_DCMD_IFCS;
8563         cmd_type |= len | IXGBE_TXD_CMD;
8564         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8565         tx_desc->read.olinfo_status =
8566                 cpu_to_le32(len << IXGBE_ADVTXD_PAYLEN_SHIFT);
8567
8568         /* Avoid any potential race with xdp_xmit and cleanup */
8569         smp_wmb();
8570
8571         /* set next_to_watch value indicating a packet is present */
8572         i++;
8573         if (i == ring->count)
8574                 i = 0;
8575
8576         tx_buffer->next_to_watch = tx_desc;
8577         ring->next_to_use = i;
8578
8579         return IXGBE_XDP_TX;
8580 }
8581
8582 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
8583                           struct ixgbe_adapter *adapter,
8584                           struct ixgbe_ring *tx_ring)
8585 {
8586         struct ixgbe_tx_buffer *first;
8587         int tso;
8588         u32 tx_flags = 0;
8589         unsigned short f;
8590         u16 count = TXD_USE_COUNT(skb_headlen(skb));
8591         struct ixgbe_ipsec_tx_data ipsec_tx = { 0 };
8592         __be16 protocol = skb->protocol;
8593         u8 hdr_len = 0;
8594
8595         /*
8596          * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
8597          *       + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
8598          *       + 2 desc gap to keep tail from touching head,
8599          *       + 1 desc for context descriptor,
8600          * otherwise try next time
8601          */
8602         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
8603                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
8604
8605         if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
8606                 tx_ring->tx_stats.tx_busy++;
8607                 return NETDEV_TX_BUSY;
8608         }
8609
8610         /* record the location of the first descriptor for this packet */
8611         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
8612         first->skb = skb;
8613         first->bytecount = skb->len;
8614         first->gso_segs = 1;
8615
8616         /* if we have a HW VLAN tag being added default to the HW one */
8617         if (skb_vlan_tag_present(skb)) {
8618                 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
8619                 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8620         /* else if it is a SW VLAN check the next protocol and store the tag */
8621         } else if (protocol == htons(ETH_P_8021Q)) {
8622                 struct vlan_hdr *vhdr, _vhdr;
8623                 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
8624                 if (!vhdr)
8625                         goto out_drop;
8626
8627                 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
8628                                   IXGBE_TX_FLAGS_VLAN_SHIFT;
8629                 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
8630         }
8631         protocol = vlan_get_protocol(skb);
8632
8633         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
8634             adapter->ptp_clock) {
8635                 if (!test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
8636                                            &adapter->state)) {
8637                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
8638                         tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
8639
8640                         /* schedule check for Tx timestamp */
8641                         adapter->ptp_tx_skb = skb_get(skb);
8642                         adapter->ptp_tx_start = jiffies;
8643                         schedule_work(&adapter->ptp_tx_work);
8644                 } else {
8645                         adapter->tx_hwtstamp_skipped++;
8646                 }
8647         }
8648
8649         skb_tx_timestamp(skb);
8650
8651 #ifdef CONFIG_PCI_IOV
8652         /*
8653          * Use the l2switch_enable flag - would be false if the DMA
8654          * Tx switch had been disabled.
8655          */
8656         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
8657                 tx_flags |= IXGBE_TX_FLAGS_CC;
8658
8659 #endif
8660         /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
8661         if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
8662             ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
8663              (skb->priority != TC_PRIO_CONTROL))) {
8664                 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
8665                 tx_flags |= (skb->priority & 0x7) <<
8666                                         IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
8667                 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
8668                         struct vlan_ethhdr *vhdr;
8669
8670                         if (skb_cow_head(skb, 0))
8671                                 goto out_drop;
8672                         vhdr = (struct vlan_ethhdr *)skb->data;
8673                         vhdr->h_vlan_TCI = htons(tx_flags >>
8674                                                  IXGBE_TX_FLAGS_VLAN_SHIFT);
8675                 } else {
8676                         tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8677                 }
8678         }
8679
8680         /* record initial flags and protocol */
8681         first->tx_flags = tx_flags;
8682         first->protocol = protocol;
8683
8684 #ifdef IXGBE_FCOE
8685         /* setup tx offload for FCoE */
8686         if ((protocol == htons(ETH_P_FCOE)) &&
8687             (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
8688                 tso = ixgbe_fso(tx_ring, first, &hdr_len);
8689                 if (tso < 0)
8690                         goto out_drop;
8691
8692                 goto xmit_fcoe;
8693         }
8694
8695 #endif /* IXGBE_FCOE */
8696
8697 #ifdef CONFIG_IXGBE_IPSEC
8698         if (skb->sp && !ixgbe_ipsec_tx(tx_ring, first, &ipsec_tx))
8699                 goto out_drop;
8700 #endif
8701         tso = ixgbe_tso(tx_ring, first, &hdr_len, &ipsec_tx);
8702         if (tso < 0)
8703                 goto out_drop;
8704         else if (!tso)
8705                 ixgbe_tx_csum(tx_ring, first, &ipsec_tx);
8706
8707         /* add the ATR filter if ATR is on */
8708         if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
8709                 ixgbe_atr(tx_ring, first);
8710
8711 #ifdef IXGBE_FCOE
8712 xmit_fcoe:
8713 #endif /* IXGBE_FCOE */
8714         if (ixgbe_tx_map(tx_ring, first, hdr_len))
8715                 goto cleanup_tx_timestamp;
8716
8717         return NETDEV_TX_OK;
8718
8719 out_drop:
8720         dev_kfree_skb_any(first->skb);
8721         first->skb = NULL;
8722 cleanup_tx_timestamp:
8723         if (unlikely(tx_flags & IXGBE_TX_FLAGS_TSTAMP)) {
8724                 dev_kfree_skb_any(adapter->ptp_tx_skb);
8725                 adapter->ptp_tx_skb = NULL;
8726                 cancel_work_sync(&adapter->ptp_tx_work);
8727                 clear_bit_unlock(__IXGBE_PTP_TX_IN_PROGRESS, &adapter->state);
8728         }
8729
8730         return NETDEV_TX_OK;
8731 }
8732
8733 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
8734                                       struct net_device *netdev,
8735                                       struct ixgbe_ring *ring)
8736 {
8737         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8738         struct ixgbe_ring *tx_ring;
8739
8740         /*
8741          * The minimum packet size for olinfo paylen is 17 so pad the skb
8742          * in order to meet this minimum size requirement.
8743          */
8744         if (skb_put_padto(skb, 17))
8745                 return NETDEV_TX_OK;
8746
8747         tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
8748         if (unlikely(test_bit(__IXGBE_TX_DISABLED, &tx_ring->state)))
8749                 return NETDEV_TX_BUSY;
8750
8751         return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
8752 }
8753
8754 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
8755                                     struct net_device *netdev)
8756 {
8757         return __ixgbe_xmit_frame(skb, netdev, NULL);
8758 }
8759
8760 /**
8761  * ixgbe_set_mac - Change the Ethernet Address of the NIC
8762  * @netdev: network interface device structure
8763  * @p: pointer to an address structure
8764  *
8765  * Returns 0 on success, negative on failure
8766  **/
8767 static int ixgbe_set_mac(struct net_device *netdev, void *p)
8768 {
8769         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8770         struct ixgbe_hw *hw = &adapter->hw;
8771         struct sockaddr *addr = p;
8772
8773         if (!is_valid_ether_addr(addr->sa_data))
8774                 return -EADDRNOTAVAIL;
8775
8776         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
8777         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
8778
8779         ixgbe_mac_set_default_filter(adapter);
8780
8781         return 0;
8782 }
8783
8784 static int
8785 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
8786 {
8787         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8788         struct ixgbe_hw *hw = &adapter->hw;
8789         u16 value;
8790         int rc;
8791
8792         if (prtad != hw->phy.mdio.prtad)
8793                 return -EINVAL;
8794         rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
8795         if (!rc)
8796                 rc = value;
8797         return rc;
8798 }
8799
8800 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
8801                             u16 addr, u16 value)
8802 {
8803         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8804         struct ixgbe_hw *hw = &adapter->hw;
8805
8806         if (prtad != hw->phy.mdio.prtad)
8807                 return -EINVAL;
8808         return hw->phy.ops.write_reg(hw, addr, devad, value);
8809 }
8810
8811 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
8812 {
8813         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8814
8815         switch (cmd) {
8816         case SIOCSHWTSTAMP:
8817                 return ixgbe_ptp_set_ts_config(adapter, req);
8818         case SIOCGHWTSTAMP:
8819                 return ixgbe_ptp_get_ts_config(adapter, req);
8820         case SIOCGMIIPHY:
8821                 if (!adapter->hw.phy.ops.read_reg)
8822                         return -EOPNOTSUPP;
8823                 /* fall through */
8824         default:
8825                 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
8826         }
8827 }
8828
8829 /**
8830  * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
8831  * netdev->dev_addrs
8832  * @dev: network interface device structure
8833  *
8834  * Returns non-zero on failure
8835  **/
8836 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
8837 {
8838         int err = 0;
8839         struct ixgbe_adapter *adapter = netdev_priv(dev);
8840         struct ixgbe_hw *hw = &adapter->hw;
8841
8842         if (is_valid_ether_addr(hw->mac.san_addr)) {
8843                 rtnl_lock();
8844                 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
8845                 rtnl_unlock();
8846
8847                 /* update SAN MAC vmdq pool selection */
8848                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
8849         }
8850         return err;
8851 }
8852
8853 /**
8854  * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
8855  * netdev->dev_addrs
8856  * @dev: network interface device structure
8857  *
8858  * Returns non-zero on failure
8859  **/
8860 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
8861 {
8862         int err = 0;
8863         struct ixgbe_adapter *adapter = netdev_priv(dev);
8864         struct ixgbe_mac_info *mac = &adapter->hw.mac;
8865
8866         if (is_valid_ether_addr(mac->san_addr)) {
8867                 rtnl_lock();
8868                 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
8869                 rtnl_unlock();
8870         }
8871         return err;
8872 }
8873
8874 static void ixgbe_get_ring_stats64(struct rtnl_link_stats64 *stats,
8875                                    struct ixgbe_ring *ring)
8876 {
8877         u64 bytes, packets;
8878         unsigned int start;
8879
8880         if (ring) {
8881                 do {
8882                         start = u64_stats_fetch_begin_irq(&ring->syncp);
8883                         packets = ring->stats.packets;
8884                         bytes   = ring->stats.bytes;
8885                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8886                 stats->tx_packets += packets;
8887                 stats->tx_bytes   += bytes;
8888         }
8889 }
8890
8891 static void ixgbe_get_stats64(struct net_device *netdev,
8892                               struct rtnl_link_stats64 *stats)
8893 {
8894         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8895         int i;
8896
8897         rcu_read_lock();
8898         for (i = 0; i < adapter->num_rx_queues; i++) {
8899                 struct ixgbe_ring *ring = READ_ONCE(adapter->rx_ring[i]);
8900                 u64 bytes, packets;
8901                 unsigned int start;
8902
8903                 if (ring) {
8904                         do {
8905                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
8906                                 packets = ring->stats.packets;
8907                                 bytes   = ring->stats.bytes;
8908                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8909                         stats->rx_packets += packets;
8910                         stats->rx_bytes   += bytes;
8911                 }
8912         }
8913
8914         for (i = 0; i < adapter->num_tx_queues; i++) {
8915                 struct ixgbe_ring *ring = READ_ONCE(adapter->tx_ring[i]);
8916
8917                 ixgbe_get_ring_stats64(stats, ring);
8918         }
8919         for (i = 0; i < adapter->num_xdp_queues; i++) {
8920                 struct ixgbe_ring *ring = READ_ONCE(adapter->xdp_ring[i]);
8921
8922                 ixgbe_get_ring_stats64(stats, ring);
8923         }
8924         rcu_read_unlock();
8925
8926         /* following stats updated by ixgbe_watchdog_task() */
8927         stats->multicast        = netdev->stats.multicast;
8928         stats->rx_errors        = netdev->stats.rx_errors;
8929         stats->rx_length_errors = netdev->stats.rx_length_errors;
8930         stats->rx_crc_errors    = netdev->stats.rx_crc_errors;
8931         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
8932 }
8933
8934 #ifdef CONFIG_IXGBE_DCB
8935 /**
8936  * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
8937  * @adapter: pointer to ixgbe_adapter
8938  * @tc: number of traffic classes currently enabled
8939  *
8940  * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
8941  * 802.1Q priority maps to a packet buffer that exists.
8942  */
8943 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
8944 {
8945         struct ixgbe_hw *hw = &adapter->hw;
8946         u32 reg, rsave;
8947         int i;
8948
8949         /* 82598 have a static priority to TC mapping that can not
8950          * be changed so no validation is needed.
8951          */
8952         if (hw->mac.type == ixgbe_mac_82598EB)
8953                 return;
8954
8955         reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
8956         rsave = reg;
8957
8958         for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
8959                 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
8960
8961                 /* If up2tc is out of bounds default to zero */
8962                 if (up2tc > tc)
8963                         reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
8964         }
8965
8966         if (reg != rsave)
8967                 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
8968
8969         return;
8970 }
8971
8972 /**
8973  * ixgbe_set_prio_tc_map - Configure netdev prio tc map
8974  * @adapter: Pointer to adapter struct
8975  *
8976  * Populate the netdev user priority to tc map
8977  */
8978 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
8979 {
8980         struct net_device *dev = adapter->netdev;
8981         struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
8982         struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
8983         u8 prio;
8984
8985         for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
8986                 u8 tc = 0;
8987
8988                 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
8989                         tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
8990                 else if (ets)
8991                         tc = ets->prio_tc[prio];
8992
8993                 netdev_set_prio_tc_map(dev, prio, tc);
8994         }
8995 }
8996
8997 #endif /* CONFIG_IXGBE_DCB */
8998 static int ixgbe_reassign_macvlan_pool(struct net_device *vdev, void *data)
8999 {
9000         struct ixgbe_adapter *adapter = data;
9001         struct ixgbe_fwd_adapter *accel;
9002         int pool;
9003
9004         /* we only care about macvlans... */
9005         if (!netif_is_macvlan(vdev))
9006                 return 0;
9007
9008         /* that have hardware offload enabled... */
9009         accel = macvlan_accel_priv(vdev);
9010         if (!accel)
9011                 return 0;
9012
9013         /* If we can relocate to a different bit do so */
9014         pool = find_first_zero_bit(adapter->fwd_bitmask, adapter->num_rx_pools);
9015         if (pool < adapter->num_rx_pools) {
9016                 set_bit(pool, adapter->fwd_bitmask);
9017                 accel->pool = pool;
9018                 return 0;
9019         }
9020
9021         /* if we cannot find a free pool then disable the offload */
9022         netdev_err(vdev, "L2FW offload disabled due to lack of queue resources\n");
9023         macvlan_release_l2fw_offload(vdev);
9024
9025         /* unbind the queues and drop the subordinate channel config */
9026         netdev_unbind_sb_channel(adapter->netdev, vdev);
9027         netdev_set_sb_channel(vdev, 0);
9028
9029         kfree(accel);
9030
9031         return 0;
9032 }
9033
9034 static void ixgbe_defrag_macvlan_pools(struct net_device *dev)
9035 {
9036         struct ixgbe_adapter *adapter = netdev_priv(dev);
9037
9038         /* flush any stale bits out of the fwd bitmask */
9039         bitmap_clear(adapter->fwd_bitmask, 1, 63);
9040
9041         /* walk through upper devices reassigning pools */
9042         netdev_walk_all_upper_dev_rcu(dev, ixgbe_reassign_macvlan_pool,
9043                                       adapter);
9044 }
9045
9046 /**
9047  * ixgbe_setup_tc - configure net_device for multiple traffic classes
9048  *
9049  * @dev: net device to configure
9050  * @tc: number of traffic classes to enable
9051  */
9052 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
9053 {
9054         struct ixgbe_adapter *adapter = netdev_priv(dev);
9055         struct ixgbe_hw *hw = &adapter->hw;
9056
9057         /* Hardware supports up to 8 traffic classes */
9058         if (tc > adapter->dcb_cfg.num_tcs.pg_tcs)
9059                 return -EINVAL;
9060
9061         if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)
9062                 return -EINVAL;
9063
9064         /* Hardware has to reinitialize queues and interrupts to
9065          * match packet buffer alignment. Unfortunately, the
9066          * hardware is not flexible enough to do this dynamically.
9067          */
9068         if (netif_running(dev))
9069                 ixgbe_close(dev);
9070         else
9071                 ixgbe_reset(adapter);
9072
9073         ixgbe_clear_interrupt_scheme(adapter);
9074
9075 #ifdef CONFIG_IXGBE_DCB
9076         if (tc) {
9077                 if (adapter->xdp_prog) {
9078                         e_warn(probe, "DCB is not supported with XDP\n");
9079
9080                         ixgbe_init_interrupt_scheme(adapter);
9081                         if (netif_running(dev))
9082                                 ixgbe_open(dev);
9083                         return -EINVAL;
9084                 }
9085
9086                 netdev_set_num_tc(dev, tc);
9087                 ixgbe_set_prio_tc_map(adapter);
9088
9089                 adapter->hw_tcs = tc;
9090                 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
9091
9092                 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
9093                         adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
9094                         adapter->hw.fc.requested_mode = ixgbe_fc_none;
9095                 }
9096         } else {
9097                 netdev_reset_tc(dev);
9098
9099                 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
9100                         adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
9101
9102                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
9103                 adapter->hw_tcs = tc;
9104
9105                 adapter->temp_dcb_cfg.pfc_mode_enable = false;
9106                 adapter->dcb_cfg.pfc_mode_enable = false;
9107         }
9108
9109         ixgbe_validate_rtr(adapter, tc);
9110
9111 #endif /* CONFIG_IXGBE_DCB */
9112         ixgbe_init_interrupt_scheme(adapter);
9113
9114         ixgbe_defrag_macvlan_pools(dev);
9115
9116         if (netif_running(dev))
9117                 return ixgbe_open(dev);
9118
9119         return 0;
9120 }
9121
9122 static int ixgbe_delete_clsu32(struct ixgbe_adapter *adapter,
9123                                struct tc_cls_u32_offload *cls)
9124 {
9125         u32 hdl = cls->knode.handle;
9126         u32 uhtid = TC_U32_USERHTID(cls->knode.handle);
9127         u32 loc = cls->knode.handle & 0xfffff;
9128         int err = 0, i, j;
9129         struct ixgbe_jump_table *jump = NULL;
9130
9131         if (loc > IXGBE_MAX_HW_ENTRIES)
9132                 return -EINVAL;
9133
9134         if ((uhtid != 0x800) && (uhtid >= IXGBE_MAX_LINK_HANDLE))
9135                 return -EINVAL;
9136
9137         /* Clear this filter in the link data it is associated with */
9138         if (uhtid != 0x800) {
9139                 jump = adapter->jump_tables[uhtid];
9140                 if (!jump)
9141                         return -EINVAL;
9142                 if (!test_bit(loc - 1, jump->child_loc_map))
9143                         return -EINVAL;
9144                 clear_bit(loc - 1, jump->child_loc_map);
9145         }
9146
9147         /* Check if the filter being deleted is a link */
9148         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
9149                 jump = adapter->jump_tables[i];
9150                 if (jump && jump->link_hdl == hdl) {
9151                         /* Delete filters in the hardware in the child hash
9152                          * table associated with this link
9153                          */
9154                         for (j = 0; j < IXGBE_MAX_HW_ENTRIES; j++) {
9155                                 if (!test_bit(j, jump->child_loc_map))
9156                                         continue;
9157                                 spin_lock(&adapter->fdir_perfect_lock);
9158                                 err = ixgbe_update_ethtool_fdir_entry(adapter,
9159                                                                       NULL,
9160                                                                       j + 1);
9161                                 spin_unlock(&adapter->fdir_perfect_lock);
9162                                 clear_bit(j, jump->child_loc_map);
9163                         }
9164                         /* Remove resources for this link */
9165                         kfree(jump->input);
9166                         kfree(jump->mask);
9167                         kfree(jump);
9168                         adapter->jump_tables[i] = NULL;
9169                         return err;
9170                 }
9171         }
9172
9173         spin_lock(&adapter->fdir_perfect_lock);
9174         err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, loc);
9175         spin_unlock(&adapter->fdir_perfect_lock);
9176         return err;
9177 }
9178
9179 static int ixgbe_configure_clsu32_add_hnode(struct ixgbe_adapter *adapter,
9180                                             struct tc_cls_u32_offload *cls)
9181 {
9182         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
9183
9184         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9185                 return -EINVAL;
9186
9187         /* This ixgbe devices do not support hash tables at the moment
9188          * so abort when given hash tables.
9189          */
9190         if (cls->hnode.divisor > 0)
9191                 return -EINVAL;
9192
9193         set_bit(uhtid - 1, &adapter->tables);
9194         return 0;
9195 }
9196
9197 static int ixgbe_configure_clsu32_del_hnode(struct ixgbe_adapter *adapter,
9198                                             struct tc_cls_u32_offload *cls)
9199 {
9200         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
9201
9202         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9203                 return -EINVAL;
9204
9205         clear_bit(uhtid - 1, &adapter->tables);
9206         return 0;
9207 }
9208
9209 #ifdef CONFIG_NET_CLS_ACT
9210 struct upper_walk_data {
9211         struct ixgbe_adapter *adapter;
9212         u64 action;
9213         int ifindex;
9214         u8 queue;
9215 };
9216
9217 static int get_macvlan_queue(struct net_device *upper, void *_data)
9218 {
9219         if (netif_is_macvlan(upper)) {
9220                 struct ixgbe_fwd_adapter *vadapter = macvlan_accel_priv(upper);
9221                 struct upper_walk_data *data = _data;
9222                 struct ixgbe_adapter *adapter = data->adapter;
9223                 int ifindex = data->ifindex;
9224
9225                 if (vadapter && upper->ifindex == ifindex) {
9226                         data->queue = adapter->rx_ring[vadapter->rx_base_queue]->reg_idx;
9227                         data->action = data->queue;
9228                         return 1;
9229                 }
9230         }
9231
9232         return 0;
9233 }
9234
9235 static int handle_redirect_action(struct ixgbe_adapter *adapter, int ifindex,
9236                                   u8 *queue, u64 *action)
9237 {
9238         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
9239         unsigned int num_vfs = adapter->num_vfs, vf;
9240         struct upper_walk_data data;
9241         struct net_device *upper;
9242
9243         /* redirect to a SRIOV VF */
9244         for (vf = 0; vf < num_vfs; ++vf) {
9245                 upper = pci_get_drvdata(adapter->vfinfo[vf].vfdev);
9246                 if (upper->ifindex == ifindex) {
9247                         *queue = vf * __ALIGN_MASK(1, ~vmdq->mask);
9248                         *action = vf + 1;
9249                         *action <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
9250                         return 0;
9251                 }
9252         }
9253
9254         /* redirect to a offloaded macvlan netdev */
9255         data.adapter = adapter;
9256         data.ifindex = ifindex;
9257         data.action = 0;
9258         data.queue = 0;
9259         if (netdev_walk_all_upper_dev_rcu(adapter->netdev,
9260                                           get_macvlan_queue, &data)) {
9261                 *action = data.action;
9262                 *queue = data.queue;
9263
9264                 return 0;
9265         }
9266
9267         return -EINVAL;
9268 }
9269
9270 static int parse_tc_actions(struct ixgbe_adapter *adapter,
9271                             struct tcf_exts *exts, u64 *action, u8 *queue)
9272 {
9273         const struct tc_action *a;
9274         int i;
9275
9276         if (!tcf_exts_has_actions(exts))
9277                 return -EINVAL;
9278
9279         tcf_exts_for_each_action(i, a, exts) {
9280                 /* Drop action */
9281                 if (is_tcf_gact_shot(a)) {
9282                         *action = IXGBE_FDIR_DROP_QUEUE;
9283                         *queue = IXGBE_FDIR_DROP_QUEUE;
9284                         return 0;
9285                 }
9286
9287                 /* Redirect to a VF or a offloaded macvlan */
9288                 if (is_tcf_mirred_egress_redirect(a)) {
9289                         struct net_device *dev = tcf_mirred_dev(a);
9290
9291                         if (!dev)
9292                                 return -EINVAL;
9293                         return handle_redirect_action(adapter, dev->ifindex,
9294                                                       queue, action);
9295                 }
9296
9297                 return -EINVAL;
9298         }
9299
9300         return -EINVAL;
9301 }
9302 #else
9303 static int parse_tc_actions(struct ixgbe_adapter *adapter,
9304                             struct tcf_exts *exts, u64 *action, u8 *queue)
9305 {
9306         return -EINVAL;
9307 }
9308 #endif /* CONFIG_NET_CLS_ACT */
9309
9310 static int ixgbe_clsu32_build_input(struct ixgbe_fdir_filter *input,
9311                                     union ixgbe_atr_input *mask,
9312                                     struct tc_cls_u32_offload *cls,
9313                                     struct ixgbe_mat_field *field_ptr,
9314                                     struct ixgbe_nexthdr *nexthdr)
9315 {
9316         int i, j, off;
9317         __be32 val, m;
9318         bool found_entry = false, found_jump_field = false;
9319
9320         for (i = 0; i < cls->knode.sel->nkeys; i++) {
9321                 off = cls->knode.sel->keys[i].off;
9322                 val = cls->knode.sel->keys[i].val;
9323                 m = cls->knode.sel->keys[i].mask;
9324
9325                 for (j = 0; field_ptr[j].val; j++) {
9326                         if (field_ptr[j].off == off) {
9327                                 field_ptr[j].val(input, mask, (__force u32)val,
9328                                                  (__force u32)m);
9329                                 input->filter.formatted.flow_type |=
9330                                         field_ptr[j].type;
9331                                 found_entry = true;
9332                                 break;
9333                         }
9334                 }
9335                 if (nexthdr) {
9336                         if (nexthdr->off == cls->knode.sel->keys[i].off &&
9337                             nexthdr->val ==
9338                             (__force u32)cls->knode.sel->keys[i].val &&
9339                             nexthdr->mask ==
9340                             (__force u32)cls->knode.sel->keys[i].mask)
9341                                 found_jump_field = true;
9342                         else
9343                                 continue;
9344                 }
9345         }
9346
9347         if (nexthdr && !found_jump_field)
9348                 return -EINVAL;
9349
9350         if (!found_entry)
9351                 return 0;
9352
9353         mask->formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
9354                                     IXGBE_ATR_L4TYPE_MASK;
9355
9356         if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
9357                 mask->formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
9358
9359         return 0;
9360 }
9361
9362 static int ixgbe_configure_clsu32(struct ixgbe_adapter *adapter,
9363                                   struct tc_cls_u32_offload *cls)
9364 {
9365         __be16 protocol = cls->common.protocol;
9366         u32 loc = cls->knode.handle & 0xfffff;
9367         struct ixgbe_hw *hw = &adapter->hw;
9368         struct ixgbe_mat_field *field_ptr;
9369         struct ixgbe_fdir_filter *input = NULL;
9370         union ixgbe_atr_input *mask = NULL;
9371         struct ixgbe_jump_table *jump = NULL;
9372         int i, err = -EINVAL;
9373         u8 queue;
9374         u32 uhtid, link_uhtid;
9375
9376         uhtid = TC_U32_USERHTID(cls->knode.handle);
9377         link_uhtid = TC_U32_USERHTID(cls->knode.link_handle);
9378
9379         /* At the moment cls_u32 jumps to network layer and skips past
9380          * L2 headers. The canonical method to match L2 frames is to use
9381          * negative values. However this is error prone at best but really
9382          * just broken because there is no way to "know" what sort of hdr
9383          * is in front of the network layer. Fix cls_u32 to support L2
9384          * headers when needed.
9385          */
9386         if (protocol != htons(ETH_P_IP))
9387                 return err;
9388
9389         if (loc >= ((1024 << adapter->fdir_pballoc) - 2)) {
9390                 e_err(drv, "Location out of range\n");
9391                 return err;
9392         }
9393
9394         /* cls u32 is a graph starting at root node 0x800. The driver tracks
9395          * links and also the fields used to advance the parser across each
9396          * link (e.g. nexthdr/eat parameters from 'tc'). This way we can map
9397          * the u32 graph onto the hardware parse graph denoted in ixgbe_model.h
9398          * To add support for new nodes update ixgbe_model.h parse structures
9399          * this function _should_ be generic try not to hardcode values here.
9400          */
9401         if (uhtid == 0x800) {
9402                 field_ptr = (adapter->jump_tables[0])->mat;
9403         } else {
9404                 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9405                         return err;
9406                 if (!adapter->jump_tables[uhtid])
9407                         return err;
9408                 field_ptr = (adapter->jump_tables[uhtid])->mat;
9409         }
9410
9411         if (!field_ptr)
9412                 return err;
9413
9414         /* At this point we know the field_ptr is valid and need to either
9415          * build cls_u32 link or attach filter. Because adding a link to
9416          * a handle that does not exist is invalid and the same for adding
9417          * rules to handles that don't exist.
9418          */
9419
9420         if (link_uhtid) {
9421                 struct ixgbe_nexthdr *nexthdr = ixgbe_ipv4_jumps;
9422
9423                 if (link_uhtid >= IXGBE_MAX_LINK_HANDLE)
9424                         return err;
9425
9426                 if (!test_bit(link_uhtid - 1, &adapter->tables))
9427                         return err;
9428
9429                 /* Multiple filters as links to the same hash table are not
9430                  * supported. To add a new filter with the same next header
9431                  * but different match/jump conditions, create a new hash table
9432                  * and link to it.
9433                  */
9434                 if (adapter->jump_tables[link_uhtid] &&
9435                     (adapter->jump_tables[link_uhtid])->link_hdl) {
9436                         e_err(drv, "Link filter exists for link: %x\n",
9437                               link_uhtid);
9438                         return err;
9439                 }
9440
9441                 for (i = 0; nexthdr[i].jump; i++) {
9442                         if (nexthdr[i].o != cls->knode.sel->offoff ||
9443                             nexthdr[i].s != cls->knode.sel->offshift ||
9444                             nexthdr[i].m !=
9445                             (__force u32)cls->knode.sel->offmask)
9446                                 return err;
9447
9448                         jump = kzalloc(sizeof(*jump), GFP_KERNEL);
9449                         if (!jump)
9450                                 return -ENOMEM;
9451                         input = kzalloc(sizeof(*input), GFP_KERNEL);
9452                         if (!input) {
9453                                 err = -ENOMEM;
9454                                 goto free_jump;
9455                         }
9456                         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9457                         if (!mask) {
9458                                 err = -ENOMEM;
9459                                 goto free_input;
9460                         }
9461                         jump->input = input;
9462                         jump->mask = mask;
9463                         jump->link_hdl = cls->knode.handle;
9464
9465                         err = ixgbe_clsu32_build_input(input, mask, cls,
9466                                                        field_ptr, &nexthdr[i]);
9467                         if (!err) {
9468                                 jump->mat = nexthdr[i].jump;
9469                                 adapter->jump_tables[link_uhtid] = jump;
9470                                 break;
9471                         }
9472                 }
9473                 return 0;
9474         }
9475
9476         input = kzalloc(sizeof(*input), GFP_KERNEL);
9477         if (!input)
9478                 return -ENOMEM;
9479         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9480         if (!mask) {
9481                 err = -ENOMEM;
9482                 goto free_input;
9483         }
9484
9485         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid])) {
9486                 if ((adapter->jump_tables[uhtid])->input)
9487                         memcpy(input, (adapter->jump_tables[uhtid])->input,
9488                                sizeof(*input));
9489                 if ((adapter->jump_tables[uhtid])->mask)
9490                         memcpy(mask, (adapter->jump_tables[uhtid])->mask,
9491                                sizeof(*mask));
9492
9493                 /* Lookup in all child hash tables if this location is already
9494                  * filled with a filter
9495                  */
9496                 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
9497                         struct ixgbe_jump_table *link = adapter->jump_tables[i];
9498
9499                         if (link && (test_bit(loc - 1, link->child_loc_map))) {
9500                                 e_err(drv, "Filter exists in location: %x\n",
9501                                       loc);
9502                                 err = -EINVAL;
9503                                 goto err_out;
9504                         }
9505                 }
9506         }
9507         err = ixgbe_clsu32_build_input(input, mask, cls, field_ptr, NULL);
9508         if (err)
9509                 goto err_out;
9510
9511         err = parse_tc_actions(adapter, cls->knode.exts, &input->action,
9512                                &queue);
9513         if (err < 0)
9514                 goto err_out;
9515
9516         input->sw_idx = loc;
9517
9518         spin_lock(&adapter->fdir_perfect_lock);
9519
9520         if (hlist_empty(&adapter->fdir_filter_list)) {
9521                 memcpy(&adapter->fdir_mask, mask, sizeof(*mask));
9522                 err = ixgbe_fdir_set_input_mask_82599(hw, mask);
9523                 if (err)
9524                         goto err_out_w_lock;
9525         } else if (memcmp(&adapter->fdir_mask, mask, sizeof(*mask))) {
9526                 err = -EINVAL;
9527                 goto err_out_w_lock;
9528         }
9529
9530         ixgbe_atr_compute_perfect_hash_82599(&input->filter, mask);
9531         err = ixgbe_fdir_write_perfect_filter_82599(hw, &input->filter,
9532                                                     input->sw_idx, queue);
9533         if (!err)
9534                 ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
9535         spin_unlock(&adapter->fdir_perfect_lock);
9536
9537         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid]))
9538                 set_bit(loc - 1, (adapter->jump_tables[uhtid])->child_loc_map);
9539
9540         kfree(mask);
9541         return err;
9542 err_out_w_lock:
9543         spin_unlock(&adapter->fdir_perfect_lock);
9544 err_out:
9545         kfree(mask);
9546 free_input:
9547         kfree(input);
9548 free_jump:
9549         kfree(jump);
9550         return err;
9551 }
9552
9553 static int ixgbe_setup_tc_cls_u32(struct ixgbe_adapter *adapter,
9554                                   struct tc_cls_u32_offload *cls_u32)
9555 {
9556         switch (cls_u32->command) {
9557         case TC_CLSU32_NEW_KNODE:
9558         case TC_CLSU32_REPLACE_KNODE:
9559                 return ixgbe_configure_clsu32(adapter, cls_u32);
9560         case TC_CLSU32_DELETE_KNODE:
9561                 return ixgbe_delete_clsu32(adapter, cls_u32);
9562         case TC_CLSU32_NEW_HNODE:
9563         case TC_CLSU32_REPLACE_HNODE:
9564                 return ixgbe_configure_clsu32_add_hnode(adapter, cls_u32);
9565         case TC_CLSU32_DELETE_HNODE:
9566                 return ixgbe_configure_clsu32_del_hnode(adapter, cls_u32);
9567         default:
9568                 return -EOPNOTSUPP;
9569         }
9570 }
9571
9572 static int ixgbe_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
9573                                    void *cb_priv)
9574 {
9575         struct ixgbe_adapter *adapter = cb_priv;
9576
9577         if (!tc_cls_can_offload_and_chain0(adapter->netdev, type_data))
9578                 return -EOPNOTSUPP;
9579
9580         switch (type) {
9581         case TC_SETUP_CLSU32:
9582                 return ixgbe_setup_tc_cls_u32(adapter, type_data);
9583         default:
9584                 return -EOPNOTSUPP;
9585         }
9586 }
9587
9588 static int ixgbe_setup_tc_block(struct net_device *dev,
9589                                 struct tc_block_offload *f)
9590 {
9591         struct ixgbe_adapter *adapter = netdev_priv(dev);
9592
9593         if (f->binder_type != TCF_BLOCK_BINDER_TYPE_CLSACT_INGRESS)
9594                 return -EOPNOTSUPP;
9595
9596         switch (f->command) {
9597         case TC_BLOCK_BIND:
9598                 return tcf_block_cb_register(f->block, ixgbe_setup_tc_block_cb,
9599                                              adapter, adapter, f->extack);
9600         case TC_BLOCK_UNBIND:
9601                 tcf_block_cb_unregister(f->block, ixgbe_setup_tc_block_cb,
9602                                         adapter);
9603                 return 0;
9604         default:
9605                 return -EOPNOTSUPP;
9606         }
9607 }
9608
9609 static int ixgbe_setup_tc_mqprio(struct net_device *dev,
9610                                  struct tc_mqprio_qopt *mqprio)
9611 {
9612         mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
9613         return ixgbe_setup_tc(dev, mqprio->num_tc);
9614 }
9615
9616 static int __ixgbe_setup_tc(struct net_device *dev, enum tc_setup_type type,
9617                             void *type_data)
9618 {
9619         switch (type) {
9620         case TC_SETUP_BLOCK:
9621                 return ixgbe_setup_tc_block(dev, type_data);
9622         case TC_SETUP_QDISC_MQPRIO:
9623                 return ixgbe_setup_tc_mqprio(dev, type_data);
9624         default:
9625                 return -EOPNOTSUPP;
9626         }
9627 }
9628
9629 #ifdef CONFIG_PCI_IOV
9630 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
9631 {
9632         struct net_device *netdev = adapter->netdev;
9633
9634         rtnl_lock();
9635         ixgbe_setup_tc(netdev, adapter->hw_tcs);
9636         rtnl_unlock();
9637 }
9638
9639 #endif
9640 void ixgbe_do_reset(struct net_device *netdev)
9641 {
9642         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9643
9644         if (netif_running(netdev))
9645                 ixgbe_reinit_locked(adapter);
9646         else
9647                 ixgbe_reset(adapter);
9648 }
9649
9650 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
9651                                             netdev_features_t features)
9652 {
9653         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9654
9655         /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
9656         if (!(features & NETIF_F_RXCSUM))
9657                 features &= ~NETIF_F_LRO;
9658
9659         /* Turn off LRO if not RSC capable */
9660         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
9661                 features &= ~NETIF_F_LRO;
9662
9663         if (adapter->xdp_prog && (features & NETIF_F_LRO)) {
9664                 e_dev_err("LRO is not supported with XDP\n");
9665                 features &= ~NETIF_F_LRO;
9666         }
9667
9668         return features;
9669 }
9670
9671 static void ixgbe_reset_l2fw_offload(struct ixgbe_adapter *adapter)
9672 {
9673         int rss = min_t(int, ixgbe_max_rss_indices(adapter),
9674                         num_online_cpus());
9675
9676         /* go back to full RSS if we're not running SR-IOV */
9677         if (!adapter->ring_feature[RING_F_VMDQ].offset)
9678                 adapter->flags &= ~(IXGBE_FLAG_VMDQ_ENABLED |
9679                                     IXGBE_FLAG_SRIOV_ENABLED);
9680
9681         adapter->ring_feature[RING_F_RSS].limit = rss;
9682         adapter->ring_feature[RING_F_VMDQ].limit = 1;
9683
9684         ixgbe_setup_tc(adapter->netdev, adapter->hw_tcs);
9685 }
9686
9687 static int ixgbe_set_features(struct net_device *netdev,
9688                               netdev_features_t features)
9689 {
9690         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9691         netdev_features_t changed = netdev->features ^ features;
9692         bool need_reset = false;
9693
9694         /* Make sure RSC matches LRO, reset if change */
9695         if (!(features & NETIF_F_LRO)) {
9696                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
9697                         need_reset = true;
9698                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
9699         } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
9700                    !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
9701                 if (adapter->rx_itr_setting == 1 ||
9702                     adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
9703                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
9704                         need_reset = true;
9705                 } else if ((changed ^ features) & NETIF_F_LRO) {
9706                         e_info(probe, "rx-usecs set too low, "
9707                                "disabling RSC\n");
9708                 }
9709         }
9710
9711         /*
9712          * Check if Flow Director n-tuple support or hw_tc support was
9713          * enabled or disabled.  If the state changed, we need to reset.
9714          */
9715         if ((features & NETIF_F_NTUPLE) || (features & NETIF_F_HW_TC)) {
9716                 /* turn off ATR, enable perfect filters and reset */
9717                 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
9718                         need_reset = true;
9719
9720                 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
9721                 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9722         } else {
9723                 /* turn off perfect filters, enable ATR and reset */
9724                 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
9725                         need_reset = true;
9726
9727                 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9728
9729                 /* We cannot enable ATR if SR-IOV is enabled */
9730                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED ||
9731                     /* We cannot enable ATR if we have 2 or more tcs */
9732                     (adapter->hw_tcs > 1) ||
9733                     /* We cannot enable ATR if RSS is disabled */
9734                     (adapter->ring_feature[RING_F_RSS].limit <= 1) ||
9735                     /* A sample rate of 0 indicates ATR disabled */
9736                     (!adapter->atr_sample_rate))
9737                         ; /* do nothing not supported */
9738                 else /* otherwise supported and set the flag */
9739                         adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
9740         }
9741
9742         if (changed & NETIF_F_RXALL)
9743                 need_reset = true;
9744
9745         netdev->features = features;
9746
9747         if ((adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE)) {
9748                 if (features & NETIF_F_RXCSUM) {
9749                         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9750                 } else {
9751                         u32 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9752
9753                         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9754                 }
9755         }
9756
9757         if ((adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)) {
9758                 if (features & NETIF_F_RXCSUM) {
9759                         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9760                 } else {
9761                         u32 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9762
9763                         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9764                 }
9765         }
9766
9767         if ((changed & NETIF_F_HW_L2FW_DOFFLOAD) && adapter->num_rx_pools > 1)
9768                 ixgbe_reset_l2fw_offload(adapter);
9769         else if (need_reset)
9770                 ixgbe_do_reset(netdev);
9771         else if (changed & (NETIF_F_HW_VLAN_CTAG_RX |
9772                             NETIF_F_HW_VLAN_CTAG_FILTER))
9773                 ixgbe_set_rx_mode(netdev);
9774
9775         return 0;
9776 }
9777
9778 /**
9779  * ixgbe_add_udp_tunnel_port - Get notifications about adding UDP tunnel ports
9780  * @dev: The port's netdev
9781  * @ti: Tunnel endpoint information
9782  **/
9783 static void ixgbe_add_udp_tunnel_port(struct net_device *dev,
9784                                       struct udp_tunnel_info *ti)
9785 {
9786         struct ixgbe_adapter *adapter = netdev_priv(dev);
9787         struct ixgbe_hw *hw = &adapter->hw;
9788         __be16 port = ti->port;
9789         u32 port_shift = 0;
9790         u32 reg;
9791
9792         if (ti->sa_family != AF_INET)
9793                 return;
9794
9795         switch (ti->type) {
9796         case UDP_TUNNEL_TYPE_VXLAN:
9797                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9798                         return;
9799
9800                 if (adapter->vxlan_port == port)
9801                         return;
9802
9803                 if (adapter->vxlan_port) {
9804                         netdev_info(dev,
9805                                     "VXLAN port %d set, not adding port %d\n",
9806                                     ntohs(adapter->vxlan_port),
9807                                     ntohs(port));
9808                         return;
9809                 }
9810
9811                 adapter->vxlan_port = port;
9812                 break;
9813         case UDP_TUNNEL_TYPE_GENEVE:
9814                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9815                         return;
9816
9817                 if (adapter->geneve_port == port)
9818                         return;
9819
9820                 if (adapter->geneve_port) {
9821                         netdev_info(dev,
9822                                     "GENEVE port %d set, not adding port %d\n",
9823                                     ntohs(adapter->geneve_port),
9824                                     ntohs(port));
9825                         return;
9826                 }
9827
9828                 port_shift = IXGBE_VXLANCTRL_GENEVE_UDPPORT_SHIFT;
9829                 adapter->geneve_port = port;
9830                 break;
9831         default:
9832                 return;
9833         }
9834
9835         reg = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) | ntohs(port) << port_shift;
9836         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, reg);
9837 }
9838
9839 /**
9840  * ixgbe_del_udp_tunnel_port - Get notifications about removing UDP tunnel ports
9841  * @dev: The port's netdev
9842  * @ti: Tunnel endpoint information
9843  **/
9844 static void ixgbe_del_udp_tunnel_port(struct net_device *dev,
9845                                       struct udp_tunnel_info *ti)
9846 {
9847         struct ixgbe_adapter *adapter = netdev_priv(dev);
9848         u32 port_mask;
9849
9850         if (ti->type != UDP_TUNNEL_TYPE_VXLAN &&
9851             ti->type != UDP_TUNNEL_TYPE_GENEVE)
9852                 return;
9853
9854         if (ti->sa_family != AF_INET)
9855                 return;
9856
9857         switch (ti->type) {
9858         case UDP_TUNNEL_TYPE_VXLAN:
9859                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9860                         return;
9861
9862                 if (adapter->vxlan_port != ti->port) {
9863                         netdev_info(dev, "VXLAN port %d not found\n",
9864                                     ntohs(ti->port));
9865                         return;
9866                 }
9867
9868                 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9869                 break;
9870         case UDP_TUNNEL_TYPE_GENEVE:
9871                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9872                         return;
9873
9874                 if (adapter->geneve_port != ti->port) {
9875                         netdev_info(dev, "GENEVE port %d not found\n",
9876                                     ntohs(ti->port));
9877                         return;
9878                 }
9879
9880                 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9881                 break;
9882         default:
9883                 return;
9884         }
9885
9886         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9887         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9888 }
9889
9890 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
9891                              struct net_device *dev,
9892                              const unsigned char *addr, u16 vid,
9893                              u16 flags)
9894 {
9895         /* guarantee we can provide a unique filter for the unicast address */
9896         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
9897                 struct ixgbe_adapter *adapter = netdev_priv(dev);
9898                 u16 pool = VMDQ_P(0);
9899
9900                 if (netdev_uc_count(dev) >= ixgbe_available_rars(adapter, pool))
9901                         return -ENOMEM;
9902         }
9903
9904         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
9905 }
9906
9907 /**
9908  * ixgbe_configure_bridge_mode - set various bridge modes
9909  * @adapter: the private structure
9910  * @mode: requested bridge mode
9911  *
9912  * Configure some settings require for various bridge modes.
9913  **/
9914 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
9915                                        __u16 mode)
9916 {
9917         struct ixgbe_hw *hw = &adapter->hw;
9918         unsigned int p, num_pools;
9919         u32 vmdctl;
9920
9921         switch (mode) {
9922         case BRIDGE_MODE_VEPA:
9923                 /* disable Tx loopback, rely on switch hairpin mode */
9924                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
9925
9926                 /* must enable Rx switching replication to allow multicast
9927                  * packet reception on all VFs, and to enable source address
9928                  * pruning.
9929                  */
9930                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9931                 vmdctl |= IXGBE_VT_CTL_REPLEN;
9932                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9933
9934                 /* enable Rx source address pruning. Note, this requires
9935                  * replication to be enabled or else it does nothing.
9936                  */
9937                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9938                 for (p = 0; p < num_pools; p++) {
9939                         if (hw->mac.ops.set_source_address_pruning)
9940                                 hw->mac.ops.set_source_address_pruning(hw,
9941                                                                        true,
9942                                                                        p);
9943                 }
9944                 break;
9945         case BRIDGE_MODE_VEB:
9946                 /* enable Tx loopback for internal VF/PF communication */
9947                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
9948                                 IXGBE_PFDTXGSWC_VT_LBEN);
9949
9950                 /* disable Rx switching replication unless we have SR-IOV
9951                  * virtual functions
9952                  */
9953                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9954                 if (!adapter->num_vfs)
9955                         vmdctl &= ~IXGBE_VT_CTL_REPLEN;
9956                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9957
9958                 /* disable Rx source address pruning, since we don't expect to
9959                  * be receiving external loopback of our transmitted frames.
9960                  */
9961                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9962                 for (p = 0; p < num_pools; p++) {
9963                         if (hw->mac.ops.set_source_address_pruning)
9964                                 hw->mac.ops.set_source_address_pruning(hw,
9965                                                                        false,
9966                                                                        p);
9967                 }
9968                 break;
9969         default:
9970                 return -EINVAL;
9971         }
9972
9973         adapter->bridge_mode = mode;
9974
9975         e_info(drv, "enabling bridge mode: %s\n",
9976                mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
9977
9978         return 0;
9979 }
9980
9981 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
9982                                     struct nlmsghdr *nlh, u16 flags)
9983 {
9984         struct ixgbe_adapter *adapter = netdev_priv(dev);
9985         struct nlattr *attr, *br_spec;
9986         int rem;
9987
9988         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9989                 return -EOPNOTSUPP;
9990
9991         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
9992         if (!br_spec)
9993                 return -EINVAL;
9994
9995         nla_for_each_nested(attr, br_spec, rem) {
9996                 int status;
9997                 __u16 mode;
9998
9999                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
10000                         continue;
10001
10002                 if (nla_len(attr) < sizeof(mode))
10003                         return -EINVAL;
10004
10005                 mode = nla_get_u16(attr);
10006                 status = ixgbe_configure_bridge_mode(adapter, mode);
10007                 if (status)
10008                         return status;
10009
10010                 break;
10011         }
10012
10013         return 0;
10014 }
10015
10016 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
10017                                     struct net_device *dev,
10018                                     u32 filter_mask, int nlflags)
10019 {
10020         struct ixgbe_adapter *adapter = netdev_priv(dev);
10021
10022         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
10023                 return 0;
10024
10025         return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
10026                                        adapter->bridge_mode, 0, 0, nlflags,
10027                                        filter_mask, NULL);
10028 }
10029
10030 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
10031 {
10032         struct ixgbe_adapter *adapter = netdev_priv(pdev);
10033         struct ixgbe_fwd_adapter *accel;
10034         int tcs = adapter->hw_tcs ? : 1;
10035         int pool, err;
10036
10037         if (adapter->xdp_prog) {
10038                 e_warn(probe, "L2FW offload is not supported with XDP\n");
10039                 return ERR_PTR(-EINVAL);
10040         }
10041
10042         /* The hardware supported by ixgbe only filters on the destination MAC
10043          * address. In order to avoid issues we only support offloading modes
10044          * where the hardware can actually provide the functionality.
10045          */
10046         if (!macvlan_supports_dest_filter(vdev))
10047                 return ERR_PTR(-EMEDIUMTYPE);
10048
10049         /* We need to lock down the macvlan to be a single queue device so that
10050          * we can reuse the tc_to_txq field in the macvlan netdev to represent
10051          * the queue mapping to our netdev.
10052          */
10053         if (netif_is_multiqueue(vdev))
10054                 return ERR_PTR(-ERANGE);
10055
10056         pool = find_first_zero_bit(adapter->fwd_bitmask, adapter->num_rx_pools);
10057         if (pool == adapter->num_rx_pools) {
10058                 u16 used_pools = adapter->num_vfs + adapter->num_rx_pools;
10059                 u16 reserved_pools;
10060
10061                 if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
10062                      adapter->num_rx_pools >= (MAX_TX_QUEUES / tcs)) ||
10063                     adapter->num_rx_pools > IXGBE_MAX_MACVLANS)
10064                         return ERR_PTR(-EBUSY);
10065
10066                 /* Hardware has a limited number of available pools. Each VF,
10067                  * and the PF require a pool. Check to ensure we don't
10068                  * attempt to use more then the available number of pools.
10069                  */
10070                 if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
10071                         return ERR_PTR(-EBUSY);
10072
10073                 /* Enable VMDq flag so device will be set in VM mode */
10074                 adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED |
10075                                   IXGBE_FLAG_SRIOV_ENABLED;
10076
10077                 /* Try to reserve as many queues per pool as possible,
10078                  * we start with the configurations that support 4 queues
10079                  * per pools, followed by 2, and then by just 1 per pool.
10080                  */
10081                 if (used_pools < 32 && adapter->num_rx_pools < 16)
10082                         reserved_pools = min_t(u16,
10083                                                32 - used_pools,
10084                                                16 - adapter->num_rx_pools);
10085                 else if (adapter->num_rx_pools < 32)
10086                         reserved_pools = min_t(u16,
10087                                                64 - used_pools,
10088                                                32 - adapter->num_rx_pools);
10089                 else
10090                         reserved_pools = 64 - used_pools;
10091
10092
10093                 if (!reserved_pools)
10094                         return ERR_PTR(-EBUSY);
10095
10096                 adapter->ring_feature[RING_F_VMDQ].limit += reserved_pools;
10097
10098                 /* Force reinit of ring allocation with VMDQ enabled */
10099                 err = ixgbe_setup_tc(pdev, adapter->hw_tcs);
10100                 if (err)
10101                         return ERR_PTR(err);
10102
10103                 if (pool >= adapter->num_rx_pools)
10104                         return ERR_PTR(-ENOMEM);
10105         }
10106
10107         accel = kzalloc(sizeof(*accel), GFP_KERNEL);
10108         if (!accel)
10109                 return ERR_PTR(-ENOMEM);
10110
10111         set_bit(pool, adapter->fwd_bitmask);
10112         netdev_set_sb_channel(vdev, pool);
10113         accel->pool = pool;
10114         accel->netdev = vdev;
10115
10116         if (!netif_running(pdev))
10117                 return accel;
10118
10119         err = ixgbe_fwd_ring_up(adapter, accel);
10120         if (err)
10121                 return ERR_PTR(err);
10122
10123         return accel;
10124 }
10125
10126 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
10127 {
10128         struct ixgbe_fwd_adapter *accel = priv;
10129         struct ixgbe_adapter *adapter = netdev_priv(pdev);
10130         unsigned int rxbase = accel->rx_base_queue;
10131         unsigned int i;
10132
10133         /* delete unicast filter associated with offloaded interface */
10134         ixgbe_del_mac_filter(adapter, accel->netdev->dev_addr,
10135                              VMDQ_P(accel->pool));
10136
10137         /* Allow remaining Rx packets to get flushed out of the
10138          * Rx FIFO before we drop the netdev for the ring.
10139          */
10140         usleep_range(10000, 20000);
10141
10142         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
10143                 struct ixgbe_ring *ring = adapter->rx_ring[rxbase + i];
10144                 struct ixgbe_q_vector *qv = ring->q_vector;
10145
10146                 /* Make sure we aren't processing any packets and clear
10147                  * netdev to shut down the ring.
10148                  */
10149                 if (netif_running(adapter->netdev))
10150                         napi_synchronize(&qv->napi);
10151                 ring->netdev = NULL;
10152         }
10153
10154         /* unbind the queues and drop the subordinate channel config */
10155         netdev_unbind_sb_channel(pdev, accel->netdev);
10156         netdev_set_sb_channel(accel->netdev, 0);
10157
10158         clear_bit(accel->pool, adapter->fwd_bitmask);
10159         kfree(accel);
10160 }
10161
10162 #define IXGBE_MAX_MAC_HDR_LEN           127
10163 #define IXGBE_MAX_NETWORK_HDR_LEN       511
10164
10165 static netdev_features_t
10166 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,
10167                      netdev_features_t features)
10168 {
10169         unsigned int network_hdr_len, mac_hdr_len;
10170
10171         /* Make certain the headers can be described by a context descriptor */
10172         mac_hdr_len = skb_network_header(skb) - skb->data;
10173         if (unlikely(mac_hdr_len > IXGBE_MAX_MAC_HDR_LEN))
10174                 return features & ~(NETIF_F_HW_CSUM |
10175                                     NETIF_F_SCTP_CRC |
10176                                     NETIF_F_HW_VLAN_CTAG_TX |
10177                                     NETIF_F_TSO |
10178                                     NETIF_F_TSO6);
10179
10180         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
10181         if (unlikely(network_hdr_len >  IXGBE_MAX_NETWORK_HDR_LEN))
10182                 return features & ~(NETIF_F_HW_CSUM |
10183                                     NETIF_F_SCTP_CRC |
10184                                     NETIF_F_TSO |
10185                                     NETIF_F_TSO6);
10186
10187         /* We can only support IPV4 TSO in tunnels if we can mangle the
10188          * inner IP ID field, so strip TSO if MANGLEID is not supported.
10189          * IPsec offoad sets skb->encapsulation but still can handle
10190          * the TSO, so it's the exception.
10191          */
10192         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID)) {
10193 #ifdef CONFIG_IXGBE_IPSEC
10194                 if (!skb->sp)
10195 #endif
10196                         features &= ~NETIF_F_TSO;
10197         }
10198
10199         return features;
10200 }
10201
10202 static int ixgbe_xdp_setup(struct net_device *dev, struct bpf_prog *prog)
10203 {
10204         int i, frame_size = dev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
10205         struct ixgbe_adapter *adapter = netdev_priv(dev);
10206         struct bpf_prog *old_prog;
10207
10208         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
10209                 return -EINVAL;
10210
10211         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
10212                 return -EINVAL;
10213
10214         /* verify ixgbe ring attributes are sufficient for XDP */
10215         for (i = 0; i < adapter->num_rx_queues; i++) {
10216                 struct ixgbe_ring *ring = adapter->rx_ring[i];
10217
10218                 if (ring_is_rsc_enabled(ring))
10219                         return -EINVAL;
10220
10221                 if (frame_size > ixgbe_rx_bufsz(ring))
10222                         return -EINVAL;
10223         }
10224
10225         if (nr_cpu_ids > MAX_XDP_QUEUES)
10226                 return -ENOMEM;
10227
10228         old_prog = xchg(&adapter->xdp_prog, prog);
10229
10230         /* If transitioning XDP modes reconfigure rings */
10231         if (!!prog != !!old_prog) {
10232                 int err = ixgbe_setup_tc(dev, adapter->hw_tcs);
10233
10234                 if (err) {
10235                         rcu_assign_pointer(adapter->xdp_prog, old_prog);
10236                         return -EINVAL;
10237                 }
10238         } else {
10239                 for (i = 0; i < adapter->num_rx_queues; i++)
10240                         (void)xchg(&adapter->rx_ring[i]->xdp_prog,
10241                             adapter->xdp_prog);
10242         }
10243
10244         if (old_prog)
10245                 bpf_prog_put(old_prog);
10246
10247         return 0;
10248 }
10249
10250 static int ixgbe_xdp(struct net_device *dev, struct netdev_bpf *xdp)
10251 {
10252         struct ixgbe_adapter *adapter = netdev_priv(dev);
10253
10254         switch (xdp->command) {
10255         case XDP_SETUP_PROG:
10256                 return ixgbe_xdp_setup(dev, xdp->prog);
10257         case XDP_QUERY_PROG:
10258                 xdp->prog_id = adapter->xdp_prog ?
10259                         adapter->xdp_prog->aux->id : 0;
10260                 return 0;
10261         case XDP_QUERY_XSK_UMEM:
10262                 return ixgbe_xsk_umem_query(adapter, &xdp->xsk.umem,
10263                                             xdp->xsk.queue_id);
10264         case XDP_SETUP_XSK_UMEM:
10265                 return ixgbe_xsk_umem_setup(adapter, xdp->xsk.umem,
10266                                             xdp->xsk.queue_id);
10267
10268         default:
10269                 return -EINVAL;
10270         }
10271 }
10272
10273 void ixgbe_xdp_ring_update_tail(struct ixgbe_ring *ring)
10274 {
10275         /* Force memory writes to complete before letting h/w know there
10276          * are new descriptors to fetch.
10277          */
10278         wmb();
10279         writel(ring->next_to_use, ring->tail);
10280 }
10281
10282 static int ixgbe_xdp_xmit(struct net_device *dev, int n,
10283                           struct xdp_frame **frames, u32 flags)
10284 {
10285         struct ixgbe_adapter *adapter = netdev_priv(dev);
10286         struct ixgbe_ring *ring;
10287         int drops = 0;
10288         int i;
10289
10290         if (unlikely(test_bit(__IXGBE_DOWN, &adapter->state)))
10291                 return -ENETDOWN;
10292
10293         if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
10294                 return -EINVAL;
10295
10296         /* During program transitions its possible adapter->xdp_prog is assigned
10297          * but ring has not been configured yet. In this case simply abort xmit.
10298          */
10299         ring = adapter->xdp_prog ? adapter->xdp_ring[smp_processor_id()] : NULL;
10300         if (unlikely(!ring))
10301                 return -ENXIO;
10302
10303         if (unlikely(test_bit(__IXGBE_TX_DISABLED, &ring->state)))
10304                 return -ENXIO;
10305
10306         for (i = 0; i < n; i++) {
10307                 struct xdp_frame *xdpf = frames[i];
10308                 int err;
10309
10310                 err = ixgbe_xmit_xdp_ring(adapter, xdpf);
10311                 if (err != IXGBE_XDP_TX) {
10312                         xdp_return_frame_rx_napi(xdpf);
10313                         drops++;
10314                 }
10315         }
10316
10317         if (unlikely(flags & XDP_XMIT_FLUSH))
10318                 ixgbe_xdp_ring_update_tail(ring);
10319
10320         return n - drops;
10321 }
10322
10323 static const struct net_device_ops ixgbe_netdev_ops = {
10324         .ndo_open               = ixgbe_open,
10325         .ndo_stop               = ixgbe_close,
10326         .ndo_start_xmit         = ixgbe_xmit_frame,
10327         .ndo_set_rx_mode        = ixgbe_set_rx_mode,
10328         .ndo_validate_addr      = eth_validate_addr,
10329         .ndo_set_mac_address    = ixgbe_set_mac,
10330         .ndo_change_mtu         = ixgbe_change_mtu,
10331         .ndo_tx_timeout         = ixgbe_tx_timeout,
10332         .ndo_set_tx_maxrate     = ixgbe_tx_maxrate,
10333         .ndo_vlan_rx_add_vid    = ixgbe_vlan_rx_add_vid,
10334         .ndo_vlan_rx_kill_vid   = ixgbe_vlan_rx_kill_vid,
10335         .ndo_do_ioctl           = ixgbe_ioctl,
10336         .ndo_set_vf_mac         = ixgbe_ndo_set_vf_mac,
10337         .ndo_set_vf_vlan        = ixgbe_ndo_set_vf_vlan,
10338         .ndo_set_vf_rate        = ixgbe_ndo_set_vf_bw,
10339         .ndo_set_vf_spoofchk    = ixgbe_ndo_set_vf_spoofchk,
10340         .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
10341         .ndo_set_vf_trust       = ixgbe_ndo_set_vf_trust,
10342         .ndo_get_vf_config      = ixgbe_ndo_get_vf_config,
10343         .ndo_get_stats64        = ixgbe_get_stats64,
10344         .ndo_setup_tc           = __ixgbe_setup_tc,
10345 #ifdef IXGBE_FCOE
10346         .ndo_select_queue       = ixgbe_select_queue,
10347         .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
10348         .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
10349         .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
10350         .ndo_fcoe_enable = ixgbe_fcoe_enable,
10351         .ndo_fcoe_disable = ixgbe_fcoe_disable,
10352         .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
10353         .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
10354 #endif /* IXGBE_FCOE */
10355         .ndo_set_features = ixgbe_set_features,
10356         .ndo_fix_features = ixgbe_fix_features,
10357         .ndo_fdb_add            = ixgbe_ndo_fdb_add,
10358         .ndo_bridge_setlink     = ixgbe_ndo_bridge_setlink,
10359         .ndo_bridge_getlink     = ixgbe_ndo_bridge_getlink,
10360         .ndo_dfwd_add_station   = ixgbe_fwd_add,
10361         .ndo_dfwd_del_station   = ixgbe_fwd_del,
10362         .ndo_udp_tunnel_add     = ixgbe_add_udp_tunnel_port,
10363         .ndo_udp_tunnel_del     = ixgbe_del_udp_tunnel_port,
10364         .ndo_features_check     = ixgbe_features_check,
10365         .ndo_bpf                = ixgbe_xdp,
10366         .ndo_xdp_xmit           = ixgbe_xdp_xmit,
10367         .ndo_xsk_async_xmit     = ixgbe_xsk_async_xmit,
10368 };
10369
10370 static void ixgbe_disable_txr_hw(struct ixgbe_adapter *adapter,
10371                                  struct ixgbe_ring *tx_ring)
10372 {
10373         unsigned long wait_delay, delay_interval;
10374         struct ixgbe_hw *hw = &adapter->hw;
10375         u8 reg_idx = tx_ring->reg_idx;
10376         int wait_loop;
10377         u32 txdctl;
10378
10379         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
10380
10381         /* delay mechanism from ixgbe_disable_tx */
10382         delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
10383
10384         wait_loop = IXGBE_MAX_RX_DESC_POLL;
10385         wait_delay = delay_interval;
10386
10387         while (wait_loop--) {
10388                 usleep_range(wait_delay, wait_delay + 10);
10389                 wait_delay += delay_interval * 2;
10390                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
10391
10392                 if (!(txdctl & IXGBE_TXDCTL_ENABLE))
10393                         return;
10394         }
10395
10396         e_err(drv, "TXDCTL.ENABLE not cleared within the polling period\n");
10397 }
10398
10399 static void ixgbe_disable_txr(struct ixgbe_adapter *adapter,
10400                               struct ixgbe_ring *tx_ring)
10401 {
10402         set_bit(__IXGBE_TX_DISABLED, &tx_ring->state);
10403         ixgbe_disable_txr_hw(adapter, tx_ring);
10404 }
10405
10406 static void ixgbe_disable_rxr_hw(struct ixgbe_adapter *adapter,
10407                                  struct ixgbe_ring *rx_ring)
10408 {
10409         unsigned long wait_delay, delay_interval;
10410         struct ixgbe_hw *hw = &adapter->hw;
10411         u8 reg_idx = rx_ring->reg_idx;
10412         int wait_loop;
10413         u32 rxdctl;
10414
10415         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
10416         rxdctl &= ~IXGBE_RXDCTL_ENABLE;
10417         rxdctl |= IXGBE_RXDCTL_SWFLSH;
10418
10419         /* write value back with RXDCTL.ENABLE bit cleared */
10420         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
10421
10422         /* RXDCTL.EN may not change on 82598 if link is down, so skip it */
10423         if (hw->mac.type == ixgbe_mac_82598EB &&
10424             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
10425                 return;
10426
10427         /* delay mechanism from ixgbe_disable_rx */
10428         delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
10429
10430         wait_loop = IXGBE_MAX_RX_DESC_POLL;
10431         wait_delay = delay_interval;
10432
10433         while (wait_loop--) {
10434                 usleep_range(wait_delay, wait_delay + 10);
10435                 wait_delay += delay_interval * 2;
10436                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
10437
10438                 if (!(rxdctl & IXGBE_RXDCTL_ENABLE))
10439                         return;
10440         }
10441
10442         e_err(drv, "RXDCTL.ENABLE not cleared within the polling period\n");
10443 }
10444
10445 static void ixgbe_reset_txr_stats(struct ixgbe_ring *tx_ring)
10446 {
10447         memset(&tx_ring->stats, 0, sizeof(tx_ring->stats));
10448         memset(&tx_ring->tx_stats, 0, sizeof(tx_ring->tx_stats));
10449 }
10450
10451 static void ixgbe_reset_rxr_stats(struct ixgbe_ring *rx_ring)
10452 {
10453         memset(&rx_ring->stats, 0, sizeof(rx_ring->stats));
10454         memset(&rx_ring->rx_stats, 0, sizeof(rx_ring->rx_stats));
10455 }
10456
10457 /**
10458  * ixgbe_txrx_ring_disable - Disable Rx/Tx/XDP Tx rings
10459  * @adapter: adapter structure
10460  * @ring: ring index
10461  *
10462  * This function disables a certain Rx/Tx/XDP Tx ring. The function
10463  * assumes that the netdev is running.
10464  **/
10465 void ixgbe_txrx_ring_disable(struct ixgbe_adapter *adapter, int ring)
10466 {
10467         struct ixgbe_ring *rx_ring, *tx_ring, *xdp_ring;
10468
10469         rx_ring = adapter->rx_ring[ring];
10470         tx_ring = adapter->tx_ring[ring];
10471         xdp_ring = adapter->xdp_ring[ring];
10472
10473         ixgbe_disable_txr(adapter, tx_ring);
10474         if (xdp_ring)
10475                 ixgbe_disable_txr(adapter, xdp_ring);
10476         ixgbe_disable_rxr_hw(adapter, rx_ring);
10477
10478         if (xdp_ring)
10479                 synchronize_sched();
10480
10481         /* Rx/Tx/XDP Tx share the same napi context. */
10482         napi_disable(&rx_ring->q_vector->napi);
10483
10484         ixgbe_clean_tx_ring(tx_ring);
10485         if (xdp_ring)
10486                 ixgbe_clean_tx_ring(xdp_ring);
10487         ixgbe_clean_rx_ring(rx_ring);
10488
10489         ixgbe_reset_txr_stats(tx_ring);
10490         if (xdp_ring)
10491                 ixgbe_reset_txr_stats(xdp_ring);
10492         ixgbe_reset_rxr_stats(rx_ring);
10493 }
10494
10495 /**
10496  * ixgbe_txrx_ring_enable - Enable Rx/Tx/XDP Tx rings
10497  * @adapter: adapter structure
10498  * @ring: ring index
10499  *
10500  * This function enables a certain Rx/Tx/XDP Tx ring. The function
10501  * assumes that the netdev is running.
10502  **/
10503 void ixgbe_txrx_ring_enable(struct ixgbe_adapter *adapter, int ring)
10504 {
10505         struct ixgbe_ring *rx_ring, *tx_ring, *xdp_ring;
10506
10507         rx_ring = adapter->rx_ring[ring];
10508         tx_ring = adapter->tx_ring[ring];
10509         xdp_ring = adapter->xdp_ring[ring];
10510
10511         /* Rx/Tx/XDP Tx share the same napi context. */
10512         napi_enable(&rx_ring->q_vector->napi);
10513
10514         ixgbe_configure_tx_ring(adapter, tx_ring);
10515         if (xdp_ring)
10516                 ixgbe_configure_tx_ring(adapter, xdp_ring);
10517         ixgbe_configure_rx_ring(adapter, rx_ring);
10518
10519         clear_bit(__IXGBE_TX_DISABLED, &tx_ring->state);
10520         clear_bit(__IXGBE_TX_DISABLED, &xdp_ring->state);
10521 }
10522
10523 /**
10524  * ixgbe_enumerate_functions - Get the number of ports this device has
10525  * @adapter: adapter structure
10526  *
10527  * This function enumerates the phsyical functions co-located on a single slot,
10528  * in order to determine how many ports a device has. This is most useful in
10529  * determining the required GT/s of PCIe bandwidth necessary for optimal
10530  * performance.
10531  **/
10532 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
10533 {
10534         struct pci_dev *entry, *pdev = adapter->pdev;
10535         int physfns = 0;
10536
10537         /* Some cards can not use the generic count PCIe functions method,
10538          * because they are behind a parent switch, so we hardcode these with
10539          * the correct number of functions.
10540          */
10541         if (ixgbe_pcie_from_parent(&adapter->hw))
10542                 physfns = 4;
10543
10544         list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
10545                 /* don't count virtual functions */
10546                 if (entry->is_virtfn)
10547                         continue;
10548
10549                 /* When the devices on the bus don't all match our device ID,
10550                  * we can't reliably determine the correct number of
10551                  * functions. This can occur if a function has been direct
10552                  * attached to a virtual machine using VT-d, for example. In
10553                  * this case, simply return -1 to indicate this.
10554                  */
10555                 if ((entry->vendor != pdev->vendor) ||
10556                     (entry->device != pdev->device))
10557                         return -1;
10558
10559                 physfns++;
10560         }
10561
10562         return physfns;
10563 }
10564
10565 /**
10566  * ixgbe_wol_supported - Check whether device supports WoL
10567  * @adapter: the adapter private structure
10568  * @device_id: the device ID
10569  * @subdevice_id: the subsystem device ID
10570  *
10571  * This function is used by probe and ethtool to determine
10572  * which devices have WoL support
10573  *
10574  **/
10575 bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
10576                          u16 subdevice_id)
10577 {
10578         struct ixgbe_hw *hw = &adapter->hw;
10579         u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
10580
10581         /* WOL not supported on 82598 */
10582         if (hw->mac.type == ixgbe_mac_82598EB)
10583                 return false;
10584
10585         /* check eeprom to see if WOL is enabled for X540 and newer */
10586         if (hw->mac.type >= ixgbe_mac_X540) {
10587                 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
10588                     ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
10589                      (hw->bus.func == 0)))
10590                         return true;
10591         }
10592
10593         /* WOL is determined based on device IDs for 82599 MACs */
10594         switch (device_id) {
10595         case IXGBE_DEV_ID_82599_SFP:
10596                 /* Only these subdevices could supports WOL */
10597                 switch (subdevice_id) {
10598                 case IXGBE_SUBDEV_ID_82599_560FLR:
10599                 case IXGBE_SUBDEV_ID_82599_LOM_SNAP6:
10600                 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
10601                 case IXGBE_SUBDEV_ID_82599_SFP_2OCP:
10602                         /* only support first port */
10603                         if (hw->bus.func != 0)
10604                                 break;
10605                         /* fall through */
10606                 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
10607                 case IXGBE_SUBDEV_ID_82599_SFP:
10608                 case IXGBE_SUBDEV_ID_82599_RNDC:
10609                 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
10610                 case IXGBE_SUBDEV_ID_82599_SFP_1OCP:
10611                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM1:
10612                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM2:
10613                         return true;
10614                 }
10615                 break;
10616         case IXGBE_DEV_ID_82599EN_SFP:
10617                 /* Only these subdevices support WOL */
10618                 switch (subdevice_id) {
10619                 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
10620                         return true;
10621                 }
10622                 break;
10623         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
10624                 /* All except this subdevice support WOL */
10625                 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
10626                         return true;
10627                 break;
10628         case IXGBE_DEV_ID_82599_KX4:
10629                 return  true;
10630         default:
10631                 break;
10632         }
10633
10634         return false;
10635 }
10636
10637 /**
10638  * ixgbe_set_fw_version - Set FW version
10639  * @adapter: the adapter private structure
10640  *
10641  * This function is used by probe and ethtool to determine the FW version to
10642  * format to display. The FW version is taken from the EEPROM/NVM.
10643  */
10644 static void ixgbe_set_fw_version(struct ixgbe_adapter *adapter)
10645 {
10646         struct ixgbe_hw *hw = &adapter->hw;
10647         struct ixgbe_nvm_version nvm_ver;
10648
10649         ixgbe_get_oem_prod_version(hw, &nvm_ver);
10650         if (nvm_ver.oem_valid) {
10651                 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10652                          "%x.%x.%x", nvm_ver.oem_major, nvm_ver.oem_minor,
10653                          nvm_ver.oem_release);
10654                 return;
10655         }
10656
10657         ixgbe_get_etk_id(hw, &nvm_ver);
10658         ixgbe_get_orom_version(hw, &nvm_ver);
10659
10660         if (nvm_ver.or_valid) {
10661                 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10662                          "0x%08x, %d.%d.%d", nvm_ver.etk_id, nvm_ver.or_major,
10663                          nvm_ver.or_build, nvm_ver.or_patch);
10664                 return;
10665         }
10666
10667         /* Set ETrack ID format */
10668         snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10669                  "0x%08x", nvm_ver.etk_id);
10670 }
10671
10672 /**
10673  * ixgbe_probe - Device Initialization Routine
10674  * @pdev: PCI device information struct
10675  * @ent: entry in ixgbe_pci_tbl
10676  *
10677  * Returns 0 on success, negative on failure
10678  *
10679  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
10680  * The OS initialization, configuring of the adapter private structure,
10681  * and a hardware reset occur.
10682  **/
10683 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10684 {
10685         struct net_device *netdev;
10686         struct ixgbe_adapter *adapter = NULL;
10687         struct ixgbe_hw *hw;
10688         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
10689         int i, err, pci_using_dac, expected_gts;
10690         unsigned int indices = MAX_TX_QUEUES;
10691         u8 part_str[IXGBE_PBANUM_LENGTH];
10692         bool disable_dev = false;
10693 #ifdef IXGBE_FCOE
10694         u16 device_caps;
10695 #endif
10696         u32 eec;
10697
10698         /* Catch broken hardware that put the wrong VF device ID in
10699          * the PCIe SR-IOV capability.
10700          */
10701         if (pdev->is_virtfn) {
10702                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
10703                      pci_name(pdev), pdev->vendor, pdev->device);
10704                 return -EINVAL;
10705         }
10706
10707         err = pci_enable_device_mem(pdev);
10708         if (err)
10709                 return err;
10710
10711         if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
10712                 pci_using_dac = 1;
10713         } else {
10714                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10715                 if (err) {
10716                         dev_err(&pdev->dev,
10717                                 "No usable DMA configuration, aborting\n");
10718                         goto err_dma;
10719                 }
10720                 pci_using_dac = 0;
10721         }
10722
10723         err = pci_request_mem_regions(pdev, ixgbe_driver_name);
10724         if (err) {
10725                 dev_err(&pdev->dev,
10726                         "pci_request_selected_regions failed 0x%x\n", err);
10727                 goto err_pci_reg;
10728         }
10729
10730         pci_enable_pcie_error_reporting(pdev);
10731
10732         pci_set_master(pdev);
10733         pci_save_state(pdev);
10734
10735         if (ii->mac == ixgbe_mac_82598EB) {
10736 #ifdef CONFIG_IXGBE_DCB
10737                 /* 8 TC w/ 4 queues per TC */
10738                 indices = 4 * MAX_TRAFFIC_CLASS;
10739 #else
10740                 indices = IXGBE_MAX_RSS_INDICES;
10741 #endif
10742         }
10743
10744         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
10745         if (!netdev) {
10746                 err = -ENOMEM;
10747                 goto err_alloc_etherdev;
10748         }
10749
10750         SET_NETDEV_DEV(netdev, &pdev->dev);
10751
10752         adapter = netdev_priv(netdev);
10753
10754         adapter->netdev = netdev;
10755         adapter->pdev = pdev;
10756         hw = &adapter->hw;
10757         hw->back = adapter;
10758         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
10759
10760         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
10761                               pci_resource_len(pdev, 0));
10762         adapter->io_addr = hw->hw_addr;
10763         if (!hw->hw_addr) {
10764                 err = -EIO;
10765                 goto err_ioremap;
10766         }
10767
10768         netdev->netdev_ops = &ixgbe_netdev_ops;
10769         ixgbe_set_ethtool_ops(netdev);
10770         netdev->watchdog_timeo = 5 * HZ;
10771         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
10772
10773         /* Setup hw api */
10774         hw->mac.ops   = *ii->mac_ops;
10775         hw->mac.type  = ii->mac;
10776         hw->mvals     = ii->mvals;
10777         if (ii->link_ops)
10778                 hw->link.ops  = *ii->link_ops;
10779
10780         /* EEPROM */
10781         hw->eeprom.ops = *ii->eeprom_ops;
10782         eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
10783         if (ixgbe_removed(hw->hw_addr)) {
10784                 err = -EIO;
10785                 goto err_ioremap;
10786         }
10787         /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
10788         if (!(eec & BIT(8)))
10789                 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
10790
10791         /* PHY */
10792         hw->phy.ops = *ii->phy_ops;
10793         hw->phy.sfp_type = ixgbe_sfp_type_unknown;
10794         /* ixgbe_identify_phy_generic will set prtad and mmds properly */
10795         hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
10796         hw->phy.mdio.mmds = 0;
10797         hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
10798         hw->phy.mdio.dev = netdev;
10799         hw->phy.mdio.mdio_read = ixgbe_mdio_read;
10800         hw->phy.mdio.mdio_write = ixgbe_mdio_write;
10801
10802         /* setup the private structure */
10803         err = ixgbe_sw_init(adapter, ii);
10804         if (err)
10805                 goto err_sw_init;
10806
10807         /* Make sure the SWFW semaphore is in a valid state */
10808         if (hw->mac.ops.init_swfw_sync)
10809                 hw->mac.ops.init_swfw_sync(hw);
10810
10811         /* Make it possible the adapter to be woken up via WOL */
10812         switch (adapter->hw.mac.type) {
10813         case ixgbe_mac_82599EB:
10814         case ixgbe_mac_X540:
10815         case ixgbe_mac_X550:
10816         case ixgbe_mac_X550EM_x:
10817         case ixgbe_mac_x550em_a:
10818                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
10819                 break;
10820         default:
10821                 break;
10822         }
10823
10824         /*
10825          * If there is a fan on this device and it has failed log the
10826          * failure.
10827          */
10828         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
10829                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
10830                 if (esdp & IXGBE_ESDP_SDP1)
10831                         e_crit(probe, "Fan has stopped, replace the adapter\n");
10832         }
10833
10834         if (allow_unsupported_sfp)
10835                 hw->allow_unsupported_sfp = allow_unsupported_sfp;
10836
10837         /* reset_hw fills in the perm_addr as well */
10838         hw->phy.reset_if_overtemp = true;
10839         err = hw->mac.ops.reset_hw(hw);
10840         hw->phy.reset_if_overtemp = false;
10841         ixgbe_set_eee_capable(adapter);
10842         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
10843                 err = 0;
10844         } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
10845                 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
10846                 e_dev_err("Reload the driver after installing a supported module.\n");
10847                 goto err_sw_init;
10848         } else if (err) {
10849                 e_dev_err("HW Init failed: %d\n", err);
10850                 goto err_sw_init;
10851         }
10852
10853 #ifdef CONFIG_PCI_IOV
10854         /* SR-IOV not supported on the 82598 */
10855         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
10856                 goto skip_sriov;
10857         /* Mailbox */
10858         ixgbe_init_mbx_params_pf(hw);
10859         hw->mbx.ops = ii->mbx_ops;
10860         pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
10861         ixgbe_enable_sriov(adapter, max_vfs);
10862 skip_sriov:
10863
10864 #endif
10865         netdev->features = NETIF_F_SG |
10866                            NETIF_F_TSO |
10867                            NETIF_F_TSO6 |
10868                            NETIF_F_RXHASH |
10869                            NETIF_F_RXCSUM |
10870                            NETIF_F_HW_CSUM;
10871
10872 #define IXGBE_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
10873                                     NETIF_F_GSO_GRE_CSUM | \
10874                                     NETIF_F_GSO_IPXIP4 | \
10875                                     NETIF_F_GSO_IPXIP6 | \
10876                                     NETIF_F_GSO_UDP_TUNNEL | \
10877                                     NETIF_F_GSO_UDP_TUNNEL_CSUM)
10878
10879         netdev->gso_partial_features = IXGBE_GSO_PARTIAL_FEATURES;
10880         netdev->features |= NETIF_F_GSO_PARTIAL |
10881                             IXGBE_GSO_PARTIAL_FEATURES;
10882
10883         if (hw->mac.type >= ixgbe_mac_82599EB)
10884                 netdev->features |= NETIF_F_SCTP_CRC;
10885
10886 #ifdef CONFIG_IXGBE_IPSEC
10887 #define IXGBE_ESP_FEATURES      (NETIF_F_HW_ESP | \
10888                                  NETIF_F_HW_ESP_TX_CSUM | \
10889                                  NETIF_F_GSO_ESP)
10890
10891         if (adapter->ipsec)
10892                 netdev->features |= IXGBE_ESP_FEATURES;
10893 #endif
10894         /* copy netdev features into list of user selectable features */
10895         netdev->hw_features |= netdev->features |
10896                                NETIF_F_HW_VLAN_CTAG_FILTER |
10897                                NETIF_F_HW_VLAN_CTAG_RX |
10898                                NETIF_F_HW_VLAN_CTAG_TX |
10899                                NETIF_F_RXALL |
10900                                NETIF_F_HW_L2FW_DOFFLOAD;
10901
10902         if (hw->mac.type >= ixgbe_mac_82599EB)
10903                 netdev->hw_features |= NETIF_F_NTUPLE |
10904                                        NETIF_F_HW_TC;
10905
10906         if (pci_using_dac)
10907                 netdev->features |= NETIF_F_HIGHDMA;
10908
10909         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
10910         netdev->hw_enc_features |= netdev->vlan_features;
10911         netdev->mpls_features |= NETIF_F_SG |
10912                                  NETIF_F_TSO |
10913                                  NETIF_F_TSO6 |
10914                                  NETIF_F_HW_CSUM;
10915         netdev->mpls_features |= IXGBE_GSO_PARTIAL_FEATURES;
10916
10917         /* set this bit last since it cannot be part of vlan_features */
10918         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
10919                             NETIF_F_HW_VLAN_CTAG_RX |
10920                             NETIF_F_HW_VLAN_CTAG_TX;
10921
10922         netdev->priv_flags |= IFF_UNICAST_FLT;
10923         netdev->priv_flags |= IFF_SUPP_NOFCS;
10924
10925         /* MTU range: 68 - 9710 */
10926         netdev->min_mtu = ETH_MIN_MTU;
10927         netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN);
10928
10929 #ifdef CONFIG_IXGBE_DCB
10930         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
10931                 netdev->dcbnl_ops = &ixgbe_dcbnl_ops;
10932 #endif
10933
10934 #ifdef IXGBE_FCOE
10935         if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
10936                 unsigned int fcoe_l;
10937
10938                 if (hw->mac.ops.get_device_caps) {
10939                         hw->mac.ops.get_device_caps(hw, &device_caps);
10940                         if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
10941                                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
10942                 }
10943
10944
10945                 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
10946                 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
10947
10948                 netdev->features |= NETIF_F_FSO |
10949                                     NETIF_F_FCOE_CRC;
10950
10951                 netdev->vlan_features |= NETIF_F_FSO |
10952                                          NETIF_F_FCOE_CRC |
10953                                          NETIF_F_FCOE_MTU;
10954         }
10955 #endif /* IXGBE_FCOE */
10956         if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
10957                 netdev->hw_features |= NETIF_F_LRO;
10958         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
10959                 netdev->features |= NETIF_F_LRO;
10960
10961         if (ixgbe_check_fw_error(adapter)) {
10962                 err = -EIO;
10963                 goto err_sw_init;
10964         }
10965
10966         /* make sure the EEPROM is good */
10967         if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
10968                 e_dev_err("The EEPROM Checksum Is Not Valid\n");
10969                 err = -EIO;
10970                 goto err_sw_init;
10971         }
10972
10973         eth_platform_get_mac_address(&adapter->pdev->dev,
10974                                      adapter->hw.mac.perm_addr);
10975
10976         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
10977
10978         if (!is_valid_ether_addr(netdev->dev_addr)) {
10979                 e_dev_err("invalid MAC address\n");
10980                 err = -EIO;
10981                 goto err_sw_init;
10982         }
10983
10984         /* Set hw->mac.addr to permanent MAC address */
10985         ether_addr_copy(hw->mac.addr, hw->mac.perm_addr);
10986         ixgbe_mac_set_default_filter(adapter);
10987
10988         timer_setup(&adapter->service_timer, ixgbe_service_timer, 0);
10989
10990         if (ixgbe_removed(hw->hw_addr)) {
10991                 err = -EIO;
10992                 goto err_sw_init;
10993         }
10994         INIT_WORK(&adapter->service_task, ixgbe_service_task);
10995         set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
10996         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
10997
10998         err = ixgbe_init_interrupt_scheme(adapter);
10999         if (err)
11000                 goto err_sw_init;
11001
11002         for (i = 0; i < adapter->num_rx_queues; i++)
11003                 u64_stats_init(&adapter->rx_ring[i]->syncp);
11004         for (i = 0; i < adapter->num_tx_queues; i++)
11005                 u64_stats_init(&adapter->tx_ring[i]->syncp);
11006         for (i = 0; i < adapter->num_xdp_queues; i++)
11007                 u64_stats_init(&adapter->xdp_ring[i]->syncp);
11008
11009         /* WOL not supported for all devices */
11010         adapter->wol = 0;
11011         hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
11012         hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
11013                                                 pdev->subsystem_device);
11014         if (hw->wol_enabled)
11015                 adapter->wol = IXGBE_WUFC_MAG;
11016
11017         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
11018
11019         /* save off EEPROM version number */
11020         ixgbe_set_fw_version(adapter);
11021
11022         /* pick up the PCI bus settings for reporting later */
11023         if (ixgbe_pcie_from_parent(hw))
11024                 ixgbe_get_parent_bus_info(adapter);
11025         else
11026                  hw->mac.ops.get_bus_info(hw);
11027
11028         /* calculate the expected PCIe bandwidth required for optimal
11029          * performance. Note that some older parts will never have enough
11030          * bandwidth due to being older generation PCIe parts. We clamp these
11031          * parts to ensure no warning is displayed if it can't be fixed.
11032          */
11033         switch (hw->mac.type) {
11034         case ixgbe_mac_82598EB:
11035                 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
11036                 break;
11037         default:
11038                 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
11039                 break;
11040         }
11041
11042         /* don't check link if we failed to enumerate functions */
11043         if (expected_gts > 0)
11044                 ixgbe_check_minimum_link(adapter, expected_gts);
11045
11046         err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
11047         if (err)
11048                 strlcpy(part_str, "Unknown", sizeof(part_str));
11049         if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
11050                 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
11051                            hw->mac.type, hw->phy.type, hw->phy.sfp_type,
11052                            part_str);
11053         else
11054                 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
11055                            hw->mac.type, hw->phy.type, part_str);
11056
11057         e_dev_info("%pM\n", netdev->dev_addr);
11058
11059         /* reset the hardware with the new settings */
11060         err = hw->mac.ops.start_hw(hw);
11061         if (err == IXGBE_ERR_EEPROM_VERSION) {
11062                 /* We are running on a pre-production device, log a warning */
11063                 e_dev_warn("This device is a pre-production adapter/LOM. "
11064                            "Please be aware there may be issues associated "
11065                            "with your hardware.  If you are experiencing "
11066                            "problems please contact your Intel or hardware "
11067                            "representative who provided you with this "
11068                            "hardware.\n");
11069         }
11070         strcpy(netdev->name, "eth%d");
11071         pci_set_drvdata(pdev, adapter);
11072         err = register_netdev(netdev);
11073         if (err)
11074                 goto err_register;
11075
11076
11077         /* power down the optics for 82599 SFP+ fiber */
11078         if (hw->mac.ops.disable_tx_laser)
11079                 hw->mac.ops.disable_tx_laser(hw);
11080
11081         /* carrier off reporting is important to ethtool even BEFORE open */
11082         netif_carrier_off(netdev);
11083
11084 #ifdef CONFIG_IXGBE_DCA
11085         if (dca_add_requester(&pdev->dev) == 0) {
11086                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
11087                 ixgbe_setup_dca(adapter);
11088         }
11089 #endif
11090         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
11091                 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
11092                 for (i = 0; i < adapter->num_vfs; i++)
11093                         ixgbe_vf_configuration(pdev, (i | 0x10000000));
11094         }
11095
11096         /* firmware requires driver version to be 0xFFFFFFFF
11097          * since os does not support feature
11098          */
11099         if (hw->mac.ops.set_fw_drv_ver)
11100                 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF, 0xFF,
11101                                            sizeof(ixgbe_driver_version) - 1,
11102                                            ixgbe_driver_version);
11103
11104         /* add san mac addr to netdev */
11105         ixgbe_add_sanmac_netdev(netdev);
11106
11107         e_dev_info("%s\n", ixgbe_default_device_descr);
11108
11109 #ifdef CONFIG_IXGBE_HWMON
11110         if (ixgbe_sysfs_init(adapter))
11111                 e_err(probe, "failed to allocate sysfs resources\n");
11112 #endif /* CONFIG_IXGBE_HWMON */
11113
11114         ixgbe_dbg_adapter_init(adapter);
11115
11116         /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
11117         if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
11118                 hw->mac.ops.setup_link(hw,
11119                         IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
11120                         true);
11121
11122         return 0;
11123
11124 err_register:
11125         ixgbe_release_hw_control(adapter);
11126         ixgbe_clear_interrupt_scheme(adapter);
11127 err_sw_init:
11128         ixgbe_disable_sriov(adapter);
11129         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
11130         iounmap(adapter->io_addr);
11131         kfree(adapter->jump_tables[0]);
11132         kfree(adapter->mac_table);
11133         kfree(adapter->rss_key);
11134 err_ioremap:
11135         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
11136         free_netdev(netdev);
11137 err_alloc_etherdev:
11138         pci_release_mem_regions(pdev);
11139 err_pci_reg:
11140 err_dma:
11141         if (!adapter || disable_dev)
11142                 pci_disable_device(pdev);
11143         return err;
11144 }
11145
11146 /**
11147  * ixgbe_remove - Device Removal Routine
11148  * @pdev: PCI device information struct
11149  *
11150  * ixgbe_remove is called by the PCI subsystem to alert the driver
11151  * that it should release a PCI device.  The could be caused by a
11152  * Hot-Plug event, or because the driver is going to be removed from
11153  * memory.
11154  **/
11155 static void ixgbe_remove(struct pci_dev *pdev)
11156 {
11157         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11158         struct net_device *netdev;
11159         bool disable_dev;
11160         int i;
11161
11162         /* if !adapter then we already cleaned up in probe */
11163         if (!adapter)
11164                 return;
11165
11166         netdev  = adapter->netdev;
11167         ixgbe_dbg_adapter_exit(adapter);
11168
11169         set_bit(__IXGBE_REMOVING, &adapter->state);
11170         cancel_work_sync(&adapter->service_task);
11171
11172
11173 #ifdef CONFIG_IXGBE_DCA
11174         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
11175                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
11176                 dca_remove_requester(&pdev->dev);
11177                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
11178                                 IXGBE_DCA_CTRL_DCA_DISABLE);
11179         }
11180
11181 #endif
11182 #ifdef CONFIG_IXGBE_HWMON
11183         ixgbe_sysfs_exit(adapter);
11184 #endif /* CONFIG_IXGBE_HWMON */
11185
11186         /* remove the added san mac */
11187         ixgbe_del_sanmac_netdev(netdev);
11188
11189 #ifdef CONFIG_PCI_IOV
11190         ixgbe_disable_sriov(adapter);
11191 #endif
11192         if (netdev->reg_state == NETREG_REGISTERED)
11193                 unregister_netdev(netdev);
11194
11195         ixgbe_stop_ipsec_offload(adapter);
11196         ixgbe_clear_interrupt_scheme(adapter);
11197
11198         ixgbe_release_hw_control(adapter);
11199
11200 #ifdef CONFIG_DCB
11201         kfree(adapter->ixgbe_ieee_pfc);
11202         kfree(adapter->ixgbe_ieee_ets);
11203
11204 #endif
11205         iounmap(adapter->io_addr);
11206         pci_release_mem_regions(pdev);
11207
11208         e_dev_info("complete\n");
11209
11210         for (i = 0; i < IXGBE_MAX_LINK_HANDLE; i++) {
11211                 if (adapter->jump_tables[i]) {
11212                         kfree(adapter->jump_tables[i]->input);
11213                         kfree(adapter->jump_tables[i]->mask);
11214                 }
11215                 kfree(adapter->jump_tables[i]);
11216         }
11217
11218         kfree(adapter->mac_table);
11219         kfree(adapter->rss_key);
11220         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
11221         free_netdev(netdev);
11222
11223         pci_disable_pcie_error_reporting(pdev);
11224
11225         if (disable_dev)
11226                 pci_disable_device(pdev);
11227 }
11228
11229 /**
11230  * ixgbe_io_error_detected - called when PCI error is detected
11231  * @pdev: Pointer to PCI device
11232  * @state: The current pci connection state
11233  *
11234  * This function is called after a PCI bus error affecting
11235  * this device has been detected.
11236  */
11237 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
11238                                                 pci_channel_state_t state)
11239 {
11240         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11241         struct net_device *netdev = adapter->netdev;
11242
11243 #ifdef CONFIG_PCI_IOV
11244         struct ixgbe_hw *hw = &adapter->hw;
11245         struct pci_dev *bdev, *vfdev;
11246         u32 dw0, dw1, dw2, dw3;
11247         int vf, pos;
11248         u16 req_id, pf_func;
11249
11250         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
11251             adapter->num_vfs == 0)
11252                 goto skip_bad_vf_detection;
11253
11254         bdev = pdev->bus->self;
11255         while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
11256                 bdev = bdev->bus->self;
11257
11258         if (!bdev)
11259                 goto skip_bad_vf_detection;
11260
11261         pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
11262         if (!pos)
11263                 goto skip_bad_vf_detection;
11264
11265         dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
11266         dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
11267         dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
11268         dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
11269         if (ixgbe_removed(hw->hw_addr))
11270                 goto skip_bad_vf_detection;
11271
11272         req_id = dw1 >> 16;
11273         /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
11274         if (!(req_id & 0x0080))
11275                 goto skip_bad_vf_detection;
11276
11277         pf_func = req_id & 0x01;
11278         if ((pf_func & 1) == (pdev->devfn & 1)) {
11279                 unsigned int device_id;
11280
11281                 vf = (req_id & 0x7F) >> 1;
11282                 e_dev_err("VF %d has caused a PCIe error\n", vf);
11283                 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
11284                                 "%8.8x\tdw3: %8.8x\n",
11285                 dw0, dw1, dw2, dw3);
11286                 switch (adapter->hw.mac.type) {
11287                 case ixgbe_mac_82599EB:
11288                         device_id = IXGBE_82599_VF_DEVICE_ID;
11289                         break;
11290                 case ixgbe_mac_X540:
11291                         device_id = IXGBE_X540_VF_DEVICE_ID;
11292                         break;
11293                 case ixgbe_mac_X550:
11294                         device_id = IXGBE_DEV_ID_X550_VF;
11295                         break;
11296                 case ixgbe_mac_X550EM_x:
11297                         device_id = IXGBE_DEV_ID_X550EM_X_VF;
11298                         break;
11299                 case ixgbe_mac_x550em_a:
11300                         device_id = IXGBE_DEV_ID_X550EM_A_VF;
11301                         break;
11302                 default:
11303                         device_id = 0;
11304                         break;
11305                 }
11306
11307                 /* Find the pci device of the offending VF */
11308                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
11309                 while (vfdev) {
11310                         if (vfdev->devfn == (req_id & 0xFF))
11311                                 break;
11312                         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
11313                                                device_id, vfdev);
11314                 }
11315                 /*
11316                  * There's a slim chance the VF could have been hot plugged,
11317                  * so if it is no longer present we don't need to issue the
11318                  * VFLR.  Just clean up the AER in that case.
11319                  */
11320                 if (vfdev) {
11321                         pcie_flr(vfdev);
11322                         /* Free device reference count */
11323                         pci_dev_put(vfdev);
11324                 }
11325         }
11326
11327         /*
11328          * Even though the error may have occurred on the other port
11329          * we still need to increment the vf error reference count for
11330          * both ports because the I/O resume function will be called
11331          * for both of them.
11332          */
11333         adapter->vferr_refcount++;
11334
11335         return PCI_ERS_RESULT_RECOVERED;
11336
11337 skip_bad_vf_detection:
11338 #endif /* CONFIG_PCI_IOV */
11339         if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
11340                 return PCI_ERS_RESULT_DISCONNECT;
11341
11342         if (!netif_device_present(netdev))
11343                 return PCI_ERS_RESULT_DISCONNECT;
11344
11345         rtnl_lock();
11346         netif_device_detach(netdev);
11347
11348         if (netif_running(netdev))
11349                 ixgbe_close_suspend(adapter);
11350
11351         if (state == pci_channel_io_perm_failure) {
11352                 rtnl_unlock();
11353                 return PCI_ERS_RESULT_DISCONNECT;
11354         }
11355
11356         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
11357                 pci_disable_device(pdev);
11358         rtnl_unlock();
11359
11360         /* Request a slot reset. */
11361         return PCI_ERS_RESULT_NEED_RESET;
11362 }
11363
11364 /**
11365  * ixgbe_io_slot_reset - called after the pci bus has been reset.
11366  * @pdev: Pointer to PCI device
11367  *
11368  * Restart the card from scratch, as if from a cold-boot.
11369  */
11370 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
11371 {
11372         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11373         pci_ers_result_t result;
11374
11375         if (pci_enable_device_mem(pdev)) {
11376                 e_err(probe, "Cannot re-enable PCI device after reset.\n");
11377                 result = PCI_ERS_RESULT_DISCONNECT;
11378         } else {
11379                 smp_mb__before_atomic();
11380                 clear_bit(__IXGBE_DISABLED, &adapter->state);
11381                 adapter->hw.hw_addr = adapter->io_addr;
11382                 pci_set_master(pdev);
11383                 pci_restore_state(pdev);
11384                 pci_save_state(pdev);
11385
11386                 pci_wake_from_d3(pdev, false);
11387
11388                 ixgbe_reset(adapter);
11389                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
11390                 result = PCI_ERS_RESULT_RECOVERED;
11391         }
11392
11393         return result;
11394 }
11395
11396 /**
11397  * ixgbe_io_resume - called when traffic can start flowing again.
11398  * @pdev: Pointer to PCI device
11399  *
11400  * This callback is called when the error recovery driver tells us that
11401  * its OK to resume normal operation.
11402  */
11403 static void ixgbe_io_resume(struct pci_dev *pdev)
11404 {
11405         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11406         struct net_device *netdev = adapter->netdev;
11407
11408 #ifdef CONFIG_PCI_IOV
11409         if (adapter->vferr_refcount) {
11410                 e_info(drv, "Resuming after VF err\n");
11411                 adapter->vferr_refcount--;
11412                 return;
11413         }
11414
11415 #endif
11416         rtnl_lock();
11417         if (netif_running(netdev))
11418                 ixgbe_open(netdev);
11419
11420         netif_device_attach(netdev);
11421         rtnl_unlock();
11422 }
11423
11424 static const struct pci_error_handlers ixgbe_err_handler = {
11425         .error_detected = ixgbe_io_error_detected,
11426         .slot_reset = ixgbe_io_slot_reset,
11427         .resume = ixgbe_io_resume,
11428 };
11429
11430 static struct pci_driver ixgbe_driver = {
11431         .name     = ixgbe_driver_name,
11432         .id_table = ixgbe_pci_tbl,
11433         .probe    = ixgbe_probe,
11434         .remove   = ixgbe_remove,
11435 #ifdef CONFIG_PM
11436         .suspend  = ixgbe_suspend,
11437         .resume   = ixgbe_resume,
11438 #endif
11439         .shutdown = ixgbe_shutdown,
11440         .sriov_configure = ixgbe_pci_sriov_configure,
11441         .err_handler = &ixgbe_err_handler
11442 };
11443
11444 /**
11445  * ixgbe_init_module - Driver Registration Routine
11446  *
11447  * ixgbe_init_module is the first routine called when the driver is
11448  * loaded. All it does is register with the PCI subsystem.
11449  **/
11450 static int __init ixgbe_init_module(void)
11451 {
11452         int ret;
11453         pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
11454         pr_info("%s\n", ixgbe_copyright);
11455
11456         ixgbe_wq = create_singlethread_workqueue(ixgbe_driver_name);
11457         if (!ixgbe_wq) {
11458                 pr_err("%s: Failed to create workqueue\n", ixgbe_driver_name);
11459                 return -ENOMEM;
11460         }
11461
11462         ixgbe_dbg_init();
11463
11464         ret = pci_register_driver(&ixgbe_driver);
11465         if (ret) {
11466                 destroy_workqueue(ixgbe_wq);
11467                 ixgbe_dbg_exit();
11468                 return ret;
11469         }
11470
11471 #ifdef CONFIG_IXGBE_DCA
11472         dca_register_notify(&dca_notifier);
11473 #endif
11474
11475         return 0;
11476 }
11477
11478 module_init(ixgbe_init_module);
11479
11480 /**
11481  * ixgbe_exit_module - Driver Exit Cleanup Routine
11482  *
11483  * ixgbe_exit_module is called just before the driver is removed
11484  * from memory.
11485  **/
11486 static void __exit ixgbe_exit_module(void)
11487 {
11488 #ifdef CONFIG_IXGBE_DCA
11489         dca_unregister_notify(&dca_notifier);
11490 #endif
11491         pci_unregister_driver(&ixgbe_driver);
11492
11493         ixgbe_dbg_exit();
11494         if (ixgbe_wq) {
11495                 destroy_workqueue(ixgbe_wq);
11496                 ixgbe_wq = NULL;
11497         }
11498 }
11499
11500 #ifdef CONFIG_IXGBE_DCA
11501 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
11502                             void *p)
11503 {
11504         int ret_val;
11505
11506         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
11507                                          __ixgbe_notify_dca);
11508
11509         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
11510 }
11511
11512 #endif /* CONFIG_IXGBE_DCA */
11513
11514 module_exit(ixgbe_exit_module);
11515
11516 /* ixgbe_main.c */