drivers/net/ethernet/intel/igb/igb_ptp.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /* Copyright (C) 2011 Richard Cochran <richardcochran@gmail.com> */
   3
   4 #include <linux/module.h>
   5 #include <linux/device.h>
   6 #include <linux/pci.h>
   7 #include <linux/ptp_classify.h>
   8
   9 #include "igb.h"
  10
  11 #define INCVALUE_MASK           0x7fffffff
  12 #define ISGN                    0x80000000
  13
  14 /* The 82580 timesync updates the system timer every 8ns by 8ns,
  15  * and this update value cannot be reprogrammed.
  16  *
  17  * Neither the 82576 nor the 82580 offer registers wide enough to hold
  18  * nanoseconds time values for very long. For the 82580, SYSTIM always
  19  * counts nanoseconds, but the upper 24 bits are not available. The
  20  * frequency is adjusted by changing the 32 bit fractional nanoseconds
  21  * register, TIMINCA.
  22  *
  23  * For the 82576, the SYSTIM register time unit is affect by the
  24  * choice of the 24 bit TININCA:IV (incvalue) field. Five bits of this
  25  * field are needed to provide the nominal 16 nanosecond period,
  26  * leaving 19 bits for fractional nanoseconds.
  27  *
  28  * We scale the NIC clock cycle by a large factor so that relatively
  29  * small clock corrections can be added or subtracted at each clock
  30  * tick. The drawbacks of a large factor are a) that the clock
  31  * register overflows more quickly (not such a big deal) and b) that
  32  * the increment per tick has to fit into 24 bits.  As a result we
  33  * need to use a shift of 19 so we can fit a value of 16 into the
  34  * TIMINCA register.
  35  *
  36  *
  37  *             SYSTIMH            SYSTIML
  38  *        +--------------+   +---+---+------+
  39  *  82576 |      32      |   | 8 | 5 |  19  |
  40  *        +--------------+   +---+---+------+
  41  *         \________ 45 bits _______/  fract
  42  *
  43  *        +----------+---+   +--------------+
  44  *  82580 |    24    | 8 |   |      32      |
  45  *        +----------+---+   +--------------+
  46  *          reserved  \______ 40 bits _____/
  47  *
  48  *
  49  * The 45 bit 82576 SYSTIM overflows every
  50  *   2^45 * 10^-9 / 3600 = 9.77 hours.
  51  *
  52  * The 40 bit 82580 SYSTIM overflows every
  53  *   2^40 * 10^-9 /  60  = 18.3 minutes.
  54  *
  55  * SYSTIM is converted to real time using a timecounter. As
  56  * timecounter_cyc2time() allows old timestamps, the timecounter needs
  57  * to be updated at least once per half of the SYSTIM interval.
  58  * Scheduling of delayed work is not very accurate, and also the NIC
  59  * clock can be adjusted to run up to 6% faster and the system clock
  60  * up to 10% slower, so we aim for 6 minutes to be sure the actual
  61  * interval in the NIC time is shorter than 9.16 minutes.
  62  */
  63
  64 #define IGB_SYSTIM_OVERFLOW_PERIOD      (HZ * 60 * 6)
  65 #define IGB_PTP_TX_TIMEOUT              (HZ * 15)
  66 #define INCPERIOD_82576                 BIT(E1000_TIMINCA_16NS_SHIFT)
  67 #define INCVALUE_82576_MASK             GENMASK(E1000_TIMINCA_16NS_SHIFT - 1, 0)
  68 #define INCVALUE_82576                  (16u << IGB_82576_TSYNC_SHIFT)
  69 #define IGB_NBITS_82580                 40
  70
  71 static void igb_ptp_tx_hwtstamp(struct igb_adapter *adapter);
  72
  73 /* SYSTIM read access for the 82576 */
  74 static u64 igb_ptp_read_82576(const struct cyclecounter *cc)
  75 {
  76         struct igb_adapter *igb = container_of(cc, struct igb_adapter, cc);
  77         struct e1000_hw *hw = &igb->hw;
  78         u64 val;
  79         u32 lo, hi;
  80
  81         lo = rd32(E1000_SYSTIML);
  82         hi = rd32(E1000_SYSTIMH);
  83
  84         val = ((u64) hi) << 32;
  85         val |= lo;
  86
  87         return val;
  88 }
  89
  90 /* SYSTIM read access for the 82580 */
  91 static u64 igb_ptp_read_82580(const struct cyclecounter *cc)
  92 {
  93         struct igb_adapter *igb = container_of(cc, struct igb_adapter, cc);
  94         struct e1000_hw *hw = &igb->hw;
  95         u32 lo, hi;
  96         u64 val;
  97
  98         /* The timestamp latches on lowest register read. For the 82580
  99          * the lowest register is SYSTIMR instead of SYSTIML.  However we only
 100          * need to provide nanosecond resolution, so we just ignore it.
 101          */
 102         rd32(E1000_SYSTIMR);
 103         lo = rd32(E1000_SYSTIML);
 104         hi = rd32(E1000_SYSTIMH);
 105
 106         val = ((u64) hi) << 32;
 107         val |= lo;
 108
 109         return val;
 110 }
 111
 112 /* SYSTIM read access for I210/I211 */
 113 static void igb_ptp_read_i210(struct igb_adapter *adapter,
 114                               struct timespec64 *ts)
 115 {
 116         struct e1000_hw *hw = &adapter->hw;
 117         u32 sec, nsec;
 118
 119         /* The timestamp latches on lowest register read. For I210/I211, the
 120          * lowest register is SYSTIMR. Since we only need to provide nanosecond
 121          * resolution, we can ignore it.
 122          */
 123         rd32(E1000_SYSTIMR);
 124         nsec = rd32(E1000_SYSTIML);
 125         sec = rd32(E1000_SYSTIMH);
 126
 127         ts->tv_sec = sec;
 128         ts->tv_nsec = nsec;
 129 }
 130
 131 static void igb_ptp_write_i210(struct igb_adapter *adapter,
 132                                const struct timespec64 *ts)
 133 {
 134         struct e1000_hw *hw = &adapter->hw;
 135
 136         /* Writing the SYSTIMR register is not necessary as it only provides
 137          * sub-nanosecond resolution.
 138          */
 139         wr32(E1000_SYSTIML, ts->tv_nsec);
 140         wr32(E1000_SYSTIMH, (u32)ts->tv_sec);
 141 }
 142
 143 /**
 144  * igb_ptp_systim_to_hwtstamp - convert system time value to hw timestamp
 145  * @adapter: board private structure
 146  * @hwtstamps: timestamp structure to update
 147  * @systim: unsigned 64bit system time value.
 148  *
 149  * We need to convert the system time value stored in the RX/TXSTMP registers
 150  * into a hwtstamp which can be used by the upper level timestamping functions.
 151  *
 152  * The 'tmreg_lock' spinlock is used to protect the consistency of the
 153  * system time value. This is needed because reading the 64 bit time
 154  * value involves reading two (or three) 32 bit registers. The first
 155  * read latches the value. Ditto for writing.
 156  *
 157  * In addition, here have extended the system time with an overflow
 158  * counter in software.
 159  **/
 160 static void igb_ptp_systim_to_hwtstamp(struct igb_adapter *adapter,
 161                                        struct skb_shared_hwtstamps *hwtstamps,
 162                                        u64 systim)
 163 {
 164         unsigned long flags;
 165         u64 ns;
 166
 167         switch (adapter->hw.mac.type) {
 168         case e1000_82576:
 169         case e1000_82580:
 170         case e1000_i354:
 171         case e1000_i350:
 172                 spin_lock_irqsave(&adapter->tmreg_lock, flags);
 173
 174                 ns = timecounter_cyc2time(&adapter->tc, systim);
 175
 176                 spin_unlock_irqrestore(&adapter->tmreg_lock, flags);
 177
 178                 memset(hwtstamps, 0, sizeof(*hwtstamps));
 179                 hwtstamps->hwtstamp = ns_to_ktime(ns);
 180                 break;
 181         case e1000_i210:
 182         case e1000_i211:
 183                 memset(hwtstamps, 0, sizeof(*hwtstamps));
 184                 /* Upper 32 bits contain s, lower 32 bits contain ns. */
 185                 hwtstamps->hwtstamp = ktime_set(systim >> 32,
 186                                                 systim & 0xFFFFFFFF);
 187                 break;
 188         default:
 189                 break;
 190         }
 191 }
 192
 193 /* PTP clock operations */
 194 static int igb_ptp_adjfreq_82576(struct ptp_clock_info *ptp, s32 ppb)
 195 {
 196         struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
 197                                                ptp_caps);
 198         struct e1000_hw *hw = &igb->hw;
 199         int neg_adj = 0;
 200         u64 rate;
 201         u32 incvalue;
 202
 203         if (ppb < 0) {
 204                 neg_adj = 1;
 205                 ppb = -ppb;
 206         }
 207         rate = ppb;
 208         rate <<= 14;
 209         rate = div_u64(rate, 1953125);
 210
 211         incvalue = 16 << IGB_82576_TSYNC_SHIFT;
 212
 213         if (neg_adj)
 214                 incvalue -= rate;
 215         else
 216                 incvalue += rate;
 217
 218         wr32(E1000_TIMINCA, INCPERIOD_82576 | (incvalue & INCVALUE_82576_MASK));
 219
 220         return 0;
 221 }
 222
 223 static int igb_ptp_adjfine_82580(struct ptp_clock_info *ptp, long scaled_ppm)
 224 {
 225         struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
 226                                                ptp_caps);
 227         struct e1000_hw *hw = &igb->hw;
 228         int neg_adj = 0;
 229         u64 rate;
 230         u32 inca;
 231
 232         if (scaled_ppm < 0) {
 233                 neg_adj = 1;
 234                 scaled_ppm = -scaled_ppm;
 235         }
 236         rate = scaled_ppm;
 237         rate <<= 13;
 238         rate = div_u64(rate, 15625);
 239
 240         inca = rate & INCVALUE_MASK;
 241         if (neg_adj)
 242                 inca |= ISGN;
 243
 244         wr32(E1000_TIMINCA, inca);
 245
 246         return 0;
 247 }
 248
 249 static int igb_ptp_adjtime_82576(struct ptp_clock_info *ptp, s64 delta)
 250 {
 251         struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
 252                                                ptp_caps);
 253         unsigned long flags;
 254
 255         spin_lock_irqsave(&igb->tmreg_lock, flags);
 256         timecounter_adjtime(&igb->tc, delta);
 257         spin_unlock_irqrestore(&igb->tmreg_lock, flags);
 258
 259         return 0;
 260 }
 261
 262 static int igb_ptp_adjtime_i210(struct ptp_clock_info *ptp, s64 delta)
 263 {
 264         struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
 265                                                ptp_caps);
 266         unsigned long flags;
 267         struct timespec64 now, then = ns_to_timespec64(delta);
 268
 269         spin_lock_irqsave(&igb->tmreg_lock, flags);
 270
 271         igb_ptp_read_i210(igb, &now);
 272         now = timespec64_add(now, then);
 273         igb_ptp_write_i210(igb, (const struct timespec64 *)&now);
 274
 275         spin_unlock_irqrestore(&igb->tmreg_lock, flags);
 276
 277         return 0;
 278 }
 279
 280 static int igb_ptp_gettime_82576(struct ptp_clock_info *ptp,
 281                                  struct timespec64 *ts)
 282 {
 283         struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
 284                                                ptp_caps);
 285         unsigned long flags;
 286         u64 ns;
 287
 288         spin_lock_irqsave(&igb->tmreg_lock, flags);
 289
 290         ns = timecounter_read(&igb->tc);
 291
 292         spin_unlock_irqrestore(&igb->tmreg_lock, flags);
 293
 294         *ts = ns_to_timespec64(ns);
 295
 296         return 0;
 297 }
 298
 299 static int igb_ptp_gettime_i210(struct ptp_clock_info *ptp,
 300                                 struct timespec64 *ts)
 301 {
 302         struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
 303                                                ptp_caps);
 304         unsigned long flags;
 305
 306         spin_lock_irqsave(&igb->tmreg_lock, flags);
 307
 308         igb_ptp_read_i210(igb, ts);
 309
 310         spin_unlock_irqrestore(&igb->tmreg_lock, flags);
 311
 312         return 0;
 313 }
 314
 315 static int igb_ptp_settime_82576(struct ptp_clock_info *ptp,
 316                                  const struct timespec64 *ts)
 317 {
 318         struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
 319                                                ptp_caps);
 320         unsigned long flags;
 321         u64 ns;
 322
 323         ns = timespec64_to_ns(ts);
 324
 325         spin_lock_irqsave(&igb->tmreg_lock, flags);
 326
 327         timecounter_init(&igb->tc, &igb->cc, ns);
 328
 329         spin_unlock_irqrestore(&igb->tmreg_lock, flags);
 330
 331         return 0;
 332 }
 333
 334 static int igb_ptp_settime_i210(struct ptp_clock_info *ptp,
 335                                 const struct timespec64 *ts)
 336 {
 337         struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
 338                                                ptp_caps);
 339         unsigned long flags;
 340
 341         spin_lock_irqsave(&igb->tmreg_lock, flags);
 342
 343         igb_ptp_write_i210(igb, ts);
 344
 345         spin_unlock_irqrestore(&igb->tmreg_lock, flags);
 346
 347         return 0;
 348 }
 349
 350 static void igb_pin_direction(int pin, int input, u32 *ctrl, u32 *ctrl_ext)
 351 {
 352         u32 *ptr = pin < 2 ? ctrl : ctrl_ext;
 353         static const u32 mask[IGB_N_SDP] = {
 354                 E1000_CTRL_SDP0_DIR,
 355                 E1000_CTRL_SDP1_DIR,
 356                 E1000_CTRL_EXT_SDP2_DIR,
 357                 E1000_CTRL_EXT_SDP3_DIR,
 358         };
 359
 360         if (input)
 361                 *ptr &= ~mask[pin];
 362         else
 363                 *ptr |= mask[pin];
 364 }
 365
 366 static void igb_pin_extts(struct igb_adapter *igb, int chan, int pin)
 367 {
 368         static const u32 aux0_sel_sdp[IGB_N_SDP] = {
 369                 AUX0_SEL_SDP0, AUX0_SEL_SDP1, AUX0_SEL_SDP2, AUX0_SEL_SDP3,
 370         };
 371         static const u32 aux1_sel_sdp[IGB_N_SDP] = {
 372                 AUX1_SEL_SDP0, AUX1_SEL_SDP1, AUX1_SEL_SDP2, AUX1_SEL_SDP3,
 373         };
 374         static const u32 ts_sdp_en[IGB_N_SDP] = {
 375                 TS_SDP0_EN, TS_SDP1_EN, TS_SDP2_EN, TS_SDP3_EN,
 376         };
 377         struct e1000_hw *hw = &igb->hw;
 378         u32 ctrl, ctrl_ext, tssdp = 0;
 379
 380         ctrl = rd32(E1000_CTRL);
 381         ctrl_ext = rd32(E1000_CTRL_EXT);
 382         tssdp = rd32(E1000_TSSDP);
 383
 384         igb_pin_direction(pin, 1, &ctrl, &ctrl_ext);
 385
 386         /* Make sure this pin is not enabled as an output. */
 387         tssdp &= ~ts_sdp_en[pin];
 388
 389         if (chan == 1) {
 390                 tssdp &= ~AUX1_SEL_SDP3;
 391                 tssdp |= aux1_sel_sdp[pin] | AUX1_TS_SDP_EN;
 392         } else {
 393                 tssdp &= ~AUX0_SEL_SDP3;
 394                 tssdp |= aux0_sel_sdp[pin] | AUX0_TS_SDP_EN;
 395         }
 396
 397         wr32(E1000_TSSDP, tssdp);
 398         wr32(E1000_CTRL, ctrl);
 399         wr32(E1000_CTRL_EXT, ctrl_ext);
 400 }
 401
 402 static void igb_pin_perout(struct igb_adapter *igb, int chan, int pin, int freq)
 403 {
 404         static const u32 aux0_sel_sdp[IGB_N_SDP] = {
 405                 AUX0_SEL_SDP0, AUX0_SEL_SDP1, AUX0_SEL_SDP2, AUX0_SEL_SDP3,
 406         };
 407         static const u32 aux1_sel_sdp[IGB_N_SDP] = {
 408                 AUX1_SEL_SDP0, AUX1_SEL_SDP1, AUX1_SEL_SDP2, AUX1_SEL_SDP3,
 409         };
 410         static const u32 ts_sdp_en[IGB_N_SDP] = {
 411                 TS_SDP0_EN, TS_SDP1_EN, TS_SDP2_EN, TS_SDP3_EN,
 412         };
 413         static const u32 ts_sdp_sel_tt0[IGB_N_SDP] = {
 414                 TS_SDP0_SEL_TT0, TS_SDP1_SEL_TT0,
 415                 TS_SDP2_SEL_TT0, TS_SDP3_SEL_TT0,
 416         };
 417         static const u32 ts_sdp_sel_tt1[IGB_N_SDP] = {
 418                 TS_SDP0_SEL_TT1, TS_SDP1_SEL_TT1,
 419                 TS_SDP2_SEL_TT1, TS_SDP3_SEL_TT1,
 420         };
 421         static const u32 ts_sdp_sel_fc0[IGB_N_SDP] = {
 422                 TS_SDP0_SEL_FC0, TS_SDP1_SEL_FC0,
 423                 TS_SDP2_SEL_FC0, TS_SDP3_SEL_FC0,
 424         };
 425         static const u32 ts_sdp_sel_fc1[IGB_N_SDP] = {
 426                 TS_SDP0_SEL_FC1, TS_SDP1_SEL_FC1,
 427                 TS_SDP2_SEL_FC1, TS_SDP3_SEL_FC1,
 428         };
 429         static const u32 ts_sdp_sel_clr[IGB_N_SDP] = {
 430                 TS_SDP0_SEL_FC1, TS_SDP1_SEL_FC1,
 431                 TS_SDP2_SEL_FC1, TS_SDP3_SEL_FC1,
 432         };
 433         struct e1000_hw *hw = &igb->hw;
 434         u32 ctrl, ctrl_ext, tssdp = 0;
 435
 436         ctrl = rd32(E1000_CTRL);
 437         ctrl_ext = rd32(E1000_CTRL_EXT);
 438         tssdp = rd32(E1000_TSSDP);
 439
 440         igb_pin_direction(pin, 0, &ctrl, &ctrl_ext);
 441
 442         /* Make sure this pin is not enabled as an input. */
 443         if ((tssdp & AUX0_SEL_SDP3) == aux0_sel_sdp[pin])
 444                 tssdp &= ~AUX0_TS_SDP_EN;
 445
 446         if ((tssdp & AUX1_SEL_SDP3) == aux1_sel_sdp[pin])
 447                 tssdp &= ~AUX1_TS_SDP_EN;
 448
 449         tssdp &= ~ts_sdp_sel_clr[pin];
 450         if (freq) {
 451                 if (chan == 1)
 452                         tssdp |= ts_sdp_sel_fc1[pin];
 453                 else
 454                         tssdp |= ts_sdp_sel_fc0[pin];
 455         } else {
 456                 if (chan == 1)
 457                         tssdp |= ts_sdp_sel_tt1[pin];
 458                 else
 459                         tssdp |= ts_sdp_sel_tt0[pin];
 460         }
 461         tssdp |= ts_sdp_en[pin];
 462
 463         wr32(E1000_TSSDP, tssdp);
 464         wr32(E1000_CTRL, ctrl);
 465         wr32(E1000_CTRL_EXT, ctrl_ext);
 466 }
 467
 468 static int igb_ptp_feature_enable_i210(struct ptp_clock_info *ptp,
 469                                        struct ptp_clock_request *rq, int on)
 470 {
 471         struct igb_adapter *igb =
 472                 container_of(ptp, struct igb_adapter, ptp_caps);
 473         struct e1000_hw *hw = &igb->hw;
 474         u32 tsauxc, tsim, tsauxc_mask, tsim_mask, trgttiml, trgttimh, freqout;
 475         unsigned long flags;
 476         struct timespec64 ts;
 477         int use_freq = 0, pin = -1;
 478         s64 ns;
 479
 480         switch (rq->type) {
 481         case PTP_CLK_REQ_EXTTS:
 482                 if (on) {
 483                         pin = ptp_find_pin(igb->ptp_clock, PTP_PF_EXTTS,
 484                                            rq->extts.index);
 485                         if (pin < 0)
 486                                 return -EBUSY;
 487                 }
 488                 if (rq->extts.index == 1) {
 489                         tsauxc_mask = TSAUXC_EN_TS1;
 490                         tsim_mask = TSINTR_AUTT1;
 491                 } else {
 492                         tsauxc_mask = TSAUXC_EN_TS0;
 493                         tsim_mask = TSINTR_AUTT0;
 494                 }
 495                 spin_lock_irqsave(&igb->tmreg_lock, flags);
 496                 tsauxc = rd32(E1000_TSAUXC);
 497                 tsim = rd32(E1000_TSIM);
 498                 if (on) {
 499                         igb_pin_extts(igb, rq->extts.index, pin);
 500                         tsauxc |= tsauxc_mask;
 501                         tsim |= tsim_mask;
 502                 } else {
 503                         tsauxc &= ~tsauxc_mask;
 504                         tsim &= ~tsim_mask;
 505                 }
 506                 wr32(E1000_TSAUXC, tsauxc);
 507                 wr32(E1000_TSIM, tsim);
 508                 spin_unlock_irqrestore(&igb->tmreg_lock, flags);
 509                 return 0;
 510
 511         case PTP_CLK_REQ_PEROUT:
 512                 if (on) {
 513                         pin = ptp_find_pin(igb->ptp_clock, PTP_PF_PEROUT,
 514                                            rq->perout.index);
 515                         if (pin < 0)
 516                                 return -EBUSY;
 517                 }
 518                 ts.tv_sec = rq->perout.period.sec;
 519                 ts.tv_nsec = rq->perout.period.nsec;
 520                 ns = timespec64_to_ns(&ts);
 521                 ns = ns >> 1;
 522                 if (on && ((ns <= 70000000LL) || (ns == 125000000LL) ||
 523                            (ns == 250000000LL) || (ns == 500000000LL))) {
 524                         if (ns < 8LL)
 525                                 return -EINVAL;
 526                         use_freq = 1;
 527                 }
 528                 ts = ns_to_timespec64(ns);
 529                 if (rq->perout.index == 1) {
 530                         if (use_freq) {
 531                                 tsauxc_mask = TSAUXC_EN_CLK1 | TSAUXC_ST1;
 532                                 tsim_mask = 0;
 533                         } else {
 534                                 tsauxc_mask = TSAUXC_EN_TT1;
 535                                 tsim_mask = TSINTR_TT1;
 536                         }
 537                         trgttiml = E1000_TRGTTIML1;
 538                         trgttimh = E1000_TRGTTIMH1;
 539                         freqout = E1000_FREQOUT1;
 540                 } else {
 541                         if (use_freq) {
 542                                 tsauxc_mask = TSAUXC_EN_CLK0 | TSAUXC_ST0;
 543                                 tsim_mask = 0;
 544                         } else {
 545                                 tsauxc_mask = TSAUXC_EN_TT0;
 546                                 tsim_mask = TSINTR_TT0;
 547                         }
 548                         trgttiml = E1000_TRGTTIML0;
 549                         trgttimh = E1000_TRGTTIMH0;
 550                         freqout = E1000_FREQOUT0;
 551                 }
 552                 spin_lock_irqsave(&igb->tmreg_lock, flags);
 553                 tsauxc = rd32(E1000_TSAUXC);
 554                 tsim = rd32(E1000_TSIM);
 555                 if (rq->perout.index == 1) {
 556                         tsauxc &= ~(TSAUXC_EN_TT1 | TSAUXC_EN_CLK1 | TSAUXC_ST1);
 557                         tsim &= ~TSINTR_TT1;
 558                 } else {
 559                         tsauxc &= ~(TSAUXC_EN_TT0 | TSAUXC_EN_CLK0 | TSAUXC_ST0);
 560                         tsim &= ~TSINTR_TT0;
 561                 }
 562                 if (on) {
 563                         int i = rq->perout.index;
 564                         igb_pin_perout(igb, i, pin, use_freq);
 565                         igb->perout[i].start.tv_sec = rq->perout.start.sec;
 566                         igb->perout[i].start.tv_nsec = rq->perout.start.nsec;
 567                         igb->perout[i].period.tv_sec = ts.tv_sec;
 568                         igb->perout[i].period.tv_nsec = ts.tv_nsec;
 569                         wr32(trgttimh, rq->perout.start.sec);
 570                         wr32(trgttiml, rq->perout.start.nsec);
 571                         if (use_freq)
 572                                 wr32(freqout, ns);
 573                         tsauxc |= tsauxc_mask;
 574                         tsim |= tsim_mask;
 575                 }
 576                 wr32(E1000_TSAUXC, tsauxc);
 577                 wr32(E1000_TSIM, tsim);
 578                 spin_unlock_irqrestore(&igb->tmreg_lock, flags);
 579                 return 0;
 580
 581         case PTP_CLK_REQ_PPS:
 582                 spin_lock_irqsave(&igb->tmreg_lock, flags);
 583                 tsim = rd32(E1000_TSIM);
 584                 if (on)
 585                         tsim |= TSINTR_SYS_WRAP;
 586                 else
 587                         tsim &= ~TSINTR_SYS_WRAP;
 588                 igb->pps_sys_wrap_on = !!on;
 589                 wr32(E1000_TSIM, tsim);
 590                 spin_unlock_irqrestore(&igb->tmreg_lock, flags);
 591                 return 0;
 592         }
 593
 594         return -EOPNOTSUPP;
 595 }
 596
 597 static int igb_ptp_feature_enable(struct ptp_clock_info *ptp,
 598                                   struct ptp_clock_request *rq, int on)
 599 {
 600         return -EOPNOTSUPP;
 601 }
 602
 603 static int igb_ptp_verify_pin(struct ptp_clock_info *ptp, unsigned int pin,
 604                               enum ptp_pin_function func, unsigned int chan)
 605 {
 606         switch (func) {
 607         case PTP_PF_NONE:
 608         case PTP_PF_EXTTS:
 609         case PTP_PF_PEROUT:
 610                 break;
 611         case PTP_PF_PHYSYNC:
 612                 return -1;
 613         }
 614         return 0;
 615 }
 616
 617 /**
 618  * igb_ptp_tx_work
 619  * @work: pointer to work struct
 620  *
 621  * This work function polls the TSYNCTXCTL valid bit to determine when a
 622  * timestamp has been taken for the current stored skb.
 623  **/
 624 static void igb_ptp_tx_work(struct work_struct *work)
 625 {
 626         struct igb_adapter *adapter = container_of(work, struct igb_adapter,
 627                                                    ptp_tx_work);
 628         struct e1000_hw *hw = &adapter->hw;
 629         u32 tsynctxctl;
 630
 631         if (!adapter->ptp_tx_skb)
 632                 return;
 633
 634         if (time_is_before_jiffies(adapter->ptp_tx_start +
 635                                    IGB_PTP_TX_TIMEOUT)) {
 636                 dev_kfree_skb_any(adapter->ptp_tx_skb);
 637                 adapter->ptp_tx_skb = NULL;
 638                 clear_bit_unlock(__IGB_PTP_TX_IN_PROGRESS, &adapter->state);
 639                 adapter->tx_hwtstamp_timeouts++;
 640                 /* Clear the tx valid bit in TSYNCTXCTL register to enable
 641                  * interrupt
 642                  */
 643                 rd32(E1000_TXSTMPH);
 644                 dev_warn(&adapter->pdev->dev, "clearing Tx timestamp hang\n");
 645                 return;
 646         }
 647
 648         tsynctxctl = rd32(E1000_TSYNCTXCTL);
 649         if (tsynctxctl & E1000_TSYNCTXCTL_VALID)
 650                 igb_ptp_tx_hwtstamp(adapter);
 651         else
 652                 /* reschedule to check later */
 653                 schedule_work(&adapter->ptp_tx_work);
 654 }
 655
 656 static void igb_ptp_overflow_check(struct work_struct *work)
 657 {
 658         struct igb_adapter *igb =
 659                 container_of(work, struct igb_adapter, ptp_overflow_work.work);
 660         struct timespec64 ts;
 661
 662         igb->ptp_caps.gettime64(&igb->ptp_caps, &ts);
 663
 664         pr_debug("igb overflow check at %lld.%09lu\n",
 665                  (long long) ts.tv_sec, ts.tv_nsec);
 666
 667         schedule_delayed_work(&igb->ptp_overflow_work,
 668                               IGB_SYSTIM_OVERFLOW_PERIOD);
 669 }
 670
 671 /**
 672  * igb_ptp_rx_hang - detect error case when Rx timestamp registers latched
 673  * @adapter: private network adapter structure
 674  *
 675  * This watchdog task is scheduled to detect error case where hardware has
 676  * dropped an Rx packet that was timestamped when the ring is full. The
 677  * particular error is rare but leaves the device in a state unable to timestamp
 678  * any future packets.
 679  **/
 680 void igb_ptp_rx_hang(struct igb_adapter *adapter)
 681 {
 682         struct e1000_hw *hw = &adapter->hw;
 683         u32 tsyncrxctl = rd32(E1000_TSYNCRXCTL);
 684         unsigned long rx_event;
 685
 686         /* Other hardware uses per-packet timestamps */
 687         if (hw->mac.type != e1000_82576)
 688                 return;
 689
 690         /* If we don't have a valid timestamp in the registers, just update the
 691          * timeout counter and exit
 692          */
 693         if (!(tsyncrxctl & E1000_TSYNCRXCTL_VALID)) {
 694                 adapter->last_rx_ptp_check = jiffies;
 695                 return;
 696         }
 697
 698         /* Determine the most recent watchdog or rx_timestamp event */
 699         rx_event = adapter->last_rx_ptp_check;
 700         if (time_after(adapter->last_rx_timestamp, rx_event))
 701                 rx_event = adapter->last_rx_timestamp;
 702
 703         /* Only need to read the high RXSTMP register to clear the lock */
 704         if (time_is_before_jiffies(rx_event + 5 * HZ)) {
 705                 rd32(E1000_RXSTMPH);
 706                 adapter->last_rx_ptp_check = jiffies;
 707                 adapter->rx_hwtstamp_cleared++;
 708                 dev_warn(&adapter->pdev->dev, "clearing Rx timestamp hang\n");
 709         }
 710 }
 711
 712 /**
 713  * igb_ptp_tx_hang - detect error case where Tx timestamp never finishes
 714  * @adapter: private network adapter structure
 715  */
 716 void igb_ptp_tx_hang(struct igb_adapter *adapter)
 717 {
 718         struct e1000_hw *hw = &adapter->hw;
 719         bool timeout = time_is_before_jiffies(adapter->ptp_tx_start +
 720                                               IGB_PTP_TX_TIMEOUT);
 721
 722         if (!adapter->ptp_tx_skb)
 723                 return;
 724
 725         if (!test_bit(__IGB_PTP_TX_IN_PROGRESS, &adapter->state))
 726                 return;
 727
 728         /* If we haven't received a timestamp within the timeout, it is
 729          * reasonable to assume that it will never occur, so we can unlock the
 730          * timestamp bit when this occurs.
 731          */
 732         if (timeout) {
 733                 cancel_work_sync(&adapter->ptp_tx_work);
 734                 dev_kfree_skb_any(adapter->ptp_tx_skb);
 735                 adapter->ptp_tx_skb = NULL;
 736                 clear_bit_unlock(__IGB_PTP_TX_IN_PROGRESS, &adapter->state);
 737                 adapter->tx_hwtstamp_timeouts++;
 738                 /* Clear the tx valid bit in TSYNCTXCTL register to enable
 739                  * interrupt
 740                  */
 741                 rd32(E1000_TXSTMPH);
 742                 dev_warn(&adapter->pdev->dev, "clearing Tx timestamp hang\n");
 743         }
 744 }
 745
 746 /**
 747  * igb_ptp_tx_hwtstamp - utility function which checks for TX time stamp
 748  * @adapter: Board private structure.
 749  *
 750  * If we were asked to do hardware stamping and such a time stamp is
 751  * available, then it must have been for this skb here because we only
 752  * allow only one such packet into the queue.
 753  **/
 754 static void igb_ptp_tx_hwtstamp(struct igb_adapter *adapter)
 755 {
 756         struct sk_buff *skb = adapter->ptp_tx_skb;
 757         struct e1000_hw *hw = &adapter->hw;
 758         struct skb_shared_hwtstamps shhwtstamps;
 759         u64 regval;
 760         int adjust = 0;
 761
 762         regval = rd32(E1000_TXSTMPL);
 763         regval |= (u64)rd32(E1000_TXSTMPH) << 32;
 764
 765         igb_ptp_systim_to_hwtstamp(adapter, &shhwtstamps, regval);
 766         /* adjust timestamp for the TX latency based on link speed */
 767         if (adapter->hw.mac.type == e1000_i210) {
 768                 switch (adapter->link_speed) {
 769                 case SPEED_10:
 770                         adjust = IGB_I210_TX_LATENCY_10;
 771                         break;
 772                 case SPEED_100:
 773                         adjust = IGB_I210_TX_LATENCY_100;
 774                         break;
 775                 case SPEED_1000:
 776                         adjust = IGB_I210_TX_LATENCY_1000;
 777                         break;
 778                 }
 779         }
 780
 781         shhwtstamps.hwtstamp =
 782                 ktime_add_ns(shhwtstamps.hwtstamp, adjust);
 783
 784         /* Clear the lock early before calling skb_tstamp_tx so that
 785          * applications are not woken up before the lock bit is clear. We use
 786          * a copy of the skb pointer to ensure other threads can't change it
 787          * while we're notifying the stack.
 788          */
 789         adapter->ptp_tx_skb = NULL;
 790         clear_bit_unlock(__IGB_PTP_TX_IN_PROGRESS, &adapter->state);
 791
 792         /* Notify the stack and free the skb after we've unlocked */
 793         skb_tstamp_tx(skb, &shhwtstamps);
 794         dev_kfree_skb_any(skb);
 795 }
 796
 797 /**
 798  * igb_ptp_rx_pktstamp - retrieve Rx per packet timestamp
 799  * @q_vector: Pointer to interrupt specific structure
 800  * @va: Pointer to address containing Rx buffer
 801  * @skb: Buffer containing timestamp and packet
 802  *
 803  * This function is meant to retrieve a timestamp from the first buffer of an
 804  * incoming frame.  The value is stored in little endian format starting on
 805  * byte 8.
 806  **/
 807 void igb_ptp_rx_pktstamp(struct igb_q_vector *q_vector, void *va,
 808                          struct sk_buff *skb)
 809 {
 810         __le64 *regval = (__le64 *)va;
 811         struct igb_adapter *adapter = q_vector->adapter;
 812         int adjust = 0;
 813
 814         /* The timestamp is recorded in little endian format.
 815          * DWORD: 0        1        2        3
 816          * Field: Reserved Reserved SYSTIML  SYSTIMH
 817          */
 818         igb_ptp_systim_to_hwtstamp(adapter, skb_hwtstamps(skb),
 819                                    le64_to_cpu(regval[1]));
 820
 821         /* adjust timestamp for the RX latency based on link speed */
 822         if (adapter->hw.mac.type == e1000_i210) {
 823                 switch (adapter->link_speed) {
 824                 case SPEED_10:
 825                         adjust = IGB_I210_RX_LATENCY_10;
 826                         break;
 827                 case SPEED_100:
 828                         adjust = IGB_I210_RX_LATENCY_100;
 829                         break;
 830                 case SPEED_1000:
 831                         adjust = IGB_I210_RX_LATENCY_1000;
 832                         break;
 833                 }
 834         }
 835         skb_hwtstamps(skb)->hwtstamp =
 836                 ktime_sub_ns(skb_hwtstamps(skb)->hwtstamp, adjust);
 837 }
 838
 839 /**
 840  * igb_ptp_rx_rgtstamp - retrieve Rx timestamp stored in register
 841  * @q_vector: Pointer to interrupt specific structure
 842  * @skb: Buffer containing timestamp and packet
 843  *
 844  * This function is meant to retrieve a timestamp from the internal registers
 845  * of the adapter and store it in the skb.
 846  **/
 847 void igb_ptp_rx_rgtstamp(struct igb_q_vector *q_vector,
 848                          struct sk_buff *skb)
 849 {
 850         struct igb_adapter *adapter = q_vector->adapter;
 851         struct e1000_hw *hw = &adapter->hw;
 852         u64 regval;
 853         int adjust = 0;
 854
 855         /* If this bit is set, then the RX registers contain the time stamp. No
 856          * other packet will be time stamped until we read these registers, so
 857          * read the registers to make them available again. Because only one
 858          * packet can be time stamped at a time, we know that the register
 859          * values must belong to this one here and therefore we don't need to
 860          * compare any of the additional attributes stored for it.
 861          *
 862          * If nothing went wrong, then it should have a shared tx_flags that we
 863          * can turn into a skb_shared_hwtstamps.
 864          */
 865         if (!(rd32(E1000_TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID))
 866                 return;
 867
 868         regval = rd32(E1000_RXSTMPL);
 869         regval |= (u64)rd32(E1000_RXSTMPH) << 32;
 870
 871         igb_ptp_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), regval);
 872
 873         /* adjust timestamp for the RX latency based on link speed */
 874         if (adapter->hw.mac.type == e1000_i210) {
 875                 switch (adapter->link_speed) {
 876                 case SPEED_10:
 877                         adjust = IGB_I210_RX_LATENCY_10;
 878                         break;
 879                 case SPEED_100:
 880                         adjust = IGB_I210_RX_LATENCY_100;
 881                         break;
 882                 case SPEED_1000:
 883                         adjust = IGB_I210_RX_LATENCY_1000;
 884                         break;
 885                 }
 886         }
 887         skb_hwtstamps(skb)->hwtstamp =
 888                 ktime_sub_ns(skb_hwtstamps(skb)->hwtstamp, adjust);
 889
 890         /* Update the last_rx_timestamp timer in order to enable watchdog check
 891          * for error case of latched timestamp on a dropped packet.
 892          */
 893         adapter->last_rx_timestamp = jiffies;
 894 }
 895
 896 /**
 897  * igb_ptp_get_ts_config - get hardware time stamping config
 898  * @netdev:
 899  * @ifreq:
 900  *
 901  * Get the hwtstamp_config settings to return to the user. Rather than attempt
 902  * to deconstruct the settings from the registers, just return a shadow copy
 903  * of the last known settings.
 904  **/
 905 int igb_ptp_get_ts_config(struct net_device *netdev, struct ifreq *ifr)
 906 {
 907         struct igb_adapter *adapter = netdev_priv(netdev);
 908         struct hwtstamp_config *config = &adapter->tstamp_config;
 909
 910         return copy_to_user(ifr->ifr_data, config, sizeof(*config)) ?
 911                 -EFAULT : 0;
 912 }
 913
 914 /**
 915  * igb_ptp_set_timestamp_mode - setup hardware for timestamping
 916  * @adapter: networking device structure
 917  * @config: hwtstamp configuration
 918  *
 919  * Outgoing time stamping can be enabled and disabled. Play nice and
 920  * disable it when requested, although it shouldn't case any overhead
 921  * when no packet needs it. At most one packet in the queue may be
 922  * marked for time stamping, otherwise it would be impossible to tell
 923  * for sure to which packet the hardware time stamp belongs.
 924  *
 925  * Incoming time stamping has to be configured via the hardware
 926  * filters. Not all combinations are supported, in particular event
 927  * type has to be specified. Matching the kind of event packet is
 928  * not supported, with the exception of "all V2 events regardless of
 929  * level 2 or 4".
 930  */
 931 static int igb_ptp_set_timestamp_mode(struct igb_adapter *adapter,
 932                                       struct hwtstamp_config *config)
 933 {
 934         struct e1000_hw *hw = &adapter->hw;
 935         u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
 936         u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
 937         u32 tsync_rx_cfg = 0;
 938         bool is_l4 = false;
 939         bool is_l2 = false;
 940         u32 regval;
 941
 942         /* reserved for future extensions */
 943         if (config->flags)
 944                 return -EINVAL;
 945
 946         switch (config->tx_type) {
 947         case HWTSTAMP_TX_OFF:
 948                 tsync_tx_ctl = 0;
 949         case HWTSTAMP_TX_ON:
 950                 break;
 951         default:
 952                 return -ERANGE;
 953         }
 954
 955         switch (config->rx_filter) {
 956         case HWTSTAMP_FILTER_NONE:
 957                 tsync_rx_ctl = 0;
 958                 break;
 959         case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
 960                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
 961                 tsync_rx_cfg = E1000_TSYNCRXCFG_PTP_V1_SYNC_MESSAGE;
 962                 is_l4 = true;
 963                 break;
 964         case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
 965                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
 966                 tsync_rx_cfg = E1000_TSYNCRXCFG_PTP_V1_DELAY_REQ_MESSAGE;
 967                 is_l4 = true;
 968                 break;
 969         case HWTSTAMP_FILTER_PTP_V2_EVENT:
 970         case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
 971         case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
 972         case HWTSTAMP_FILTER_PTP_V2_SYNC:
 973         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
 974         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
 975         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
 976         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
 977         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
 978                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2;
 979                 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
 980                 is_l2 = true;
 981                 is_l4 = true;
 982                 break;
 983         case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
 984         case HWTSTAMP_FILTER_NTP_ALL:
 985         case HWTSTAMP_FILTER_ALL:
 986                 /* 82576 cannot timestamp all packets, which it needs to do to
 987                  * support both V1 Sync and Delay_Req messages
 988                  */
 989                 if (hw->mac.type != e1000_82576) {
 990                         tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
 991                         config->rx_filter = HWTSTAMP_FILTER_ALL;
 992                         break;
 993                 }
 994                 /* fall through */
 995         default:
 996                 config->rx_filter = HWTSTAMP_FILTER_NONE;
 997                 return -ERANGE;
 998         }
 999
1000         if (hw->mac.type == e1000_82575) {
1001                 if (tsync_rx_ctl | tsync_tx_ctl)
1002                         return -EINVAL;
1003                 return 0;
1004         }
1005
1006         /* Per-packet timestamping only works if all packets are
1007          * timestamped, so enable timestamping in all packets as
1008          * long as one Rx filter was configured.
1009          */
1010         if ((hw->mac.type >= e1000_82580) && tsync_rx_ctl) {
1011                 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
1012                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
1013                 config->rx_filter = HWTSTAMP_FILTER_ALL;
1014                 is_l2 = true;
1015                 is_l4 = true;
1016
1017                 if ((hw->mac.type == e1000_i210) ||
1018                     (hw->mac.type == e1000_i211)) {
1019                         regval = rd32(E1000_RXPBS);
1020                         regval |= E1000_RXPBS_CFG_TS_EN;
1021                         wr32(E1000_RXPBS, regval);
1022                 }
1023         }
1024
1025         /* enable/disable TX */
1026         regval = rd32(E1000_TSYNCTXCTL);
1027         regval &= ~E1000_TSYNCTXCTL_ENABLED;
1028         regval |= tsync_tx_ctl;
1029         wr32(E1000_TSYNCTXCTL, regval);
1030
1031         /* enable/disable RX */
1032         regval = rd32(E1000_TSYNCRXCTL);
1033         regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK);
1034         regval |= tsync_rx_ctl;
1035         wr32(E1000_TSYNCRXCTL, regval);
1036
1037         /* define which PTP packets are time stamped */
1038         wr32(E1000_TSYNCRXCFG, tsync_rx_cfg);
1039
1040         /* define ethertype filter for timestamped packets */
1041         if (is_l2)
1042                 wr32(E1000_ETQF(IGB_ETQF_FILTER_1588),
1043                      (E1000_ETQF_FILTER_ENABLE | /* enable filter */
1044                       E1000_ETQF_1588 | /* enable timestamping */
1045                       ETH_P_1588));     /* 1588 eth protocol type */
1046         else
1047                 wr32(E1000_ETQF(IGB_ETQF_FILTER_1588), 0);
1048
1049         /* L4 Queue Filter[3]: filter by destination port and protocol */
1050         if (is_l4) {
1051                 u32 ftqf = (IPPROTO_UDP /* UDP */
1052                         | E1000_FTQF_VF_BP /* VF not compared */
1053                         | E1000_FTQF_1588_TIME_STAMP /* Enable Timestamping */
1054                         | E1000_FTQF_MASK); /* mask all inputs */
1055                 ftqf &= ~E1000_FTQF_MASK_PROTO_BP; /* enable protocol check */
1056
1057                 wr32(E1000_IMIR(3), htons(PTP_EV_PORT));
1058                 wr32(E1000_IMIREXT(3),
1059                      (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_BP));
1060                 if (hw->mac.type == e1000_82576) {
1061                         /* enable source port check */
1062                         wr32(E1000_SPQF(3), htons(PTP_EV_PORT));
1063                         ftqf &= ~E1000_FTQF_MASK_SOURCE_PORT_BP;
1064                 }
1065                 wr32(E1000_FTQF(3), ftqf);
1066         } else {
1067                 wr32(E1000_FTQF(3), E1000_FTQF_MASK);
1068         }
1069         wrfl();
1070
1071         /* clear TX/RX time stamp registers, just to be sure */
1072         regval = rd32(E1000_TXSTMPL);
1073         regval = rd32(E1000_TXSTMPH);
1074         regval = rd32(E1000_RXSTMPL);
1075         regval = rd32(E1000_RXSTMPH);
1076
1077         return 0;
1078 }
1079
1080 /**
1081  * igb_ptp_set_ts_config - set hardware time stamping config
1082  * @netdev:
1083  * @ifreq:
1084  *
1085  **/
1086 int igb_ptp_set_ts_config(struct net_device *netdev, struct ifreq *ifr)
1087 {
1088         struct igb_adapter *adapter = netdev_priv(netdev);
1089         struct hwtstamp_config config;
1090         int err;
1091
1092         if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
1093                 return -EFAULT;
1094
1095         err = igb_ptp_set_timestamp_mode(adapter, &config);
1096         if (err)
1097                 return err;
1098
1099         /* save these settings for future reference */
1100         memcpy(&adapter->tstamp_config, &config,
1101                sizeof(adapter->tstamp_config));
1102
1103         return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
1104                 -EFAULT : 0;
1105 }
1106
1107 /**
1108  * igb_ptp_init - Initialize PTP functionality
1109  * @adapter: Board private structure
1110  *
1111  * This function is called at device probe to initialize the PTP
1112  * functionality.
1113  */
1114 void igb_ptp_init(struct igb_adapter *adapter)
1115 {
1116         struct e1000_hw *hw = &adapter->hw;
1117         struct net_device *netdev = adapter->netdev;
1118         int i;
1119
1120         switch (hw->mac.type) {
1121         case e1000_82576:
1122                 snprintf(adapter->ptp_caps.name, 16, "%pm", netdev->dev_addr);
1123                 adapter->ptp_caps.owner = THIS_MODULE;
1124                 adapter->ptp_caps.max_adj = 999999881;
1125                 adapter->ptp_caps.n_ext_ts = 0;
1126                 adapter->ptp_caps.pps = 0;
1127                 adapter->ptp_caps.adjfreq = igb_ptp_adjfreq_82576;
1128                 adapter->ptp_caps.adjtime = igb_ptp_adjtime_82576;
1129                 adapter->ptp_caps.gettime64 = igb_ptp_gettime_82576;
1130                 adapter->ptp_caps.settime64 = igb_ptp_settime_82576;
1131                 adapter->ptp_caps.enable = igb_ptp_feature_enable;
1132                 adapter->cc.read = igb_ptp_read_82576;
1133                 adapter->cc.mask = CYCLECOUNTER_MASK(64);
1134                 adapter->cc.mult = 1;
1135                 adapter->cc.shift = IGB_82576_TSYNC_SHIFT;
1136                 adapter->ptp_flags |= IGB_PTP_OVERFLOW_CHECK;
1137                 break;
1138         case e1000_82580:
1139         case e1000_i354:
1140         case e1000_i350:
1141                 snprintf(adapter->ptp_caps.name, 16, "%pm", netdev->dev_addr);
1142                 adapter->ptp_caps.owner = THIS_MODULE;
1143                 adapter->ptp_caps.max_adj = 62499999;
1144                 adapter->ptp_caps.n_ext_ts = 0;
1145                 adapter->ptp_caps.pps = 0;
1146                 adapter->ptp_caps.adjfine = igb_ptp_adjfine_82580;
1147                 adapter->ptp_caps.adjtime = igb_ptp_adjtime_82576;
1148                 adapter->ptp_caps.gettime64 = igb_ptp_gettime_82576;
1149                 adapter->ptp_caps.settime64 = igb_ptp_settime_82576;
1150                 adapter->ptp_caps.enable = igb_ptp_feature_enable;
1151                 adapter->cc.read = igb_ptp_read_82580;
1152                 adapter->cc.mask = CYCLECOUNTER_MASK(IGB_NBITS_82580);
1153                 adapter->cc.mult = 1;
1154                 adapter->cc.shift = 0;
1155                 adapter->ptp_flags |= IGB_PTP_OVERFLOW_CHECK;
1156                 break;
1157         case e1000_i210:
1158         case e1000_i211:
1159                 for (i = 0; i < IGB_N_SDP; i++) {
1160                         struct ptp_pin_desc *ppd = &adapter->sdp_config[i];
1161
1162                         snprintf(ppd->name, sizeof(ppd->name), "SDP%d", i);
1163                         ppd->index = i;
1164                         ppd->func = PTP_PF_NONE;
1165                 }
1166                 snprintf(adapter->ptp_caps.name, 16, "%pm", netdev->dev_addr);
1167                 adapter->ptp_caps.owner = THIS_MODULE;
1168                 adapter->ptp_caps.max_adj = 62499999;
1169                 adapter->ptp_caps.n_ext_ts = IGB_N_EXTTS;
1170                 adapter->ptp_caps.n_per_out = IGB_N_PEROUT;
1171                 adapter->ptp_caps.n_pins = IGB_N_SDP;
1172                 adapter->ptp_caps.pps = 1;
1173                 adapter->ptp_caps.pin_config = adapter->sdp_config;
1174                 adapter->ptp_caps.adjfine = igb_ptp_adjfine_82580;
1175                 adapter->ptp_caps.adjtime = igb_ptp_adjtime_i210;
1176                 adapter->ptp_caps.gettime64 = igb_ptp_gettime_i210;
1177                 adapter->ptp_caps.settime64 = igb_ptp_settime_i210;
1178                 adapter->ptp_caps.enable = igb_ptp_feature_enable_i210;
1179                 adapter->ptp_caps.verify = igb_ptp_verify_pin;
1180                 break;
1181         default:
1182                 adapter->ptp_clock = NULL;
1183                 return;
1184         }
1185
1186         spin_lock_init(&adapter->tmreg_lock);
1187         INIT_WORK(&adapter->ptp_tx_work, igb_ptp_tx_work);
1188
1189         if (adapter->ptp_flags & IGB_PTP_OVERFLOW_CHECK)
1190                 INIT_DELAYED_WORK(&adapter->ptp_overflow_work,
1191                                   igb_ptp_overflow_check);
1192
1193         adapter->tstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
1194         adapter->tstamp_config.tx_type = HWTSTAMP_TX_OFF;
1195
1196         igb_ptp_reset(adapter);
1197
1198         adapter->ptp_clock = ptp_clock_register(&adapter->ptp_caps,
1199                                                 &adapter->pdev->dev);
1200         if (IS_ERR(adapter->ptp_clock)) {
1201                 adapter->ptp_clock = NULL;
1202                 dev_err(&adapter->pdev->dev, "ptp_clock_register failed\n");
1203         } else if (adapter->ptp_clock) {
1204                 dev_info(&adapter->pdev->dev, "added PHC on %s\n",
1205                          adapter->netdev->name);
1206                 adapter->ptp_flags |= IGB_PTP_ENABLED;
1207         }
1208 }
1209
1210 /**
1211  * igb_ptp_suspend - Disable PTP work items and prepare for suspend
1212  * @adapter: Board private structure
1213  *
1214  * This function stops the overflow check work and PTP Tx timestamp work, and
1215  * will prepare the device for OS suspend.
1216  */
1217 void igb_ptp_suspend(struct igb_adapter *adapter)
1218 {
1219         if (!(adapter->ptp_flags & IGB_PTP_ENABLED))
1220                 return;
1221
1222         if (adapter->ptp_flags & IGB_PTP_OVERFLOW_CHECK)
1223                 cancel_delayed_work_sync(&adapter->ptp_overflow_work);
1224
1225         cancel_work_sync(&adapter->ptp_tx_work);
1226         if (adapter->ptp_tx_skb) {
1227                 dev_kfree_skb_any(adapter->ptp_tx_skb);
1228                 adapter->ptp_tx_skb = NULL;
1229                 clear_bit_unlock(__IGB_PTP_TX_IN_PROGRESS, &adapter->state);
1230         }
1231 }
1232
1233 /**
1234  * igb_ptp_stop - Disable PTP device and stop the overflow check.
1235  * @adapter: Board private structure.
1236  *
1237  * This function stops the PTP support and cancels the delayed work.
1238  **/
1239 void igb_ptp_stop(struct igb_adapter *adapter)
1240 {
1241         igb_ptp_suspend(adapter);
1242
1243         if (adapter->ptp_clock) {
1244                 ptp_clock_unregister(adapter->ptp_clock);
1245                 dev_info(&adapter->pdev->dev, "removed PHC on %s\n",
1246                          adapter->netdev->name);
1247                 adapter->ptp_flags &= ~IGB_PTP_ENABLED;
1248         }
1249 }
1250
1251 /**
1252  * igb_ptp_reset - Re-enable the adapter for PTP following a reset.
1253  * @adapter: Board private structure.
1254  *
1255  * This function handles the reset work required to re-enable the PTP device.
1256  **/
1257 void igb_ptp_reset(struct igb_adapter *adapter)
1258 {
1259         struct e1000_hw *hw = &adapter->hw;
1260         unsigned long flags;
1261
1262         /* reset the tstamp_config */
1263         igb_ptp_set_timestamp_mode(adapter, &adapter->tstamp_config);
1264
1265         spin_lock_irqsave(&adapter->tmreg_lock, flags);
1266
1267         switch (adapter->hw.mac.type) {
1268         case e1000_82576:
1269                 /* Dial the nominal frequency. */
1270                 wr32(E1000_TIMINCA, INCPERIOD_82576 | INCVALUE_82576);
1271                 break;
1272         case e1000_82580:
1273         case e1000_i354:
1274         case e1000_i350:
1275         case e1000_i210:
1276         case e1000_i211:
1277                 wr32(E1000_TSAUXC, 0x0);
1278                 wr32(E1000_TSSDP, 0x0);
1279                 wr32(E1000_TSIM,
1280                      TSYNC_INTERRUPTS |
1281                      (adapter->pps_sys_wrap_on ? TSINTR_SYS_WRAP : 0));
1282                 wr32(E1000_IMS, E1000_IMS_TS);
1283                 break;
1284         default:
1285                 /* No work to do. */
1286                 goto out;
1287         }
1288
1289         /* Re-initialize the timer. */
1290         if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211)) {
1291                 struct timespec64 ts = ktime_to_timespec64(ktime_get_real());
1292
1293                 igb_ptp_write_i210(adapter, &ts);
1294         } else {
1295                 timecounter_init(&adapter->tc, &adapter->cc,
1296                                  ktime_to_ns(ktime_get_real()));
1297         }
1298 out:
1299         spin_unlock_irqrestore(&adapter->tmreg_lock, flags);
1300
1301         wrfl();
1302
1303         if (adapter->ptp_flags & IGB_PTP_OVERFLOW_CHECK)
1304                 schedule_delayed_work(&adapter->ptp_overflow_work,
1305                                       IGB_SYSTIM_OVERFLOW_PERIOD);
1306 }