drivers/net/ethernet/intel/igb/igb_main.c

   1 /* Intel(R) Gigabit Ethernet Linux driver
   2  * Copyright(c) 2007-2014 Intel Corporation.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along with
  14  * this program; if not, see <http://www.gnu.org/licenses/>.
  15  *
  16  * The full GNU General Public License is included in this distribution in
  17  * the file called "COPYING".
  18  *
  19  * Contact Information:
  20  * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  21  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  22  */
  23
  24 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  25
  26 #include <linux/module.h>
  27 #include <linux/types.h>
  28 #include <linux/init.h>
  29 #include <linux/bitops.h>
  30 #include <linux/vmalloc.h>
  31 #include <linux/pagemap.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/ipv6.h>
  34 #include <linux/slab.h>
  35 #include <net/checksum.h>
  36 #include <net/ip6_checksum.h>
  37 #include <linux/net_tstamp.h>
  38 #include <linux/mii.h>
  39 #include <linux/ethtool.h>
  40 #include <linux/if.h>
  41 #include <linux/if_vlan.h>
  42 #include <linux/pci.h>
  43 #include <linux/pci-aspm.h>
  44 #include <linux/delay.h>
  45 #include <linux/interrupt.h>
  46 #include <linux/ip.h>
  47 #include <linux/tcp.h>
  48 #include <linux/sctp.h>
  49 #include <linux/if_ether.h>
  50 #include <linux/aer.h>
  51 #include <linux/prefetch.h>
  52 #include <linux/pm_runtime.h>
  53 #include <linux/etherdevice.h>
  54 #ifdef CONFIG_IGB_DCA
  55 #include <linux/dca.h>
  56 #endif
  57 #include <linux/i2c.h>
  58 #include "igb.h"
  59
  60 #define MAJ 5
  61 #define MIN 4
  62 #define BUILD 0
  63 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
  64 __stringify(BUILD) "-k"
  65 char igb_driver_name[] = "igb";
  66 char igb_driver_version[] = DRV_VERSION;
  67 static const char igb_driver_string[] =
  68                                 "Intel(R) Gigabit Ethernet Network Driver";
  69 static const char igb_copyright[] =
  70                                 "Copyright (c) 2007-2014 Intel Corporation.";
  71
  72 static const struct e1000_info *igb_info_tbl[] = {
  73         [board_82575] = &e1000_82575_info,
  74 };
  75
  76 static const struct pci_device_id igb_pci_tbl[] = {
  77         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
  78         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
  79         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
  80         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER), board_82575 },
  81         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER), board_82575 },
  82         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER), board_82575 },
  83         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES), board_82575 },
  84         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII), board_82575 },
  85         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS), board_82575 },
  86         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS), board_82575 },
  87         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER), board_82575 },
  88         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER), board_82575 },
  89         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES), board_82575 },
  90         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 },
  91         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 },
  92         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 },
  93         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER), board_82575 },
  94         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 },
  95         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 },
  96         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 },
  97         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII), board_82575 },
  98         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES), board_82575 },
  99         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE), board_82575 },
 100         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP), board_82575 },
 101         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
 102         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 },
 103         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 },
 104         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
 105         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
 106         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD), board_82575 },
 107         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2), board_82575 },
 108         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
 109         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
 110         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
 111         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
 112         /* required last entry */
 113         {0, }
 114 };
 115
 116 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
 117
 118 static int igb_setup_all_tx_resources(struct igb_adapter *);
 119 static int igb_setup_all_rx_resources(struct igb_adapter *);
 120 static void igb_free_all_tx_resources(struct igb_adapter *);
 121 static void igb_free_all_rx_resources(struct igb_adapter *);
 122 static void igb_setup_mrqc(struct igb_adapter *);
 123 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
 124 static void igb_remove(struct pci_dev *pdev);
 125 static int igb_sw_init(struct igb_adapter *);
 126 int igb_open(struct net_device *);
 127 int igb_close(struct net_device *);
 128 static void igb_configure(struct igb_adapter *);
 129 static void igb_configure_tx(struct igb_adapter *);
 130 static void igb_configure_rx(struct igb_adapter *);
 131 static void igb_clean_all_tx_rings(struct igb_adapter *);
 132 static void igb_clean_all_rx_rings(struct igb_adapter *);
 133 static void igb_clean_tx_ring(struct igb_ring *);
 134 static void igb_clean_rx_ring(struct igb_ring *);
 135 static void igb_set_rx_mode(struct net_device *);
 136 static void igb_update_phy_info(unsigned long);
 137 static void igb_watchdog(unsigned long);
 138 static void igb_watchdog_task(struct work_struct *);
 139 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
 140 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *dev,
 141                                           struct rtnl_link_stats64 *stats);
 142 static int igb_change_mtu(struct net_device *, int);
 143 static int igb_set_mac(struct net_device *, void *);
 144 static void igb_set_uta(struct igb_adapter *adapter, bool set);
 145 static irqreturn_t igb_intr(int irq, void *);
 146 static irqreturn_t igb_intr_msi(int irq, void *);
 147 static irqreturn_t igb_msix_other(int irq, void *);
 148 static irqreturn_t igb_msix_ring(int irq, void *);
 149 #ifdef CONFIG_IGB_DCA
 150 static void igb_update_dca(struct igb_q_vector *);
 151 static void igb_setup_dca(struct igb_adapter *);
 152 #endif /* CONFIG_IGB_DCA */
 153 static int igb_poll(struct napi_struct *, int);
 154 static bool igb_clean_tx_irq(struct igb_q_vector *, int);
 155 static int igb_clean_rx_irq(struct igb_q_vector *, int);
 156 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 157 static void igb_tx_timeout(struct net_device *);
 158 static void igb_reset_task(struct work_struct *);
 159 static void igb_vlan_mode(struct net_device *netdev,
 160                           netdev_features_t features);
 161 static int igb_vlan_rx_add_vid(struct net_device *, __be16, u16);
 162 static int igb_vlan_rx_kill_vid(struct net_device *, __be16, u16);
 163 static void igb_restore_vlan(struct igb_adapter *);
 164 static void igb_rar_set_qsel(struct igb_adapter *, u8 *, u32 , u8);
 165 static void igb_ping_all_vfs(struct igb_adapter *);
 166 static void igb_msg_task(struct igb_adapter *);
 167 static void igb_vmm_control(struct igb_adapter *);
 168 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
 169 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 170 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac);
 171 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
 172                                int vf, u16 vlan, u8 qos, __be16 vlan_proto);
 173 static int igb_ndo_set_vf_bw(struct net_device *, int, int, int);
 174 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
 175                                    bool setting);
 176 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
 177                                  struct ifla_vf_info *ivi);
 178 static void igb_check_vf_rate_limit(struct igb_adapter *);
 179 static void igb_nfc_filter_exit(struct igb_adapter *adapter);
 180 static void igb_nfc_filter_restore(struct igb_adapter *adapter);
 181
 182 #ifdef CONFIG_PCI_IOV
 183 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
 184 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs);
 185 static int igb_disable_sriov(struct pci_dev *dev);
 186 static int igb_pci_disable_sriov(struct pci_dev *dev);
 187 #endif
 188
 189 #ifdef CONFIG_PM
 190 #ifdef CONFIG_PM_SLEEP
 191 static int igb_suspend(struct device *);
 192 #endif
 193 static int igb_resume(struct device *);
 194 static int igb_runtime_suspend(struct device *dev);
 195 static int igb_runtime_resume(struct device *dev);
 196 static int igb_runtime_idle(struct device *dev);
 197 static const struct dev_pm_ops igb_pm_ops = {
 198         SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
 199         SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
 200                         igb_runtime_idle)
 201 };
 202 #endif
 203 static void igb_shutdown(struct pci_dev *);
 204 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs);
 205 #ifdef CONFIG_IGB_DCA
 206 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 207 static struct notifier_block dca_notifier = {
 208         .notifier_call  = igb_notify_dca,
 209         .next           = NULL,
 210         .priority       = 0
 211 };
 212 #endif
 213 #ifdef CONFIG_NET_POLL_CONTROLLER
 214 /* for netdump / net console */
 215 static void igb_netpoll(struct net_device *);
 216 #endif
 217 #ifdef CONFIG_PCI_IOV
 218 static unsigned int max_vfs;
 219 module_param(max_vfs, uint, 0);
 220 MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate per physical function");
 221 #endif /* CONFIG_PCI_IOV */
 222
 223 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 224                      pci_channel_state_t);
 225 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 226 static void igb_io_resume(struct pci_dev *);
 227
 228 static const struct pci_error_handlers igb_err_handler = {
 229         .error_detected = igb_io_error_detected,
 230         .slot_reset = igb_io_slot_reset,
 231         .resume = igb_io_resume,
 232 };
 233
 234 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
 235
 236 static struct pci_driver igb_driver = {
 237         .name     = igb_driver_name,
 238         .id_table = igb_pci_tbl,
 239         .probe    = igb_probe,
 240         .remove   = igb_remove,
 241 #ifdef CONFIG_PM
 242         .driver.pm = &igb_pm_ops,
 243 #endif
 244         .shutdown = igb_shutdown,
 245         .sriov_configure = igb_pci_sriov_configure,
 246         .err_handler = &igb_err_handler
 247 };
 248
 249 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 250 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 251 MODULE_LICENSE("GPL");
 252 MODULE_VERSION(DRV_VERSION);
 253
 254 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 255 static int debug = -1;
 256 module_param(debug, int, 0);
 257 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 258
 259 struct igb_reg_info {
 260         u32 ofs;
 261         char *name;
 262 };
 263
 264 static const struct igb_reg_info igb_reg_info_tbl[] = {
 265
 266         /* General Registers */
 267         {E1000_CTRL, "CTRL"},
 268         {E1000_STATUS, "STATUS"},
 269         {E1000_CTRL_EXT, "CTRL_EXT"},
 270
 271         /* Interrupt Registers */
 272         {E1000_ICR, "ICR"},
 273
 274         /* RX Registers */
 275         {E1000_RCTL, "RCTL"},
 276         {E1000_RDLEN(0), "RDLEN"},
 277         {E1000_RDH(0), "RDH"},
 278         {E1000_RDT(0), "RDT"},
 279         {E1000_RXDCTL(0), "RXDCTL"},
 280         {E1000_RDBAL(0), "RDBAL"},
 281         {E1000_RDBAH(0), "RDBAH"},
 282
 283         /* TX Registers */
 284         {E1000_TCTL, "TCTL"},
 285         {E1000_TDBAL(0), "TDBAL"},
 286         {E1000_TDBAH(0), "TDBAH"},
 287         {E1000_TDLEN(0), "TDLEN"},
 288         {E1000_TDH(0), "TDH"},
 289         {E1000_TDT(0), "TDT"},
 290         {E1000_TXDCTL(0), "TXDCTL"},
 291         {E1000_TDFH, "TDFH"},
 292         {E1000_TDFT, "TDFT"},
 293         {E1000_TDFHS, "TDFHS"},
 294         {E1000_TDFPC, "TDFPC"},
 295
 296         /* List Terminator */
 297         {}
 298 };
 299
 300 /* igb_regdump - register printout routine */
 301 static void igb_regdump(struct e1000_hw *hw, struct igb_reg_info *reginfo)
 302 {
 303         int n = 0;
 304         char rname[16];
 305         u32 regs[8];
 306
 307         switch (reginfo->ofs) {
 308         case E1000_RDLEN(0):
 309                 for (n = 0; n < 4; n++)
 310                         regs[n] = rd32(E1000_RDLEN(n));
 311                 break;
 312         case E1000_RDH(0):
 313                 for (n = 0; n < 4; n++)
 314                         regs[n] = rd32(E1000_RDH(n));
 315                 break;
 316         case E1000_RDT(0):
 317                 for (n = 0; n < 4; n++)
 318                         regs[n] = rd32(E1000_RDT(n));
 319                 break;
 320         case E1000_RXDCTL(0):
 321                 for (n = 0; n < 4; n++)
 322                         regs[n] = rd32(E1000_RXDCTL(n));
 323                 break;
 324         case E1000_RDBAL(0):
 325                 for (n = 0; n < 4; n++)
 326                         regs[n] = rd32(E1000_RDBAL(n));
 327                 break;
 328         case E1000_RDBAH(0):
 329                 for (n = 0; n < 4; n++)
 330                         regs[n] = rd32(E1000_RDBAH(n));
 331                 break;
 332         case E1000_TDBAL(0):
 333                 for (n = 0; n < 4; n++)
 334                         regs[n] = rd32(E1000_RDBAL(n));
 335                 break;
 336         case E1000_TDBAH(0):
 337                 for (n = 0; n < 4; n++)
 338                         regs[n] = rd32(E1000_TDBAH(n));
 339                 break;
 340         case E1000_TDLEN(0):
 341                 for (n = 0; n < 4; n++)
 342                         regs[n] = rd32(E1000_TDLEN(n));
 343                 break;
 344         case E1000_TDH(0):
 345                 for (n = 0; n < 4; n++)
 346                         regs[n] = rd32(E1000_TDH(n));
 347                 break;
 348         case E1000_TDT(0):
 349                 for (n = 0; n < 4; n++)
 350                         regs[n] = rd32(E1000_TDT(n));
 351                 break;
 352         case E1000_TXDCTL(0):
 353                 for (n = 0; n < 4; n++)
 354                         regs[n] = rd32(E1000_TXDCTL(n));
 355                 break;
 356         default:
 357                 pr_info("%-15s %08x\n", reginfo->name, rd32(reginfo->ofs));
 358                 return;
 359         }
 360
 361         snprintf(rname, 16, "%s%s", reginfo->name, "[0-3]");
 362         pr_info("%-15s %08x %08x %08x %08x\n", rname, regs[0], regs[1],
 363                 regs[2], regs[3]);
 364 }
 365
 366 /* igb_dump - Print registers, Tx-rings and Rx-rings */
 367 static void igb_dump(struct igb_adapter *adapter)
 368 {
 369         struct net_device *netdev = adapter->netdev;
 370         struct e1000_hw *hw = &adapter->hw;
 371         struct igb_reg_info *reginfo;
 372         struct igb_ring *tx_ring;
 373         union e1000_adv_tx_desc *tx_desc;
 374         struct my_u0 { u64 a; u64 b; } *u0;
 375         struct igb_ring *rx_ring;
 376         union e1000_adv_rx_desc *rx_desc;
 377         u32 staterr;
 378         u16 i, n;
 379
 380         if (!netif_msg_hw(adapter))
 381                 return;
 382
 383         /* Print netdevice Info */
 384         if (netdev) {
 385                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 386                 pr_info("Device Name     state            trans_start      last_rx\n");
 387                 pr_info("%-15s %016lX %016lX %016lX\n", netdev->name,
 388                         netdev->state, dev_trans_start(netdev), netdev->last_rx);
 389         }
 390
 391         /* Print Registers */
 392         dev_info(&adapter->pdev->dev, "Register Dump\n");
 393         pr_info(" Register Name   Value\n");
 394         for (reginfo = (struct igb_reg_info *)igb_reg_info_tbl;
 395              reginfo->name; reginfo++) {
 396                 igb_regdump(hw, reginfo);
 397         }
 398
 399         /* Print TX Ring Summary */
 400         if (!netdev || !netif_running(netdev))
 401                 goto exit;
 402
 403         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 404         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 405         for (n = 0; n < adapter->num_tx_queues; n++) {
 406                 struct igb_tx_buffer *buffer_info;
 407                 tx_ring = adapter->tx_ring[n];
 408                 buffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 409                 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
 410                         n, tx_ring->next_to_use, tx_ring->next_to_clean,
 411                         (u64)dma_unmap_addr(buffer_info, dma),
 412                         dma_unmap_len(buffer_info, len),
 413                         buffer_info->next_to_watch,
 414                         (u64)buffer_info->time_stamp);
 415         }
 416
 417         /* Print TX Rings */
 418         if (!netif_msg_tx_done(adapter))
 419                 goto rx_ring_summary;
 420
 421         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 422
 423         /* Transmit Descriptor Formats
 424          *
 425          * Advanced Transmit Descriptor
 426          *   +--------------------------------------------------------------+
 427          * 0 |         Buffer Address [63:0]                                |
 428          *   +--------------------------------------------------------------+
 429          * 8 | PAYLEN  | PORTS  |CC|IDX | STA | DCMD  |DTYP|MAC|RSV| DTALEN |
 430          *   +--------------------------------------------------------------+
 431          *   63      46 45    40 39 38 36 35 32 31   24             15       0
 432          */
 433
 434         for (n = 0; n < adapter->num_tx_queues; n++) {
 435                 tx_ring = adapter->tx_ring[n];
 436                 pr_info("------------------------------------\n");
 437                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 438                 pr_info("------------------------------------\n");
 439                 pr_info("T [desc]     [address 63:0  ] [PlPOCIStDDM Ln] [bi->dma       ] leng  ntw timestamp        bi->skb\n");
 440
 441                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 442                         const char *next_desc;
 443                         struct igb_tx_buffer *buffer_info;
 444                         tx_desc = IGB_TX_DESC(tx_ring, i);
 445                         buffer_info = &tx_ring->tx_buffer_info[i];
 446                         u0 = (struct my_u0 *)tx_desc;
 447                         if (i == tx_ring->next_to_use &&
 448                             i == tx_ring->next_to_clean)
 449                                 next_desc = " NTC/U";
 450                         else if (i == tx_ring->next_to_use)
 451                                 next_desc = " NTU";
 452                         else if (i == tx_ring->next_to_clean)
 453                                 next_desc = " NTC";
 454                         else
 455                                 next_desc = "";
 456
 457                         pr_info("T [0x%03X]    %016llX %016llX %016llX %04X  %p %016llX %p%s\n",
 458                                 i, le64_to_cpu(u0->a),
 459                                 le64_to_cpu(u0->b),
 460                                 (u64)dma_unmap_addr(buffer_info, dma),
 461                                 dma_unmap_len(buffer_info, len),
 462                                 buffer_info->next_to_watch,
 463                                 (u64)buffer_info->time_stamp,
 464                                 buffer_info->skb, next_desc);
 465
 466                         if (netif_msg_pktdata(adapter) && buffer_info->skb)
 467                                 print_hex_dump(KERN_INFO, "",
 468                                         DUMP_PREFIX_ADDRESS,
 469                                         16, 1, buffer_info->skb->data,
 470                                         dma_unmap_len(buffer_info, len),
 471                                         true);
 472                 }
 473         }
 474
 475         /* Print RX Rings Summary */
 476 rx_ring_summary:
 477         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 478         pr_info("Queue [NTU] [NTC]\n");
 479         for (n = 0; n < adapter->num_rx_queues; n++) {
 480                 rx_ring = adapter->rx_ring[n];
 481                 pr_info(" %5d %5X %5X\n",
 482                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 483         }
 484
 485         /* Print RX Rings */
 486         if (!netif_msg_rx_status(adapter))
 487                 goto exit;
 488
 489         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 490
 491         /* Advanced Receive Descriptor (Read) Format
 492          *    63                                           1        0
 493          *    +-----------------------------------------------------+
 494          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 495          *    +----------------------------------------------+------+
 496          *  8 |       Header Buffer Address [63:1]           |  DD  |
 497          *    +-----------------------------------------------------+
 498          *
 499          *
 500          * Advanced Receive Descriptor (Write-Back) Format
 501          *
 502          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 503          *   +------------------------------------------------------+
 504          * 0 | Packet     IP     |SPH| HDR_LEN   | RSV|Packet|  RSS |
 505          *   | Checksum   Ident  |   |           |    | Type | Type |
 506          *   +------------------------------------------------------+
 507          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 508          *   +------------------------------------------------------+
 509          *   63       48 47    32 31            20 19               0
 510          */
 511
 512         for (n = 0; n < adapter->num_rx_queues; n++) {
 513                 rx_ring = adapter->rx_ring[n];
 514                 pr_info("------------------------------------\n");
 515                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 516                 pr_info("------------------------------------\n");
 517                 pr_info("R  [desc]      [ PktBuf     A0] [  HeadBuf   DD] [bi->dma       ] [bi->skb] <-- Adv Rx Read format\n");
 518                 pr_info("RWB[desc]      [PcsmIpSHl PtRs] [vl er S cks ln] ---------------- [bi->skb] <-- Adv Rx Write-Back format\n");
 519
 520                 for (i = 0; i < rx_ring->count; i++) {
 521                         const char *next_desc;
 522                         struct igb_rx_buffer *buffer_info;
 523                         buffer_info = &rx_ring->rx_buffer_info[i];
 524                         rx_desc = IGB_RX_DESC(rx_ring, i);
 525                         u0 = (struct my_u0 *)rx_desc;
 526                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 527
 528                         if (i == rx_ring->next_to_use)
 529                                 next_desc = " NTU";
 530                         else if (i == rx_ring->next_to_clean)
 531                                 next_desc = " NTC";
 532                         else
 533                                 next_desc = "";
 534
 535                         if (staterr & E1000_RXD_STAT_DD) {
 536                                 /* Descriptor Done */
 537                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %s\n",
 538                                         "RWB", i,
 539                                         le64_to_cpu(u0->a),
 540                                         le64_to_cpu(u0->b),
 541                                         next_desc);
 542                         } else {
 543                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %s\n",
 544                                         "R  ", i,
 545                                         le64_to_cpu(u0->a),
 546                                         le64_to_cpu(u0->b),
 547                                         (u64)buffer_info->dma,
 548                                         next_desc);
 549
 550                                 if (netif_msg_pktdata(adapter) &&
 551                                     buffer_info->dma && buffer_info->page) {
 552                                         print_hex_dump(KERN_INFO, "",
 553                                           DUMP_PREFIX_ADDRESS,
 554                                           16, 1,
 555                                           page_address(buffer_info->page) +
 556                                                       buffer_info->page_offset,
 557                                           IGB_RX_BUFSZ, true);
 558                                 }
 559                         }
 560                 }
 561         }
 562
 563 exit:
 564         return;
 565 }
 566
 567 /**
 568  *  igb_get_i2c_data - Reads the I2C SDA data bit
 569  *  @hw: pointer to hardware structure
 570  *  @i2cctl: Current value of I2CCTL register
 571  *
 572  *  Returns the I2C data bit value
 573  **/
 574 static int igb_get_i2c_data(void *data)
 575 {
 576         struct igb_adapter *adapter = (struct igb_adapter *)data;
 577         struct e1000_hw *hw = &adapter->hw;
 578         s32 i2cctl = rd32(E1000_I2CPARAMS);
 579
 580         return !!(i2cctl & E1000_I2C_DATA_IN);
 581 }
 582
 583 /**
 584  *  igb_set_i2c_data - Sets the I2C data bit
 585  *  @data: pointer to hardware structure
 586  *  @state: I2C data value (0 or 1) to set
 587  *
 588  *  Sets the I2C data bit
 589  **/
 590 static void igb_set_i2c_data(void *data, int state)
 591 {
 592         struct igb_adapter *adapter = (struct igb_adapter *)data;
 593         struct e1000_hw *hw = &adapter->hw;
 594         s32 i2cctl = rd32(E1000_I2CPARAMS);
 595
 596         if (state)
 597                 i2cctl |= E1000_I2C_DATA_OUT;
 598         else
 599                 i2cctl &= ~E1000_I2C_DATA_OUT;
 600
 601         i2cctl &= ~E1000_I2C_DATA_OE_N;
 602         i2cctl |= E1000_I2C_CLK_OE_N;
 603         wr32(E1000_I2CPARAMS, i2cctl);
 604         wrfl();
 605
 606 }
 607
 608 /**
 609  *  igb_set_i2c_clk - Sets the I2C SCL clock
 610  *  @data: pointer to hardware structure
 611  *  @state: state to set clock
 612  *
 613  *  Sets the I2C clock line to state
 614  **/
 615 static void igb_set_i2c_clk(void *data, int state)
 616 {
 617         struct igb_adapter *adapter = (struct igb_adapter *)data;
 618         struct e1000_hw *hw = &adapter->hw;
 619         s32 i2cctl = rd32(E1000_I2CPARAMS);
 620
 621         if (state) {
 622                 i2cctl |= E1000_I2C_CLK_OUT;
 623                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 624         } else {
 625                 i2cctl &= ~E1000_I2C_CLK_OUT;
 626                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 627         }
 628         wr32(E1000_I2CPARAMS, i2cctl);
 629         wrfl();
 630 }
 631
 632 /**
 633  *  igb_get_i2c_clk - Gets the I2C SCL clock state
 634  *  @data: pointer to hardware structure
 635  *
 636  *  Gets the I2C clock state
 637  **/
 638 static int igb_get_i2c_clk(void *data)
 639 {
 640         struct igb_adapter *adapter = (struct igb_adapter *)data;
 641         struct e1000_hw *hw = &adapter->hw;
 642         s32 i2cctl = rd32(E1000_I2CPARAMS);
 643
 644         return !!(i2cctl & E1000_I2C_CLK_IN);
 645 }
 646
 647 static const struct i2c_algo_bit_data igb_i2c_algo = {
 648         .setsda         = igb_set_i2c_data,
 649         .setscl         = igb_set_i2c_clk,
 650         .getsda         = igb_get_i2c_data,
 651         .getscl         = igb_get_i2c_clk,
 652         .udelay         = 5,
 653         .timeout        = 20,
 654 };
 655
 656 /**
 657  *  igb_get_hw_dev - return device
 658  *  @hw: pointer to hardware structure
 659  *
 660  *  used by hardware layer to print debugging information
 661  **/
 662 struct net_device *igb_get_hw_dev(struct e1000_hw *hw)
 663 {
 664         struct igb_adapter *adapter = hw->back;
 665         return adapter->netdev;
 666 }
 667
 668 /**
 669  *  igb_init_module - Driver Registration Routine
 670  *
 671  *  igb_init_module is the first routine called when the driver is
 672  *  loaded. All it does is register with the PCI subsystem.
 673  **/
 674 static int __init igb_init_module(void)
 675 {
 676         int ret;
 677
 678         pr_info("%s - version %s\n",
 679                igb_driver_string, igb_driver_version);
 680         pr_info("%s\n", igb_copyright);
 681
 682 #ifdef CONFIG_IGB_DCA
 683         dca_register_notify(&dca_notifier);
 684 #endif
 685         ret = pci_register_driver(&igb_driver);
 686         return ret;
 687 }
 688
 689 module_init(igb_init_module);
 690
 691 /**
 692  *  igb_exit_module - Driver Exit Cleanup Routine
 693  *
 694  *  igb_exit_module is called just before the driver is removed
 695  *  from memory.
 696  **/
 697 static void __exit igb_exit_module(void)
 698 {
 699 #ifdef CONFIG_IGB_DCA
 700         dca_unregister_notify(&dca_notifier);
 701 #endif
 702         pci_unregister_driver(&igb_driver);
 703 }
 704
 705 module_exit(igb_exit_module);
 706
 707 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
 708 /**
 709  *  igb_cache_ring_register - Descriptor ring to register mapping
 710  *  @adapter: board private structure to initialize
 711  *
 712  *  Once we know the feature-set enabled for the device, we'll cache
 713  *  the register offset the descriptor ring is assigned to.
 714  **/
 715 static void igb_cache_ring_register(struct igb_adapter *adapter)
 716 {
 717         int i = 0, j = 0;
 718         u32 rbase_offset = adapter->vfs_allocated_count;
 719
 720         switch (adapter->hw.mac.type) {
 721         case e1000_82576:
 722                 /* The queues are allocated for virtualization such that VF 0
 723                  * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
 724                  * In order to avoid collision we start at the first free queue
 725                  * and continue consuming queues in the same sequence
 726                  */
 727                 if (adapter->vfs_allocated_count) {
 728                         for (; i < adapter->rss_queues; i++)
 729                                 adapter->rx_ring[i]->reg_idx = rbase_offset +
 730                                                                Q_IDX_82576(i);
 731                 }
 732                 /* Fall through */
 733         case e1000_82575:
 734         case e1000_82580:
 735         case e1000_i350:
 736         case e1000_i354:
 737         case e1000_i210:
 738         case e1000_i211:
 739                 /* Fall through */
 740         default:
 741                 for (; i < adapter->num_rx_queues; i++)
 742                         adapter->rx_ring[i]->reg_idx = rbase_offset + i;
 743                 for (; j < adapter->num_tx_queues; j++)
 744                         adapter->tx_ring[j]->reg_idx = rbase_offset + j;
 745                 break;
 746         }
 747 }
 748
 749 u32 igb_rd32(struct e1000_hw *hw, u32 reg)
 750 {
 751         struct igb_adapter *igb = container_of(hw, struct igb_adapter, hw);
 752         u8 __iomem *hw_addr = ACCESS_ONCE(hw->hw_addr);
 753         u32 value = 0;
 754
 755         if (E1000_REMOVED(hw_addr))
 756                 return ~value;
 757
 758         value = readl(&hw_addr[reg]);
 759
 760         /* reads should not return all F's */
 761         if (!(~value) && (!reg || !(~readl(hw_addr)))) {
 762                 struct net_device *netdev = igb->netdev;
 763                 hw->hw_addr = NULL;
 764                 netif_device_detach(netdev);
 765                 netdev_err(netdev, "PCIe link lost, device now detached\n");
 766         }
 767
 768         return value;
 769 }
 770
 771 /**
 772  *  igb_write_ivar - configure ivar for given MSI-X vector
 773  *  @hw: pointer to the HW structure
 774  *  @msix_vector: vector number we are allocating to a given ring
 775  *  @index: row index of IVAR register to write within IVAR table
 776  *  @offset: column offset of in IVAR, should be multiple of 8
 777  *
 778  *  This function is intended to handle the writing of the IVAR register
 779  *  for adapters 82576 and newer.  The IVAR table consists of 2 columns,
 780  *  each containing an cause allocation for an Rx and Tx ring, and a
 781  *  variable number of rows depending on the number of queues supported.
 782  **/
 783 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
 784                            int index, int offset)
 785 {
 786         u32 ivar = array_rd32(E1000_IVAR0, index);
 787
 788         /* clear any bits that are currently set */
 789         ivar &= ~((u32)0xFF << offset);
 790
 791         /* write vector and valid bit */
 792         ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
 793
 794         array_wr32(E1000_IVAR0, index, ivar);
 795 }
 796
 797 #define IGB_N0_QUEUE -1
 798 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
 799 {
 800         struct igb_adapter *adapter = q_vector->adapter;
 801         struct e1000_hw *hw = &adapter->hw;
 802         int rx_queue = IGB_N0_QUEUE;
 803         int tx_queue = IGB_N0_QUEUE;
 804         u32 msixbm = 0;
 805
 806         if (q_vector->rx.ring)
 807                 rx_queue = q_vector->rx.ring->reg_idx;
 808         if (q_vector->tx.ring)
 809                 tx_queue = q_vector->tx.ring->reg_idx;
 810
 811         switch (hw->mac.type) {
 812         case e1000_82575:
 813                 /* The 82575 assigns vectors using a bitmask, which matches the
 814                  * bitmask for the EICR/EIMS/EIMC registers.  To assign one
 815                  * or more queues to a vector, we write the appropriate bits
 816                  * into the MSIXBM register for that vector.
 817                  */
 818                 if (rx_queue > IGB_N0_QUEUE)
 819                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 820                 if (tx_queue > IGB_N0_QUEUE)
 821                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 822                 if (!(adapter->flags & IGB_FLAG_HAS_MSIX) && msix_vector == 0)
 823                         msixbm |= E1000_EIMS_OTHER;
 824                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
 825                 q_vector->eims_value = msixbm;
 826                 break;
 827         case e1000_82576:
 828                 /* 82576 uses a table that essentially consists of 2 columns
 829                  * with 8 rows.  The ordering is column-major so we use the
 830                  * lower 3 bits as the row index, and the 4th bit as the
 831                  * column offset.
 832                  */
 833                 if (rx_queue > IGB_N0_QUEUE)
 834                         igb_write_ivar(hw, msix_vector,
 835                                        rx_queue & 0x7,
 836                                        (rx_queue & 0x8) << 1);
 837                 if (tx_queue > IGB_N0_QUEUE)
 838                         igb_write_ivar(hw, msix_vector,
 839                                        tx_queue & 0x7,
 840                                        ((tx_queue & 0x8) << 1) + 8);
 841                 q_vector->eims_value = BIT(msix_vector);
 842                 break;
 843         case e1000_82580:
 844         case e1000_i350:
 845         case e1000_i354:
 846         case e1000_i210:
 847         case e1000_i211:
 848                 /* On 82580 and newer adapters the scheme is similar to 82576
 849                  * however instead of ordering column-major we have things
 850                  * ordered row-major.  So we traverse the table by using
 851                  * bit 0 as the column offset, and the remaining bits as the
 852                  * row index.
 853                  */
 854                 if (rx_queue > IGB_N0_QUEUE)
 855                         igb_write_ivar(hw, msix_vector,
 856                                        rx_queue >> 1,
 857                                        (rx_queue & 0x1) << 4);
 858                 if (tx_queue > IGB_N0_QUEUE)
 859                         igb_write_ivar(hw, msix_vector,
 860                                        tx_queue >> 1,
 861                                        ((tx_queue & 0x1) << 4) + 8);
 862                 q_vector->eims_value = BIT(msix_vector);
 863                 break;
 864         default:
 865                 BUG();
 866                 break;
 867         }
 868
 869         /* add q_vector eims value to global eims_enable_mask */
 870         adapter->eims_enable_mask |= q_vector->eims_value;
 871
 872         /* configure q_vector to set itr on first interrupt */
 873         q_vector->set_itr = 1;
 874 }
 875
 876 /**
 877  *  igb_configure_msix - Configure MSI-X hardware
 878  *  @adapter: board private structure to initialize
 879  *
 880  *  igb_configure_msix sets up the hardware to properly
 881  *  generate MSI-X interrupts.
 882  **/
 883 static void igb_configure_msix(struct igb_adapter *adapter)
 884 {
 885         u32 tmp;
 886         int i, vector = 0;
 887         struct e1000_hw *hw = &adapter->hw;
 888
 889         adapter->eims_enable_mask = 0;
 890
 891         /* set vector for other causes, i.e. link changes */
 892         switch (hw->mac.type) {
 893         case e1000_82575:
 894                 tmp = rd32(E1000_CTRL_EXT);
 895                 /* enable MSI-X PBA support*/
 896                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 897
 898                 /* Auto-Mask interrupts upon ICR read. */
 899                 tmp |= E1000_CTRL_EXT_EIAME;
 900                 tmp |= E1000_CTRL_EXT_IRCA;
 901
 902                 wr32(E1000_CTRL_EXT, tmp);
 903
 904                 /* enable msix_other interrupt */
 905                 array_wr32(E1000_MSIXBM(0), vector++, E1000_EIMS_OTHER);
 906                 adapter->eims_other = E1000_EIMS_OTHER;
 907
 908                 break;
 909
 910         case e1000_82576:
 911         case e1000_82580:
 912         case e1000_i350:
 913         case e1000_i354:
 914         case e1000_i210:
 915         case e1000_i211:
 916                 /* Turn on MSI-X capability first, or our settings
 917                  * won't stick.  And it will take days to debug.
 918                  */
 919                 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
 920                      E1000_GPIE_PBA | E1000_GPIE_EIAME |
 921                      E1000_GPIE_NSICR);
 922
 923                 /* enable msix_other interrupt */
 924                 adapter->eims_other = BIT(vector);
 925                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 926
 927                 wr32(E1000_IVAR_MISC, tmp);
 928                 break;
 929         default:
 930                 /* do nothing, since nothing else supports MSI-X */
 931                 break;
 932         } /* switch (hw->mac.type) */
 933
 934         adapter->eims_enable_mask |= adapter->eims_other;
 935
 936         for (i = 0; i < adapter->num_q_vectors; i++)
 937                 igb_assign_vector(adapter->q_vector[i], vector++);
 938
 939         wrfl();
 940 }
 941
 942 /**
 943  *  igb_request_msix - Initialize MSI-X interrupts
 944  *  @adapter: board private structure to initialize
 945  *
 946  *  igb_request_msix allocates MSI-X vectors and requests interrupts from the
 947  *  kernel.
 948  **/
 949 static int igb_request_msix(struct igb_adapter *adapter)
 950 {
 951         struct net_device *netdev = adapter->netdev;
 952         int i, err = 0, vector = 0, free_vector = 0;
 953
 954         err = request_irq(adapter->msix_entries[vector].vector,
 955                           igb_msix_other, 0, netdev->name, adapter);
 956         if (err)
 957                 goto err_out;
 958
 959         for (i = 0; i < adapter->num_q_vectors; i++) {
 960                 struct igb_q_vector *q_vector = adapter->q_vector[i];
 961
 962                 vector++;
 963
 964                 q_vector->itr_register = adapter->io_addr + E1000_EITR(vector);
 965
 966                 if (q_vector->rx.ring && q_vector->tx.ring)
 967                         sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
 968                                 q_vector->rx.ring->queue_index);
 969                 else if (q_vector->tx.ring)
 970                         sprintf(q_vector->name, "%s-tx-%u", netdev->name,
 971                                 q_vector->tx.ring->queue_index);
 972                 else if (q_vector->rx.ring)
 973                         sprintf(q_vector->name, "%s-rx-%u", netdev->name,
 974                                 q_vector->rx.ring->queue_index);
 975                 else
 976                         sprintf(q_vector->name, "%s-unused", netdev->name);
 977
 978                 err = request_irq(adapter->msix_entries[vector].vector,
 979                                   igb_msix_ring, 0, q_vector->name,
 980                                   q_vector);
 981                 if (err)
 982                         goto err_free;
 983         }
 984
 985         igb_configure_msix(adapter);
 986         return 0;
 987
 988 err_free:
 989         /* free already assigned IRQs */
 990         free_irq(adapter->msix_entries[free_vector++].vector, adapter);
 991
 992         vector--;
 993         for (i = 0; i < vector; i++) {
 994                 free_irq(adapter->msix_entries[free_vector++].vector,
 995                          adapter->q_vector[i]);
 996         }
 997 err_out:
 998         return err;
 999 }
1000
1001 /**
1002  *  igb_free_q_vector - Free memory allocated for specific interrupt vector
1003  *  @adapter: board private structure to initialize
1004  *  @v_idx: Index of vector to be freed
1005  *
1006  *  This function frees the memory allocated to the q_vector.
1007  **/
1008 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
1009 {
1010         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1011
1012         adapter->q_vector[v_idx] = NULL;
1013
1014         /* igb_get_stats64() might access the rings on this vector,
1015          * we must wait a grace period before freeing it.
1016          */
1017         if (q_vector)
1018                 kfree_rcu(q_vector, rcu);
1019 }
1020
1021 /**
1022  *  igb_reset_q_vector - Reset config for interrupt vector
1023  *  @adapter: board private structure to initialize
1024  *  @v_idx: Index of vector to be reset
1025  *
1026  *  If NAPI is enabled it will delete any references to the
1027  *  NAPI struct. This is preparation for igb_free_q_vector.
1028  **/
1029 static void igb_reset_q_vector(struct igb_adapter *adapter, int v_idx)
1030 {
1031         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1032
1033         /* Coming from igb_set_interrupt_capability, the vectors are not yet
1034          * allocated. So, q_vector is NULL so we should stop here.
1035          */
1036         if (!q_vector)
1037                 return;
1038
1039         if (q_vector->tx.ring)
1040                 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
1041
1042         if (q_vector->rx.ring)
1043                 adapter->rx_ring[q_vector->rx.ring->queue_index] = NULL;
1044
1045         netif_napi_del(&q_vector->napi);
1046
1047 }
1048
1049 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
1050 {
1051         int v_idx = adapter->num_q_vectors;
1052
1053         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1054                 pci_disable_msix(adapter->pdev);
1055         else if (adapter->flags & IGB_FLAG_HAS_MSI)
1056                 pci_disable_msi(adapter->pdev);
1057
1058         while (v_idx--)
1059                 igb_reset_q_vector(adapter, v_idx);
1060 }
1061
1062 /**
1063  *  igb_free_q_vectors - Free memory allocated for interrupt vectors
1064  *  @adapter: board private structure to initialize
1065  *
1066  *  This function frees the memory allocated to the q_vectors.  In addition if
1067  *  NAPI is enabled it will delete any references to the NAPI struct prior
1068  *  to freeing the q_vector.
1069  **/
1070 static void igb_free_q_vectors(struct igb_adapter *adapter)
1071 {
1072         int v_idx = adapter->num_q_vectors;
1073
1074         adapter->num_tx_queues = 0;
1075         adapter->num_rx_queues = 0;
1076         adapter->num_q_vectors = 0;
1077
1078         while (v_idx--) {
1079                 igb_reset_q_vector(adapter, v_idx);
1080                 igb_free_q_vector(adapter, v_idx);
1081         }
1082 }
1083
1084 /**
1085  *  igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1086  *  @adapter: board private structure to initialize
1087  *
1088  *  This function resets the device so that it has 0 Rx queues, Tx queues, and
1089  *  MSI-X interrupts allocated.
1090  */
1091 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
1092 {
1093         igb_free_q_vectors(adapter);
1094         igb_reset_interrupt_capability(adapter);
1095 }
1096
1097 /**
1098  *  igb_set_interrupt_capability - set MSI or MSI-X if supported
1099  *  @adapter: board private structure to initialize
1100  *  @msix: boolean value of MSIX capability
1101  *
1102  *  Attempt to configure interrupts using the best available
1103  *  capabilities of the hardware and kernel.
1104  **/
1105 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
1106 {
1107         int err;
1108         int numvecs, i;
1109
1110         if (!msix)
1111                 goto msi_only;
1112         adapter->flags |= IGB_FLAG_HAS_MSIX;
1113
1114         /* Number of supported queues. */
1115         adapter->num_rx_queues = adapter->rss_queues;
1116         if (adapter->vfs_allocated_count)
1117                 adapter->num_tx_queues = 1;
1118         else
1119                 adapter->num_tx_queues = adapter->rss_queues;
1120
1121         /* start with one vector for every Rx queue */
1122         numvecs = adapter->num_rx_queues;
1123
1124         /* if Tx handler is separate add 1 for every Tx queue */
1125         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1126                 numvecs += adapter->num_tx_queues;
1127
1128         /* store the number of vectors reserved for queues */
1129         adapter->num_q_vectors = numvecs;
1130
1131         /* add 1 vector for link status interrupts */
1132         numvecs++;
1133         for (i = 0; i < numvecs; i++)
1134                 adapter->msix_entries[i].entry = i;
1135
1136         err = pci_enable_msix_range(adapter->pdev,
1137                                     adapter->msix_entries,
1138                                     numvecs,
1139                                     numvecs);
1140         if (err > 0)
1141                 return;
1142
1143         igb_reset_interrupt_capability(adapter);
1144
1145         /* If we can't do MSI-X, try MSI */
1146 msi_only:
1147         adapter->flags &= ~IGB_FLAG_HAS_MSIX;
1148 #ifdef CONFIG_PCI_IOV
1149         /* disable SR-IOV for non MSI-X configurations */
1150         if (adapter->vf_data) {
1151                 struct e1000_hw *hw = &adapter->hw;
1152                 /* disable iov and allow time for transactions to clear */
1153                 pci_disable_sriov(adapter->pdev);
1154                 msleep(500);
1155
1156                 kfree(adapter->vf_data);
1157                 adapter->vf_data = NULL;
1158                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
1159                 wrfl();
1160                 msleep(100);
1161                 dev_info(&adapter->pdev->dev, "IOV Disabled\n");
1162         }
1163 #endif
1164         adapter->vfs_allocated_count = 0;
1165         adapter->rss_queues = 1;
1166         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1167         adapter->num_rx_queues = 1;
1168         adapter->num_tx_queues = 1;
1169         adapter->num_q_vectors = 1;
1170         if (!pci_enable_msi(adapter->pdev))
1171                 adapter->flags |= IGB_FLAG_HAS_MSI;
1172 }
1173
1174 static void igb_add_ring(struct igb_ring *ring,
1175                          struct igb_ring_container *head)
1176 {
1177         head->ring = ring;
1178         head->count++;
1179 }
1180
1181 /**
1182  *  igb_alloc_q_vector - Allocate memory for a single interrupt vector
1183  *  @adapter: board private structure to initialize
1184  *  @v_count: q_vectors allocated on adapter, used for ring interleaving
1185  *  @v_idx: index of vector in adapter struct
1186  *  @txr_count: total number of Tx rings to allocate
1187  *  @txr_idx: index of first Tx ring to allocate
1188  *  @rxr_count: total number of Rx rings to allocate
1189  *  @rxr_idx: index of first Rx ring to allocate
1190  *
1191  *  We allocate one q_vector.  If allocation fails we return -ENOMEM.
1192  **/
1193 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1194                               int v_count, int v_idx,
1195                               int txr_count, int txr_idx,
1196                               int rxr_count, int rxr_idx)
1197 {
1198         struct igb_q_vector *q_vector;
1199         struct igb_ring *ring;
1200         int ring_count, size;
1201
1202         /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1203         if (txr_count > 1 || rxr_count > 1)
1204                 return -ENOMEM;
1205
1206         ring_count = txr_count + rxr_count;
1207         size = sizeof(struct igb_q_vector) +
1208                (sizeof(struct igb_ring) * ring_count);
1209
1210         /* allocate q_vector and rings */
1211         q_vector = adapter->q_vector[v_idx];
1212         if (!q_vector) {
1213                 q_vector = kzalloc(size, GFP_KERNEL);
1214         } else if (size > ksize(q_vector)) {
1215                 kfree_rcu(q_vector, rcu);
1216                 q_vector = kzalloc(size, GFP_KERNEL);
1217         } else {
1218                 memset(q_vector, 0, size);
1219         }
1220         if (!q_vector)
1221                 return -ENOMEM;
1222
1223         /* initialize NAPI */
1224         netif_napi_add(adapter->netdev, &q_vector->napi,
1225                        igb_poll, 64);
1226
1227         /* tie q_vector and adapter together */
1228         adapter->q_vector[v_idx] = q_vector;
1229         q_vector->adapter = adapter;
1230
1231         /* initialize work limits */
1232         q_vector->tx.work_limit = adapter->tx_work_limit;
1233
1234         /* initialize ITR configuration */
1235         q_vector->itr_register = adapter->io_addr + E1000_EITR(0);
1236         q_vector->itr_val = IGB_START_ITR;
1237
1238         /* initialize pointer to rings */
1239         ring = q_vector->ring;
1240
1241         /* intialize ITR */
1242         if (rxr_count) {
1243                 /* rx or rx/tx vector */
1244                 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1245                         q_vector->itr_val = adapter->rx_itr_setting;
1246         } else {
1247                 /* tx only vector */
1248                 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1249                         q_vector->itr_val = adapter->tx_itr_setting;
1250         }
1251
1252         if (txr_count) {
1253                 /* assign generic ring traits */
1254                 ring->dev = &adapter->pdev->dev;
1255                 ring->netdev = adapter->netdev;
1256
1257                 /* configure backlink on ring */
1258                 ring->q_vector = q_vector;
1259
1260                 /* update q_vector Tx values */
1261                 igb_add_ring(ring, &q_vector->tx);
1262
1263                 /* For 82575, context index must be unique per ring. */
1264                 if (adapter->hw.mac.type == e1000_82575)
1265                         set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1266
1267                 /* apply Tx specific ring traits */
1268                 ring->count = adapter->tx_ring_count;
1269                 ring->queue_index = txr_idx;
1270
1271                 u64_stats_init(&ring->tx_syncp);
1272                 u64_stats_init(&ring->tx_syncp2);
1273
1274                 /* assign ring to adapter */
1275                 adapter->tx_ring[txr_idx] = ring;
1276
1277                 /* push pointer to next ring */
1278                 ring++;
1279         }
1280
1281         if (rxr_count) {
1282                 /* assign generic ring traits */
1283                 ring->dev = &adapter->pdev->dev;
1284                 ring->netdev = adapter->netdev;
1285
1286                 /* configure backlink on ring */
1287                 ring->q_vector = q_vector;
1288
1289                 /* update q_vector Rx values */
1290                 igb_add_ring(ring, &q_vector->rx);
1291
1292                 /* set flag indicating ring supports SCTP checksum offload */
1293                 if (adapter->hw.mac.type >= e1000_82576)
1294                         set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1295
1296                 /* On i350, i354, i210, and i211, loopback VLAN packets
1297                  * have the tag byte-swapped.
1298                  */
1299                 if (adapter->hw.mac.type >= e1000_i350)
1300                         set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1301
1302                 /* apply Rx specific ring traits */
1303                 ring->count = adapter->rx_ring_count;
1304                 ring->queue_index = rxr_idx;
1305
1306                 u64_stats_init(&ring->rx_syncp);
1307
1308                 /* assign ring to adapter */
1309                 adapter->rx_ring[rxr_idx] = ring;
1310         }
1311
1312         return 0;
1313 }
1314
1315
1316 /**
1317  *  igb_alloc_q_vectors - Allocate memory for interrupt vectors
1318  *  @adapter: board private structure to initialize
1319  *
1320  *  We allocate one q_vector per queue interrupt.  If allocation fails we
1321  *  return -ENOMEM.
1322  **/
1323 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1324 {
1325         int q_vectors = adapter->num_q_vectors;
1326         int rxr_remaining = adapter->num_rx_queues;
1327         int txr_remaining = adapter->num_tx_queues;
1328         int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1329         int err;
1330
1331         if (q_vectors >= (rxr_remaining + txr_remaining)) {
1332                 for (; rxr_remaining; v_idx++) {
1333                         err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1334                                                  0, 0, 1, rxr_idx);
1335
1336                         if (err)
1337                                 goto err_out;
1338
1339                         /* update counts and index */
1340                         rxr_remaining--;
1341                         rxr_idx++;
1342                 }
1343         }
1344
1345         for (; v_idx < q_vectors; v_idx++) {
1346                 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1347                 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1348
1349                 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1350                                          tqpv, txr_idx, rqpv, rxr_idx);
1351
1352                 if (err)
1353                         goto err_out;
1354
1355                 /* update counts and index */
1356                 rxr_remaining -= rqpv;
1357                 txr_remaining -= tqpv;
1358                 rxr_idx++;
1359                 txr_idx++;
1360         }
1361
1362         return 0;
1363
1364 err_out:
1365         adapter->num_tx_queues = 0;
1366         adapter->num_rx_queues = 0;
1367         adapter->num_q_vectors = 0;
1368
1369         while (v_idx--)
1370                 igb_free_q_vector(adapter, v_idx);
1371
1372         return -ENOMEM;
1373 }
1374
1375 /**
1376  *  igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1377  *  @adapter: board private structure to initialize
1378  *  @msix: boolean value of MSIX capability
1379  *
1380  *  This function initializes the interrupts and allocates all of the queues.
1381  **/
1382 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1383 {
1384         struct pci_dev *pdev = adapter->pdev;
1385         int err;
1386
1387         igb_set_interrupt_capability(adapter, msix);
1388
1389         err = igb_alloc_q_vectors(adapter);
1390         if (err) {
1391                 dev_err(&pdev->dev, "Unable to allocate memory for vectors\n");
1392                 goto err_alloc_q_vectors;
1393         }
1394
1395         igb_cache_ring_register(adapter);
1396
1397         return 0;
1398
1399 err_alloc_q_vectors:
1400         igb_reset_interrupt_capability(adapter);
1401         return err;
1402 }
1403
1404 /**
1405  *  igb_request_irq - initialize interrupts
1406  *  @adapter: board private structure to initialize
1407  *
1408  *  Attempts to configure interrupts using the best available
1409  *  capabilities of the hardware and kernel.
1410  **/
1411 static int igb_request_irq(struct igb_adapter *adapter)
1412 {
1413         struct net_device *netdev = adapter->netdev;
1414         struct pci_dev *pdev = adapter->pdev;
1415         int err = 0;
1416
1417         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1418                 err = igb_request_msix(adapter);
1419                 if (!err)
1420                         goto request_done;
1421                 /* fall back to MSI */
1422                 igb_free_all_tx_resources(adapter);
1423                 igb_free_all_rx_resources(adapter);
1424
1425                 igb_clear_interrupt_scheme(adapter);
1426                 err = igb_init_interrupt_scheme(adapter, false);
1427                 if (err)
1428                         goto request_done;
1429
1430                 igb_setup_all_tx_resources(adapter);
1431                 igb_setup_all_rx_resources(adapter);
1432                 igb_configure(adapter);
1433         }
1434
1435         igb_assign_vector(adapter->q_vector[0], 0);
1436
1437         if (adapter->flags & IGB_FLAG_HAS_MSI) {
1438                 err = request_irq(pdev->irq, igb_intr_msi, 0,
1439                                   netdev->name, adapter);
1440                 if (!err)
1441                         goto request_done;
1442
1443                 /* fall back to legacy interrupts */
1444                 igb_reset_interrupt_capability(adapter);
1445                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1446         }
1447
1448         err = request_irq(pdev->irq, igb_intr, IRQF_SHARED,
1449                           netdev->name, adapter);
1450
1451         if (err)
1452                 dev_err(&pdev->dev, "Error %d getting interrupt\n",
1453                         err);
1454
1455 request_done:
1456         return err;
1457 }
1458
1459 static void igb_free_irq(struct igb_adapter *adapter)
1460 {
1461         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1462                 int vector = 0, i;
1463
1464                 free_irq(adapter->msix_entries[vector++].vector, adapter);
1465
1466                 for (i = 0; i < adapter->num_q_vectors; i++)
1467                         free_irq(adapter->msix_entries[vector++].vector,
1468                                  adapter->q_vector[i]);
1469         } else {
1470                 free_irq(adapter->pdev->irq, adapter);
1471         }
1472 }
1473
1474 /**
1475  *  igb_irq_disable - Mask off interrupt generation on the NIC
1476  *  @adapter: board private structure
1477  **/
1478 static void igb_irq_disable(struct igb_adapter *adapter)
1479 {
1480         struct e1000_hw *hw = &adapter->hw;
1481
1482         /* we need to be careful when disabling interrupts.  The VFs are also
1483          * mapped into these registers and so clearing the bits can cause
1484          * issues on the VF drivers so we only need to clear what we set
1485          */
1486         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1487                 u32 regval = rd32(E1000_EIAM);
1488
1489                 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
1490                 wr32(E1000_EIMC, adapter->eims_enable_mask);
1491                 regval = rd32(E1000_EIAC);
1492                 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask);
1493         }
1494
1495         wr32(E1000_IAM, 0);
1496         wr32(E1000_IMC, ~0);
1497         wrfl();
1498         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1499                 int i;
1500
1501                 for (i = 0; i < adapter->num_q_vectors; i++)
1502                         synchronize_irq(adapter->msix_entries[i].vector);
1503         } else {
1504                 synchronize_irq(adapter->pdev->irq);
1505         }
1506 }
1507
1508 /**
1509  *  igb_irq_enable - Enable default interrupt generation settings
1510  *  @adapter: board private structure
1511  **/
1512 static void igb_irq_enable(struct igb_adapter *adapter)
1513 {
1514         struct e1000_hw *hw = &adapter->hw;
1515
1516         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1517                 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1518                 u32 regval = rd32(E1000_EIAC);
1519
1520                 wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
1521                 regval = rd32(E1000_EIAM);
1522                 wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
1523                 wr32(E1000_EIMS, adapter->eims_enable_mask);
1524                 if (adapter->vfs_allocated_count) {
1525                         wr32(E1000_MBVFIMR, 0xFF);
1526                         ims |= E1000_IMS_VMMB;
1527                 }
1528                 wr32(E1000_IMS, ims);
1529         } else {
1530                 wr32(E1000_IMS, IMS_ENABLE_MASK |
1531                                 E1000_IMS_DRSTA);
1532                 wr32(E1000_IAM, IMS_ENABLE_MASK |
1533                                 E1000_IMS_DRSTA);
1534         }
1535 }
1536
1537 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1538 {
1539         struct e1000_hw *hw = &adapter->hw;
1540         u16 pf_id = adapter->vfs_allocated_count;
1541         u16 vid = adapter->hw.mng_cookie.vlan_id;
1542         u16 old_vid = adapter->mng_vlan_id;
1543
1544         if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1545                 /* add VID to filter table */
1546                 igb_vfta_set(hw, vid, pf_id, true, true);
1547                 adapter->mng_vlan_id = vid;
1548         } else {
1549                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1550         }
1551
1552         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1553             (vid != old_vid) &&
1554             !test_bit(old_vid, adapter->active_vlans)) {
1555                 /* remove VID from filter table */
1556                 igb_vfta_set(hw, vid, pf_id, false, true);
1557         }
1558 }
1559
1560 /**
1561  *  igb_release_hw_control - release control of the h/w to f/w
1562  *  @adapter: address of board private structure
1563  *
1564  *  igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1565  *  For ASF and Pass Through versions of f/w this means that the
1566  *  driver is no longer loaded.
1567  **/
1568 static void igb_release_hw_control(struct igb_adapter *adapter)
1569 {
1570         struct e1000_hw *hw = &adapter->hw;
1571         u32 ctrl_ext;
1572
1573         /* Let firmware take over control of h/w */
1574         ctrl_ext = rd32(E1000_CTRL_EXT);
1575         wr32(E1000_CTRL_EXT,
1576                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1577 }
1578
1579 /**
1580  *  igb_get_hw_control - get control of the h/w from f/w
1581  *  @adapter: address of board private structure
1582  *
1583  *  igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1584  *  For ASF and Pass Through versions of f/w this means that
1585  *  the driver is loaded.
1586  **/
1587 static void igb_get_hw_control(struct igb_adapter *adapter)
1588 {
1589         struct e1000_hw *hw = &adapter->hw;
1590         u32 ctrl_ext;
1591
1592         /* Let firmware know the driver has taken over */
1593         ctrl_ext = rd32(E1000_CTRL_EXT);
1594         wr32(E1000_CTRL_EXT,
1595                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1596 }
1597
1598 /**
1599  *  igb_configure - configure the hardware for RX and TX
1600  *  @adapter: private board structure
1601  **/
1602 static void igb_configure(struct igb_adapter *adapter)
1603 {
1604         struct net_device *netdev = adapter->netdev;
1605         int i;
1606
1607         igb_get_hw_control(adapter);
1608         igb_set_rx_mode(netdev);
1609
1610         igb_restore_vlan(adapter);
1611
1612         igb_setup_tctl(adapter);
1613         igb_setup_mrqc(adapter);
1614         igb_setup_rctl(adapter);
1615
1616         igb_nfc_filter_restore(adapter);
1617         igb_configure_tx(adapter);
1618         igb_configure_rx(adapter);
1619
1620         igb_rx_fifo_flush_82575(&adapter->hw);
1621
1622         /* call igb_desc_unused which always leaves
1623          * at least 1 descriptor unused to make sure
1624          * next_to_use != next_to_clean
1625          */
1626         for (i = 0; i < adapter->num_rx_queues; i++) {
1627                 struct igb_ring *ring = adapter->rx_ring[i];
1628                 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1629         }
1630 }
1631
1632 /**
1633  *  igb_power_up_link - Power up the phy/serdes link
1634  *  @adapter: address of board private structure
1635  **/
1636 void igb_power_up_link(struct igb_adapter *adapter)
1637 {
1638         igb_reset_phy(&adapter->hw);
1639
1640         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1641                 igb_power_up_phy_copper(&adapter->hw);
1642         else
1643                 igb_power_up_serdes_link_82575(&adapter->hw);
1644
1645         igb_setup_link(&adapter->hw);
1646 }
1647
1648 /**
1649  *  igb_power_down_link - Power down the phy/serdes link
1650  *  @adapter: address of board private structure
1651  */
1652 static void igb_power_down_link(struct igb_adapter *adapter)
1653 {
1654         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1655                 igb_power_down_phy_copper_82575(&adapter->hw);
1656         else
1657                 igb_shutdown_serdes_link_82575(&adapter->hw);
1658 }
1659
1660 /**
1661  * Detect and switch function for Media Auto Sense
1662  * @adapter: address of the board private structure
1663  **/
1664 static void igb_check_swap_media(struct igb_adapter *adapter)
1665 {
1666         struct e1000_hw *hw = &adapter->hw;
1667         u32 ctrl_ext, connsw;
1668         bool swap_now = false;
1669
1670         ctrl_ext = rd32(E1000_CTRL_EXT);
1671         connsw = rd32(E1000_CONNSW);
1672
1673         /* need to live swap if current media is copper and we have fiber/serdes
1674          * to go to.
1675          */
1676
1677         if ((hw->phy.media_type == e1000_media_type_copper) &&
1678             (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
1679                 swap_now = true;
1680         } else if (!(connsw & E1000_CONNSW_SERDESD)) {
1681                 /* copper signal takes time to appear */
1682                 if (adapter->copper_tries < 4) {
1683                         adapter->copper_tries++;
1684                         connsw |= E1000_CONNSW_AUTOSENSE_CONF;
1685                         wr32(E1000_CONNSW, connsw);
1686                         return;
1687                 } else {
1688                         adapter->copper_tries = 0;
1689                         if ((connsw & E1000_CONNSW_PHYSD) &&
1690                             (!(connsw & E1000_CONNSW_PHY_PDN))) {
1691                                 swap_now = true;
1692                                 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
1693                                 wr32(E1000_CONNSW, connsw);
1694                         }
1695                 }
1696         }
1697
1698         if (!swap_now)
1699                 return;
1700
1701         switch (hw->phy.media_type) {
1702         case e1000_media_type_copper:
1703                 netdev_info(adapter->netdev,
1704                         "MAS: changing media to fiber/serdes\n");
1705                 ctrl_ext |=
1706                         E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1707                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1708                 adapter->copper_tries = 0;
1709                 break;
1710         case e1000_media_type_internal_serdes:
1711         case e1000_media_type_fiber:
1712                 netdev_info(adapter->netdev,
1713                         "MAS: changing media to copper\n");
1714                 ctrl_ext &=
1715                         ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1716                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1717                 break;
1718         default:
1719                 /* shouldn't get here during regular operation */
1720                 netdev_err(adapter->netdev,
1721                         "AMS: Invalid media type found, returning\n");
1722                 break;
1723         }
1724         wr32(E1000_CTRL_EXT, ctrl_ext);
1725 }
1726
1727 /**
1728  *  igb_up - Open the interface and prepare it to handle traffic
1729  *  @adapter: board private structure
1730  **/
1731 int igb_up(struct igb_adapter *adapter)
1732 {
1733         struct e1000_hw *hw = &adapter->hw;
1734         int i;
1735
1736         /* hardware has been reset, we need to reload some things */
1737         igb_configure(adapter);
1738
1739         clear_bit(__IGB_DOWN, &adapter->state);
1740
1741         for (i = 0; i < adapter->num_q_vectors; i++)
1742                 napi_enable(&(adapter->q_vector[i]->napi));
1743
1744         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1745                 igb_configure_msix(adapter);
1746         else
1747                 igb_assign_vector(adapter->q_vector[0], 0);
1748
1749         /* Clear any pending interrupts. */
1750         rd32(E1000_ICR);
1751         igb_irq_enable(adapter);
1752
1753         /* notify VFs that reset has been completed */
1754         if (adapter->vfs_allocated_count) {
1755                 u32 reg_data = rd32(E1000_CTRL_EXT);
1756
1757                 reg_data |= E1000_CTRL_EXT_PFRSTD;
1758                 wr32(E1000_CTRL_EXT, reg_data);
1759         }
1760
1761         netif_tx_start_all_queues(adapter->netdev);
1762
1763         /* start the watchdog. */
1764         hw->mac.get_link_status = 1;
1765         schedule_work(&adapter->watchdog_task);
1766
1767         if ((adapter->flags & IGB_FLAG_EEE) &&
1768             (!hw->dev_spec._82575.eee_disable))
1769                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
1770
1771         return 0;
1772 }
1773
1774 void igb_down(struct igb_adapter *adapter)
1775 {
1776         struct net_device *netdev = adapter->netdev;
1777         struct e1000_hw *hw = &adapter->hw;
1778         u32 tctl, rctl;
1779         int i;
1780
1781         /* signal that we're down so the interrupt handler does not
1782          * reschedule our watchdog timer
1783          */
1784         set_bit(__IGB_DOWN, &adapter->state);
1785
1786         /* disable receives in the hardware */
1787         rctl = rd32(E1000_RCTL);
1788         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1789         /* flush and sleep below */
1790
1791         netif_carrier_off(netdev);
1792         netif_tx_stop_all_queues(netdev);
1793
1794         /* disable transmits in the hardware */
1795         tctl = rd32(E1000_TCTL);
1796         tctl &= ~E1000_TCTL_EN;
1797         wr32(E1000_TCTL, tctl);
1798         /* flush both disables and wait for them to finish */
1799         wrfl();
1800         usleep_range(10000, 11000);
1801
1802         igb_irq_disable(adapter);
1803
1804         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
1805
1806         for (i = 0; i < adapter->num_q_vectors; i++) {
1807                 if (adapter->q_vector[i]) {
1808                         napi_synchronize(&adapter->q_vector[i]->napi);
1809                         napi_disable(&adapter->q_vector[i]->napi);
1810                 }
1811         }
1812
1813         del_timer_sync(&adapter->watchdog_timer);
1814         del_timer_sync(&adapter->phy_info_timer);
1815
1816         /* record the stats before reset*/
1817         spin_lock(&adapter->stats64_lock);
1818         igb_update_stats(adapter, &adapter->stats64);
1819         spin_unlock(&adapter->stats64_lock);
1820
1821         adapter->link_speed = 0;
1822         adapter->link_duplex = 0;
1823
1824         if (!pci_channel_offline(adapter->pdev))
1825                 igb_reset(adapter);
1826
1827         /* clear VLAN promisc flag so VFTA will be updated if necessary */
1828         adapter->flags &= ~IGB_FLAG_VLAN_PROMISC;
1829
1830         igb_clean_all_tx_rings(adapter);
1831         igb_clean_all_rx_rings(adapter);
1832 #ifdef CONFIG_IGB_DCA
1833
1834         /* since we reset the hardware DCA settings were cleared */
1835         igb_setup_dca(adapter);
1836 #endif
1837 }
1838
1839 void igb_reinit_locked(struct igb_adapter *adapter)
1840 {
1841         WARN_ON(in_interrupt());
1842         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1843                 usleep_range(1000, 2000);
1844         igb_down(adapter);
1845         igb_up(adapter);
1846         clear_bit(__IGB_RESETTING, &adapter->state);
1847 }
1848
1849 /** igb_enable_mas - Media Autosense re-enable after swap
1850  *
1851  * @adapter: adapter struct
1852  **/
1853 static void igb_enable_mas(struct igb_adapter *adapter)
1854 {
1855         struct e1000_hw *hw = &adapter->hw;
1856         u32 connsw = rd32(E1000_CONNSW);
1857
1858         /* configure for SerDes media detect */
1859         if ((hw->phy.media_type == e1000_media_type_copper) &&
1860             (!(connsw & E1000_CONNSW_SERDESD))) {
1861                 connsw |= E1000_CONNSW_ENRGSRC;
1862                 connsw |= E1000_CONNSW_AUTOSENSE_EN;
1863                 wr32(E1000_CONNSW, connsw);
1864                 wrfl();
1865         }
1866 }
1867
1868 void igb_reset(struct igb_adapter *adapter)
1869 {
1870         struct pci_dev *pdev = adapter->pdev;
1871         struct e1000_hw *hw = &adapter->hw;
1872         struct e1000_mac_info *mac = &hw->mac;
1873         struct e1000_fc_info *fc = &hw->fc;
1874         u32 pba, hwm;
1875
1876         /* Repartition Pba for greater than 9k mtu
1877          * To take effect CTRL.RST is required.
1878          */
1879         switch (mac->type) {
1880         case e1000_i350:
1881         case e1000_i354:
1882         case e1000_82580:
1883                 pba = rd32(E1000_RXPBS);
1884                 pba = igb_rxpbs_adjust_82580(pba);
1885                 break;
1886         case e1000_82576:
1887                 pba = rd32(E1000_RXPBS);
1888                 pba &= E1000_RXPBS_SIZE_MASK_82576;
1889                 break;
1890         case e1000_82575:
1891         case e1000_i210:
1892         case e1000_i211:
1893         default:
1894                 pba = E1000_PBA_34K;
1895                 break;
1896         }
1897
1898         if (mac->type == e1000_82575) {
1899                 u32 min_rx_space, min_tx_space, needed_tx_space;
1900
1901                 /* write Rx PBA so that hardware can report correct Tx PBA */
1902                 wr32(E1000_PBA, pba);
1903
1904                 /* To maintain wire speed transmits, the Tx FIFO should be
1905                  * large enough to accommodate two full transmit packets,
1906                  * rounded up to the next 1KB and expressed in KB.  Likewise,
1907                  * the Rx FIFO should be large enough to accommodate at least
1908                  * one full receive packet and is similarly rounded up and
1909                  * expressed in KB.
1910                  */
1911                 min_rx_space = DIV_ROUND_UP(MAX_JUMBO_FRAME_SIZE, 1024);
1912
1913                 /* The Tx FIFO also stores 16 bytes of information about the Tx
1914                  * but don't include Ethernet FCS because hardware appends it.
1915                  * We only need to round down to the nearest 512 byte block
1916                  * count since the value we care about is 2 frames, not 1.
1917                  */
1918                 min_tx_space = adapter->max_frame_size;
1919                 min_tx_space += sizeof(union e1000_adv_tx_desc) - ETH_FCS_LEN;
1920                 min_tx_space = DIV_ROUND_UP(min_tx_space, 512);
1921
1922                 /* upper 16 bits has Tx packet buffer allocation size in KB */
1923                 needed_tx_space = min_tx_space - (rd32(E1000_PBA) >> 16);
1924
1925                 /* If current Tx allocation is less than the min Tx FIFO size,
1926                  * and the min Tx FIFO size is less than the current Rx FIFO
1927                  * allocation, take space away from current Rx allocation.
1928                  */
1929                 if (needed_tx_space < pba) {
1930                         pba -= needed_tx_space;
1931
1932                         /* if short on Rx space, Rx wins and must trump Tx
1933                          * adjustment
1934                          */
1935                         if (pba < min_rx_space)
1936                                 pba = min_rx_space;
1937                 }
1938
1939                 /* adjust PBA for jumbo frames */
1940                 wr32(E1000_PBA, pba);
1941         }
1942
1943         /* flow control settings
1944          * The high water mark must be low enough to fit one full frame
1945          * after transmitting the pause frame.  As such we must have enough
1946          * space to allow for us to complete our current transmit and then
1947          * receive the frame that is in progress from the link partner.
1948          * Set it to:
1949          * - the full Rx FIFO size minus one full Tx plus one full Rx frame
1950          */
1951         hwm = (pba << 10) - (adapter->max_frame_size + MAX_JUMBO_FRAME_SIZE);
1952
1953         fc->high_water = hwm & 0xFFFFFFF0;      /* 16-byte granularity */
1954         fc->low_water = fc->high_water - 16;
1955         fc->pause_time = 0xFFFF;
1956         fc->send_xon = 1;
1957         fc->current_mode = fc->requested_mode;
1958
1959         /* disable receive for all VFs and wait one second */
1960         if (adapter->vfs_allocated_count) {
1961                 int i;
1962
1963                 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
1964                         adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
1965
1966                 /* ping all the active vfs to let them know we are going down */
1967                 igb_ping_all_vfs(adapter);
1968
1969                 /* disable transmits and receives */
1970                 wr32(E1000_VFRE, 0);
1971                 wr32(E1000_VFTE, 0);
1972         }
1973
1974         /* Allow time for pending master requests to run */
1975         hw->mac.ops.reset_hw(hw);
1976         wr32(E1000_WUC, 0);
1977
1978         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
1979                 /* need to resetup here after media swap */
1980                 adapter->ei.get_invariants(hw);
1981                 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
1982         }
1983         if ((mac->type == e1000_82575) &&
1984             (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
1985                 igb_enable_mas(adapter);
1986         }
1987         if (hw->mac.ops.init_hw(hw))
1988                 dev_err(&pdev->dev, "Hardware Error\n");
1989
1990         /* Flow control settings reset on hardware reset, so guarantee flow
1991          * control is off when forcing speed.
1992          */
1993         if (!hw->mac.autoneg)
1994                 igb_force_mac_fc(hw);
1995
1996         igb_init_dmac(adapter, pba);
1997 #ifdef CONFIG_IGB_HWMON
1998         /* Re-initialize the thermal sensor on i350 devices. */
1999         if (!test_bit(__IGB_DOWN, &adapter->state)) {
2000                 if (mac->type == e1000_i350 && hw->bus.func == 0) {
2001                         /* If present, re-initialize the external thermal sensor
2002                          * interface.
2003                          */
2004                         if (adapter->ets)
2005                                 mac->ops.init_thermal_sensor_thresh(hw);
2006                 }
2007         }
2008 #endif
2009         /* Re-establish EEE setting */
2010         if (hw->phy.media_type == e1000_media_type_copper) {
2011                 switch (mac->type) {
2012                 case e1000_i350:
2013                 case e1000_i210:
2014                 case e1000_i211:
2015                         igb_set_eee_i350(hw, true, true);
2016                         break;
2017                 case e1000_i354:
2018                         igb_set_eee_i354(hw, true, true);
2019                         break;
2020                 default:
2021                         break;
2022                 }
2023         }
2024         if (!netif_running(adapter->netdev))
2025                 igb_power_down_link(adapter);
2026
2027         igb_update_mng_vlan(adapter);
2028
2029         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2030         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2031
2032         /* Re-enable PTP, where applicable. */
2033         if (adapter->ptp_flags & IGB_PTP_ENABLED)
2034                 igb_ptp_reset(adapter);
2035
2036         igb_get_phy_info(hw);
2037 }
2038
2039 static netdev_features_t igb_fix_features(struct net_device *netdev,
2040         netdev_features_t features)
2041 {
2042         /* Since there is no support for separate Rx/Tx vlan accel
2043          * enable/disable make sure Tx flag is always in same state as Rx.
2044          */
2045         if (features & NETIF_F_HW_VLAN_CTAG_RX)
2046                 features |= NETIF_F_HW_VLAN_CTAG_TX;
2047         else
2048                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2049
2050         return features;
2051 }
2052
2053 static int igb_set_features(struct net_device *netdev,
2054         netdev_features_t features)
2055 {
2056         netdev_features_t changed = netdev->features ^ features;
2057         struct igb_adapter *adapter = netdev_priv(netdev);
2058
2059         if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2060                 igb_vlan_mode(netdev, features);
2061
2062         if (!(changed & (NETIF_F_RXALL | NETIF_F_NTUPLE)))
2063                 return 0;
2064
2065         if (!(features & NETIF_F_NTUPLE)) {
2066                 struct hlist_node *node2;
2067                 struct igb_nfc_filter *rule;
2068
2069                 spin_lock(&adapter->nfc_lock);
2070                 hlist_for_each_entry_safe(rule, node2,
2071                                           &adapter->nfc_filter_list, nfc_node) {
2072                         igb_erase_filter(adapter, rule);
2073                         hlist_del(&rule->nfc_node);
2074                         kfree(rule);
2075                 }
2076                 spin_unlock(&adapter->nfc_lock);
2077                 adapter->nfc_filter_count = 0;
2078         }
2079
2080         netdev->features = features;
2081
2082         if (netif_running(netdev))
2083                 igb_reinit_locked(adapter);
2084         else
2085                 igb_reset(adapter);
2086
2087         return 0;
2088 }
2089
2090 static int igb_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
2091                            struct net_device *dev,
2092                            const unsigned char *addr, u16 vid,
2093                            u16 flags)
2094 {
2095         /* guarantee we can provide a unique filter for the unicast address */
2096         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
2097                 struct igb_adapter *adapter = netdev_priv(dev);
2098                 struct e1000_hw *hw = &adapter->hw;
2099                 int vfn = adapter->vfs_allocated_count;
2100                 int rar_entries = hw->mac.rar_entry_count - (vfn + 1);
2101
2102                 if (netdev_uc_count(dev) >= rar_entries)
2103                         return -ENOMEM;
2104         }
2105
2106         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
2107 }
2108
2109 #define IGB_MAX_MAC_HDR_LEN     127
2110 #define IGB_MAX_NETWORK_HDR_LEN 511
2111
2112 static netdev_features_t
2113 igb_features_check(struct sk_buff *skb, struct net_device *dev,
2114                    netdev_features_t features)
2115 {
2116         unsigned int network_hdr_len, mac_hdr_len;
2117
2118         /* Make certain the headers can be described by a context descriptor */
2119         mac_hdr_len = skb_network_header(skb) - skb->data;
2120         if (unlikely(mac_hdr_len > IGB_MAX_MAC_HDR_LEN))
2121                 return features & ~(NETIF_F_HW_CSUM |
2122                                     NETIF_F_SCTP_CRC |
2123                                     NETIF_F_HW_VLAN_CTAG_TX |
2124                                     NETIF_F_TSO |
2125                                     NETIF_F_TSO6);
2126
2127         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
2128         if (unlikely(network_hdr_len >  IGB_MAX_NETWORK_HDR_LEN))
2129                 return features & ~(NETIF_F_HW_CSUM |
2130                                     NETIF_F_SCTP_CRC |
2131                                     NETIF_F_TSO |
2132                                     NETIF_F_TSO6);
2133
2134         /* We can only support IPV4 TSO in tunnels if we can mangle the
2135          * inner IP ID field, so strip TSO if MANGLEID is not supported.
2136          */
2137         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
2138                 features &= ~NETIF_F_TSO;
2139
2140         return features;
2141 }
2142
2143 static const struct net_device_ops igb_netdev_ops = {
2144         .ndo_open               = igb_open,
2145         .ndo_stop               = igb_close,
2146         .ndo_start_xmit         = igb_xmit_frame,
2147         .ndo_get_stats64        = igb_get_stats64,
2148         .ndo_set_rx_mode        = igb_set_rx_mode,
2149         .ndo_set_mac_address    = igb_set_mac,
2150         .ndo_change_mtu         = igb_change_mtu,
2151         .ndo_do_ioctl           = igb_ioctl,
2152         .ndo_tx_timeout         = igb_tx_timeout,
2153         .ndo_validate_addr      = eth_validate_addr,
2154         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
2155         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
2156         .ndo_set_vf_mac         = igb_ndo_set_vf_mac,
2157         .ndo_set_vf_vlan        = igb_ndo_set_vf_vlan,
2158         .ndo_set_vf_rate        = igb_ndo_set_vf_bw,
2159         .ndo_set_vf_spoofchk    = igb_ndo_set_vf_spoofchk,
2160         .ndo_get_vf_config      = igb_ndo_get_vf_config,
2161 #ifdef CONFIG_NET_POLL_CONTROLLER
2162         .ndo_poll_controller    = igb_netpoll,
2163 #endif
2164         .ndo_fix_features       = igb_fix_features,
2165         .ndo_set_features       = igb_set_features,
2166         .ndo_fdb_add            = igb_ndo_fdb_add,
2167         .ndo_features_check     = igb_features_check,
2168 };
2169
2170 /**
2171  * igb_set_fw_version - Configure version string for ethtool
2172  * @adapter: adapter struct
2173  **/
2174 void igb_set_fw_version(struct igb_adapter *adapter)
2175 {
2176         struct e1000_hw *hw = &adapter->hw;
2177         struct e1000_fw_version fw;
2178
2179         igb_get_fw_version(hw, &fw);
2180
2181         switch (hw->mac.type) {
2182         case e1000_i210:
2183         case e1000_i211:
2184                 if (!(igb_get_flash_presence_i210(hw))) {
2185                         snprintf(adapter->fw_version,
2186                                  sizeof(adapter->fw_version),
2187                                  "%2d.%2d-%d",
2188                                  fw.invm_major, fw.invm_minor,
2189                                  fw.invm_img_type);
2190                         break;
2191                 }
2192                 /* fall through */
2193         default:
2194                 /* if option is rom valid, display its version too */
2195                 if (fw.or_valid) {
2196                         snprintf(adapter->fw_version,
2197                                  sizeof(adapter->fw_version),
2198                                  "%d.%d, 0x%08x, %d.%d.%d",
2199                                  fw.eep_major, fw.eep_minor, fw.etrack_id,
2200                                  fw.or_major, fw.or_build, fw.or_patch);
2201                 /* no option rom */
2202                 } else if (fw.etrack_id != 0X0000) {
2203                         snprintf(adapter->fw_version,
2204                             sizeof(adapter->fw_version),
2205                             "%d.%d, 0x%08x",
2206                             fw.eep_major, fw.eep_minor, fw.etrack_id);
2207                 } else {
2208                 snprintf(adapter->fw_version,
2209                     sizeof(adapter->fw_version),
2210                     "%d.%d.%d",
2211                     fw.eep_major, fw.eep_minor, fw.eep_build);
2212                 }
2213                 break;
2214         }
2215 }
2216
2217 /**
2218  * igb_init_mas - init Media Autosense feature if enabled in the NVM
2219  *
2220  * @adapter: adapter struct
2221  **/
2222 static void igb_init_mas(struct igb_adapter *adapter)
2223 {
2224         struct e1000_hw *hw = &adapter->hw;
2225         u16 eeprom_data;
2226
2227         hw->nvm.ops.read(hw, NVM_COMPAT, 1, &eeprom_data);
2228         switch (hw->bus.func) {
2229         case E1000_FUNC_0:
2230                 if (eeprom_data & IGB_MAS_ENABLE_0) {
2231                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2232                         netdev_info(adapter->netdev,
2233                                 "MAS: Enabling Media Autosense for port %d\n",
2234                                 hw->bus.func);
2235                 }
2236                 break;
2237         case E1000_FUNC_1:
2238                 if (eeprom_data & IGB_MAS_ENABLE_1) {
2239                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2240                         netdev_info(adapter->netdev,
2241                                 "MAS: Enabling Media Autosense for port %d\n",
2242                                 hw->bus.func);
2243                 }
2244                 break;
2245         case E1000_FUNC_2:
2246                 if (eeprom_data & IGB_MAS_ENABLE_2) {
2247                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2248                         netdev_info(adapter->netdev,
2249                                 "MAS: Enabling Media Autosense for port %d\n",
2250                                 hw->bus.func);
2251                 }
2252                 break;
2253         case E1000_FUNC_3:
2254                 if (eeprom_data & IGB_MAS_ENABLE_3) {
2255                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2256                         netdev_info(adapter->netdev,
2257                                 "MAS: Enabling Media Autosense for port %d\n",
2258                                 hw->bus.func);
2259                 }
2260                 break;
2261         default:
2262                 /* Shouldn't get here */
2263                 netdev_err(adapter->netdev,
2264                         "MAS: Invalid port configuration, returning\n");
2265                 break;
2266         }
2267 }
2268
2269 /**
2270  *  igb_init_i2c - Init I2C interface
2271  *  @adapter: pointer to adapter structure
2272  **/
2273 static s32 igb_init_i2c(struct igb_adapter *adapter)
2274 {
2275         s32 status = 0;
2276
2277         /* I2C interface supported on i350 devices */
2278         if (adapter->hw.mac.type != e1000_i350)
2279                 return 0;
2280
2281         /* Initialize the i2c bus which is controlled by the registers.
2282          * This bus will use the i2c_algo_bit structue that implements
2283          * the protocol through toggling of the 4 bits in the register.
2284          */
2285         adapter->i2c_adap.owner = THIS_MODULE;
2286         adapter->i2c_algo = igb_i2c_algo;
2287         adapter->i2c_algo.data = adapter;
2288         adapter->i2c_adap.algo_data = &adapter->i2c_algo;
2289         adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
2290         strlcpy(adapter->i2c_adap.name, "igb BB",
2291                 sizeof(adapter->i2c_adap.name));
2292         status = i2c_bit_add_bus(&adapter->i2c_adap);
2293         return status;
2294 }
2295
2296 /**
2297  *  igb_probe - Device Initialization Routine
2298  *  @pdev: PCI device information struct
2299  *  @ent: entry in igb_pci_tbl
2300  *
2301  *  Returns 0 on success, negative on failure
2302  *
2303  *  igb_probe initializes an adapter identified by a pci_dev structure.
2304  *  The OS initialization, configuring of the adapter private structure,
2305  *  and a hardware reset occur.
2306  **/
2307 static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2308 {
2309         struct net_device *netdev;
2310         struct igb_adapter *adapter;
2311         struct e1000_hw *hw;
2312         u16 eeprom_data = 0;
2313         s32 ret_val;
2314         static int global_quad_port_a; /* global quad port a indication */
2315         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
2316         int err, pci_using_dac;
2317         u8 part_str[E1000_PBANUM_LENGTH];
2318
2319         /* Catch broken hardware that put the wrong VF device ID in
2320          * the PCIe SR-IOV capability.
2321          */
2322         if (pdev->is_virtfn) {
2323                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
2324                         pci_name(pdev), pdev->vendor, pdev->device);
2325                 return -EINVAL;
2326         }
2327
2328         err = pci_enable_device_mem(pdev);
2329         if (err)
2330                 return err;
2331
2332         pci_using_dac = 0;
2333         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
2334         if (!err) {
2335                 pci_using_dac = 1;
2336         } else {
2337                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
2338                 if (err) {
2339                         dev_err(&pdev->dev,
2340                                 "No usable DMA configuration, aborting\n");
2341                         goto err_dma;
2342                 }
2343         }
2344
2345         err = pci_request_mem_regions(pdev, igb_driver_name);
2346         if (err)
2347                 goto err_pci_reg;
2348
2349         pci_enable_pcie_error_reporting(pdev);
2350
2351         pci_set_master(pdev);
2352         pci_save_state(pdev);
2353
2354         err = -ENOMEM;
2355         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
2356                                    IGB_MAX_TX_QUEUES);
2357         if (!netdev)
2358                 goto err_alloc_etherdev;
2359
2360         SET_NETDEV_DEV(netdev, &pdev->dev);
2361
2362         pci_set_drvdata(pdev, netdev);
2363         adapter = netdev_priv(netdev);
2364         adapter->netdev = netdev;
2365         adapter->pdev = pdev;
2366         hw = &adapter->hw;
2367         hw->back = adapter;
2368         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
2369
2370         err = -EIO;
2371         adapter->io_addr = pci_iomap(pdev, 0, 0);
2372         if (!adapter->io_addr)
2373                 goto err_ioremap;
2374         /* hw->hw_addr can be altered, we'll use adapter->io_addr for unmap */
2375         hw->hw_addr = adapter->io_addr;
2376
2377         netdev->netdev_ops = &igb_netdev_ops;
2378         igb_set_ethtool_ops(netdev);
2379         netdev->watchdog_timeo = 5 * HZ;
2380
2381         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
2382
2383         netdev->mem_start = pci_resource_start(pdev, 0);
2384         netdev->mem_end = pci_resource_end(pdev, 0);
2385
2386         /* PCI config space info */
2387         hw->vendor_id = pdev->vendor;
2388         hw->device_id = pdev->device;
2389         hw->revision_id = pdev->revision;
2390         hw->subsystem_vendor_id = pdev->subsystem_vendor;
2391         hw->subsystem_device_id = pdev->subsystem_device;
2392
2393         /* Copy the default MAC, PHY and NVM function pointers */
2394         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
2395         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
2396         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
2397         /* Initialize skew-specific constants */
2398         err = ei->get_invariants(hw);
2399         if (err)
2400                 goto err_sw_init;
2401
2402         /* setup the private structure */
2403         err = igb_sw_init(adapter);
2404         if (err)
2405                 goto err_sw_init;
2406
2407         igb_get_bus_info_pcie(hw);
2408
2409         hw->phy.autoneg_wait_to_complete = false;
2410
2411         /* Copper options */
2412         if (hw->phy.media_type == e1000_media_type_copper) {
2413                 hw->phy.mdix = AUTO_ALL_MODES;
2414                 hw->phy.disable_polarity_correction = false;
2415                 hw->phy.ms_type = e1000_ms_hw_default;
2416         }
2417
2418         if (igb_check_reset_block(hw))
2419                 dev_info(&pdev->dev,
2420                         "PHY reset is blocked due to SOL/IDER session.\n");
2421
2422         /* features is initialized to 0 in allocation, it might have bits
2423          * set by igb_sw_init so we should use an or instead of an
2424          * assignment.
2425          */
2426         netdev->features |= NETIF_F_SG |
2427                             NETIF_F_TSO |
2428                             NETIF_F_TSO6 |
2429                             NETIF_F_RXHASH |
2430                             NETIF_F_RXCSUM |
2431                             NETIF_F_HW_CSUM;
2432
2433         if (hw->mac.type >= e1000_82576)
2434                 netdev->features |= NETIF_F_SCTP_CRC;
2435
2436 #define IGB_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
2437                                   NETIF_F_GSO_GRE_CSUM | \
2438                                   NETIF_F_GSO_IPXIP4 | \
2439                                   NETIF_F_GSO_IPXIP6 | \
2440                                   NETIF_F_GSO_UDP_TUNNEL | \
2441                                   NETIF_F_GSO_UDP_TUNNEL_CSUM)
2442
2443         netdev->gso_partial_features = IGB_GSO_PARTIAL_FEATURES;
2444         netdev->features |= NETIF_F_GSO_PARTIAL | IGB_GSO_PARTIAL_FEATURES;
2445
2446         /* copy netdev features into list of user selectable features */
2447         netdev->hw_features |= netdev->features |
2448                                NETIF_F_HW_VLAN_CTAG_RX |
2449                                NETIF_F_HW_VLAN_CTAG_TX |
2450                                NETIF_F_RXALL;
2451
2452         if (hw->mac.type >= e1000_i350)
2453                 netdev->hw_features |= NETIF_F_NTUPLE;
2454
2455         if (pci_using_dac)
2456                 netdev->features |= NETIF_F_HIGHDMA;
2457
2458         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
2459         netdev->mpls_features |= NETIF_F_HW_CSUM;
2460         netdev->hw_enc_features |= netdev->vlan_features;
2461
2462         /* set this bit last since it cannot be part of vlan_features */
2463         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
2464                             NETIF_F_HW_VLAN_CTAG_RX |
2465                             NETIF_F_HW_VLAN_CTAG_TX;
2466
2467         netdev->priv_flags |= IFF_SUPP_NOFCS;
2468
2469         netdev->priv_flags |= IFF_UNICAST_FLT;
2470
2471         adapter->en_mng_pt = igb_enable_mng_pass_thru(hw);
2472
2473         /* before reading the NVM, reset the controller to put the device in a
2474          * known good starting state
2475          */
2476         hw->mac.ops.reset_hw(hw);
2477
2478         /* make sure the NVM is good , i211/i210 parts can have special NVM
2479          * that doesn't contain a checksum
2480          */
2481         switch (hw->mac.type) {
2482         case e1000_i210:
2483         case e1000_i211:
2484                 if (igb_get_flash_presence_i210(hw)) {
2485                         if (hw->nvm.ops.validate(hw) < 0) {
2486                                 dev_err(&pdev->dev,
2487                                         "The NVM Checksum Is Not Valid\n");
2488                                 err = -EIO;
2489                                 goto err_eeprom;
2490                         }
2491                 }
2492                 break;
2493         default:
2494                 if (hw->nvm.ops.validate(hw) < 0) {
2495                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
2496                         err = -EIO;
2497                         goto err_eeprom;
2498                 }
2499                 break;
2500         }
2501
2502         if (eth_platform_get_mac_address(&pdev->dev, hw->mac.addr)) {
2503                 /* copy the MAC address out of the NVM */
2504                 if (hw->mac.ops.read_mac_addr(hw))
2505                         dev_err(&pdev->dev, "NVM Read Error\n");
2506         }
2507
2508         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2509
2510         if (!is_valid_ether_addr(netdev->dev_addr)) {
2511                 dev_err(&pdev->dev, "Invalid MAC Address\n");
2512                 err = -EIO;
2513                 goto err_eeprom;
2514         }
2515
2516         /* get firmware version for ethtool -i */
2517         igb_set_fw_version(adapter);
2518
2519         /* configure RXPBSIZE and TXPBSIZE */
2520         if (hw->mac.type == e1000_i210) {
2521                 wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT);
2522                 wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT);
2523         }
2524
2525         setup_timer(&adapter->watchdog_timer, igb_watchdog,
2526                     (unsigned long) adapter);
2527         setup_timer(&adapter->phy_info_timer, igb_update_phy_info,
2528                     (unsigned long) adapter);
2529
2530         INIT_WORK(&adapter->reset_task, igb_reset_task);
2531         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2532
2533         /* Initialize link properties that are user-changeable */
2534         adapter->fc_autoneg = true;
2535         hw->mac.autoneg = true;
2536         hw->phy.autoneg_advertised = 0x2f;
2537
2538         hw->fc.requested_mode = e1000_fc_default;
2539         hw->fc.current_mode = e1000_fc_default;
2540
2541         igb_validate_mdi_setting(hw);
2542
2543         /* By default, support wake on port A */
2544         if (hw->bus.func == 0)
2545                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2546
2547         /* Check the NVM for wake support on non-port A ports */
2548         if (hw->mac.type >= e1000_82580)
2549                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2550                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2551                                  &eeprom_data);
2552         else if (hw->bus.func == 1)
2553                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2554
2555         if (eeprom_data & IGB_EEPROM_APME)
2556                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2557
2558         /* now that we have the eeprom settings, apply the special cases where
2559          * the eeprom may be wrong or the board simply won't support wake on
2560          * lan on a particular port
2561          */
2562         switch (pdev->device) {
2563         case E1000_DEV_ID_82575GB_QUAD_COPPER:
2564                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2565                 break;
2566         case E1000_DEV_ID_82575EB_FIBER_SERDES:
2567         case E1000_DEV_ID_82576_FIBER:
2568         case E1000_DEV_ID_82576_SERDES:
2569                 /* Wake events only supported on port A for dual fiber
2570                  * regardless of eeprom setting
2571                  */
2572                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
2573                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2574                 break;
2575         case E1000_DEV_ID_82576_QUAD_COPPER:
2576         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2577                 /* if quad port adapter, disable WoL on all but port A */
2578                 if (global_quad_port_a != 0)
2579                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2580                 else
2581                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2582                 /* Reset for multiple quad port adapters */
2583                 if (++global_quad_port_a == 4)
2584                         global_quad_port_a = 0;
2585                 break;
2586         default:
2587                 /* If the device can't wake, don't set software support */
2588                 if (!device_can_wakeup(&adapter->pdev->dev))
2589                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2590         }
2591
2592         /* initialize the wol settings based on the eeprom settings */
2593         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
2594                 adapter->wol |= E1000_WUFC_MAG;
2595
2596         /* Some vendors want WoL disabled by default, but still supported */
2597         if ((hw->mac.type == e1000_i350) &&
2598             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
2599                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2600                 adapter->wol = 0;
2601         }
2602
2603         /* Some vendors want the ability to Use the EEPROM setting as
2604          * enable/disable only, and not for capability
2605          */
2606         if (((hw->mac.type == e1000_i350) ||
2607              (hw->mac.type == e1000_i354)) &&
2608             (pdev->subsystem_vendor == PCI_VENDOR_ID_DELL)) {
2609                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2610                 adapter->wol = 0;
2611         }
2612         if (hw->mac.type == e1000_i350) {
2613                 if (((pdev->subsystem_device == 0x5001) ||
2614                      (pdev->subsystem_device == 0x5002)) &&
2615                                 (hw->bus.func == 0)) {
2616                         adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2617                         adapter->wol = 0;
2618                 }
2619                 if (pdev->subsystem_device == 0x1F52)
2620                         adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2621         }
2622
2623         device_set_wakeup_enable(&adapter->pdev->dev,
2624                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
2625
2626         /* reset the hardware with the new settings */
2627         igb_reset(adapter);
2628
2629         /* Init the I2C interface */
2630         err = igb_init_i2c(adapter);
2631         if (err) {
2632                 dev_err(&pdev->dev, "failed to init i2c interface\n");
2633                 goto err_eeprom;
2634         }
2635
2636         /* let the f/w know that the h/w is now under the control of the
2637          * driver.
2638          */
2639         igb_get_hw_control(adapter);
2640
2641         strcpy(netdev->name, "eth%d");
2642         err = register_netdev(netdev);
2643         if (err)
2644                 goto err_register;
2645
2646         /* carrier off reporting is important to ethtool even BEFORE open */
2647         netif_carrier_off(netdev);
2648
2649 #ifdef CONFIG_IGB_DCA
2650         if (dca_add_requester(&pdev->dev) == 0) {
2651                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
2652                 dev_info(&pdev->dev, "DCA enabled\n");
2653                 igb_setup_dca(adapter);
2654         }
2655
2656 #endif
2657 #ifdef CONFIG_IGB_HWMON
2658         /* Initialize the thermal sensor on i350 devices. */
2659         if (hw->mac.type == e1000_i350 && hw->bus.func == 0) {
2660                 u16 ets_word;
2661
2662                 /* Read the NVM to determine if this i350 device supports an
2663                  * external thermal sensor.
2664                  */
2665                 hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_word);
2666                 if (ets_word != 0x0000 && ets_word != 0xFFFF)
2667                         adapter->ets = true;
2668                 else
2669                         adapter->ets = false;
2670                 if (igb_sysfs_init(adapter))
2671                         dev_err(&pdev->dev,
2672                                 "failed to allocate sysfs resources\n");
2673         } else {
2674                 adapter->ets = false;
2675         }
2676 #endif
2677         /* Check if Media Autosense is enabled */
2678         adapter->ei = *ei;
2679         if (hw->dev_spec._82575.mas_capable)
2680                 igb_init_mas(adapter);
2681
2682         /* do hw tstamp init after resetting */
2683         igb_ptp_init(adapter);
2684
2685         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
2686         /* print bus type/speed/width info, not applicable to i354 */
2687         if (hw->mac.type != e1000_i354) {
2688                 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
2689                          netdev->name,
2690                          ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
2691                           (hw->bus.speed == e1000_bus_speed_5000) ? "5.0Gb/s" :
2692                            "unknown"),
2693                          ((hw->bus.width == e1000_bus_width_pcie_x4) ?
2694                           "Width x4" :
2695                           (hw->bus.width == e1000_bus_width_pcie_x2) ?
2696                           "Width x2" :
2697                           (hw->bus.width == e1000_bus_width_pcie_x1) ?
2698                           "Width x1" : "unknown"), netdev->dev_addr);
2699         }
2700
2701         if ((hw->mac.type >= e1000_i210 ||
2702              igb_get_flash_presence_i210(hw))) {
2703                 ret_val = igb_read_part_string(hw, part_str,
2704                                                E1000_PBANUM_LENGTH);
2705         } else {
2706                 ret_val = -E1000_ERR_INVM_VALUE_NOT_FOUND;
2707         }
2708
2709         if (ret_val)
2710                 strcpy(part_str, "Unknown");
2711         dev_info(&pdev->dev, "%s: PBA No: %s\n", netdev->name, part_str);
2712         dev_info(&pdev->dev,
2713                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
2714                 (adapter->flags & IGB_FLAG_HAS_MSIX) ? "MSI-X" :
2715                 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
2716                 adapter->num_rx_queues, adapter->num_tx_queues);
2717         if (hw->phy.media_type == e1000_media_type_copper) {
2718                 switch (hw->mac.type) {
2719                 case e1000_i350:
2720                 case e1000_i210:
2721                 case e1000_i211:
2722                         /* Enable EEE for internal copper PHY devices */
2723                         err = igb_set_eee_i350(hw, true, true);
2724                         if ((!err) &&
2725                             (!hw->dev_spec._82575.eee_disable)) {
2726                                 adapter->eee_advert =
2727                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
2728                                 adapter->flags |= IGB_FLAG_EEE;
2729                         }
2730                         break;
2731                 case e1000_i354:
2732                         if ((rd32(E1000_CTRL_EXT) &
2733                             E1000_CTRL_EXT_LINK_MODE_SGMII)) {
2734                                 err = igb_set_eee_i354(hw, true, true);
2735                                 if ((!err) &&
2736                                         (!hw->dev_spec._82575.eee_disable)) {
2737                                         adapter->eee_advert =
2738                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
2739                                         adapter->flags |= IGB_FLAG_EEE;
2740                                 }
2741                         }
2742                         break;
2743                 default:
2744                         break;
2745                 }
2746         }
2747         pm_runtime_put_noidle(&pdev->dev);
2748         return 0;
2749
2750 err_register:
2751         igb_release_hw_control(adapter);
2752         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
2753 err_eeprom:
2754         if (!igb_check_reset_block(hw))
2755                 igb_reset_phy(hw);
2756
2757         if (hw->flash_address)
2758                 iounmap(hw->flash_address);
2759 err_sw_init:
2760         kfree(adapter->shadow_vfta);
2761         igb_clear_interrupt_scheme(adapter);
2762 #ifdef CONFIG_PCI_IOV
2763         igb_disable_sriov(pdev);
2764 #endif
2765         pci_iounmap(pdev, adapter->io_addr);
2766 err_ioremap:
2767         free_netdev(netdev);
2768 err_alloc_etherdev:
2769         pci_release_mem_regions(pdev);
2770 err_pci_reg:
2771 err_dma:
2772         pci_disable_device(pdev);
2773         return err;
2774 }
2775
2776 #ifdef CONFIG_PCI_IOV
2777 static int igb_disable_sriov(struct pci_dev *pdev)
2778 {
2779         struct net_device *netdev = pci_get_drvdata(pdev);
2780         struct igb_adapter *adapter = netdev_priv(netdev);
2781         struct e1000_hw *hw = &adapter->hw;
2782
2783         /* reclaim resources allocated to VFs */
2784         if (adapter->vf_data) {
2785                 /* disable iov and allow time for transactions to clear */
2786                 if (pci_vfs_assigned(pdev)) {
2787                         dev_warn(&pdev->dev,
2788                                  "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
2789                         return -EPERM;
2790                 } else {
2791                         pci_disable_sriov(pdev);
2792                         msleep(500);
2793                 }
2794
2795                 kfree(adapter->vf_data);
2796                 adapter->vf_data = NULL;
2797                 adapter->vfs_allocated_count = 0;
2798                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
2799                 wrfl();
2800                 msleep(100);
2801                 dev_info(&pdev->dev, "IOV Disabled\n");
2802
2803                 /* Re-enable DMA Coalescing flag since IOV is turned off */
2804                 adapter->flags |= IGB_FLAG_DMAC;
2805         }
2806
2807         return 0;
2808 }
2809
2810 static int igb_enable_sriov(struct pci_dev *pdev, int num_vfs)
2811 {
2812         struct net_device *netdev = pci_get_drvdata(pdev);
2813         struct igb_adapter *adapter = netdev_priv(netdev);
2814         int old_vfs = pci_num_vf(pdev);
2815         int err = 0;
2816         int i;
2817
2818         if (!(adapter->flags & IGB_FLAG_HAS_MSIX) || num_vfs > 7) {
2819                 err = -EPERM;
2820                 goto out;
2821         }
2822         if (!num_vfs)
2823                 goto out;
2824
2825         if (old_vfs) {
2826                 dev_info(&pdev->dev, "%d pre-allocated VFs found - override max_vfs setting of %d\n",
2827                          old_vfs, max_vfs);
2828                 adapter->vfs_allocated_count = old_vfs;
2829         } else
2830                 adapter->vfs_allocated_count = num_vfs;
2831
2832         adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
2833                                 sizeof(struct vf_data_storage), GFP_KERNEL);
2834
2835         /* if allocation failed then we do not support SR-IOV */
2836         if (!adapter->vf_data) {
2837                 adapter->vfs_allocated_count = 0;
2838                 dev_err(&pdev->dev,
2839                         "Unable to allocate memory for VF Data Storage\n");
2840                 err = -ENOMEM;
2841                 goto out;
2842         }
2843
2844         /* only call pci_enable_sriov() if no VFs are allocated already */
2845         if (!old_vfs) {
2846                 err = pci_enable_sriov(pdev, adapter->vfs_allocated_count);
2847                 if (err)
2848                         goto err_out;
2849         }
2850         dev_info(&pdev->dev, "%d VFs allocated\n",
2851                  adapter->vfs_allocated_count);
2852         for (i = 0; i < adapter->vfs_allocated_count; i++)
2853                 igb_vf_configure(adapter, i);
2854
2855         /* DMA Coalescing is not supported in IOV mode. */
2856         adapter->flags &= ~IGB_FLAG_DMAC;
2857         goto out;
2858
2859 err_out:
2860         kfree(adapter->vf_data);
2861         adapter->vf_data = NULL;
2862         adapter->vfs_allocated_count = 0;
2863 out:
2864         return err;
2865 }
2866
2867 #endif
2868 /**
2869  *  igb_remove_i2c - Cleanup  I2C interface
2870  *  @adapter: pointer to adapter structure
2871  **/
2872 static void igb_remove_i2c(struct igb_adapter *adapter)
2873 {
2874         /* free the adapter bus structure */
2875         i2c_del_adapter(&adapter->i2c_adap);
2876 }
2877
2878 /**
2879  *  igb_remove - Device Removal Routine
2880  *  @pdev: PCI device information struct
2881  *
2882  *  igb_remove is called by the PCI subsystem to alert the driver
2883  *  that it should release a PCI device.  The could be caused by a
2884  *  Hot-Plug event, or because the driver is going to be removed from
2885  *  memory.
2886  **/
2887 static void igb_remove(struct pci_dev *pdev)
2888 {
2889         struct net_device *netdev = pci_get_drvdata(pdev);
2890         struct igb_adapter *adapter = netdev_priv(netdev);
2891         struct e1000_hw *hw = &adapter->hw;
2892
2893         pm_runtime_get_noresume(&pdev->dev);
2894 #ifdef CONFIG_IGB_HWMON
2895         igb_sysfs_exit(adapter);
2896 #endif
2897         igb_remove_i2c(adapter);
2898         igb_ptp_stop(adapter);
2899         /* The watchdog timer may be rescheduled, so explicitly
2900          * disable watchdog from being rescheduled.
2901          */
2902         set_bit(__IGB_DOWN, &adapter->state);
2903         del_timer_sync(&adapter->watchdog_timer);
2904         del_timer_sync(&adapter->phy_info_timer);
2905
2906         cancel_work_sync(&adapter->reset_task);
2907         cancel_work_sync(&adapter->watchdog_task);
2908
2909 #ifdef CONFIG_IGB_DCA
2910         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
2911                 dev_info(&pdev->dev, "DCA disabled\n");
2912                 dca_remove_requester(&pdev->dev);
2913                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
2914                 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
2915         }
2916 #endif
2917
2918         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
2919          * would have already happened in close and is redundant.
2920          */
2921         igb_release_hw_control(adapter);
2922
2923 #ifdef CONFIG_PCI_IOV
2924         igb_disable_sriov(pdev);
2925 #endif
2926
2927         unregister_netdev(netdev);
2928
2929         igb_clear_interrupt_scheme(adapter);
2930
2931         pci_iounmap(pdev, adapter->io_addr);
2932         if (hw->flash_address)
2933                 iounmap(hw->flash_address);
2934         pci_release_mem_regions(pdev);
2935
2936         kfree(adapter->shadow_vfta);
2937         free_netdev(netdev);
2938
2939         pci_disable_pcie_error_reporting(pdev);
2940
2941         pci_disable_device(pdev);
2942 }
2943
2944 /**
2945  *  igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
2946  *  @adapter: board private structure to initialize
2947  *
2948  *  This function initializes the vf specific data storage and then attempts to
2949  *  allocate the VFs.  The reason for ordering it this way is because it is much
2950  *  mor expensive time wise to disable SR-IOV than it is to allocate and free
2951  *  the memory for the VFs.
2952  **/
2953 static void igb_probe_vfs(struct igb_adapter *adapter)
2954 {
2955 #ifdef CONFIG_PCI_IOV
2956         struct pci_dev *pdev = adapter->pdev;
2957         struct e1000_hw *hw = &adapter->hw;
2958
2959         /* Virtualization features not supported on i210 family. */
2960         if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211))
2961                 return;
2962
2963         /* Of the below we really only want the effect of getting
2964          * IGB_FLAG_HAS_MSIX set (if available), without which
2965          * igb_enable_sriov() has no effect.
2966          */
2967         igb_set_interrupt_capability(adapter, true);
2968         igb_reset_interrupt_capability(adapter);
2969
2970         pci_sriov_set_totalvfs(pdev, 7);
2971         igb_enable_sriov(pdev, max_vfs);
2972
2973 #endif /* CONFIG_PCI_IOV */
2974 }
2975
2976 static void igb_init_queue_configuration(struct igb_adapter *adapter)
2977 {
2978         struct e1000_hw *hw = &adapter->hw;
2979         u32 max_rss_queues;
2980
2981         /* Determine the maximum number of RSS queues supported. */
2982         switch (hw->mac.type) {
2983         case e1000_i211:
2984                 max_rss_queues = IGB_MAX_RX_QUEUES_I211;
2985                 break;
2986         case e1000_82575:
2987         case e1000_i210:
2988                 max_rss_queues = IGB_MAX_RX_QUEUES_82575;
2989                 break;
2990         case e1000_i350:
2991                 /* I350 cannot do RSS and SR-IOV at the same time */
2992                 if (!!adapter->vfs_allocated_count) {
2993                         max_rss_queues = 1;
2994                         break;
2995                 }
2996                 /* fall through */
2997         case e1000_82576:
2998                 if (!!adapter->vfs_allocated_count) {
2999                         max_rss_queues = 2;
3000                         break;
3001                 }
3002                 /* fall through */
3003         case e1000_82580:
3004         case e1000_i354:
3005         default:
3006                 max_rss_queues = IGB_MAX_RX_QUEUES;
3007                 break;
3008         }
3009
3010         adapter->rss_queues = min_t(u32, max_rss_queues, num_online_cpus());
3011
3012         igb_set_flag_queue_pairs(adapter, max_rss_queues);
3013 }
3014
3015 void igb_set_flag_queue_pairs(struct igb_adapter *adapter,
3016                               const u32 max_rss_queues)
3017 {
3018         struct e1000_hw *hw = &adapter->hw;
3019
3020         /* Determine if we need to pair queues. */
3021         switch (hw->mac.type) {
3022         case e1000_82575:
3023         case e1000_i211:
3024                 /* Device supports enough interrupts without queue pairing. */
3025                 break;
3026         case e1000_82576:
3027         case e1000_82580:
3028         case e1000_i350:
3029         case e1000_i354:
3030         case e1000_i210:
3031         default:
3032                 /* If rss_queues > half of max_rss_queues, pair the queues in
3033                  * order to conserve interrupts due to limited supply.
3034                  */
3035                 if (adapter->rss_queues > (max_rss_queues / 2))
3036                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
3037                 else
3038                         adapter->flags &= ~IGB_FLAG_QUEUE_PAIRS;
3039                 break;
3040         }
3041 }
3042
3043 /**
3044  *  igb_sw_init - Initialize general software structures (struct igb_adapter)
3045  *  @adapter: board private structure to initialize
3046  *
3047  *  igb_sw_init initializes the Adapter private data structure.
3048  *  Fields are initialized based on PCI device information and
3049  *  OS network device settings (MTU size).
3050  **/
3051 static int igb_sw_init(struct igb_adapter *adapter)
3052 {
3053         struct e1000_hw *hw = &adapter->hw;
3054         struct net_device *netdev = adapter->netdev;
3055         struct pci_dev *pdev = adapter->pdev;
3056
3057         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
3058
3059         /* set default ring sizes */
3060         adapter->tx_ring_count = IGB_DEFAULT_TXD;
3061         adapter->rx_ring_count = IGB_DEFAULT_RXD;
3062
3063         /* set default ITR values */
3064         adapter->rx_itr_setting = IGB_DEFAULT_ITR;
3065         adapter->tx_itr_setting = IGB_DEFAULT_ITR;
3066
3067         /* set default work limits */
3068         adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
3069
3070         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
3071                                   VLAN_HLEN;
3072         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
3073
3074         spin_lock_init(&adapter->nfc_lock);
3075         spin_lock_init(&adapter->stats64_lock);
3076 #ifdef CONFIG_PCI_IOV
3077         switch (hw->mac.type) {
3078         case e1000_82576:
3079         case e1000_i350:
3080                 if (max_vfs > 7) {
3081                         dev_warn(&pdev->dev,
3082                                  "Maximum of 7 VFs per PF, using max\n");
3083                         max_vfs = adapter->vfs_allocated_count = 7;
3084                 } else
3085                         adapter->vfs_allocated_count = max_vfs;
3086                 if (adapter->vfs_allocated_count)
3087                         dev_warn(&pdev->dev,
3088                                  "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
3089                 break;
3090         default:
3091                 break;
3092         }
3093 #endif /* CONFIG_PCI_IOV */
3094
3095         /* Assume MSI-X interrupts, will be checked during IRQ allocation */
3096         adapter->flags |= IGB_FLAG_HAS_MSIX;
3097
3098         igb_probe_vfs(adapter);
3099
3100         igb_init_queue_configuration(adapter);
3101
3102         /* Setup and initialize a copy of the hw vlan table array */
3103         adapter->shadow_vfta = kcalloc(E1000_VLAN_FILTER_TBL_SIZE, sizeof(u32),
3104                                        GFP_ATOMIC);
3105
3106         /* This call may decrease the number of queues */
3107         if (igb_init_interrupt_scheme(adapter, true)) {
3108                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
3109                 return -ENOMEM;
3110         }
3111
3112         /* Explicitly disable IRQ since the NIC can be in any state. */
3113         igb_irq_disable(adapter);
3114
3115         if (hw->mac.type >= e1000_i350)
3116                 adapter->flags &= ~IGB_FLAG_DMAC;
3117
3118         set_bit(__IGB_DOWN, &adapter->state);
3119         return 0;
3120 }
3121
3122 /**
3123  *  igb_open - Called when a network interface is made active
3124  *  @netdev: network interface device structure
3125  *
3126  *  Returns 0 on success, negative value on failure
3127  *
3128  *  The open entry point is called when a network interface is made
3129  *  active by the system (IFF_UP).  At this point all resources needed
3130  *  for transmit and receive operations are allocated, the interrupt
3131  *  handler is registered with the OS, the watchdog timer is started,
3132  *  and the stack is notified that the interface is ready.
3133  **/
3134 static int __igb_open(struct net_device *netdev, bool resuming)
3135 {
3136         struct igb_adapter *adapter = netdev_priv(netdev);
3137         struct e1000_hw *hw = &adapter->hw;
3138         struct pci_dev *pdev = adapter->pdev;
3139         int err;
3140         int i;
3141
3142         /* disallow open during test */
3143         if (test_bit(__IGB_TESTING, &adapter->state)) {
3144                 WARN_ON(resuming);
3145                 return -EBUSY;
3146         }
3147
3148         if (!resuming)
3149                 pm_runtime_get_sync(&pdev->dev);
3150
3151         netif_carrier_off(netdev);
3152
3153         /* allocate transmit descriptors */
3154         err = igb_setup_all_tx_resources(adapter);
3155         if (err)
3156                 goto err_setup_tx;
3157
3158         /* allocate receive descriptors */
3159         err = igb_setup_all_rx_resources(adapter);
3160         if (err)
3161                 goto err_setup_rx;
3162
3163         igb_power_up_link(adapter);
3164
3165         /* before we allocate an interrupt, we must be ready to handle it.
3166          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3167          * as soon as we call pci_request_irq, so we have to setup our
3168          * clean_rx handler before we do so.
3169          */
3170         igb_configure(adapter);
3171
3172         err = igb_request_irq(adapter);
3173         if (err)
3174                 goto err_req_irq;
3175
3176         /* Notify the stack of the actual queue counts. */
3177         err = netif_set_real_num_tx_queues(adapter->netdev,
3178                                            adapter->num_tx_queues);
3179         if (err)
3180                 goto err_set_queues;
3181
3182         err = netif_set_real_num_rx_queues(adapter->netdev,
3183                                            adapter->num_rx_queues);
3184         if (err)
3185                 goto err_set_queues;
3186
3187         /* From here on the code is the same as igb_up() */
3188         clear_bit(__IGB_DOWN, &adapter->state);
3189
3190         for (i = 0; i < adapter->num_q_vectors; i++)
3191                 napi_enable(&(adapter->q_vector[i]->napi));
3192
3193         /* Clear any pending interrupts. */
3194         rd32(E1000_ICR);
3195
3196         igb_irq_enable(adapter);
3197
3198         /* notify VFs that reset has been completed */
3199         if (adapter->vfs_allocated_count) {
3200                 u32 reg_data = rd32(E1000_CTRL_EXT);
3201
3202                 reg_data |= E1000_CTRL_EXT_PFRSTD;
3203                 wr32(E1000_CTRL_EXT, reg_data);
3204         }
3205
3206         netif_tx_start_all_queues(netdev);
3207
3208         if (!resuming)
3209                 pm_runtime_put(&pdev->dev);
3210
3211         /* start the watchdog. */
3212         hw->mac.get_link_status = 1;
3213         schedule_work(&adapter->watchdog_task);
3214
3215         return 0;
3216
3217 err_set_queues:
3218         igb_free_irq(adapter);
3219 err_req_irq:
3220         igb_release_hw_control(adapter);
3221         igb_power_down_link(adapter);
3222         igb_free_all_rx_resources(adapter);
3223 err_setup_rx:
3224         igb_free_all_tx_resources(adapter);
3225 err_setup_tx:
3226         igb_reset(adapter);
3227         if (!resuming)
3228                 pm_runtime_put(&pdev->dev);
3229
3230         return err;
3231 }
3232
3233 int igb_open(struct net_device *netdev)
3234 {
3235         return __igb_open(netdev, false);
3236 }
3237
3238 /**
3239  *  igb_close - Disables a network interface
3240  *  @netdev: network interface device structure
3241  *
3242  *  Returns 0, this is not allowed to fail
3243  *
3244  *  The close entry point is called when an interface is de-activated
3245  *  by the OS.  The hardware is still under the driver's control, but
3246  *  needs to be disabled.  A global MAC reset is issued to stop the
3247  *  hardware, and all transmit and receive resources are freed.
3248  **/
3249 static int __igb_close(struct net_device *netdev, bool suspending)
3250 {
3251         struct igb_adapter *adapter = netdev_priv(netdev);
3252         struct pci_dev *pdev = adapter->pdev;
3253
3254         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
3255
3256         if (!suspending)
3257                 pm_runtime_get_sync(&pdev->dev);
3258
3259         igb_down(adapter);
3260         igb_free_irq(adapter);
3261
3262         igb_nfc_filter_exit(adapter);
3263
3264         igb_free_all_tx_resources(adapter);
3265         igb_free_all_rx_resources(adapter);
3266
3267         if (!suspending)
3268                 pm_runtime_put_sync(&pdev->dev);
3269         return 0;
3270 }
3271
3272 int igb_close(struct net_device *netdev)
3273 {
3274         return __igb_close(netdev, false);
3275 }
3276
3277 /**
3278  *  igb_setup_tx_resources - allocate Tx resources (Descriptors)
3279  *  @tx_ring: tx descriptor ring (for a specific queue) to setup
3280  *
3281  *  Return 0 on success, negative on failure
3282  **/
3283 int igb_setup_tx_resources(struct igb_ring *tx_ring)
3284 {
3285         struct device *dev = tx_ring->dev;
3286         int size;
3287
3288         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3289
3290         tx_ring->tx_buffer_info = vzalloc(size);
3291         if (!tx_ring->tx_buffer_info)
3292                 goto err;
3293
3294         /* round up to nearest 4K */
3295         tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
3296         tx_ring->size = ALIGN(tx_ring->size, 4096);
3297
3298         tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
3299                                            &tx_ring->dma, GFP_KERNEL);
3300         if (!tx_ring->desc)
3301                 goto err;
3302
3303         tx_ring->next_to_use = 0;
3304         tx_ring->next_to_clean = 0;
3305
3306         return 0;
3307
3308 err:
3309         vfree(tx_ring->tx_buffer_info);
3310         tx_ring->tx_buffer_info = NULL;
3311         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
3312         return -ENOMEM;
3313 }
3314
3315 /**
3316  *  igb_setup_all_tx_resources - wrapper to allocate Tx resources
3317  *                               (Descriptors) for all queues
3318  *  @adapter: board private structure
3319  *
3320  *  Return 0 on success, negative on failure
3321  **/
3322 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
3323 {
3324         struct pci_dev *pdev = adapter->pdev;
3325         int i, err = 0;
3326
3327         for (i = 0; i < adapter->num_tx_queues; i++) {
3328                 err = igb_setup_tx_resources(adapter->tx_ring[i]);
3329                 if (err) {
3330                         dev_err(&pdev->dev,
3331                                 "Allocation for Tx Queue %u failed\n", i);
3332                         for (i--; i >= 0; i--)
3333                                 igb_free_tx_resources(adapter->tx_ring[i]);
3334                         break;
3335                 }
3336         }
3337
3338         return err;
3339 }
3340
3341 /**
3342  *  igb_setup_tctl - configure the transmit control registers
3343  *  @adapter: Board private structure
3344  **/
3345 void igb_setup_tctl(struct igb_adapter *adapter)
3346 {
3347         struct e1000_hw *hw = &adapter->hw;
3348         u32 tctl;
3349
3350         /* disable queue 0 which is enabled by default on 82575 and 82576 */
3351         wr32(E1000_TXDCTL(0), 0);
3352
3353         /* Program the Transmit Control Register */
3354         tctl = rd32(E1000_TCTL);
3355         tctl &= ~E1000_TCTL_CT;
3356         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
3357                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
3358
3359         igb_config_collision_dist(hw);
3360
3361         /* Enable transmits */
3362         tctl |= E1000_TCTL_EN;
3363
3364         wr32(E1000_TCTL, tctl);
3365 }
3366
3367 /**
3368  *  igb_configure_tx_ring - Configure transmit ring after Reset
3369  *  @adapter: board private structure
3370  *  @ring: tx ring to configure
3371  *
3372  *  Configure a transmit ring after a reset.
3373  **/
3374 void igb_configure_tx_ring(struct igb_adapter *adapter,
3375                            struct igb_ring *ring)
3376 {
3377         struct e1000_hw *hw = &adapter->hw;
3378         u32 txdctl = 0;
3379         u64 tdba = ring->dma;
3380         int reg_idx = ring->reg_idx;
3381
3382         /* disable the queue */
3383         wr32(E1000_TXDCTL(reg_idx), 0);
3384         wrfl();
3385         mdelay(10);
3386
3387         wr32(E1000_TDLEN(reg_idx),
3388              ring->count * sizeof(union e1000_adv_tx_desc));
3389         wr32(E1000_TDBAL(reg_idx),
3390              tdba & 0x00000000ffffffffULL);
3391         wr32(E1000_TDBAH(reg_idx), tdba >> 32);
3392
3393         ring->tail = hw->hw_addr + E1000_TDT(reg_idx);
3394         wr32(E1000_TDH(reg_idx), 0);
3395         writel(0, ring->tail);
3396
3397         txdctl |= IGB_TX_PTHRESH;
3398         txdctl |= IGB_TX_HTHRESH << 8;
3399         txdctl |= IGB_TX_WTHRESH << 16;
3400
3401         txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
3402         wr32(E1000_TXDCTL(reg_idx), txdctl);
3403 }
3404
3405 /**
3406  *  igb_configure_tx - Configure transmit Unit after Reset
3407  *  @adapter: board private structure
3408  *
3409  *  Configure the Tx unit of the MAC after a reset.
3410  **/
3411 static void igb_configure_tx(struct igb_adapter *adapter)
3412 {
3413         int i;
3414
3415         for (i = 0; i < adapter->num_tx_queues; i++)
3416                 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
3417 }
3418
3419 /**
3420  *  igb_setup_rx_resources - allocate Rx resources (Descriptors)
3421  *  @rx_ring: Rx descriptor ring (for a specific queue) to setup
3422  *
3423  *  Returns 0 on success, negative on failure
3424  **/
3425 int igb_setup_rx_resources(struct igb_ring *rx_ring)
3426 {
3427         struct device *dev = rx_ring->dev;
3428         int size;
3429
3430         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3431
3432         rx_ring->rx_buffer_info = vzalloc(size);
3433         if (!rx_ring->rx_buffer_info)
3434                 goto err;
3435
3436         /* Round up to nearest 4K */
3437         rx_ring->size = rx_ring->count * sizeof(union e1000_adv_rx_desc);
3438         rx_ring->size = ALIGN(rx_ring->size, 4096);
3439
3440         rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
3441                                            &rx_ring->dma, GFP_KERNEL);
3442         if (!rx_ring->desc)
3443                 goto err;
3444
3445         rx_ring->next_to_alloc = 0;
3446         rx_ring->next_to_clean = 0;
3447         rx_ring->next_to_use = 0;
3448
3449         return 0;
3450
3451 err:
3452         vfree(rx_ring->rx_buffer_info);
3453         rx_ring->rx_buffer_info = NULL;
3454         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
3455         return -ENOMEM;
3456 }
3457
3458 /**
3459  *  igb_setup_all_rx_resources - wrapper to allocate Rx resources
3460  *                               (Descriptors) for all queues
3461  *  @adapter: board private structure
3462  *
3463  *  Return 0 on success, negative on failure
3464  **/
3465 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
3466 {
3467         struct pci_dev *pdev = adapter->pdev;
3468         int i, err = 0;
3469
3470         for (i = 0; i < adapter->num_rx_queues; i++) {
3471                 err = igb_setup_rx_resources(adapter->rx_ring[i]);
3472                 if (err) {
3473                         dev_err(&pdev->dev,
3474                                 "Allocation for Rx Queue %u failed\n", i);
3475                         for (i--; i >= 0; i--)
3476                                 igb_free_rx_resources(adapter->rx_ring[i]);
3477                         break;
3478                 }
3479         }
3480
3481         return err;
3482 }
3483
3484 /**
3485  *  igb_setup_mrqc - configure the multiple receive queue control registers
3486  *  @adapter: Board private structure
3487  **/
3488 static void igb_setup_mrqc(struct igb_adapter *adapter)
3489 {
3490         struct e1000_hw *hw = &adapter->hw;
3491         u32 mrqc, rxcsum;
3492         u32 j, num_rx_queues;
3493         u32 rss_key[10];
3494
3495         netdev_rss_key_fill(rss_key, sizeof(rss_key));
3496         for (j = 0; j < 10; j++)
3497                 wr32(E1000_RSSRK(j), rss_key[j]);
3498
3499         num_rx_queues = adapter->rss_queues;
3500
3501         switch (hw->mac.type) {
3502         case e1000_82576:
3503                 /* 82576 supports 2 RSS queues for SR-IOV */
3504                 if (adapter->vfs_allocated_count)
3505                         num_rx_queues = 2;
3506                 break;
3507         default:
3508                 break;
3509         }
3510
3511         if (adapter->rss_indir_tbl_init != num_rx_queues) {
3512                 for (j = 0; j < IGB_RETA_SIZE; j++)
3513                         adapter->rss_indir_tbl[j] =
3514                         (j * num_rx_queues) / IGB_RETA_SIZE;
3515                 adapter->rss_indir_tbl_init = num_rx_queues;
3516         }
3517         igb_write_rss_indir_tbl(adapter);
3518
3519         /* Disable raw packet checksumming so that RSS hash is placed in
3520          * descriptor on writeback.  No need to enable TCP/UDP/IP checksum
3521          * offloads as they are enabled by default
3522          */
3523         rxcsum = rd32(E1000_RXCSUM);
3524         rxcsum |= E1000_RXCSUM_PCSD;
3525
3526         if (adapter->hw.mac.type >= e1000_82576)
3527                 /* Enable Receive Checksum Offload for SCTP */
3528                 rxcsum |= E1000_RXCSUM_CRCOFL;
3529
3530         /* Don't need to set TUOFL or IPOFL, they default to 1 */
3531         wr32(E1000_RXCSUM, rxcsum);
3532
3533         /* Generate RSS hash based on packet types, TCP/UDP
3534          * port numbers and/or IPv4/v6 src and dst addresses
3535          */
3536         mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
3537                E1000_MRQC_RSS_FIELD_IPV4_TCP |
3538                E1000_MRQC_RSS_FIELD_IPV6 |
3539                E1000_MRQC_RSS_FIELD_IPV6_TCP |
3540                E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
3541
3542         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
3543                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
3544         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
3545                 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
3546
3547         /* If VMDq is enabled then we set the appropriate mode for that, else
3548          * we default to RSS so that an RSS hash is calculated per packet even
3549          * if we are only using one queue
3550          */
3551         if (adapter->vfs_allocated_count) {
3552                 if (hw->mac.type > e1000_82575) {
3553                         /* Set the default pool for the PF's first queue */
3554                         u32 vtctl = rd32(E1000_VT_CTL);
3555
3556                         vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
3557                                    E1000_VT_CTL_DISABLE_DEF_POOL);
3558                         vtctl |= adapter->vfs_allocated_count <<
3559                                 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
3560                         wr32(E1000_VT_CTL, vtctl);
3561                 }
3562                 if (adapter->rss_queues > 1)
3563                         mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_MQ;
3564                 else
3565                         mrqc |= E1000_MRQC_ENABLE_VMDQ;
3566         } else {
3567                 if (hw->mac.type != e1000_i211)
3568                         mrqc |= E1000_MRQC_ENABLE_RSS_MQ;
3569         }
3570         igb_vmm_control(adapter);
3571
3572         wr32(E1000_MRQC, mrqc);
3573 }
3574
3575 /**
3576  *  igb_setup_rctl - configure the receive control registers
3577  *  @adapter: Board private structure
3578  **/
3579 void igb_setup_rctl(struct igb_adapter *adapter)
3580 {
3581         struct e1000_hw *hw = &adapter->hw;
3582         u32 rctl;
3583
3584         rctl = rd32(E1000_RCTL);
3585
3586         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3587         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
3588
3589         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
3590                 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3591
3592         /* enable stripping of CRC. It's unlikely this will break BMC
3593          * redirection as it did with e1000. Newer features require
3594          * that the HW strips the CRC.
3595          */
3596         rctl |= E1000_RCTL_SECRC;
3597
3598         /* disable store bad packets and clear size bits. */
3599         rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
3600
3601         /* enable LPE to allow for reception of jumbo frames */
3602         rctl |= E1000_RCTL_LPE;
3603
3604         /* disable queue 0 to prevent tail write w/o re-config */
3605         wr32(E1000_RXDCTL(0), 0);
3606
3607         /* Attention!!!  For SR-IOV PF driver operations you must enable
3608          * queue drop for all VF and PF queues to prevent head of line blocking
3609          * if an un-trusted VF does not provide descriptors to hardware.
3610          */
3611         if (adapter->vfs_allocated_count) {
3612                 /* set all queue drop enable bits */
3613                 wr32(E1000_QDE, ALL_QUEUES);
3614         }
3615
3616         /* This is useful for sniffing bad packets. */
3617         if (adapter->netdev->features & NETIF_F_RXALL) {
3618                 /* UPE and MPE will be handled by normal PROMISC logic
3619                  * in e1000e_set_rx_mode
3620                  */
3621                 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
3622                          E1000_RCTL_BAM | /* RX All Bcast Pkts */
3623                          E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
3624
3625                 rctl &= ~(E1000_RCTL_DPF | /* Allow filtered pause */
3626                           E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
3627                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3628                  * and that breaks VLANs.
3629                  */
3630         }
3631
3632         wr32(E1000_RCTL, rctl);
3633 }
3634
3635 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
3636                                    int vfn)
3637 {
3638         struct e1000_hw *hw = &adapter->hw;
3639         u32 vmolr;
3640
3641         if (size > MAX_JUMBO_FRAME_SIZE)
3642                 size = MAX_JUMBO_FRAME_SIZE;
3643
3644         vmolr = rd32(E1000_VMOLR(vfn));
3645         vmolr &= ~E1000_VMOLR_RLPML_MASK;
3646         vmolr |= size | E1000_VMOLR_LPE;
3647         wr32(E1000_VMOLR(vfn), vmolr);
3648
3649         return 0;
3650 }
3651
3652 static inline void igb_set_vf_vlan_strip(struct igb_adapter *adapter,
3653                                          int vfn, bool enable)
3654 {
3655         struct e1000_hw *hw = &adapter->hw;
3656         u32 val, reg;
3657
3658         if (hw->mac.type < e1000_82576)
3659                 return;
3660
3661         if (hw->mac.type == e1000_i350)
3662                 reg = E1000_DVMOLR(vfn);
3663         else
3664                 reg = E1000_VMOLR(vfn);
3665
3666         val = rd32(reg);
3667         if (enable)
3668                 val |= E1000_VMOLR_STRVLAN;
3669         else
3670                 val &= ~(E1000_VMOLR_STRVLAN);
3671         wr32(reg, val);
3672 }
3673
3674 static inline void igb_set_vmolr(struct igb_adapter *adapter,
3675                                  int vfn, bool aupe)
3676 {
3677         struct e1000_hw *hw = &adapter->hw;
3678         u32 vmolr;
3679
3680         /* This register exists only on 82576 and newer so if we are older then
3681          * we should exit and do nothing
3682          */
3683         if (hw->mac.type < e1000_82576)
3684                 return;
3685
3686         vmolr = rd32(E1000_VMOLR(vfn));
3687         if (aupe)
3688                 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
3689         else
3690                 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
3691
3692         /* clear all bits that might not be set */
3693         vmolr &= ~(E1000_VMOLR_BAM | E1000_VMOLR_RSSE);
3694
3695         if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
3696                 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3697         /* for VMDq only allow the VFs and pool 0 to accept broadcast and
3698          * multicast packets
3699          */
3700         if (vfn <= adapter->vfs_allocated_count)
3701                 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
3702
3703         wr32(E1000_VMOLR(vfn), vmolr);
3704 }
3705
3706 /**
3707  *  igb_configure_rx_ring - Configure a receive ring after Reset
3708  *  @adapter: board private structure
3709  *  @ring: receive ring to be configured
3710  *
3711  *  Configure the Rx unit of the MAC after a reset.
3712  **/
3713 void igb_configure_rx_ring(struct igb_adapter *adapter,
3714                            struct igb_ring *ring)
3715 {
3716         struct e1000_hw *hw = &adapter->hw;
3717         u64 rdba = ring->dma;
3718         int reg_idx = ring->reg_idx;
3719         u32 srrctl = 0, rxdctl = 0;
3720
3721         /* disable the queue */
3722         wr32(E1000_RXDCTL(reg_idx), 0);
3723
3724         /* Set DMA base address registers */
3725         wr32(E1000_RDBAL(reg_idx),
3726              rdba & 0x00000000ffffffffULL);
3727         wr32(E1000_RDBAH(reg_idx), rdba >> 32);
3728         wr32(E1000_RDLEN(reg_idx),
3729              ring->count * sizeof(union e1000_adv_rx_desc));
3730
3731         /* initialize head and tail */
3732         ring->tail = hw->hw_addr + E1000_RDT(reg_idx);
3733         wr32(E1000_RDH(reg_idx), 0);
3734         writel(0, ring->tail);
3735
3736         /* set descriptor configuration */
3737         srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
3738         srrctl |= IGB_RX_BUFSZ >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3739         srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
3740         if (hw->mac.type >= e1000_82580)
3741                 srrctl |= E1000_SRRCTL_TIMESTAMP;
3742         /* Only set Drop Enable if we are supporting multiple queues */
3743         if (adapter->vfs_allocated_count || adapter->num_rx_queues > 1)
3744                 srrctl |= E1000_SRRCTL_DROP_EN;
3745
3746         wr32(E1000_SRRCTL(reg_idx), srrctl);
3747
3748         /* set filtering for VMDQ pools */
3749         igb_set_vmolr(adapter, reg_idx & 0x7, true);
3750
3751         rxdctl |= IGB_RX_PTHRESH;
3752         rxdctl |= IGB_RX_HTHRESH << 8;
3753         rxdctl |= IGB_RX_WTHRESH << 16;
3754
3755         /* enable receive descriptor fetching */
3756         rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3757         wr32(E1000_RXDCTL(reg_idx), rxdctl);
3758 }
3759
3760 /**
3761  *  igb_configure_rx - Configure receive Unit after Reset
3762  *  @adapter: board private structure
3763  *
3764  *  Configure the Rx unit of the MAC after a reset.
3765  **/
3766 static void igb_configure_rx(struct igb_adapter *adapter)
3767 {
3768         int i;
3769
3770         /* set the correct pool for the PF default MAC address in entry 0 */
3771         igb_rar_set_qsel(adapter, adapter->hw.mac.addr, 0,
3772                          adapter->vfs_allocated_count);
3773
3774         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3775          * the Base and Length of the Rx Descriptor Ring
3776          */
3777         for (i = 0; i < adapter->num_rx_queues; i++)
3778                 igb_configure_rx_ring(adapter, adapter->rx_ring[i]);
3779 }
3780
3781 /**
3782  *  igb_free_tx_resources - Free Tx Resources per Queue
3783  *  @tx_ring: Tx descriptor ring for a specific queue
3784  *
3785  *  Free all transmit software resources
3786  **/
3787 void igb_free_tx_resources(struct igb_ring *tx_ring)
3788 {
3789         igb_clean_tx_ring(tx_ring);
3790
3791         vfree(tx_ring->tx_buffer_info);
3792         tx_ring->tx_buffer_info = NULL;
3793
3794         /* if not set, then don't free */
3795         if (!tx_ring->desc)
3796                 return;
3797
3798         dma_free_coherent(tx_ring->dev, tx_ring->size,
3799                           tx_ring->desc, tx_ring->dma);
3800
3801         tx_ring->desc = NULL;
3802 }
3803
3804 /**
3805  *  igb_free_all_tx_resources - Free Tx Resources for All Queues
3806  *  @adapter: board private structure
3807  *
3808  *  Free all transmit software resources
3809  **/
3810 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
3811 {
3812         int i;
3813
3814         for (i = 0; i < adapter->num_tx_queues; i++)
3815                 if (adapter->tx_ring[i])
3816                         igb_free_tx_resources(adapter->tx_ring[i]);
3817 }
3818
3819 void igb_unmap_and_free_tx_resource(struct igb_ring *ring,
3820                                     struct igb_tx_buffer *tx_buffer)
3821 {
3822         if (tx_buffer->skb) {
3823                 dev_kfree_skb_any(tx_buffer->skb);
3824                 if (dma_unmap_len(tx_buffer, len))
3825                         dma_unmap_single(ring->dev,
3826                                          dma_unmap_addr(tx_buffer, dma),
3827                                          dma_unmap_len(tx_buffer, len),
3828                                          DMA_TO_DEVICE);
3829         } else if (dma_unmap_len(tx_buffer, len)) {
3830                 dma_unmap_page(ring->dev,
3831                                dma_unmap_addr(tx_buffer, dma),
3832                                dma_unmap_len(tx_buffer, len),
3833                                DMA_TO_DEVICE);
3834         }
3835         tx_buffer->next_to_watch = NULL;
3836         tx_buffer->skb = NULL;
3837         dma_unmap_len_set(tx_buffer, len, 0);
3838         /* buffer_info must be completely set up in the transmit path */
3839 }
3840
3841 /**
3842  *  igb_clean_tx_ring - Free Tx Buffers
3843  *  @tx_ring: ring to be cleaned
3844  **/
3845 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
3846 {
3847         struct igb_tx_buffer *buffer_info;
3848         unsigned long size;
3849         u16 i;
3850
3851         if (!tx_ring->tx_buffer_info)
3852                 return;
3853         /* Free all the Tx ring sk_buffs */
3854
3855         for (i = 0; i < tx_ring->count; i++) {
3856                 buffer_info = &tx_ring->tx_buffer_info[i];
3857                 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
3858         }
3859
3860         netdev_tx_reset_queue(txring_txq(tx_ring));
3861
3862         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3863         memset(tx_ring->tx_buffer_info, 0, size);
3864
3865         /* Zero out the descriptor ring */
3866         memset(tx_ring->desc, 0, tx_ring->size);
3867
3868         tx_ring->next_to_use = 0;
3869         tx_ring->next_to_clean = 0;
3870 }
3871
3872 /**
3873  *  igb_clean_all_tx_rings - Free Tx Buffers for all queues
3874  *  @adapter: board private structure
3875  **/
3876 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
3877 {
3878         int i;
3879
3880         for (i = 0; i < adapter->num_tx_queues; i++)
3881                 if (adapter->tx_ring[i])
3882                         igb_clean_tx_ring(adapter->tx_ring[i]);
3883 }
3884
3885 /**
3886  *  igb_free_rx_resources - Free Rx Resources
3887  *  @rx_ring: ring to clean the resources from
3888  *
3889  *  Free all receive software resources
3890  **/
3891 void igb_free_rx_resources(struct igb_ring *rx_ring)
3892 {
3893         igb_clean_rx_ring(rx_ring);
3894
3895         vfree(rx_ring->rx_buffer_info);
3896         rx_ring->rx_buffer_info = NULL;
3897
3898         /* if not set, then don't free */
3899         if (!rx_ring->desc)
3900                 return;
3901
3902         dma_free_coherent(rx_ring->dev, rx_ring->size,
3903                           rx_ring->desc, rx_ring->dma);
3904
3905         rx_ring->desc = NULL;
3906 }
3907
3908 /**
3909  *  igb_free_all_rx_resources - Free Rx Resources for All Queues
3910  *  @adapter: board private structure
3911  *
3912  *  Free all receive software resources
3913  **/
3914 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
3915 {
3916         int i;
3917
3918         for (i = 0; i < adapter->num_rx_queues; i++)
3919                 if (adapter->rx_ring[i])
3920                         igb_free_rx_resources(adapter->rx_ring[i]);
3921 }
3922
3923 /**
3924  *  igb_clean_rx_ring - Free Rx Buffers per Queue
3925  *  @rx_ring: ring to free buffers from
3926  **/
3927 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
3928 {
3929         unsigned long size;
3930         u16 i;
3931
3932         if (rx_ring->skb)
3933                 dev_kfree_skb(rx_ring->skb);
3934         rx_ring->skb = NULL;
3935
3936         if (!rx_ring->rx_buffer_info)
3937                 return;
3938
3939         /* Free all the Rx ring sk_buffs */
3940         for (i = 0; i < rx_ring->count; i++) {
3941                 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
3942
3943                 if (!buffer_info->page)
3944                         continue;
3945
3946                 dma_unmap_page(rx_ring->dev,
3947                                buffer_info->dma,
3948                                PAGE_SIZE,
3949                                DMA_FROM_DEVICE);
3950                 __free_page(buffer_info->page);
3951
3952                 buffer_info->page = NULL;
3953         }
3954
3955         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3956         memset(rx_ring->rx_buffer_info, 0, size);
3957
3958         /* Zero out the descriptor ring */
3959         memset(rx_ring->desc, 0, rx_ring->size);
3960
3961         rx_ring->next_to_alloc = 0;
3962         rx_ring->next_to_clean = 0;
3963         rx_ring->next_to_use = 0;
3964 }
3965
3966 /**
3967  *  igb_clean_all_rx_rings - Free Rx Buffers for all queues
3968  *  @adapter: board private structure
3969  **/
3970 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
3971 {
3972         int i;
3973
3974         for (i = 0; i < adapter->num_rx_queues; i++)
3975                 if (adapter->rx_ring[i])
3976                         igb_clean_rx_ring(adapter->rx_ring[i]);
3977 }
3978
3979 /**
3980  *  igb_set_mac - Change the Ethernet Address of the NIC
3981  *  @netdev: network interface device structure
3982  *  @p: pointer to an address structure
3983  *
3984  *  Returns 0 on success, negative on failure
3985  **/
3986 static int igb_set_mac(struct net_device *netdev, void *p)
3987 {
3988         struct igb_adapter *adapter = netdev_priv(netdev);
3989         struct e1000_hw *hw = &adapter->hw;
3990         struct sockaddr *addr = p;
3991
3992         if (!is_valid_ether_addr(addr->sa_data))
3993                 return -EADDRNOTAVAIL;
3994
3995         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3996         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3997
3998         /* set the correct pool for the new PF MAC address in entry 0 */
3999         igb_rar_set_qsel(adapter, hw->mac.addr, 0,
4000                          adapter->vfs_allocated_count);
4001
4002         return 0;
4003 }
4004
4005 /**
4006  *  igb_write_mc_addr_list - write multicast addresses to MTA
4007  *  @netdev: network interface device structure
4008  *
4009  *  Writes multicast address list to the MTA hash table.
4010  *  Returns: -ENOMEM on failure
4011  *           0 on no addresses written
4012  *           X on writing X addresses to MTA
4013  **/
4014 static int igb_write_mc_addr_list(struct net_device *netdev)
4015 {
4016         struct igb_adapter *adapter = netdev_priv(netdev);
4017         struct e1000_hw *hw = &adapter->hw;
4018         struct netdev_hw_addr *ha;
4019         u8  *mta_list;
4020         int i;
4021
4022         if (netdev_mc_empty(netdev)) {
4023                 /* nothing to program, so clear mc list */
4024                 igb_update_mc_addr_list(hw, NULL, 0);
4025                 igb_restore_vf_multicasts(adapter);
4026                 return 0;
4027         }
4028
4029         mta_list = kzalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
4030         if (!mta_list)
4031                 return -ENOMEM;
4032
4033         /* The shared function expects a packed array of only addresses. */
4034         i = 0;
4035         netdev_for_each_mc_addr(ha, netdev)
4036                 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
4037
4038         igb_update_mc_addr_list(hw, mta_list, i);
4039         kfree(mta_list);
4040
4041         return netdev_mc_count(netdev);
4042 }
4043
4044 /**
4045  *  igb_write_uc_addr_list - write unicast addresses to RAR table
4046  *  @netdev: network interface device structure
4047  *
4048  *  Writes unicast address list to the RAR table.
4049  *  Returns: -ENOMEM on failure/insufficient address space
4050  *           0 on no addresses written
4051  *           X on writing X addresses to the RAR table
4052  **/
4053 static int igb_write_uc_addr_list(struct net_device *netdev)
4054 {
4055         struct igb_adapter *adapter = netdev_priv(netdev);
4056         struct e1000_hw *hw = &adapter->hw;
4057         unsigned int vfn = adapter->vfs_allocated_count;
4058         unsigned int rar_entries = hw->mac.rar_entry_count - (vfn + 1);
4059         int count = 0;
4060
4061         /* return ENOMEM indicating insufficient memory for addresses */
4062         if (netdev_uc_count(netdev) > rar_entries)
4063                 return -ENOMEM;
4064
4065         if (!netdev_uc_empty(netdev) && rar_entries) {
4066                 struct netdev_hw_addr *ha;
4067
4068                 netdev_for_each_uc_addr(ha, netdev) {
4069                         if (!rar_entries)
4070                                 break;
4071                         igb_rar_set_qsel(adapter, ha->addr,
4072                                          rar_entries--,
4073                                          vfn);
4074                         count++;
4075                 }
4076         }
4077         /* write the addresses in reverse order to avoid write combining */
4078         for (; rar_entries > 0 ; rar_entries--) {
4079                 wr32(E1000_RAH(rar_entries), 0);
4080                 wr32(E1000_RAL(rar_entries), 0);
4081         }
4082         wrfl();
4083
4084         return count;
4085 }
4086
4087 static int igb_vlan_promisc_enable(struct igb_adapter *adapter)
4088 {
4089         struct e1000_hw *hw = &adapter->hw;
4090         u32 i, pf_id;
4091
4092         switch (hw->mac.type) {
4093         case e1000_i210:
4094         case e1000_i211:
4095         case e1000_i350:
4096                 /* VLAN filtering needed for VLAN prio filter */
4097                 if (adapter->netdev->features & NETIF_F_NTUPLE)
4098                         break;
4099                 /* fall through */
4100         case e1000_82576:
4101         case e1000_82580:
4102         case e1000_i354:
4103                 /* VLAN filtering needed for pool filtering */
4104                 if (adapter->vfs_allocated_count)
4105                         break;
4106                 /* fall through */
4107         default:
4108                 return 1;
4109         }
4110
4111         /* We are already in VLAN promisc, nothing to do */
4112         if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
4113                 return 0;
4114
4115         if (!adapter->vfs_allocated_count)
4116                 goto set_vfta;
4117
4118         /* Add PF to all active pools */
4119         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
4120
4121         for (i = E1000_VLVF_ARRAY_SIZE; --i;) {
4122                 u32 vlvf = rd32(E1000_VLVF(i));
4123
4124                 vlvf |= BIT(pf_id);
4125                 wr32(E1000_VLVF(i), vlvf);
4126         }
4127
4128 set_vfta:
4129         /* Set all bits in the VLAN filter table array */
4130         for (i = E1000_VLAN_FILTER_TBL_SIZE; i--;)
4131                 hw->mac.ops.write_vfta(hw, i, ~0U);
4132
4133         /* Set flag so we don't redo unnecessary work */
4134         adapter->flags |= IGB_FLAG_VLAN_PROMISC;
4135
4136         return 0;
4137 }
4138
4139 #define VFTA_BLOCK_SIZE 8
4140 static void igb_scrub_vfta(struct igb_adapter *adapter, u32 vfta_offset)
4141 {
4142         struct e1000_hw *hw = &adapter->hw;
4143         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4144         u32 vid_start = vfta_offset * 32;
4145         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4146         u32 i, vid, word, bits, pf_id;
4147
4148         /* guarantee that we don't scrub out management VLAN */
4149         vid = adapter->mng_vlan_id;
4150         if (vid >= vid_start && vid < vid_end)
4151                 vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4152
4153         if (!adapter->vfs_allocated_count)
4154                 goto set_vfta;
4155
4156         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
4157
4158         for (i = E1000_VLVF_ARRAY_SIZE; --i;) {
4159                 u32 vlvf = rd32(E1000_VLVF(i));
4160
4161                 /* pull VLAN ID from VLVF */
4162                 vid = vlvf & VLAN_VID_MASK;
4163
4164                 /* only concern ourselves with a certain range */
4165                 if (vid < vid_start || vid >= vid_end)
4166                         continue;
4167
4168                 if (vlvf & E1000_VLVF_VLANID_ENABLE) {
4169                         /* record VLAN ID in VFTA */
4170                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4171
4172                         /* if PF is part of this then continue */
4173                         if (test_bit(vid, adapter->active_vlans))
4174                                 continue;
4175                 }
4176
4177                 /* remove PF from the pool */
4178                 bits = ~BIT(pf_id);
4179                 bits &= rd32(E1000_VLVF(i));
4180                 wr32(E1000_VLVF(i), bits);
4181         }
4182
4183 set_vfta:
4184         /* extract values from active_vlans and write back to VFTA */
4185         for (i = VFTA_BLOCK_SIZE; i--;) {
4186                 vid = (vfta_offset + i) * 32;
4187                 word = vid / BITS_PER_LONG;
4188                 bits = vid % BITS_PER_LONG;
4189
4190                 vfta[i] |= adapter->active_vlans[word] >> bits;
4191
4192                 hw->mac.ops.write_vfta(hw, vfta_offset + i, vfta[i]);
4193         }
4194 }
4195
4196 static void igb_vlan_promisc_disable(struct igb_adapter *adapter)
4197 {
4198         u32 i;
4199
4200         /* We are not in VLAN promisc, nothing to do */
4201         if (!(adapter->flags & IGB_FLAG_VLAN_PROMISC))
4202                 return;
4203
4204         /* Set flag so we don't redo unnecessary work */
4205         adapter->flags &= ~IGB_FLAG_VLAN_PROMISC;
4206
4207         for (i = 0; i < E1000_VLAN_FILTER_TBL_SIZE; i += VFTA_BLOCK_SIZE)
4208                 igb_scrub_vfta(adapter, i);
4209 }
4210
4211 /**
4212  *  igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
4213  *  @netdev: network interface device structure
4214  *
4215  *  The set_rx_mode entry point is called whenever the unicast or multicast
4216  *  address lists or the network interface flags are updated.  This routine is
4217  *  responsible for configuring the hardware for proper unicast, multicast,
4218  *  promiscuous mode, and all-multi behavior.
4219  **/
4220 static void igb_set_rx_mode(struct net_device *netdev)
4221 {
4222         struct igb_adapter *adapter = netdev_priv(netdev);
4223         struct e1000_hw *hw = &adapter->hw;
4224         unsigned int vfn = adapter->vfs_allocated_count;
4225         u32 rctl = 0, vmolr = 0;
4226         int count;
4227
4228         /* Check for Promiscuous and All Multicast modes */
4229         if (netdev->flags & IFF_PROMISC) {
4230                 rctl |= E1000_RCTL_UPE | E1000_RCTL_MPE;
4231                 vmolr |= E1000_VMOLR_MPME;
4232
4233                 /* enable use of UTA filter to force packets to default pool */
4234                 if (hw->mac.type == e1000_82576)
4235                         vmolr |= E1000_VMOLR_ROPE;
4236         } else {
4237                 if (netdev->flags & IFF_ALLMULTI) {
4238                         rctl |= E1000_RCTL_MPE;
4239                         vmolr |= E1000_VMOLR_MPME;
4240                 } else {
4241                         /* Write addresses to the MTA, if the attempt fails
4242                          * then we should just turn on promiscuous mode so
4243                          * that we can at least receive multicast traffic
4244                          */
4245                         count = igb_write_mc_addr_list(netdev);
4246                         if (count < 0) {
4247                                 rctl |= E1000_RCTL_MPE;
4248                                 vmolr |= E1000_VMOLR_MPME;
4249                         } else if (count) {
4250                                 vmolr |= E1000_VMOLR_ROMPE;
4251                         }
4252                 }
4253         }
4254
4255         /* Write addresses to available RAR registers, if there is not
4256          * sufficient space to store all the addresses then enable
4257          * unicast promiscuous mode
4258          */
4259         count = igb_write_uc_addr_list(netdev);
4260         if (count < 0) {
4261                 rctl |= E1000_RCTL_UPE;
4262                 vmolr |= E1000_VMOLR_ROPE;
4263         }
4264
4265         /* enable VLAN filtering by default */
4266         rctl |= E1000_RCTL_VFE;
4267
4268         /* disable VLAN filtering for modes that require it */
4269         if ((netdev->flags & IFF_PROMISC) ||
4270             (netdev->features & NETIF_F_RXALL)) {
4271                 /* if we fail to set all rules then just clear VFE */
4272                 if (igb_vlan_promisc_enable(adapter))
4273                         rctl &= ~E1000_RCTL_VFE;
4274         } else {
4275                 igb_vlan_promisc_disable(adapter);
4276         }
4277
4278         /* update state of unicast, multicast, and VLAN filtering modes */
4279         rctl |= rd32(E1000_RCTL) & ~(E1000_RCTL_UPE | E1000_RCTL_MPE |
4280                                      E1000_RCTL_VFE);
4281         wr32(E1000_RCTL, rctl);
4282
4283         /* In order to support SR-IOV and eventually VMDq it is necessary to set
4284          * the VMOLR to enable the appropriate modes.  Without this workaround
4285          * we will have issues with VLAN tag stripping not being done for frames
4286          * that are only arriving because we are the default pool
4287          */
4288         if ((hw->mac.type < e1000_82576) || (hw->mac.type > e1000_i350))
4289                 return;
4290
4291         /* set UTA to appropriate mode */
4292         igb_set_uta(adapter, !!(vmolr & E1000_VMOLR_ROPE));
4293
4294         vmolr |= rd32(E1000_VMOLR(vfn)) &
4295                  ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
4296
4297         /* enable Rx jumbo frames, no need for restriction */
4298         vmolr &= ~E1000_VMOLR_RLPML_MASK;
4299         vmolr |= MAX_JUMBO_FRAME_SIZE | E1000_VMOLR_LPE;
4300
4301         wr32(E1000_VMOLR(vfn), vmolr);
4302         wr32(E1000_RLPML, MAX_JUMBO_FRAME_SIZE);
4303
4304         igb_restore_vf_multicasts(adapter);
4305 }
4306
4307 static void igb_check_wvbr(struct igb_adapter *adapter)
4308 {
4309         struct e1000_hw *hw = &adapter->hw;
4310         u32 wvbr = 0;
4311
4312         switch (hw->mac.type) {
4313         case e1000_82576:
4314         case e1000_i350:
4315                 wvbr = rd32(E1000_WVBR);
4316                 if (!wvbr)
4317                         return;
4318                 break;
4319         default:
4320                 break;
4321         }
4322
4323         adapter->wvbr |= wvbr;
4324 }
4325
4326 #define IGB_STAGGERED_QUEUE_OFFSET 8
4327
4328 static void igb_spoof_check(struct igb_adapter *adapter)
4329 {
4330         int j;
4331
4332         if (!adapter->wvbr)
4333                 return;
4334
4335         for (j = 0; j < adapter->vfs_allocated_count; j++) {
4336                 if (adapter->wvbr & BIT(j) ||
4337                     adapter->wvbr & BIT(j + IGB_STAGGERED_QUEUE_OFFSET)) {
4338                         dev_warn(&adapter->pdev->dev,
4339                                 "Spoof event(s) detected on VF %d\n", j);
4340                         adapter->wvbr &=
4341                                 ~(BIT(j) |
4342                                   BIT(j + IGB_STAGGERED_QUEUE_OFFSET));
4343                 }
4344         }
4345 }
4346
4347 /* Need to wait a few seconds after link up to get diagnostic information from
4348  * the phy
4349  */
4350 static void igb_update_phy_info(unsigned long data)
4351 {
4352         struct igb_adapter *adapter = (struct igb_adapter *) data;
4353         igb_get_phy_info(&adapter->hw);
4354 }
4355
4356 /**
4357  *  igb_has_link - check shared code for link and determine up/down
4358  *  @adapter: pointer to driver private info
4359  **/
4360 bool igb_has_link(struct igb_adapter *adapter)
4361 {
4362         struct e1000_hw *hw = &adapter->hw;
4363         bool link_active = false;
4364
4365         /* get_link_status is set on LSC (link status) interrupt or
4366          * rx sequence error interrupt.  get_link_status will stay
4367          * false until the e1000_check_for_link establishes link
4368          * for copper adapters ONLY
4369          */
4370         switch (hw->phy.media_type) {
4371         case e1000_media_type_copper:
4372                 if (!hw->mac.get_link_status)
4373                         return true;
4374         case e1000_media_type_internal_serdes:
4375                 hw->mac.ops.check_for_link(hw);
4376                 link_active = !hw->mac.get_link_status;
4377                 break;
4378         default:
4379         case e1000_media_type_unknown:
4380                 break;
4381         }
4382
4383         if (((hw->mac.type == e1000_i210) ||
4384              (hw->mac.type == e1000_i211)) &&
4385              (hw->phy.id == I210_I_PHY_ID)) {
4386                 if (!netif_carrier_ok(adapter->netdev)) {
4387                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4388                 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
4389                         adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
4390                         adapter->link_check_timeout = jiffies;
4391                 }
4392         }
4393
4394         return link_active;
4395 }
4396
4397 static bool igb_thermal_sensor_event(struct e1000_hw *hw, u32 event)
4398 {
4399         bool ret = false;
4400         u32 ctrl_ext, thstat;
4401
4402         /* check for thermal sensor event on i350 copper only */
4403         if (hw->mac.type == e1000_i350) {
4404                 thstat = rd32(E1000_THSTAT);
4405                 ctrl_ext = rd32(E1000_CTRL_EXT);
4406
4407                 if ((hw->phy.media_type == e1000_media_type_copper) &&
4408                     !(ctrl_ext & E1000_CTRL_EXT_LINK_MODE_SGMII))
4409                         ret = !!(thstat & event);
4410         }
4411
4412         return ret;
4413 }
4414
4415 /**
4416  *  igb_check_lvmmc - check for malformed packets received
4417  *  and indicated in LVMMC register
4418  *  @adapter: pointer to adapter
4419  **/
4420 static void igb_check_lvmmc(struct igb_adapter *adapter)
4421 {
4422         struct e1000_hw *hw = &adapter->hw;
4423         u32 lvmmc;
4424
4425         lvmmc = rd32(E1000_LVMMC);
4426         if (lvmmc) {
4427                 if (unlikely(net_ratelimit())) {
4428                         netdev_warn(adapter->netdev,
4429                                     "malformed Tx packet detected and dropped, LVMMC:0x%08x\n",
4430                                     lvmmc);
4431                 }
4432         }
4433 }
4434
4435 /**
4436  *  igb_watchdog - Timer Call-back
4437  *  @data: pointer to adapter cast into an unsigned long
4438  **/
4439 static void igb_watchdog(unsigned long data)
4440 {
4441         struct igb_adapter *adapter = (struct igb_adapter *)data;
4442         /* Do the rest outside of interrupt context */
4443         schedule_work(&adapter->watchdog_task);
4444 }
4445
4446 static void igb_watchdog_task(struct work_struct *work)
4447 {
4448         struct igb_adapter *adapter = container_of(work,
4449                                                    struct igb_adapter,
4450                                                    watchdog_task);
4451         struct e1000_hw *hw = &adapter->hw;
4452         struct e1000_phy_info *phy = &hw->phy;
4453         struct net_device *netdev = adapter->netdev;
4454         u32 link;
4455         int i;
4456         u32 connsw;
4457         u16 phy_data, retry_count = 20;
4458
4459         link = igb_has_link(adapter);
4460
4461         if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
4462                 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
4463                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4464                 else
4465                         link = false;
4466         }
4467
4468         /* Force link down if we have fiber to swap to */
4469         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4470                 if (hw->phy.media_type == e1000_media_type_copper) {
4471                         connsw = rd32(E1000_CONNSW);
4472                         if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
4473                                 link = 0;
4474                 }
4475         }
4476         if (link) {
4477                 /* Perform a reset if the media type changed. */
4478                 if (hw->dev_spec._82575.media_changed) {
4479                         hw->dev_spec._82575.media_changed = false;
4480                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
4481                         igb_reset(adapter);
4482                 }
4483                 /* Cancel scheduled suspend requests. */
4484                 pm_runtime_resume(netdev->dev.parent);
4485
4486                 if (!netif_carrier_ok(netdev)) {
4487                         u32 ctrl;
4488
4489                         hw->mac.ops.get_speed_and_duplex(hw,
4490                                                          &adapter->link_speed,
4491                                                          &adapter->link_duplex);
4492
4493                         ctrl = rd32(E1000_CTRL);
4494                         /* Links status message must follow this format */
4495                         netdev_info(netdev,
4496                                "igb: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
4497                                netdev->name,
4498                                adapter->link_speed,
4499                                adapter->link_duplex == FULL_DUPLEX ?
4500                                "Full" : "Half",
4501                                (ctrl & E1000_CTRL_TFCE) &&
4502                                (ctrl & E1000_CTRL_RFCE) ? "RX/TX" :
4503                                (ctrl & E1000_CTRL_RFCE) ?  "RX" :
4504                                (ctrl & E1000_CTRL_TFCE) ?  "TX" : "None");
4505
4506                         /* disable EEE if enabled */
4507                         if ((adapter->flags & IGB_FLAG_EEE) &&
4508                                 (adapter->link_duplex == HALF_DUPLEX)) {
4509                                 dev_info(&adapter->pdev->dev,
4510                                 "EEE Disabled: unsupported at half duplex. Re-enable using ethtool when at full duplex.\n");
4511                                 adapter->hw.dev_spec._82575.eee_disable = true;
4512                                 adapter->flags &= ~IGB_FLAG_EEE;
4513                         }
4514
4515                         /* check if SmartSpeed worked */
4516                         igb_check_downshift(hw);
4517                         if (phy->speed_downgraded)
4518                                 netdev_warn(netdev, "Link Speed was downgraded by SmartSpeed\n");
4519
4520                         /* check for thermal sensor event */
4521                         if (igb_thermal_sensor_event(hw,
4522                             E1000_THSTAT_LINK_THROTTLE))
4523                                 netdev_info(netdev, "The network adapter link speed was downshifted because it overheated\n");
4524
4525                         /* adjust timeout factor according to speed/duplex */
4526                         adapter->tx_timeout_factor = 1;
4527                         switch (adapter->link_speed) {
4528                         case SPEED_10:
4529                                 adapter->tx_timeout_factor = 14;
4530                                 break;
4531                         case SPEED_100:
4532                                 /* maybe add some timeout factor ? */
4533                                 break;
4534                         }
4535
4536                         if (adapter->link_speed != SPEED_1000)
4537                                 goto no_wait;
4538
4539                         /* wait for Remote receiver status OK */
4540 retry_read_status:
4541                         if (!igb_read_phy_reg(hw, PHY_1000T_STATUS,
4542                                               &phy_data)) {
4543                                 if (!(phy_data & SR_1000T_REMOTE_RX_STATUS) &&
4544                                     retry_count) {
4545                                         msleep(100);
4546                                         retry_count--;
4547                                         goto retry_read_status;
4548                                 } else if (!retry_count) {
4549                                         dev_err(&adapter->pdev->dev, "exceed max 2 second\n");
4550                                 }
4551                         } else {
4552                                 dev_err(&adapter->pdev->dev, "read 1000Base-T Status Reg\n");
4553                         }
4554 no_wait:
4555                         netif_carrier_on(netdev);
4556
4557                         igb_ping_all_vfs(adapter);
4558                         igb_check_vf_rate_limit(adapter);
4559
4560                         /* link state has changed, schedule phy info update */
4561                         if (!test_bit(__IGB_DOWN, &adapter->state))
4562                                 mod_timer(&adapter->phy_info_timer,
4563                                           round_jiffies(jiffies + 2 * HZ));
4564                 }
4565         } else {
4566                 if (netif_carrier_ok(netdev)) {
4567                         adapter->link_speed = 0;
4568                         adapter->link_duplex = 0;
4569
4570                         /* check for thermal sensor event */
4571                         if (igb_thermal_sensor_event(hw,
4572                             E1000_THSTAT_PWR_DOWN)) {
4573                                 netdev_err(netdev, "The network adapter was stopped because it overheated\n");
4574                         }
4575
4576                         /* Links status message must follow this format */
4577                         netdev_info(netdev, "igb: %s NIC Link is Down\n",
4578                                netdev->name);
4579                         netif_carrier_off(netdev);
4580
4581                         igb_ping_all_vfs(adapter);
4582
4583                         /* link state has changed, schedule phy info update */
4584                         if (!test_bit(__IGB_DOWN, &adapter->state))
4585                                 mod_timer(&adapter->phy_info_timer,
4586                                           round_jiffies(jiffies + 2 * HZ));
4587
4588                         /* link is down, time to check for alternate media */
4589                         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4590                                 igb_check_swap_media(adapter);
4591                                 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4592                                         schedule_work(&adapter->reset_task);
4593                                         /* return immediately */
4594                                         return;
4595                                 }
4596                         }
4597                         pm_schedule_suspend(netdev->dev.parent,
4598                                             MSEC_PER_SEC * 5);
4599
4600                 /* also check for alternate media here */
4601                 } else if (!netif_carrier_ok(netdev) &&
4602                            (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
4603                         igb_check_swap_media(adapter);
4604                         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4605                                 schedule_work(&adapter->reset_task);
4606                                 /* return immediately */
4607                                 return;
4608                         }
4609                 }
4610         }
4611
4612         spin_lock(&adapter->stats64_lock);
4613         igb_update_stats(adapter, &adapter->stats64);
4614         spin_unlock(&adapter->stats64_lock);
4615
4616         for (i = 0; i < adapter->num_tx_queues; i++) {
4617                 struct igb_ring *tx_ring = adapter->tx_ring[i];
4618                 if (!netif_carrier_ok(netdev)) {
4619                         /* We've lost link, so the controller stops DMA,
4620                          * but we've got queued Tx work that's never going
4621                          * to get done, so reset controller to flush Tx.
4622                          * (Do the reset outside of interrupt context).
4623                          */
4624                         if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
4625                                 adapter->tx_timeout_count++;
4626                                 schedule_work(&adapter->reset_task);
4627                                 /* return immediately since reset is imminent */
4628                                 return;
4629                         }
4630                 }
4631
4632                 /* Force detection of hung controller every watchdog period */
4633                 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
4634         }
4635
4636         /* Cause software interrupt to ensure Rx ring is cleaned */
4637         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
4638                 u32 eics = 0;
4639
4640                 for (i = 0; i < adapter->num_q_vectors; i++)
4641                         eics |= adapter->q_vector[i]->eims_value;
4642                 wr32(E1000_EICS, eics);
4643         } else {
4644                 wr32(E1000_ICS, E1000_ICS_RXDMT0);
4645         }
4646
4647         igb_spoof_check(adapter);
4648         igb_ptp_rx_hang(adapter);
4649
4650         /* Check LVMMC register on i350/i354 only */
4651         if ((adapter->hw.mac.type == e1000_i350) ||
4652             (adapter->hw.mac.type == e1000_i354))
4653                 igb_check_lvmmc(adapter);
4654
4655         /* Reset the timer */
4656         if (!test_bit(__IGB_DOWN, &adapter->state)) {
4657                 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
4658                         mod_timer(&adapter->watchdog_timer,
4659                                   round_jiffies(jiffies +  HZ));
4660                 else
4661                         mod_timer(&adapter->watchdog_timer,
4662                                   round_jiffies(jiffies + 2 * HZ));
4663         }
4664 }
4665
4666 enum latency_range {
4667         lowest_latency = 0,
4668         low_latency = 1,
4669         bulk_latency = 2,
4670         latency_invalid = 255
4671 };
4672
4673 /**
4674  *  igb_update_ring_itr - update the dynamic ITR value based on packet size
4675  *  @q_vector: pointer to q_vector
4676  *
4677  *  Stores a new ITR value based on strictly on packet size.  This
4678  *  algorithm is less sophisticated than that used in igb_update_itr,
4679  *  due to the difficulty of synchronizing statistics across multiple
4680  *  receive rings.  The divisors and thresholds used by this function
4681  *  were determined based on theoretical maximum wire speed and testing
4682  *  data, in order to minimize response time while increasing bulk
4683  *  throughput.
4684  *  This functionality is controlled by ethtool's coalescing settings.
4685  *  NOTE:  This function is called only when operating in a multiqueue
4686  *         receive environment.
4687  **/
4688 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
4689 {
4690         int new_val = q_vector->itr_val;
4691         int avg_wire_size = 0;
4692         struct igb_adapter *adapter = q_vector->adapter;
4693         unsigned int packets;
4694
4695         /* For non-gigabit speeds, just fix the interrupt rate at 4000
4696          * ints/sec - ITR timer value of 120 ticks.
4697          */
4698         if (adapter->link_speed != SPEED_1000) {
4699                 new_val = IGB_4K_ITR;
4700                 goto set_itr_val;
4701         }
4702
4703         packets = q_vector->rx.total_packets;
4704         if (packets)
4705                 avg_wire_size = q_vector->rx.total_bytes / packets;
4706
4707         packets = q_vector->tx.total_packets;
4708         if (packets)
4709                 avg_wire_size = max_t(u32, avg_wire_size,
4710                                       q_vector->tx.total_bytes / packets);
4711
4712         /* if avg_wire_size isn't set no work was done */
4713         if (!avg_wire_size)
4714                 goto clear_counts;
4715
4716         /* Add 24 bytes to size to account for CRC, preamble, and gap */
4717         avg_wire_size += 24;
4718
4719         /* Don't starve jumbo frames */
4720         avg_wire_size = min(avg_wire_size, 3000);
4721
4722         /* Give a little boost to mid-size frames */
4723         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
4724                 new_val = avg_wire_size / 3;
4725         else
4726                 new_val = avg_wire_size / 2;
4727
4728         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4729         if (new_val < IGB_20K_ITR &&
4730             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4731              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4732                 new_val = IGB_20K_ITR;
4733
4734 set_itr_val:
4735         if (new_val != q_vector->itr_val) {
4736                 q_vector->itr_val = new_val;
4737                 q_vector->set_itr = 1;
4738         }
4739 clear_counts:
4740         q_vector->rx.total_bytes = 0;
4741         q_vector->rx.total_packets = 0;
4742         q_vector->tx.total_bytes = 0;
4743         q_vector->tx.total_packets = 0;
4744 }
4745
4746 /**
4747  *  igb_update_itr - update the dynamic ITR value based on statistics
4748  *  @q_vector: pointer to q_vector
4749  *  @ring_container: ring info to update the itr for
4750  *
4751  *  Stores a new ITR value based on packets and byte
4752  *  counts during the last interrupt.  The advantage of per interrupt
4753  *  computation is faster updates and more accurate ITR for the current
4754  *  traffic pattern.  Constants in this function were computed
4755  *  based on theoretical maximum wire speed and thresholds were set based
4756  *  on testing data as well as attempting to minimize response time
4757  *  while increasing bulk throughput.
4758  *  This functionality is controlled by ethtool's coalescing settings.
4759  *  NOTE:  These calculations are only valid when operating in a single-
4760  *         queue environment.
4761  **/
4762 static void igb_update_itr(struct igb_q_vector *q_vector,
4763                            struct igb_ring_container *ring_container)
4764 {
4765         unsigned int packets = ring_container->total_packets;
4766         unsigned int bytes = ring_container->total_bytes;
4767         u8 itrval = ring_container->itr;
4768
4769         /* no packets, exit with status unchanged */
4770         if (packets == 0)
4771                 return;
4772
4773         switch (itrval) {
4774         case lowest_latency:
4775                 /* handle TSO and jumbo frames */
4776                 if (bytes/packets > 8000)
4777                         itrval = bulk_latency;
4778                 else if ((packets < 5) && (bytes > 512))
4779                         itrval = low_latency;
4780                 break;
4781         case low_latency:  /* 50 usec aka 20000 ints/s */
4782                 if (bytes > 10000) {
4783                         /* this if handles the TSO accounting */
4784                         if (bytes/packets > 8000)
4785                                 itrval = bulk_latency;
4786                         else if ((packets < 10) || ((bytes/packets) > 1200))
4787                                 itrval = bulk_latency;
4788                         else if ((packets > 35))
4789                                 itrval = lowest_latency;
4790                 } else if (bytes/packets > 2000) {
4791                         itrval = bulk_latency;
4792                 } else if (packets <= 2 && bytes < 512) {
4793                         itrval = lowest_latency;
4794                 }
4795                 break;
4796         case bulk_latency: /* 250 usec aka 4000 ints/s */
4797                 if (bytes > 25000) {
4798                         if (packets > 35)
4799                                 itrval = low_latency;
4800                 } else if (bytes < 1500) {
4801                         itrval = low_latency;
4802                 }
4803                 break;
4804         }
4805
4806         /* clear work counters since we have the values we need */
4807         ring_container->total_bytes = 0;
4808         ring_container->total_packets = 0;
4809
4810         /* write updated itr to ring container */
4811         ring_container->itr = itrval;
4812 }
4813
4814 static void igb_set_itr(struct igb_q_vector *q_vector)
4815 {
4816         struct igb_adapter *adapter = q_vector->adapter;
4817         u32 new_itr = q_vector->itr_val;
4818         u8 current_itr = 0;
4819
4820         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
4821         if (adapter->link_speed != SPEED_1000) {
4822                 current_itr = 0;
4823                 new_itr = IGB_4K_ITR;
4824                 goto set_itr_now;
4825         }
4826
4827         igb_update_itr(q_vector, &q_vector->tx);
4828         igb_update_itr(q_vector, &q_vector->rx);
4829
4830         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
4831
4832         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4833         if (current_itr == lowest_latency &&
4834             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4835              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4836                 current_itr = low_latency;
4837
4838         switch (current_itr) {
4839         /* counts and packets in update_itr are dependent on these numbers */
4840         case lowest_latency:
4841                 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
4842                 break;
4843         case low_latency:
4844                 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
4845                 break;
4846         case bulk_latency:
4847                 new_itr = IGB_4K_ITR;  /* 4,000 ints/sec */
4848                 break;
4849         default:
4850                 break;
4851         }
4852
4853 set_itr_now:
4854         if (new_itr != q_vector->itr_val) {
4855                 /* this attempts to bias the interrupt rate towards Bulk
4856                  * by adding intermediate steps when interrupt rate is
4857                  * increasing
4858                  */
4859                 new_itr = new_itr > q_vector->itr_val ?
4860                           max((new_itr * q_vector->itr_val) /
4861                           (new_itr + (q_vector->itr_val >> 2)),
4862                           new_itr) : new_itr;
4863                 /* Don't write the value here; it resets the adapter's
4864                  * internal timer, and causes us to delay far longer than
4865                  * we should between interrupts.  Instead, we write the ITR
4866                  * value at the beginning of the next interrupt so the timing
4867                  * ends up being correct.
4868                  */
4869                 q_vector->itr_val = new_itr;
4870                 q_vector->set_itr = 1;
4871         }
4872 }
4873
4874 static void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
4875                             u32 type_tucmd, u32 mss_l4len_idx)
4876 {
4877         struct e1000_adv_tx_context_desc *context_desc;
4878         u16 i = tx_ring->next_to_use;
4879
4880         context_desc = IGB_TX_CTXTDESC(tx_ring, i);
4881
4882         i++;
4883         tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
4884
4885         /* set bits to identify this as an advanced context descriptor */
4886         type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
4887
4888         /* For 82575, context index must be unique per ring. */
4889         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4890                 mss_l4len_idx |= tx_ring->reg_idx << 4;
4891
4892         context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
4893         context_desc->seqnum_seed       = 0;
4894         context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
4895         context_desc->mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);
4896 }
4897
4898 static int igb_tso(struct igb_ring *tx_ring,
4899                    struct igb_tx_buffer *first,
4900                    u8 *hdr_len)
4901 {
4902         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
4903         struct sk_buff *skb = first->skb;
4904         union {
4905                 struct iphdr *v4;
4906                 struct ipv6hdr *v6;
4907                 unsigned char *hdr;
4908         } ip;
4909         union {
4910                 struct tcphdr *tcp;
4911                 unsigned char *hdr;
4912         } l4;
4913         u32 paylen, l4_offset;
4914         int err;
4915
4916         if (skb->ip_summed != CHECKSUM_PARTIAL)
4917                 return 0;
4918
4919         if (!skb_is_gso(skb))
4920                 return 0;
4921
4922         err = skb_cow_head(skb, 0);
4923         if (err < 0)
4924                 return err;
4925
4926         ip.hdr = skb_network_header(skb);
4927         l4.hdr = skb_checksum_start(skb);
4928
4929         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
4930         type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
4931
4932         /* initialize outer IP header fields */
4933         if (ip.v4->version == 4) {
4934                 unsigned char *csum_start = skb_checksum_start(skb);
4935                 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
4936
4937                 /* IP header will have to cancel out any data that
4938                  * is not a part of the outer IP header
4939                  */
4940                 ip.v4->check = csum_fold(csum_partial(trans_start,
4941                                                       csum_start - trans_start,
4942                                                       0));
4943                 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
4944
4945                 ip.v4->tot_len = 0;
4946                 first->tx_flags |= IGB_TX_FLAGS_TSO |
4947                                    IGB_TX_FLAGS_CSUM |
4948                                    IGB_TX_FLAGS_IPV4;
4949         } else {
4950                 ip.v6->payload_len = 0;
4951                 first->tx_flags |= IGB_TX_FLAGS_TSO |
4952                                    IGB_TX_FLAGS_CSUM;
4953         }
4954
4955         /* determine offset of inner transport header */
4956         l4_offset = l4.hdr - skb->data;
4957
4958         /* compute length of segmentation header */
4959         *hdr_len = (l4.tcp->doff * 4) + l4_offset;
4960
4961         /* remove payload length from inner checksum */
4962         paylen = skb->len - l4_offset;
4963         csum_replace_by_diff(&l4.tcp->check, htonl(paylen));
4964
4965         /* update gso size and bytecount with header size */
4966         first->gso_segs = skb_shinfo(skb)->gso_segs;
4967         first->bytecount += (first->gso_segs - 1) * *hdr_len;
4968
4969         /* MSS L4LEN IDX */
4970         mss_l4len_idx = (*hdr_len - l4_offset) << E1000_ADVTXD_L4LEN_SHIFT;
4971         mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
4972
4973         /* VLAN MACLEN IPLEN */
4974         vlan_macip_lens = l4.hdr - ip.hdr;
4975         vlan_macip_lens |= (ip.hdr - skb->data) << E1000_ADVTXD_MACLEN_SHIFT;
4976         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
4977
4978         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
4979
4980         return 1;
4981 }
4982
4983 static inline bool igb_ipv6_csum_is_sctp(struct sk_buff *skb)
4984 {
4985         unsigned int offset = 0;
4986
4987         ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
4988
4989         return offset == skb_checksum_start_offset(skb);
4990 }
4991
4992 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
4993 {
4994         struct sk_buff *skb = first->skb;
4995         u32 vlan_macip_lens = 0;
4996         u32 type_tucmd = 0;
4997
4998         if (skb->ip_summed != CHECKSUM_PARTIAL) {
4999 csum_failed:
5000                 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
5001                         return;
5002                 goto no_csum;
5003         }
5004
5005         switch (skb->csum_offset) {
5006         case offsetof(struct tcphdr, check):
5007                 type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
5008                 /* fall through */
5009         case offsetof(struct udphdr, check):
5010                 break;
5011         case offsetof(struct sctphdr, checksum):
5012                 /* validate that this is actually an SCTP request */
5013                 if (((first->protocol == htons(ETH_P_IP)) &&
5014                      (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
5015                     ((first->protocol == htons(ETH_P_IPV6)) &&
5016                      igb_ipv6_csum_is_sctp(skb))) {
5017                         type_tucmd = E1000_ADVTXD_TUCMD_L4T_SCTP;
5018                         break;
5019                 }
5020         default:
5021                 skb_checksum_help(skb);
5022                 goto csum_failed;
5023         }
5024
5025         /* update TX checksum flag */
5026         first->tx_flags |= IGB_TX_FLAGS_CSUM;
5027         vlan_macip_lens = skb_checksum_start_offset(skb) -
5028                           skb_network_offset(skb);
5029 no_csum:
5030         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5031         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5032
5033         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, 0);
5034 }
5035
5036 #define IGB_SET_FLAG(_input, _flag, _result) \
5037         ((_flag <= _result) ? \
5038          ((u32)(_input & _flag) * (_result / _flag)) : \
5039          ((u32)(_input & _flag) / (_flag / _result)))
5040
5041 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
5042 {
5043         /* set type for advanced descriptor with frame checksum insertion */
5044         u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
5045                        E1000_ADVTXD_DCMD_DEXT |
5046                        E1000_ADVTXD_DCMD_IFCS;
5047
5048         /* set HW vlan bit if vlan is present */
5049         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
5050                                  (E1000_ADVTXD_DCMD_VLE));
5051
5052         /* set segmentation bits for TSO */
5053         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
5054                                  (E1000_ADVTXD_DCMD_TSE));
5055
5056         /* set timestamp bit if present */
5057         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
5058                                  (E1000_ADVTXD_MAC_TSTAMP));
5059
5060         /* insert frame checksum */
5061         cmd_type ^= IGB_SET_FLAG(skb->no_fcs, 1, E1000_ADVTXD_DCMD_IFCS);
5062
5063         return cmd_type;
5064 }
5065
5066 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
5067                                  union e1000_adv_tx_desc *tx_desc,
5068                                  u32 tx_flags, unsigned int paylen)
5069 {
5070         u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
5071
5072         /* 82575 requires a unique index per ring */
5073         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5074                 olinfo_status |= tx_ring->reg_idx << 4;
5075
5076         /* insert L4 checksum */
5077         olinfo_status |= IGB_SET_FLAG(tx_flags,
5078                                       IGB_TX_FLAGS_CSUM,
5079                                       (E1000_TXD_POPTS_TXSM << 8));
5080
5081         /* insert IPv4 checksum */
5082         olinfo_status |= IGB_SET_FLAG(tx_flags,
5083                                       IGB_TX_FLAGS_IPV4,
5084                                       (E1000_TXD_POPTS_IXSM << 8));
5085
5086         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
5087 }
5088
5089 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5090 {
5091         struct net_device *netdev = tx_ring->netdev;
5092
5093         netif_stop_subqueue(netdev, tx_ring->queue_index);
5094
5095         /* Herbert's original patch had:
5096          *  smp_mb__after_netif_stop_queue();
5097          * but since that doesn't exist yet, just open code it.
5098          */
5099         smp_mb();
5100
5101         /* We need to check again in a case another CPU has just
5102          * made room available.
5103          */
5104         if (igb_desc_unused(tx_ring) < size)
5105                 return -EBUSY;
5106
5107         /* A reprieve! */
5108         netif_wake_subqueue(netdev, tx_ring->queue_index);
5109
5110         u64_stats_update_begin(&tx_ring->tx_syncp2);
5111         tx_ring->tx_stats.restart_queue2++;
5112         u64_stats_update_end(&tx_ring->tx_syncp2);
5113
5114         return 0;
5115 }
5116
5117 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5118 {
5119         if (igb_desc_unused(tx_ring) >= size)
5120                 return 0;
5121         return __igb_maybe_stop_tx(tx_ring, size);
5122 }
5123
5124 static void igb_tx_map(struct igb_ring *tx_ring,
5125                        struct igb_tx_buffer *first,
5126                        const u8 hdr_len)
5127 {
5128         struct sk_buff *skb = first->skb;
5129         struct igb_tx_buffer *tx_buffer;
5130         union e1000_adv_tx_desc *tx_desc;
5131         struct skb_frag_struct *frag;
5132         dma_addr_t dma;
5133         unsigned int data_len, size;
5134         u32 tx_flags = first->tx_flags;
5135         u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
5136         u16 i = tx_ring->next_to_use;
5137
5138         tx_desc = IGB_TX_DESC(tx_ring, i);
5139
5140         igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
5141
5142         size = skb_headlen(skb);
5143         data_len = skb->data_len;
5144
5145         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
5146
5147         tx_buffer = first;
5148
5149         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
5150                 if (dma_mapping_error(tx_ring->dev, dma))
5151                         goto dma_error;
5152
5153                 /* record length, and DMA address */
5154                 dma_unmap_len_set(tx_buffer, len, size);
5155                 dma_unmap_addr_set(tx_buffer, dma, dma);
5156
5157                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
5158
5159                 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
5160                         tx_desc->read.cmd_type_len =
5161                                 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
5162
5163                         i++;
5164                         tx_desc++;
5165                         if (i == tx_ring->count) {
5166                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
5167                                 i = 0;
5168                         }
5169                         tx_desc->read.olinfo_status = 0;
5170
5171                         dma += IGB_MAX_DATA_PER_TXD;
5172                         size -= IGB_MAX_DATA_PER_TXD;
5173
5174                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
5175                 }
5176
5177                 if (likely(!data_len))
5178                         break;
5179
5180                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
5181
5182                 i++;
5183                 tx_desc++;
5184                 if (i == tx_ring->count) {
5185                         tx_desc = IGB_TX_DESC(tx_ring, 0);
5186                         i = 0;
5187                 }
5188                 tx_desc->read.olinfo_status = 0;
5189
5190                 size = skb_frag_size(frag);
5191                 data_len -= size;
5192
5193                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
5194                                        size, DMA_TO_DEVICE);
5195
5196                 tx_buffer = &tx_ring->tx_buffer_info[i];
5197         }
5198
5199         /* write last descriptor with RS and EOP bits */
5200         cmd_type |= size | IGB_TXD_DCMD;
5201         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
5202
5203         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
5204
5205         /* set the timestamp */
5206         first->time_stamp = jiffies;
5207
5208         /* Force memory writes to complete before letting h/w know there
5209          * are new descriptors to fetch.  (Only applicable for weak-ordered
5210          * memory model archs, such as IA-64).
5211          *
5212          * We also need this memory barrier to make certain all of the
5213          * status bits have been updated before next_to_watch is written.
5214          */
5215         wmb();
5216
5217         /* set next_to_watch value indicating a packet is present */
5218         first->next_to_watch = tx_desc;
5219
5220         i++;
5221         if (i == tx_ring->count)
5222                 i = 0;
5223
5224         tx_ring->next_to_use = i;
5225
5226         /* Make sure there is space in the ring for the next send. */
5227         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
5228
5229         if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
5230                 writel(i, tx_ring->tail);
5231
5232                 /* we need this if more than one processor can write to our tail
5233                  * at a time, it synchronizes IO on IA64/Altix systems
5234                  */
5235                 mmiowb();
5236         }
5237         return;
5238
5239 dma_error:
5240         dev_err(tx_ring->dev, "TX DMA map failed\n");
5241
5242         /* clear dma mappings for failed tx_buffer_info map */
5243         for (;;) {
5244                 tx_buffer = &tx_ring->tx_buffer_info[i];
5245                 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer);
5246                 if (tx_buffer == first)
5247                         break;
5248                 if (i == 0)
5249                         i = tx_ring->count;
5250                 i--;
5251         }
5252
5253         tx_ring->next_to_use = i;
5254 }
5255
5256 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
5257                                 struct igb_ring *tx_ring)
5258 {
5259         struct igb_tx_buffer *first;
5260         int tso;
5261         u32 tx_flags = 0;
5262         unsigned short f;
5263         u16 count = TXD_USE_COUNT(skb_headlen(skb));
5264         __be16 protocol = vlan_get_protocol(skb);
5265         u8 hdr_len = 0;
5266
5267         /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
5268          *       + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
5269          *       + 2 desc gap to keep tail from touching head,
5270          *       + 1 desc for context descriptor,
5271          * otherwise try next time
5272          */
5273         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
5274                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
5275
5276         if (igb_maybe_stop_tx(tx_ring, count + 3)) {
5277                 /* this is a hard error */
5278                 return NETDEV_TX_BUSY;
5279         }
5280
5281         /* record the location of the first descriptor for this packet */
5282         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
5283         first->skb = skb;
5284         first->bytecount = skb->len;
5285         first->gso_segs = 1;
5286
5287         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
5288                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
5289
5290                 if (!test_and_set_bit_lock(__IGB_PTP_TX_IN_PROGRESS,
5291                                            &adapter->state)) {
5292                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5293                         tx_flags |= IGB_TX_FLAGS_TSTAMP;
5294
5295                         adapter->ptp_tx_skb = skb_get(skb);
5296                         adapter->ptp_tx_start = jiffies;
5297                         if (adapter->hw.mac.type == e1000_82576)
5298                                 schedule_work(&adapter->ptp_tx_work);
5299                 }
5300         }
5301
5302         skb_tx_timestamp(skb);
5303
5304         if (skb_vlan_tag_present(skb)) {
5305                 tx_flags |= IGB_TX_FLAGS_VLAN;
5306                 tx_flags |= (skb_vlan_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
5307         }
5308
5309         /* record initial flags and protocol */
5310         first->tx_flags = tx_flags;
5311         first->protocol = protocol;
5312
5313         tso = igb_tso(tx_ring, first, &hdr_len);
5314         if (tso < 0)
5315                 goto out_drop;
5316         else if (!tso)
5317                 igb_tx_csum(tx_ring, first);
5318
5319         igb_tx_map(tx_ring, first, hdr_len);
5320
5321         return NETDEV_TX_OK;
5322
5323 out_drop:
5324         igb_unmap_and_free_tx_resource(tx_ring, first);
5325
5326         return NETDEV_TX_OK;
5327 }
5328
5329 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
5330                                                     struct sk_buff *skb)
5331 {
5332         unsigned int r_idx = skb->queue_mapping;
5333
5334         if (r_idx >= adapter->num_tx_queues)
5335                 r_idx = r_idx % adapter->num_tx_queues;
5336
5337         return adapter->tx_ring[r_idx];
5338 }
5339
5340 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
5341                                   struct net_device *netdev)
5342 {
5343         struct igb_adapter *adapter = netdev_priv(netdev);
5344
5345         /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
5346          * in order to meet this minimum size requirement.
5347          */
5348         if (skb_put_padto(skb, 17))
5349                 return NETDEV_TX_OK;
5350
5351         return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
5352 }
5353
5354 /**
5355  *  igb_tx_timeout - Respond to a Tx Hang
5356  *  @netdev: network interface device structure
5357  **/
5358 static void igb_tx_timeout(struct net_device *netdev)
5359 {
5360         struct igb_adapter *adapter = netdev_priv(netdev);
5361         struct e1000_hw *hw = &adapter->hw;
5362
5363         /* Do the reset outside of interrupt context */
5364         adapter->tx_timeout_count++;
5365
5366         if (hw->mac.type >= e1000_82580)
5367                 hw->dev_spec._82575.global_device_reset = true;
5368
5369         schedule_work(&adapter->reset_task);
5370         wr32(E1000_EICS,
5371              (adapter->eims_enable_mask & ~adapter->eims_other));
5372 }
5373
5374 static void igb_reset_task(struct work_struct *work)
5375 {
5376         struct igb_adapter *adapter;
5377         adapter = container_of(work, struct igb_adapter, reset_task);
5378
5379         igb_dump(adapter);
5380         netdev_err(adapter->netdev, "Reset adapter\n");
5381         igb_reinit_locked(adapter);
5382 }
5383
5384 /**
5385  *  igb_get_stats64 - Get System Network Statistics
5386  *  @netdev: network interface device structure
5387  *  @stats: rtnl_link_stats64 pointer
5388  **/
5389 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *netdev,
5390                                                 struct rtnl_link_stats64 *stats)
5391 {
5392         struct igb_adapter *adapter = netdev_priv(netdev);
5393
5394         spin_lock(&adapter->stats64_lock);
5395         igb_update_stats(adapter, &adapter->stats64);
5396         memcpy(stats, &adapter->stats64, sizeof(*stats));
5397         spin_unlock(&adapter->stats64_lock);
5398
5399         return stats;
5400 }
5401
5402 /**
5403  *  igb_change_mtu - Change the Maximum Transfer Unit
5404  *  @netdev: network interface device structure
5405  *  @new_mtu: new value for maximum frame size
5406  *
5407  *  Returns 0 on success, negative on failure
5408  **/
5409 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
5410 {
5411         struct igb_adapter *adapter = netdev_priv(netdev);
5412         struct pci_dev *pdev = adapter->pdev;
5413         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
5414
5415         if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
5416                 dev_err(&pdev->dev, "Invalid MTU setting\n");
5417                 return -EINVAL;
5418         }
5419
5420 #define MAX_STD_JUMBO_FRAME_SIZE 9238
5421         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
5422                 dev_err(&pdev->dev, "MTU > 9216 not supported.\n");
5423                 return -EINVAL;
5424         }
5425
5426         /* adjust max frame to be at least the size of a standard frame */
5427         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
5428                 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
5429
5430         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
5431                 usleep_range(1000, 2000);
5432
5433         /* igb_down has a dependency on max_frame_size */
5434         adapter->max_frame_size = max_frame;
5435
5436         if (netif_running(netdev))
5437                 igb_down(adapter);
5438
5439         dev_info(&pdev->dev, "changing MTU from %d to %d\n",
5440                  netdev->mtu, new_mtu);
5441         netdev->mtu = new_mtu;
5442
5443         if (netif_running(netdev))
5444                 igb_up(adapter);
5445         else
5446                 igb_reset(adapter);
5447
5448         clear_bit(__IGB_RESETTING, &adapter->state);
5449
5450         return 0;
5451 }
5452
5453 /**
5454  *  igb_update_stats - Update the board statistics counters
5455  *  @adapter: board private structure
5456  **/
5457 void igb_update_stats(struct igb_adapter *adapter,
5458                       struct rtnl_link_stats64 *net_stats)
5459 {
5460         struct e1000_hw *hw = &adapter->hw;
5461         struct pci_dev *pdev = adapter->pdev;
5462         u32 reg, mpc;
5463         int i;
5464         u64 bytes, packets;
5465         unsigned int start;
5466         u64 _bytes, _packets;
5467
5468         /* Prevent stats update while adapter is being reset, or if the pci
5469          * connection is down.
5470          */
5471         if (adapter->link_speed == 0)
5472                 return;
5473         if (pci_channel_offline(pdev))
5474                 return;
5475
5476         bytes = 0;
5477         packets = 0;
5478
5479         rcu_read_lock();
5480         for (i = 0; i < adapter->num_rx_queues; i++) {
5481                 struct igb_ring *ring = adapter->rx_ring[i];
5482                 u32 rqdpc = rd32(E1000_RQDPC(i));
5483                 if (hw->mac.type >= e1000_i210)
5484                         wr32(E1000_RQDPC(i), 0);
5485
5486                 if (rqdpc) {
5487                         ring->rx_stats.drops += rqdpc;
5488                         net_stats->rx_fifo_errors += rqdpc;
5489                 }
5490
5491                 do {
5492                         start = u64_stats_fetch_begin_irq(&ring->rx_syncp);
5493                         _bytes = ring->rx_stats.bytes;
5494                         _packets = ring->rx_stats.packets;
5495                 } while (u64_stats_fetch_retry_irq(&ring->rx_syncp, start));
5496                 bytes += _bytes;
5497                 packets += _packets;
5498         }
5499
5500         net_stats->rx_bytes = bytes;
5501         net_stats->rx_packets = packets;
5502
5503         bytes = 0;
5504         packets = 0;
5505         for (i = 0; i < adapter->num_tx_queues; i++) {
5506                 struct igb_ring *ring = adapter->tx_ring[i];
5507                 do {
5508                         start = u64_stats_fetch_begin_irq(&ring->tx_syncp);
5509                         _bytes = ring->tx_stats.bytes;
5510                         _packets = ring->tx_stats.packets;
5511                 } while (u64_stats_fetch_retry_irq(&ring->tx_syncp, start));
5512                 bytes += _bytes;
5513                 packets += _packets;
5514         }
5515         net_stats->tx_bytes = bytes;
5516         net_stats->tx_packets = packets;
5517         rcu_read_unlock();
5518
5519         /* read stats registers */
5520         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
5521         adapter->stats.gprc += rd32(E1000_GPRC);
5522         adapter->stats.gorc += rd32(E1000_GORCL);
5523         rd32(E1000_GORCH); /* clear GORCL */
5524         adapter->stats.bprc += rd32(E1000_BPRC);
5525         adapter->stats.mprc += rd32(E1000_MPRC);
5526         adapter->stats.roc += rd32(E1000_ROC);
5527
5528         adapter->stats.prc64 += rd32(E1000_PRC64);
5529         adapter->stats.prc127 += rd32(E1000_PRC127);
5530         adapter->stats.prc255 += rd32(E1000_PRC255);
5531         adapter->stats.prc511 += rd32(E1000_PRC511);
5532         adapter->stats.prc1023 += rd32(E1000_PRC1023);
5533         adapter->stats.prc1522 += rd32(E1000_PRC1522);
5534         adapter->stats.symerrs += rd32(E1000_SYMERRS);
5535         adapter->stats.sec += rd32(E1000_SEC);
5536
5537         mpc = rd32(E1000_MPC);
5538         adapter->stats.mpc += mpc;
5539         net_stats->rx_fifo_errors += mpc;
5540         adapter->stats.scc += rd32(E1000_SCC);
5541         adapter->stats.ecol += rd32(E1000_ECOL);
5542         adapter->stats.mcc += rd32(E1000_MCC);
5543         adapter->stats.latecol += rd32(E1000_LATECOL);
5544         adapter->stats.dc += rd32(E1000_DC);
5545         adapter->stats.rlec += rd32(E1000_RLEC);
5546         adapter->stats.xonrxc += rd32(E1000_XONRXC);
5547         adapter->stats.xontxc += rd32(E1000_XONTXC);
5548         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
5549         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
5550         adapter->stats.fcruc += rd32(E1000_FCRUC);
5551         adapter->stats.gptc += rd32(E1000_GPTC);
5552         adapter->stats.gotc += rd32(E1000_GOTCL);
5553         rd32(E1000_GOTCH); /* clear GOTCL */
5554         adapter->stats.rnbc += rd32(E1000_RNBC);
5555         adapter->stats.ruc += rd32(E1000_RUC);
5556         adapter->stats.rfc += rd32(E1000_RFC);
5557         adapter->stats.rjc += rd32(E1000_RJC);
5558         adapter->stats.tor += rd32(E1000_TORH);
5559         adapter->stats.tot += rd32(E1000_TOTH);
5560         adapter->stats.tpr += rd32(E1000_TPR);
5561
5562         adapter->stats.ptc64 += rd32(E1000_PTC64);
5563         adapter->stats.ptc127 += rd32(E1000_PTC127);
5564         adapter->stats.ptc255 += rd32(E1000_PTC255);
5565         adapter->stats.ptc511 += rd32(E1000_PTC511);
5566         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
5567         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
5568
5569         adapter->stats.mptc += rd32(E1000_MPTC);
5570         adapter->stats.bptc += rd32(E1000_BPTC);
5571
5572         adapter->stats.tpt += rd32(E1000_TPT);
5573         adapter->stats.colc += rd32(E1000_COLC);
5574
5575         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
5576         /* read internal phy specific stats */
5577         reg = rd32(E1000_CTRL_EXT);
5578         if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
5579                 adapter->stats.rxerrc += rd32(E1000_RXERRC);
5580
5581                 /* this stat has invalid values on i210/i211 */
5582                 if ((hw->mac.type != e1000_i210) &&
5583                     (hw->mac.type != e1000_i211))
5584                         adapter->stats.tncrs += rd32(E1000_TNCRS);
5585         }
5586
5587         adapter->stats.tsctc += rd32(E1000_TSCTC);
5588         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
5589
5590         adapter->stats.iac += rd32(E1000_IAC);
5591         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
5592         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
5593         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
5594         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
5595         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
5596         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
5597         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
5598         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
5599
5600         /* Fill out the OS statistics structure */
5601         net_stats->multicast = adapter->stats.mprc;
5602         net_stats->collisions = adapter->stats.colc;
5603
5604         /* Rx Errors */
5605
5606         /* RLEC on some newer hardware can be incorrect so build
5607          * our own version based on RUC and ROC
5608          */
5609         net_stats->rx_errors = adapter->stats.rxerrc +
5610                 adapter->stats.crcerrs + adapter->stats.algnerrc +
5611                 adapter->stats.ruc + adapter->stats.roc +
5612                 adapter->stats.cexterr;
5613         net_stats->rx_length_errors = adapter->stats.ruc +
5614                                       adapter->stats.roc;
5615         net_stats->rx_crc_errors = adapter->stats.crcerrs;
5616         net_stats->rx_frame_errors = adapter->stats.algnerrc;
5617         net_stats->rx_missed_errors = adapter->stats.mpc;
5618
5619         /* Tx Errors */
5620         net_stats->tx_errors = adapter->stats.ecol +
5621                                adapter->stats.latecol;
5622         net_stats->tx_aborted_errors = adapter->stats.ecol;
5623         net_stats->tx_window_errors = adapter->stats.latecol;
5624         net_stats->tx_carrier_errors = adapter->stats.tncrs;
5625
5626         /* Tx Dropped needs to be maintained elsewhere */
5627
5628         /* Management Stats */
5629         adapter->stats.mgptc += rd32(E1000_MGTPTC);
5630         adapter->stats.mgprc += rd32(E1000_MGTPRC);
5631         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
5632
5633         /* OS2BMC Stats */
5634         reg = rd32(E1000_MANC);
5635         if (reg & E1000_MANC_EN_BMC2OS) {
5636                 adapter->stats.o2bgptc += rd32(E1000_O2BGPTC);
5637                 adapter->stats.o2bspc += rd32(E1000_O2BSPC);
5638                 adapter->stats.b2ospc += rd32(E1000_B2OSPC);
5639                 adapter->stats.b2ogprc += rd32(E1000_B2OGPRC);
5640         }
5641 }
5642
5643 static void igb_tsync_interrupt(struct igb_adapter *adapter)
5644 {
5645         struct e1000_hw *hw = &adapter->hw;
5646         struct ptp_clock_event event;
5647         struct timespec64 ts;
5648         u32 ack = 0, tsauxc, sec, nsec, tsicr = rd32(E1000_TSICR);
5649
5650         if (tsicr & TSINTR_SYS_WRAP) {
5651                 event.type = PTP_CLOCK_PPS;
5652                 if (adapter->ptp_caps.pps)
5653                         ptp_clock_event(adapter->ptp_clock, &event);
5654                 else
5655                         dev_err(&adapter->pdev->dev, "unexpected SYS WRAP");
5656                 ack |= TSINTR_SYS_WRAP;
5657         }
5658
5659         if (tsicr & E1000_TSICR_TXTS) {
5660                 /* retrieve hardware timestamp */
5661                 schedule_work(&adapter->ptp_tx_work);
5662                 ack |= E1000_TSICR_TXTS;
5663         }
5664
5665         if (tsicr & TSINTR_TT0) {
5666                 spin_lock(&adapter->tmreg_lock);
5667                 ts = timespec64_add(adapter->perout[0].start,
5668                                     adapter->perout[0].period);
5669                 /* u32 conversion of tv_sec is safe until y2106 */
5670                 wr32(E1000_TRGTTIML0, ts.tv_nsec);
5671                 wr32(E1000_TRGTTIMH0, (u32)ts.tv_sec);
5672                 tsauxc = rd32(E1000_TSAUXC);
5673                 tsauxc |= TSAUXC_EN_TT0;
5674                 wr32(E1000_TSAUXC, tsauxc);
5675                 adapter->perout[0].start = ts;
5676                 spin_unlock(&adapter->tmreg_lock);
5677                 ack |= TSINTR_TT0;
5678         }
5679
5680         if (tsicr & TSINTR_TT1) {
5681                 spin_lock(&adapter->tmreg_lock);
5682                 ts = timespec64_add(adapter->perout[1].start,
5683                                     adapter->perout[1].period);
5684                 wr32(E1000_TRGTTIML1, ts.tv_nsec);
5685                 wr32(E1000_TRGTTIMH1, (u32)ts.tv_sec);
5686                 tsauxc = rd32(E1000_TSAUXC);
5687                 tsauxc |= TSAUXC_EN_TT1;
5688                 wr32(E1000_TSAUXC, tsauxc);
5689                 adapter->perout[1].start = ts;
5690                 spin_unlock(&adapter->tmreg_lock);
5691                 ack |= TSINTR_TT1;
5692         }
5693
5694         if (tsicr & TSINTR_AUTT0) {
5695                 nsec = rd32(E1000_AUXSTMPL0);
5696                 sec  = rd32(E1000_AUXSTMPH0);
5697                 event.type = PTP_CLOCK_EXTTS;
5698                 event.index = 0;
5699                 event.timestamp = sec * 1000000000ULL + nsec;
5700                 ptp_clock_event(adapter->ptp_clock, &event);
5701                 ack |= TSINTR_AUTT0;
5702         }
5703
5704         if (tsicr & TSINTR_AUTT1) {
5705                 nsec = rd32(E1000_AUXSTMPL1);
5706                 sec  = rd32(E1000_AUXSTMPH1);
5707                 event.type = PTP_CLOCK_EXTTS;
5708                 event.index = 1;
5709                 event.timestamp = sec * 1000000000ULL + nsec;
5710                 ptp_clock_event(adapter->ptp_clock, &event);
5711                 ack |= TSINTR_AUTT1;
5712         }
5713
5714         /* acknowledge the interrupts */
5715         wr32(E1000_TSICR, ack);
5716 }
5717
5718 static irqreturn_t igb_msix_other(int irq, void *data)
5719 {
5720         struct igb_adapter *adapter = data;
5721         struct e1000_hw *hw = &adapter->hw;
5722         u32 icr = rd32(E1000_ICR);
5723         /* reading ICR causes bit 31 of EICR to be cleared */
5724
5725         if (icr & E1000_ICR_DRSTA)
5726                 schedule_work(&adapter->reset_task);
5727
5728         if (icr & E1000_ICR_DOUTSYNC) {
5729                 /* HW is reporting DMA is out of sync */
5730                 adapter->stats.doosync++;
5731                 /* The DMA Out of Sync is also indication of a spoof event
5732                  * in IOV mode. Check the Wrong VM Behavior register to
5733                  * see if it is really a spoof event.
5734                  */
5735                 igb_check_wvbr(adapter);
5736         }
5737
5738         /* Check for a mailbox event */
5739         if (icr & E1000_ICR_VMMB)
5740                 igb_msg_task(adapter);
5741
5742         if (icr & E1000_ICR_LSC) {
5743                 hw->mac.get_link_status = 1;
5744                 /* guard against interrupt when we're going down */
5745                 if (!test_bit(__IGB_DOWN, &adapter->state))
5746                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
5747         }
5748
5749         if (icr & E1000_ICR_TS)
5750                 igb_tsync_interrupt(adapter);
5751
5752         wr32(E1000_EIMS, adapter->eims_other);
5753
5754         return IRQ_HANDLED;
5755 }
5756
5757 static void igb_write_itr(struct igb_q_vector *q_vector)
5758 {
5759         struct igb_adapter *adapter = q_vector->adapter;
5760         u32 itr_val = q_vector->itr_val & 0x7FFC;
5761
5762         if (!q_vector->set_itr)
5763                 return;
5764
5765         if (!itr_val)
5766                 itr_val = 0x4;
5767
5768         if (adapter->hw.mac.type == e1000_82575)
5769                 itr_val |= itr_val << 16;
5770         else
5771                 itr_val |= E1000_EITR_CNT_IGNR;
5772
5773         writel(itr_val, q_vector->itr_register);
5774         q_vector->set_itr = 0;
5775 }
5776
5777 static irqreturn_t igb_msix_ring(int irq, void *data)
5778 {
5779         struct igb_q_vector *q_vector = data;
5780
5781         /* Write the ITR value calculated from the previous interrupt. */
5782         igb_write_itr(q_vector);
5783
5784         napi_schedule(&q_vector->napi);
5785
5786         return IRQ_HANDLED;
5787 }
5788
5789 #ifdef CONFIG_IGB_DCA
5790 static void igb_update_tx_dca(struct igb_adapter *adapter,
5791                               struct igb_ring *tx_ring,
5792                               int cpu)
5793 {
5794         struct e1000_hw *hw = &adapter->hw;
5795         u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
5796
5797         if (hw->mac.type != e1000_82575)
5798                 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT;
5799
5800         /* We can enable relaxed ordering for reads, but not writes when
5801          * DCA is enabled.  This is due to a known issue in some chipsets
5802          * which will cause the DCA tag to be cleared.
5803          */
5804         txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
5805                   E1000_DCA_TXCTRL_DATA_RRO_EN |
5806                   E1000_DCA_TXCTRL_DESC_DCA_EN;
5807
5808         wr32(E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
5809 }
5810
5811 static void igb_update_rx_dca(struct igb_adapter *adapter,
5812                               struct igb_ring *rx_ring,
5813                               int cpu)
5814 {
5815         struct e1000_hw *hw = &adapter->hw;
5816         u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
5817
5818         if (hw->mac.type != e1000_82575)
5819                 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT;
5820
5821         /* We can enable relaxed ordering for reads, but not writes when
5822          * DCA is enabled.  This is due to a known issue in some chipsets
5823          * which will cause the DCA tag to be cleared.
5824          */
5825         rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
5826                   E1000_DCA_RXCTRL_DESC_DCA_EN;
5827
5828         wr32(E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
5829 }
5830
5831 static void igb_update_dca(struct igb_q_vector *q_vector)
5832 {
5833         struct igb_adapter *adapter = q_vector->adapter;
5834         int cpu = get_cpu();
5835
5836         if (q_vector->cpu == cpu)
5837                 goto out_no_update;
5838
5839         if (q_vector->tx.ring)
5840                 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
5841
5842         if (q_vector->rx.ring)
5843                 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
5844
5845         q_vector->cpu = cpu;
5846 out_no_update:
5847         put_cpu();
5848 }
5849
5850 static void igb_setup_dca(struct igb_adapter *adapter)
5851 {
5852         struct e1000_hw *hw = &adapter->hw;
5853         int i;
5854
5855         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
5856                 return;
5857
5858         /* Always use CB2 mode, difference is masked in the CB driver. */
5859         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
5860
5861         for (i = 0; i < adapter->num_q_vectors; i++) {
5862                 adapter->q_vector[i]->cpu = -1;
5863                 igb_update_dca(adapter->q_vector[i]);
5864         }
5865 }
5866
5867 static int __igb_notify_dca(struct device *dev, void *data)
5868 {
5869         struct net_device *netdev = dev_get_drvdata(dev);
5870         struct igb_adapter *adapter = netdev_priv(netdev);
5871         struct pci_dev *pdev = adapter->pdev;
5872         struct e1000_hw *hw = &adapter->hw;
5873         unsigned long event = *(unsigned long *)data;
5874
5875         switch (event) {
5876         case DCA_PROVIDER_ADD:
5877                 /* if already enabled, don't do it again */
5878                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
5879                         break;
5880                 if (dca_add_requester(dev) == 0) {
5881                         adapter->flags |= IGB_FLAG_DCA_ENABLED;
5882                         dev_info(&pdev->dev, "DCA enabled\n");
5883                         igb_setup_dca(adapter);
5884                         break;
5885                 }
5886                 /* Fall Through since DCA is disabled. */
5887         case DCA_PROVIDER_REMOVE:
5888                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
5889                         /* without this a class_device is left
5890                          * hanging around in the sysfs model
5891                          */
5892                         dca_remove_requester(dev);
5893                         dev_info(&pdev->dev, "DCA disabled\n");
5894                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
5895                         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
5896                 }
5897                 break;
5898         }
5899
5900         return 0;
5901 }
5902
5903 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
5904                           void *p)
5905 {
5906         int ret_val;
5907
5908         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
5909                                          __igb_notify_dca);
5910
5911         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
5912 }
5913 #endif /* CONFIG_IGB_DCA */
5914
5915 #ifdef CONFIG_PCI_IOV
5916 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
5917 {
5918         unsigned char mac_addr[ETH_ALEN];
5919
5920         eth_zero_addr(mac_addr);
5921         igb_set_vf_mac(adapter, vf, mac_addr);
5922
5923         /* By default spoof check is enabled for all VFs */
5924         adapter->vf_data[vf].spoofchk_enabled = true;
5925
5926         return 0;
5927 }
5928
5929 #endif
5930 static void igb_ping_all_vfs(struct igb_adapter *adapter)
5931 {
5932         struct e1000_hw *hw = &adapter->hw;
5933         u32 ping;
5934         int i;
5935
5936         for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
5937                 ping = E1000_PF_CONTROL_MSG;
5938                 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
5939                         ping |= E1000_VT_MSGTYPE_CTS;
5940                 igb_write_mbx(hw, &ping, 1, i);
5941         }
5942 }
5943
5944 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
5945 {
5946         struct e1000_hw *hw = &adapter->hw;
5947         u32 vmolr = rd32(E1000_VMOLR(vf));
5948         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5949
5950         vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
5951                             IGB_VF_FLAG_MULTI_PROMISC);
5952         vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5953
5954         if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
5955                 vmolr |= E1000_VMOLR_MPME;
5956                 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
5957                 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
5958         } else {
5959                 /* if we have hashes and we are clearing a multicast promisc
5960                  * flag we need to write the hashes to the MTA as this step
5961                  * was previously skipped
5962                  */
5963                 if (vf_data->num_vf_mc_hashes > 30) {
5964                         vmolr |= E1000_VMOLR_MPME;
5965                 } else if (vf_data->num_vf_mc_hashes) {
5966                         int j;
5967
5968                         vmolr |= E1000_VMOLR_ROMPE;
5969                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5970                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5971                 }
5972         }
5973
5974         wr32(E1000_VMOLR(vf), vmolr);
5975
5976         /* there are flags left unprocessed, likely not supported */
5977         if (*msgbuf & E1000_VT_MSGINFO_MASK)
5978                 return -EINVAL;
5979
5980         return 0;
5981 }
5982
5983 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
5984                                   u32 *msgbuf, u32 vf)
5985 {
5986         int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
5987         u16 *hash_list = (u16 *)&msgbuf[1];
5988         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5989         int i;
5990
5991         /* salt away the number of multicast addresses assigned
5992          * to this VF for later use to restore when the PF multi cast
5993          * list changes
5994          */
5995         vf_data->num_vf_mc_hashes = n;
5996
5997         /* only up to 30 hash values supported */
5998         if (n > 30)
5999                 n = 30;
6000
6001         /* store the hashes for later use */
6002         for (i = 0; i < n; i++)
6003                 vf_data->vf_mc_hashes[i] = hash_list[i];
6004
6005         /* Flush and reset the mta with the new values */
6006         igb_set_rx_mode(adapter->netdev);
6007
6008         return 0;
6009 }
6010
6011 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
6012 {
6013         struct e1000_hw *hw = &adapter->hw;
6014         struct vf_data_storage *vf_data;
6015         int i, j;
6016
6017         for (i = 0; i < adapter->vfs_allocated_count; i++) {
6018                 u32 vmolr = rd32(E1000_VMOLR(i));
6019
6020                 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6021
6022                 vf_data = &adapter->vf_data[i];
6023
6024                 if ((vf_data->num_vf_mc_hashes > 30) ||
6025                     (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
6026                         vmolr |= E1000_VMOLR_MPME;
6027                 } else if (vf_data->num_vf_mc_hashes) {
6028                         vmolr |= E1000_VMOLR_ROMPE;
6029                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6030                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
6031                 }
6032                 wr32(E1000_VMOLR(i), vmolr);
6033         }
6034 }
6035
6036 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
6037 {
6038         struct e1000_hw *hw = &adapter->hw;
6039         u32 pool_mask, vlvf_mask, i;
6040
6041         /* create mask for VF and other pools */
6042         pool_mask = E1000_VLVF_POOLSEL_MASK;
6043         vlvf_mask = BIT(E1000_VLVF_POOLSEL_SHIFT + vf);
6044
6045         /* drop PF from pool bits */
6046         pool_mask &= ~BIT(E1000_VLVF_POOLSEL_SHIFT +
6047                              adapter->vfs_allocated_count);
6048
6049         /* Find the vlan filter for this id */
6050         for (i = E1000_VLVF_ARRAY_SIZE; i--;) {
6051                 u32 vlvf = rd32(E1000_VLVF(i));
6052                 u32 vfta_mask, vid, vfta;
6053
6054                 /* remove the vf from the pool */
6055                 if (!(vlvf & vlvf_mask))
6056                         continue;
6057
6058                 /* clear out bit from VLVF */
6059                 vlvf ^= vlvf_mask;
6060
6061                 /* if other pools are present, just remove ourselves */
6062                 if (vlvf & pool_mask)
6063                         goto update_vlvfb;
6064
6065                 /* if PF is present, leave VFTA */
6066                 if (vlvf & E1000_VLVF_POOLSEL_MASK)
6067                         goto update_vlvf;
6068
6069                 vid = vlvf & E1000_VLVF_VLANID_MASK;
6070                 vfta_mask = BIT(vid % 32);
6071
6072                 /* clear bit from VFTA */
6073                 vfta = adapter->shadow_vfta[vid / 32];
6074                 if (vfta & vfta_mask)
6075                         hw->mac.ops.write_vfta(hw, vid / 32, vfta ^ vfta_mask);
6076 update_vlvf:
6077                 /* clear pool selection enable */
6078                 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
6079                         vlvf &= E1000_VLVF_POOLSEL_MASK;
6080                 else
6081                         vlvf = 0;
6082 update_vlvfb:
6083                 /* clear pool bits */
6084                 wr32(E1000_VLVF(i), vlvf);
6085         }
6086 }
6087
6088 static int igb_find_vlvf_entry(struct e1000_hw *hw, u32 vlan)
6089 {
6090         u32 vlvf;
6091         int idx;
6092
6093         /* short cut the special case */
6094         if (vlan == 0)
6095                 return 0;
6096
6097         /* Search for the VLAN id in the VLVF entries */
6098         for (idx = E1000_VLVF_ARRAY_SIZE; --idx;) {
6099                 vlvf = rd32(E1000_VLVF(idx));
6100                 if ((vlvf & VLAN_VID_MASK) == vlan)
6101                         break;
6102         }
6103
6104         return idx;
6105 }
6106
6107 static void igb_update_pf_vlvf(struct igb_adapter *adapter, u32 vid)
6108 {
6109         struct e1000_hw *hw = &adapter->hw;
6110         u32 bits, pf_id;
6111         int idx;
6112
6113         idx = igb_find_vlvf_entry(hw, vid);
6114         if (!idx)
6115                 return;
6116
6117         /* See if any other pools are set for this VLAN filter
6118          * entry other than the PF.
6119          */
6120         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
6121         bits = ~BIT(pf_id) & E1000_VLVF_POOLSEL_MASK;
6122         bits &= rd32(E1000_VLVF(idx));
6123
6124         /* Disable the filter so this falls into the default pool. */
6125         if (!bits) {
6126                 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
6127                         wr32(E1000_VLVF(idx), BIT(pf_id));
6128                 else
6129                         wr32(E1000_VLVF(idx), 0);
6130         }
6131 }
6132
6133 static s32 igb_set_vf_vlan(struct igb_adapter *adapter, u32 vid,
6134                            bool add, u32 vf)
6135 {
6136         int pf_id = adapter->vfs_allocated_count;
6137         struct e1000_hw *hw = &adapter->hw;
6138         int err;
6139
6140         /* If VLAN overlaps with one the PF is currently monitoring make
6141          * sure that we are able to allocate a VLVF entry.  This may be
6142          * redundant but it guarantees PF will maintain visibility to
6143          * the VLAN.
6144          */
6145         if (add && test_bit(vid, adapter->active_vlans)) {
6146                 err = igb_vfta_set(hw, vid, pf_id, true, false);
6147                 if (err)
6148                         return err;
6149         }
6150
6151         err = igb_vfta_set(hw, vid, vf, add, false);
6152
6153         if (add && !err)
6154                 return err;
6155
6156         /* If we failed to add the VF VLAN or we are removing the VF VLAN
6157          * we may need to drop the PF pool bit in order to allow us to free
6158          * up the VLVF resources.
6159          */
6160         if (test_bit(vid, adapter->active_vlans) ||
6161             (adapter->flags & IGB_FLAG_VLAN_PROMISC))
6162                 igb_update_pf_vlvf(adapter, vid);
6163
6164         return err;
6165 }
6166
6167 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
6168 {
6169         struct e1000_hw *hw = &adapter->hw;
6170
6171         if (vid)
6172                 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
6173         else
6174                 wr32(E1000_VMVIR(vf), 0);
6175 }
6176
6177 static int igb_enable_port_vlan(struct igb_adapter *adapter, int vf,
6178                                 u16 vlan, u8 qos)
6179 {
6180         int err;
6181
6182         err = igb_set_vf_vlan(adapter, vlan, true, vf);
6183         if (err)
6184                 return err;
6185
6186         igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
6187         igb_set_vmolr(adapter, vf, !vlan);
6188
6189         /* revoke access to previous VLAN */
6190         if (vlan != adapter->vf_data[vf].pf_vlan)
6191                 igb_set_vf_vlan(adapter, adapter->vf_data[vf].pf_vlan,
6192                                 false, vf);
6193
6194         adapter->vf_data[vf].pf_vlan = vlan;
6195         adapter->vf_data[vf].pf_qos = qos;
6196         igb_set_vf_vlan_strip(adapter, vf, true);
6197         dev_info(&adapter->pdev->dev,
6198                  "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
6199         if (test_bit(__IGB_DOWN, &adapter->state)) {
6200                 dev_warn(&adapter->pdev->dev,
6201                          "The VF VLAN has been set, but the PF device is not up.\n");
6202                 dev_warn(&adapter->pdev->dev,
6203                          "Bring the PF device up before attempting to use the VF device.\n");
6204         }
6205
6206         return err;
6207 }
6208
6209 static int igb_disable_port_vlan(struct igb_adapter *adapter, int vf)
6210 {
6211         /* Restore tagless access via VLAN 0 */
6212         igb_set_vf_vlan(adapter, 0, true, vf);
6213
6214         igb_set_vmvir(adapter, 0, vf);
6215         igb_set_vmolr(adapter, vf, true);
6216
6217         /* Remove any PF assigned VLAN */
6218         if (adapter->vf_data[vf].pf_vlan)
6219                 igb_set_vf_vlan(adapter, adapter->vf_data[vf].pf_vlan,
6220                                 false, vf);
6221
6222         adapter->vf_data[vf].pf_vlan = 0;
6223         adapter->vf_data[vf].pf_qos = 0;
6224         igb_set_vf_vlan_strip(adapter, vf, false);
6225
6226         return 0;
6227 }
6228
6229 static int igb_ndo_set_vf_vlan(struct net_device *netdev, int vf,
6230                                u16 vlan, u8 qos, __be16 vlan_proto)
6231 {
6232         struct igb_adapter *adapter = netdev_priv(netdev);
6233
6234         if ((vf >= adapter->vfs_allocated_count) || (vlan > 4095) || (qos > 7))
6235                 return -EINVAL;
6236
6237         if (vlan_proto != htons(ETH_P_8021Q))
6238                 return -EPROTONOSUPPORT;
6239
6240         return (vlan || qos) ? igb_enable_port_vlan(adapter, vf, vlan, qos) :
6241                                igb_disable_port_vlan(adapter, vf);
6242 }
6243
6244 static int igb_set_vf_vlan_msg(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6245 {
6246         int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6247         int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
6248         int ret;
6249
6250         if (adapter->vf_data[vf].pf_vlan)
6251                 return -1;
6252
6253         /* VLAN 0 is a special case, don't allow it to be removed */
6254         if (!vid && !add)
6255                 return 0;
6256
6257         ret = igb_set_vf_vlan(adapter, vid, !!add, vf);
6258         if (!ret)
6259                 igb_set_vf_vlan_strip(adapter, vf, !!vid);
6260         return ret;
6261 }
6262
6263 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
6264 {
6265         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6266
6267         /* clear flags - except flag that indicates PF has set the MAC */
6268         vf_data->flags &= IGB_VF_FLAG_PF_SET_MAC;
6269         vf_data->last_nack = jiffies;
6270
6271         /* reset vlans for device */
6272         igb_clear_vf_vfta(adapter, vf);
6273         igb_set_vf_vlan(adapter, vf_data->pf_vlan, true, vf);
6274         igb_set_vmvir(adapter, vf_data->pf_vlan |
6275                                (vf_data->pf_qos << VLAN_PRIO_SHIFT), vf);
6276         igb_set_vmolr(adapter, vf, !vf_data->pf_vlan);
6277         igb_set_vf_vlan_strip(adapter, vf, !!(vf_data->pf_vlan));
6278
6279         /* reset multicast table array for vf */
6280         adapter->vf_data[vf].num_vf_mc_hashes = 0;
6281
6282         /* Flush and reset the mta with the new values */
6283         igb_set_rx_mode(adapter->netdev);
6284 }
6285
6286 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
6287 {
6288         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6289
6290         /* clear mac address as we were hotplug removed/added */
6291         if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
6292                 eth_zero_addr(vf_mac);
6293
6294         /* process remaining reset events */
6295         igb_vf_reset(adapter, vf);
6296 }
6297
6298 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
6299 {
6300         struct e1000_hw *hw = &adapter->hw;
6301         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6302         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
6303         u32 reg, msgbuf[3];
6304         u8 *addr = (u8 *)(&msgbuf[1]);
6305
6306         /* process all the same items cleared in a function level reset */
6307         igb_vf_reset(adapter, vf);
6308
6309         /* set vf mac address */
6310         igb_rar_set_qsel(adapter, vf_mac, rar_entry, vf);
6311
6312         /* enable transmit and receive for vf */
6313         reg = rd32(E1000_VFTE);
6314         wr32(E1000_VFTE, reg | BIT(vf));
6315         reg = rd32(E1000_VFRE);
6316         wr32(E1000_VFRE, reg | BIT(vf));
6317
6318         adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
6319
6320         /* reply to reset with ack and vf mac address */
6321         if (!is_zero_ether_addr(vf_mac)) {
6322                 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
6323                 memcpy(addr, vf_mac, ETH_ALEN);
6324         } else {
6325                 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_NACK;
6326         }
6327         igb_write_mbx(hw, msgbuf, 3, vf);
6328 }
6329
6330 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
6331 {
6332         /* The VF MAC Address is stored in a packed array of bytes
6333          * starting at the second 32 bit word of the msg array
6334          */
6335         unsigned char *addr = (char *)&msg[1];
6336         int err = -1;
6337
6338         if (is_valid_ether_addr(addr))
6339                 err = igb_set_vf_mac(adapter, vf, addr);
6340
6341         return err;
6342 }
6343
6344 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
6345 {
6346         struct e1000_hw *hw = &adapter->hw;
6347         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6348         u32 msg = E1000_VT_MSGTYPE_NACK;
6349
6350         /* if device isn't clear to send it shouldn't be reading either */
6351         if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
6352             time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6353                 igb_write_mbx(hw, &msg, 1, vf);
6354                 vf_data->last_nack = jiffies;
6355         }
6356 }
6357
6358 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
6359 {
6360         struct pci_dev *pdev = adapter->pdev;
6361         u32 msgbuf[E1000_VFMAILBOX_SIZE];
6362         struct e1000_hw *hw = &adapter->hw;
6363         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6364         s32 retval;
6365
6366         retval = igb_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
6367
6368         if (retval) {
6369                 /* if receive failed revoke VF CTS stats and restart init */
6370                 dev_err(&pdev->dev, "Error receiving message from VF\n");
6371                 vf_data->flags &= ~IGB_VF_FLAG_CTS;
6372                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
6373                         return;
6374                 goto out;
6375         }
6376
6377         /* this is a message we already processed, do nothing */
6378         if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
6379                 return;
6380
6381         /* until the vf completes a reset it should not be
6382          * allowed to start any configuration.
6383          */
6384         if (msgbuf[0] == E1000_VF_RESET) {
6385                 igb_vf_reset_msg(adapter, vf);
6386                 return;
6387         }
6388
6389         if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
6390                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
6391                         return;
6392                 retval = -1;
6393                 goto out;
6394         }
6395
6396         switch ((msgbuf[0] & 0xFFFF)) {
6397         case E1000_VF_SET_MAC_ADDR:
6398                 retval = -EINVAL;
6399                 if (!(vf_data->flags & IGB_VF_FLAG_PF_SET_MAC))
6400                         retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
6401                 else
6402                         dev_warn(&pdev->dev,
6403                                  "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
6404                                  vf);
6405                 break;
6406         case E1000_VF_SET_PROMISC:
6407                 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
6408                 break;
6409         case E1000_VF_SET_MULTICAST:
6410                 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
6411                 break;
6412         case E1000_VF_SET_LPE:
6413                 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
6414                 break;
6415         case E1000_VF_SET_VLAN:
6416                 retval = -1;
6417                 if (vf_data->pf_vlan)
6418                         dev_warn(&pdev->dev,
6419                                  "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
6420                                  vf);
6421                 else
6422                         retval = igb_set_vf_vlan_msg(adapter, msgbuf, vf);
6423                 break;
6424         default:
6425                 dev_err(&pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]);
6426                 retval = -1;
6427                 break;
6428         }
6429
6430         msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
6431 out:
6432         /* notify the VF of the results of what it sent us */
6433         if (retval)
6434                 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
6435         else
6436                 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
6437
6438         igb_write_mbx(hw, msgbuf, 1, vf);
6439 }
6440
6441 static void igb_msg_task(struct igb_adapter *adapter)
6442 {
6443         struct e1000_hw *hw = &adapter->hw;
6444         u32 vf;
6445
6446         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
6447                 /* process any reset requests */
6448                 if (!igb_check_for_rst(hw, vf))
6449                         igb_vf_reset_event(adapter, vf);
6450
6451                 /* process any messages pending */
6452                 if (!igb_check_for_msg(hw, vf))
6453                         igb_rcv_msg_from_vf(adapter, vf);
6454
6455                 /* process any acks */
6456                 if (!igb_check_for_ack(hw, vf))
6457                         igb_rcv_ack_from_vf(adapter, vf);
6458         }
6459 }
6460
6461 /**
6462  *  igb_set_uta - Set unicast filter table address
6463  *  @adapter: board private structure
6464  *  @set: boolean indicating if we are setting or clearing bits
6465  *
6466  *  The unicast table address is a register array of 32-bit registers.
6467  *  The table is meant to be used in a way similar to how the MTA is used
6468  *  however due to certain limitations in the hardware it is necessary to
6469  *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
6470  *  enable bit to allow vlan tag stripping when promiscuous mode is enabled
6471  **/
6472 static void igb_set_uta(struct igb_adapter *adapter, bool set)
6473 {
6474         struct e1000_hw *hw = &adapter->hw;
6475         u32 uta = set ? ~0 : 0;
6476         int i;
6477
6478         /* we only need to do this if VMDq is enabled */
6479         if (!adapter->vfs_allocated_count)
6480                 return;
6481
6482         for (i = hw->mac.uta_reg_count; i--;)
6483                 array_wr32(E1000_UTA, i, uta);
6484 }
6485
6486 /**
6487  *  igb_intr_msi - Interrupt Handler
6488  *  @irq: interrupt number
6489  *  @data: pointer to a network interface device structure
6490  **/
6491 static irqreturn_t igb_intr_msi(int irq, void *data)
6492 {
6493         struct igb_adapter *adapter = data;
6494         struct igb_q_vector *q_vector = adapter->q_vector[0];
6495         struct e1000_hw *hw = &adapter->hw;
6496         /* read ICR disables interrupts using IAM */
6497         u32 icr = rd32(E1000_ICR);
6498
6499         igb_write_itr(q_vector);
6500
6501         if (icr & E1000_ICR_DRSTA)
6502                 schedule_work(&adapter->reset_task);
6503
6504         if (icr & E1000_ICR_DOUTSYNC) {
6505                 /* HW is reporting DMA is out of sync */
6506                 adapter->stats.doosync++;
6507         }
6508
6509         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6510                 hw->mac.get_link_status = 1;
6511                 if (!test_bit(__IGB_DOWN, &adapter->state))
6512                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6513         }
6514
6515         if (icr & E1000_ICR_TS)
6516                 igb_tsync_interrupt(adapter);
6517
6518         napi_schedule(&q_vector->napi);
6519
6520         return IRQ_HANDLED;
6521 }
6522
6523 /**
6524  *  igb_intr - Legacy Interrupt Handler
6525  *  @irq: interrupt number
6526  *  @data: pointer to a network interface device structure
6527  **/
6528 static irqreturn_t igb_intr(int irq, void *data)
6529 {
6530         struct igb_adapter *adapter = data;
6531         struct igb_q_vector *q_vector = adapter->q_vector[0];
6532         struct e1000_hw *hw = &adapter->hw;
6533         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
6534          * need for the IMC write
6535          */
6536         u32 icr = rd32(E1000_ICR);
6537
6538         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
6539          * not set, then the adapter didn't send an interrupt
6540          */
6541         if (!(icr & E1000_ICR_INT_ASSERTED))
6542                 return IRQ_NONE;
6543
6544         igb_write_itr(q_vector);
6545
6546         if (icr & E1000_ICR_DRSTA)
6547                 schedule_work(&adapter->reset_task);
6548
6549         if (icr & E1000_ICR_DOUTSYNC) {
6550                 /* HW is reporting DMA is out of sync */
6551                 adapter->stats.doosync++;
6552         }
6553
6554         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6555                 hw->mac.get_link_status = 1;
6556                 /* guard against interrupt when we're going down */
6557                 if (!test_bit(__IGB_DOWN, &adapter->state))
6558                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6559         }
6560
6561         if (icr & E1000_ICR_TS)
6562                 igb_tsync_interrupt(adapter);
6563
6564         napi_schedule(&q_vector->napi);
6565
6566         return IRQ_HANDLED;
6567 }
6568
6569 static void igb_ring_irq_enable(struct igb_q_vector *q_vector)
6570 {
6571         struct igb_adapter *adapter = q_vector->adapter;
6572         struct e1000_hw *hw = &adapter->hw;
6573
6574         if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
6575             (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
6576                 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
6577                         igb_set_itr(q_vector);
6578                 else
6579                         igb_update_ring_itr(q_vector);
6580         }
6581
6582         if (!test_bit(__IGB_DOWN, &adapter->state)) {
6583                 if (adapter->flags & IGB_FLAG_HAS_MSIX)
6584                         wr32(E1000_EIMS, q_vector->eims_value);
6585                 else
6586                         igb_irq_enable(adapter);
6587         }
6588 }
6589
6590 /**
6591  *  igb_poll - NAPI Rx polling callback
6592  *  @napi: napi polling structure
6593  *  @budget: count of how many packets we should handle
6594  **/
6595 static int igb_poll(struct napi_struct *napi, int budget)
6596 {
6597         struct igb_q_vector *q_vector = container_of(napi,
6598                                                      struct igb_q_vector,
6599                                                      napi);
6600         bool clean_complete = true;
6601         int work_done = 0;
6602
6603 #ifdef CONFIG_IGB_DCA
6604         if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
6605                 igb_update_dca(q_vector);
6606 #endif
6607         if (q_vector->tx.ring)
6608                 clean_complete = igb_clean_tx_irq(q_vector, budget);
6609
6610         if (q_vector->rx.ring) {
6611                 int cleaned = igb_clean_rx_irq(q_vector, budget);
6612
6613                 work_done += cleaned;
6614                 if (cleaned >= budget)
6615                         clean_complete = false;
6616         }
6617
6618         /* If all work not completed, return budget and keep polling */
6619         if (!clean_complete)
6620                 return budget;
6621
6622         /* If not enough Rx work done, exit the polling mode */
6623         napi_complete_done(napi, work_done);
6624         igb_ring_irq_enable(q_vector);
6625
6626         return 0;
6627 }
6628
6629 /**
6630  *  igb_clean_tx_irq - Reclaim resources after transmit completes
6631  *  @q_vector: pointer to q_vector containing needed info
6632  *  @napi_budget: Used to determine if we are in netpoll
6633  *
6634  *  returns true if ring is completely cleaned
6635  **/
6636 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector, int napi_budget)
6637 {
6638         struct igb_adapter *adapter = q_vector->adapter;
6639         struct igb_ring *tx_ring = q_vector->tx.ring;
6640         struct igb_tx_buffer *tx_buffer;
6641         union e1000_adv_tx_desc *tx_desc;
6642         unsigned int total_bytes = 0, total_packets = 0;
6643         unsigned int budget = q_vector->tx.work_limit;
6644         unsigned int i = tx_ring->next_to_clean;
6645
6646         if (test_bit(__IGB_DOWN, &adapter->state))
6647                 return true;
6648
6649         tx_buffer = &tx_ring->tx_buffer_info[i];
6650         tx_desc = IGB_TX_DESC(tx_ring, i);
6651         i -= tx_ring->count;
6652
6653         do {
6654                 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
6655
6656                 /* if next_to_watch is not set then there is no work pending */
6657                 if (!eop_desc)
6658                         break;
6659
6660                 /* prevent any other reads prior to eop_desc */
6661                 read_barrier_depends();
6662
6663                 /* if DD is not set pending work has not been completed */
6664                 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
6665                         break;
6666
6667                 /* clear next_to_watch to prevent false hangs */
6668                 tx_buffer->next_to_watch = NULL;
6669
6670                 /* update the statistics for this packet */
6671                 total_bytes += tx_buffer->bytecount;
6672                 total_packets += tx_buffer->gso_segs;
6673
6674                 /* free the skb */
6675                 napi_consume_skb(tx_buffer->skb, napi_budget);
6676
6677                 /* unmap skb header data */
6678                 dma_unmap_single(tx_ring->dev,
6679                                  dma_unmap_addr(tx_buffer, dma),
6680                                  dma_unmap_len(tx_buffer, len),
6681                                  DMA_TO_DEVICE);
6682
6683                 /* clear tx_buffer data */
6684                 tx_buffer->skb = NULL;
6685                 dma_unmap_len_set(tx_buffer, len, 0);
6686
6687                 /* clear last DMA location and unmap remaining buffers */
6688                 while (tx_desc != eop_desc) {
6689                         tx_buffer++;
6690                         tx_desc++;
6691                         i++;
6692                         if (unlikely(!i)) {
6693                                 i -= tx_ring->count;
6694                                 tx_buffer = tx_ring->tx_buffer_info;
6695                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
6696                         }
6697
6698                         /* unmap any remaining paged data */
6699                         if (dma_unmap_len(tx_buffer, len)) {
6700                                 dma_unmap_page(tx_ring->dev,
6701                                                dma_unmap_addr(tx_buffer, dma),
6702                                                dma_unmap_len(tx_buffer, len),
6703                                                DMA_TO_DEVICE);
6704                                 dma_unmap_len_set(tx_buffer, len, 0);
6705                         }
6706                 }
6707
6708                 /* move us one more past the eop_desc for start of next pkt */
6709                 tx_buffer++;
6710                 tx_desc++;
6711                 i++;
6712                 if (unlikely(!i)) {
6713                         i -= tx_ring->count;
6714                         tx_buffer = tx_ring->tx_buffer_info;
6715                         tx_desc = IGB_TX_DESC(tx_ring, 0);
6716                 }
6717
6718                 /* issue prefetch for next Tx descriptor */
6719                 prefetch(tx_desc);
6720
6721                 /* update budget accounting */
6722                 budget--;
6723         } while (likely(budget));
6724
6725         netdev_tx_completed_queue(txring_txq(tx_ring),
6726                                   total_packets, total_bytes);
6727         i += tx_ring->count;
6728         tx_ring->next_to_clean = i;
6729         u64_stats_update_begin(&tx_ring->tx_syncp);
6730         tx_ring->tx_stats.bytes += total_bytes;
6731         tx_ring->tx_stats.packets += total_packets;
6732         u64_stats_update_end(&tx_ring->tx_syncp);
6733         q_vector->tx.total_bytes += total_bytes;
6734         q_vector->tx.total_packets += total_packets;
6735
6736         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
6737                 struct e1000_hw *hw = &adapter->hw;
6738
6739                 /* Detect a transmit hang in hardware, this serializes the
6740                  * check with the clearing of time_stamp and movement of i
6741                  */
6742                 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
6743                 if (tx_buffer->next_to_watch &&
6744                     time_after(jiffies, tx_buffer->time_stamp +
6745                                (adapter->tx_timeout_factor * HZ)) &&
6746                     !(rd32(E1000_STATUS) & E1000_STATUS_TXOFF)) {
6747
6748                         /* detected Tx unit hang */
6749                         dev_err(tx_ring->dev,
6750                                 "Detected Tx Unit Hang\n"
6751                                 "  Tx Queue             <%d>\n"
6752                                 "  TDH                  <%x>\n"
6753                                 "  TDT                  <%x>\n"
6754                                 "  next_to_use          <%x>\n"
6755                                 "  next_to_clean        <%x>\n"
6756                                 "buffer_info[next_to_clean]\n"
6757                                 "  time_stamp           <%lx>\n"
6758                                 "  next_to_watch        <%p>\n"
6759                                 "  jiffies              <%lx>\n"
6760                                 "  desc.status          <%x>\n",
6761                                 tx_ring->queue_index,
6762                                 rd32(E1000_TDH(tx_ring->reg_idx)),
6763                                 readl(tx_ring->tail),
6764                                 tx_ring->next_to_use,
6765                                 tx_ring->next_to_clean,
6766                                 tx_buffer->time_stamp,
6767                                 tx_buffer->next_to_watch,
6768                                 jiffies,
6769                                 tx_buffer->next_to_watch->wb.status);
6770                         netif_stop_subqueue(tx_ring->netdev,
6771                                             tx_ring->queue_index);
6772
6773                         /* we are about to reset, no point in enabling stuff */
6774                         return true;
6775                 }
6776         }
6777
6778 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
6779         if (unlikely(total_packets &&
6780             netif_carrier_ok(tx_ring->netdev) &&
6781             igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
6782                 /* Make sure that anybody stopping the queue after this
6783                  * sees the new next_to_clean.
6784                  */
6785                 smp_mb();
6786                 if (__netif_subqueue_stopped(tx_ring->netdev,
6787                                              tx_ring->queue_index) &&
6788                     !(test_bit(__IGB_DOWN, &adapter->state))) {
6789                         netif_wake_subqueue(tx_ring->netdev,
6790                                             tx_ring->queue_index);
6791
6792                         u64_stats_update_begin(&tx_ring->tx_syncp);
6793                         tx_ring->tx_stats.restart_queue++;
6794                         u64_stats_update_end(&tx_ring->tx_syncp);
6795                 }
6796         }
6797
6798         return !!budget;
6799 }
6800
6801 /**
6802  *  igb_reuse_rx_page - page flip buffer and store it back on the ring
6803  *  @rx_ring: rx descriptor ring to store buffers on
6804  *  @old_buff: donor buffer to have page reused
6805  *
6806  *  Synchronizes page for reuse by the adapter
6807  **/
6808 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
6809                               struct igb_rx_buffer *old_buff)
6810 {
6811         struct igb_rx_buffer *new_buff;
6812         u16 nta = rx_ring->next_to_alloc;
6813
6814         new_buff = &rx_ring->rx_buffer_info[nta];
6815
6816         /* update, and store next to alloc */
6817         nta++;
6818         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
6819
6820         /* transfer page from old buffer to new buffer */
6821         *new_buff = *old_buff;
6822
6823         /* sync the buffer for use by the device */
6824         dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
6825                                          old_buff->page_offset,
6826                                          IGB_RX_BUFSZ,
6827                                          DMA_FROM_DEVICE);
6828 }
6829
6830 static inline bool igb_page_is_reserved(struct page *page)
6831 {
6832         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
6833 }
6834
6835 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
6836                                   struct page *page,
6837                                   unsigned int truesize)
6838 {
6839         /* avoid re-using remote pages */
6840         if (unlikely(igb_page_is_reserved(page)))
6841                 return false;
6842
6843 #if (PAGE_SIZE < 8192)
6844         /* if we are only owner of page we can reuse it */
6845         if (unlikely(page_count(page) != 1))
6846                 return false;
6847
6848         /* flip page offset to other buffer */
6849         rx_buffer->page_offset ^= IGB_RX_BUFSZ;
6850 #else
6851         /* move offset up to the next cache line */
6852         rx_buffer->page_offset += truesize;
6853
6854         if (rx_buffer->page_offset > (PAGE_SIZE - IGB_RX_BUFSZ))
6855                 return false;
6856 #endif
6857
6858         /* Even if we own the page, we are not allowed to use atomic_set()
6859          * This would break get_page_unless_zero() users.
6860          */
6861         page_ref_inc(page);
6862
6863         return true;
6864 }
6865
6866 /**
6867  *  igb_add_rx_frag - Add contents of Rx buffer to sk_buff
6868  *  @rx_ring: rx descriptor ring to transact packets on
6869  *  @rx_buffer: buffer containing page to add
6870  *  @rx_desc: descriptor containing length of buffer written by hardware
6871  *  @skb: sk_buff to place the data into
6872  *
6873  *  This function will add the data contained in rx_buffer->page to the skb.
6874  *  This is done either through a direct copy if the data in the buffer is
6875  *  less than the skb header size, otherwise it will just attach the page as
6876  *  a frag to the skb.
6877  *
6878  *  The function will then update the page offset if necessary and return
6879  *  true if the buffer can be reused by the adapter.
6880  **/
6881 static bool igb_add_rx_frag(struct igb_ring *rx_ring,
6882                             struct igb_rx_buffer *rx_buffer,
6883                             unsigned int size,
6884                             union e1000_adv_rx_desc *rx_desc,
6885                             struct sk_buff *skb)
6886 {
6887         struct page *page = rx_buffer->page;
6888         unsigned char *va = page_address(page) + rx_buffer->page_offset;
6889 #if (PAGE_SIZE < 8192)
6890         unsigned int truesize = IGB_RX_BUFSZ;
6891 #else
6892         unsigned int truesize = SKB_DATA_ALIGN(size);
6893 #endif
6894         unsigned int pull_len;
6895
6896         if (unlikely(skb_is_nonlinear(skb)))
6897                 goto add_tail_frag;
6898
6899         if (unlikely(igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP))) {
6900                 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
6901                 va += IGB_TS_HDR_LEN;
6902                 size -= IGB_TS_HDR_LEN;
6903         }
6904
6905         if (likely(size <= IGB_RX_HDR_LEN)) {
6906                 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
6907
6908                 /* page is not reserved, we can reuse buffer as-is */
6909                 if (likely(!igb_page_is_reserved(page)))
6910                         return true;
6911
6912                 /* this page cannot be reused so discard it */
6913                 __free_page(page);
6914                 return false;
6915         }
6916
6917         /* we need the header to contain the greater of either ETH_HLEN or
6918          * 60 bytes if the skb->len is less than 60 for skb_pad.
6919          */
6920         pull_len = eth_get_headlen(va, IGB_RX_HDR_LEN);
6921
6922         /* align pull length to size of long to optimize memcpy performance */
6923         memcpy(__skb_put(skb, pull_len), va, ALIGN(pull_len, sizeof(long)));
6924
6925         /* update all of the pointers */
6926         va += pull_len;
6927         size -= pull_len;
6928
6929 add_tail_frag:
6930         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
6931                         (unsigned long)va & ~PAGE_MASK, size, truesize);
6932
6933         return igb_can_reuse_rx_page(rx_buffer, page, truesize);
6934 }
6935
6936 static struct sk_buff *igb_fetch_rx_buffer(struct igb_ring *rx_ring,
6937                                            union e1000_adv_rx_desc *rx_desc,
6938                                            struct sk_buff *skb)
6939 {
6940         unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
6941         struct igb_rx_buffer *rx_buffer;
6942         struct page *page;
6943
6944         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
6945         page = rx_buffer->page;
6946         prefetchw(page);
6947
6948         if (likely(!skb)) {
6949                 void *page_addr = page_address(page) +
6950                                   rx_buffer->page_offset;
6951
6952                 /* prefetch first cache line of first page */
6953                 prefetch(page_addr);
6954 #if L1_CACHE_BYTES < 128
6955                 prefetch(page_addr + L1_CACHE_BYTES);
6956 #endif
6957
6958                 /* allocate a skb to store the frags */
6959                 skb = napi_alloc_skb(&rx_ring->q_vector->napi, IGB_RX_HDR_LEN);
6960                 if (unlikely(!skb)) {
6961                         rx_ring->rx_stats.alloc_failed++;
6962                         return NULL;
6963                 }
6964
6965                 /* we will be copying header into skb->data in
6966                  * pskb_may_pull so it is in our interest to prefetch
6967                  * it now to avoid a possible cache miss
6968                  */
6969                 prefetchw(skb->data);
6970         }
6971
6972         /* we are reusing so sync this buffer for CPU use */
6973         dma_sync_single_range_for_cpu(rx_ring->dev,
6974                                       rx_buffer->dma,
6975                                       rx_buffer->page_offset,
6976                                       size,
6977                                       DMA_FROM_DEVICE);
6978
6979         /* pull page into skb */
6980         if (igb_add_rx_frag(rx_ring, rx_buffer, size, rx_desc, skb)) {
6981                 /* hand second half of page back to the ring */
6982                 igb_reuse_rx_page(rx_ring, rx_buffer);
6983         } else {
6984                 /* we are not reusing the buffer so unmap it */
6985                 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
6986                                PAGE_SIZE, DMA_FROM_DEVICE);
6987         }
6988
6989         /* clear contents of rx_buffer */
6990         rx_buffer->page = NULL;
6991
6992         return skb;
6993 }
6994
6995 static inline void igb_rx_checksum(struct igb_ring *ring,
6996                                    union e1000_adv_rx_desc *rx_desc,
6997                                    struct sk_buff *skb)
6998 {
6999         skb_checksum_none_assert(skb);
7000
7001         /* Ignore Checksum bit is set */
7002         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
7003                 return;
7004
7005         /* Rx checksum disabled via ethtool */
7006         if (!(ring->netdev->features & NETIF_F_RXCSUM))
7007                 return;
7008
7009         /* TCP/UDP checksum error bit is set */
7010         if (igb_test_staterr(rx_desc,
7011                              E1000_RXDEXT_STATERR_TCPE |
7012                              E1000_RXDEXT_STATERR_IPE)) {
7013                 /* work around errata with sctp packets where the TCPE aka
7014                  * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
7015                  * packets, (aka let the stack check the crc32c)
7016                  */
7017                 if (!((skb->len == 60) &&
7018                       test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags))) {
7019                         u64_stats_update_begin(&ring->rx_syncp);
7020                         ring->rx_stats.csum_err++;
7021                         u64_stats_update_end(&ring->rx_syncp);
7022                 }
7023                 /* let the stack verify checksum errors */
7024                 return;
7025         }
7026         /* It must be a TCP or UDP packet with a valid checksum */
7027         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
7028                                       E1000_RXD_STAT_UDPCS))
7029                 skb->ip_summed = CHECKSUM_UNNECESSARY;
7030
7031         dev_dbg(ring->dev, "cksum success: bits %08X\n",
7032                 le32_to_cpu(rx_desc->wb.upper.status_error));
7033 }
7034
7035 static inline void igb_rx_hash(struct igb_ring *ring,
7036                                union e1000_adv_rx_desc *rx_desc,
7037                                struct sk_buff *skb)
7038 {
7039         if (ring->netdev->features & NETIF_F_RXHASH)
7040                 skb_set_hash(skb,
7041                              le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
7042                              PKT_HASH_TYPE_L3);
7043 }
7044
7045 /**
7046  *  igb_is_non_eop - process handling of non-EOP buffers
7047  *  @rx_ring: Rx ring being processed
7048  *  @rx_desc: Rx descriptor for current buffer
7049  *  @skb: current socket buffer containing buffer in progress
7050  *
7051  *  This function updates next to clean.  If the buffer is an EOP buffer
7052  *  this function exits returning false, otherwise it will place the
7053  *  sk_buff in the next buffer to be chained and return true indicating
7054  *  that this is in fact a non-EOP buffer.
7055  **/
7056 static bool igb_is_non_eop(struct igb_ring *rx_ring,
7057                            union e1000_adv_rx_desc *rx_desc)
7058 {
7059         u32 ntc = rx_ring->next_to_clean + 1;
7060
7061         /* fetch, update, and store next to clean */
7062         ntc = (ntc < rx_ring->count) ? ntc : 0;
7063         rx_ring->next_to_clean = ntc;
7064
7065         prefetch(IGB_RX_DESC(rx_ring, ntc));
7066
7067         if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
7068                 return false;
7069
7070         return true;
7071 }
7072
7073 /**
7074  *  igb_cleanup_headers - Correct corrupted or empty headers
7075  *  @rx_ring: rx descriptor ring packet is being transacted on
7076  *  @rx_desc: pointer to the EOP Rx descriptor
7077  *  @skb: pointer to current skb being fixed
7078  *
7079  *  Address the case where we are pulling data in on pages only
7080  *  and as such no data is present in the skb header.
7081  *
7082  *  In addition if skb is not at least 60 bytes we need to pad it so that
7083  *  it is large enough to qualify as a valid Ethernet frame.
7084  *
7085  *  Returns true if an error was encountered and skb was freed.
7086  **/
7087 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
7088                                 union e1000_adv_rx_desc *rx_desc,
7089                                 struct sk_buff *skb)
7090 {
7091         if (unlikely((igb_test_staterr(rx_desc,
7092                                        E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
7093                 struct net_device *netdev = rx_ring->netdev;
7094                 if (!(netdev->features & NETIF_F_RXALL)) {
7095                         dev_kfree_skb_any(skb);
7096                         return true;
7097                 }
7098         }
7099
7100         /* if eth_skb_pad returns an error the skb was freed */
7101         if (eth_skb_pad(skb))
7102                 return true;
7103
7104         return false;
7105 }
7106
7107 /**
7108  *  igb_process_skb_fields - Populate skb header fields from Rx descriptor
7109  *  @rx_ring: rx descriptor ring packet is being transacted on
7110  *  @rx_desc: pointer to the EOP Rx descriptor
7111  *  @skb: pointer to current skb being populated
7112  *
7113  *  This function checks the ring, descriptor, and packet information in
7114  *  order to populate the hash, checksum, VLAN, timestamp, protocol, and
7115  *  other fields within the skb.
7116  **/
7117 static void igb_process_skb_fields(struct igb_ring *rx_ring,
7118                                    union e1000_adv_rx_desc *rx_desc,
7119                                    struct sk_buff *skb)
7120 {
7121         struct net_device *dev = rx_ring->netdev;
7122
7123         igb_rx_hash(rx_ring, rx_desc, skb);
7124
7125         igb_rx_checksum(rx_ring, rx_desc, skb);
7126
7127         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TS) &&
7128             !igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP))
7129                 igb_ptp_rx_rgtstamp(rx_ring->q_vector, skb);
7130
7131         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
7132             igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
7133                 u16 vid;
7134
7135                 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
7136                     test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
7137                         vid = be16_to_cpu(rx_desc->wb.upper.vlan);
7138                 else
7139                         vid = le16_to_cpu(rx_desc->wb.upper.vlan);
7140
7141                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7142         }
7143
7144         skb_record_rx_queue(skb, rx_ring->queue_index);
7145
7146         skb->protocol = eth_type_trans(skb, rx_ring->netdev);
7147 }
7148
7149 static int igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
7150 {
7151         struct igb_ring *rx_ring = q_vector->rx.ring;
7152         struct sk_buff *skb = rx_ring->skb;
7153         unsigned int total_bytes = 0, total_packets = 0;
7154         u16 cleaned_count = igb_desc_unused(rx_ring);
7155
7156         while (likely(total_packets < budget)) {
7157                 union e1000_adv_rx_desc *rx_desc;
7158
7159                 /* return some buffers to hardware, one at a time is too slow */
7160                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
7161                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
7162                         cleaned_count = 0;
7163                 }
7164
7165                 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
7166
7167                 if (!rx_desc->wb.upper.status_error)
7168                         break;
7169
7170                 /* This memory barrier is needed to keep us from reading
7171                  * any other fields out of the rx_desc until we know the
7172                  * descriptor has been written back
7173                  */
7174                 dma_rmb();
7175
7176                 /* retrieve a buffer from the ring */
7177                 skb = igb_fetch_rx_buffer(rx_ring, rx_desc, skb);
7178
7179                 /* exit if we failed to retrieve a buffer */
7180                 if (!skb)
7181                         break;
7182
7183                 cleaned_count++;
7184
7185                 /* fetch next buffer in frame if non-eop */
7186                 if (igb_is_non_eop(rx_ring, rx_desc))
7187                         continue;
7188
7189                 /* verify the packet layout is correct */
7190                 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
7191                         skb = NULL;
7192                         continue;
7193                 }
7194
7195                 /* probably a little skewed due to removing CRC */
7196                 total_bytes += skb->len;
7197
7198                 /* populate checksum, timestamp, VLAN, and protocol */
7199                 igb_process_skb_fields(rx_ring, rx_desc, skb);
7200
7201                 napi_gro_receive(&q_vector->napi, skb);
7202
7203                 /* reset skb pointer */
7204                 skb = NULL;
7205
7206                 /* update budget accounting */
7207                 total_packets++;
7208         }
7209
7210         /* place incomplete frames back on ring for completion */
7211         rx_ring->skb = skb;
7212
7213         u64_stats_update_begin(&rx_ring->rx_syncp);
7214         rx_ring->rx_stats.packets += total_packets;
7215         rx_ring->rx_stats.bytes += total_bytes;
7216         u64_stats_update_end(&rx_ring->rx_syncp);
7217         q_vector->rx.total_packets += total_packets;
7218         q_vector->rx.total_bytes += total_bytes;
7219
7220         if (cleaned_count)
7221                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
7222
7223         return total_packets;
7224 }
7225
7226 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
7227                                   struct igb_rx_buffer *bi)
7228 {
7229         struct page *page = bi->page;
7230         dma_addr_t dma;
7231
7232         /* since we are recycling buffers we should seldom need to alloc */
7233         if (likely(page))
7234                 return true;
7235
7236         /* alloc new page for storage */
7237         page = dev_alloc_page();
7238         if (unlikely(!page)) {
7239                 rx_ring->rx_stats.alloc_failed++;
7240                 return false;
7241         }
7242
7243         /* map page for use */
7244         dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
7245
7246         /* if mapping failed free memory back to system since
7247          * there isn't much point in holding memory we can't use
7248          */
7249         if (dma_mapping_error(rx_ring->dev, dma)) {
7250                 __free_page(page);
7251
7252                 rx_ring->rx_stats.alloc_failed++;
7253                 return false;
7254         }
7255
7256         bi->dma = dma;
7257         bi->page = page;
7258         bi->page_offset = 0;
7259
7260         return true;
7261 }
7262
7263 /**
7264  *  igb_alloc_rx_buffers - Replace used receive buffers; packet split
7265  *  @adapter: address of board private structure
7266  **/
7267 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
7268 {
7269         union e1000_adv_rx_desc *rx_desc;
7270         struct igb_rx_buffer *bi;
7271         u16 i = rx_ring->next_to_use;
7272
7273         /* nothing to do */
7274         if (!cleaned_count)
7275                 return;
7276
7277         rx_desc = IGB_RX_DESC(rx_ring, i);
7278         bi = &rx_ring->rx_buffer_info[i];
7279         i -= rx_ring->count;
7280
7281         do {
7282                 if (!igb_alloc_mapped_page(rx_ring, bi))
7283                         break;
7284
7285                 /* Refresh the desc even if buffer_addrs didn't change
7286                  * because each write-back erases this info.
7287                  */
7288                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
7289
7290                 rx_desc++;
7291                 bi++;
7292                 i++;
7293                 if (unlikely(!i)) {
7294                         rx_desc = IGB_RX_DESC(rx_ring, 0);
7295                         bi = rx_ring->rx_buffer_info;
7296                         i -= rx_ring->count;
7297                 }
7298
7299                 /* clear the status bits for the next_to_use descriptor */
7300                 rx_desc->wb.upper.status_error = 0;
7301
7302                 cleaned_count--;
7303         } while (cleaned_count);
7304
7305         i += rx_ring->count;
7306
7307         if (rx_ring->next_to_use != i) {
7308                 /* record the next descriptor to use */
7309                 rx_ring->next_to_use = i;
7310
7311                 /* update next to alloc since we have filled the ring */
7312                 rx_ring->next_to_alloc = i;
7313
7314                 /* Force memory writes to complete before letting h/w
7315                  * know there are new descriptors to fetch.  (Only
7316                  * applicable for weak-ordered memory model archs,
7317                  * such as IA-64).
7318                  */
7319                 wmb();
7320                 writel(i, rx_ring->tail);
7321         }
7322 }
7323
7324 /**
7325  * igb_mii_ioctl -
7326  * @netdev:
7327  * @ifreq:
7328  * @cmd:
7329  **/
7330 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
7331 {
7332         struct igb_adapter *adapter = netdev_priv(netdev);
7333         struct mii_ioctl_data *data = if_mii(ifr);
7334
7335         if (adapter->hw.phy.media_type != e1000_media_type_copper)
7336                 return -EOPNOTSUPP;
7337
7338         switch (cmd) {
7339         case SIOCGMIIPHY:
7340                 data->phy_id = adapter->hw.phy.addr;
7341                 break;
7342         case SIOCGMIIREG:
7343                 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
7344                                      &data->val_out))
7345                         return -EIO;
7346                 break;
7347         case SIOCSMIIREG:
7348         default:
7349                 return -EOPNOTSUPP;
7350         }
7351         return 0;
7352 }
7353
7354 /**
7355  * igb_ioctl -
7356  * @netdev:
7357  * @ifreq:
7358  * @cmd:
7359  **/
7360 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
7361 {
7362         switch (cmd) {
7363         case SIOCGMIIPHY:
7364         case SIOCGMIIREG:
7365         case SIOCSMIIREG:
7366                 return igb_mii_ioctl(netdev, ifr, cmd);
7367         case SIOCGHWTSTAMP:
7368                 return igb_ptp_get_ts_config(netdev, ifr);
7369         case SIOCSHWTSTAMP:
7370                 return igb_ptp_set_ts_config(netdev, ifr);
7371         default:
7372                 return -EOPNOTSUPP;
7373         }
7374 }
7375
7376 void igb_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
7377 {
7378         struct igb_adapter *adapter = hw->back;
7379
7380         pci_read_config_word(adapter->pdev, reg, value);
7381 }
7382
7383 void igb_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
7384 {
7385         struct igb_adapter *adapter = hw->back;
7386
7387         pci_write_config_word(adapter->pdev, reg, *value);
7388 }
7389
7390 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
7391 {
7392         struct igb_adapter *adapter = hw->back;
7393
7394         if (pcie_capability_read_word(adapter->pdev, reg, value))
7395                 return -E1000_ERR_CONFIG;
7396
7397         return 0;
7398 }
7399
7400 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
7401 {
7402         struct igb_adapter *adapter = hw->back;
7403
7404         if (pcie_capability_write_word(adapter->pdev, reg, *value))
7405                 return -E1000_ERR_CONFIG;
7406
7407         return 0;
7408 }
7409
7410 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features)
7411 {
7412         struct igb_adapter *adapter = netdev_priv(netdev);
7413         struct e1000_hw *hw = &adapter->hw;
7414         u32 ctrl, rctl;
7415         bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
7416
7417         if (enable) {
7418                 /* enable VLAN tag insert/strip */
7419                 ctrl = rd32(E1000_CTRL);
7420                 ctrl |= E1000_CTRL_VME;
7421                 wr32(E1000_CTRL, ctrl);
7422
7423                 /* Disable CFI check */
7424                 rctl = rd32(E1000_RCTL);
7425                 rctl &= ~E1000_RCTL_CFIEN;
7426                 wr32(E1000_RCTL, rctl);
7427         } else {
7428                 /* disable VLAN tag insert/strip */
7429                 ctrl = rd32(E1000_CTRL);
7430                 ctrl &= ~E1000_CTRL_VME;
7431                 wr32(E1000_CTRL, ctrl);
7432         }
7433
7434         igb_set_vf_vlan_strip(adapter, adapter->vfs_allocated_count, enable);
7435 }
7436
7437 static int igb_vlan_rx_add_vid(struct net_device *netdev,
7438                                __be16 proto, u16 vid)
7439 {
7440         struct igb_adapter *adapter = netdev_priv(netdev);
7441         struct e1000_hw *hw = &adapter->hw;
7442         int pf_id = adapter->vfs_allocated_count;
7443
7444         /* add the filter since PF can receive vlans w/o entry in vlvf */
7445         if (!vid || !(adapter->flags & IGB_FLAG_VLAN_PROMISC))
7446                 igb_vfta_set(hw, vid, pf_id, true, !!vid);
7447
7448         set_bit(vid, adapter->active_vlans);
7449
7450         return 0;
7451 }
7452
7453 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
7454                                 __be16 proto, u16 vid)
7455 {
7456         struct igb_adapter *adapter = netdev_priv(netdev);
7457         int pf_id = adapter->vfs_allocated_count;
7458         struct e1000_hw *hw = &adapter->hw;
7459
7460         /* remove VID from filter table */
7461         if (vid && !(adapter->flags & IGB_FLAG_VLAN_PROMISC))
7462                 igb_vfta_set(hw, vid, pf_id, false, true);
7463
7464         clear_bit(vid, adapter->active_vlans);
7465
7466         return 0;
7467 }
7468
7469 static void igb_restore_vlan(struct igb_adapter *adapter)
7470 {
7471         u16 vid = 1;
7472
7473         igb_vlan_mode(adapter->netdev, adapter->netdev->features);
7474         igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
7475
7476         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
7477                 igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
7478 }
7479
7480 int igb_set_spd_dplx(struct igb_adapter *adapter, u32 spd, u8 dplx)
7481 {
7482         struct pci_dev *pdev = adapter->pdev;
7483         struct e1000_mac_info *mac = &adapter->hw.mac;
7484
7485         mac->autoneg = 0;
7486
7487         /* Make sure dplx is at most 1 bit and lsb of speed is not set
7488          * for the switch() below to work
7489          */
7490         if ((spd & 1) || (dplx & ~1))
7491                 goto err_inval;
7492
7493         /* Fiber NIC's only allow 1000 gbps Full duplex
7494          * and 100Mbps Full duplex for 100baseFx sfp
7495          */
7496         if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
7497                 switch (spd + dplx) {
7498                 case SPEED_10 + DUPLEX_HALF:
7499                 case SPEED_10 + DUPLEX_FULL:
7500                 case SPEED_100 + DUPLEX_HALF:
7501                         goto err_inval;
7502                 default:
7503                         break;
7504                 }
7505         }
7506
7507         switch (spd + dplx) {
7508         case SPEED_10 + DUPLEX_HALF:
7509                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
7510                 break;
7511         case SPEED_10 + DUPLEX_FULL:
7512                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
7513                 break;
7514         case SPEED_100 + DUPLEX_HALF:
7515                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
7516                 break;
7517         case SPEED_100 + DUPLEX_FULL:
7518                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
7519                 break;
7520         case SPEED_1000 + DUPLEX_FULL:
7521                 mac->autoneg = 1;
7522                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
7523                 break;
7524         case SPEED_1000 + DUPLEX_HALF: /* not supported */
7525         default:
7526                 goto err_inval;
7527         }
7528
7529         /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
7530         adapter->hw.phy.mdix = AUTO_ALL_MODES;
7531
7532         return 0;
7533
7534 err_inval:
7535         dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n");
7536         return -EINVAL;
7537 }
7538
7539 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
7540                           bool runtime)
7541 {
7542         struct net_device *netdev = pci_get_drvdata(pdev);
7543         struct igb_adapter *adapter = netdev_priv(netdev);
7544         struct e1000_hw *hw = &adapter->hw;
7545         u32 ctrl, rctl, status;
7546         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
7547 #ifdef CONFIG_PM
7548         int retval = 0;
7549 #endif
7550
7551         netif_device_detach(netdev);
7552
7553         if (netif_running(netdev))
7554                 __igb_close(netdev, true);
7555
7556         igb_ptp_suspend(adapter);
7557
7558         igb_clear_interrupt_scheme(adapter);
7559
7560 #ifdef CONFIG_PM
7561         retval = pci_save_state(pdev);
7562         if (retval)
7563                 return retval;
7564 #endif
7565
7566         status = rd32(E1000_STATUS);
7567         if (status & E1000_STATUS_LU)
7568                 wufc &= ~E1000_WUFC_LNKC;
7569
7570         if (wufc) {
7571                 igb_setup_rctl(adapter);
7572                 igb_set_rx_mode(netdev);
7573
7574                 /* turn on all-multi mode if wake on multicast is enabled */
7575                 if (wufc & E1000_WUFC_MC) {
7576                         rctl = rd32(E1000_RCTL);
7577                         rctl |= E1000_RCTL_MPE;
7578                         wr32(E1000_RCTL, rctl);
7579                 }
7580
7581                 ctrl = rd32(E1000_CTRL);
7582                 /* advertise wake from D3Cold */
7583                 #define E1000_CTRL_ADVD3WUC 0x00100000
7584                 /* phy power management enable */
7585                 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
7586                 ctrl |= E1000_CTRL_ADVD3WUC;
7587                 wr32(E1000_CTRL, ctrl);
7588
7589                 /* Allow time for pending master requests to run */
7590                 igb_disable_pcie_master(hw);
7591
7592                 wr32(E1000_WUC, E1000_WUC_PME_EN);
7593                 wr32(E1000_WUFC, wufc);
7594         } else {
7595                 wr32(E1000_WUC, 0);
7596                 wr32(E1000_WUFC, 0);
7597         }
7598
7599         *enable_wake = wufc || adapter->en_mng_pt;
7600         if (!*enable_wake)
7601                 igb_power_down_link(adapter);
7602         else
7603                 igb_power_up_link(adapter);
7604
7605         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
7606          * would have already happened in close and is redundant.
7607          */
7608         igb_release_hw_control(adapter);
7609
7610         pci_disable_device(pdev);
7611
7612         return 0;
7613 }
7614
7615 #ifdef CONFIG_PM
7616 #ifdef CONFIG_PM_SLEEP
7617 static int igb_suspend(struct device *dev)
7618 {
7619         int retval;
7620         bool wake;
7621         struct pci_dev *pdev = to_pci_dev(dev);
7622
7623         retval = __igb_shutdown(pdev, &wake, 0);
7624         if (retval)
7625                 return retval;
7626
7627         if (wake) {
7628                 pci_prepare_to_sleep(pdev);
7629         } else {
7630                 pci_wake_from_d3(pdev, false);
7631                 pci_set_power_state(pdev, PCI_D3hot);
7632         }
7633
7634         return 0;
7635 }
7636 #endif /* CONFIG_PM_SLEEP */
7637
7638 static int igb_resume(struct device *dev)
7639 {
7640         struct pci_dev *pdev = to_pci_dev(dev);
7641         struct net_device *netdev = pci_get_drvdata(pdev);
7642         struct igb_adapter *adapter = netdev_priv(netdev);
7643         struct e1000_hw *hw = &adapter->hw;
7644         u32 err;
7645
7646         pci_set_power_state(pdev, PCI_D0);
7647         pci_restore_state(pdev);
7648         pci_save_state(pdev);
7649
7650         if (!pci_device_is_present(pdev))
7651                 return -ENODEV;
7652         err = pci_enable_device_mem(pdev);
7653         if (err) {
7654                 dev_err(&pdev->dev,
7655                         "igb: Cannot enable PCI device from suspend\n");
7656                 return err;
7657         }
7658         pci_set_master(pdev);
7659
7660         pci_enable_wake(pdev, PCI_D3hot, 0);
7661         pci_enable_wake(pdev, PCI_D3cold, 0);
7662
7663         if (igb_init_interrupt_scheme(adapter, true)) {
7664                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
7665                 return -ENOMEM;
7666         }
7667
7668         igb_reset(adapter);
7669
7670         /* let the f/w know that the h/w is now under the control of the
7671          * driver.
7672          */
7673         igb_get_hw_control(adapter);
7674
7675         wr32(E1000_WUS, ~0);
7676
7677         if (netdev->flags & IFF_UP) {
7678                 rtnl_lock();
7679                 err = __igb_open(netdev, true);
7680                 rtnl_unlock();
7681                 if (err)
7682                         return err;
7683         }
7684
7685         netif_device_attach(netdev);
7686         return 0;
7687 }
7688
7689 static int igb_runtime_idle(struct device *dev)
7690 {
7691         struct pci_dev *pdev = to_pci_dev(dev);
7692         struct net_device *netdev = pci_get_drvdata(pdev);
7693         struct igb_adapter *adapter = netdev_priv(netdev);
7694
7695         if (!igb_has_link(adapter))
7696                 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
7697
7698         return -EBUSY;
7699 }
7700
7701 static int igb_runtime_suspend(struct device *dev)
7702 {
7703         struct pci_dev *pdev = to_pci_dev(dev);
7704         int retval;
7705         bool wake;
7706
7707         retval = __igb_shutdown(pdev, &wake, 1);
7708         if (retval)
7709                 return retval;
7710
7711         if (wake) {
7712                 pci_prepare_to_sleep(pdev);
7713         } else {
7714                 pci_wake_from_d3(pdev, false);
7715                 pci_set_power_state(pdev, PCI_D3hot);
7716         }
7717
7718         return 0;
7719 }
7720
7721 static int igb_runtime_resume(struct device *dev)
7722 {
7723         return igb_resume(dev);
7724 }
7725 #endif /* CONFIG_PM */
7726
7727 static void igb_shutdown(struct pci_dev *pdev)
7728 {
7729         bool wake;
7730
7731         __igb_shutdown(pdev, &wake, 0);
7732
7733         if (system_state == SYSTEM_POWER_OFF) {
7734                 pci_wake_from_d3(pdev, wake);
7735                 pci_set_power_state(pdev, PCI_D3hot);
7736         }
7737 }
7738
7739 #ifdef CONFIG_PCI_IOV
7740 static int igb_sriov_reinit(struct pci_dev *dev)
7741 {
7742         struct net_device *netdev = pci_get_drvdata(dev);
7743         struct igb_adapter *adapter = netdev_priv(netdev);
7744         struct pci_dev *pdev = adapter->pdev;
7745
7746         rtnl_lock();
7747
7748         if (netif_running(netdev))
7749                 igb_close(netdev);
7750         else
7751                 igb_reset(adapter);
7752
7753         igb_clear_interrupt_scheme(adapter);
7754
7755         igb_init_queue_configuration(adapter);
7756
7757         if (igb_init_interrupt_scheme(adapter, true)) {
7758                 rtnl_unlock();
7759                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
7760                 return -ENOMEM;
7761         }
7762
7763         if (netif_running(netdev))
7764                 igb_open(netdev);
7765
7766         rtnl_unlock();
7767
7768         return 0;
7769 }
7770
7771 static int igb_pci_disable_sriov(struct pci_dev *dev)
7772 {
7773         int err = igb_disable_sriov(dev);
7774
7775         if (!err)
7776                 err = igb_sriov_reinit(dev);
7777
7778         return err;
7779 }
7780
7781 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs)
7782 {
7783         int err = igb_enable_sriov(dev, num_vfs);
7784
7785         if (err)
7786                 goto out;
7787
7788         err = igb_sriov_reinit(dev);
7789         if (!err)
7790                 return num_vfs;
7791
7792 out:
7793         return err;
7794 }
7795
7796 #endif
7797 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
7798 {
7799 #ifdef CONFIG_PCI_IOV
7800         if (num_vfs == 0)
7801                 return igb_pci_disable_sriov(dev);
7802         else
7803                 return igb_pci_enable_sriov(dev, num_vfs);
7804 #endif
7805         return 0;
7806 }
7807
7808 #ifdef CONFIG_NET_POLL_CONTROLLER
7809 /* Polling 'interrupt' - used by things like netconsole to send skbs
7810  * without having to re-enable interrupts. It's not called while
7811  * the interrupt routine is executing.
7812  */
7813 static void igb_netpoll(struct net_device *netdev)
7814 {
7815         struct igb_adapter *adapter = netdev_priv(netdev);
7816         struct e1000_hw *hw = &adapter->hw;
7817         struct igb_q_vector *q_vector;
7818         int i;
7819
7820         for (i = 0; i < adapter->num_q_vectors; i++) {
7821                 q_vector = adapter->q_vector[i];
7822                 if (adapter->flags & IGB_FLAG_HAS_MSIX)
7823                         wr32(E1000_EIMC, q_vector->eims_value);
7824                 else
7825                         igb_irq_disable(adapter);
7826                 napi_schedule(&q_vector->napi);
7827         }
7828 }
7829 #endif /* CONFIG_NET_POLL_CONTROLLER */
7830
7831 /**
7832  *  igb_io_error_detected - called when PCI error is detected
7833  *  @pdev: Pointer to PCI device
7834  *  @state: The current pci connection state
7835  *
7836  *  This function is called after a PCI bus error affecting
7837  *  this device has been detected.
7838  **/
7839 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
7840                                               pci_channel_state_t state)
7841 {
7842         struct net_device *netdev = pci_get_drvdata(pdev);
7843         struct igb_adapter *adapter = netdev_priv(netdev);
7844
7845         netif_device_detach(netdev);
7846
7847         if (state == pci_channel_io_perm_failure)
7848                 return PCI_ERS_RESULT_DISCONNECT;
7849
7850         if (netif_running(netdev))
7851                 igb_down(adapter);
7852         pci_disable_device(pdev);
7853
7854         /* Request a slot slot reset. */
7855         return PCI_ERS_RESULT_NEED_RESET;
7856 }
7857
7858 /**
7859  *  igb_io_slot_reset - called after the pci bus has been reset.
7860  *  @pdev: Pointer to PCI device
7861  *
7862  *  Restart the card from scratch, as if from a cold-boot. Implementation
7863  *  resembles the first-half of the igb_resume routine.
7864  **/
7865 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
7866 {
7867         struct net_device *netdev = pci_get_drvdata(pdev);
7868         struct igb_adapter *adapter = netdev_priv(netdev);
7869         struct e1000_hw *hw = &adapter->hw;
7870         pci_ers_result_t result;
7871         int err;
7872
7873         if (pci_enable_device_mem(pdev)) {
7874                 dev_err(&pdev->dev,
7875                         "Cannot re-enable PCI device after reset.\n");
7876                 result = PCI_ERS_RESULT_DISCONNECT;
7877         } else {
7878                 pci_set_master(pdev);
7879                 pci_restore_state(pdev);
7880                 pci_save_state(pdev);
7881
7882                 pci_enable_wake(pdev, PCI_D3hot, 0);
7883                 pci_enable_wake(pdev, PCI_D3cold, 0);
7884
7885                 igb_reset(adapter);
7886                 wr32(E1000_WUS, ~0);
7887                 result = PCI_ERS_RESULT_RECOVERED;
7888         }
7889
7890         err = pci_cleanup_aer_uncorrect_error_status(pdev);
7891         if (err) {
7892                 dev_err(&pdev->dev,
7893                         "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
7894                         err);
7895                 /* non-fatal, continue */
7896         }
7897
7898         return result;
7899 }
7900
7901 /**
7902  *  igb_io_resume - called when traffic can start flowing again.
7903  *  @pdev: Pointer to PCI device
7904  *
7905  *  This callback is called when the error recovery driver tells us that
7906  *  its OK to resume normal operation. Implementation resembles the
7907  *  second-half of the igb_resume routine.
7908  */
7909 static void igb_io_resume(struct pci_dev *pdev)
7910 {
7911         struct net_device *netdev = pci_get_drvdata(pdev);
7912         struct igb_adapter *adapter = netdev_priv(netdev);
7913
7914         if (netif_running(netdev)) {
7915                 if (igb_up(adapter)) {
7916                         dev_err(&pdev->dev, "igb_up failed after reset\n");
7917                         return;
7918                 }
7919         }
7920
7921         netif_device_attach(netdev);
7922
7923         /* let the f/w know that the h/w is now under the control of the
7924          * driver.
7925          */
7926         igb_get_hw_control(adapter);
7927 }
7928
7929 static void igb_rar_set_qsel(struct igb_adapter *adapter, u8 *addr, u32 index,
7930                              u8 qsel)
7931 {
7932         struct e1000_hw *hw = &adapter->hw;
7933         u32 rar_low, rar_high;
7934
7935         /* HW expects these to be in network order when they are plugged
7936          * into the registers which are little endian.  In order to guarantee
7937          * that ordering we need to do an leXX_to_cpup here in order to be
7938          * ready for the byteswap that occurs with writel
7939          */
7940         rar_low = le32_to_cpup((__le32 *)(addr));
7941         rar_high = le16_to_cpup((__le16 *)(addr + 4));
7942
7943         /* Indicate to hardware the Address is Valid. */
7944         rar_high |= E1000_RAH_AV;
7945
7946         if (hw->mac.type == e1000_82575)
7947                 rar_high |= E1000_RAH_POOL_1 * qsel;
7948         else
7949                 rar_high |= E1000_RAH_POOL_1 << qsel;
7950
7951         wr32(E1000_RAL(index), rar_low);
7952         wrfl();
7953         wr32(E1000_RAH(index), rar_high);
7954         wrfl();
7955 }
7956
7957 static int igb_set_vf_mac(struct igb_adapter *adapter,
7958                           int vf, unsigned char *mac_addr)
7959 {
7960         struct e1000_hw *hw = &adapter->hw;
7961         /* VF MAC addresses start at end of receive addresses and moves
7962          * towards the first, as a result a collision should not be possible
7963          */
7964         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
7965
7966         memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
7967
7968         igb_rar_set_qsel(adapter, mac_addr, rar_entry, vf);
7969
7970         return 0;
7971 }
7972
7973 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
7974 {
7975         struct igb_adapter *adapter = netdev_priv(netdev);
7976         if (!is_valid_ether_addr(mac) || (vf >= adapter->vfs_allocated_count))
7977                 return -EINVAL;
7978         adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
7979         dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf);
7980         dev_info(&adapter->pdev->dev,
7981                  "Reload the VF driver to make this change effective.");
7982         if (test_bit(__IGB_DOWN, &adapter->state)) {
7983                 dev_warn(&adapter->pdev->dev,
7984                          "The VF MAC address has been set, but the PF device is not up.\n");
7985                 dev_warn(&adapter->pdev->dev,
7986                          "Bring the PF device up before attempting to use the VF device.\n");
7987         }
7988         return igb_set_vf_mac(adapter, vf, mac);
7989 }
7990
7991 static int igb_link_mbps(int internal_link_speed)
7992 {
7993         switch (internal_link_speed) {
7994         case SPEED_100:
7995                 return 100;
7996         case SPEED_1000:
7997                 return 1000;
7998         default:
7999                 return 0;
8000         }
8001 }
8002
8003 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
8004                                   int link_speed)
8005 {
8006         int rf_dec, rf_int;
8007         u32 bcnrc_val;
8008
8009         if (tx_rate != 0) {
8010                 /* Calculate the rate factor values to set */
8011                 rf_int = link_speed / tx_rate;
8012                 rf_dec = (link_speed - (rf_int * tx_rate));
8013                 rf_dec = (rf_dec * BIT(E1000_RTTBCNRC_RF_INT_SHIFT)) /
8014                          tx_rate;
8015
8016                 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
8017                 bcnrc_val |= ((rf_int << E1000_RTTBCNRC_RF_INT_SHIFT) &
8018                               E1000_RTTBCNRC_RF_INT_MASK);
8019                 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
8020         } else {
8021                 bcnrc_val = 0;
8022         }
8023
8024         wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */
8025         /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
8026          * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
8027          */
8028         wr32(E1000_RTTBCNRM, 0x14);
8029         wr32(E1000_RTTBCNRC, bcnrc_val);
8030 }
8031
8032 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
8033 {
8034         int actual_link_speed, i;
8035         bool reset_rate = false;
8036
8037         /* VF TX rate limit was not set or not supported */
8038         if ((adapter->vf_rate_link_speed == 0) ||
8039             (adapter->hw.mac.type != e1000_82576))
8040                 return;
8041
8042         actual_link_speed = igb_link_mbps(adapter->link_speed);
8043         if (actual_link_speed != adapter->vf_rate_link_speed) {
8044                 reset_rate = true;
8045                 adapter->vf_rate_link_speed = 0;
8046                 dev_info(&adapter->pdev->dev,
8047                          "Link speed has been changed. VF Transmit rate is disabled\n");
8048         }
8049
8050         for (i = 0; i < adapter->vfs_allocated_count; i++) {
8051                 if (reset_rate)
8052                         adapter->vf_data[i].tx_rate = 0;
8053
8054                 igb_set_vf_rate_limit(&adapter->hw, i,
8055                                       adapter->vf_data[i].tx_rate,
8056                                       actual_link_speed);
8057         }
8058 }
8059
8060 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf,
8061                              int min_tx_rate, int max_tx_rate)
8062 {
8063         struct igb_adapter *adapter = netdev_priv(netdev);
8064         struct e1000_hw *hw = &adapter->hw;
8065         int actual_link_speed;
8066
8067         if (hw->mac.type != e1000_82576)
8068                 return -EOPNOTSUPP;
8069
8070         if (min_tx_rate)
8071                 return -EINVAL;
8072
8073         actual_link_speed = igb_link_mbps(adapter->link_speed);
8074         if ((vf >= adapter->vfs_allocated_count) ||
8075             (!(rd32(E1000_STATUS) & E1000_STATUS_LU)) ||
8076             (max_tx_rate < 0) ||
8077             (max_tx_rate > actual_link_speed))
8078                 return -EINVAL;
8079
8080         adapter->vf_rate_link_speed = actual_link_speed;
8081         adapter->vf_data[vf].tx_rate = (u16)max_tx_rate;
8082         igb_set_vf_rate_limit(hw, vf, max_tx_rate, actual_link_speed);
8083
8084         return 0;
8085 }
8086
8087 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
8088                                    bool setting)
8089 {
8090         struct igb_adapter *adapter = netdev_priv(netdev);
8091         struct e1000_hw *hw = &adapter->hw;
8092         u32 reg_val, reg_offset;
8093
8094         if (!adapter->vfs_allocated_count)
8095                 return -EOPNOTSUPP;
8096
8097         if (vf >= adapter->vfs_allocated_count)
8098                 return -EINVAL;
8099
8100         reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
8101         reg_val = rd32(reg_offset);
8102         if (setting)
8103                 reg_val |= (BIT(vf) |
8104                             BIT(vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT));
8105         else
8106                 reg_val &= ~(BIT(vf) |
8107                              BIT(vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT));
8108         wr32(reg_offset, reg_val);
8109
8110         adapter->vf_data[vf].spoofchk_enabled = setting;
8111         return 0;
8112 }
8113
8114 static int igb_ndo_get_vf_config(struct net_device *netdev,
8115                                  int vf, struct ifla_vf_info *ivi)
8116 {
8117         struct igb_adapter *adapter = netdev_priv(netdev);
8118         if (vf >= adapter->vfs_allocated_count)
8119                 return -EINVAL;
8120         ivi->vf = vf;
8121         memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
8122         ivi->max_tx_rate = adapter->vf_data[vf].tx_rate;
8123         ivi->min_tx_rate = 0;
8124         ivi->vlan = adapter->vf_data[vf].pf_vlan;
8125         ivi->qos = adapter->vf_data[vf].pf_qos;
8126         ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
8127         return 0;
8128 }
8129
8130 static void igb_vmm_control(struct igb_adapter *adapter)
8131 {
8132         struct e1000_hw *hw = &adapter->hw;
8133         u32 reg;
8134
8135         switch (hw->mac.type) {
8136         case e1000_82575:
8137         case e1000_i210:
8138         case e1000_i211:
8139         case e1000_i354:
8140         default:
8141                 /* replication is not supported for 82575 */
8142                 return;
8143         case e1000_82576:
8144                 /* notify HW that the MAC is adding vlan tags */
8145                 reg = rd32(E1000_DTXCTL);
8146                 reg |= E1000_DTXCTL_VLAN_ADDED;
8147                 wr32(E1000_DTXCTL, reg);
8148                 /* Fall through */
8149         case e1000_82580:
8150                 /* enable replication vlan tag stripping */
8151                 reg = rd32(E1000_RPLOLR);
8152                 reg |= E1000_RPLOLR_STRVLAN;
8153                 wr32(E1000_RPLOLR, reg);
8154                 /* Fall through */
8155         case e1000_i350:
8156                 /* none of the above registers are supported by i350 */
8157                 break;
8158         }
8159
8160         if (adapter->vfs_allocated_count) {
8161                 igb_vmdq_set_loopback_pf(hw, true);
8162                 igb_vmdq_set_replication_pf(hw, true);
8163                 igb_vmdq_set_anti_spoofing_pf(hw, true,
8164                                               adapter->vfs_allocated_count);
8165         } else {
8166                 igb_vmdq_set_loopback_pf(hw, false);
8167                 igb_vmdq_set_replication_pf(hw, false);
8168         }
8169 }
8170
8171 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
8172 {
8173         struct e1000_hw *hw = &adapter->hw;
8174         u32 dmac_thr;
8175         u16 hwm;
8176
8177         if (hw->mac.type > e1000_82580) {
8178                 if (adapter->flags & IGB_FLAG_DMAC) {
8179                         u32 reg;
8180
8181                         /* force threshold to 0. */
8182                         wr32(E1000_DMCTXTH, 0);
8183
8184                         /* DMA Coalescing high water mark needs to be greater
8185                          * than the Rx threshold. Set hwm to PBA - max frame
8186                          * size in 16B units, capping it at PBA - 6KB.
8187                          */
8188                         hwm = 64 * (pba - 6);
8189                         reg = rd32(E1000_FCRTC);
8190                         reg &= ~E1000_FCRTC_RTH_COAL_MASK;
8191                         reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
8192                                 & E1000_FCRTC_RTH_COAL_MASK);
8193                         wr32(E1000_FCRTC, reg);
8194
8195                         /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
8196                          * frame size, capping it at PBA - 10KB.
8197                          */
8198                         dmac_thr = pba - 10;
8199                         reg = rd32(E1000_DMACR);
8200                         reg &= ~E1000_DMACR_DMACTHR_MASK;
8201                         reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
8202                                 & E1000_DMACR_DMACTHR_MASK);
8203
8204                         /* transition to L0x or L1 if available..*/
8205                         reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
8206
8207                         /* watchdog timer= +-1000 usec in 32usec intervals */
8208                         reg |= (1000 >> 5);
8209
8210                         /* Disable BMC-to-OS Watchdog Enable */
8211                         if (hw->mac.type != e1000_i354)
8212                                 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
8213
8214                         wr32(E1000_DMACR, reg);
8215
8216                         /* no lower threshold to disable
8217                          * coalescing(smart fifb)-UTRESH=0
8218                          */
8219                         wr32(E1000_DMCRTRH, 0);
8220
8221                         reg = (IGB_DMCTLX_DCFLUSH_DIS | 0x4);
8222
8223                         wr32(E1000_DMCTLX, reg);
8224
8225                         /* free space in tx packet buffer to wake from
8226                          * DMA coal
8227                          */
8228                         wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
8229                              (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
8230
8231                         /* make low power state decision controlled
8232                          * by DMA coal
8233                          */
8234                         reg = rd32(E1000_PCIEMISC);
8235                         reg &= ~E1000_PCIEMISC_LX_DECISION;
8236                         wr32(E1000_PCIEMISC, reg);
8237                 } /* endif adapter->dmac is not disabled */
8238         } else if (hw->mac.type == e1000_82580) {
8239                 u32 reg = rd32(E1000_PCIEMISC);
8240
8241                 wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION);
8242                 wr32(E1000_DMACR, 0);
8243         }
8244 }
8245
8246 /**
8247  *  igb_read_i2c_byte - Reads 8 bit word over I2C
8248  *  @hw: pointer to hardware structure
8249  *  @byte_offset: byte offset to read
8250  *  @dev_addr: device address
8251  *  @data: value read
8252  *
8253  *  Performs byte read operation over I2C interface at
8254  *  a specified device address.
8255  **/
8256 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
8257                       u8 dev_addr, u8 *data)
8258 {
8259         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
8260         struct i2c_client *this_client = adapter->i2c_client;
8261         s32 status;
8262         u16 swfw_mask = 0;
8263
8264         if (!this_client)
8265                 return E1000_ERR_I2C;
8266
8267         swfw_mask = E1000_SWFW_PHY0_SM;
8268
8269         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
8270                 return E1000_ERR_SWFW_SYNC;
8271
8272         status = i2c_smbus_read_byte_data(this_client, byte_offset);
8273         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
8274
8275         if (status < 0)
8276                 return E1000_ERR_I2C;
8277         else {
8278                 *data = status;
8279                 return 0;
8280         }
8281 }
8282
8283 /**
8284  *  igb_write_i2c_byte - Writes 8 bit word over I2C
8285  *  @hw: pointer to hardware structure
8286  *  @byte_offset: byte offset to write
8287  *  @dev_addr: device address
8288  *  @data: value to write
8289  *
8290  *  Performs byte write operation over I2C interface at
8291  *  a specified device address.
8292  **/
8293 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
8294                        u8 dev_addr, u8 data)
8295 {
8296         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
8297         struct i2c_client *this_client = adapter->i2c_client;
8298         s32 status;
8299         u16 swfw_mask = E1000_SWFW_PHY0_SM;
8300
8301         if (!this_client)
8302                 return E1000_ERR_I2C;
8303
8304         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
8305                 return E1000_ERR_SWFW_SYNC;
8306         status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
8307         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
8308
8309         if (status)
8310                 return E1000_ERR_I2C;
8311         else
8312                 return 0;
8313
8314 }
8315
8316 int igb_reinit_queues(struct igb_adapter *adapter)
8317 {
8318         struct net_device *netdev = adapter->netdev;
8319         struct pci_dev *pdev = adapter->pdev;
8320         int err = 0;
8321
8322         if (netif_running(netdev))
8323                 igb_close(netdev);
8324
8325         igb_reset_interrupt_capability(adapter);
8326
8327         if (igb_init_interrupt_scheme(adapter, true)) {
8328                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
8329                 return -ENOMEM;
8330         }
8331
8332         if (netif_running(netdev))
8333                 err = igb_open(netdev);
8334
8335         return err;
8336 }
8337
8338 static void igb_nfc_filter_exit(struct igb_adapter *adapter)
8339 {
8340         struct igb_nfc_filter *rule;
8341
8342         spin_lock(&adapter->nfc_lock);
8343
8344         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node)
8345                 igb_erase_filter(adapter, rule);
8346
8347         spin_unlock(&adapter->nfc_lock);
8348 }
8349
8350 static void igb_nfc_filter_restore(struct igb_adapter *adapter)
8351 {
8352         struct igb_nfc_filter *rule;
8353
8354         spin_lock(&adapter->nfc_lock);
8355
8356         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node)
8357                 igb_add_filter(adapter, rule);
8358
8359         spin_unlock(&adapter->nfc_lock);
8360 }
8361 /* igb_main.c */