1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2017 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
27 #include <linux/etherdevice.h>
28 #include <linux/of_net.h>
29 #include <linux/pci.h>
30 #include <linux/bpf.h>
34 #include "i40e_diag.h"
35 #include <net/udp_tunnel.h>
36 /* All i40e tracepoints are defined by the include below, which
37 * must be included exactly once across the whole kernel with
38 * CREATE_TRACE_POINTS defined
40 #define CREATE_TRACE_POINTS
41 #include "i40e_trace.h"
43 const char i40e_driver_name[] = "i40e";
44 static const char i40e_driver_string[] =
45 "Intel(R) Ethernet Connection XL710 Network Driver";
49 #define DRV_VERSION_MAJOR 2
50 #define DRV_VERSION_MINOR 1
51 #define DRV_VERSION_BUILD 14
52 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
53 __stringify(DRV_VERSION_MINOR) "." \
54 __stringify(DRV_VERSION_BUILD) DRV_KERN
55 const char i40e_driver_version_str[] = DRV_VERSION;
56 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
58 /* a bit of forward declarations */
59 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
60 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired);
61 static int i40e_add_vsi(struct i40e_vsi *vsi);
62 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
63 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
64 static int i40e_setup_misc_vector(struct i40e_pf *pf);
65 static void i40e_determine_queue_usage(struct i40e_pf *pf);
66 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
67 static void i40e_prep_for_reset(struct i40e_pf *pf, bool lock_acquired);
68 static int i40e_reset(struct i40e_pf *pf);
69 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired);
70 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
71 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
72 static int i40e_add_del_cloud_filter(struct i40e_vsi *vsi,
73 struct i40e_cloud_filter *filter,
75 static int i40e_add_del_cloud_filter_big_buf(struct i40e_vsi *vsi,
76 struct i40e_cloud_filter *filter,
78 static int i40e_get_capabilities(struct i40e_pf *pf,
79 enum i40e_admin_queue_opc list_type);
82 /* i40e_pci_tbl - PCI Device ID Table
84 * Last entry must be all 0s
86 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
87 * Class, Class Mask, private data (not used) }
89 static const struct pci_device_id i40e_pci_tbl[] = {
90 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
91 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
92 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
93 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
94 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
95 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
96 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
97 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
98 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
99 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_X722), 0},
100 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_X722), 0},
101 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
102 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
103 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
104 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_I_X722), 0},
105 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
106 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
107 {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_B), 0},
108 {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_SFP28), 0},
109 /* required last entry */
112 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
114 #define I40E_MAX_VF_COUNT 128
115 static int debug = -1;
116 module_param(debug, uint, 0);
117 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all), Debug mask (0x8XXXXXXX)");
119 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
120 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
121 MODULE_LICENSE("GPL");
122 MODULE_VERSION(DRV_VERSION);
124 static struct workqueue_struct *i40e_wq;
127 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
128 * @hw: pointer to the HW structure
129 * @mem: ptr to mem struct to fill out
130 * @size: size of memory requested
131 * @alignment: what to align the allocation to
133 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
134 u64 size, u32 alignment)
136 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
138 mem->size = ALIGN(size, alignment);
139 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
140 &mem->pa, GFP_KERNEL);
148 * i40e_free_dma_mem_d - OS specific memory free for shared code
149 * @hw: pointer to the HW structure
150 * @mem: ptr to mem struct to free
152 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
154 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
156 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
165 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
166 * @hw: pointer to the HW structure
167 * @mem: ptr to mem struct to fill out
168 * @size: size of memory requested
170 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
174 mem->va = kzalloc(size, GFP_KERNEL);
183 * i40e_free_virt_mem_d - OS specific memory free for shared code
184 * @hw: pointer to the HW structure
185 * @mem: ptr to mem struct to free
187 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
189 /* it's ok to kfree a NULL pointer */
198 * i40e_get_lump - find a lump of free generic resource
199 * @pf: board private structure
200 * @pile: the pile of resource to search
201 * @needed: the number of items needed
202 * @id: an owner id to stick on the items assigned
204 * Returns the base item index of the lump, or negative for error
206 * The search_hint trick and lack of advanced fit-finding only work
207 * because we're highly likely to have all the same size lump requests.
208 * Linear search time and any fragmentation should be minimal.
210 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
216 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
217 dev_info(&pf->pdev->dev,
218 "param err: pile=%p needed=%d id=0x%04x\n",
223 /* start the linear search with an imperfect hint */
224 i = pile->search_hint;
225 while (i < pile->num_entries) {
226 /* skip already allocated entries */
227 if (pile->list[i] & I40E_PILE_VALID_BIT) {
232 /* do we have enough in this lump? */
233 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
234 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
239 /* there was enough, so assign it to the requestor */
240 for (j = 0; j < needed; j++)
241 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
243 pile->search_hint = i + j;
247 /* not enough, so skip over it and continue looking */
255 * i40e_put_lump - return a lump of generic resource
256 * @pile: the pile of resource to search
257 * @index: the base item index
258 * @id: the owner id of the items assigned
260 * Returns the count of items in the lump
262 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
264 int valid_id = (id | I40E_PILE_VALID_BIT);
268 if (!pile || index >= pile->num_entries)
272 i < pile->num_entries && pile->list[i] == valid_id;
278 if (count && index < pile->search_hint)
279 pile->search_hint = index;
285 * i40e_find_vsi_from_id - searches for the vsi with the given id
286 * @pf - the pf structure to search for the vsi
287 * @id - id of the vsi it is searching for
289 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
293 for (i = 0; i < pf->num_alloc_vsi; i++)
294 if (pf->vsi[i] && (pf->vsi[i]->id == id))
301 * i40e_service_event_schedule - Schedule the service task to wake up
302 * @pf: board private structure
304 * If not already scheduled, this puts the task into the work queue
306 void i40e_service_event_schedule(struct i40e_pf *pf)
308 if (!test_bit(__I40E_DOWN, pf->state) &&
309 !test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
310 queue_work(i40e_wq, &pf->service_task);
314 * i40e_tx_timeout - Respond to a Tx Hang
315 * @netdev: network interface device structure
317 * If any port has noticed a Tx timeout, it is likely that the whole
318 * device is munged, not just the one netdev port, so go for the full
321 static void i40e_tx_timeout(struct net_device *netdev)
323 struct i40e_netdev_priv *np = netdev_priv(netdev);
324 struct i40e_vsi *vsi = np->vsi;
325 struct i40e_pf *pf = vsi->back;
326 struct i40e_ring *tx_ring = NULL;
327 unsigned int i, hung_queue = 0;
330 pf->tx_timeout_count++;
332 /* find the stopped queue the same way the stack does */
333 for (i = 0; i < netdev->num_tx_queues; i++) {
334 struct netdev_queue *q;
335 unsigned long trans_start;
337 q = netdev_get_tx_queue(netdev, i);
338 trans_start = q->trans_start;
339 if (netif_xmit_stopped(q) &&
341 (trans_start + netdev->watchdog_timeo))) {
347 if (i == netdev->num_tx_queues) {
348 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
350 /* now that we have an index, find the tx_ring struct */
351 for (i = 0; i < vsi->num_queue_pairs; i++) {
352 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
354 vsi->tx_rings[i]->queue_index) {
355 tx_ring = vsi->tx_rings[i];
362 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
363 pf->tx_timeout_recovery_level = 1; /* reset after some time */
364 else if (time_before(jiffies,
365 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
366 return; /* don't do any new action before the next timeout */
369 head = i40e_get_head(tx_ring);
370 /* Read interrupt register */
371 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
373 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
374 tx_ring->vsi->base_vector - 1));
376 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
378 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
379 vsi->seid, hung_queue, tx_ring->next_to_clean,
380 head, tx_ring->next_to_use,
381 readl(tx_ring->tail), val);
384 pf->tx_timeout_last_recovery = jiffies;
385 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
386 pf->tx_timeout_recovery_level, hung_queue);
388 switch (pf->tx_timeout_recovery_level) {
390 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
393 set_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
396 set_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state);
399 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
403 i40e_service_event_schedule(pf);
404 pf->tx_timeout_recovery_level++;
408 * i40e_get_vsi_stats_struct - Get System Network Statistics
409 * @vsi: the VSI we care about
411 * Returns the address of the device statistics structure.
412 * The statistics are actually updated from the service task.
414 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
416 return &vsi->net_stats;
420 * i40e_get_netdev_stats_struct_tx - populate stats from a Tx ring
421 * @ring: Tx ring to get statistics from
422 * @stats: statistics entry to be updated
424 static void i40e_get_netdev_stats_struct_tx(struct i40e_ring *ring,
425 struct rtnl_link_stats64 *stats)
431 start = u64_stats_fetch_begin_irq(&ring->syncp);
432 packets = ring->stats.packets;
433 bytes = ring->stats.bytes;
434 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
436 stats->tx_packets += packets;
437 stats->tx_bytes += bytes;
441 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
442 * @netdev: network interface device structure
444 * Returns the address of the device statistics structure.
445 * The statistics are actually updated from the service task.
447 static void i40e_get_netdev_stats_struct(struct net_device *netdev,
448 struct rtnl_link_stats64 *stats)
450 struct i40e_netdev_priv *np = netdev_priv(netdev);
451 struct i40e_ring *tx_ring, *rx_ring;
452 struct i40e_vsi *vsi = np->vsi;
453 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
456 if (test_bit(__I40E_VSI_DOWN, vsi->state))
463 for (i = 0; i < vsi->num_queue_pairs; i++) {
467 tx_ring = READ_ONCE(vsi->tx_rings[i]);
470 i40e_get_netdev_stats_struct_tx(tx_ring, stats);
472 rx_ring = &tx_ring[1];
475 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
476 packets = rx_ring->stats.packets;
477 bytes = rx_ring->stats.bytes;
478 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
480 stats->rx_packets += packets;
481 stats->rx_bytes += bytes;
483 if (i40e_enabled_xdp_vsi(vsi))
484 i40e_get_netdev_stats_struct_tx(&rx_ring[1], stats);
488 /* following stats updated by i40e_watchdog_subtask() */
489 stats->multicast = vsi_stats->multicast;
490 stats->tx_errors = vsi_stats->tx_errors;
491 stats->tx_dropped = vsi_stats->tx_dropped;
492 stats->rx_errors = vsi_stats->rx_errors;
493 stats->rx_dropped = vsi_stats->rx_dropped;
494 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
495 stats->rx_length_errors = vsi_stats->rx_length_errors;
499 * i40e_vsi_reset_stats - Resets all stats of the given vsi
500 * @vsi: the VSI to have its stats reset
502 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
504 struct rtnl_link_stats64 *ns;
510 ns = i40e_get_vsi_stats_struct(vsi);
511 memset(ns, 0, sizeof(*ns));
512 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
513 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
514 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
515 if (vsi->rx_rings && vsi->rx_rings[0]) {
516 for (i = 0; i < vsi->num_queue_pairs; i++) {
517 memset(&vsi->rx_rings[i]->stats, 0,
518 sizeof(vsi->rx_rings[i]->stats));
519 memset(&vsi->rx_rings[i]->rx_stats, 0,
520 sizeof(vsi->rx_rings[i]->rx_stats));
521 memset(&vsi->tx_rings[i]->stats, 0,
522 sizeof(vsi->tx_rings[i]->stats));
523 memset(&vsi->tx_rings[i]->tx_stats, 0,
524 sizeof(vsi->tx_rings[i]->tx_stats));
527 vsi->stat_offsets_loaded = false;
531 * i40e_pf_reset_stats - Reset all of the stats for the given PF
532 * @pf: the PF to be reset
534 void i40e_pf_reset_stats(struct i40e_pf *pf)
538 memset(&pf->stats, 0, sizeof(pf->stats));
539 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
540 pf->stat_offsets_loaded = false;
542 for (i = 0; i < I40E_MAX_VEB; i++) {
544 memset(&pf->veb[i]->stats, 0,
545 sizeof(pf->veb[i]->stats));
546 memset(&pf->veb[i]->stats_offsets, 0,
547 sizeof(pf->veb[i]->stats_offsets));
548 pf->veb[i]->stat_offsets_loaded = false;
551 pf->hw_csum_rx_error = 0;
555 * i40e_stat_update48 - read and update a 48 bit stat from the chip
556 * @hw: ptr to the hardware info
557 * @hireg: the high 32 bit reg to read
558 * @loreg: the low 32 bit reg to read
559 * @offset_loaded: has the initial offset been loaded yet
560 * @offset: ptr to current offset value
561 * @stat: ptr to the stat
563 * Since the device stats are not reset at PFReset, they likely will not
564 * be zeroed when the driver starts. We'll save the first values read
565 * and use them as offsets to be subtracted from the raw values in order
566 * to report stats that count from zero. In the process, we also manage
567 * the potential roll-over.
569 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
570 bool offset_loaded, u64 *offset, u64 *stat)
574 if (hw->device_id == I40E_DEV_ID_QEMU) {
575 new_data = rd32(hw, loreg);
576 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
578 new_data = rd64(hw, loreg);
582 if (likely(new_data >= *offset))
583 *stat = new_data - *offset;
585 *stat = (new_data + BIT_ULL(48)) - *offset;
586 *stat &= 0xFFFFFFFFFFFFULL;
590 * i40e_stat_update32 - read and update a 32 bit stat from the chip
591 * @hw: ptr to the hardware info
592 * @reg: the hw reg to read
593 * @offset_loaded: has the initial offset been loaded yet
594 * @offset: ptr to current offset value
595 * @stat: ptr to the stat
597 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
598 bool offset_loaded, u64 *offset, u64 *stat)
602 new_data = rd32(hw, reg);
605 if (likely(new_data >= *offset))
606 *stat = (u32)(new_data - *offset);
608 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
612 * i40e_stat_update_and_clear32 - read and clear hw reg, update a 32 bit stat
613 * @hw: ptr to the hardware info
614 * @reg: the hw reg to read and clear
615 * @stat: ptr to the stat
617 static void i40e_stat_update_and_clear32(struct i40e_hw *hw, u32 reg, u64 *stat)
619 u32 new_data = rd32(hw, reg);
621 wr32(hw, reg, 1); /* must write a nonzero value to clear register */
626 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
627 * @vsi: the VSI to be updated
629 void i40e_update_eth_stats(struct i40e_vsi *vsi)
631 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
632 struct i40e_pf *pf = vsi->back;
633 struct i40e_hw *hw = &pf->hw;
634 struct i40e_eth_stats *oes;
635 struct i40e_eth_stats *es; /* device's eth stats */
637 es = &vsi->eth_stats;
638 oes = &vsi->eth_stats_offsets;
640 /* Gather up the stats that the hw collects */
641 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
642 vsi->stat_offsets_loaded,
643 &oes->tx_errors, &es->tx_errors);
644 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
645 vsi->stat_offsets_loaded,
646 &oes->rx_discards, &es->rx_discards);
647 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
648 vsi->stat_offsets_loaded,
649 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
650 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
651 vsi->stat_offsets_loaded,
652 &oes->tx_errors, &es->tx_errors);
654 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
655 I40E_GLV_GORCL(stat_idx),
656 vsi->stat_offsets_loaded,
657 &oes->rx_bytes, &es->rx_bytes);
658 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
659 I40E_GLV_UPRCL(stat_idx),
660 vsi->stat_offsets_loaded,
661 &oes->rx_unicast, &es->rx_unicast);
662 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
663 I40E_GLV_MPRCL(stat_idx),
664 vsi->stat_offsets_loaded,
665 &oes->rx_multicast, &es->rx_multicast);
666 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
667 I40E_GLV_BPRCL(stat_idx),
668 vsi->stat_offsets_loaded,
669 &oes->rx_broadcast, &es->rx_broadcast);
671 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
672 I40E_GLV_GOTCL(stat_idx),
673 vsi->stat_offsets_loaded,
674 &oes->tx_bytes, &es->tx_bytes);
675 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
676 I40E_GLV_UPTCL(stat_idx),
677 vsi->stat_offsets_loaded,
678 &oes->tx_unicast, &es->tx_unicast);
679 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
680 I40E_GLV_MPTCL(stat_idx),
681 vsi->stat_offsets_loaded,
682 &oes->tx_multicast, &es->tx_multicast);
683 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
684 I40E_GLV_BPTCL(stat_idx),
685 vsi->stat_offsets_loaded,
686 &oes->tx_broadcast, &es->tx_broadcast);
687 vsi->stat_offsets_loaded = true;
691 * i40e_update_veb_stats - Update Switch component statistics
692 * @veb: the VEB being updated
694 static void i40e_update_veb_stats(struct i40e_veb *veb)
696 struct i40e_pf *pf = veb->pf;
697 struct i40e_hw *hw = &pf->hw;
698 struct i40e_eth_stats *oes;
699 struct i40e_eth_stats *es; /* device's eth stats */
700 struct i40e_veb_tc_stats *veb_oes;
701 struct i40e_veb_tc_stats *veb_es;
704 idx = veb->stats_idx;
706 oes = &veb->stats_offsets;
707 veb_es = &veb->tc_stats;
708 veb_oes = &veb->tc_stats_offsets;
710 /* Gather up the stats that the hw collects */
711 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
712 veb->stat_offsets_loaded,
713 &oes->tx_discards, &es->tx_discards);
714 if (hw->revision_id > 0)
715 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
716 veb->stat_offsets_loaded,
717 &oes->rx_unknown_protocol,
718 &es->rx_unknown_protocol);
719 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
720 veb->stat_offsets_loaded,
721 &oes->rx_bytes, &es->rx_bytes);
722 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
723 veb->stat_offsets_loaded,
724 &oes->rx_unicast, &es->rx_unicast);
725 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
726 veb->stat_offsets_loaded,
727 &oes->rx_multicast, &es->rx_multicast);
728 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
729 veb->stat_offsets_loaded,
730 &oes->rx_broadcast, &es->rx_broadcast);
732 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
733 veb->stat_offsets_loaded,
734 &oes->tx_bytes, &es->tx_bytes);
735 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
736 veb->stat_offsets_loaded,
737 &oes->tx_unicast, &es->tx_unicast);
738 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
739 veb->stat_offsets_loaded,
740 &oes->tx_multicast, &es->tx_multicast);
741 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
742 veb->stat_offsets_loaded,
743 &oes->tx_broadcast, &es->tx_broadcast);
744 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
745 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
746 I40E_GLVEBTC_RPCL(i, idx),
747 veb->stat_offsets_loaded,
748 &veb_oes->tc_rx_packets[i],
749 &veb_es->tc_rx_packets[i]);
750 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
751 I40E_GLVEBTC_RBCL(i, idx),
752 veb->stat_offsets_loaded,
753 &veb_oes->tc_rx_bytes[i],
754 &veb_es->tc_rx_bytes[i]);
755 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
756 I40E_GLVEBTC_TPCL(i, idx),
757 veb->stat_offsets_loaded,
758 &veb_oes->tc_tx_packets[i],
759 &veb_es->tc_tx_packets[i]);
760 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
761 I40E_GLVEBTC_TBCL(i, idx),
762 veb->stat_offsets_loaded,
763 &veb_oes->tc_tx_bytes[i],
764 &veb_es->tc_tx_bytes[i]);
766 veb->stat_offsets_loaded = true;
770 * i40e_update_vsi_stats - Update the vsi statistics counters.
771 * @vsi: the VSI to be updated
773 * There are a few instances where we store the same stat in a
774 * couple of different structs. This is partly because we have
775 * the netdev stats that need to be filled out, which is slightly
776 * different from the "eth_stats" defined by the chip and used in
777 * VF communications. We sort it out here.
779 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
781 struct i40e_pf *pf = vsi->back;
782 struct rtnl_link_stats64 *ons;
783 struct rtnl_link_stats64 *ns; /* netdev stats */
784 struct i40e_eth_stats *oes;
785 struct i40e_eth_stats *es; /* device's eth stats */
786 u32 tx_restart, tx_busy;
797 if (test_bit(__I40E_VSI_DOWN, vsi->state) ||
798 test_bit(__I40E_CONFIG_BUSY, pf->state))
801 ns = i40e_get_vsi_stats_struct(vsi);
802 ons = &vsi->net_stats_offsets;
803 es = &vsi->eth_stats;
804 oes = &vsi->eth_stats_offsets;
806 /* Gather up the netdev and vsi stats that the driver collects
807 * on the fly during packet processing
811 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
815 for (q = 0; q < vsi->num_queue_pairs; q++) {
817 p = READ_ONCE(vsi->tx_rings[q]);
820 start = u64_stats_fetch_begin_irq(&p->syncp);
821 packets = p->stats.packets;
822 bytes = p->stats.bytes;
823 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
826 tx_restart += p->tx_stats.restart_queue;
827 tx_busy += p->tx_stats.tx_busy;
828 tx_linearize += p->tx_stats.tx_linearize;
829 tx_force_wb += p->tx_stats.tx_force_wb;
831 /* Rx queue is part of the same block as Tx queue */
834 start = u64_stats_fetch_begin_irq(&p->syncp);
835 packets = p->stats.packets;
836 bytes = p->stats.bytes;
837 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
840 rx_buf += p->rx_stats.alloc_buff_failed;
841 rx_page += p->rx_stats.alloc_page_failed;
844 vsi->tx_restart = tx_restart;
845 vsi->tx_busy = tx_busy;
846 vsi->tx_linearize = tx_linearize;
847 vsi->tx_force_wb = tx_force_wb;
848 vsi->rx_page_failed = rx_page;
849 vsi->rx_buf_failed = rx_buf;
851 ns->rx_packets = rx_p;
853 ns->tx_packets = tx_p;
856 /* update netdev stats from eth stats */
857 i40e_update_eth_stats(vsi);
858 ons->tx_errors = oes->tx_errors;
859 ns->tx_errors = es->tx_errors;
860 ons->multicast = oes->rx_multicast;
861 ns->multicast = es->rx_multicast;
862 ons->rx_dropped = oes->rx_discards;
863 ns->rx_dropped = es->rx_discards;
864 ons->tx_dropped = oes->tx_discards;
865 ns->tx_dropped = es->tx_discards;
867 /* pull in a couple PF stats if this is the main vsi */
868 if (vsi == pf->vsi[pf->lan_vsi]) {
869 ns->rx_crc_errors = pf->stats.crc_errors;
870 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
871 ns->rx_length_errors = pf->stats.rx_length_errors;
876 * i40e_update_pf_stats - Update the PF statistics counters.
877 * @pf: the PF to be updated
879 static void i40e_update_pf_stats(struct i40e_pf *pf)
881 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
882 struct i40e_hw_port_stats *nsd = &pf->stats;
883 struct i40e_hw *hw = &pf->hw;
887 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
888 I40E_GLPRT_GORCL(hw->port),
889 pf->stat_offsets_loaded,
890 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
891 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
892 I40E_GLPRT_GOTCL(hw->port),
893 pf->stat_offsets_loaded,
894 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
895 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
896 pf->stat_offsets_loaded,
897 &osd->eth.rx_discards,
898 &nsd->eth.rx_discards);
899 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
900 I40E_GLPRT_UPRCL(hw->port),
901 pf->stat_offsets_loaded,
902 &osd->eth.rx_unicast,
903 &nsd->eth.rx_unicast);
904 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
905 I40E_GLPRT_MPRCL(hw->port),
906 pf->stat_offsets_loaded,
907 &osd->eth.rx_multicast,
908 &nsd->eth.rx_multicast);
909 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
910 I40E_GLPRT_BPRCL(hw->port),
911 pf->stat_offsets_loaded,
912 &osd->eth.rx_broadcast,
913 &nsd->eth.rx_broadcast);
914 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
915 I40E_GLPRT_UPTCL(hw->port),
916 pf->stat_offsets_loaded,
917 &osd->eth.tx_unicast,
918 &nsd->eth.tx_unicast);
919 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
920 I40E_GLPRT_MPTCL(hw->port),
921 pf->stat_offsets_loaded,
922 &osd->eth.tx_multicast,
923 &nsd->eth.tx_multicast);
924 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
925 I40E_GLPRT_BPTCL(hw->port),
926 pf->stat_offsets_loaded,
927 &osd->eth.tx_broadcast,
928 &nsd->eth.tx_broadcast);
930 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
931 pf->stat_offsets_loaded,
932 &osd->tx_dropped_link_down,
933 &nsd->tx_dropped_link_down);
935 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
936 pf->stat_offsets_loaded,
937 &osd->crc_errors, &nsd->crc_errors);
939 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
940 pf->stat_offsets_loaded,
941 &osd->illegal_bytes, &nsd->illegal_bytes);
943 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
944 pf->stat_offsets_loaded,
945 &osd->mac_local_faults,
946 &nsd->mac_local_faults);
947 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
948 pf->stat_offsets_loaded,
949 &osd->mac_remote_faults,
950 &nsd->mac_remote_faults);
952 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
953 pf->stat_offsets_loaded,
954 &osd->rx_length_errors,
955 &nsd->rx_length_errors);
957 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
958 pf->stat_offsets_loaded,
959 &osd->link_xon_rx, &nsd->link_xon_rx);
960 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
961 pf->stat_offsets_loaded,
962 &osd->link_xon_tx, &nsd->link_xon_tx);
963 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
964 pf->stat_offsets_loaded,
965 &osd->link_xoff_rx, &nsd->link_xoff_rx);
966 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
967 pf->stat_offsets_loaded,
968 &osd->link_xoff_tx, &nsd->link_xoff_tx);
970 for (i = 0; i < 8; i++) {
971 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
972 pf->stat_offsets_loaded,
973 &osd->priority_xoff_rx[i],
974 &nsd->priority_xoff_rx[i]);
975 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
976 pf->stat_offsets_loaded,
977 &osd->priority_xon_rx[i],
978 &nsd->priority_xon_rx[i]);
979 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
980 pf->stat_offsets_loaded,
981 &osd->priority_xon_tx[i],
982 &nsd->priority_xon_tx[i]);
983 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
984 pf->stat_offsets_loaded,
985 &osd->priority_xoff_tx[i],
986 &nsd->priority_xoff_tx[i]);
987 i40e_stat_update32(hw,
988 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
989 pf->stat_offsets_loaded,
990 &osd->priority_xon_2_xoff[i],
991 &nsd->priority_xon_2_xoff[i]);
994 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
995 I40E_GLPRT_PRC64L(hw->port),
996 pf->stat_offsets_loaded,
997 &osd->rx_size_64, &nsd->rx_size_64);
998 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
999 I40E_GLPRT_PRC127L(hw->port),
1000 pf->stat_offsets_loaded,
1001 &osd->rx_size_127, &nsd->rx_size_127);
1002 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1003 I40E_GLPRT_PRC255L(hw->port),
1004 pf->stat_offsets_loaded,
1005 &osd->rx_size_255, &nsd->rx_size_255);
1006 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1007 I40E_GLPRT_PRC511L(hw->port),
1008 pf->stat_offsets_loaded,
1009 &osd->rx_size_511, &nsd->rx_size_511);
1010 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1011 I40E_GLPRT_PRC1023L(hw->port),
1012 pf->stat_offsets_loaded,
1013 &osd->rx_size_1023, &nsd->rx_size_1023);
1014 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1015 I40E_GLPRT_PRC1522L(hw->port),
1016 pf->stat_offsets_loaded,
1017 &osd->rx_size_1522, &nsd->rx_size_1522);
1018 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1019 I40E_GLPRT_PRC9522L(hw->port),
1020 pf->stat_offsets_loaded,
1021 &osd->rx_size_big, &nsd->rx_size_big);
1023 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1024 I40E_GLPRT_PTC64L(hw->port),
1025 pf->stat_offsets_loaded,
1026 &osd->tx_size_64, &nsd->tx_size_64);
1027 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1028 I40E_GLPRT_PTC127L(hw->port),
1029 pf->stat_offsets_loaded,
1030 &osd->tx_size_127, &nsd->tx_size_127);
1031 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1032 I40E_GLPRT_PTC255L(hw->port),
1033 pf->stat_offsets_loaded,
1034 &osd->tx_size_255, &nsd->tx_size_255);
1035 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1036 I40E_GLPRT_PTC511L(hw->port),
1037 pf->stat_offsets_loaded,
1038 &osd->tx_size_511, &nsd->tx_size_511);
1039 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1040 I40E_GLPRT_PTC1023L(hw->port),
1041 pf->stat_offsets_loaded,
1042 &osd->tx_size_1023, &nsd->tx_size_1023);
1043 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1044 I40E_GLPRT_PTC1522L(hw->port),
1045 pf->stat_offsets_loaded,
1046 &osd->tx_size_1522, &nsd->tx_size_1522);
1047 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1048 I40E_GLPRT_PTC9522L(hw->port),
1049 pf->stat_offsets_loaded,
1050 &osd->tx_size_big, &nsd->tx_size_big);
1052 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1053 pf->stat_offsets_loaded,
1054 &osd->rx_undersize, &nsd->rx_undersize);
1055 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1056 pf->stat_offsets_loaded,
1057 &osd->rx_fragments, &nsd->rx_fragments);
1058 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1059 pf->stat_offsets_loaded,
1060 &osd->rx_oversize, &nsd->rx_oversize);
1061 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1062 pf->stat_offsets_loaded,
1063 &osd->rx_jabber, &nsd->rx_jabber);
1066 i40e_stat_update_and_clear32(hw,
1067 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(hw->pf_id)),
1068 &nsd->fd_atr_match);
1069 i40e_stat_update_and_clear32(hw,
1070 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(hw->pf_id)),
1072 i40e_stat_update_and_clear32(hw,
1073 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(hw->pf_id)),
1074 &nsd->fd_atr_tunnel_match);
1076 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1077 nsd->tx_lpi_status =
1078 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1079 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1080 nsd->rx_lpi_status =
1081 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1082 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1083 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1084 pf->stat_offsets_loaded,
1085 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1086 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1087 pf->stat_offsets_loaded,
1088 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1090 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1091 !(pf->flags & I40E_FLAG_FD_SB_AUTO_DISABLED))
1092 nsd->fd_sb_status = true;
1094 nsd->fd_sb_status = false;
1096 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1097 !(pf->flags & I40E_FLAG_FD_ATR_AUTO_DISABLED))
1098 nsd->fd_atr_status = true;
1100 nsd->fd_atr_status = false;
1102 pf->stat_offsets_loaded = true;
1106 * i40e_update_stats - Update the various statistics counters.
1107 * @vsi: the VSI to be updated
1109 * Update the various stats for this VSI and its related entities.
1111 void i40e_update_stats(struct i40e_vsi *vsi)
1113 struct i40e_pf *pf = vsi->back;
1115 if (vsi == pf->vsi[pf->lan_vsi])
1116 i40e_update_pf_stats(pf);
1118 i40e_update_vsi_stats(vsi);
1122 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1123 * @vsi: the VSI to be searched
1124 * @macaddr: the MAC address
1127 * Returns ptr to the filter object or NULL
1129 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1130 const u8 *macaddr, s16 vlan)
1132 struct i40e_mac_filter *f;
1135 if (!vsi || !macaddr)
1138 key = i40e_addr_to_hkey(macaddr);
1139 hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1140 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1148 * i40e_find_mac - Find a mac addr in the macvlan filters list
1149 * @vsi: the VSI to be searched
1150 * @macaddr: the MAC address we are searching for
1152 * Returns the first filter with the provided MAC address or NULL if
1153 * MAC address was not found
1155 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, const u8 *macaddr)
1157 struct i40e_mac_filter *f;
1160 if (!vsi || !macaddr)
1163 key = i40e_addr_to_hkey(macaddr);
1164 hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1165 if ((ether_addr_equal(macaddr, f->macaddr)))
1172 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1173 * @vsi: the VSI to be searched
1175 * Returns true if VSI is in vlan mode or false otherwise
1177 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1179 /* If we have a PVID, always operate in VLAN mode */
1183 /* We need to operate in VLAN mode whenever we have any filters with
1184 * a VLAN other than I40E_VLAN_ALL. We could check the table each
1185 * time, incurring search cost repeatedly. However, we can notice two
1188 * 1) the only place where we can gain a VLAN filter is in
1191 * 2) the only place where filters are actually removed is in
1192 * i40e_sync_filters_subtask.
1194 * Thus, we can simply use a boolean value, has_vlan_filters which we
1195 * will set to true when we add a VLAN filter in i40e_add_filter. Then
1196 * we have to perform the full search after deleting filters in
1197 * i40e_sync_filters_subtask, but we already have to search
1198 * filters here and can perform the check at the same time. This
1199 * results in avoiding embedding a loop for VLAN mode inside another
1200 * loop over all the filters, and should maintain correctness as noted
1203 return vsi->has_vlan_filter;
1207 * i40e_correct_mac_vlan_filters - Correct non-VLAN filters if necessary
1208 * @vsi: the VSI to configure
1209 * @tmp_add_list: list of filters ready to be added
1210 * @tmp_del_list: list of filters ready to be deleted
1211 * @vlan_filters: the number of active VLAN filters
1213 * Update VLAN=0 and VLAN=-1 (I40E_VLAN_ANY) filters properly so that they
1214 * behave as expected. If we have any active VLAN filters remaining or about
1215 * to be added then we need to update non-VLAN filters to be marked as VLAN=0
1216 * so that they only match against untagged traffic. If we no longer have any
1217 * active VLAN filters, we need to make all non-VLAN filters marked as VLAN=-1
1218 * so that they match against both tagged and untagged traffic. In this way,
1219 * we ensure that we correctly receive the desired traffic. This ensures that
1220 * when we have an active VLAN we will receive only untagged traffic and
1221 * traffic matching active VLANs. If we have no active VLANs then we will
1222 * operate in non-VLAN mode and receive all traffic, tagged or untagged.
1224 * Finally, in a similar fashion, this function also corrects filters when
1225 * there is an active PVID assigned to this VSI.
1227 * In case of memory allocation failure return -ENOMEM. Otherwise, return 0.
1229 * This function is only expected to be called from within
1230 * i40e_sync_vsi_filters.
1232 * NOTE: This function expects to be called while under the
1233 * mac_filter_hash_lock
1235 static int i40e_correct_mac_vlan_filters(struct i40e_vsi *vsi,
1236 struct hlist_head *tmp_add_list,
1237 struct hlist_head *tmp_del_list,
1240 s16 pvid = le16_to_cpu(vsi->info.pvid);
1241 struct i40e_mac_filter *f, *add_head;
1242 struct i40e_new_mac_filter *new;
1243 struct hlist_node *h;
1246 /* To determine if a particular filter needs to be replaced we
1247 * have the three following conditions:
1249 * a) if we have a PVID assigned, then all filters which are
1250 * not marked as VLAN=PVID must be replaced with filters that
1252 * b) otherwise, if we have any active VLANS, all filters
1253 * which are marked as VLAN=-1 must be replaced with
1254 * filters marked as VLAN=0
1255 * c) finally, if we do not have any active VLANS, all filters
1256 * which are marked as VLAN=0 must be replaced with filters
1260 /* Update the filters about to be added in place */
1261 hlist_for_each_entry(new, tmp_add_list, hlist) {
1262 if (pvid && new->f->vlan != pvid)
1263 new->f->vlan = pvid;
1264 else if (vlan_filters && new->f->vlan == I40E_VLAN_ANY)
1266 else if (!vlan_filters && new->f->vlan == 0)
1267 new->f->vlan = I40E_VLAN_ANY;
1270 /* Update the remaining active filters */
1271 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1272 /* Combine the checks for whether a filter needs to be changed
1273 * and then determine the new VLAN inside the if block, in
1274 * order to avoid duplicating code for adding the new filter
1275 * then deleting the old filter.
1277 if ((pvid && f->vlan != pvid) ||
1278 (vlan_filters && f->vlan == I40E_VLAN_ANY) ||
1279 (!vlan_filters && f->vlan == 0)) {
1280 /* Determine the new vlan we will be adding */
1283 else if (vlan_filters)
1286 new_vlan = I40E_VLAN_ANY;
1288 /* Create the new filter */
1289 add_head = i40e_add_filter(vsi, f->macaddr, new_vlan);
1293 /* Create a temporary i40e_new_mac_filter */
1294 new = kzalloc(sizeof(*new), GFP_ATOMIC);
1299 new->state = add_head->state;
1301 /* Add the new filter to the tmp list */
1302 hlist_add_head(&new->hlist, tmp_add_list);
1304 /* Put the original filter into the delete list */
1305 f->state = I40E_FILTER_REMOVE;
1306 hash_del(&f->hlist);
1307 hlist_add_head(&f->hlist, tmp_del_list);
1311 vsi->has_vlan_filter = !!vlan_filters;
1317 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1318 * @vsi: the PF Main VSI - inappropriate for any other VSI
1319 * @macaddr: the MAC address
1321 * Remove whatever filter the firmware set up so the driver can manage
1322 * its own filtering intelligently.
1324 static void i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1326 struct i40e_aqc_remove_macvlan_element_data element;
1327 struct i40e_pf *pf = vsi->back;
1329 /* Only appropriate for the PF main VSI */
1330 if (vsi->type != I40E_VSI_MAIN)
1333 memset(&element, 0, sizeof(element));
1334 ether_addr_copy(element.mac_addr, macaddr);
1335 element.vlan_tag = 0;
1336 /* Ignore error returns, some firmware does it this way... */
1337 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1338 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1340 memset(&element, 0, sizeof(element));
1341 ether_addr_copy(element.mac_addr, macaddr);
1342 element.vlan_tag = 0;
1343 /* ...and some firmware does it this way. */
1344 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1345 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1346 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1350 * i40e_add_filter - Add a mac/vlan filter to the VSI
1351 * @vsi: the VSI to be searched
1352 * @macaddr: the MAC address
1355 * Returns ptr to the filter object or NULL when no memory available.
1357 * NOTE: This function is expected to be called with mac_filter_hash_lock
1360 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1361 const u8 *macaddr, s16 vlan)
1363 struct i40e_mac_filter *f;
1366 if (!vsi || !macaddr)
1369 f = i40e_find_filter(vsi, macaddr, vlan);
1371 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1375 /* Update the boolean indicating if we need to function in
1379 vsi->has_vlan_filter = true;
1381 ether_addr_copy(f->macaddr, macaddr);
1383 /* If we're in overflow promisc mode, set the state directly
1384 * to failed, so we don't bother to try sending the filter
1387 if (test_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state))
1388 f->state = I40E_FILTER_FAILED;
1390 f->state = I40E_FILTER_NEW;
1391 INIT_HLIST_NODE(&f->hlist);
1393 key = i40e_addr_to_hkey(macaddr);
1394 hash_add(vsi->mac_filter_hash, &f->hlist, key);
1396 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1397 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1400 /* If we're asked to add a filter that has been marked for removal, it
1401 * is safe to simply restore it to active state. __i40e_del_filter
1402 * will have simply deleted any filters which were previously marked
1403 * NEW or FAILED, so if it is currently marked REMOVE it must have
1404 * previously been ACTIVE. Since we haven't yet run the sync filters
1405 * task, just restore this filter to the ACTIVE state so that the
1406 * sync task leaves it in place
1408 if (f->state == I40E_FILTER_REMOVE)
1409 f->state = I40E_FILTER_ACTIVE;
1415 * __i40e_del_filter - Remove a specific filter from the VSI
1416 * @vsi: VSI to remove from
1417 * @f: the filter to remove from the list
1419 * This function should be called instead of i40e_del_filter only if you know
1420 * the exact filter you will remove already, such as via i40e_find_filter or
1423 * NOTE: This function is expected to be called with mac_filter_hash_lock
1425 * ANOTHER NOTE: This function MUST be called from within the context of
1426 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1427 * instead of list_for_each_entry().
1429 void __i40e_del_filter(struct i40e_vsi *vsi, struct i40e_mac_filter *f)
1434 /* If the filter was never added to firmware then we can just delete it
1435 * directly and we don't want to set the status to remove or else an
1436 * admin queue command will unnecessarily fire.
1438 if ((f->state == I40E_FILTER_FAILED) ||
1439 (f->state == I40E_FILTER_NEW)) {
1440 hash_del(&f->hlist);
1443 f->state = I40E_FILTER_REMOVE;
1446 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1447 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1451 * i40e_del_filter - Remove a MAC/VLAN filter from the VSI
1452 * @vsi: the VSI to be searched
1453 * @macaddr: the MAC address
1456 * NOTE: This function is expected to be called with mac_filter_hash_lock
1458 * ANOTHER NOTE: This function MUST be called from within the context of
1459 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1460 * instead of list_for_each_entry().
1462 void i40e_del_filter(struct i40e_vsi *vsi, const u8 *macaddr, s16 vlan)
1464 struct i40e_mac_filter *f;
1466 if (!vsi || !macaddr)
1469 f = i40e_find_filter(vsi, macaddr, vlan);
1470 __i40e_del_filter(vsi, f);
1474 * i40e_add_mac_filter - Add a MAC filter for all active VLANs
1475 * @vsi: the VSI to be searched
1476 * @macaddr: the mac address to be filtered
1478 * If we're not in VLAN mode, just add the filter to I40E_VLAN_ANY. Otherwise,
1479 * go through all the macvlan filters and add a macvlan filter for each
1480 * unique vlan that already exists. If a PVID has been assigned, instead only
1481 * add the macaddr to that VLAN.
1483 * Returns last filter added on success, else NULL
1485 struct i40e_mac_filter *i40e_add_mac_filter(struct i40e_vsi *vsi,
1488 struct i40e_mac_filter *f, *add = NULL;
1489 struct hlist_node *h;
1493 return i40e_add_filter(vsi, macaddr,
1494 le16_to_cpu(vsi->info.pvid));
1496 if (!i40e_is_vsi_in_vlan(vsi))
1497 return i40e_add_filter(vsi, macaddr, I40E_VLAN_ANY);
1499 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1500 if (f->state == I40E_FILTER_REMOVE)
1502 add = i40e_add_filter(vsi, macaddr, f->vlan);
1511 * i40e_del_mac_filter - Remove a MAC filter from all VLANs
1512 * @vsi: the VSI to be searched
1513 * @macaddr: the mac address to be removed
1515 * Removes a given MAC address from a VSI regardless of what VLAN it has been
1518 * Returns 0 for success, or error
1520 int i40e_del_mac_filter(struct i40e_vsi *vsi, const u8 *macaddr)
1522 struct i40e_mac_filter *f;
1523 struct hlist_node *h;
1527 WARN(!spin_is_locked(&vsi->mac_filter_hash_lock),
1528 "Missing mac_filter_hash_lock\n");
1529 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1530 if (ether_addr_equal(macaddr, f->macaddr)) {
1531 __i40e_del_filter(vsi, f);
1543 * i40e_set_mac - NDO callback to set mac address
1544 * @netdev: network interface device structure
1545 * @p: pointer to an address structure
1547 * Returns 0 on success, negative on failure
1549 static int i40e_set_mac(struct net_device *netdev, void *p)
1551 struct i40e_netdev_priv *np = netdev_priv(netdev);
1552 struct i40e_vsi *vsi = np->vsi;
1553 struct i40e_pf *pf = vsi->back;
1554 struct i40e_hw *hw = &pf->hw;
1555 struct sockaddr *addr = p;
1557 if (!is_valid_ether_addr(addr->sa_data))
1558 return -EADDRNOTAVAIL;
1560 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1561 netdev_info(netdev, "already using mac address %pM\n",
1566 if (test_bit(__I40E_VSI_DOWN, vsi->back->state) ||
1567 test_bit(__I40E_RESET_RECOVERY_PENDING, vsi->back->state))
1568 return -EADDRNOTAVAIL;
1570 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1571 netdev_info(netdev, "returning to hw mac address %pM\n",
1574 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1576 /* Copy the address first, so that we avoid a possible race with
1577 * .set_rx_mode(). If we copy after changing the address in the filter
1578 * list, we might open ourselves to a narrow race window where
1579 * .set_rx_mode could delete our dev_addr filter and prevent traffic
1582 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1584 spin_lock_bh(&vsi->mac_filter_hash_lock);
1585 i40e_del_mac_filter(vsi, netdev->dev_addr);
1586 i40e_add_mac_filter(vsi, addr->sa_data);
1587 spin_unlock_bh(&vsi->mac_filter_hash_lock);
1588 if (vsi->type == I40E_VSI_MAIN) {
1591 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1592 I40E_AQC_WRITE_TYPE_LAA_WOL,
1593 addr->sa_data, NULL);
1595 netdev_info(netdev, "Ignoring error from firmware on LAA update, status %s, AQ ret %s\n",
1596 i40e_stat_str(hw, ret),
1597 i40e_aq_str(hw, hw->aq.asq_last_status));
1600 /* schedule our worker thread which will take care of
1601 * applying the new filter changes
1603 i40e_service_event_schedule(vsi->back);
1608 * i40e_config_rss_aq - Prepare for RSS using AQ commands
1609 * @vsi: vsi structure
1610 * @seed: RSS hash seed
1612 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
1613 u8 *lut, u16 lut_size)
1615 struct i40e_pf *pf = vsi->back;
1616 struct i40e_hw *hw = &pf->hw;
1620 struct i40e_aqc_get_set_rss_key_data *seed_dw =
1621 (struct i40e_aqc_get_set_rss_key_data *)seed;
1622 ret = i40e_aq_set_rss_key(hw, vsi->id, seed_dw);
1624 dev_info(&pf->pdev->dev,
1625 "Cannot set RSS key, err %s aq_err %s\n",
1626 i40e_stat_str(hw, ret),
1627 i40e_aq_str(hw, hw->aq.asq_last_status));
1632 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;
1634 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
1636 dev_info(&pf->pdev->dev,
1637 "Cannot set RSS lut, err %s aq_err %s\n",
1638 i40e_stat_str(hw, ret),
1639 i40e_aq_str(hw, hw->aq.asq_last_status));
1647 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
1648 * @vsi: VSI structure
1650 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
1652 struct i40e_pf *pf = vsi->back;
1653 u8 seed[I40E_HKEY_ARRAY_SIZE];
1657 if (!(pf->hw_features & I40E_HW_RSS_AQ_CAPABLE))
1660 vsi->rss_size = min_t(int, pf->alloc_rss_size,
1661 vsi->num_queue_pairs);
1664 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
1668 /* Use the user configured hash keys and lookup table if there is one,
1669 * otherwise use default
1671 if (vsi->rss_lut_user)
1672 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
1674 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
1675 if (vsi->rss_hkey_user)
1676 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
1678 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
1679 ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);
1685 * i40e_vsi_setup_queue_map_mqprio - Prepares mqprio based tc_config
1686 * @vsi: the VSI being configured,
1687 * @ctxt: VSI context structure
1688 * @enabled_tc: number of traffic classes to enable
1690 * Prepares VSI tc_config to have queue configurations based on MQPRIO options.
1692 static int i40e_vsi_setup_queue_map_mqprio(struct i40e_vsi *vsi,
1693 struct i40e_vsi_context *ctxt,
1696 u16 qcount = 0, max_qcount, qmap, sections = 0;
1697 int i, override_q, pow, num_qps, ret;
1698 u8 netdev_tc = 0, offset = 0;
1700 if (vsi->type != I40E_VSI_MAIN)
1702 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1703 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1704 vsi->tc_config.numtc = vsi->mqprio_qopt.qopt.num_tc;
1705 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1706 num_qps = vsi->mqprio_qopt.qopt.count[0];
1708 /* find the next higher power-of-2 of num queue pairs */
1709 pow = ilog2(num_qps);
1710 if (!is_power_of_2(num_qps))
1712 qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1713 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1715 /* Setup queue offset/count for all TCs for given VSI */
1716 max_qcount = vsi->mqprio_qopt.qopt.count[0];
1717 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1718 /* See if the given TC is enabled for the given VSI */
1719 if (vsi->tc_config.enabled_tc & BIT(i)) {
1720 offset = vsi->mqprio_qopt.qopt.offset[i];
1721 qcount = vsi->mqprio_qopt.qopt.count[i];
1722 if (qcount > max_qcount)
1723 max_qcount = qcount;
1724 vsi->tc_config.tc_info[i].qoffset = offset;
1725 vsi->tc_config.tc_info[i].qcount = qcount;
1726 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1728 /* TC is not enabled so set the offset to
1729 * default queue and allocate one queue
1732 vsi->tc_config.tc_info[i].qoffset = 0;
1733 vsi->tc_config.tc_info[i].qcount = 1;
1734 vsi->tc_config.tc_info[i].netdev_tc = 0;
1738 /* Set actual Tx/Rx queue pairs */
1739 vsi->num_queue_pairs = offset + qcount;
1741 /* Setup queue TC[0].qmap for given VSI context */
1742 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
1743 ctxt->info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1744 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1745 ctxt->info.valid_sections |= cpu_to_le16(sections);
1747 /* Reconfigure RSS for main VSI with max queue count */
1748 vsi->rss_size = max_qcount;
1749 ret = i40e_vsi_config_rss(vsi);
1751 dev_info(&vsi->back->pdev->dev,
1752 "Failed to reconfig rss for num_queues (%u)\n",
1756 vsi->reconfig_rss = true;
1757 dev_dbg(&vsi->back->pdev->dev,
1758 "Reconfigured rss with num_queues (%u)\n", max_qcount);
1760 /* Find queue count available for channel VSIs and starting offset
1763 override_q = vsi->mqprio_qopt.qopt.count[0];
1764 if (override_q && override_q < vsi->num_queue_pairs) {
1765 vsi->cnt_q_avail = vsi->num_queue_pairs - override_q;
1766 vsi->next_base_queue = override_q;
1772 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1773 * @vsi: the VSI being setup
1774 * @ctxt: VSI context structure
1775 * @enabled_tc: Enabled TCs bitmap
1776 * @is_add: True if called before Add VSI
1778 * Setup VSI queue mapping for enabled traffic classes.
1780 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1781 struct i40e_vsi_context *ctxt,
1785 struct i40e_pf *pf = vsi->back;
1795 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1798 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1799 /* Find numtc from enabled TC bitmap */
1800 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1801 if (enabled_tc & BIT(i)) /* TC is enabled */
1805 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1809 /* At least TC0 is enabled in non-DCB, non-MQPRIO case */
1813 vsi->tc_config.numtc = numtc;
1814 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1815 /* Number of queues per enabled TC */
1816 qcount = vsi->alloc_queue_pairs;
1818 num_tc_qps = qcount / numtc;
1819 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1821 /* Setup queue offset/count for all TCs for given VSI */
1822 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1823 /* See if the given TC is enabled for the given VSI */
1824 if (vsi->tc_config.enabled_tc & BIT(i)) {
1828 switch (vsi->type) {
1830 qcount = min_t(int, pf->alloc_rss_size,
1834 case I40E_VSI_SRIOV:
1835 case I40E_VSI_VMDQ2:
1837 qcount = num_tc_qps;
1841 vsi->tc_config.tc_info[i].qoffset = offset;
1842 vsi->tc_config.tc_info[i].qcount = qcount;
1844 /* find the next higher power-of-2 of num queue pairs */
1847 while (num_qps && (BIT_ULL(pow) < qcount)) {
1852 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1854 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1855 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1859 /* TC is not enabled so set the offset to
1860 * default queue and allocate one queue
1863 vsi->tc_config.tc_info[i].qoffset = 0;
1864 vsi->tc_config.tc_info[i].qcount = 1;
1865 vsi->tc_config.tc_info[i].netdev_tc = 0;
1869 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1872 /* Set actual Tx/Rx queue pairs */
1873 vsi->num_queue_pairs = offset;
1874 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1875 if (vsi->req_queue_pairs > 0)
1876 vsi->num_queue_pairs = vsi->req_queue_pairs;
1877 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1878 vsi->num_queue_pairs = pf->num_lan_msix;
1881 /* Scheduler section valid can only be set for ADD VSI */
1883 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1885 ctxt->info.up_enable_bits = enabled_tc;
1887 if (vsi->type == I40E_VSI_SRIOV) {
1888 ctxt->info.mapping_flags |=
1889 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1890 for (i = 0; i < vsi->num_queue_pairs; i++)
1891 ctxt->info.queue_mapping[i] =
1892 cpu_to_le16(vsi->base_queue + i);
1894 ctxt->info.mapping_flags |=
1895 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1896 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1898 ctxt->info.valid_sections |= cpu_to_le16(sections);
1902 * i40e_addr_sync - Callback for dev_(mc|uc)_sync to add address
1903 * @netdev: the netdevice
1904 * @addr: address to add
1906 * Called by __dev_(mc|uc)_sync when an address needs to be added. We call
1907 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
1909 static int i40e_addr_sync(struct net_device *netdev, const u8 *addr)
1911 struct i40e_netdev_priv *np = netdev_priv(netdev);
1912 struct i40e_vsi *vsi = np->vsi;
1914 if (i40e_add_mac_filter(vsi, addr))
1921 * i40e_addr_unsync - Callback for dev_(mc|uc)_sync to remove address
1922 * @netdev: the netdevice
1923 * @addr: address to add
1925 * Called by __dev_(mc|uc)_sync when an address needs to be removed. We call
1926 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
1928 static int i40e_addr_unsync(struct net_device *netdev, const u8 *addr)
1930 struct i40e_netdev_priv *np = netdev_priv(netdev);
1931 struct i40e_vsi *vsi = np->vsi;
1933 /* Under some circumstances, we might receive a request to delete
1934 * our own device address from our uc list. Because we store the
1935 * device address in the VSI's MAC/VLAN filter list, we need to ignore
1936 * such requests and not delete our device address from this list.
1938 if (ether_addr_equal(addr, netdev->dev_addr))
1941 i40e_del_mac_filter(vsi, addr);
1947 * i40e_set_rx_mode - NDO callback to set the netdev filters
1948 * @netdev: network interface device structure
1950 static void i40e_set_rx_mode(struct net_device *netdev)
1952 struct i40e_netdev_priv *np = netdev_priv(netdev);
1953 struct i40e_vsi *vsi = np->vsi;
1955 spin_lock_bh(&vsi->mac_filter_hash_lock);
1957 __dev_uc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
1958 __dev_mc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
1960 spin_unlock_bh(&vsi->mac_filter_hash_lock);
1962 /* check for other flag changes */
1963 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1964 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1965 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1970 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
1971 * @vsi: Pointer to VSI struct
1972 * @from: Pointer to list which contains MAC filter entries - changes to
1973 * those entries needs to be undone.
1975 * MAC filter entries from this list were slated for deletion.
1977 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
1978 struct hlist_head *from)
1980 struct i40e_mac_filter *f;
1981 struct hlist_node *h;
1983 hlist_for_each_entry_safe(f, h, from, hlist) {
1984 u64 key = i40e_addr_to_hkey(f->macaddr);
1986 /* Move the element back into MAC filter list*/
1987 hlist_del(&f->hlist);
1988 hash_add(vsi->mac_filter_hash, &f->hlist, key);
1993 * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries
1994 * @vsi: Pointer to vsi struct
1995 * @from: Pointer to list which contains MAC filter entries - changes to
1996 * those entries needs to be undone.
1998 * MAC filter entries from this list were slated for addition.
2000 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi,
2001 struct hlist_head *from)
2003 struct i40e_new_mac_filter *new;
2004 struct hlist_node *h;
2006 hlist_for_each_entry_safe(new, h, from, hlist) {
2007 /* We can simply free the wrapper structure */
2008 hlist_del(&new->hlist);
2014 * i40e_next_entry - Get the next non-broadcast filter from a list
2015 * @next: pointer to filter in list
2017 * Returns the next non-broadcast filter in the list. Required so that we
2018 * ignore broadcast filters within the list, since these are not handled via
2019 * the normal firmware update path.
2022 struct i40e_new_mac_filter *i40e_next_filter(struct i40e_new_mac_filter *next)
2024 hlist_for_each_entry_continue(next, hlist) {
2025 if (!is_broadcast_ether_addr(next->f->macaddr))
2033 * i40e_update_filter_state - Update filter state based on return data
2035 * @count: Number of filters added
2036 * @add_list: return data from fw
2037 * @head: pointer to first filter in current batch
2039 * MAC filter entries from list were slated to be added to device. Returns
2040 * number of successful filters. Note that 0 does NOT mean success!
2043 i40e_update_filter_state(int count,
2044 struct i40e_aqc_add_macvlan_element_data *add_list,
2045 struct i40e_new_mac_filter *add_head)
2050 for (i = 0; i < count; i++) {
2051 /* Always check status of each filter. We don't need to check
2052 * the firmware return status because we pre-set the filter
2053 * status to I40E_AQC_MM_ERR_NO_RES when sending the filter
2054 * request to the adminq. Thus, if it no longer matches then
2055 * we know the filter is active.
2057 if (add_list[i].match_method == I40E_AQC_MM_ERR_NO_RES) {
2058 add_head->state = I40E_FILTER_FAILED;
2060 add_head->state = I40E_FILTER_ACTIVE;
2064 add_head = i40e_next_filter(add_head);
2073 * i40e_aqc_del_filters - Request firmware to delete a set of filters
2074 * @vsi: ptr to the VSI
2075 * @vsi_name: name to display in messages
2076 * @list: the list of filters to send to firmware
2077 * @num_del: the number of filters to delete
2078 * @retval: Set to -EIO on failure to delete
2080 * Send a request to firmware via AdminQ to delete a set of filters. Uses
2081 * *retval instead of a return value so that success does not force ret_val to
2082 * be set to 0. This ensures that a sequence of calls to this function
2083 * preserve the previous value of *retval on successful delete.
2086 void i40e_aqc_del_filters(struct i40e_vsi *vsi, const char *vsi_name,
2087 struct i40e_aqc_remove_macvlan_element_data *list,
2088 int num_del, int *retval)
2090 struct i40e_hw *hw = &vsi->back->hw;
2094 aq_ret = i40e_aq_remove_macvlan(hw, vsi->seid, list, num_del, NULL);
2095 aq_err = hw->aq.asq_last_status;
2097 /* Explicitly ignore and do not report when firmware returns ENOENT */
2098 if (aq_ret && !(aq_err == I40E_AQ_RC_ENOENT)) {
2100 dev_info(&vsi->back->pdev->dev,
2101 "ignoring delete macvlan error on %s, err %s, aq_err %s\n",
2102 vsi_name, i40e_stat_str(hw, aq_ret),
2103 i40e_aq_str(hw, aq_err));
2108 * i40e_aqc_add_filters - Request firmware to add a set of filters
2109 * @vsi: ptr to the VSI
2110 * @vsi_name: name to display in messages
2111 * @list: the list of filters to send to firmware
2112 * @add_head: Position in the add hlist
2113 * @num_add: the number of filters to add
2114 * @promisc_change: set to true on exit if promiscuous mode was forced on
2116 * Send a request to firmware via AdminQ to add a chunk of filters. Will set
2117 * promisc_changed to true if the firmware has run out of space for more
2121 void i40e_aqc_add_filters(struct i40e_vsi *vsi, const char *vsi_name,
2122 struct i40e_aqc_add_macvlan_element_data *list,
2123 struct i40e_new_mac_filter *add_head,
2124 int num_add, bool *promisc_changed)
2126 struct i40e_hw *hw = &vsi->back->hw;
2129 i40e_aq_add_macvlan(hw, vsi->seid, list, num_add, NULL);
2130 aq_err = hw->aq.asq_last_status;
2131 fcnt = i40e_update_filter_state(num_add, list, add_head);
2133 if (fcnt != num_add) {
2134 *promisc_changed = true;
2135 set_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2136 dev_warn(&vsi->back->pdev->dev,
2137 "Error %s adding RX filters on %s, promiscuous mode forced on\n",
2138 i40e_aq_str(hw, aq_err),
2144 * i40e_aqc_broadcast_filter - Set promiscuous broadcast flags
2145 * @vsi: pointer to the VSI
2148 * This function sets or clears the promiscuous broadcast flags for VLAN
2149 * filters in order to properly receive broadcast frames. Assumes that only
2150 * broadcast filters are passed.
2152 * Returns status indicating success or failure;
2155 i40e_aqc_broadcast_filter(struct i40e_vsi *vsi, const char *vsi_name,
2156 struct i40e_mac_filter *f)
2158 bool enable = f->state == I40E_FILTER_NEW;
2159 struct i40e_hw *hw = &vsi->back->hw;
2162 if (f->vlan == I40E_VLAN_ANY) {
2163 aq_ret = i40e_aq_set_vsi_broadcast(hw,
2168 aq_ret = i40e_aq_set_vsi_bc_promisc_on_vlan(hw,
2176 dev_warn(&vsi->back->pdev->dev,
2177 "Error %s setting broadcast promiscuous mode on %s\n",
2178 i40e_aq_str(hw, hw->aq.asq_last_status),
2185 * i40e_set_promiscuous - set promiscuous mode
2186 * @pf: board private structure
2187 * @promisc: promisc on or off
2189 * There are different ways of setting promiscuous mode on a PF depending on
2190 * what state/environment we're in. This identifies and sets it appropriately.
2191 * Returns 0 on success.
2193 static int i40e_set_promiscuous(struct i40e_pf *pf, bool promisc)
2195 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
2196 struct i40e_hw *hw = &pf->hw;
2199 if (vsi->type == I40E_VSI_MAIN &&
2200 pf->lan_veb != I40E_NO_VEB &&
2201 !(pf->flags & I40E_FLAG_MFP_ENABLED)) {
2202 /* set defport ON for Main VSI instead of true promisc
2203 * this way we will get all unicast/multicast and VLAN
2204 * promisc behavior but will not get VF or VMDq traffic
2205 * replicated on the Main VSI.
2208 aq_ret = i40e_aq_set_default_vsi(hw,
2212 aq_ret = i40e_aq_clear_default_vsi(hw,
2216 dev_info(&pf->pdev->dev,
2217 "Set default VSI failed, err %s, aq_err %s\n",
2218 i40e_stat_str(hw, aq_ret),
2219 i40e_aq_str(hw, hw->aq.asq_last_status));
2222 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(
2228 dev_info(&pf->pdev->dev,
2229 "set unicast promisc failed, err %s, aq_err %s\n",
2230 i40e_stat_str(hw, aq_ret),
2231 i40e_aq_str(hw, hw->aq.asq_last_status));
2233 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(
2238 dev_info(&pf->pdev->dev,
2239 "set multicast promisc failed, err %s, aq_err %s\n",
2240 i40e_stat_str(hw, aq_ret),
2241 i40e_aq_str(hw, hw->aq.asq_last_status));
2246 pf->cur_promisc = promisc;
2252 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
2253 * @vsi: ptr to the VSI
2255 * Push any outstanding VSI filter changes through the AdminQ.
2257 * Returns 0 or error value
2259 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
2261 struct hlist_head tmp_add_list, tmp_del_list;
2262 struct i40e_mac_filter *f;
2263 struct i40e_new_mac_filter *new, *add_head = NULL;
2264 struct i40e_hw *hw = &vsi->back->hw;
2265 unsigned int failed_filters = 0;
2266 unsigned int vlan_filters = 0;
2267 bool promisc_changed = false;
2268 char vsi_name[16] = "PF";
2269 int filter_list_len = 0;
2270 i40e_status aq_ret = 0;
2271 u32 changed_flags = 0;
2272 struct hlist_node *h;
2281 /* empty array typed pointers, kcalloc later */
2282 struct i40e_aqc_add_macvlan_element_data *add_list;
2283 struct i40e_aqc_remove_macvlan_element_data *del_list;
2285 while (test_and_set_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state))
2286 usleep_range(1000, 2000);
2290 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
2291 vsi->current_netdev_flags = vsi->netdev->flags;
2294 INIT_HLIST_HEAD(&tmp_add_list);
2295 INIT_HLIST_HEAD(&tmp_del_list);
2297 if (vsi->type == I40E_VSI_SRIOV)
2298 snprintf(vsi_name, sizeof(vsi_name) - 1, "VF %d", vsi->vf_id);
2299 else if (vsi->type != I40E_VSI_MAIN)
2300 snprintf(vsi_name, sizeof(vsi_name) - 1, "vsi %d", vsi->seid);
2302 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
2303 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
2305 spin_lock_bh(&vsi->mac_filter_hash_lock);
2306 /* Create a list of filters to delete. */
2307 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2308 if (f->state == I40E_FILTER_REMOVE) {
2309 /* Move the element into temporary del_list */
2310 hash_del(&f->hlist);
2311 hlist_add_head(&f->hlist, &tmp_del_list);
2313 /* Avoid counting removed filters */
2316 if (f->state == I40E_FILTER_NEW) {
2317 /* Create a temporary i40e_new_mac_filter */
2318 new = kzalloc(sizeof(*new), GFP_ATOMIC);
2320 goto err_no_memory_locked;
2322 /* Store pointer to the real filter */
2324 new->state = f->state;
2326 /* Add it to the hash list */
2327 hlist_add_head(&new->hlist, &tmp_add_list);
2330 /* Count the number of active (current and new) VLAN
2331 * filters we have now. Does not count filters which
2332 * are marked for deletion.
2338 retval = i40e_correct_mac_vlan_filters(vsi,
2343 goto err_no_memory_locked;
2345 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2348 /* Now process 'del_list' outside the lock */
2349 if (!hlist_empty(&tmp_del_list)) {
2350 filter_list_len = hw->aq.asq_buf_size /
2351 sizeof(struct i40e_aqc_remove_macvlan_element_data);
2352 list_size = filter_list_len *
2353 sizeof(struct i40e_aqc_remove_macvlan_element_data);
2354 del_list = kzalloc(list_size, GFP_ATOMIC);
2358 hlist_for_each_entry_safe(f, h, &tmp_del_list, hlist) {
2361 /* handle broadcast filters by updating the broadcast
2362 * promiscuous flag and release filter list.
2364 if (is_broadcast_ether_addr(f->macaddr)) {
2365 i40e_aqc_broadcast_filter(vsi, vsi_name, f);
2367 hlist_del(&f->hlist);
2372 /* add to delete list */
2373 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
2374 if (f->vlan == I40E_VLAN_ANY) {
2375 del_list[num_del].vlan_tag = 0;
2376 cmd_flags |= I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
2378 del_list[num_del].vlan_tag =
2379 cpu_to_le16((u16)(f->vlan));
2382 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
2383 del_list[num_del].flags = cmd_flags;
2386 /* flush a full buffer */
2387 if (num_del == filter_list_len) {
2388 i40e_aqc_del_filters(vsi, vsi_name, del_list,
2390 memset(del_list, 0, list_size);
2393 /* Release memory for MAC filter entries which were
2394 * synced up with HW.
2396 hlist_del(&f->hlist);
2401 i40e_aqc_del_filters(vsi, vsi_name, del_list,
2409 if (!hlist_empty(&tmp_add_list)) {
2410 /* Do all the adds now. */
2411 filter_list_len = hw->aq.asq_buf_size /
2412 sizeof(struct i40e_aqc_add_macvlan_element_data);
2413 list_size = filter_list_len *
2414 sizeof(struct i40e_aqc_add_macvlan_element_data);
2415 add_list = kzalloc(list_size, GFP_ATOMIC);
2420 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2421 if (test_bit(__I40E_VSI_OVERFLOW_PROMISC,
2423 new->state = I40E_FILTER_FAILED;
2427 /* handle broadcast filters by updating the broadcast
2428 * promiscuous flag instead of adding a MAC filter.
2430 if (is_broadcast_ether_addr(new->f->macaddr)) {
2431 if (i40e_aqc_broadcast_filter(vsi, vsi_name,
2433 new->state = I40E_FILTER_FAILED;
2435 new->state = I40E_FILTER_ACTIVE;
2439 /* add to add array */
2443 ether_addr_copy(add_list[num_add].mac_addr,
2445 if (new->f->vlan == I40E_VLAN_ANY) {
2446 add_list[num_add].vlan_tag = 0;
2447 cmd_flags |= I40E_AQC_MACVLAN_ADD_IGNORE_VLAN;
2449 add_list[num_add].vlan_tag =
2450 cpu_to_le16((u16)(new->f->vlan));
2452 add_list[num_add].queue_number = 0;
2453 /* set invalid match method for later detection */
2454 add_list[num_add].match_method = I40E_AQC_MM_ERR_NO_RES;
2455 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2456 add_list[num_add].flags = cpu_to_le16(cmd_flags);
2459 /* flush a full buffer */
2460 if (num_add == filter_list_len) {
2461 i40e_aqc_add_filters(vsi, vsi_name, add_list,
2464 memset(add_list, 0, list_size);
2469 i40e_aqc_add_filters(vsi, vsi_name, add_list, add_head,
2470 num_add, &promisc_changed);
2472 /* Now move all of the filters from the temp add list back to
2475 spin_lock_bh(&vsi->mac_filter_hash_lock);
2476 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2477 /* Only update the state if we're still NEW */
2478 if (new->f->state == I40E_FILTER_NEW)
2479 new->f->state = new->state;
2480 hlist_del(&new->hlist);
2483 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2488 /* Determine the number of active and failed filters. */
2489 spin_lock_bh(&vsi->mac_filter_hash_lock);
2490 vsi->active_filters = 0;
2491 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
2492 if (f->state == I40E_FILTER_ACTIVE)
2493 vsi->active_filters++;
2494 else if (f->state == I40E_FILTER_FAILED)
2497 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2499 /* If promiscuous mode has changed, we need to calculate a new
2500 * threshold for when we are safe to exit
2502 if (promisc_changed)
2503 vsi->promisc_threshold = (vsi->active_filters * 3) / 4;
2505 /* Check if we are able to exit overflow promiscuous mode. We can
2506 * safely exit if we didn't just enter, we no longer have any failed
2507 * filters, and we have reduced filters below the threshold value.
2509 if (test_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state) &&
2510 !promisc_changed && !failed_filters &&
2511 (vsi->active_filters < vsi->promisc_threshold)) {
2512 dev_info(&pf->pdev->dev,
2513 "filter logjam cleared on %s, leaving overflow promiscuous mode\n",
2515 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2516 promisc_changed = true;
2517 vsi->promisc_threshold = 0;
2520 /* if the VF is not trusted do not do promisc */
2521 if ((vsi->type == I40E_VSI_SRIOV) && !pf->vf[vsi->vf_id].trusted) {
2522 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2526 /* check for changes in promiscuous modes */
2527 if (changed_flags & IFF_ALLMULTI) {
2528 bool cur_multipromisc;
2530 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2531 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2536 retval = i40e_aq_rc_to_posix(aq_ret,
2537 hw->aq.asq_last_status);
2538 dev_info(&pf->pdev->dev,
2539 "set multi promisc failed on %s, err %s aq_err %s\n",
2541 i40e_stat_str(hw, aq_ret),
2542 i40e_aq_str(hw, hw->aq.asq_last_status));
2546 if ((changed_flags & IFF_PROMISC) || promisc_changed) {
2549 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2550 test_bit(__I40E_VSI_OVERFLOW_PROMISC,
2552 aq_ret = i40e_set_promiscuous(pf, cur_promisc);
2554 retval = i40e_aq_rc_to_posix(aq_ret,
2555 hw->aq.asq_last_status);
2556 dev_info(&pf->pdev->dev,
2557 "Setting promiscuous %s failed on %s, err %s aq_err %s\n",
2558 cur_promisc ? "on" : "off",
2560 i40e_stat_str(hw, aq_ret),
2561 i40e_aq_str(hw, hw->aq.asq_last_status));
2565 /* if something went wrong then set the changed flag so we try again */
2567 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2569 clear_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state);
2573 /* Restore elements on the temporary add and delete lists */
2574 spin_lock_bh(&vsi->mac_filter_hash_lock);
2575 err_no_memory_locked:
2576 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
2577 i40e_undo_add_filter_entries(vsi, &tmp_add_list);
2578 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2580 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2581 clear_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state);
2586 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2587 * @pf: board private structure
2589 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2593 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2595 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2597 for (v = 0; v < pf->num_alloc_vsi; v++) {
2599 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) {
2600 int ret = i40e_sync_vsi_filters(pf->vsi[v]);
2603 /* come back and try again later */
2604 pf->flags |= I40E_FLAG_FILTER_SYNC;
2612 * i40e_max_xdp_frame_size - returns the maximum allowed frame size for XDP
2615 static int i40e_max_xdp_frame_size(struct i40e_vsi *vsi)
2617 if (PAGE_SIZE >= 8192 || (vsi->back->flags & I40E_FLAG_LEGACY_RX))
2618 return I40E_RXBUFFER_2048;
2620 return I40E_RXBUFFER_3072;
2624 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2625 * @netdev: network interface device structure
2626 * @new_mtu: new value for maximum frame size
2628 * Returns 0 on success, negative on failure
2630 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2632 struct i40e_netdev_priv *np = netdev_priv(netdev);
2633 struct i40e_vsi *vsi = np->vsi;
2634 struct i40e_pf *pf = vsi->back;
2636 if (i40e_enabled_xdp_vsi(vsi)) {
2637 int frame_size = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2639 if (frame_size > i40e_max_xdp_frame_size(vsi))
2643 netdev_info(netdev, "changing MTU from %d to %d\n",
2644 netdev->mtu, new_mtu);
2645 netdev->mtu = new_mtu;
2646 if (netif_running(netdev))
2647 i40e_vsi_reinit_locked(vsi);
2648 pf->flags |= (I40E_FLAG_SERVICE_CLIENT_REQUESTED |
2649 I40E_FLAG_CLIENT_L2_CHANGE);
2654 * i40e_ioctl - Access the hwtstamp interface
2655 * @netdev: network interface device structure
2656 * @ifr: interface request data
2657 * @cmd: ioctl command
2659 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2661 struct i40e_netdev_priv *np = netdev_priv(netdev);
2662 struct i40e_pf *pf = np->vsi->back;
2666 return i40e_ptp_get_ts_config(pf, ifr);
2668 return i40e_ptp_set_ts_config(pf, ifr);
2675 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2676 * @vsi: the vsi being adjusted
2678 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2680 struct i40e_vsi_context ctxt;
2683 if ((vsi->info.valid_sections &
2684 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2685 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2686 return; /* already enabled */
2688 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2689 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2690 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2692 ctxt.seid = vsi->seid;
2693 ctxt.info = vsi->info;
2694 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2696 dev_info(&vsi->back->pdev->dev,
2697 "update vlan stripping failed, err %s aq_err %s\n",
2698 i40e_stat_str(&vsi->back->hw, ret),
2699 i40e_aq_str(&vsi->back->hw,
2700 vsi->back->hw.aq.asq_last_status));
2705 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2706 * @vsi: the vsi being adjusted
2708 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2710 struct i40e_vsi_context ctxt;
2713 if ((vsi->info.valid_sections &
2714 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2715 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2716 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2717 return; /* already disabled */
2719 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2720 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2721 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2723 ctxt.seid = vsi->seid;
2724 ctxt.info = vsi->info;
2725 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2727 dev_info(&vsi->back->pdev->dev,
2728 "update vlan stripping failed, err %s aq_err %s\n",
2729 i40e_stat_str(&vsi->back->hw, ret),
2730 i40e_aq_str(&vsi->back->hw,
2731 vsi->back->hw.aq.asq_last_status));
2736 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2737 * @netdev: network interface to be adjusted
2738 * @features: netdev features to test if VLAN offload is enabled or not
2740 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2742 struct i40e_netdev_priv *np = netdev_priv(netdev);
2743 struct i40e_vsi *vsi = np->vsi;
2745 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2746 i40e_vlan_stripping_enable(vsi);
2748 i40e_vlan_stripping_disable(vsi);
2752 * i40e_add_vlan_all_mac - Add a MAC/VLAN filter for each existing MAC address
2753 * @vsi: the vsi being configured
2754 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2756 * This is a helper function for adding a new MAC/VLAN filter with the
2757 * specified VLAN for each existing MAC address already in the hash table.
2758 * This function does *not* perform any accounting to update filters based on
2761 * NOTE: this function expects to be called while under the
2762 * mac_filter_hash_lock
2764 int i40e_add_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
2766 struct i40e_mac_filter *f, *add_f;
2767 struct hlist_node *h;
2770 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2771 if (f->state == I40E_FILTER_REMOVE)
2773 add_f = i40e_add_filter(vsi, f->macaddr, vid);
2775 dev_info(&vsi->back->pdev->dev,
2776 "Could not add vlan filter %d for %pM\n",
2786 * i40e_vsi_add_vlan - Add VSI membership for given VLAN
2787 * @vsi: the VSI being configured
2788 * @vid: VLAN id to be added
2790 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, u16 vid)
2797 /* The network stack will attempt to add VID=0, with the intention to
2798 * receive priority tagged packets with a VLAN of 0. Our HW receives
2799 * these packets by default when configured to receive untagged
2800 * packets, so we don't need to add a filter for this case.
2801 * Additionally, HW interprets adding a VID=0 filter as meaning to
2802 * receive *only* tagged traffic and stops receiving untagged traffic.
2803 * Thus, we do not want to actually add a filter for VID=0
2808 /* Locked once because all functions invoked below iterates list*/
2809 spin_lock_bh(&vsi->mac_filter_hash_lock);
2810 err = i40e_add_vlan_all_mac(vsi, vid);
2811 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2815 /* schedule our worker thread which will take care of
2816 * applying the new filter changes
2818 i40e_service_event_schedule(vsi->back);
2823 * i40e_rm_vlan_all_mac - Remove MAC/VLAN pair for all MAC with the given VLAN
2824 * @vsi: the vsi being configured
2825 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2827 * This function should be used to remove all VLAN filters which match the
2828 * given VID. It does not schedule the service event and does not take the
2829 * mac_filter_hash_lock so it may be combined with other operations under
2830 * a single invocation of the mac_filter_hash_lock.
2832 * NOTE: this function expects to be called while under the
2833 * mac_filter_hash_lock
2835 void i40e_rm_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
2837 struct i40e_mac_filter *f;
2838 struct hlist_node *h;
2841 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2843 __i40e_del_filter(vsi, f);
2848 * i40e_vsi_kill_vlan - Remove VSI membership for given VLAN
2849 * @vsi: the VSI being configured
2850 * @vid: VLAN id to be removed
2852 void i40e_vsi_kill_vlan(struct i40e_vsi *vsi, u16 vid)
2854 if (!vid || vsi->info.pvid)
2857 spin_lock_bh(&vsi->mac_filter_hash_lock);
2858 i40e_rm_vlan_all_mac(vsi, vid);
2859 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2861 /* schedule our worker thread which will take care of
2862 * applying the new filter changes
2864 i40e_service_event_schedule(vsi->back);
2868 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2869 * @netdev: network interface to be adjusted
2870 * @vid: vlan id to be added
2872 * net_device_ops implementation for adding vlan ids
2874 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2875 __always_unused __be16 proto, u16 vid)
2877 struct i40e_netdev_priv *np = netdev_priv(netdev);
2878 struct i40e_vsi *vsi = np->vsi;
2881 if (vid >= VLAN_N_VID)
2884 ret = i40e_vsi_add_vlan(vsi, vid);
2886 set_bit(vid, vsi->active_vlans);
2892 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2893 * @netdev: network interface to be adjusted
2894 * @vid: vlan id to be removed
2896 * net_device_ops implementation for removing vlan ids
2898 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2899 __always_unused __be16 proto, u16 vid)
2901 struct i40e_netdev_priv *np = netdev_priv(netdev);
2902 struct i40e_vsi *vsi = np->vsi;
2904 /* return code is ignored as there is nothing a user
2905 * can do about failure to remove and a log message was
2906 * already printed from the other function
2908 i40e_vsi_kill_vlan(vsi, vid);
2910 clear_bit(vid, vsi->active_vlans);
2916 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2917 * @vsi: the vsi being brought back up
2919 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2926 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2928 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2929 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2934 * i40e_vsi_add_pvid - Add pvid for the VSI
2935 * @vsi: the vsi being adjusted
2936 * @vid: the vlan id to set as a PVID
2938 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2940 struct i40e_vsi_context ctxt;
2943 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2944 vsi->info.pvid = cpu_to_le16(vid);
2945 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2946 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2947 I40E_AQ_VSI_PVLAN_EMOD_STR;
2949 ctxt.seid = vsi->seid;
2950 ctxt.info = vsi->info;
2951 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2953 dev_info(&vsi->back->pdev->dev,
2954 "add pvid failed, err %s aq_err %s\n",
2955 i40e_stat_str(&vsi->back->hw, ret),
2956 i40e_aq_str(&vsi->back->hw,
2957 vsi->back->hw.aq.asq_last_status));
2965 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2966 * @vsi: the vsi being adjusted
2968 * Just use the vlan_rx_register() service to put it back to normal
2970 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2972 i40e_vlan_stripping_disable(vsi);
2978 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2979 * @vsi: ptr to the VSI
2981 * If this function returns with an error, then it's possible one or
2982 * more of the rings is populated (while the rest are not). It is the
2983 * callers duty to clean those orphaned rings.
2985 * Return 0 on success, negative on failure
2987 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2991 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2992 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2994 if (!i40e_enabled_xdp_vsi(vsi))
2997 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2998 err = i40e_setup_tx_descriptors(vsi->xdp_rings[i]);
3004 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
3005 * @vsi: ptr to the VSI
3007 * Free VSI's transmit software resources
3009 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
3013 if (vsi->tx_rings) {
3014 for (i = 0; i < vsi->num_queue_pairs; i++)
3015 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
3016 i40e_free_tx_resources(vsi->tx_rings[i]);
3019 if (vsi->xdp_rings) {
3020 for (i = 0; i < vsi->num_queue_pairs; i++)
3021 if (vsi->xdp_rings[i] && vsi->xdp_rings[i]->desc)
3022 i40e_free_tx_resources(vsi->xdp_rings[i]);
3027 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
3028 * @vsi: ptr to the VSI
3030 * If this function returns with an error, then it's possible one or
3031 * more of the rings is populated (while the rest are not). It is the
3032 * callers duty to clean those orphaned rings.
3034 * Return 0 on success, negative on failure
3036 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
3040 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3041 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
3046 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
3047 * @vsi: ptr to the VSI
3049 * Free all receive software resources
3051 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
3058 for (i = 0; i < vsi->num_queue_pairs; i++)
3059 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
3060 i40e_free_rx_resources(vsi->rx_rings[i]);
3064 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
3065 * @ring: The Tx ring to configure
3067 * This enables/disables XPS for a given Tx descriptor ring
3068 * based on the TCs enabled for the VSI that ring belongs to.
3070 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
3074 if (!ring->q_vector || !ring->netdev || ring->ch)
3077 /* We only initialize XPS once, so as not to overwrite user settings */
3078 if (test_and_set_bit(__I40E_TX_XPS_INIT_DONE, ring->state))
3081 cpu = cpumask_local_spread(ring->q_vector->v_idx, -1);
3082 netif_set_xps_queue(ring->netdev, get_cpu_mask(cpu),
3087 * i40e_configure_tx_ring - Configure a transmit ring context and rest
3088 * @ring: The Tx ring to configure
3090 * Configure the Tx descriptor ring in the HMC context.
3092 static int i40e_configure_tx_ring(struct i40e_ring *ring)
3094 struct i40e_vsi *vsi = ring->vsi;
3095 u16 pf_q = vsi->base_queue + ring->queue_index;
3096 struct i40e_hw *hw = &vsi->back->hw;
3097 struct i40e_hmc_obj_txq tx_ctx;
3098 i40e_status err = 0;
3101 /* some ATR related tx ring init */
3102 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
3103 ring->atr_sample_rate = vsi->back->atr_sample_rate;
3104 ring->atr_count = 0;
3106 ring->atr_sample_rate = 0;
3110 i40e_config_xps_tx_ring(ring);
3112 /* clear the context structure first */
3113 memset(&tx_ctx, 0, sizeof(tx_ctx));
3115 tx_ctx.new_context = 1;
3116 tx_ctx.base = (ring->dma / 128);
3117 tx_ctx.qlen = ring->count;
3118 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
3119 I40E_FLAG_FD_ATR_ENABLED));
3120 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
3121 /* FDIR VSI tx ring can still use RS bit and writebacks */
3122 if (vsi->type != I40E_VSI_FDIR)
3123 tx_ctx.head_wb_ena = 1;
3124 tx_ctx.head_wb_addr = ring->dma +
3125 (ring->count * sizeof(struct i40e_tx_desc));
3127 /* As part of VSI creation/update, FW allocates certain
3128 * Tx arbitration queue sets for each TC enabled for
3129 * the VSI. The FW returns the handles to these queue
3130 * sets as part of the response buffer to Add VSI,
3131 * Update VSI, etc. AQ commands. It is expected that
3132 * these queue set handles be associated with the Tx
3133 * queues by the driver as part of the TX queue context
3134 * initialization. This has to be done regardless of
3135 * DCB as by default everything is mapped to TC0.
3140 le16_to_cpu(ring->ch->info.qs_handle[ring->dcb_tc]);
3143 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
3145 tx_ctx.rdylist_act = 0;
3147 /* clear the context in the HMC */
3148 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
3150 dev_info(&vsi->back->pdev->dev,
3151 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
3152 ring->queue_index, pf_q, err);
3156 /* set the context in the HMC */
3157 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
3159 dev_info(&vsi->back->pdev->dev,
3160 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
3161 ring->queue_index, pf_q, err);
3165 /* Now associate this queue with this PCI function */
3167 if (ring->ch->type == I40E_VSI_VMDQ2)
3168 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
3172 qtx_ctl |= (ring->ch->vsi_number <<
3173 I40E_QTX_CTL_VFVM_INDX_SHIFT) &
3174 I40E_QTX_CTL_VFVM_INDX_MASK;
3176 if (vsi->type == I40E_VSI_VMDQ2) {
3177 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
3178 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
3179 I40E_QTX_CTL_VFVM_INDX_MASK;
3181 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
3185 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
3186 I40E_QTX_CTL_PF_INDX_MASK);
3187 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
3190 /* cache tail off for easier writes later */
3191 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
3197 * i40e_configure_rx_ring - Configure a receive ring context
3198 * @ring: The Rx ring to configure
3200 * Configure the Rx descriptor ring in the HMC context.
3202 static int i40e_configure_rx_ring(struct i40e_ring *ring)
3204 struct i40e_vsi *vsi = ring->vsi;
3205 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
3206 u16 pf_q = vsi->base_queue + ring->queue_index;
3207 struct i40e_hw *hw = &vsi->back->hw;
3208 struct i40e_hmc_obj_rxq rx_ctx;
3209 i40e_status err = 0;
3211 bitmap_zero(ring->state, __I40E_RING_STATE_NBITS);
3213 /* clear the context structure first */
3214 memset(&rx_ctx, 0, sizeof(rx_ctx));
3216 ring->rx_buf_len = vsi->rx_buf_len;
3218 rx_ctx.dbuff = DIV_ROUND_UP(ring->rx_buf_len,
3219 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
3221 rx_ctx.base = (ring->dma / 128);
3222 rx_ctx.qlen = ring->count;
3224 /* use 32 byte descriptors */
3227 /* descriptor type is always zero
3230 rx_ctx.hsplit_0 = 0;
3232 rx_ctx.rxmax = min_t(u16, vsi->max_frame, chain_len * ring->rx_buf_len);
3233 if (hw->revision_id == 0)
3234 rx_ctx.lrxqthresh = 0;
3236 rx_ctx.lrxqthresh = 1;
3237 rx_ctx.crcstrip = 1;
3239 /* this controls whether VLAN is stripped from inner headers */
3241 /* set the prefena field to 1 because the manual says to */
3244 /* clear the context in the HMC */
3245 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
3247 dev_info(&vsi->back->pdev->dev,
3248 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3249 ring->queue_index, pf_q, err);
3253 /* set the context in the HMC */
3254 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
3256 dev_info(&vsi->back->pdev->dev,
3257 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3258 ring->queue_index, pf_q, err);
3262 /* configure Rx buffer alignment */
3263 if (!vsi->netdev || (vsi->back->flags & I40E_FLAG_LEGACY_RX))
3264 clear_ring_build_skb_enabled(ring);
3266 set_ring_build_skb_enabled(ring);
3268 /* cache tail for quicker writes, and clear the reg before use */
3269 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
3270 writel(0, ring->tail);
3272 i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
3278 * i40e_vsi_configure_tx - Configure the VSI for Tx
3279 * @vsi: VSI structure describing this set of rings and resources
3281 * Configure the Tx VSI for operation.
3283 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
3288 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
3289 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
3291 if (!i40e_enabled_xdp_vsi(vsi))
3294 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
3295 err = i40e_configure_tx_ring(vsi->xdp_rings[i]);
3301 * i40e_vsi_configure_rx - Configure the VSI for Rx
3302 * @vsi: the VSI being configured
3304 * Configure the Rx VSI for operation.
3306 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
3311 if (!vsi->netdev || (vsi->back->flags & I40E_FLAG_LEGACY_RX)) {
3312 vsi->max_frame = I40E_MAX_RXBUFFER;
3313 vsi->rx_buf_len = I40E_RXBUFFER_2048;
3314 #if (PAGE_SIZE < 8192)
3315 } else if (!I40E_2K_TOO_SMALL_WITH_PADDING &&
3316 (vsi->netdev->mtu <= ETH_DATA_LEN)) {
3317 vsi->max_frame = I40E_RXBUFFER_1536 - NET_IP_ALIGN;
3318 vsi->rx_buf_len = I40E_RXBUFFER_1536 - NET_IP_ALIGN;
3321 vsi->max_frame = I40E_MAX_RXBUFFER;
3322 vsi->rx_buf_len = (PAGE_SIZE < 8192) ? I40E_RXBUFFER_3072 :
3326 /* set up individual rings */
3327 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3328 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
3334 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
3335 * @vsi: ptr to the VSI
3337 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
3339 struct i40e_ring *tx_ring, *rx_ring;
3340 u16 qoffset, qcount;
3343 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
3344 /* Reset the TC information */
3345 for (i = 0; i < vsi->num_queue_pairs; i++) {
3346 rx_ring = vsi->rx_rings[i];
3347 tx_ring = vsi->tx_rings[i];
3348 rx_ring->dcb_tc = 0;
3349 tx_ring->dcb_tc = 0;
3354 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3355 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3358 qoffset = vsi->tc_config.tc_info[n].qoffset;
3359 qcount = vsi->tc_config.tc_info[n].qcount;
3360 for (i = qoffset; i < (qoffset + qcount); i++) {
3361 rx_ring = vsi->rx_rings[i];
3362 tx_ring = vsi->tx_rings[i];
3363 rx_ring->dcb_tc = n;
3364 tx_ring->dcb_tc = n;
3370 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3371 * @vsi: ptr to the VSI
3373 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3376 i40e_set_rx_mode(vsi->netdev);
3380 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3381 * @vsi: Pointer to the targeted VSI
3383 * This function replays the hlist on the hw where all the SB Flow Director
3384 * filters were saved.
3386 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3388 struct i40e_fdir_filter *filter;
3389 struct i40e_pf *pf = vsi->back;
3390 struct hlist_node *node;
3392 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3395 /* Reset FDir counters as we're replaying all existing filters */
3396 pf->fd_tcp4_filter_cnt = 0;
3397 pf->fd_udp4_filter_cnt = 0;
3398 pf->fd_sctp4_filter_cnt = 0;
3399 pf->fd_ip4_filter_cnt = 0;
3401 hlist_for_each_entry_safe(filter, node,
3402 &pf->fdir_filter_list, fdir_node) {
3403 i40e_add_del_fdir(vsi, filter, true);
3408 * i40e_vsi_configure - Set up the VSI for action
3409 * @vsi: the VSI being configured
3411 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3415 i40e_set_vsi_rx_mode(vsi);
3416 i40e_restore_vlan(vsi);
3417 i40e_vsi_config_dcb_rings(vsi);
3418 err = i40e_vsi_configure_tx(vsi);
3420 err = i40e_vsi_configure_rx(vsi);
3426 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3427 * @vsi: the VSI being configured
3429 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3431 bool has_xdp = i40e_enabled_xdp_vsi(vsi);
3432 struct i40e_pf *pf = vsi->back;
3433 struct i40e_hw *hw = &pf->hw;
3438 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3439 * and PFINT_LNKLSTn registers, e.g.:
3440 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
3442 qp = vsi->base_queue;
3443 vector = vsi->base_vector;
3444 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3445 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3447 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3448 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[i]->rx_itr_setting);
3449 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3450 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3452 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[i]->tx_itr_setting);
3453 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3454 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3456 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3457 i40e_intrl_usec_to_reg(vsi->int_rate_limit));
3459 /* Linked list for the queuepairs assigned to this vector */
3460 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3461 for (q = 0; q < q_vector->num_ringpairs; q++) {
3462 u32 nextqp = has_xdp ? qp + vsi->alloc_queue_pairs : qp;
3465 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3466 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3467 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3468 (nextqp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
3469 (I40E_QUEUE_TYPE_TX <<
3470 I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3472 wr32(hw, I40E_QINT_RQCTL(qp), val);
3475 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3476 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3477 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3478 (qp << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT) |
3479 (I40E_QUEUE_TYPE_TX <<
3480 I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3482 wr32(hw, I40E_QINT_TQCTL(nextqp), val);
3485 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3486 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3487 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3488 ((qp + 1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT) |
3489 (I40E_QUEUE_TYPE_RX <<
3490 I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3492 /* Terminate the linked list */
3493 if (q == (q_vector->num_ringpairs - 1))
3494 val |= (I40E_QUEUE_END_OF_LIST <<
3495 I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3497 wr32(hw, I40E_QINT_TQCTL(qp), val);
3506 * i40e_enable_misc_int_causes - enable the non-queue interrupts
3507 * @hw: ptr to the hardware info
3509 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3511 struct i40e_hw *hw = &pf->hw;
3514 /* clear things first */
3515 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
3516 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
3518 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
3519 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
3520 I40E_PFINT_ICR0_ENA_GRST_MASK |
3521 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3522 I40E_PFINT_ICR0_ENA_GPIO_MASK |
3523 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
3524 I40E_PFINT_ICR0_ENA_VFLR_MASK |
3525 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3527 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
3528 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3530 if (pf->flags & I40E_FLAG_PTP)
3531 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3533 wr32(hw, I40E_PFINT_ICR0_ENA, val);
3535 /* SW_ITR_IDX = 0, but don't change INTENA */
3536 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3537 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3539 /* OTHER_ITR_IDX = 0 */
3540 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3544 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3545 * @vsi: the VSI being configured
3547 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3549 u32 nextqp = i40e_enabled_xdp_vsi(vsi) ? vsi->alloc_queue_pairs : 0;
3550 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3551 struct i40e_pf *pf = vsi->back;
3552 struct i40e_hw *hw = &pf->hw;
3555 /* set the ITR configuration */
3556 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3557 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[0]->rx_itr_setting);
3558 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3559 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3560 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[0]->tx_itr_setting);
3561 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3562 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3564 i40e_enable_misc_int_causes(pf);
3566 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3567 wr32(hw, I40E_PFINT_LNKLST0, 0);
3569 /* Associate the queue pair to the vector and enable the queue int */
3570 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3571 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3572 (nextqp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
3573 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3575 wr32(hw, I40E_QINT_RQCTL(0), val);
3577 if (i40e_enabled_xdp_vsi(vsi)) {
3578 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3579 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT)|
3581 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3583 wr32(hw, I40E_QINT_TQCTL(nextqp), val);
3586 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3587 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3588 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3590 wr32(hw, I40E_QINT_TQCTL(0), val);
3595 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3596 * @pf: board private structure
3598 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3600 struct i40e_hw *hw = &pf->hw;
3602 wr32(hw, I40E_PFINT_DYN_CTL0,
3603 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3608 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3609 * @pf: board private structure
3611 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
3613 struct i40e_hw *hw = &pf->hw;
3616 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3617 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
3618 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3620 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3625 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3626 * @irq: interrupt number
3627 * @data: pointer to a q_vector
3629 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3631 struct i40e_q_vector *q_vector = data;
3633 if (!q_vector->tx.ring && !q_vector->rx.ring)
3636 napi_schedule_irqoff(&q_vector->napi);
3642 * i40e_irq_affinity_notify - Callback for affinity changes
3643 * @notify: context as to what irq was changed
3644 * @mask: the new affinity mask
3646 * This is a callback function used by the irq_set_affinity_notifier function
3647 * so that we may register to receive changes to the irq affinity masks.
3649 static void i40e_irq_affinity_notify(struct irq_affinity_notify *notify,
3650 const cpumask_t *mask)
3652 struct i40e_q_vector *q_vector =
3653 container_of(notify, struct i40e_q_vector, affinity_notify);
3655 cpumask_copy(&q_vector->affinity_mask, mask);
3659 * i40e_irq_affinity_release - Callback for affinity notifier release
3660 * @ref: internal core kernel usage
3662 * This is a callback function used by the irq_set_affinity_notifier function
3663 * to inform the current notification subscriber that they will no longer
3664 * receive notifications.
3666 static void i40e_irq_affinity_release(struct kref *ref) {}
3669 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3670 * @vsi: the VSI being configured
3671 * @basename: name for the vector
3673 * Allocates MSI-X vectors and requests interrupts from the kernel.
3675 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3677 int q_vectors = vsi->num_q_vectors;
3678 struct i40e_pf *pf = vsi->back;
3679 int base = vsi->base_vector;
3686 for (vector = 0; vector < q_vectors; vector++) {
3687 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3689 irq_num = pf->msix_entries[base + vector].vector;
3691 if (q_vector->tx.ring && q_vector->rx.ring) {
3692 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3693 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3695 } else if (q_vector->rx.ring) {
3696 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3697 "%s-%s-%d", basename, "rx", rx_int_idx++);
3698 } else if (q_vector->tx.ring) {
3699 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3700 "%s-%s-%d", basename, "tx", tx_int_idx++);
3702 /* skip this unused q_vector */
3705 err = request_irq(irq_num,
3711 dev_info(&pf->pdev->dev,
3712 "MSIX request_irq failed, error: %d\n", err);
3713 goto free_queue_irqs;
3716 /* register for affinity change notifications */
3717 q_vector->affinity_notify.notify = i40e_irq_affinity_notify;
3718 q_vector->affinity_notify.release = i40e_irq_affinity_release;
3719 irq_set_affinity_notifier(irq_num, &q_vector->affinity_notify);
3720 /* Spread affinity hints out across online CPUs.
3722 * get_cpu_mask returns a static constant mask with
3723 * a permanent lifetime so it's ok to pass to
3724 * irq_set_affinity_hint without making a copy.
3726 cpu = cpumask_local_spread(q_vector->v_idx, -1);
3727 irq_set_affinity_hint(irq_num, get_cpu_mask(cpu));
3730 vsi->irqs_ready = true;
3736 irq_num = pf->msix_entries[base + vector].vector;
3737 irq_set_affinity_notifier(irq_num, NULL);
3738 irq_set_affinity_hint(irq_num, NULL);
3739 free_irq(irq_num, &vsi->q_vectors[vector]);
3745 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3746 * @vsi: the VSI being un-configured
3748 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3750 struct i40e_pf *pf = vsi->back;
3751 struct i40e_hw *hw = &pf->hw;
3752 int base = vsi->base_vector;
3755 /* disable interrupt causation from each queue */
3756 for (i = 0; i < vsi->num_queue_pairs; i++) {
3759 val = rd32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx));
3760 val &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3761 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), val);
3763 val = rd32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx));
3764 val &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3765 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), val);
3767 if (!i40e_enabled_xdp_vsi(vsi))
3769 wr32(hw, I40E_QINT_TQCTL(vsi->xdp_rings[i]->reg_idx), 0);
3772 /* disable each interrupt */
3773 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3774 for (i = vsi->base_vector;
3775 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3776 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3779 for (i = 0; i < vsi->num_q_vectors; i++)
3780 synchronize_irq(pf->msix_entries[i + base].vector);
3782 /* Legacy and MSI mode - this stops all interrupt handling */
3783 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3784 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3786 synchronize_irq(pf->pdev->irq);
3791 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3792 * @vsi: the VSI being configured
3794 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3796 struct i40e_pf *pf = vsi->back;
3799 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3800 for (i = 0; i < vsi->num_q_vectors; i++)
3801 i40e_irq_dynamic_enable(vsi, i);
3803 i40e_irq_dynamic_enable_icr0(pf);
3806 i40e_flush(&pf->hw);
3811 * i40e_free_misc_vector - Free the vector that handles non-queue events
3812 * @pf: board private structure
3814 static void i40e_free_misc_vector(struct i40e_pf *pf)
3817 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3818 i40e_flush(&pf->hw);
3820 if (pf->flags & I40E_FLAG_MSIX_ENABLED && pf->msix_entries) {
3821 synchronize_irq(pf->msix_entries[0].vector);
3822 free_irq(pf->msix_entries[0].vector, pf);
3823 clear_bit(__I40E_MISC_IRQ_REQUESTED, pf->state);
3828 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3829 * @irq: interrupt number
3830 * @data: pointer to a q_vector
3832 * This is the handler used for all MSI/Legacy interrupts, and deals
3833 * with both queue and non-queue interrupts. This is also used in
3834 * MSIX mode to handle the non-queue interrupts.
3836 static irqreturn_t i40e_intr(int irq, void *data)
3838 struct i40e_pf *pf = (struct i40e_pf *)data;
3839 struct i40e_hw *hw = &pf->hw;
3840 irqreturn_t ret = IRQ_NONE;
3841 u32 icr0, icr0_remaining;
3844 icr0 = rd32(hw, I40E_PFINT_ICR0);
3845 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3847 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3848 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3851 /* if interrupt but no bits showing, must be SWINT */
3852 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3853 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3856 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3857 (icr0 & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3858 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3859 dev_dbg(&pf->pdev->dev, "cleared PE_CRITERR\n");
3860 set_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
3863 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3864 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3865 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
3866 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3868 /* We do not have a way to disarm Queue causes while leaving
3869 * interrupt enabled for all other causes, ideally
3870 * interrupt should be disabled while we are in NAPI but
3871 * this is not a performance path and napi_schedule()
3872 * can deal with rescheduling.
3874 if (!test_bit(__I40E_DOWN, pf->state))
3875 napi_schedule_irqoff(&q_vector->napi);
3878 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3879 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3880 set_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state);
3881 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "AdminQ event\n");
3884 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3885 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3886 set_bit(__I40E_MDD_EVENT_PENDING, pf->state);
3889 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3890 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3891 set_bit(__I40E_VFLR_EVENT_PENDING, pf->state);
3894 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3895 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
3896 set_bit(__I40E_RESET_INTR_RECEIVED, pf->state);
3897 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3898 val = rd32(hw, I40E_GLGEN_RSTAT);
3899 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3900 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3901 if (val == I40E_RESET_CORER) {
3903 } else if (val == I40E_RESET_GLOBR) {
3905 } else if (val == I40E_RESET_EMPR) {
3907 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state);
3911 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3912 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3913 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3914 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3915 rd32(hw, I40E_PFHMC_ERRORINFO),
3916 rd32(hw, I40E_PFHMC_ERRORDATA));
3919 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3920 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3922 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3923 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3924 i40e_ptp_tx_hwtstamp(pf);
3928 /* If a critical error is pending we have no choice but to reset the
3930 * Report and mask out any remaining unexpected interrupts.
3932 icr0_remaining = icr0 & ena_mask;
3933 if (icr0_remaining) {
3934 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3936 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3937 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3938 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3939 dev_info(&pf->pdev->dev, "device will be reset\n");
3940 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
3941 i40e_service_event_schedule(pf);
3943 ena_mask &= ~icr0_remaining;
3948 /* re-enable interrupt causes */
3949 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3950 if (!test_bit(__I40E_DOWN, pf->state)) {
3951 i40e_service_event_schedule(pf);
3952 i40e_irq_dynamic_enable_icr0(pf);
3959 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3960 * @tx_ring: tx ring to clean
3961 * @budget: how many cleans we're allowed
3963 * Returns true if there's any budget left (e.g. the clean is finished)
3965 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3967 struct i40e_vsi *vsi = tx_ring->vsi;
3968 u16 i = tx_ring->next_to_clean;
3969 struct i40e_tx_buffer *tx_buf;
3970 struct i40e_tx_desc *tx_desc;
3972 tx_buf = &tx_ring->tx_bi[i];
3973 tx_desc = I40E_TX_DESC(tx_ring, i);
3974 i -= tx_ring->count;
3977 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3979 /* if next_to_watch is not set then there is no work pending */
3983 /* prevent any other reads prior to eop_desc */
3986 /* if the descriptor isn't done, no work yet to do */
3987 if (!(eop_desc->cmd_type_offset_bsz &
3988 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3991 /* clear next_to_watch to prevent false hangs */
3992 tx_buf->next_to_watch = NULL;
3994 tx_desc->buffer_addr = 0;
3995 tx_desc->cmd_type_offset_bsz = 0;
3996 /* move past filter desc */
4001 i -= tx_ring->count;
4002 tx_buf = tx_ring->tx_bi;
4003 tx_desc = I40E_TX_DESC(tx_ring, 0);
4005 /* unmap skb header data */
4006 dma_unmap_single(tx_ring->dev,
4007 dma_unmap_addr(tx_buf, dma),
4008 dma_unmap_len(tx_buf, len),
4010 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
4011 kfree(tx_buf->raw_buf);
4013 tx_buf->raw_buf = NULL;
4014 tx_buf->tx_flags = 0;
4015 tx_buf->next_to_watch = NULL;
4016 dma_unmap_len_set(tx_buf, len, 0);
4017 tx_desc->buffer_addr = 0;
4018 tx_desc->cmd_type_offset_bsz = 0;
4020 /* move us past the eop_desc for start of next FD desc */
4025 i -= tx_ring->count;
4026 tx_buf = tx_ring->tx_bi;
4027 tx_desc = I40E_TX_DESC(tx_ring, 0);
4030 /* update budget accounting */
4032 } while (likely(budget));
4034 i += tx_ring->count;
4035 tx_ring->next_to_clean = i;
4037 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
4038 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
4044 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
4045 * @irq: interrupt number
4046 * @data: pointer to a q_vector
4048 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
4050 struct i40e_q_vector *q_vector = data;
4051 struct i40e_vsi *vsi;
4053 if (!q_vector->tx.ring)
4056 vsi = q_vector->tx.ring->vsi;
4057 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
4063 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
4064 * @vsi: the VSI being configured
4065 * @v_idx: vector index
4066 * @qp_idx: queue pair index
4068 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
4070 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4071 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
4072 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
4074 tx_ring->q_vector = q_vector;
4075 tx_ring->next = q_vector->tx.ring;
4076 q_vector->tx.ring = tx_ring;
4077 q_vector->tx.count++;
4079 /* Place XDP Tx ring in the same q_vector ring list as regular Tx */
4080 if (i40e_enabled_xdp_vsi(vsi)) {
4081 struct i40e_ring *xdp_ring = vsi->xdp_rings[qp_idx];
4083 xdp_ring->q_vector = q_vector;
4084 xdp_ring->next = q_vector->tx.ring;
4085 q_vector->tx.ring = xdp_ring;
4086 q_vector->tx.count++;
4089 rx_ring->q_vector = q_vector;
4090 rx_ring->next = q_vector->rx.ring;
4091 q_vector->rx.ring = rx_ring;
4092 q_vector->rx.count++;
4096 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
4097 * @vsi: the VSI being configured
4099 * This function maps descriptor rings to the queue-specific vectors
4100 * we were allotted through the MSI-X enabling code. Ideally, we'd have
4101 * one vector per queue pair, but on a constrained vector budget, we
4102 * group the queue pairs as "efficiently" as possible.
4104 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
4106 int qp_remaining = vsi->num_queue_pairs;
4107 int q_vectors = vsi->num_q_vectors;
4112 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
4113 * group them so there are multiple queues per vector.
4114 * It is also important to go through all the vectors available to be
4115 * sure that if we don't use all the vectors, that the remaining vectors
4116 * are cleared. This is especially important when decreasing the
4117 * number of queues in use.
4119 for (; v_start < q_vectors; v_start++) {
4120 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
4122 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
4124 q_vector->num_ringpairs = num_ringpairs;
4126 q_vector->rx.count = 0;
4127 q_vector->tx.count = 0;
4128 q_vector->rx.ring = NULL;
4129 q_vector->tx.ring = NULL;
4131 while (num_ringpairs--) {
4132 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
4140 * i40e_vsi_request_irq - Request IRQ from the OS
4141 * @vsi: the VSI being configured
4142 * @basename: name for the vector
4144 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
4146 struct i40e_pf *pf = vsi->back;
4149 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4150 err = i40e_vsi_request_irq_msix(vsi, basename);
4151 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
4152 err = request_irq(pf->pdev->irq, i40e_intr, 0,
4155 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
4159 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
4164 #ifdef CONFIG_NET_POLL_CONTROLLER
4166 * i40e_netpoll - A Polling 'interrupt' handler
4167 * @netdev: network interface device structure
4169 * This is used by netconsole to send skbs without having to re-enable
4170 * interrupts. It's not called while the normal interrupt routine is executing.
4172 static void i40e_netpoll(struct net_device *netdev)
4174 struct i40e_netdev_priv *np = netdev_priv(netdev);
4175 struct i40e_vsi *vsi = np->vsi;
4176 struct i40e_pf *pf = vsi->back;
4179 /* if interface is down do nothing */
4180 if (test_bit(__I40E_VSI_DOWN, vsi->state))
4183 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4184 for (i = 0; i < vsi->num_q_vectors; i++)
4185 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
4187 i40e_intr(pf->pdev->irq, netdev);
4192 #define I40E_QTX_ENA_WAIT_COUNT 50
4195 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
4196 * @pf: the PF being configured
4197 * @pf_q: the PF queue
4198 * @enable: enable or disable state of the queue
4200 * This routine will wait for the given Tx queue of the PF to reach the
4201 * enabled or disabled state.
4202 * Returns -ETIMEDOUT in case of failing to reach the requested state after
4203 * multiple retries; else will return 0 in case of success.
4205 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4210 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4211 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
4212 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4215 usleep_range(10, 20);
4217 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4224 * i40e_control_tx_q - Start or stop a particular Tx queue
4225 * @pf: the PF structure
4226 * @pf_q: the PF queue to configure
4227 * @enable: start or stop the queue
4229 * This function enables or disables a single queue. Note that any delay
4230 * required after the operation is expected to be handled by the caller of
4233 static void i40e_control_tx_q(struct i40e_pf *pf, int pf_q, bool enable)
4235 struct i40e_hw *hw = &pf->hw;
4239 /* warn the TX unit of coming changes */
4240 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
4242 usleep_range(10, 20);
4244 for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) {
4245 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
4246 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
4247 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
4249 usleep_range(1000, 2000);
4252 /* Skip if the queue is already in the requested state */
4253 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4256 /* turn on/off the queue */
4258 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
4259 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
4261 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
4264 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
4268 * i40e_control_wait_tx_q - Start/stop Tx queue and wait for completion
4270 * @pf: the PF structure
4271 * @pf_q: the PF queue to configure
4272 * @is_xdp: true if the queue is used for XDP
4273 * @enable: start or stop the queue
4275 static int i40e_control_wait_tx_q(int seid, struct i40e_pf *pf, int pf_q,
4276 bool is_xdp, bool enable)
4280 i40e_control_tx_q(pf, pf_q, enable);
4282 /* wait for the change to finish */
4283 ret = i40e_pf_txq_wait(pf, pf_q, enable);
4285 dev_info(&pf->pdev->dev,
4286 "VSI seid %d %sTx ring %d %sable timeout\n",
4287 seid, (is_xdp ? "XDP " : ""), pf_q,
4288 (enable ? "en" : "dis"));
4295 * i40e_vsi_control_tx - Start or stop a VSI's rings
4296 * @vsi: the VSI being configured
4297 * @enable: start or stop the rings
4299 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
4301 struct i40e_pf *pf = vsi->back;
4302 int i, pf_q, ret = 0;
4304 pf_q = vsi->base_queue;
4305 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4306 ret = i40e_control_wait_tx_q(vsi->seid, pf,
4308 false /*is xdp*/, enable);
4312 if (!i40e_enabled_xdp_vsi(vsi))
4315 ret = i40e_control_wait_tx_q(vsi->seid, pf,
4316 pf_q + vsi->alloc_queue_pairs,
4317 true /*is xdp*/, enable);
4326 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
4327 * @pf: the PF being configured
4328 * @pf_q: the PF queue
4329 * @enable: enable or disable state of the queue
4331 * This routine will wait for the given Rx queue of the PF to reach the
4332 * enabled or disabled state.
4333 * Returns -ETIMEDOUT in case of failing to reach the requested state after
4334 * multiple retries; else will return 0 in case of success.
4336 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4341 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4342 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
4343 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4346 usleep_range(10, 20);
4348 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4355 * i40e_control_rx_q - Start or stop a particular Rx queue
4356 * @pf: the PF structure
4357 * @pf_q: the PF queue to configure
4358 * @enable: start or stop the queue
4360 * This function enables or disables a single queue. Note that any delay
4361 * required after the operation is expected to be handled by the caller of
4364 static void i40e_control_rx_q(struct i40e_pf *pf, int pf_q, bool enable)
4366 struct i40e_hw *hw = &pf->hw;
4370 for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) {
4371 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
4372 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
4373 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
4375 usleep_range(1000, 2000);
4378 /* Skip if the queue is already in the requested state */
4379 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4382 /* turn on/off the queue */
4384 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
4386 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
4388 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
4392 * i40e_vsi_control_rx - Start or stop a VSI's rings
4393 * @vsi: the VSI being configured
4394 * @enable: start or stop the rings
4396 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
4398 struct i40e_pf *pf = vsi->back;
4399 int i, pf_q, ret = 0;
4401 pf_q = vsi->base_queue;
4402 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4403 i40e_control_rx_q(pf, pf_q, enable);
4405 /* wait for the change to finish */
4406 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
4408 dev_info(&pf->pdev->dev,
4409 "VSI seid %d Rx ring %d %sable timeout\n",
4410 vsi->seid, pf_q, (enable ? "en" : "dis"));
4415 /* Due to HW errata, on Rx disable only, the register can indicate done
4416 * before it really is. Needs 50ms to be sure
4425 * i40e_vsi_start_rings - Start a VSI's rings
4426 * @vsi: the VSI being configured
4428 int i40e_vsi_start_rings(struct i40e_vsi *vsi)
4432 /* do rx first for enable and last for disable */
4433 ret = i40e_vsi_control_rx(vsi, true);
4436 ret = i40e_vsi_control_tx(vsi, true);
4442 * i40e_vsi_stop_rings - Stop a VSI's rings
4443 * @vsi: the VSI being configured
4445 void i40e_vsi_stop_rings(struct i40e_vsi *vsi)
4447 /* When port TX is suspended, don't wait */
4448 if (test_bit(__I40E_PORT_SUSPENDED, vsi->back->state))
4449 return i40e_vsi_stop_rings_no_wait(vsi);
4451 /* do rx first for enable and last for disable
4452 * Ignore return value, we need to shutdown whatever we can
4454 i40e_vsi_control_tx(vsi, false);
4455 i40e_vsi_control_rx(vsi, false);
4459 * i40e_vsi_stop_rings_no_wait - Stop a VSI's rings and do not delay
4460 * @vsi: the VSI being shutdown
4462 * This function stops all the rings for a VSI but does not delay to verify
4463 * that rings have been disabled. It is expected that the caller is shutting
4464 * down multiple VSIs at once and will delay together for all the VSIs after
4465 * initiating the shutdown. This is particularly useful for shutting down lots
4466 * of VFs together. Otherwise, a large delay can be incurred while configuring
4467 * each VSI in serial.
4469 void i40e_vsi_stop_rings_no_wait(struct i40e_vsi *vsi)
4471 struct i40e_pf *pf = vsi->back;
4474 pf_q = vsi->base_queue;
4475 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4476 i40e_control_tx_q(pf, pf_q, false);
4477 i40e_control_rx_q(pf, pf_q, false);
4482 * i40e_vsi_free_irq - Free the irq association with the OS
4483 * @vsi: the VSI being configured
4485 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
4487 struct i40e_pf *pf = vsi->back;
4488 struct i40e_hw *hw = &pf->hw;
4489 int base = vsi->base_vector;
4493 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4494 if (!vsi->q_vectors)
4497 if (!vsi->irqs_ready)
4500 vsi->irqs_ready = false;
4501 for (i = 0; i < vsi->num_q_vectors; i++) {
4506 irq_num = pf->msix_entries[vector].vector;
4508 /* free only the irqs that were actually requested */
4509 if (!vsi->q_vectors[i] ||
4510 !vsi->q_vectors[i]->num_ringpairs)
4513 /* clear the affinity notifier in the IRQ descriptor */
4514 irq_set_affinity_notifier(irq_num, NULL);
4515 /* remove our suggested affinity mask for this IRQ */
4516 irq_set_affinity_hint(irq_num, NULL);
4517 synchronize_irq(irq_num);
4518 free_irq(irq_num, vsi->q_vectors[i]);
4520 /* Tear down the interrupt queue link list
4522 * We know that they come in pairs and always
4523 * the Rx first, then the Tx. To clear the
4524 * link list, stick the EOL value into the
4525 * next_q field of the registers.
4527 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
4528 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4529 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4530 val |= I40E_QUEUE_END_OF_LIST
4531 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4532 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
4534 while (qp != I40E_QUEUE_END_OF_LIST) {
4537 val = rd32(hw, I40E_QINT_RQCTL(qp));
4539 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4540 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4541 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4542 I40E_QINT_RQCTL_INTEVENT_MASK);
4544 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4545 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4547 wr32(hw, I40E_QINT_RQCTL(qp), val);
4549 val = rd32(hw, I40E_QINT_TQCTL(qp));
4551 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
4552 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
4554 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4555 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4556 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4557 I40E_QINT_TQCTL_INTEVENT_MASK);
4559 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4560 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4562 wr32(hw, I40E_QINT_TQCTL(qp), val);
4567 free_irq(pf->pdev->irq, pf);
4569 val = rd32(hw, I40E_PFINT_LNKLST0);
4570 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4571 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4572 val |= I40E_QUEUE_END_OF_LIST
4573 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
4574 wr32(hw, I40E_PFINT_LNKLST0, val);
4576 val = rd32(hw, I40E_QINT_RQCTL(qp));
4577 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4578 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4579 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4580 I40E_QINT_RQCTL_INTEVENT_MASK);
4582 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4583 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4585 wr32(hw, I40E_QINT_RQCTL(qp), val);
4587 val = rd32(hw, I40E_QINT_TQCTL(qp));
4589 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4590 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4591 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4592 I40E_QINT_TQCTL_INTEVENT_MASK);
4594 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4595 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4597 wr32(hw, I40E_QINT_TQCTL(qp), val);
4602 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
4603 * @vsi: the VSI being configured
4604 * @v_idx: Index of vector to be freed
4606 * This function frees the memory allocated to the q_vector. In addition if
4607 * NAPI is enabled it will delete any references to the NAPI struct prior
4608 * to freeing the q_vector.
4610 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
4612 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4613 struct i40e_ring *ring;
4618 /* disassociate q_vector from rings */
4619 i40e_for_each_ring(ring, q_vector->tx)
4620 ring->q_vector = NULL;
4622 i40e_for_each_ring(ring, q_vector->rx)
4623 ring->q_vector = NULL;
4625 /* only VSI w/ an associated netdev is set up w/ NAPI */
4627 netif_napi_del(&q_vector->napi);
4629 vsi->q_vectors[v_idx] = NULL;
4631 kfree_rcu(q_vector, rcu);
4635 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
4636 * @vsi: the VSI being un-configured
4638 * This frees the memory allocated to the q_vectors and
4639 * deletes references to the NAPI struct.
4641 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
4645 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
4646 i40e_free_q_vector(vsi, v_idx);
4650 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
4651 * @pf: board private structure
4653 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
4655 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
4656 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4657 pci_disable_msix(pf->pdev);
4658 kfree(pf->msix_entries);
4659 pf->msix_entries = NULL;
4660 kfree(pf->irq_pile);
4661 pf->irq_pile = NULL;
4662 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
4663 pci_disable_msi(pf->pdev);
4665 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
4669 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
4670 * @pf: board private structure
4672 * We go through and clear interrupt specific resources and reset the structure
4673 * to pre-load conditions
4675 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
4679 i40e_free_misc_vector(pf);
4681 i40e_put_lump(pf->irq_pile, pf->iwarp_base_vector,
4682 I40E_IWARP_IRQ_PILE_ID);
4684 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
4685 for (i = 0; i < pf->num_alloc_vsi; i++)
4687 i40e_vsi_free_q_vectors(pf->vsi[i]);
4688 i40e_reset_interrupt_capability(pf);
4692 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4693 * @vsi: the VSI being configured
4695 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4702 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
4703 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
4705 if (q_vector->rx.ring || q_vector->tx.ring)
4706 napi_enable(&q_vector->napi);
4711 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4712 * @vsi: the VSI being configured
4714 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4721 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
4722 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
4724 if (q_vector->rx.ring || q_vector->tx.ring)
4725 napi_disable(&q_vector->napi);
4730 * i40e_vsi_close - Shut down a VSI
4731 * @vsi: the vsi to be quelled
4733 static void i40e_vsi_close(struct i40e_vsi *vsi)
4735 struct i40e_pf *pf = vsi->back;
4736 if (!test_and_set_bit(__I40E_VSI_DOWN, vsi->state))
4738 i40e_vsi_free_irq(vsi);
4739 i40e_vsi_free_tx_resources(vsi);
4740 i40e_vsi_free_rx_resources(vsi);
4741 vsi->current_netdev_flags = 0;
4742 pf->flags |= I40E_FLAG_SERVICE_CLIENT_REQUESTED;
4743 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
4744 pf->flags |= I40E_FLAG_CLIENT_RESET;
4748 * i40e_quiesce_vsi - Pause a given VSI
4749 * @vsi: the VSI being paused
4751 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4753 if (test_bit(__I40E_VSI_DOWN, vsi->state))
4756 set_bit(__I40E_VSI_NEEDS_RESTART, vsi->state);
4757 if (vsi->netdev && netif_running(vsi->netdev))
4758 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4760 i40e_vsi_close(vsi);
4764 * i40e_unquiesce_vsi - Resume a given VSI
4765 * @vsi: the VSI being resumed
4767 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4769 if (!test_and_clear_bit(__I40E_VSI_NEEDS_RESTART, vsi->state))
4772 if (vsi->netdev && netif_running(vsi->netdev))
4773 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4775 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4779 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4782 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4786 for (v = 0; v < pf->num_alloc_vsi; v++) {
4788 i40e_quiesce_vsi(pf->vsi[v]);
4793 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4796 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4800 for (v = 0; v < pf->num_alloc_vsi; v++) {
4802 i40e_unquiesce_vsi(pf->vsi[v]);
4807 * i40e_vsi_wait_queues_disabled - Wait for VSI's queues to be disabled
4808 * @vsi: the VSI being configured
4810 * Wait until all queues on a given VSI have been disabled.
4812 int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi)
4814 struct i40e_pf *pf = vsi->back;
4817 pf_q = vsi->base_queue;
4818 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4819 /* Check and wait for the Tx queue */
4820 ret = i40e_pf_txq_wait(pf, pf_q, false);
4822 dev_info(&pf->pdev->dev,
4823 "VSI seid %d Tx ring %d disable timeout\n",
4828 if (!i40e_enabled_xdp_vsi(vsi))
4831 /* Check and wait for the XDP Tx queue */
4832 ret = i40e_pf_txq_wait(pf, pf_q + vsi->alloc_queue_pairs,
4835 dev_info(&pf->pdev->dev,
4836 "VSI seid %d XDP Tx ring %d disable timeout\n",
4841 /* Check and wait for the Rx queue */
4842 ret = i40e_pf_rxq_wait(pf, pf_q, false);
4844 dev_info(&pf->pdev->dev,
4845 "VSI seid %d Rx ring %d disable timeout\n",
4854 #ifdef CONFIG_I40E_DCB
4856 * i40e_pf_wait_queues_disabled - Wait for all queues of PF VSIs to be disabled
4859 * This function waits for the queues to be in disabled state for all the
4860 * VSIs that are managed by this PF.
4862 static int i40e_pf_wait_queues_disabled(struct i40e_pf *pf)
4866 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4868 ret = i40e_vsi_wait_queues_disabled(pf->vsi[v]);
4880 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4881 * @q_idx: TX queue number
4882 * @vsi: Pointer to VSI struct
4884 * This function checks specified queue for given VSI. Detects hung condition.
4885 * We proactively detect hung TX queues by checking if interrupts are disabled
4886 * but there are pending descriptors. If it appears hung, attempt to recover
4887 * by triggering a SW interrupt.
4889 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4891 struct i40e_ring *tx_ring = NULL;
4893 u32 val, tx_pending;
4898 /* now that we have an index, find the tx_ring struct */
4899 for (i = 0; i < vsi->num_queue_pairs; i++) {
4900 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4901 if (q_idx == vsi->tx_rings[i]->queue_index) {
4902 tx_ring = vsi->tx_rings[i];
4911 /* Read interrupt register */
4912 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4914 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4915 tx_ring->vsi->base_vector - 1));
4917 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4919 tx_pending = i40e_get_tx_pending(tx_ring);
4921 /* Interrupts are disabled and TX pending is non-zero,
4922 * trigger the SW interrupt (don't wait). Worst case
4923 * there will be one extra interrupt which may result
4924 * into not cleaning any queues because queues are cleaned.
4926 if (tx_pending && (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK)))
4927 i40e_force_wb(vsi, tx_ring->q_vector);
4931 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4932 * @pf: pointer to PF struct
4934 * LAN VSI has netdev and netdev has TX queues. This function is to check
4935 * each of those TX queues if they are hung, trigger recovery by issuing
4938 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4940 struct net_device *netdev;
4941 struct i40e_vsi *vsi;
4944 /* Only for LAN VSI */
4945 vsi = pf->vsi[pf->lan_vsi];
4950 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4951 if (test_bit(__I40E_VSI_DOWN, vsi->back->state) ||
4952 test_bit(__I40E_RESET_RECOVERY_PENDING, vsi->back->state))
4955 /* Make sure type is MAIN VSI */
4956 if (vsi->type != I40E_VSI_MAIN)
4959 netdev = vsi->netdev;
4963 /* Bail out if netif_carrier is not OK */
4964 if (!netif_carrier_ok(netdev))
4967 /* Go thru' TX queues for netdev */
4968 for (i = 0; i < netdev->num_tx_queues; i++) {
4969 struct netdev_queue *q;
4971 q = netdev_get_tx_queue(netdev, i);
4973 i40e_detect_recover_hung_queue(i, vsi);
4978 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4979 * @pf: pointer to PF
4981 * Get TC map for ISCSI PF type that will include iSCSI TC
4984 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4986 struct i40e_dcb_app_priority_table app;
4987 struct i40e_hw *hw = &pf->hw;
4988 u8 enabled_tc = 1; /* TC0 is always enabled */
4990 /* Get the iSCSI APP TLV */
4991 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4993 for (i = 0; i < dcbcfg->numapps; i++) {
4994 app = dcbcfg->app[i];
4995 if (app.selector == I40E_APP_SEL_TCPIP &&
4996 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4997 tc = dcbcfg->etscfg.prioritytable[app.priority];
4998 enabled_tc |= BIT(tc);
5007 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
5008 * @dcbcfg: the corresponding DCBx configuration structure
5010 * Return the number of TCs from given DCBx configuration
5012 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
5014 int i, tc_unused = 0;
5018 /* Scan the ETS Config Priority Table to find
5019 * traffic class enabled for a given priority
5020 * and create a bitmask of enabled TCs
5022 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
5023 num_tc |= BIT(dcbcfg->etscfg.prioritytable[i]);
5025 /* Now scan the bitmask to check for
5026 * contiguous TCs starting with TC0
5028 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5029 if (num_tc & BIT(i)) {
5033 pr_err("Non-contiguous TC - Disabling DCB\n");
5041 /* There is always at least TC0 */
5049 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
5050 * @dcbcfg: the corresponding DCBx configuration structure
5052 * Query the current DCB configuration and return the number of
5053 * traffic classes enabled from the given DCBX config
5055 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
5057 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
5061 for (i = 0; i < num_tc; i++)
5062 enabled_tc |= BIT(i);
5068 * i40e_mqprio_get_enabled_tc - Get enabled traffic classes
5069 * @pf: PF being queried
5071 * Query the current MQPRIO configuration and return the number of
5072 * traffic classes enabled.
5074 static u8 i40e_mqprio_get_enabled_tc(struct i40e_pf *pf)
5076 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
5077 u8 num_tc = vsi->mqprio_qopt.qopt.num_tc;
5078 u8 enabled_tc = 1, i;
5080 for (i = 1; i < num_tc; i++)
5081 enabled_tc |= BIT(i);
5086 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
5087 * @pf: PF being queried
5089 * Return number of traffic classes enabled for the given PF
5091 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
5093 struct i40e_hw *hw = &pf->hw;
5094 u8 i, enabled_tc = 1;
5096 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5098 if (pf->flags & I40E_FLAG_TC_MQPRIO)
5099 return pf->vsi[pf->lan_vsi]->mqprio_qopt.qopt.num_tc;
5101 /* If neither MQPRIO nor DCB is enabled, then always use single TC */
5102 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
5105 /* SFP mode will be enabled for all TCs on port */
5106 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
5107 return i40e_dcb_get_num_tc(dcbcfg);
5109 /* MFP mode return count of enabled TCs for this PF */
5110 if (pf->hw.func_caps.iscsi)
5111 enabled_tc = i40e_get_iscsi_tc_map(pf);
5113 return 1; /* Only TC0 */
5115 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5116 if (enabled_tc & BIT(i))
5123 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
5124 * @pf: PF being queried
5126 * Return a bitmap for enabled traffic classes for this PF.
5128 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
5130 if (pf->flags & I40E_FLAG_TC_MQPRIO)
5131 return i40e_mqprio_get_enabled_tc(pf);
5133 /* If neither MQPRIO nor DCB is enabled for this PF then just return
5136 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
5137 return I40E_DEFAULT_TRAFFIC_CLASS;
5139 /* SFP mode we want PF to be enabled for all TCs */
5140 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
5141 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
5143 /* MFP enabled and iSCSI PF type */
5144 if (pf->hw.func_caps.iscsi)
5145 return i40e_get_iscsi_tc_map(pf);
5147 return I40E_DEFAULT_TRAFFIC_CLASS;
5151 * i40e_vsi_get_bw_info - Query VSI BW Information
5152 * @vsi: the VSI being queried
5154 * Returns 0 on success, negative value on failure
5156 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
5158 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
5159 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
5160 struct i40e_pf *pf = vsi->back;
5161 struct i40e_hw *hw = &pf->hw;
5166 /* Get the VSI level BW configuration */
5167 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
5169 dev_info(&pf->pdev->dev,
5170 "couldn't get PF vsi bw config, err %s aq_err %s\n",
5171 i40e_stat_str(&pf->hw, ret),
5172 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5176 /* Get the VSI level BW configuration per TC */
5177 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
5180 dev_info(&pf->pdev->dev,
5181 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
5182 i40e_stat_str(&pf->hw, ret),
5183 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5187 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
5188 dev_info(&pf->pdev->dev,
5189 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
5190 bw_config.tc_valid_bits,
5191 bw_ets_config.tc_valid_bits);
5192 /* Still continuing */
5195 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
5196 vsi->bw_max_quanta = bw_config.max_bw;
5197 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
5198 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
5199 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5200 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
5201 vsi->bw_ets_limit_credits[i] =
5202 le16_to_cpu(bw_ets_config.credits[i]);
5203 /* 3 bits out of 4 for each TC */
5204 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
5211 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
5212 * @vsi: the VSI being configured
5213 * @enabled_tc: TC bitmap
5214 * @bw_credits: BW shared credits per TC
5216 * Returns 0 on success, negative value on failure
5218 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
5221 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
5225 if (vsi->back->flags & I40E_FLAG_TC_MQPRIO)
5227 if (!vsi->mqprio_qopt.qopt.hw) {
5228 ret = i40e_set_bw_limit(vsi, vsi->seid, 0);
5230 dev_info(&vsi->back->pdev->dev,
5231 "Failed to reset tx rate for vsi->seid %u\n",
5235 bw_data.tc_valid_bits = enabled_tc;
5236 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5237 bw_data.tc_bw_credits[i] = bw_share[i];
5239 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
5242 dev_info(&vsi->back->pdev->dev,
5243 "AQ command Config VSI BW allocation per TC failed = %d\n",
5244 vsi->back->hw.aq.asq_last_status);
5248 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5249 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
5255 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
5256 * @vsi: the VSI being configured
5257 * @enabled_tc: TC map to be enabled
5260 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
5262 struct net_device *netdev = vsi->netdev;
5263 struct i40e_pf *pf = vsi->back;
5264 struct i40e_hw *hw = &pf->hw;
5267 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5273 netdev_reset_tc(netdev);
5277 /* Set up actual enabled TCs on the VSI */
5278 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
5281 /* set per TC queues for the VSI */
5282 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5283 /* Only set TC queues for enabled tcs
5285 * e.g. For a VSI that has TC0 and TC3 enabled the
5286 * enabled_tc bitmap would be 0x00001001; the driver
5287 * will set the numtc for netdev as 2 that will be
5288 * referenced by the netdev layer as TC 0 and 1.
5290 if (vsi->tc_config.enabled_tc & BIT(i))
5291 netdev_set_tc_queue(netdev,
5292 vsi->tc_config.tc_info[i].netdev_tc,
5293 vsi->tc_config.tc_info[i].qcount,
5294 vsi->tc_config.tc_info[i].qoffset);
5297 if (pf->flags & I40E_FLAG_TC_MQPRIO)
5300 /* Assign UP2TC map for the VSI */
5301 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
5302 /* Get the actual TC# for the UP */
5303 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
5304 /* Get the mapped netdev TC# for the UP */
5305 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
5306 netdev_set_prio_tc_map(netdev, i, netdev_tc);
5311 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
5312 * @vsi: the VSI being configured
5313 * @ctxt: the ctxt buffer returned from AQ VSI update param command
5315 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
5316 struct i40e_vsi_context *ctxt)
5318 /* copy just the sections touched not the entire info
5319 * since not all sections are valid as returned by
5322 vsi->info.mapping_flags = ctxt->info.mapping_flags;
5323 memcpy(&vsi->info.queue_mapping,
5324 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
5325 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
5326 sizeof(vsi->info.tc_mapping));
5330 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
5331 * @vsi: VSI to be configured
5332 * @enabled_tc: TC bitmap
5334 * This configures a particular VSI for TCs that are mapped to the
5335 * given TC bitmap. It uses default bandwidth share for TCs across
5336 * VSIs to configure TC for a particular VSI.
5339 * It is expected that the VSI queues have been quisced before calling
5342 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
5344 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
5345 struct i40e_vsi_context ctxt;
5349 /* Check if enabled_tc is same as existing or new TCs */
5350 if (vsi->tc_config.enabled_tc == enabled_tc &&
5351 vsi->mqprio_qopt.mode != TC_MQPRIO_MODE_CHANNEL)
5354 /* Enable ETS TCs with equal BW Share for now across all VSIs */
5355 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5356 if (enabled_tc & BIT(i))
5360 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
5362 dev_info(&vsi->back->pdev->dev,
5363 "Failed configuring TC map %d for VSI %d\n",
5364 enabled_tc, vsi->seid);
5368 /* Update Queue Pairs Mapping for currently enabled UPs */
5369 ctxt.seid = vsi->seid;
5370 ctxt.pf_num = vsi->back->hw.pf_id;
5372 ctxt.uplink_seid = vsi->uplink_seid;
5373 ctxt.info = vsi->info;
5374 if (vsi->back->flags & I40E_FLAG_TC_MQPRIO) {
5375 ret = i40e_vsi_setup_queue_map_mqprio(vsi, &ctxt, enabled_tc);
5379 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
5382 /* On destroying the qdisc, reset vsi->rss_size, as number of enabled
5385 if (!vsi->mqprio_qopt.qopt.hw && vsi->reconfig_rss) {
5386 vsi->rss_size = min_t(int, vsi->back->alloc_rss_size,
5387 vsi->num_queue_pairs);
5388 ret = i40e_vsi_config_rss(vsi);
5390 dev_info(&vsi->back->pdev->dev,
5391 "Failed to reconfig rss for num_queues\n");
5394 vsi->reconfig_rss = false;
5396 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
5397 ctxt.info.valid_sections |=
5398 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
5399 ctxt.info.queueing_opt_flags |= I40E_AQ_VSI_QUE_OPT_TCP_ENA;
5402 /* Update the VSI after updating the VSI queue-mapping
5405 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
5407 dev_info(&vsi->back->pdev->dev,
5408 "Update vsi tc config failed, err %s aq_err %s\n",
5409 i40e_stat_str(&vsi->back->hw, ret),
5410 i40e_aq_str(&vsi->back->hw,
5411 vsi->back->hw.aq.asq_last_status));
5414 /* update the local VSI info with updated queue map */
5415 i40e_vsi_update_queue_map(vsi, &ctxt);
5416 vsi->info.valid_sections = 0;
5418 /* Update current VSI BW information */
5419 ret = i40e_vsi_get_bw_info(vsi);
5421 dev_info(&vsi->back->pdev->dev,
5422 "Failed updating vsi bw info, err %s aq_err %s\n",
5423 i40e_stat_str(&vsi->back->hw, ret),
5424 i40e_aq_str(&vsi->back->hw,
5425 vsi->back->hw.aq.asq_last_status));
5429 /* Update the netdev TC setup */
5430 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
5436 * i40e_get_link_speed - Returns link speed for the interface
5437 * @vsi: VSI to be configured
5440 int i40e_get_link_speed(struct i40e_vsi *vsi)
5442 struct i40e_pf *pf = vsi->back;
5444 switch (pf->hw.phy.link_info.link_speed) {
5445 case I40E_LINK_SPEED_40GB:
5447 case I40E_LINK_SPEED_25GB:
5449 case I40E_LINK_SPEED_20GB:
5451 case I40E_LINK_SPEED_10GB:
5453 case I40E_LINK_SPEED_1GB:
5461 * i40e_set_bw_limit - setup BW limit for Tx traffic based on max_tx_rate
5462 * @vsi: VSI to be configured
5463 * @seid: seid of the channel/VSI
5464 * @max_tx_rate: max TX rate to be configured as BW limit
5466 * Helper function to set BW limit for a given VSI
5468 int i40e_set_bw_limit(struct i40e_vsi *vsi, u16 seid, u64 max_tx_rate)
5470 struct i40e_pf *pf = vsi->back;
5475 speed = i40e_get_link_speed(vsi);
5476 if (max_tx_rate > speed) {
5477 dev_err(&pf->pdev->dev,
5478 "Invalid max tx rate %llu specified for VSI seid %d.",
5482 if (max_tx_rate && max_tx_rate < 50) {
5483 dev_warn(&pf->pdev->dev,
5484 "Setting max tx rate to minimum usable value of 50Mbps.\n");
5488 /* Tx rate credits are in values of 50Mbps, 0 is disabled */
5489 credits = max_tx_rate;
5490 do_div(credits, I40E_BW_CREDIT_DIVISOR);
5491 ret = i40e_aq_config_vsi_bw_limit(&pf->hw, seid, credits,
5492 I40E_MAX_BW_INACTIVE_ACCUM, NULL);
5494 dev_err(&pf->pdev->dev,
5495 "Failed set tx rate (%llu Mbps) for vsi->seid %u, err %s aq_err %s\n",
5496 max_tx_rate, seid, i40e_stat_str(&pf->hw, ret),
5497 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5502 * i40e_remove_queue_channels - Remove queue channels for the TCs
5503 * @vsi: VSI to be configured
5505 * Remove queue channels for the TCs
5507 static void i40e_remove_queue_channels(struct i40e_vsi *vsi)
5509 enum i40e_admin_queue_err last_aq_status;
5510 struct i40e_cloud_filter *cfilter;
5511 struct i40e_channel *ch, *ch_tmp;
5512 struct i40e_pf *pf = vsi->back;
5513 struct hlist_node *node;
5516 /* Reset rss size that was stored when reconfiguring rss for
5517 * channel VSIs with non-power-of-2 queue count.
5519 vsi->current_rss_size = 0;
5521 /* perform cleanup for channels if they exist */
5522 if (list_empty(&vsi->ch_list))
5525 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
5526 struct i40e_vsi *p_vsi;
5528 list_del(&ch->list);
5529 p_vsi = ch->parent_vsi;
5530 if (!p_vsi || !ch->initialized) {
5534 /* Reset queue contexts */
5535 for (i = 0; i < ch->num_queue_pairs; i++) {
5536 struct i40e_ring *tx_ring, *rx_ring;
5539 pf_q = ch->base_queue + i;
5540 tx_ring = vsi->tx_rings[pf_q];
5543 rx_ring = vsi->rx_rings[pf_q];
5547 /* Reset BW configured for this VSI via mqprio */
5548 ret = i40e_set_bw_limit(vsi, ch->seid, 0);
5550 dev_info(&vsi->back->pdev->dev,
5551 "Failed to reset tx rate for ch->seid %u\n",
5554 /* delete cloud filters associated with this channel */
5555 hlist_for_each_entry_safe(cfilter, node,
5556 &pf->cloud_filter_list, cloud_node) {
5557 if (cfilter->seid != ch->seid)
5560 hash_del(&cfilter->cloud_node);
5561 if (cfilter->dst_port)
5562 ret = i40e_add_del_cloud_filter_big_buf(vsi,
5566 ret = i40e_add_del_cloud_filter(vsi, cfilter,
5568 last_aq_status = pf->hw.aq.asq_last_status;
5570 dev_info(&pf->pdev->dev,
5571 "Failed to delete cloud filter, err %s aq_err %s\n",
5572 i40e_stat_str(&pf->hw, ret),
5573 i40e_aq_str(&pf->hw, last_aq_status));
5577 /* delete VSI from FW */
5578 ret = i40e_aq_delete_element(&vsi->back->hw, ch->seid,
5581 dev_err(&vsi->back->pdev->dev,
5582 "unable to remove channel (%d) for parent VSI(%d)\n",
5583 ch->seid, p_vsi->seid);
5586 INIT_LIST_HEAD(&vsi->ch_list);
5590 * i40e_is_any_channel - channel exist or not
5591 * @vsi: ptr to VSI to which channels are associated with
5593 * Returns true or false if channel(s) exist for associated VSI or not
5595 static bool i40e_is_any_channel(struct i40e_vsi *vsi)
5597 struct i40e_channel *ch, *ch_tmp;
5599 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
5600 if (ch->initialized)
5608 * i40e_get_max_queues_for_channel
5609 * @vsi: ptr to VSI to which channels are associated with
5611 * Helper function which returns max value among the queue counts set on the
5612 * channels/TCs created.
5614 static int i40e_get_max_queues_for_channel(struct i40e_vsi *vsi)
5616 struct i40e_channel *ch, *ch_tmp;
5619 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
5620 if (!ch->initialized)
5622 if (ch->num_queue_pairs > max)
5623 max = ch->num_queue_pairs;
5630 * i40e_validate_num_queues - validate num_queues w.r.t channel
5631 * @pf: ptr to PF device
5632 * @num_queues: number of queues
5633 * @vsi: the parent VSI
5634 * @reconfig_rss: indicates should the RSS be reconfigured or not
5636 * This function validates number of queues in the context of new channel
5637 * which is being established and determines if RSS should be reconfigured
5638 * or not for parent VSI.
5640 static int i40e_validate_num_queues(struct i40e_pf *pf, int num_queues,
5641 struct i40e_vsi *vsi, bool *reconfig_rss)
5648 *reconfig_rss = false;
5649 if (vsi->current_rss_size) {
5650 if (num_queues > vsi->current_rss_size) {
5651 dev_dbg(&pf->pdev->dev,
5652 "Error: num_queues (%d) > vsi's current_size(%d)\n",
5653 num_queues, vsi->current_rss_size);
5655 } else if ((num_queues < vsi->current_rss_size) &&
5656 (!is_power_of_2(num_queues))) {
5657 dev_dbg(&pf->pdev->dev,
5658 "Error: num_queues (%d) < vsi's current_size(%d), but not power of 2\n",
5659 num_queues, vsi->current_rss_size);
5664 if (!is_power_of_2(num_queues)) {
5665 /* Find the max num_queues configured for channel if channel
5667 * if channel exist, then enforce 'num_queues' to be more than
5668 * max ever queues configured for channel.
5670 max_ch_queues = i40e_get_max_queues_for_channel(vsi);
5671 if (num_queues < max_ch_queues) {
5672 dev_dbg(&pf->pdev->dev,
5673 "Error: num_queues (%d) < max queues configured for channel(%d)\n",
5674 num_queues, max_ch_queues);
5677 *reconfig_rss = true;
5684 * i40e_vsi_reconfig_rss - reconfig RSS based on specified rss_size
5685 * @vsi: the VSI being setup
5686 * @rss_size: size of RSS, accordingly LUT gets reprogrammed
5688 * This function reconfigures RSS by reprogramming LUTs using 'rss_size'
5690 static int i40e_vsi_reconfig_rss(struct i40e_vsi *vsi, u16 rss_size)
5692 struct i40e_pf *pf = vsi->back;
5693 u8 seed[I40E_HKEY_ARRAY_SIZE];
5694 struct i40e_hw *hw = &pf->hw;
5702 if (rss_size > vsi->rss_size)
5705 local_rss_size = min_t(int, vsi->rss_size, rss_size);
5706 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
5710 /* Ignoring user configured lut if there is one */
5711 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, local_rss_size);
5713 /* Use user configured hash key if there is one, otherwise
5716 if (vsi->rss_hkey_user)
5717 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
5719 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
5721 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
5723 dev_info(&pf->pdev->dev,
5724 "Cannot set RSS lut, err %s aq_err %s\n",
5725 i40e_stat_str(hw, ret),
5726 i40e_aq_str(hw, hw->aq.asq_last_status));
5732 /* Do the update w.r.t. storing rss_size */
5733 if (!vsi->orig_rss_size)
5734 vsi->orig_rss_size = vsi->rss_size;
5735 vsi->current_rss_size = local_rss_size;
5741 * i40e_channel_setup_queue_map - Setup a channel queue map
5742 * @pf: ptr to PF device
5743 * @vsi: the VSI being setup
5744 * @ctxt: VSI context structure
5745 * @ch: ptr to channel structure
5747 * Setup queue map for a specific channel
5749 static void i40e_channel_setup_queue_map(struct i40e_pf *pf,
5750 struct i40e_vsi_context *ctxt,
5751 struct i40e_channel *ch)
5753 u16 qcount, qmap, sections = 0;
5757 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
5758 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
5760 qcount = min_t(int, ch->num_queue_pairs, pf->num_lan_msix);
5761 ch->num_queue_pairs = qcount;
5763 /* find the next higher power-of-2 of num queue pairs */
5764 pow = ilog2(qcount);
5765 if (!is_power_of_2(qcount))
5768 qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
5769 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
5771 /* Setup queue TC[0].qmap for given VSI context */
5772 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
5774 ctxt->info.up_enable_bits = 0x1; /* TC0 enabled */
5775 ctxt->info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
5776 ctxt->info.queue_mapping[0] = cpu_to_le16(ch->base_queue);
5777 ctxt->info.valid_sections |= cpu_to_le16(sections);
5781 * i40e_add_channel - add a channel by adding VSI
5782 * @pf: ptr to PF device
5783 * @uplink_seid: underlying HW switching element (VEB) ID
5784 * @ch: ptr to channel structure
5786 * Add a channel (VSI) using add_vsi and queue_map
5788 static int i40e_add_channel(struct i40e_pf *pf, u16 uplink_seid,
5789 struct i40e_channel *ch)
5791 struct i40e_hw *hw = &pf->hw;
5792 struct i40e_vsi_context ctxt;
5793 u8 enabled_tc = 0x1; /* TC0 enabled */
5796 if (ch->type != I40E_VSI_VMDQ2) {
5797 dev_info(&pf->pdev->dev,
5798 "add new vsi failed, ch->type %d\n", ch->type);
5802 memset(&ctxt, 0, sizeof(ctxt));
5803 ctxt.pf_num = hw->pf_id;
5805 ctxt.uplink_seid = uplink_seid;
5806 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
5807 if (ch->type == I40E_VSI_VMDQ2)
5808 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
5810 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED) {
5811 ctxt.info.valid_sections |=
5812 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
5813 ctxt.info.switch_id =
5814 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
5817 /* Set queue map for a given VSI context */
5818 i40e_channel_setup_queue_map(pf, &ctxt, ch);
5820 /* Now time to create VSI */
5821 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
5823 dev_info(&pf->pdev->dev,
5824 "add new vsi failed, err %s aq_err %s\n",
5825 i40e_stat_str(&pf->hw, ret),
5826 i40e_aq_str(&pf->hw,
5827 pf->hw.aq.asq_last_status));
5831 /* Success, update channel */
5832 ch->enabled_tc = enabled_tc;
5833 ch->seid = ctxt.seid;
5834 ch->vsi_number = ctxt.vsi_number;
5835 ch->stat_counter_idx = cpu_to_le16(ctxt.info.stat_counter_idx);
5837 /* copy just the sections touched not the entire info
5838 * since not all sections are valid as returned by
5841 ch->info.mapping_flags = ctxt.info.mapping_flags;
5842 memcpy(&ch->info.queue_mapping,
5843 &ctxt.info.queue_mapping, sizeof(ctxt.info.queue_mapping));
5844 memcpy(&ch->info.tc_mapping, ctxt.info.tc_mapping,
5845 sizeof(ctxt.info.tc_mapping));
5850 static int i40e_channel_config_bw(struct i40e_vsi *vsi, struct i40e_channel *ch,
5853 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
5857 bw_data.tc_valid_bits = ch->enabled_tc;
5858 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5859 bw_data.tc_bw_credits[i] = bw_share[i];
5861 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, ch->seid,
5864 dev_info(&vsi->back->pdev->dev,
5865 "Config VSI BW allocation per TC failed, aq_err: %d for new_vsi->seid %u\n",
5866 vsi->back->hw.aq.asq_last_status, ch->seid);
5870 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5871 ch->info.qs_handle[i] = bw_data.qs_handles[i];
5877 * i40e_channel_config_tx_ring - config TX ring associated with new channel
5878 * @pf: ptr to PF device
5879 * @vsi: the VSI being setup
5880 * @ch: ptr to channel structure
5882 * Configure TX rings associated with channel (VSI) since queues are being
5885 static int i40e_channel_config_tx_ring(struct i40e_pf *pf,
5886 struct i40e_vsi *vsi,
5887 struct i40e_channel *ch)
5891 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
5893 /* Enable ETS TCs with equal BW Share for now across all VSIs */
5894 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5895 if (ch->enabled_tc & BIT(i))
5899 /* configure BW for new VSI */
5900 ret = i40e_channel_config_bw(vsi, ch, bw_share);
5902 dev_info(&vsi->back->pdev->dev,
5903 "Failed configuring TC map %d for channel (seid %u)\n",
5904 ch->enabled_tc, ch->seid);
5908 for (i = 0; i < ch->num_queue_pairs; i++) {
5909 struct i40e_ring *tx_ring, *rx_ring;
5912 pf_q = ch->base_queue + i;
5914 /* Get to TX ring ptr of main VSI, for re-setup TX queue
5917 tx_ring = vsi->tx_rings[pf_q];
5920 /* Get the RX ring ptr */
5921 rx_ring = vsi->rx_rings[pf_q];
5929 * i40e_setup_hw_channel - setup new channel
5930 * @pf: ptr to PF device
5931 * @vsi: the VSI being setup
5932 * @ch: ptr to channel structure
5933 * @uplink_seid: underlying HW switching element (VEB) ID
5934 * @type: type of channel to be created (VMDq2/VF)
5936 * Setup new channel (VSI) based on specified type (VMDq2/VF)
5937 * and configures TX rings accordingly
5939 static inline int i40e_setup_hw_channel(struct i40e_pf *pf,
5940 struct i40e_vsi *vsi,
5941 struct i40e_channel *ch,
5942 u16 uplink_seid, u8 type)
5946 ch->initialized = false;
5947 ch->base_queue = vsi->next_base_queue;
5950 /* Proceed with creation of channel (VMDq2) VSI */
5951 ret = i40e_add_channel(pf, uplink_seid, ch);
5953 dev_info(&pf->pdev->dev,
5954 "failed to add_channel using uplink_seid %u\n",
5959 /* Mark the successful creation of channel */
5960 ch->initialized = true;
5962 /* Reconfigure TX queues using QTX_CTL register */
5963 ret = i40e_channel_config_tx_ring(pf, vsi, ch);
5965 dev_info(&pf->pdev->dev,
5966 "failed to configure TX rings for channel %u\n",
5971 /* update 'next_base_queue' */
5972 vsi->next_base_queue = vsi->next_base_queue + ch->num_queue_pairs;
5973 dev_dbg(&pf->pdev->dev,
5974 "Added channel: vsi_seid %u, vsi_number %u, stat_counter_idx %u, num_queue_pairs %u, pf->next_base_queue %d\n",
5975 ch->seid, ch->vsi_number, ch->stat_counter_idx,
5976 ch->num_queue_pairs,
5977 vsi->next_base_queue);
5982 * i40e_setup_channel - setup new channel using uplink element
5983 * @pf: ptr to PF device
5984 * @type: type of channel to be created (VMDq2/VF)
5985 * @uplink_seid: underlying HW switching element (VEB) ID
5986 * @ch: ptr to channel structure
5988 * Setup new channel (VSI) based on specified type (VMDq2/VF)
5989 * and uplink switching element (uplink_seid)
5991 static bool i40e_setup_channel(struct i40e_pf *pf, struct i40e_vsi *vsi,
5992 struct i40e_channel *ch)
5998 if (vsi->type == I40E_VSI_MAIN) {
5999 vsi_type = I40E_VSI_VMDQ2;
6001 dev_err(&pf->pdev->dev, "unsupported parent vsi type(%d)\n",
6006 /* underlying switching element */
6007 seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6009 /* create channel (VSI), configure TX rings */
6010 ret = i40e_setup_hw_channel(pf, vsi, ch, seid, vsi_type);
6012 dev_err(&pf->pdev->dev, "failed to setup hw_channel\n");
6016 return ch->initialized ? true : false;
6020 * i40e_validate_and_set_switch_mode - sets up switch mode correctly
6021 * @vsi: ptr to VSI which has PF backing
6023 * Sets up switch mode correctly if it needs to be changed and perform
6024 * what are allowed modes.
6026 static int i40e_validate_and_set_switch_mode(struct i40e_vsi *vsi)
6029 struct i40e_pf *pf = vsi->back;
6030 struct i40e_hw *hw = &pf->hw;
6033 ret = i40e_get_capabilities(pf, i40e_aqc_opc_list_dev_capabilities);
6037 if (hw->dev_caps.switch_mode) {
6038 /* if switch mode is set, support mode2 (non-tunneled for
6039 * cloud filter) for now
6041 u32 switch_mode = hw->dev_caps.switch_mode &
6042 I40E_SWITCH_MODE_MASK;
6043 if (switch_mode >= I40E_CLOUD_FILTER_MODE1) {
6044 if (switch_mode == I40E_CLOUD_FILTER_MODE2)
6046 dev_err(&pf->pdev->dev,
6047 "Invalid switch_mode (%d), only non-tunneled mode for cloud filter is supported\n",
6048 hw->dev_caps.switch_mode);
6053 /* Set Bit 7 to be valid */
6054 mode = I40E_AQ_SET_SWITCH_BIT7_VALID;
6056 /* Set L4type for TCP support */
6057 mode |= I40E_AQ_SET_SWITCH_L4_TYPE_TCP;
6059 /* Set cloud filter mode */
6060 mode |= I40E_AQ_SET_SWITCH_MODE_NON_TUNNEL;
6062 /* Prep mode field for set_switch_config */
6063 ret = i40e_aq_set_switch_config(hw, pf->last_sw_conf_flags,
6064 pf->last_sw_conf_valid_flags,
6066 if (ret && hw->aq.asq_last_status != I40E_AQ_RC_ESRCH)
6067 dev_err(&pf->pdev->dev,
6068 "couldn't set switch config bits, err %s aq_err %s\n",
6069 i40e_stat_str(hw, ret),
6071 hw->aq.asq_last_status));
6077 * i40e_create_queue_channel - function to create channel
6078 * @vsi: VSI to be configured
6079 * @ch: ptr to channel (it contains channel specific params)
6081 * This function creates channel (VSI) using num_queues specified by user,
6082 * reconfigs RSS if needed.
6084 int i40e_create_queue_channel(struct i40e_vsi *vsi,
6085 struct i40e_channel *ch)
6087 struct i40e_pf *pf = vsi->back;
6094 if (!ch->num_queue_pairs) {
6095 dev_err(&pf->pdev->dev, "Invalid num_queues requested: %d\n",
6096 ch->num_queue_pairs);
6100 /* validate user requested num_queues for channel */
6101 err = i40e_validate_num_queues(pf, ch->num_queue_pairs, vsi,
6104 dev_info(&pf->pdev->dev, "Failed to validate num_queues (%d)\n",
6105 ch->num_queue_pairs);
6109 /* By default we are in VEPA mode, if this is the first VF/VMDq
6110 * VSI to be added switch to VEB mode.
6112 if ((!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) ||
6113 (!i40e_is_any_channel(vsi))) {
6114 if (!is_power_of_2(vsi->tc_config.tc_info[0].qcount)) {
6115 dev_dbg(&pf->pdev->dev,
6116 "Failed to create channel. Override queues (%u) not power of 2\n",
6117 vsi->tc_config.tc_info[0].qcount);
6121 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
6122 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
6124 if (vsi->type == I40E_VSI_MAIN) {
6125 if (pf->flags & I40E_FLAG_TC_MQPRIO)
6126 i40e_do_reset(pf, I40E_PF_RESET_FLAG,
6129 i40e_do_reset_safe(pf,
6130 I40E_PF_RESET_FLAG);
6133 /* now onwards for main VSI, number of queues will be value
6134 * of TC0's queue count
6138 /* By this time, vsi->cnt_q_avail shall be set to non-zero and
6139 * it should be more than num_queues
6141 if (!vsi->cnt_q_avail || vsi->cnt_q_avail < ch->num_queue_pairs) {
6142 dev_dbg(&pf->pdev->dev,
6143 "Error: cnt_q_avail (%u) less than num_queues %d\n",
6144 vsi->cnt_q_avail, ch->num_queue_pairs);
6148 /* reconfig_rss only if vsi type is MAIN_VSI */
6149 if (reconfig_rss && (vsi->type == I40E_VSI_MAIN)) {
6150 err = i40e_vsi_reconfig_rss(vsi, ch->num_queue_pairs);
6152 dev_info(&pf->pdev->dev,
6153 "Error: unable to reconfig rss for num_queues (%u)\n",
6154 ch->num_queue_pairs);
6159 if (!i40e_setup_channel(pf, vsi, ch)) {
6160 dev_info(&pf->pdev->dev, "Failed to setup channel\n");
6164 dev_info(&pf->pdev->dev,
6165 "Setup channel (id:%u) utilizing num_queues %d\n",
6166 ch->seid, ch->num_queue_pairs);
6168 /* configure VSI for BW limit */
6169 if (ch->max_tx_rate) {
6170 u64 credits = ch->max_tx_rate;
6172 if (i40e_set_bw_limit(vsi, ch->seid, ch->max_tx_rate))
6175 do_div(credits, I40E_BW_CREDIT_DIVISOR);
6176 dev_dbg(&pf->pdev->dev,
6177 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
6183 /* in case of VF, this will be main SRIOV VSI */
6184 ch->parent_vsi = vsi;
6186 /* and update main_vsi's count for queue_available to use */
6187 vsi->cnt_q_avail -= ch->num_queue_pairs;
6193 * i40e_configure_queue_channels - Add queue channel for the given TCs
6194 * @vsi: VSI to be configured
6196 * Configures queue channel mapping to the given TCs
6198 static int i40e_configure_queue_channels(struct i40e_vsi *vsi)
6200 struct i40e_channel *ch;
6204 /* Create app vsi with the TCs. Main VSI with TC0 is already set up */
6205 vsi->tc_seid_map[0] = vsi->seid;
6206 for (i = 1; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6207 if (vsi->tc_config.enabled_tc & BIT(i)) {
6208 ch = kzalloc(sizeof(*ch), GFP_KERNEL);
6214 INIT_LIST_HEAD(&ch->list);
6215 ch->num_queue_pairs =
6216 vsi->tc_config.tc_info[i].qcount;
6218 vsi->tc_config.tc_info[i].qoffset;
6220 /* Bandwidth limit through tc interface is in bytes/s,
6223 max_rate = vsi->mqprio_qopt.max_rate[i];
6224 do_div(max_rate, I40E_BW_MBPS_DIVISOR);
6225 ch->max_tx_rate = max_rate;
6227 list_add_tail(&ch->list, &vsi->ch_list);
6229 ret = i40e_create_queue_channel(vsi, ch);
6231 dev_err(&vsi->back->pdev->dev,
6232 "Failed creating queue channel with TC%d: queues %d\n",
6233 i, ch->num_queue_pairs);
6236 vsi->tc_seid_map[i] = ch->seid;
6242 i40e_remove_queue_channels(vsi);
6247 * i40e_veb_config_tc - Configure TCs for given VEB
6249 * @enabled_tc: TC bitmap
6251 * Configures given TC bitmap for VEB (switching) element
6253 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
6255 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
6256 struct i40e_pf *pf = veb->pf;
6260 /* No TCs or already enabled TCs just return */
6261 if (!enabled_tc || veb->enabled_tc == enabled_tc)
6264 bw_data.tc_valid_bits = enabled_tc;
6265 /* bw_data.absolute_credits is not set (relative) */
6267 /* Enable ETS TCs with equal BW Share for now */
6268 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6269 if (enabled_tc & BIT(i))
6270 bw_data.tc_bw_share_credits[i] = 1;
6273 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
6276 dev_info(&pf->pdev->dev,
6277 "VEB bw config failed, err %s aq_err %s\n",
6278 i40e_stat_str(&pf->hw, ret),
6279 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6283 /* Update the BW information */
6284 ret = i40e_veb_get_bw_info(veb);
6286 dev_info(&pf->pdev->dev,
6287 "Failed getting veb bw config, err %s aq_err %s\n",
6288 i40e_stat_str(&pf->hw, ret),
6289 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6296 #ifdef CONFIG_I40E_DCB
6298 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
6301 * Reconfigure VEB/VSIs on a given PF; it is assumed that
6302 * the caller would've quiesce all the VSIs before calling
6305 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
6311 /* Enable the TCs available on PF to all VEBs */
6312 tc_map = i40e_pf_get_tc_map(pf);
6313 for (v = 0; v < I40E_MAX_VEB; v++) {
6316 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
6318 dev_info(&pf->pdev->dev,
6319 "Failed configuring TC for VEB seid=%d\n",
6321 /* Will try to configure as many components */
6325 /* Update each VSI */
6326 for (v = 0; v < pf->num_alloc_vsi; v++) {
6330 /* - Enable all TCs for the LAN VSI
6331 * - For all others keep them at TC0 for now
6333 if (v == pf->lan_vsi)
6334 tc_map = i40e_pf_get_tc_map(pf);
6336 tc_map = I40E_DEFAULT_TRAFFIC_CLASS;
6338 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
6340 dev_info(&pf->pdev->dev,
6341 "Failed configuring TC for VSI seid=%d\n",
6343 /* Will try to configure as many components */
6345 /* Re-configure VSI vectors based on updated TC map */
6346 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
6347 if (pf->vsi[v]->netdev)
6348 i40e_dcbnl_set_all(pf->vsi[v]);
6354 * i40e_resume_port_tx - Resume port Tx
6357 * Resume a port's Tx and issue a PF reset in case of failure to
6360 static int i40e_resume_port_tx(struct i40e_pf *pf)
6362 struct i40e_hw *hw = &pf->hw;
6365 ret = i40e_aq_resume_port_tx(hw, NULL);
6367 dev_info(&pf->pdev->dev,
6368 "Resume Port Tx failed, err %s aq_err %s\n",
6369 i40e_stat_str(&pf->hw, ret),
6370 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6371 /* Schedule PF reset to recover */
6372 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
6373 i40e_service_event_schedule(pf);
6380 * i40e_init_pf_dcb - Initialize DCB configuration
6381 * @pf: PF being configured
6383 * Query the current DCB configuration and cache it
6384 * in the hardware structure
6386 static int i40e_init_pf_dcb(struct i40e_pf *pf)
6388 struct i40e_hw *hw = &pf->hw;
6391 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
6392 if (pf->hw_features & I40E_HW_NO_DCB_SUPPORT)
6395 /* Get the initial DCB configuration */
6396 err = i40e_init_dcb(hw);
6398 /* Device/Function is not DCBX capable */
6399 if ((!hw->func_caps.dcb) ||
6400 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
6401 dev_info(&pf->pdev->dev,
6402 "DCBX offload is not supported or is disabled for this PF.\n");
6404 /* When status is not DISABLED then DCBX in FW */
6405 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
6406 DCB_CAP_DCBX_VER_IEEE;
6408 pf->flags |= I40E_FLAG_DCB_CAPABLE;
6409 /* Enable DCB tagging only when more than one TC
6410 * or explicitly disable if only one TC
6412 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
6413 pf->flags |= I40E_FLAG_DCB_ENABLED;
6415 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
6416 dev_dbg(&pf->pdev->dev,
6417 "DCBX offload is supported for this PF.\n");
6420 dev_info(&pf->pdev->dev,
6421 "Query for DCB configuration failed, err %s aq_err %s\n",
6422 i40e_stat_str(&pf->hw, err),
6423 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6429 #endif /* CONFIG_I40E_DCB */
6430 #define SPEED_SIZE 14
6433 * i40e_print_link_message - print link up or down
6434 * @vsi: the VSI for which link needs a message
6436 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
6438 enum i40e_aq_link_speed new_speed;
6439 struct i40e_pf *pf = vsi->back;
6440 char *speed = "Unknown";
6441 char *fc = "Unknown";
6446 new_speed = pf->hw.phy.link_info.link_speed;
6448 if ((vsi->current_isup == isup) && (vsi->current_speed == new_speed))
6450 vsi->current_isup = isup;
6451 vsi->current_speed = new_speed;
6453 netdev_info(vsi->netdev, "NIC Link is Down\n");
6457 /* Warn user if link speed on NPAR enabled partition is not at
6460 if (pf->hw.func_caps.npar_enable &&
6461 (pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
6462 pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
6463 netdev_warn(vsi->netdev,
6464 "The partition detected link speed that is less than 10Gbps\n");
6466 switch (pf->hw.phy.link_info.link_speed) {
6467 case I40E_LINK_SPEED_40GB:
6470 case I40E_LINK_SPEED_20GB:
6473 case I40E_LINK_SPEED_25GB:
6476 case I40E_LINK_SPEED_10GB:
6479 case I40E_LINK_SPEED_1GB:
6482 case I40E_LINK_SPEED_100MB:
6489 switch (pf->hw.fc.current_mode) {
6493 case I40E_FC_TX_PAUSE:
6496 case I40E_FC_RX_PAUSE:
6504 if (pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_25GB) {
6505 req_fec = ", Requested FEC: None";
6506 fec = ", FEC: None";
6507 an = ", Autoneg: False";
6509 if (pf->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED)
6510 an = ", Autoneg: True";
6512 if (pf->hw.phy.link_info.fec_info &
6513 I40E_AQ_CONFIG_FEC_KR_ENA)
6514 fec = ", FEC: CL74 FC-FEC/BASE-R";
6515 else if (pf->hw.phy.link_info.fec_info &
6516 I40E_AQ_CONFIG_FEC_RS_ENA)
6517 fec = ", FEC: CL108 RS-FEC";
6519 /* 'CL108 RS-FEC' should be displayed when RS is requested, or
6520 * both RS and FC are requested
6522 if (vsi->back->hw.phy.link_info.req_fec_info &
6523 (I40E_AQ_REQUEST_FEC_KR | I40E_AQ_REQUEST_FEC_RS)) {
6524 if (vsi->back->hw.phy.link_info.req_fec_info &
6525 I40E_AQ_REQUEST_FEC_RS)
6526 req_fec = ", Requested FEC: CL108 RS-FEC";
6528 req_fec = ", Requested FEC: CL74 FC-FEC/BASE-R";
6532 netdev_info(vsi->netdev, "NIC Link is Up, %sbps Full Duplex%s%s%s, Flow Control: %s\n",
6533 speed, req_fec, fec, an, fc);
6537 * i40e_up_complete - Finish the last steps of bringing up a connection
6538 * @vsi: the VSI being configured
6540 static int i40e_up_complete(struct i40e_vsi *vsi)
6542 struct i40e_pf *pf = vsi->back;
6545 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6546 i40e_vsi_configure_msix(vsi);
6548 i40e_configure_msi_and_legacy(vsi);
6551 err = i40e_vsi_start_rings(vsi);
6555 clear_bit(__I40E_VSI_DOWN, vsi->state);
6556 i40e_napi_enable_all(vsi);
6557 i40e_vsi_enable_irq(vsi);
6559 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
6561 i40e_print_link_message(vsi, true);
6562 netif_tx_start_all_queues(vsi->netdev);
6563 netif_carrier_on(vsi->netdev);
6566 /* replay FDIR SB filters */
6567 if (vsi->type == I40E_VSI_FDIR) {
6568 /* reset fd counters */
6571 i40e_fdir_filter_restore(vsi);
6574 /* On the next run of the service_task, notify any clients of the new
6577 pf->flags |= I40E_FLAG_SERVICE_CLIENT_REQUESTED;
6578 i40e_service_event_schedule(pf);
6584 * i40e_vsi_reinit_locked - Reset the VSI
6585 * @vsi: the VSI being configured
6587 * Rebuild the ring structs after some configuration
6588 * has changed, e.g. MTU size.
6590 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
6592 struct i40e_pf *pf = vsi->back;
6594 WARN_ON(in_interrupt());
6595 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state))
6596 usleep_range(1000, 2000);
6600 clear_bit(__I40E_CONFIG_BUSY, pf->state);
6604 * i40e_up - Bring the connection back up after being down
6605 * @vsi: the VSI being configured
6607 int i40e_up(struct i40e_vsi *vsi)
6611 err = i40e_vsi_configure(vsi);
6613 err = i40e_up_complete(vsi);
6619 * i40e_down - Shutdown the connection processing
6620 * @vsi: the VSI being stopped
6622 void i40e_down(struct i40e_vsi *vsi)
6626 /* It is assumed that the caller of this function
6627 * sets the vsi->state __I40E_VSI_DOWN bit.
6630 netif_carrier_off(vsi->netdev);
6631 netif_tx_disable(vsi->netdev);
6633 i40e_vsi_disable_irq(vsi);
6634 i40e_vsi_stop_rings(vsi);
6635 i40e_napi_disable_all(vsi);
6637 for (i = 0; i < vsi->num_queue_pairs; i++) {
6638 i40e_clean_tx_ring(vsi->tx_rings[i]);
6639 if (i40e_enabled_xdp_vsi(vsi))
6640 i40e_clean_tx_ring(vsi->xdp_rings[i]);
6641 i40e_clean_rx_ring(vsi->rx_rings[i]);
6647 * i40e_validate_mqprio_qopt- validate queue mapping info
6648 * @vsi: the VSI being configured
6649 * @mqprio_qopt: queue parametrs
6651 static int i40e_validate_mqprio_qopt(struct i40e_vsi *vsi,
6652 struct tc_mqprio_qopt_offload *mqprio_qopt)
6654 u64 sum_max_rate = 0;
6658 if (mqprio_qopt->qopt.offset[0] != 0 ||
6659 mqprio_qopt->qopt.num_tc < 1 ||
6660 mqprio_qopt->qopt.num_tc > I40E_MAX_TRAFFIC_CLASS)
6662 for (i = 0; ; i++) {
6663 if (!mqprio_qopt->qopt.count[i])
6665 if (mqprio_qopt->min_rate[i]) {
6666 dev_err(&vsi->back->pdev->dev,
6667 "Invalid min tx rate (greater than 0) specified\n");
6670 max_rate = mqprio_qopt->max_rate[i];
6671 do_div(max_rate, I40E_BW_MBPS_DIVISOR);
6672 sum_max_rate += max_rate;
6674 if (i >= mqprio_qopt->qopt.num_tc - 1)
6676 if (mqprio_qopt->qopt.offset[i + 1] !=
6677 (mqprio_qopt->qopt.offset[i] + mqprio_qopt->qopt.count[i]))
6680 if (vsi->num_queue_pairs <
6681 (mqprio_qopt->qopt.offset[i] + mqprio_qopt->qopt.count[i])) {
6684 if (sum_max_rate > i40e_get_link_speed(vsi)) {
6685 dev_err(&vsi->back->pdev->dev,
6686 "Invalid max tx rate specified\n");
6693 * i40e_vsi_set_default_tc_config - set default values for tc configuration
6694 * @vsi: the VSI being configured
6696 static void i40e_vsi_set_default_tc_config(struct i40e_vsi *vsi)
6701 /* Only TC0 is enabled */
6702 vsi->tc_config.numtc = 1;
6703 vsi->tc_config.enabled_tc = 1;
6704 qcount = min_t(int, vsi->alloc_queue_pairs,
6705 i40e_pf_get_max_q_per_tc(vsi->back));
6706 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6707 /* For the TC that is not enabled set the offset to to default
6708 * queue and allocate one queue for the given TC.
6710 vsi->tc_config.tc_info[i].qoffset = 0;
6712 vsi->tc_config.tc_info[i].qcount = qcount;
6714 vsi->tc_config.tc_info[i].qcount = 1;
6715 vsi->tc_config.tc_info[i].netdev_tc = 0;
6720 * i40e_setup_tc - configure multiple traffic classes
6721 * @netdev: net device to configure
6722 * @type_data: tc offload data
6724 static int i40e_setup_tc(struct net_device *netdev, void *type_data)
6726 struct tc_mqprio_qopt_offload *mqprio_qopt = type_data;
6727 struct i40e_netdev_priv *np = netdev_priv(netdev);
6728 struct i40e_vsi *vsi = np->vsi;
6729 struct i40e_pf *pf = vsi->back;
6730 u8 enabled_tc = 0, num_tc, hw;
6731 bool need_reset = false;
6736 num_tc = mqprio_qopt->qopt.num_tc;
6737 hw = mqprio_qopt->qopt.hw;
6738 mode = mqprio_qopt->mode;
6740 pf->flags &= ~I40E_FLAG_TC_MQPRIO;
6741 memcpy(&vsi->mqprio_qopt, mqprio_qopt, sizeof(*mqprio_qopt));
6745 /* Check if MFP enabled */
6746 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
6748 "Configuring TC not supported in MFP mode\n");
6752 case TC_MQPRIO_MODE_DCB:
6753 pf->flags &= ~I40E_FLAG_TC_MQPRIO;
6755 /* Check if DCB enabled to continue */
6756 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
6758 "DCB is not enabled for adapter\n");
6762 /* Check whether tc count is within enabled limit */
6763 if (num_tc > i40e_pf_get_num_tc(pf)) {
6765 "TC count greater than enabled on link for adapter\n");
6769 case TC_MQPRIO_MODE_CHANNEL:
6770 if (pf->flags & I40E_FLAG_DCB_ENABLED) {
6772 "Full offload of TC Mqprio options is not supported when DCB is enabled\n");
6775 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
6777 ret = i40e_validate_mqprio_qopt(vsi, mqprio_qopt);
6780 memcpy(&vsi->mqprio_qopt, mqprio_qopt,
6781 sizeof(*mqprio_qopt));
6782 pf->flags |= I40E_FLAG_TC_MQPRIO;
6783 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
6790 /* Generate TC map for number of tc requested */
6791 for (i = 0; i < num_tc; i++)
6792 enabled_tc |= BIT(i);
6794 /* Requesting same TC configuration as already enabled */
6795 if (enabled_tc == vsi->tc_config.enabled_tc &&
6796 mode != TC_MQPRIO_MODE_CHANNEL)
6799 /* Quiesce VSI queues */
6800 i40e_quiesce_vsi(vsi);
6802 if (!hw && !(pf->flags & I40E_FLAG_TC_MQPRIO))
6803 i40e_remove_queue_channels(vsi);
6805 /* Configure VSI for enabled TCs */
6806 ret = i40e_vsi_config_tc(vsi, enabled_tc);
6808 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
6814 if (pf->flags & I40E_FLAG_TC_MQPRIO) {
6815 if (vsi->mqprio_qopt.max_rate[0]) {
6816 u64 max_tx_rate = vsi->mqprio_qopt.max_rate[0];
6818 do_div(max_tx_rate, I40E_BW_MBPS_DIVISOR);
6819 ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate);
6821 u64 credits = max_tx_rate;
6823 do_div(credits, I40E_BW_CREDIT_DIVISOR);
6824 dev_dbg(&vsi->back->pdev->dev,
6825 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
6834 ret = i40e_configure_queue_channels(vsi);
6837 "Failed configuring queue channels\n");
6844 /* Reset the configuration data to defaults, only TC0 is enabled */
6846 i40e_vsi_set_default_tc_config(vsi);
6851 i40e_unquiesce_vsi(vsi);
6856 * i40e_set_cld_element - sets cloud filter element data
6857 * @filter: cloud filter rule
6858 * @cld: ptr to cloud filter element data
6860 * This is helper function to copy data into cloud filter element
6863 i40e_set_cld_element(struct i40e_cloud_filter *filter,
6864 struct i40e_aqc_cloud_filters_element_data *cld)
6869 memset(cld, 0, sizeof(*cld));
6870 ether_addr_copy(cld->outer_mac, filter->dst_mac);
6871 ether_addr_copy(cld->inner_mac, filter->src_mac);
6873 if (filter->n_proto != ETH_P_IP && filter->n_proto != ETH_P_IPV6)
6876 if (filter->n_proto == ETH_P_IPV6) {
6877 #define IPV6_MAX_INDEX (ARRAY_SIZE(filter->dst_ipv6) - 1)
6878 for (i = 0, j = 0; i < ARRAY_SIZE(filter->dst_ipv6);
6880 ipa = be32_to_cpu(filter->dst_ipv6[IPV6_MAX_INDEX - i]);
6881 ipa = cpu_to_le32(ipa);
6882 memcpy(&cld->ipaddr.raw_v6.data[j], &ipa, sizeof(ipa));
6885 ipa = be32_to_cpu(filter->dst_ipv4);
6886 memcpy(&cld->ipaddr.v4.data, &ipa, sizeof(ipa));
6889 cld->inner_vlan = cpu_to_le16(ntohs(filter->vlan_id));
6891 /* tenant_id is not supported by FW now, once the support is enabled
6892 * fill the cld->tenant_id with cpu_to_le32(filter->tenant_id)
6894 if (filter->tenant_id)
6899 * i40e_add_del_cloud_filter - Add/del cloud filter
6900 * @vsi: pointer to VSI
6901 * @filter: cloud filter rule
6902 * @add: if true, add, if false, delete
6904 * Add or delete a cloud filter for a specific flow spec.
6905 * Returns 0 if the filter were successfully added.
6907 static int i40e_add_del_cloud_filter(struct i40e_vsi *vsi,
6908 struct i40e_cloud_filter *filter, bool add)
6910 struct i40e_aqc_cloud_filters_element_data cld_filter;
6911 struct i40e_pf *pf = vsi->back;
6913 static const u16 flag_table[128] = {
6914 [I40E_CLOUD_FILTER_FLAGS_OMAC] =
6915 I40E_AQC_ADD_CLOUD_FILTER_OMAC,
6916 [I40E_CLOUD_FILTER_FLAGS_IMAC] =
6917 I40E_AQC_ADD_CLOUD_FILTER_IMAC,
6918 [I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN] =
6919 I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN,
6920 [I40E_CLOUD_FILTER_FLAGS_IMAC_TEN_ID] =
6921 I40E_AQC_ADD_CLOUD_FILTER_IMAC_TEN_ID,
6922 [I40E_CLOUD_FILTER_FLAGS_OMAC_TEN_ID_IMAC] =
6923 I40E_AQC_ADD_CLOUD_FILTER_OMAC_TEN_ID_IMAC,
6924 [I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN_TEN_ID] =
6925 I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN_TEN_ID,
6926 [I40E_CLOUD_FILTER_FLAGS_IIP] =
6927 I40E_AQC_ADD_CLOUD_FILTER_IIP,
6930 if (filter->flags >= ARRAY_SIZE(flag_table))
6931 return I40E_ERR_CONFIG;
6933 /* copy element needed to add cloud filter from filter */
6934 i40e_set_cld_element(filter, &cld_filter);
6936 if (filter->tunnel_type != I40E_CLOUD_TNL_TYPE_NONE)
6937 cld_filter.flags = cpu_to_le16(filter->tunnel_type <<
6938 I40E_AQC_ADD_CLOUD_TNL_TYPE_SHIFT);
6940 if (filter->n_proto == ETH_P_IPV6)
6941 cld_filter.flags |= cpu_to_le16(flag_table[filter->flags] |
6942 I40E_AQC_ADD_CLOUD_FLAGS_IPV6);
6944 cld_filter.flags |= cpu_to_le16(flag_table[filter->flags] |
6945 I40E_AQC_ADD_CLOUD_FLAGS_IPV4);
6948 ret = i40e_aq_add_cloud_filters(&pf->hw, filter->seid,
6951 ret = i40e_aq_rem_cloud_filters(&pf->hw, filter->seid,
6954 dev_dbg(&pf->pdev->dev,
6955 "Failed to %s cloud filter using l4 port %u, err %d aq_err %d\n",
6956 add ? "add" : "delete", filter->dst_port, ret,
6957 pf->hw.aq.asq_last_status);
6959 dev_info(&pf->pdev->dev,
6960 "%s cloud filter for VSI: %d\n",
6961 add ? "Added" : "Deleted", filter->seid);
6966 * i40e_add_del_cloud_filter_big_buf - Add/del cloud filter using big_buf
6967 * @vsi: pointer to VSI
6968 * @filter: cloud filter rule
6969 * @add: if true, add, if false, delete
6971 * Add or delete a cloud filter for a specific flow spec using big buffer.
6972 * Returns 0 if the filter were successfully added.
6974 static int i40e_add_del_cloud_filter_big_buf(struct i40e_vsi *vsi,
6975 struct i40e_cloud_filter *filter,
6978 struct i40e_aqc_cloud_filters_element_bb cld_filter;
6979 struct i40e_pf *pf = vsi->back;
6982 /* Both (src/dst) valid mac_addr are not supported */
6983 if ((is_valid_ether_addr(filter->dst_mac) &&
6984 is_valid_ether_addr(filter->src_mac)) ||
6985 (is_multicast_ether_addr(filter->dst_mac) &&
6986 is_multicast_ether_addr(filter->src_mac)))
6989 /* Big buffer cloud filter needs 'L4 port' to be non-zero. Also, UDP
6990 * ports are not supported via big buffer now.
6992 if (!filter->dst_port || filter->ip_proto == IPPROTO_UDP)
6995 /* adding filter using src_port/src_ip is not supported at this stage */
6996 if (filter->src_port || filter->src_ipv4 ||
6997 !ipv6_addr_any(&filter->ip.v6.src_ip6))
7000 /* copy element needed to add cloud filter from filter */
7001 i40e_set_cld_element(filter, &cld_filter.element);
7003 if (is_valid_ether_addr(filter->dst_mac) ||
7004 is_valid_ether_addr(filter->src_mac) ||
7005 is_multicast_ether_addr(filter->dst_mac) ||
7006 is_multicast_ether_addr(filter->src_mac)) {
7007 /* MAC + IP : unsupported mode */
7008 if (filter->dst_ipv4)
7011 /* since we validated that L4 port must be valid before
7012 * we get here, start with respective "flags" value
7013 * and update if vlan is present or not
7015 cld_filter.element.flags =
7016 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_PORT);
7018 if (filter->vlan_id) {
7019 cld_filter.element.flags =
7020 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_VLAN_PORT);
7023 } else if (filter->dst_ipv4 ||
7024 !ipv6_addr_any(&filter->ip.v6.dst_ip6)) {
7025 cld_filter.element.flags =
7026 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_IP_PORT);
7027 if (filter->n_proto == ETH_P_IPV6)
7028 cld_filter.element.flags |=
7029 cpu_to_le16(I40E_AQC_ADD_CLOUD_FLAGS_IPV6);
7031 cld_filter.element.flags |=
7032 cpu_to_le16(I40E_AQC_ADD_CLOUD_FLAGS_IPV4);
7034 dev_err(&pf->pdev->dev,
7035 "either mac or ip has to be valid for cloud filter\n");
7039 /* Now copy L4 port in Byte 6..7 in general fields */
7040 cld_filter.general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X16_WORD0] =
7041 be16_to_cpu(filter->dst_port);
7044 /* Validate current device switch mode, change if necessary */
7045 ret = i40e_validate_and_set_switch_mode(vsi);
7047 dev_err(&pf->pdev->dev,
7048 "failed to set switch mode, ret %d\n",
7053 ret = i40e_aq_add_cloud_filters_bb(&pf->hw, filter->seid,
7056 ret = i40e_aq_rem_cloud_filters_bb(&pf->hw, filter->seid,
7061 dev_dbg(&pf->pdev->dev,
7062 "Failed to %s cloud filter(big buffer) err %d aq_err %d\n",
7063 add ? "add" : "delete", ret, pf->hw.aq.asq_last_status);
7065 dev_info(&pf->pdev->dev,
7066 "%s cloud filter for VSI: %d, L4 port: %d\n",
7067 add ? "add" : "delete", filter->seid,
7068 ntohs(filter->dst_port));
7073 * i40e_parse_cls_flower - Parse tc flower filters provided by kernel
7074 * @vsi: Pointer to VSI
7075 * @cls_flower: Pointer to struct tc_cls_flower_offload
7076 * @filter: Pointer to cloud filter structure
7079 static int i40e_parse_cls_flower(struct i40e_vsi *vsi,
7080 struct tc_cls_flower_offload *f,
7081 struct i40e_cloud_filter *filter)
7083 u16 n_proto_mask = 0, n_proto_key = 0, addr_type = 0;
7084 struct i40e_pf *pf = vsi->back;
7087 if (f->dissector->used_keys &
7088 ~(BIT(FLOW_DISSECTOR_KEY_CONTROL) |
7089 BIT(FLOW_DISSECTOR_KEY_BASIC) |
7090 BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
7091 BIT(FLOW_DISSECTOR_KEY_VLAN) |
7092 BIT(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
7093 BIT(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
7094 BIT(FLOW_DISSECTOR_KEY_PORTS) |
7095 BIT(FLOW_DISSECTOR_KEY_ENC_KEYID))) {
7096 dev_err(&pf->pdev->dev, "Unsupported key used: 0x%x\n",
7097 f->dissector->used_keys);
7101 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID)) {
7102 struct flow_dissector_key_keyid *key =
7103 skb_flow_dissector_target(f->dissector,
7104 FLOW_DISSECTOR_KEY_ENC_KEYID,
7107 struct flow_dissector_key_keyid *mask =
7108 skb_flow_dissector_target(f->dissector,
7109 FLOW_DISSECTOR_KEY_ENC_KEYID,
7112 if (mask->keyid != 0)
7113 field_flags |= I40E_CLOUD_FIELD_TEN_ID;
7115 filter->tenant_id = be32_to_cpu(key->keyid);
7118 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_BASIC)) {
7119 struct flow_dissector_key_basic *key =
7120 skb_flow_dissector_target(f->dissector,
7121 FLOW_DISSECTOR_KEY_BASIC,
7124 struct flow_dissector_key_basic *mask =
7125 skb_flow_dissector_target(f->dissector,
7126 FLOW_DISSECTOR_KEY_BASIC,
7129 n_proto_key = ntohs(key->n_proto);
7130 n_proto_mask = ntohs(mask->n_proto);
7132 if (n_proto_key == ETH_P_ALL) {
7136 filter->n_proto = n_proto_key & n_proto_mask;
7137 filter->ip_proto = key->ip_proto;
7140 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
7141 struct flow_dissector_key_eth_addrs *key =
7142 skb_flow_dissector_target(f->dissector,
7143 FLOW_DISSECTOR_KEY_ETH_ADDRS,
7146 struct flow_dissector_key_eth_addrs *mask =
7147 skb_flow_dissector_target(f->dissector,
7148 FLOW_DISSECTOR_KEY_ETH_ADDRS,
7151 /* use is_broadcast and is_zero to check for all 0xf or 0 */
7152 if (!is_zero_ether_addr(mask->dst)) {
7153 if (is_broadcast_ether_addr(mask->dst)) {
7154 field_flags |= I40E_CLOUD_FIELD_OMAC;
7156 dev_err(&pf->pdev->dev, "Bad ether dest mask %pM\n",
7158 return I40E_ERR_CONFIG;
7162 if (!is_zero_ether_addr(mask->src)) {
7163 if (is_broadcast_ether_addr(mask->src)) {
7164 field_flags |= I40E_CLOUD_FIELD_IMAC;
7166 dev_err(&pf->pdev->dev, "Bad ether src mask %pM\n",
7168 return I40E_ERR_CONFIG;
7171 ether_addr_copy(filter->dst_mac, key->dst);
7172 ether_addr_copy(filter->src_mac, key->src);
7175 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_VLAN)) {
7176 struct flow_dissector_key_vlan *key =
7177 skb_flow_dissector_target(f->dissector,
7178 FLOW_DISSECTOR_KEY_VLAN,
7180 struct flow_dissector_key_vlan *mask =
7181 skb_flow_dissector_target(f->dissector,
7182 FLOW_DISSECTOR_KEY_VLAN,
7185 if (mask->vlan_id) {
7186 if (mask->vlan_id == VLAN_VID_MASK) {
7187 field_flags |= I40E_CLOUD_FIELD_IVLAN;
7190 dev_err(&pf->pdev->dev, "Bad vlan mask 0x%04x\n",
7192 return I40E_ERR_CONFIG;
7196 filter->vlan_id = cpu_to_be16(key->vlan_id);
7199 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_CONTROL)) {
7200 struct flow_dissector_key_control *key =
7201 skb_flow_dissector_target(f->dissector,
7202 FLOW_DISSECTOR_KEY_CONTROL,
7205 addr_type = key->addr_type;
7208 if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
7209 struct flow_dissector_key_ipv4_addrs *key =
7210 skb_flow_dissector_target(f->dissector,
7211 FLOW_DISSECTOR_KEY_IPV4_ADDRS,
7213 struct flow_dissector_key_ipv4_addrs *mask =
7214 skb_flow_dissector_target(f->dissector,
7215 FLOW_DISSECTOR_KEY_IPV4_ADDRS,
7219 if (mask->dst == cpu_to_be32(0xffffffff)) {
7220 field_flags |= I40E_CLOUD_FIELD_IIP;
7222 mask->dst = be32_to_cpu(mask->dst);
7223 dev_err(&pf->pdev->dev, "Bad ip dst mask %pI4\n",
7225 return I40E_ERR_CONFIG;
7230 if (mask->src == cpu_to_be32(0xffffffff)) {
7231 field_flags |= I40E_CLOUD_FIELD_IIP;
7233 mask->src = be32_to_cpu(mask->src);
7234 dev_err(&pf->pdev->dev, "Bad ip src mask %pI4\n",
7236 return I40E_ERR_CONFIG;
7240 if (field_flags & I40E_CLOUD_FIELD_TEN_ID) {
7241 dev_err(&pf->pdev->dev, "Tenant id not allowed for ip filter\n");
7242 return I40E_ERR_CONFIG;
7244 filter->dst_ipv4 = key->dst;
7245 filter->src_ipv4 = key->src;
7248 if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
7249 struct flow_dissector_key_ipv6_addrs *key =
7250 skb_flow_dissector_target(f->dissector,
7251 FLOW_DISSECTOR_KEY_IPV6_ADDRS,
7253 struct flow_dissector_key_ipv6_addrs *mask =
7254 skb_flow_dissector_target(f->dissector,
7255 FLOW_DISSECTOR_KEY_IPV6_ADDRS,
7258 /* src and dest IPV6 address should not be LOOPBACK
7259 * (0:0:0:0:0:0:0:1), which can be represented as ::1
7261 if (ipv6_addr_loopback(&key->dst) ||
7262 ipv6_addr_loopback(&key->src)) {
7263 dev_err(&pf->pdev->dev,
7264 "Bad ipv6, addr is LOOPBACK\n");
7265 return I40E_ERR_CONFIG;
7267 if (!ipv6_addr_any(&mask->dst) || !ipv6_addr_any(&mask->src))
7268 field_flags |= I40E_CLOUD_FIELD_IIP;
7270 memcpy(&filter->src_ipv6, &key->src.s6_addr32,
7271 sizeof(filter->src_ipv6));
7272 memcpy(&filter->dst_ipv6, &key->dst.s6_addr32,
7273 sizeof(filter->dst_ipv6));
7276 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_PORTS)) {
7277 struct flow_dissector_key_ports *key =
7278 skb_flow_dissector_target(f->dissector,
7279 FLOW_DISSECTOR_KEY_PORTS,
7281 struct flow_dissector_key_ports *mask =
7282 skb_flow_dissector_target(f->dissector,
7283 FLOW_DISSECTOR_KEY_PORTS,
7287 if (mask->src == cpu_to_be16(0xffff)) {
7288 field_flags |= I40E_CLOUD_FIELD_IIP;
7290 dev_err(&pf->pdev->dev, "Bad src port mask 0x%04x\n",
7291 be16_to_cpu(mask->src));
7292 return I40E_ERR_CONFIG;
7297 if (mask->dst == cpu_to_be16(0xffff)) {
7298 field_flags |= I40E_CLOUD_FIELD_IIP;
7300 dev_err(&pf->pdev->dev, "Bad dst port mask 0x%04x\n",
7301 be16_to_cpu(mask->dst));
7302 return I40E_ERR_CONFIG;
7306 filter->dst_port = key->dst;
7307 filter->src_port = key->src;
7309 switch (filter->ip_proto) {
7314 dev_err(&pf->pdev->dev,
7315 "Only UDP and TCP transport are supported\n");
7319 filter->flags = field_flags;
7324 * i40e_handle_tclass: Forward to a traffic class on the device
7325 * @vsi: Pointer to VSI
7326 * @tc: traffic class index on the device
7327 * @filter: Pointer to cloud filter structure
7330 static int i40e_handle_tclass(struct i40e_vsi *vsi, u32 tc,
7331 struct i40e_cloud_filter *filter)
7333 struct i40e_channel *ch, *ch_tmp;
7335 /* direct to a traffic class on the same device */
7337 filter->seid = vsi->seid;
7339 } else if (vsi->tc_config.enabled_tc & BIT(tc)) {
7340 if (!filter->dst_port) {
7341 dev_err(&vsi->back->pdev->dev,
7342 "Specify destination port to direct to traffic class that is not default\n");
7345 if (list_empty(&vsi->ch_list))
7347 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list,
7349 if (ch->seid == vsi->tc_seid_map[tc])
7350 filter->seid = ch->seid;
7354 dev_err(&vsi->back->pdev->dev, "TC is not enabled\n");
7359 * i40e_configure_clsflower - Configure tc flower filters
7360 * @vsi: Pointer to VSI
7361 * @cls_flower: Pointer to struct tc_cls_flower_offload
7364 static int i40e_configure_clsflower(struct i40e_vsi *vsi,
7365 struct tc_cls_flower_offload *cls_flower)
7367 int tc = tc_classid_to_hwtc(vsi->netdev, cls_flower->classid);
7368 struct i40e_cloud_filter *filter = NULL;
7369 struct i40e_pf *pf = vsi->back;
7373 dev_err(&vsi->back->pdev->dev, "Invalid traffic class\n");
7377 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
7378 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
7381 if (pf->fdir_pf_active_filters ||
7382 (!hlist_empty(&pf->fdir_filter_list))) {
7383 dev_err(&vsi->back->pdev->dev,
7384 "Flow Director Sideband filters exists, turn ntuple off to configure cloud filters\n");
7388 if (vsi->back->flags & I40E_FLAG_FD_SB_ENABLED) {
7389 dev_err(&vsi->back->pdev->dev,
7390 "Disable Flow Director Sideband, configuring Cloud filters via tc-flower\n");
7391 vsi->back->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7392 vsi->back->flags |= I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
7395 filter = kzalloc(sizeof(*filter), GFP_KERNEL);
7399 filter->cookie = cls_flower->cookie;
7401 err = i40e_parse_cls_flower(vsi, cls_flower, filter);
7405 err = i40e_handle_tclass(vsi, tc, filter);
7409 /* Add cloud filter */
7410 if (filter->dst_port)
7411 err = i40e_add_del_cloud_filter_big_buf(vsi, filter, true);
7413 err = i40e_add_del_cloud_filter(vsi, filter, true);
7416 dev_err(&pf->pdev->dev,
7417 "Failed to add cloud filter, err %s\n",
7418 i40e_stat_str(&pf->hw, err));
7422 /* add filter to the ordered list */
7423 INIT_HLIST_NODE(&filter->cloud_node);
7425 hlist_add_head(&filter->cloud_node, &pf->cloud_filter_list);
7427 pf->num_cloud_filters++;
7436 * i40e_find_cloud_filter - Find the could filter in the list
7437 * @vsi: Pointer to VSI
7438 * @cookie: filter specific cookie
7441 static struct i40e_cloud_filter *i40e_find_cloud_filter(struct i40e_vsi *vsi,
7442 unsigned long *cookie)
7444 struct i40e_cloud_filter *filter = NULL;
7445 struct hlist_node *node2;
7447 hlist_for_each_entry_safe(filter, node2,
7448 &vsi->back->cloud_filter_list, cloud_node)
7449 if (!memcmp(cookie, &filter->cookie, sizeof(filter->cookie)))
7455 * i40e_delete_clsflower - Remove tc flower filters
7456 * @vsi: Pointer to VSI
7457 * @cls_flower: Pointer to struct tc_cls_flower_offload
7460 static int i40e_delete_clsflower(struct i40e_vsi *vsi,
7461 struct tc_cls_flower_offload *cls_flower)
7463 struct i40e_cloud_filter *filter = NULL;
7464 struct i40e_pf *pf = vsi->back;
7467 filter = i40e_find_cloud_filter(vsi, &cls_flower->cookie);
7472 hash_del(&filter->cloud_node);
7474 if (filter->dst_port)
7475 err = i40e_add_del_cloud_filter_big_buf(vsi, filter, false);
7477 err = i40e_add_del_cloud_filter(vsi, filter, false);
7481 dev_err(&pf->pdev->dev,
7482 "Failed to delete cloud filter, err %s\n",
7483 i40e_stat_str(&pf->hw, err));
7484 return i40e_aq_rc_to_posix(err, pf->hw.aq.asq_last_status);
7487 pf->num_cloud_filters--;
7488 if (!pf->num_cloud_filters)
7489 if ((pf->flags & I40E_FLAG_FD_SB_TO_CLOUD_FILTER) &&
7490 !(pf->flags & I40E_FLAG_FD_SB_INACTIVE)) {
7491 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7492 pf->flags &= ~I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
7493 pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
7499 * i40e_setup_tc_cls_flower - flower classifier offloads
7500 * @netdev: net device to configure
7501 * @type_data: offload data
7503 static int i40e_setup_tc_cls_flower(struct i40e_netdev_priv *np,
7504 struct tc_cls_flower_offload *cls_flower)
7506 struct i40e_vsi *vsi = np->vsi;
7508 if (cls_flower->common.chain_index)
7511 switch (cls_flower->command) {
7512 case TC_CLSFLOWER_REPLACE:
7513 return i40e_configure_clsflower(vsi, cls_flower);
7514 case TC_CLSFLOWER_DESTROY:
7515 return i40e_delete_clsflower(vsi, cls_flower);
7516 case TC_CLSFLOWER_STATS:
7523 static int i40e_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
7526 struct i40e_netdev_priv *np = cb_priv;
7529 case TC_SETUP_CLSFLOWER:
7530 return i40e_setup_tc_cls_flower(np, type_data);
7537 static int i40e_setup_tc_block(struct net_device *dev,
7538 struct tc_block_offload *f)
7540 struct i40e_netdev_priv *np = netdev_priv(dev);
7542 if (f->binder_type != TCF_BLOCK_BINDER_TYPE_CLSACT_INGRESS)
7545 switch (f->command) {
7547 return tcf_block_cb_register(f->block, i40e_setup_tc_block_cb,
7549 case TC_BLOCK_UNBIND:
7550 tcf_block_cb_unregister(f->block, i40e_setup_tc_block_cb, np);
7557 static int __i40e_setup_tc(struct net_device *netdev, enum tc_setup_type type,
7561 case TC_SETUP_QDISC_MQPRIO:
7562 return i40e_setup_tc(netdev, type_data);
7563 case TC_SETUP_BLOCK:
7564 return i40e_setup_tc_block(netdev, type_data);
7571 * i40e_open - Called when a network interface is made active
7572 * @netdev: network interface device structure
7574 * The open entry point is called when a network interface is made
7575 * active by the system (IFF_UP). At this point all resources needed
7576 * for transmit and receive operations are allocated, the interrupt
7577 * handler is registered with the OS, the netdev watchdog subtask is
7578 * enabled, and the stack is notified that the interface is ready.
7580 * Returns 0 on success, negative value on failure
7582 int i40e_open(struct net_device *netdev)
7584 struct i40e_netdev_priv *np = netdev_priv(netdev);
7585 struct i40e_vsi *vsi = np->vsi;
7586 struct i40e_pf *pf = vsi->back;
7589 /* disallow open during test or if eeprom is broken */
7590 if (test_bit(__I40E_TESTING, pf->state) ||
7591 test_bit(__I40E_BAD_EEPROM, pf->state))
7594 netif_carrier_off(netdev);
7596 err = i40e_vsi_open(vsi);
7600 /* configure global TSO hardware offload settings */
7601 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
7602 TCP_FLAG_FIN) >> 16);
7603 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
7605 TCP_FLAG_CWR) >> 16);
7606 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
7608 udp_tunnel_get_rx_info(netdev);
7615 * @vsi: the VSI to open
7617 * Finish initialization of the VSI.
7619 * Returns 0 on success, negative value on failure
7621 * Note: expects to be called while under rtnl_lock()
7623 int i40e_vsi_open(struct i40e_vsi *vsi)
7625 struct i40e_pf *pf = vsi->back;
7626 char int_name[I40E_INT_NAME_STR_LEN];
7629 /* allocate descriptors */
7630 err = i40e_vsi_setup_tx_resources(vsi);
7633 err = i40e_vsi_setup_rx_resources(vsi);
7637 err = i40e_vsi_configure(vsi);
7642 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
7643 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
7644 err = i40e_vsi_request_irq(vsi, int_name);
7648 /* Notify the stack of the actual queue counts. */
7649 err = netif_set_real_num_tx_queues(vsi->netdev,
7650 vsi->num_queue_pairs);
7652 goto err_set_queues;
7654 err = netif_set_real_num_rx_queues(vsi->netdev,
7655 vsi->num_queue_pairs);
7657 goto err_set_queues;
7659 } else if (vsi->type == I40E_VSI_FDIR) {
7660 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
7661 dev_driver_string(&pf->pdev->dev),
7662 dev_name(&pf->pdev->dev));
7663 err = i40e_vsi_request_irq(vsi, int_name);
7670 err = i40e_up_complete(vsi);
7672 goto err_up_complete;
7679 i40e_vsi_free_irq(vsi);
7681 i40e_vsi_free_rx_resources(vsi);
7683 i40e_vsi_free_tx_resources(vsi);
7684 if (vsi == pf->vsi[pf->lan_vsi])
7685 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
7691 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
7692 * @pf: Pointer to PF
7694 * This function destroys the hlist where all the Flow Director
7695 * filters were saved.
7697 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
7699 struct i40e_fdir_filter *filter;
7700 struct i40e_flex_pit *pit_entry, *tmp;
7701 struct hlist_node *node2;
7703 hlist_for_each_entry_safe(filter, node2,
7704 &pf->fdir_filter_list, fdir_node) {
7705 hlist_del(&filter->fdir_node);
7709 list_for_each_entry_safe(pit_entry, tmp, &pf->l3_flex_pit_list, list) {
7710 list_del(&pit_entry->list);
7713 INIT_LIST_HEAD(&pf->l3_flex_pit_list);
7715 list_for_each_entry_safe(pit_entry, tmp, &pf->l4_flex_pit_list, list) {
7716 list_del(&pit_entry->list);
7719 INIT_LIST_HEAD(&pf->l4_flex_pit_list);
7721 pf->fdir_pf_active_filters = 0;
7722 pf->fd_tcp4_filter_cnt = 0;
7723 pf->fd_udp4_filter_cnt = 0;
7724 pf->fd_sctp4_filter_cnt = 0;
7725 pf->fd_ip4_filter_cnt = 0;
7727 /* Reprogram the default input set for TCP/IPv4 */
7728 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP,
7729 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
7730 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
7732 /* Reprogram the default input set for UDP/IPv4 */
7733 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_UDP,
7734 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
7735 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
7737 /* Reprogram the default input set for SCTP/IPv4 */
7738 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_SCTP,
7739 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
7740 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
7742 /* Reprogram the default input set for Other/IPv4 */
7743 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_OTHER,
7744 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
7748 * i40e_cloud_filter_exit - Cleans up the cloud filters
7749 * @pf: Pointer to PF
7751 * This function destroys the hlist where all the cloud filters
7754 static void i40e_cloud_filter_exit(struct i40e_pf *pf)
7756 struct i40e_cloud_filter *cfilter;
7757 struct hlist_node *node;
7759 hlist_for_each_entry_safe(cfilter, node,
7760 &pf->cloud_filter_list, cloud_node) {
7761 hlist_del(&cfilter->cloud_node);
7764 pf->num_cloud_filters = 0;
7766 if ((pf->flags & I40E_FLAG_FD_SB_TO_CLOUD_FILTER) &&
7767 !(pf->flags & I40E_FLAG_FD_SB_INACTIVE)) {
7768 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7769 pf->flags &= ~I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
7770 pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
7775 * i40e_close - Disables a network interface
7776 * @netdev: network interface device structure
7778 * The close entry point is called when an interface is de-activated
7779 * by the OS. The hardware is still under the driver's control, but
7780 * this netdev interface is disabled.
7782 * Returns 0, this is not allowed to fail
7784 int i40e_close(struct net_device *netdev)
7786 struct i40e_netdev_priv *np = netdev_priv(netdev);
7787 struct i40e_vsi *vsi = np->vsi;
7789 i40e_vsi_close(vsi);
7795 * i40e_do_reset - Start a PF or Core Reset sequence
7796 * @pf: board private structure
7797 * @reset_flags: which reset is requested
7798 * @lock_acquired: indicates whether or not the lock has been acquired
7799 * before this function was called.
7801 * The essential difference in resets is that the PF Reset
7802 * doesn't clear the packet buffers, doesn't reset the PE
7803 * firmware, and doesn't bother the other PFs on the chip.
7805 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags, bool lock_acquired)
7809 WARN_ON(in_interrupt());
7812 /* do the biggest reset indicated */
7813 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
7815 /* Request a Global Reset
7817 * This will start the chip's countdown to the actual full
7818 * chip reset event, and a warning interrupt to be sent
7819 * to all PFs, including the requestor. Our handler
7820 * for the warning interrupt will deal with the shutdown
7821 * and recovery of the switch setup.
7823 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
7824 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
7825 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
7826 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
7828 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
7830 /* Request a Core Reset
7832 * Same as Global Reset, except does *not* include the MAC/PHY
7834 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
7835 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
7836 val |= I40E_GLGEN_RTRIG_CORER_MASK;
7837 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
7838 i40e_flush(&pf->hw);
7840 } else if (reset_flags & I40E_PF_RESET_FLAG) {
7842 /* Request a PF Reset
7844 * Resets only the PF-specific registers
7846 * This goes directly to the tear-down and rebuild of
7847 * the switch, since we need to do all the recovery as
7848 * for the Core Reset.
7850 dev_dbg(&pf->pdev->dev, "PFR requested\n");
7851 i40e_handle_reset_warning(pf, lock_acquired);
7853 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
7856 /* Find the VSI(s) that requested a re-init */
7857 dev_info(&pf->pdev->dev,
7858 "VSI reinit requested\n");
7859 for (v = 0; v < pf->num_alloc_vsi; v++) {
7860 struct i40e_vsi *vsi = pf->vsi[v];
7863 test_and_clear_bit(__I40E_VSI_REINIT_REQUESTED,
7865 i40e_vsi_reinit_locked(pf->vsi[v]);
7867 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
7870 /* Find the VSI(s) that needs to be brought down */
7871 dev_info(&pf->pdev->dev, "VSI down requested\n");
7872 for (v = 0; v < pf->num_alloc_vsi; v++) {
7873 struct i40e_vsi *vsi = pf->vsi[v];
7876 test_and_clear_bit(__I40E_VSI_DOWN_REQUESTED,
7878 set_bit(__I40E_VSI_DOWN, vsi->state);
7883 dev_info(&pf->pdev->dev,
7884 "bad reset request 0x%08x\n", reset_flags);
7888 #ifdef CONFIG_I40E_DCB
7890 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
7891 * @pf: board private structure
7892 * @old_cfg: current DCB config
7893 * @new_cfg: new DCB config
7895 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
7896 struct i40e_dcbx_config *old_cfg,
7897 struct i40e_dcbx_config *new_cfg)
7899 bool need_reconfig = false;
7901 /* Check if ETS configuration has changed */
7902 if (memcmp(&new_cfg->etscfg,
7904 sizeof(new_cfg->etscfg))) {
7905 /* If Priority Table has changed reconfig is needed */
7906 if (memcmp(&new_cfg->etscfg.prioritytable,
7907 &old_cfg->etscfg.prioritytable,
7908 sizeof(new_cfg->etscfg.prioritytable))) {
7909 need_reconfig = true;
7910 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
7913 if (memcmp(&new_cfg->etscfg.tcbwtable,
7914 &old_cfg->etscfg.tcbwtable,
7915 sizeof(new_cfg->etscfg.tcbwtable)))
7916 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
7918 if (memcmp(&new_cfg->etscfg.tsatable,
7919 &old_cfg->etscfg.tsatable,
7920 sizeof(new_cfg->etscfg.tsatable)))
7921 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
7924 /* Check if PFC configuration has changed */
7925 if (memcmp(&new_cfg->pfc,
7927 sizeof(new_cfg->pfc))) {
7928 need_reconfig = true;
7929 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
7932 /* Check if APP Table has changed */
7933 if (memcmp(&new_cfg->app,
7935 sizeof(new_cfg->app))) {
7936 need_reconfig = true;
7937 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
7940 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
7941 return need_reconfig;
7945 * i40e_handle_lldp_event - Handle LLDP Change MIB event
7946 * @pf: board private structure
7947 * @e: event info posted on ARQ
7949 static int i40e_handle_lldp_event(struct i40e_pf *pf,
7950 struct i40e_arq_event_info *e)
7952 struct i40e_aqc_lldp_get_mib *mib =
7953 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
7954 struct i40e_hw *hw = &pf->hw;
7955 struct i40e_dcbx_config tmp_dcbx_cfg;
7956 bool need_reconfig = false;
7960 /* Not DCB capable or capability disabled */
7961 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
7964 /* Ignore if event is not for Nearest Bridge */
7965 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
7966 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
7967 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
7968 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
7971 /* Check MIB Type and return if event for Remote MIB update */
7972 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
7973 dev_dbg(&pf->pdev->dev,
7974 "LLDP event mib type %s\n", type ? "remote" : "local");
7975 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
7976 /* Update the remote cached instance and return */
7977 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
7978 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
7979 &hw->remote_dcbx_config);
7983 /* Store the old configuration */
7984 tmp_dcbx_cfg = hw->local_dcbx_config;
7986 /* Reset the old DCBx configuration data */
7987 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
7988 /* Get updated DCBX data from firmware */
7989 ret = i40e_get_dcb_config(&pf->hw);
7991 dev_info(&pf->pdev->dev,
7992 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
7993 i40e_stat_str(&pf->hw, ret),
7994 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7998 /* No change detected in DCBX configs */
7999 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
8000 sizeof(tmp_dcbx_cfg))) {
8001 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
8005 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
8006 &hw->local_dcbx_config);
8008 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
8013 /* Enable DCB tagging only when more than one TC */
8014 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
8015 pf->flags |= I40E_FLAG_DCB_ENABLED;
8017 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
8019 set_bit(__I40E_PORT_SUSPENDED, pf->state);
8020 /* Reconfiguration needed quiesce all VSIs */
8021 i40e_pf_quiesce_all_vsi(pf);
8023 /* Changes in configuration update VEB/VSI */
8024 i40e_dcb_reconfigure(pf);
8026 ret = i40e_resume_port_tx(pf);
8028 clear_bit(__I40E_PORT_SUSPENDED, pf->state);
8029 /* In case of error no point in resuming VSIs */
8033 /* Wait for the PF's queues to be disabled */
8034 ret = i40e_pf_wait_queues_disabled(pf);
8036 /* Schedule PF reset to recover */
8037 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
8038 i40e_service_event_schedule(pf);
8040 i40e_pf_unquiesce_all_vsi(pf);
8041 pf->flags |= (I40E_FLAG_SERVICE_CLIENT_REQUESTED |
8042 I40E_FLAG_CLIENT_L2_CHANGE);
8048 #endif /* CONFIG_I40E_DCB */
8051 * i40e_do_reset_safe - Protected reset path for userland calls.
8052 * @pf: board private structure
8053 * @reset_flags: which reset is requested
8056 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
8059 i40e_do_reset(pf, reset_flags, true);
8064 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
8065 * @pf: board private structure
8066 * @e: event info posted on ARQ
8068 * Handler for LAN Queue Overflow Event generated by the firmware for PF
8071 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
8072 struct i40e_arq_event_info *e)
8074 struct i40e_aqc_lan_overflow *data =
8075 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
8076 u32 queue = le32_to_cpu(data->prtdcb_rupto);
8077 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
8078 struct i40e_hw *hw = &pf->hw;
8082 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
8085 /* Queue belongs to VF, find the VF and issue VF reset */
8086 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
8087 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
8088 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
8089 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
8090 vf_id -= hw->func_caps.vf_base_id;
8091 vf = &pf->vf[vf_id];
8092 i40e_vc_notify_vf_reset(vf);
8093 /* Allow VF to process pending reset notification */
8095 i40e_reset_vf(vf, false);
8100 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
8101 * @pf: board private structure
8103 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
8107 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
8108 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
8113 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
8114 * @pf: board private structure
8116 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
8120 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
8121 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
8122 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
8123 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
8128 * i40e_get_global_fd_count - Get total FD filters programmed on device
8129 * @pf: board private structure
8131 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
8135 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
8136 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
8137 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
8138 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
8143 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
8144 * @pf: board private structure
8146 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
8148 struct i40e_fdir_filter *filter;
8149 u32 fcnt_prog, fcnt_avail;
8150 struct hlist_node *node;
8152 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
8155 /* Check if we have enough room to re-enable FDir SB capability. */
8156 fcnt_prog = i40e_get_global_fd_count(pf);
8157 fcnt_avail = pf->fdir_pf_filter_count;
8158 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
8159 (pf->fd_add_err == 0) ||
8160 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
8161 if (pf->flags & I40E_FLAG_FD_SB_AUTO_DISABLED) {
8162 pf->flags &= ~I40E_FLAG_FD_SB_AUTO_DISABLED;
8163 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
8164 (I40E_DEBUG_FD & pf->hw.debug_mask))
8165 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
8169 /* We should wait for even more space before re-enabling ATR.
8170 * Additionally, we cannot enable ATR as long as we still have TCP SB
8173 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) &&
8174 (pf->fd_tcp4_filter_cnt == 0)) {
8175 if (pf->flags & I40E_FLAG_FD_ATR_AUTO_DISABLED) {
8176 pf->flags &= ~I40E_FLAG_FD_ATR_AUTO_DISABLED;
8177 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8178 (I40E_DEBUG_FD & pf->hw.debug_mask))
8179 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table and there are no conflicting ntuple rules\n");
8183 /* if hw had a problem adding a filter, delete it */
8184 if (pf->fd_inv > 0) {
8185 hlist_for_each_entry_safe(filter, node,
8186 &pf->fdir_filter_list, fdir_node) {
8187 if (filter->fd_id == pf->fd_inv) {
8188 hlist_del(&filter->fdir_node);
8190 pf->fdir_pf_active_filters--;
8197 #define I40E_MIN_FD_FLUSH_INTERVAL 10
8198 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
8200 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
8201 * @pf: board private structure
8203 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
8205 unsigned long min_flush_time;
8206 int flush_wait_retry = 50;
8207 bool disable_atr = false;
8211 if (!time_after(jiffies, pf->fd_flush_timestamp +
8212 (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
8215 /* If the flush is happening too quick and we have mostly SB rules we
8216 * should not re-enable ATR for some time.
8218 min_flush_time = pf->fd_flush_timestamp +
8219 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
8220 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
8222 if (!(time_after(jiffies, min_flush_time)) &&
8223 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
8224 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8225 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
8229 pf->fd_flush_timestamp = jiffies;
8230 pf->flags |= I40E_FLAG_FD_ATR_AUTO_DISABLED;
8231 /* flush all filters */
8232 wr32(&pf->hw, I40E_PFQF_CTL_1,
8233 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
8234 i40e_flush(&pf->hw);
8238 /* Check FD flush status every 5-6msec */
8239 usleep_range(5000, 6000);
8240 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
8241 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
8243 } while (flush_wait_retry--);
8244 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
8245 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
8247 /* replay sideband filters */
8248 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
8249 if (!disable_atr && !pf->fd_tcp4_filter_cnt)
8250 pf->flags &= ~I40E_FLAG_FD_ATR_AUTO_DISABLED;
8251 clear_bit(__I40E_FD_FLUSH_REQUESTED, pf->state);
8252 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8253 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
8258 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
8259 * @pf: board private structure
8261 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
8263 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
8266 /* We can see up to 256 filter programming desc in transit if the filters are
8267 * being applied really fast; before we see the first
8268 * filter miss error on Rx queue 0. Accumulating enough error messages before
8269 * reacting will make sure we don't cause flush too often.
8271 #define I40E_MAX_FD_PROGRAM_ERROR 256
8274 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
8275 * @pf: board private structure
8277 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
8280 /* if interface is down do nothing */
8281 if (test_bit(__I40E_DOWN, pf->state))
8284 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
8285 i40e_fdir_flush_and_replay(pf);
8287 i40e_fdir_check_and_reenable(pf);
8292 * i40e_vsi_link_event - notify VSI of a link event
8293 * @vsi: vsi to be notified
8294 * @link_up: link up or down
8296 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
8298 if (!vsi || test_bit(__I40E_VSI_DOWN, vsi->state))
8301 switch (vsi->type) {
8303 if (!vsi->netdev || !vsi->netdev_registered)
8307 netif_carrier_on(vsi->netdev);
8308 netif_tx_wake_all_queues(vsi->netdev);
8310 netif_carrier_off(vsi->netdev);
8311 netif_tx_stop_all_queues(vsi->netdev);
8315 case I40E_VSI_SRIOV:
8316 case I40E_VSI_VMDQ2:
8318 case I40E_VSI_IWARP:
8319 case I40E_VSI_MIRROR:
8321 /* there is no notification for other VSIs */
8327 * i40e_veb_link_event - notify elements on the veb of a link event
8328 * @veb: veb to be notified
8329 * @link_up: link up or down
8331 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
8336 if (!veb || !veb->pf)
8340 /* depth first... */
8341 for (i = 0; i < I40E_MAX_VEB; i++)
8342 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
8343 i40e_veb_link_event(pf->veb[i], link_up);
8345 /* ... now the local VSIs */
8346 for (i = 0; i < pf->num_alloc_vsi; i++)
8347 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
8348 i40e_vsi_link_event(pf->vsi[i], link_up);
8352 * i40e_link_event - Update netif_carrier status
8353 * @pf: board private structure
8355 static void i40e_link_event(struct i40e_pf *pf)
8357 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8358 u8 new_link_speed, old_link_speed;
8360 bool new_link, old_link;
8362 /* save off old link status information */
8363 pf->hw.phy.link_info_old = pf->hw.phy.link_info;
8365 /* set this to force the get_link_status call to refresh state */
8366 pf->hw.phy.get_link_info = true;
8368 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
8370 status = i40e_get_link_status(&pf->hw, &new_link);
8372 /* On success, disable temp link polling */
8373 if (status == I40E_SUCCESS) {
8374 if (pf->flags & I40E_FLAG_TEMP_LINK_POLLING)
8375 pf->flags &= ~I40E_FLAG_TEMP_LINK_POLLING;
8377 /* Enable link polling temporarily until i40e_get_link_status
8378 * returns I40E_SUCCESS
8380 pf->flags |= I40E_FLAG_TEMP_LINK_POLLING;
8381 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
8386 old_link_speed = pf->hw.phy.link_info_old.link_speed;
8387 new_link_speed = pf->hw.phy.link_info.link_speed;
8389 if (new_link == old_link &&
8390 new_link_speed == old_link_speed &&
8391 (test_bit(__I40E_VSI_DOWN, vsi->state) ||
8392 new_link == netif_carrier_ok(vsi->netdev)))
8395 i40e_print_link_message(vsi, new_link);
8397 /* Notify the base of the switch tree connected to
8398 * the link. Floating VEBs are not notified.
8400 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
8401 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
8403 i40e_vsi_link_event(vsi, new_link);
8406 i40e_vc_notify_link_state(pf);
8408 if (pf->flags & I40E_FLAG_PTP)
8409 i40e_ptp_set_increment(pf);
8413 * i40e_watchdog_subtask - periodic checks not using event driven response
8414 * @pf: board private structure
8416 static void i40e_watchdog_subtask(struct i40e_pf *pf)
8420 /* if interface is down do nothing */
8421 if (test_bit(__I40E_DOWN, pf->state) ||
8422 test_bit(__I40E_CONFIG_BUSY, pf->state))
8425 /* make sure we don't do these things too often */
8426 if (time_before(jiffies, (pf->service_timer_previous +
8427 pf->service_timer_period)))
8429 pf->service_timer_previous = jiffies;
8431 if ((pf->flags & I40E_FLAG_LINK_POLLING_ENABLED) ||
8432 (pf->flags & I40E_FLAG_TEMP_LINK_POLLING))
8433 i40e_link_event(pf);
8435 /* Update the stats for active netdevs so the network stack
8436 * can look at updated numbers whenever it cares to
8438 for (i = 0; i < pf->num_alloc_vsi; i++)
8439 if (pf->vsi[i] && pf->vsi[i]->netdev)
8440 i40e_update_stats(pf->vsi[i]);
8442 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
8443 /* Update the stats for the active switching components */
8444 for (i = 0; i < I40E_MAX_VEB; i++)
8446 i40e_update_veb_stats(pf->veb[i]);
8449 i40e_ptp_rx_hang(pf);
8450 i40e_ptp_tx_hang(pf);
8454 * i40e_reset_subtask - Set up for resetting the device and driver
8455 * @pf: board private structure
8457 static void i40e_reset_subtask(struct i40e_pf *pf)
8459 u32 reset_flags = 0;
8461 if (test_bit(__I40E_REINIT_REQUESTED, pf->state)) {
8462 reset_flags |= BIT(__I40E_REINIT_REQUESTED);
8463 clear_bit(__I40E_REINIT_REQUESTED, pf->state);
8465 if (test_bit(__I40E_PF_RESET_REQUESTED, pf->state)) {
8466 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED);
8467 clear_bit(__I40E_PF_RESET_REQUESTED, pf->state);
8469 if (test_bit(__I40E_CORE_RESET_REQUESTED, pf->state)) {
8470 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED);
8471 clear_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
8473 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state)) {
8474 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED);
8475 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state);
8477 if (test_bit(__I40E_DOWN_REQUESTED, pf->state)) {
8478 reset_flags |= BIT(__I40E_DOWN_REQUESTED);
8479 clear_bit(__I40E_DOWN_REQUESTED, pf->state);
8482 /* If there's a recovery already waiting, it takes
8483 * precedence before starting a new reset sequence.
8485 if (test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) {
8486 i40e_prep_for_reset(pf, false);
8488 i40e_rebuild(pf, false, false);
8491 /* If we're already down or resetting, just bail */
8493 !test_bit(__I40E_DOWN, pf->state) &&
8494 !test_bit(__I40E_CONFIG_BUSY, pf->state)) {
8495 i40e_do_reset(pf, reset_flags, false);
8500 * i40e_handle_link_event - Handle link event
8501 * @pf: board private structure
8502 * @e: event info posted on ARQ
8504 static void i40e_handle_link_event(struct i40e_pf *pf,
8505 struct i40e_arq_event_info *e)
8507 struct i40e_aqc_get_link_status *status =
8508 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
8510 /* Do a new status request to re-enable LSE reporting
8511 * and load new status information into the hw struct
8512 * This completely ignores any state information
8513 * in the ARQ event info, instead choosing to always
8514 * issue the AQ update link status command.
8516 i40e_link_event(pf);
8518 /* Check if module meets thermal requirements */
8519 if (status->phy_type == I40E_PHY_TYPE_NOT_SUPPORTED_HIGH_TEMP) {
8520 dev_err(&pf->pdev->dev,
8521 "Rx/Tx is disabled on this device because the module does not meet thermal requirements.\n");
8522 dev_err(&pf->pdev->dev,
8523 "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n");
8525 /* check for unqualified module, if link is down, suppress
8526 * the message if link was forced to be down.
8528 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
8529 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
8530 (!(status->link_info & I40E_AQ_LINK_UP)) &&
8531 (!(pf->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED))) {
8532 dev_err(&pf->pdev->dev,
8533 "Rx/Tx is disabled on this device because an unsupported SFP module type was detected.\n");
8534 dev_err(&pf->pdev->dev,
8535 "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n");
8541 * i40e_clean_adminq_subtask - Clean the AdminQ rings
8542 * @pf: board private structure
8544 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
8546 struct i40e_arq_event_info event;
8547 struct i40e_hw *hw = &pf->hw;
8554 /* Do not run clean AQ when PF reset fails */
8555 if (test_bit(__I40E_RESET_FAILED, pf->state))
8558 /* check for error indications */
8559 val = rd32(&pf->hw, pf->hw.aq.arq.len);
8561 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
8562 if (hw->debug_mask & I40E_DEBUG_AQ)
8563 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
8564 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
8566 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
8567 if (hw->debug_mask & I40E_DEBUG_AQ)
8568 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
8569 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
8570 pf->arq_overflows++;
8572 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
8573 if (hw->debug_mask & I40E_DEBUG_AQ)
8574 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
8575 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
8578 wr32(&pf->hw, pf->hw.aq.arq.len, val);
8580 val = rd32(&pf->hw, pf->hw.aq.asq.len);
8582 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
8583 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
8584 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
8585 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
8587 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
8588 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
8589 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
8590 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
8592 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
8593 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
8594 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
8595 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
8598 wr32(&pf->hw, pf->hw.aq.asq.len, val);
8600 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
8601 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
8606 ret = i40e_clean_arq_element(hw, &event, &pending);
8607 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
8610 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
8614 opcode = le16_to_cpu(event.desc.opcode);
8617 case i40e_aqc_opc_get_link_status:
8618 i40e_handle_link_event(pf, &event);
8620 case i40e_aqc_opc_send_msg_to_pf:
8621 ret = i40e_vc_process_vf_msg(pf,
8622 le16_to_cpu(event.desc.retval),
8623 le32_to_cpu(event.desc.cookie_high),
8624 le32_to_cpu(event.desc.cookie_low),
8628 case i40e_aqc_opc_lldp_update_mib:
8629 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
8630 #ifdef CONFIG_I40E_DCB
8632 ret = i40e_handle_lldp_event(pf, &event);
8634 #endif /* CONFIG_I40E_DCB */
8636 case i40e_aqc_opc_event_lan_overflow:
8637 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
8638 i40e_handle_lan_overflow_event(pf, &event);
8640 case i40e_aqc_opc_send_msg_to_peer:
8641 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
8643 case i40e_aqc_opc_nvm_erase:
8644 case i40e_aqc_opc_nvm_update:
8645 case i40e_aqc_opc_oem_post_update:
8646 i40e_debug(&pf->hw, I40E_DEBUG_NVM,
8647 "ARQ NVM operation 0x%04x completed\n",
8651 dev_info(&pf->pdev->dev,
8652 "ARQ: Unknown event 0x%04x ignored\n",
8656 } while (i++ < pf->adminq_work_limit);
8658 if (i < pf->adminq_work_limit)
8659 clear_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state);
8661 /* re-enable Admin queue interrupt cause */
8662 val = rd32(hw, I40E_PFINT_ICR0_ENA);
8663 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
8664 wr32(hw, I40E_PFINT_ICR0_ENA, val);
8667 kfree(event.msg_buf);
8671 * i40e_verify_eeprom - make sure eeprom is good to use
8672 * @pf: board private structure
8674 static void i40e_verify_eeprom(struct i40e_pf *pf)
8678 err = i40e_diag_eeprom_test(&pf->hw);
8680 /* retry in case of garbage read */
8681 err = i40e_diag_eeprom_test(&pf->hw);
8683 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
8685 set_bit(__I40E_BAD_EEPROM, pf->state);
8689 if (!err && test_bit(__I40E_BAD_EEPROM, pf->state)) {
8690 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
8691 clear_bit(__I40E_BAD_EEPROM, pf->state);
8696 * i40e_enable_pf_switch_lb
8697 * @pf: pointer to the PF structure
8699 * enable switch loop back or die - no point in a return value
8701 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
8703 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8704 struct i40e_vsi_context ctxt;
8707 ctxt.seid = pf->main_vsi_seid;
8708 ctxt.pf_num = pf->hw.pf_id;
8710 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
8712 dev_info(&pf->pdev->dev,
8713 "couldn't get PF vsi config, err %s aq_err %s\n",
8714 i40e_stat_str(&pf->hw, ret),
8715 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
8718 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8719 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8720 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8722 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
8724 dev_info(&pf->pdev->dev,
8725 "update vsi switch failed, err %s aq_err %s\n",
8726 i40e_stat_str(&pf->hw, ret),
8727 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
8732 * i40e_disable_pf_switch_lb
8733 * @pf: pointer to the PF structure
8735 * disable switch loop back or die - no point in a return value
8737 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
8739 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8740 struct i40e_vsi_context ctxt;
8743 ctxt.seid = pf->main_vsi_seid;
8744 ctxt.pf_num = pf->hw.pf_id;
8746 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
8748 dev_info(&pf->pdev->dev,
8749 "couldn't get PF vsi config, err %s aq_err %s\n",
8750 i40e_stat_str(&pf->hw, ret),
8751 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
8754 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8755 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8756 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8758 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
8760 dev_info(&pf->pdev->dev,
8761 "update vsi switch failed, err %s aq_err %s\n",
8762 i40e_stat_str(&pf->hw, ret),
8763 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
8768 * i40e_config_bridge_mode - Configure the HW bridge mode
8769 * @veb: pointer to the bridge instance
8771 * Configure the loop back mode for the LAN VSI that is downlink to the
8772 * specified HW bridge instance. It is expected this function is called
8773 * when a new HW bridge is instantiated.
8775 static void i40e_config_bridge_mode(struct i40e_veb *veb)
8777 struct i40e_pf *pf = veb->pf;
8779 if (pf->hw.debug_mask & I40E_DEBUG_LAN)
8780 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
8781 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
8782 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
8783 i40e_disable_pf_switch_lb(pf);
8785 i40e_enable_pf_switch_lb(pf);
8789 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
8790 * @veb: pointer to the VEB instance
8792 * This is a recursive function that first builds the attached VSIs then
8793 * recurses in to build the next layer of VEB. We track the connections
8794 * through our own index numbers because the seid's from the HW could
8795 * change across the reset.
8797 static int i40e_reconstitute_veb(struct i40e_veb *veb)
8799 struct i40e_vsi *ctl_vsi = NULL;
8800 struct i40e_pf *pf = veb->pf;
8804 /* build VSI that owns this VEB, temporarily attached to base VEB */
8805 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
8807 pf->vsi[v]->veb_idx == veb->idx &&
8808 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
8809 ctl_vsi = pf->vsi[v];
8814 dev_info(&pf->pdev->dev,
8815 "missing owner VSI for veb_idx %d\n", veb->idx);
8817 goto end_reconstitute;
8819 if (ctl_vsi != pf->vsi[pf->lan_vsi])
8820 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
8821 ret = i40e_add_vsi(ctl_vsi);
8823 dev_info(&pf->pdev->dev,
8824 "rebuild of veb_idx %d owner VSI failed: %d\n",
8826 goto end_reconstitute;
8828 i40e_vsi_reset_stats(ctl_vsi);
8830 /* create the VEB in the switch and move the VSI onto the VEB */
8831 ret = i40e_add_veb(veb, ctl_vsi);
8833 goto end_reconstitute;
8835 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
8836 veb->bridge_mode = BRIDGE_MODE_VEB;
8838 veb->bridge_mode = BRIDGE_MODE_VEPA;
8839 i40e_config_bridge_mode(veb);
8841 /* create the remaining VSIs attached to this VEB */
8842 for (v = 0; v < pf->num_alloc_vsi; v++) {
8843 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
8846 if (pf->vsi[v]->veb_idx == veb->idx) {
8847 struct i40e_vsi *vsi = pf->vsi[v];
8849 vsi->uplink_seid = veb->seid;
8850 ret = i40e_add_vsi(vsi);
8852 dev_info(&pf->pdev->dev,
8853 "rebuild of vsi_idx %d failed: %d\n",
8855 goto end_reconstitute;
8857 i40e_vsi_reset_stats(vsi);
8861 /* create any VEBs attached to this VEB - RECURSION */
8862 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
8863 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
8864 pf->veb[veb_idx]->uplink_seid = veb->seid;
8865 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
8876 * i40e_get_capabilities - get info about the HW
8877 * @pf: the PF struct
8879 static int i40e_get_capabilities(struct i40e_pf *pf,
8880 enum i40e_admin_queue_opc list_type)
8882 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
8887 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
8889 cap_buf = kzalloc(buf_len, GFP_KERNEL);
8893 /* this loads the data into the hw struct for us */
8894 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
8895 &data_size, list_type,
8897 /* data loaded, buffer no longer needed */
8900 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
8901 /* retry with a larger buffer */
8902 buf_len = data_size;
8903 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
8904 dev_info(&pf->pdev->dev,
8905 "capability discovery failed, err %s aq_err %s\n",
8906 i40e_stat_str(&pf->hw, err),
8907 i40e_aq_str(&pf->hw,
8908 pf->hw.aq.asq_last_status));
8913 if (pf->hw.debug_mask & I40E_DEBUG_USER) {
8914 if (list_type == i40e_aqc_opc_list_func_capabilities) {
8915 dev_info(&pf->pdev->dev,
8916 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
8917 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
8918 pf->hw.func_caps.num_msix_vectors,
8919 pf->hw.func_caps.num_msix_vectors_vf,
8920 pf->hw.func_caps.fd_filters_guaranteed,
8921 pf->hw.func_caps.fd_filters_best_effort,
8922 pf->hw.func_caps.num_tx_qp,
8923 pf->hw.func_caps.num_vsis);
8924 } else if (list_type == i40e_aqc_opc_list_dev_capabilities) {
8925 dev_info(&pf->pdev->dev,
8926 "switch_mode=0x%04x, function_valid=0x%08x\n",
8927 pf->hw.dev_caps.switch_mode,
8928 pf->hw.dev_caps.valid_functions);
8929 dev_info(&pf->pdev->dev,
8930 "SR-IOV=%d, num_vfs for all function=%u\n",
8931 pf->hw.dev_caps.sr_iov_1_1,
8932 pf->hw.dev_caps.num_vfs);
8933 dev_info(&pf->pdev->dev,
8934 "num_vsis=%u, num_rx:%u, num_tx=%u\n",
8935 pf->hw.dev_caps.num_vsis,
8936 pf->hw.dev_caps.num_rx_qp,
8937 pf->hw.dev_caps.num_tx_qp);
8940 if (list_type == i40e_aqc_opc_list_func_capabilities) {
8941 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
8942 + pf->hw.func_caps.num_vfs)
8943 if (pf->hw.revision_id == 0 &&
8944 pf->hw.func_caps.num_vsis < DEF_NUM_VSI) {
8945 dev_info(&pf->pdev->dev,
8946 "got num_vsis %d, setting num_vsis to %d\n",
8947 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
8948 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
8954 static int i40e_vsi_clear(struct i40e_vsi *vsi);
8957 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
8958 * @pf: board private structure
8960 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
8962 struct i40e_vsi *vsi;
8964 /* quick workaround for an NVM issue that leaves a critical register
8967 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
8968 static const u32 hkey[] = {
8969 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
8970 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
8971 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
8975 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
8976 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
8979 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8982 /* find existing VSI and see if it needs configuring */
8983 vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
8985 /* create a new VSI if none exists */
8987 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
8988 pf->vsi[pf->lan_vsi]->seid, 0);
8990 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
8991 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8992 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
8997 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
9001 * i40e_fdir_teardown - release the Flow Director resources
9002 * @pf: board private structure
9004 static void i40e_fdir_teardown(struct i40e_pf *pf)
9006 struct i40e_vsi *vsi;
9008 i40e_fdir_filter_exit(pf);
9009 vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
9011 i40e_vsi_release(vsi);
9015 * i40e_rebuild_cloud_filters - Rebuilds cloud filters for VSIs
9017 * @seid: seid of main or channel VSIs
9019 * Rebuilds cloud filters associated with main VSI and channel VSIs if they
9020 * existed before reset
9022 static int i40e_rebuild_cloud_filters(struct i40e_vsi *vsi, u16 seid)
9024 struct i40e_cloud_filter *cfilter;
9025 struct i40e_pf *pf = vsi->back;
9026 struct hlist_node *node;
9029 /* Add cloud filters back if they exist */
9030 hlist_for_each_entry_safe(cfilter, node, &pf->cloud_filter_list,
9032 if (cfilter->seid != seid)
9035 if (cfilter->dst_port)
9036 ret = i40e_add_del_cloud_filter_big_buf(vsi, cfilter,
9039 ret = i40e_add_del_cloud_filter(vsi, cfilter, true);
9042 dev_dbg(&pf->pdev->dev,
9043 "Failed to rebuild cloud filter, err %s aq_err %s\n",
9044 i40e_stat_str(&pf->hw, ret),
9045 i40e_aq_str(&pf->hw,
9046 pf->hw.aq.asq_last_status));
9054 * i40e_rebuild_channels - Rebuilds channel VSIs if they existed before reset
9057 * Rebuilds channel VSIs if they existed before reset
9059 static int i40e_rebuild_channels(struct i40e_vsi *vsi)
9061 struct i40e_channel *ch, *ch_tmp;
9064 if (list_empty(&vsi->ch_list))
9067 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
9068 if (!ch->initialized)
9070 /* Proceed with creation of channel (VMDq2) VSI */
9071 ret = i40e_add_channel(vsi->back, vsi->uplink_seid, ch);
9073 dev_info(&vsi->back->pdev->dev,
9074 "failed to rebuild channels using uplink_seid %u\n",
9078 if (ch->max_tx_rate) {
9079 u64 credits = ch->max_tx_rate;
9081 if (i40e_set_bw_limit(vsi, ch->seid,
9085 do_div(credits, I40E_BW_CREDIT_DIVISOR);
9086 dev_dbg(&vsi->back->pdev->dev,
9087 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
9092 ret = i40e_rebuild_cloud_filters(vsi, ch->seid);
9094 dev_dbg(&vsi->back->pdev->dev,
9095 "Failed to rebuild cloud filters for channel VSI %u\n",
9104 * i40e_prep_for_reset - prep for the core to reset
9105 * @pf: board private structure
9106 * @lock_acquired: indicates whether or not the lock has been acquired
9107 * before this function was called.
9109 * Close up the VFs and other things in prep for PF Reset.
9111 static void i40e_prep_for_reset(struct i40e_pf *pf, bool lock_acquired)
9113 struct i40e_hw *hw = &pf->hw;
9114 i40e_status ret = 0;
9117 clear_bit(__I40E_RESET_INTR_RECEIVED, pf->state);
9118 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
9120 if (i40e_check_asq_alive(&pf->hw))
9121 i40e_vc_notify_reset(pf);
9123 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
9125 /* quiesce the VSIs and their queues that are not already DOWN */
9126 /* pf_quiesce_all_vsi modifies netdev structures -rtnl_lock needed */
9129 i40e_pf_quiesce_all_vsi(pf);
9133 for (v = 0; v < pf->num_alloc_vsi; v++) {
9135 pf->vsi[v]->seid = 0;
9138 i40e_shutdown_adminq(&pf->hw);
9140 /* call shutdown HMC */
9141 if (hw->hmc.hmc_obj) {
9142 ret = i40e_shutdown_lan_hmc(hw);
9144 dev_warn(&pf->pdev->dev,
9145 "shutdown_lan_hmc failed: %d\n", ret);
9150 * i40e_send_version - update firmware with driver version
9153 static void i40e_send_version(struct i40e_pf *pf)
9155 struct i40e_driver_version dv;
9157 dv.major_version = DRV_VERSION_MAJOR;
9158 dv.minor_version = DRV_VERSION_MINOR;
9159 dv.build_version = DRV_VERSION_BUILD;
9160 dv.subbuild_version = 0;
9161 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
9162 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
9166 * i40e_get_oem_version - get OEM specific version information
9167 * @hw: pointer to the hardware structure
9169 static void i40e_get_oem_version(struct i40e_hw *hw)
9171 u16 block_offset = 0xffff;
9172 u16 block_length = 0;
9173 u16 capabilities = 0;
9177 #define I40E_SR_NVM_OEM_VERSION_PTR 0x1B
9178 #define I40E_NVM_OEM_LENGTH_OFFSET 0x00
9179 #define I40E_NVM_OEM_CAPABILITIES_OFFSET 0x01
9180 #define I40E_NVM_OEM_GEN_OFFSET 0x02
9181 #define I40E_NVM_OEM_RELEASE_OFFSET 0x03
9182 #define I40E_NVM_OEM_CAPABILITIES_MASK 0x000F
9183 #define I40E_NVM_OEM_LENGTH 3
9185 /* Check if pointer to OEM version block is valid. */
9186 i40e_read_nvm_word(hw, I40E_SR_NVM_OEM_VERSION_PTR, &block_offset);
9187 if (block_offset == 0xffff)
9190 /* Check if OEM version block has correct length. */
9191 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_LENGTH_OFFSET,
9193 if (block_length < I40E_NVM_OEM_LENGTH)
9196 /* Check if OEM version format is as expected. */
9197 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_CAPABILITIES_OFFSET,
9199 if ((capabilities & I40E_NVM_OEM_CAPABILITIES_MASK) != 0)
9202 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_GEN_OFFSET,
9204 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_RELEASE_OFFSET,
9206 hw->nvm.oem_ver = (gen_snap << I40E_OEM_SNAP_SHIFT) | release;
9207 hw->nvm.eetrack = I40E_OEM_EETRACK_ID;
9211 * i40e_reset - wait for core reset to finish reset, reset pf if corer not seen
9212 * @pf: board private structure
9214 static int i40e_reset(struct i40e_pf *pf)
9216 struct i40e_hw *hw = &pf->hw;
9219 ret = i40e_pf_reset(hw);
9221 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
9222 set_bit(__I40E_RESET_FAILED, pf->state);
9223 clear_bit(__I40E_RESET_RECOVERY_PENDING, pf->state);
9231 * i40e_rebuild - rebuild using a saved config
9232 * @pf: board private structure
9233 * @reinit: if the Main VSI needs to re-initialized.
9234 * @lock_acquired: indicates whether or not the lock has been acquired
9235 * before this function was called.
9237 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired)
9239 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
9240 struct i40e_hw *hw = &pf->hw;
9241 u8 set_fc_aq_fail = 0;
9246 if (test_bit(__I40E_DOWN, pf->state))
9247 goto clear_recovery;
9248 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
9250 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
9251 ret = i40e_init_adminq(&pf->hw);
9253 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
9254 i40e_stat_str(&pf->hw, ret),
9255 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9256 goto clear_recovery;
9258 i40e_get_oem_version(&pf->hw);
9260 /* re-verify the eeprom if we just had an EMP reset */
9261 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state))
9262 i40e_verify_eeprom(pf);
9264 i40e_clear_pxe_mode(hw);
9265 ret = i40e_get_capabilities(pf, i40e_aqc_opc_list_func_capabilities);
9267 goto end_core_reset;
9269 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
9270 hw->func_caps.num_rx_qp, 0, 0);
9272 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
9273 goto end_core_reset;
9275 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
9277 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
9278 goto end_core_reset;
9281 #ifdef CONFIG_I40E_DCB
9282 ret = i40e_init_pf_dcb(pf);
9284 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
9285 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9286 /* Continue without DCB enabled */
9288 #endif /* CONFIG_I40E_DCB */
9289 /* do basic switch setup */
9292 ret = i40e_setup_pf_switch(pf, reinit);
9296 /* The driver only wants link up/down and module qualification
9297 * reports from firmware. Note the negative logic.
9299 ret = i40e_aq_set_phy_int_mask(&pf->hw,
9300 ~(I40E_AQ_EVENT_LINK_UPDOWN |
9301 I40E_AQ_EVENT_MEDIA_NA |
9302 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
9304 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
9305 i40e_stat_str(&pf->hw, ret),
9306 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9308 /* make sure our flow control settings are restored */
9309 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
9311 dev_dbg(&pf->pdev->dev, "setting flow control: ret = %s last_status = %s\n",
9312 i40e_stat_str(&pf->hw, ret),
9313 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9315 /* Rebuild the VSIs and VEBs that existed before reset.
9316 * They are still in our local switch element arrays, so only
9317 * need to rebuild the switch model in the HW.
9319 * If there were VEBs but the reconstitution failed, we'll try
9320 * try to recover minimal use by getting the basic PF VSI working.
9322 if (vsi->uplink_seid != pf->mac_seid) {
9323 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
9324 /* find the one VEB connected to the MAC, and find orphans */
9325 for (v = 0; v < I40E_MAX_VEB; v++) {
9329 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
9330 pf->veb[v]->uplink_seid == 0) {
9331 ret = i40e_reconstitute_veb(pf->veb[v]);
9336 /* If Main VEB failed, we're in deep doodoo,
9337 * so give up rebuilding the switch and set up
9338 * for minimal rebuild of PF VSI.
9339 * If orphan failed, we'll report the error
9340 * but try to keep going.
9342 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
9343 dev_info(&pf->pdev->dev,
9344 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
9346 vsi->uplink_seid = pf->mac_seid;
9348 } else if (pf->veb[v]->uplink_seid == 0) {
9349 dev_info(&pf->pdev->dev,
9350 "rebuild of orphan VEB failed: %d\n",
9357 if (vsi->uplink_seid == pf->mac_seid) {
9358 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
9359 /* no VEB, so rebuild only the Main VSI */
9360 ret = i40e_add_vsi(vsi);
9362 dev_info(&pf->pdev->dev,
9363 "rebuild of Main VSI failed: %d\n", ret);
9368 if (vsi->mqprio_qopt.max_rate[0]) {
9369 u64 max_tx_rate = vsi->mqprio_qopt.max_rate[0];
9372 do_div(max_tx_rate, I40E_BW_MBPS_DIVISOR);
9373 ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate);
9377 credits = max_tx_rate;
9378 do_div(credits, I40E_BW_CREDIT_DIVISOR);
9379 dev_dbg(&vsi->back->pdev->dev,
9380 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
9386 ret = i40e_rebuild_cloud_filters(vsi, vsi->seid);
9390 /* PF Main VSI is rebuild by now, go ahead and rebuild channel VSIs
9391 * for this main VSI if they exist
9393 ret = i40e_rebuild_channels(vsi);
9397 /* Reconfigure hardware for allowing smaller MSS in the case
9398 * of TSO, so that we avoid the MDD being fired and causing
9399 * a reset in the case of small MSS+TSO.
9401 #define I40E_REG_MSS 0x000E64DC
9402 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
9403 #define I40E_64BYTE_MSS 0x400000
9404 val = rd32(hw, I40E_REG_MSS);
9405 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
9406 val &= ~I40E_REG_MSS_MIN_MASK;
9407 val |= I40E_64BYTE_MSS;
9408 wr32(hw, I40E_REG_MSS, val);
9411 if (pf->hw_features & I40E_HW_RESTART_AUTONEG) {
9413 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
9415 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
9416 i40e_stat_str(&pf->hw, ret),
9417 i40e_aq_str(&pf->hw,
9418 pf->hw.aq.asq_last_status));
9420 /* reinit the misc interrupt */
9421 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
9422 ret = i40e_setup_misc_vector(pf);
9424 /* Add a filter to drop all Flow control frames from any VSI from being
9425 * transmitted. By doing so we stop a malicious VF from sending out
9426 * PAUSE or PFC frames and potentially controlling traffic for other
9428 * The FW can still send Flow control frames if enabled.
9430 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
9433 /* restart the VSIs that were rebuilt and running before the reset */
9434 i40e_pf_unquiesce_all_vsi(pf);
9436 /* Release the RTNL lock before we start resetting VFs */
9440 /* Restore promiscuous settings */
9441 ret = i40e_set_promiscuous(pf, pf->cur_promisc);
9443 dev_warn(&pf->pdev->dev,
9444 "Failed to restore promiscuous setting: %s, err %s aq_err %s\n",
9445 pf->cur_promisc ? "on" : "off",
9446 i40e_stat_str(&pf->hw, ret),
9447 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9449 i40e_reset_all_vfs(pf, true);
9451 /* tell the firmware that we're starting */
9452 i40e_send_version(pf);
9454 /* We've already released the lock, so don't do it again */
9455 goto end_core_reset;
9461 clear_bit(__I40E_RESET_FAILED, pf->state);
9463 clear_bit(__I40E_RESET_RECOVERY_PENDING, pf->state);
9467 * i40e_reset_and_rebuild - reset and rebuild using a saved config
9468 * @pf: board private structure
9469 * @reinit: if the Main VSI needs to re-initialized.
9470 * @lock_acquired: indicates whether or not the lock has been acquired
9471 * before this function was called.
9473 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit,
9477 /* Now we wait for GRST to settle out.
9478 * We don't have to delete the VEBs or VSIs from the hw switch
9479 * because the reset will make them disappear.
9481 ret = i40e_reset(pf);
9483 i40e_rebuild(pf, reinit, lock_acquired);
9487 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
9488 * @pf: board private structure
9490 * Close up the VFs and other things in prep for a Core Reset,
9491 * then get ready to rebuild the world.
9492 * @lock_acquired: indicates whether or not the lock has been acquired
9493 * before this function was called.
9495 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired)
9497 i40e_prep_for_reset(pf, lock_acquired);
9498 i40e_reset_and_rebuild(pf, false, lock_acquired);
9502 * i40e_handle_mdd_event
9503 * @pf: pointer to the PF structure
9505 * Called from the MDD irq handler to identify possibly malicious vfs
9507 static void i40e_handle_mdd_event(struct i40e_pf *pf)
9509 struct i40e_hw *hw = &pf->hw;
9510 bool mdd_detected = false;
9511 bool pf_mdd_detected = false;
9516 if (!test_bit(__I40E_MDD_EVENT_PENDING, pf->state))
9519 /* find what triggered the MDD event */
9520 reg = rd32(hw, I40E_GL_MDET_TX);
9521 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
9522 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
9523 I40E_GL_MDET_TX_PF_NUM_SHIFT;
9524 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
9525 I40E_GL_MDET_TX_VF_NUM_SHIFT;
9526 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
9527 I40E_GL_MDET_TX_EVENT_SHIFT;
9528 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
9529 I40E_GL_MDET_TX_QUEUE_SHIFT) -
9530 pf->hw.func_caps.base_queue;
9531 if (netif_msg_tx_err(pf))
9532 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
9533 event, queue, pf_num, vf_num);
9534 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
9535 mdd_detected = true;
9537 reg = rd32(hw, I40E_GL_MDET_RX);
9538 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
9539 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
9540 I40E_GL_MDET_RX_FUNCTION_SHIFT;
9541 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
9542 I40E_GL_MDET_RX_EVENT_SHIFT;
9543 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
9544 I40E_GL_MDET_RX_QUEUE_SHIFT) -
9545 pf->hw.func_caps.base_queue;
9546 if (netif_msg_rx_err(pf))
9547 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
9548 event, queue, func);
9549 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
9550 mdd_detected = true;
9554 reg = rd32(hw, I40E_PF_MDET_TX);
9555 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
9556 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
9557 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
9558 pf_mdd_detected = true;
9560 reg = rd32(hw, I40E_PF_MDET_RX);
9561 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
9562 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
9563 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
9564 pf_mdd_detected = true;
9566 /* Queue belongs to the PF, initiate a reset */
9567 if (pf_mdd_detected) {
9568 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
9569 i40e_service_event_schedule(pf);
9573 /* see if one of the VFs needs its hand slapped */
9574 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
9576 reg = rd32(hw, I40E_VP_MDET_TX(i));
9577 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
9578 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
9579 vf->num_mdd_events++;
9580 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
9584 reg = rd32(hw, I40E_VP_MDET_RX(i));
9585 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
9586 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
9587 vf->num_mdd_events++;
9588 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
9592 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
9593 dev_info(&pf->pdev->dev,
9594 "Too many MDD events on VF %d, disabled\n", i);
9595 dev_info(&pf->pdev->dev,
9596 "Use PF Control I/F to re-enable the VF\n");
9597 set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
9601 /* re-enable mdd interrupt cause */
9602 clear_bit(__I40E_MDD_EVENT_PENDING, pf->state);
9603 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
9604 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
9605 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
9609 static const char *i40e_tunnel_name(struct i40e_udp_port_config *port)
9611 switch (port->type) {
9612 case UDP_TUNNEL_TYPE_VXLAN:
9614 case UDP_TUNNEL_TYPE_GENEVE:
9622 * i40e_sync_udp_filters - Trigger a sync event for existing UDP filters
9623 * @pf: board private structure
9625 static void i40e_sync_udp_filters(struct i40e_pf *pf)
9629 /* loop through and set pending bit for all active UDP filters */
9630 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
9631 if (pf->udp_ports[i].port)
9632 pf->pending_udp_bitmap |= BIT_ULL(i);
9635 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
9639 * i40e_sync_udp_filters_subtask - Sync the VSI filter list with HW
9640 * @pf: board private structure
9642 static void i40e_sync_udp_filters_subtask(struct i40e_pf *pf)
9644 struct i40e_hw *hw = &pf->hw;
9649 if (!(pf->flags & I40E_FLAG_UDP_FILTER_SYNC))
9652 pf->flags &= ~I40E_FLAG_UDP_FILTER_SYNC;
9654 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
9655 if (pf->pending_udp_bitmap & BIT_ULL(i)) {
9656 pf->pending_udp_bitmap &= ~BIT_ULL(i);
9657 port = pf->udp_ports[i].port;
9659 ret = i40e_aq_add_udp_tunnel(hw, port,
9660 pf->udp_ports[i].type,
9663 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
9666 dev_info(&pf->pdev->dev,
9667 "%s %s port %d, index %d failed, err %s aq_err %s\n",
9668 i40e_tunnel_name(&pf->udp_ports[i]),
9669 port ? "add" : "delete",
9671 i40e_stat_str(&pf->hw, ret),
9672 i40e_aq_str(&pf->hw,
9673 pf->hw.aq.asq_last_status));
9674 pf->udp_ports[i].port = 0;
9681 * i40e_service_task - Run the driver's async subtasks
9682 * @work: pointer to work_struct containing our data
9684 static void i40e_service_task(struct work_struct *work)
9686 struct i40e_pf *pf = container_of(work,
9689 unsigned long start_time = jiffies;
9691 /* don't bother with service tasks if a reset is in progress */
9692 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
9695 if (test_and_set_bit(__I40E_SERVICE_SCHED, pf->state))
9698 i40e_detect_recover_hung(pf);
9699 i40e_sync_filters_subtask(pf);
9700 i40e_reset_subtask(pf);
9701 i40e_handle_mdd_event(pf);
9702 i40e_vc_process_vflr_event(pf);
9703 i40e_watchdog_subtask(pf);
9704 i40e_fdir_reinit_subtask(pf);
9705 if (pf->flags & I40E_FLAG_CLIENT_RESET) {
9706 /* Client subtask will reopen next time through. */
9707 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], true);
9708 pf->flags &= ~I40E_FLAG_CLIENT_RESET;
9710 i40e_client_subtask(pf);
9711 if (pf->flags & I40E_FLAG_CLIENT_L2_CHANGE) {
9712 i40e_notify_client_of_l2_param_changes(
9713 pf->vsi[pf->lan_vsi]);
9714 pf->flags &= ~I40E_FLAG_CLIENT_L2_CHANGE;
9717 i40e_sync_filters_subtask(pf);
9718 i40e_sync_udp_filters_subtask(pf);
9719 i40e_clean_adminq_subtask(pf);
9721 /* flush memory to make sure state is correct before next watchdog */
9722 smp_mb__before_atomic();
9723 clear_bit(__I40E_SERVICE_SCHED, pf->state);
9725 /* If the tasks have taken longer than one timer cycle or there
9726 * is more work to be done, reschedule the service task now
9727 * rather than wait for the timer to tick again.
9729 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
9730 test_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state) ||
9731 test_bit(__I40E_MDD_EVENT_PENDING, pf->state) ||
9732 test_bit(__I40E_VFLR_EVENT_PENDING, pf->state))
9733 i40e_service_event_schedule(pf);
9737 * i40e_service_timer - timer callback
9738 * @data: pointer to PF struct
9740 static void i40e_service_timer(struct timer_list *t)
9742 struct i40e_pf *pf = from_timer(pf, t, service_timer);
9744 mod_timer(&pf->service_timer,
9745 round_jiffies(jiffies + pf->service_timer_period));
9746 i40e_service_event_schedule(pf);
9750 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
9751 * @vsi: the VSI being configured
9753 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
9755 struct i40e_pf *pf = vsi->back;
9757 switch (vsi->type) {
9759 vsi->alloc_queue_pairs = pf->num_lan_qps;
9760 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
9761 I40E_REQ_DESCRIPTOR_MULTIPLE);
9762 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
9763 vsi->num_q_vectors = pf->num_lan_msix;
9765 vsi->num_q_vectors = 1;
9770 vsi->alloc_queue_pairs = 1;
9771 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
9772 I40E_REQ_DESCRIPTOR_MULTIPLE);
9773 vsi->num_q_vectors = pf->num_fdsb_msix;
9776 case I40E_VSI_VMDQ2:
9777 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
9778 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
9779 I40E_REQ_DESCRIPTOR_MULTIPLE);
9780 vsi->num_q_vectors = pf->num_vmdq_msix;
9783 case I40E_VSI_SRIOV:
9784 vsi->alloc_queue_pairs = pf->num_vf_qps;
9785 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
9786 I40E_REQ_DESCRIPTOR_MULTIPLE);
9798 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
9800 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
9802 * On error: returns error code (negative)
9803 * On success: returns 0
9805 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
9807 struct i40e_ring **next_rings;
9811 /* allocate memory for both Tx, XDP Tx and Rx ring pointers */
9812 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs *
9813 (i40e_enabled_xdp_vsi(vsi) ? 3 : 2);
9814 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
9817 next_rings = vsi->tx_rings + vsi->alloc_queue_pairs;
9818 if (i40e_enabled_xdp_vsi(vsi)) {
9819 vsi->xdp_rings = next_rings;
9820 next_rings += vsi->alloc_queue_pairs;
9822 vsi->rx_rings = next_rings;
9824 if (alloc_qvectors) {
9825 /* allocate memory for q_vector pointers */
9826 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
9827 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
9828 if (!vsi->q_vectors) {
9836 kfree(vsi->tx_rings);
9841 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
9842 * @pf: board private structure
9843 * @type: type of VSI
9845 * On error: returns error code (negative)
9846 * On success: returns vsi index in PF (positive)
9848 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
9851 struct i40e_vsi *vsi;
9855 /* Need to protect the allocation of the VSIs at the PF level */
9856 mutex_lock(&pf->switch_mutex);
9858 /* VSI list may be fragmented if VSI creation/destruction has
9859 * been happening. We can afford to do a quick scan to look
9860 * for any free VSIs in the list.
9862 * find next empty vsi slot, looping back around if necessary
9865 while (i < pf->num_alloc_vsi && pf->vsi[i])
9867 if (i >= pf->num_alloc_vsi) {
9869 while (i < pf->next_vsi && pf->vsi[i])
9873 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
9874 vsi_idx = i; /* Found one! */
9877 goto unlock_pf; /* out of VSI slots! */
9881 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
9888 set_bit(__I40E_VSI_DOWN, vsi->state);
9891 vsi->int_rate_limit = 0;
9892 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
9893 pf->rss_table_size : 64;
9894 vsi->netdev_registered = false;
9895 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
9896 hash_init(vsi->mac_filter_hash);
9897 vsi->irqs_ready = false;
9899 ret = i40e_set_num_rings_in_vsi(vsi);
9903 ret = i40e_vsi_alloc_arrays(vsi, true);
9907 /* Setup default MSIX irq handler for VSI */
9908 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
9910 /* Initialize VSI lock */
9911 spin_lock_init(&vsi->mac_filter_hash_lock);
9912 pf->vsi[vsi_idx] = vsi;
9917 pf->next_vsi = i - 1;
9920 mutex_unlock(&pf->switch_mutex);
9925 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
9926 * @type: VSI pointer
9927 * @free_qvectors: a bool to specify if q_vectors need to be freed.
9929 * On error: returns error code (negative)
9930 * On success: returns 0
9932 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
9934 /* free the ring and vector containers */
9935 if (free_qvectors) {
9936 kfree(vsi->q_vectors);
9937 vsi->q_vectors = NULL;
9939 kfree(vsi->tx_rings);
9940 vsi->tx_rings = NULL;
9941 vsi->rx_rings = NULL;
9942 vsi->xdp_rings = NULL;
9946 * i40e_clear_rss_config_user - clear the user configured RSS hash keys
9948 * @vsi: Pointer to VSI structure
9950 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi)
9955 kfree(vsi->rss_hkey_user);
9956 vsi->rss_hkey_user = NULL;
9958 kfree(vsi->rss_lut_user);
9959 vsi->rss_lut_user = NULL;
9963 * i40e_vsi_clear - Deallocate the VSI provided
9964 * @vsi: the VSI being un-configured
9966 static int i40e_vsi_clear(struct i40e_vsi *vsi)
9977 mutex_lock(&pf->switch_mutex);
9978 if (!pf->vsi[vsi->idx]) {
9979 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
9980 vsi->idx, vsi->idx, vsi, vsi->type);
9984 if (pf->vsi[vsi->idx] != vsi) {
9985 dev_err(&pf->pdev->dev,
9986 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
9987 pf->vsi[vsi->idx]->idx,
9989 pf->vsi[vsi->idx]->type,
9990 vsi->idx, vsi, vsi->type);
9994 /* updates the PF for this cleared vsi */
9995 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
9996 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
9998 i40e_vsi_free_arrays(vsi, true);
9999 i40e_clear_rss_config_user(vsi);
10001 pf->vsi[vsi->idx] = NULL;
10002 if (vsi->idx < pf->next_vsi)
10003 pf->next_vsi = vsi->idx;
10006 mutex_unlock(&pf->switch_mutex);
10014 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
10015 * @vsi: the VSI being cleaned
10017 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
10021 if (vsi->tx_rings && vsi->tx_rings[0]) {
10022 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
10023 kfree_rcu(vsi->tx_rings[i], rcu);
10024 vsi->tx_rings[i] = NULL;
10025 vsi->rx_rings[i] = NULL;
10026 if (vsi->xdp_rings)
10027 vsi->xdp_rings[i] = NULL;
10033 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
10034 * @vsi: the VSI being configured
10036 static int i40e_alloc_rings(struct i40e_vsi *vsi)
10038 int i, qpv = i40e_enabled_xdp_vsi(vsi) ? 3 : 2;
10039 struct i40e_pf *pf = vsi->back;
10040 struct i40e_ring *ring;
10042 /* Set basic values in the rings to be used later during open() */
10043 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
10044 /* allocate space for both Tx and Rx in one shot */
10045 ring = kcalloc(qpv, sizeof(struct i40e_ring), GFP_KERNEL);
10049 ring->queue_index = i;
10050 ring->reg_idx = vsi->base_queue + i;
10051 ring->ring_active = false;
10053 ring->netdev = vsi->netdev;
10054 ring->dev = &pf->pdev->dev;
10055 ring->count = vsi->num_desc;
10058 if (vsi->back->hw_features & I40E_HW_WB_ON_ITR_CAPABLE)
10059 ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
10060 ring->tx_itr_setting = pf->tx_itr_default;
10061 vsi->tx_rings[i] = ring++;
10063 if (!i40e_enabled_xdp_vsi(vsi))
10066 ring->queue_index = vsi->alloc_queue_pairs + i;
10067 ring->reg_idx = vsi->base_queue + ring->queue_index;
10068 ring->ring_active = false;
10070 ring->netdev = NULL;
10071 ring->dev = &pf->pdev->dev;
10072 ring->count = vsi->num_desc;
10075 if (vsi->back->hw_features & I40E_HW_WB_ON_ITR_CAPABLE)
10076 ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
10077 set_ring_xdp(ring);
10078 ring->tx_itr_setting = pf->tx_itr_default;
10079 vsi->xdp_rings[i] = ring++;
10082 ring->queue_index = i;
10083 ring->reg_idx = vsi->base_queue + i;
10084 ring->ring_active = false;
10086 ring->netdev = vsi->netdev;
10087 ring->dev = &pf->pdev->dev;
10088 ring->count = vsi->num_desc;
10091 ring->rx_itr_setting = pf->rx_itr_default;
10092 vsi->rx_rings[i] = ring;
10098 i40e_vsi_clear_rings(vsi);
10103 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
10104 * @pf: board private structure
10105 * @vectors: the number of MSI-X vectors to request
10107 * Returns the number of vectors reserved, or error
10109 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
10111 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
10112 I40E_MIN_MSIX, vectors);
10114 dev_info(&pf->pdev->dev,
10115 "MSI-X vector reservation failed: %d\n", vectors);
10123 * i40e_init_msix - Setup the MSIX capability
10124 * @pf: board private structure
10126 * Work with the OS to set up the MSIX vectors needed.
10128 * Returns the number of vectors reserved or negative on failure
10130 static int i40e_init_msix(struct i40e_pf *pf)
10132 struct i40e_hw *hw = &pf->hw;
10133 int cpus, extra_vectors;
10137 int iwarp_requested = 0;
10139 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
10142 /* The number of vectors we'll request will be comprised of:
10143 * - Add 1 for "other" cause for Admin Queue events, etc.
10144 * - The number of LAN queue pairs
10145 * - Queues being used for RSS.
10146 * We don't need as many as max_rss_size vectors.
10147 * use rss_size instead in the calculation since that
10148 * is governed by number of cpus in the system.
10149 * - assumes symmetric Tx/Rx pairing
10150 * - The number of VMDq pairs
10151 * - The CPU count within the NUMA node if iWARP is enabled
10152 * Once we count this up, try the request.
10154 * If we can't get what we want, we'll simplify to nearly nothing
10155 * and try again. If that still fails, we punt.
10157 vectors_left = hw->func_caps.num_msix_vectors;
10160 /* reserve one vector for miscellaneous handler */
10161 if (vectors_left) {
10166 /* reserve some vectors for the main PF traffic queues. Initially we
10167 * only reserve at most 50% of the available vectors, in the case that
10168 * the number of online CPUs is large. This ensures that we can enable
10169 * extra features as well. Once we've enabled the other features, we
10170 * will use any remaining vectors to reach as close as we can to the
10171 * number of online CPUs.
10173 cpus = num_online_cpus();
10174 pf->num_lan_msix = min_t(int, cpus, vectors_left / 2);
10175 vectors_left -= pf->num_lan_msix;
10177 /* reserve one vector for sideband flow director */
10178 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10179 if (vectors_left) {
10180 pf->num_fdsb_msix = 1;
10184 pf->num_fdsb_msix = 0;
10188 /* can we reserve enough for iWARP? */
10189 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
10190 iwarp_requested = pf->num_iwarp_msix;
10193 pf->num_iwarp_msix = 0;
10194 else if (vectors_left < pf->num_iwarp_msix)
10195 pf->num_iwarp_msix = 1;
10196 v_budget += pf->num_iwarp_msix;
10197 vectors_left -= pf->num_iwarp_msix;
10200 /* any vectors left over go for VMDq support */
10201 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
10202 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
10203 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
10205 if (!vectors_left) {
10206 pf->num_vmdq_msix = 0;
10207 pf->num_vmdq_qps = 0;
10209 /* if we're short on vectors for what's desired, we limit
10210 * the queues per vmdq. If this is still more than are
10211 * available, the user will need to change the number of
10212 * queues/vectors used by the PF later with the ethtool
10215 if (vmdq_vecs < vmdq_vecs_wanted)
10216 pf->num_vmdq_qps = 1;
10217 pf->num_vmdq_msix = pf->num_vmdq_qps;
10219 v_budget += vmdq_vecs;
10220 vectors_left -= vmdq_vecs;
10224 /* On systems with a large number of SMP cores, we previously limited
10225 * the number of vectors for num_lan_msix to be at most 50% of the
10226 * available vectors, to allow for other features. Now, we add back
10227 * the remaining vectors. However, we ensure that the total
10228 * num_lan_msix will not exceed num_online_cpus(). To do this, we
10229 * calculate the number of vectors we can add without going over the
10230 * cap of CPUs. For systems with a small number of CPUs this will be
10233 extra_vectors = min_t(int, cpus - pf->num_lan_msix, vectors_left);
10234 pf->num_lan_msix += extra_vectors;
10235 vectors_left -= extra_vectors;
10237 WARN(vectors_left < 0,
10238 "Calculation of remaining vectors underflowed. This is an accounting bug when determining total MSI-X vectors.\n");
10240 v_budget += pf->num_lan_msix;
10241 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
10243 if (!pf->msix_entries)
10246 for (i = 0; i < v_budget; i++)
10247 pf->msix_entries[i].entry = i;
10248 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
10250 if (v_actual < I40E_MIN_MSIX) {
10251 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
10252 kfree(pf->msix_entries);
10253 pf->msix_entries = NULL;
10254 pci_disable_msix(pf->pdev);
10257 } else if (v_actual == I40E_MIN_MSIX) {
10258 /* Adjust for minimal MSIX use */
10259 pf->num_vmdq_vsis = 0;
10260 pf->num_vmdq_qps = 0;
10261 pf->num_lan_qps = 1;
10262 pf->num_lan_msix = 1;
10264 } else if (v_actual != v_budget) {
10265 /* If we have limited resources, we will start with no vectors
10266 * for the special features and then allocate vectors to some
10267 * of these features based on the policy and at the end disable
10268 * the features that did not get any vectors.
10272 dev_info(&pf->pdev->dev,
10273 "MSI-X vector limit reached with %d, wanted %d, attempting to redistribute vectors\n",
10274 v_actual, v_budget);
10275 /* reserve the misc vector */
10276 vec = v_actual - 1;
10278 /* Scale vector usage down */
10279 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
10280 pf->num_vmdq_vsis = 1;
10281 pf->num_vmdq_qps = 1;
10283 /* partition out the remaining vectors */
10286 pf->num_lan_msix = 1;
10289 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
10290 pf->num_lan_msix = 1;
10291 pf->num_iwarp_msix = 1;
10293 pf->num_lan_msix = 2;
10297 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
10298 pf->num_iwarp_msix = min_t(int, (vec / 3),
10300 pf->num_vmdq_vsis = min_t(int, (vec / 3),
10301 I40E_DEFAULT_NUM_VMDQ_VSI);
10303 pf->num_vmdq_vsis = min_t(int, (vec / 2),
10304 I40E_DEFAULT_NUM_VMDQ_VSI);
10306 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10307 pf->num_fdsb_msix = 1;
10310 pf->num_lan_msix = min_t(int,
10311 (vec - (pf->num_iwarp_msix + pf->num_vmdq_vsis)),
10313 pf->num_lan_qps = pf->num_lan_msix;
10318 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
10319 (pf->num_fdsb_msix == 0)) {
10320 dev_info(&pf->pdev->dev, "Sideband Flowdir disabled, not enough MSI-X vectors\n");
10321 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
10322 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
10324 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
10325 (pf->num_vmdq_msix == 0)) {
10326 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
10327 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
10330 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
10331 (pf->num_iwarp_msix == 0)) {
10332 dev_info(&pf->pdev->dev, "IWARP disabled, not enough MSI-X vectors\n");
10333 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
10335 i40e_debug(&pf->hw, I40E_DEBUG_INIT,
10336 "MSI-X vector distribution: PF %d, VMDq %d, FDSB %d, iWARP %d\n",
10338 pf->num_vmdq_msix * pf->num_vmdq_vsis,
10340 pf->num_iwarp_msix);
10346 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
10347 * @vsi: the VSI being configured
10348 * @v_idx: index of the vector in the vsi struct
10349 * @cpu: cpu to be used on affinity_mask
10351 * We allocate one q_vector. If allocation fails we return -ENOMEM.
10353 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx, int cpu)
10355 struct i40e_q_vector *q_vector;
10357 /* allocate q_vector */
10358 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
10362 q_vector->vsi = vsi;
10363 q_vector->v_idx = v_idx;
10364 cpumask_copy(&q_vector->affinity_mask, cpu_possible_mask);
10367 netif_napi_add(vsi->netdev, &q_vector->napi,
10368 i40e_napi_poll, NAPI_POLL_WEIGHT);
10370 q_vector->rx.latency_range = I40E_LOW_LATENCY;
10371 q_vector->tx.latency_range = I40E_LOW_LATENCY;
10373 /* tie q_vector and vsi together */
10374 vsi->q_vectors[v_idx] = q_vector;
10380 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
10381 * @vsi: the VSI being configured
10383 * We allocate one q_vector per queue interrupt. If allocation fails we
10386 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
10388 struct i40e_pf *pf = vsi->back;
10389 int err, v_idx, num_q_vectors, current_cpu;
10391 /* if not MSIX, give the one vector only to the LAN VSI */
10392 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
10393 num_q_vectors = vsi->num_q_vectors;
10394 else if (vsi == pf->vsi[pf->lan_vsi])
10399 current_cpu = cpumask_first(cpu_online_mask);
10401 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
10402 err = i40e_vsi_alloc_q_vector(vsi, v_idx, current_cpu);
10405 current_cpu = cpumask_next(current_cpu, cpu_online_mask);
10406 if (unlikely(current_cpu >= nr_cpu_ids))
10407 current_cpu = cpumask_first(cpu_online_mask);
10414 i40e_free_q_vector(vsi, v_idx);
10420 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
10421 * @pf: board private structure to initialize
10423 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
10428 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
10429 vectors = i40e_init_msix(pf);
10431 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
10432 I40E_FLAG_IWARP_ENABLED |
10433 I40E_FLAG_RSS_ENABLED |
10434 I40E_FLAG_DCB_CAPABLE |
10435 I40E_FLAG_DCB_ENABLED |
10436 I40E_FLAG_SRIOV_ENABLED |
10437 I40E_FLAG_FD_SB_ENABLED |
10438 I40E_FLAG_FD_ATR_ENABLED |
10439 I40E_FLAG_VMDQ_ENABLED);
10440 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
10442 /* rework the queue expectations without MSIX */
10443 i40e_determine_queue_usage(pf);
10447 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10448 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
10449 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
10450 vectors = pci_enable_msi(pf->pdev);
10452 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
10454 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
10456 vectors = 1; /* one MSI or Legacy vector */
10459 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
10460 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
10462 /* set up vector assignment tracking */
10463 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
10464 pf->irq_pile = kzalloc(size, GFP_KERNEL);
10465 if (!pf->irq_pile) {
10466 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
10469 pf->irq_pile->num_entries = vectors;
10470 pf->irq_pile->search_hint = 0;
10472 /* track first vector for misc interrupts, ignore return */
10473 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
10479 * i40e_restore_interrupt_scheme - Restore the interrupt scheme
10480 * @pf: private board data structure
10482 * Restore the interrupt scheme that was cleared when we suspended the
10483 * device. This should be called during resume to re-allocate the q_vectors
10484 * and reacquire IRQs.
10486 static int i40e_restore_interrupt_scheme(struct i40e_pf *pf)
10490 /* We cleared the MSI and MSI-X flags when disabling the old interrupt
10491 * scheme. We need to re-enabled them here in order to attempt to
10492 * re-acquire the MSI or MSI-X vectors
10494 pf->flags |= (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
10496 err = i40e_init_interrupt_scheme(pf);
10500 /* Now that we've re-acquired IRQs, we need to remap the vectors and
10501 * rings together again.
10503 for (i = 0; i < pf->num_alloc_vsi; i++) {
10505 err = i40e_vsi_alloc_q_vectors(pf->vsi[i]);
10508 i40e_vsi_map_rings_to_vectors(pf->vsi[i]);
10512 err = i40e_setup_misc_vector(pf);
10521 i40e_vsi_free_q_vectors(pf->vsi[i]);
10528 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
10529 * @pf: board private structure
10531 * This sets up the handler for MSIX 0, which is used to manage the
10532 * non-queue interrupts, e.g. AdminQ and errors. This is not used
10533 * when in MSI or Legacy interrupt mode.
10535 static int i40e_setup_misc_vector(struct i40e_pf *pf)
10537 struct i40e_hw *hw = &pf->hw;
10540 /* Only request the IRQ once, the first time through. */
10541 if (!test_and_set_bit(__I40E_MISC_IRQ_REQUESTED, pf->state)) {
10542 err = request_irq(pf->msix_entries[0].vector,
10543 i40e_intr, 0, pf->int_name, pf);
10545 clear_bit(__I40E_MISC_IRQ_REQUESTED, pf->state);
10546 dev_info(&pf->pdev->dev,
10547 "request_irq for %s failed: %d\n",
10548 pf->int_name, err);
10553 i40e_enable_misc_int_causes(pf);
10555 /* associate no queues to the misc vector */
10556 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
10557 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
10561 i40e_irq_dynamic_enable_icr0(pf);
10567 * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands
10568 * @vsi: Pointer to vsi structure
10569 * @seed: Buffter to store the hash keys
10570 * @lut: Buffer to store the lookup table entries
10571 * @lut_size: Size of buffer to store the lookup table entries
10573 * Return 0 on success, negative on failure
10575 static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
10576 u8 *lut, u16 lut_size)
10578 struct i40e_pf *pf = vsi->back;
10579 struct i40e_hw *hw = &pf->hw;
10583 ret = i40e_aq_get_rss_key(hw, vsi->id,
10584 (struct i40e_aqc_get_set_rss_key_data *)seed);
10586 dev_info(&pf->pdev->dev,
10587 "Cannot get RSS key, err %s aq_err %s\n",
10588 i40e_stat_str(&pf->hw, ret),
10589 i40e_aq_str(&pf->hw,
10590 pf->hw.aq.asq_last_status));
10596 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;
10598 ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
10600 dev_info(&pf->pdev->dev,
10601 "Cannot get RSS lut, err %s aq_err %s\n",
10602 i40e_stat_str(&pf->hw, ret),
10603 i40e_aq_str(&pf->hw,
10604 pf->hw.aq.asq_last_status));
10613 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
10614 * @vsi: Pointer to vsi structure
10615 * @seed: RSS hash seed
10616 * @lut: Lookup table
10617 * @lut_size: Lookup table size
10619 * Returns 0 on success, negative on failure
10621 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
10622 const u8 *lut, u16 lut_size)
10624 struct i40e_pf *pf = vsi->back;
10625 struct i40e_hw *hw = &pf->hw;
10626 u16 vf_id = vsi->vf_id;
10629 /* Fill out hash function seed */
10631 u32 *seed_dw = (u32 *)seed;
10633 if (vsi->type == I40E_VSI_MAIN) {
10634 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
10635 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
10636 } else if (vsi->type == I40E_VSI_SRIOV) {
10637 for (i = 0; i <= I40E_VFQF_HKEY1_MAX_INDEX; i++)
10638 wr32(hw, I40E_VFQF_HKEY1(i, vf_id), seed_dw[i]);
10640 dev_err(&pf->pdev->dev, "Cannot set RSS seed - invalid VSI type\n");
10645 u32 *lut_dw = (u32 *)lut;
10647 if (vsi->type == I40E_VSI_MAIN) {
10648 if (lut_size != I40E_HLUT_ARRAY_SIZE)
10650 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
10651 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
10652 } else if (vsi->type == I40E_VSI_SRIOV) {
10653 if (lut_size != I40E_VF_HLUT_ARRAY_SIZE)
10655 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
10656 wr32(hw, I40E_VFQF_HLUT1(i, vf_id), lut_dw[i]);
10658 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
10667 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
10668 * @vsi: Pointer to VSI structure
10669 * @seed: Buffer to store the keys
10670 * @lut: Buffer to store the lookup table entries
10671 * @lut_size: Size of buffer to store the lookup table entries
10673 * Returns 0 on success, negative on failure
10675 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
10676 u8 *lut, u16 lut_size)
10678 struct i40e_pf *pf = vsi->back;
10679 struct i40e_hw *hw = &pf->hw;
10683 u32 *seed_dw = (u32 *)seed;
10685 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
10686 seed_dw[i] = i40e_read_rx_ctl(hw, I40E_PFQF_HKEY(i));
10689 u32 *lut_dw = (u32 *)lut;
10691 if (lut_size != I40E_HLUT_ARRAY_SIZE)
10693 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
10694 lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
10701 * i40e_config_rss - Configure RSS keys and lut
10702 * @vsi: Pointer to VSI structure
10703 * @seed: RSS hash seed
10704 * @lut: Lookup table
10705 * @lut_size: Lookup table size
10707 * Returns 0 on success, negative on failure
10709 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
10711 struct i40e_pf *pf = vsi->back;
10713 if (pf->hw_features & I40E_HW_RSS_AQ_CAPABLE)
10714 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
10716 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
10720 * i40e_get_rss - Get RSS keys and lut
10721 * @vsi: Pointer to VSI structure
10722 * @seed: Buffer to store the keys
10723 * @lut: Buffer to store the lookup table entries
10724 * lut_size: Size of buffer to store the lookup table entries
10726 * Returns 0 on success, negative on failure
10728 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
10730 struct i40e_pf *pf = vsi->back;
10732 if (pf->hw_features & I40E_HW_RSS_AQ_CAPABLE)
10733 return i40e_get_rss_aq(vsi, seed, lut, lut_size);
10735 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
10739 * i40e_fill_rss_lut - Fill the RSS lookup table with default values
10740 * @pf: Pointer to board private structure
10741 * @lut: Lookup table
10742 * @rss_table_size: Lookup table size
10743 * @rss_size: Range of queue number for hashing
10745 void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
10746 u16 rss_table_size, u16 rss_size)
10750 for (i = 0; i < rss_table_size; i++)
10751 lut[i] = i % rss_size;
10755 * i40e_pf_config_rss - Prepare for RSS if used
10756 * @pf: board private structure
10758 static int i40e_pf_config_rss(struct i40e_pf *pf)
10760 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
10761 u8 seed[I40E_HKEY_ARRAY_SIZE];
10763 struct i40e_hw *hw = &pf->hw;
10768 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
10769 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
10770 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
10771 hena |= i40e_pf_get_default_rss_hena(pf);
10773 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
10774 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
10776 /* Determine the RSS table size based on the hardware capabilities */
10777 reg_val = i40e_read_rx_ctl(hw, I40E_PFQF_CTL_0);
10778 reg_val = (pf->rss_table_size == 512) ?
10779 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
10780 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
10781 i40e_write_rx_ctl(hw, I40E_PFQF_CTL_0, reg_val);
10783 /* Determine the RSS size of the VSI */
10784 if (!vsi->rss_size) {
10787 qcount = vsi->num_queue_pairs / vsi->tc_config.numtc;
10788 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount);
10790 if (!vsi->rss_size)
10793 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
10797 /* Use user configured lut if there is one, otherwise use default */
10798 if (vsi->rss_lut_user)
10799 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
10801 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
10803 /* Use user configured hash key if there is one, otherwise
10806 if (vsi->rss_hkey_user)
10807 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
10809 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
10810 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
10817 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
10818 * @pf: board private structure
10819 * @queue_count: the requested queue count for rss.
10821 * returns 0 if rss is not enabled, if enabled returns the final rss queue
10822 * count which may be different from the requested queue count.
10823 * Note: expects to be called while under rtnl_lock()
10825 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
10827 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
10830 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
10833 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
10835 if (queue_count != vsi->num_queue_pairs) {
10838 vsi->req_queue_pairs = queue_count;
10839 i40e_prep_for_reset(pf, true);
10841 pf->alloc_rss_size = new_rss_size;
10843 i40e_reset_and_rebuild(pf, true, true);
10845 /* Discard the user configured hash keys and lut, if less
10846 * queues are enabled.
10848 if (queue_count < vsi->rss_size) {
10849 i40e_clear_rss_config_user(vsi);
10850 dev_dbg(&pf->pdev->dev,
10851 "discard user configured hash keys and lut\n");
10854 /* Reset vsi->rss_size, as number of enabled queues changed */
10855 qcount = vsi->num_queue_pairs / vsi->tc_config.numtc;
10856 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount);
10858 i40e_pf_config_rss(pf);
10860 dev_info(&pf->pdev->dev, "User requested queue count/HW max RSS count: %d/%d\n",
10861 vsi->req_queue_pairs, pf->rss_size_max);
10862 return pf->alloc_rss_size;
10866 * i40e_get_partition_bw_setting - Retrieve BW settings for this PF partition
10867 * @pf: board private structure
10869 i40e_status i40e_get_partition_bw_setting(struct i40e_pf *pf)
10871 i40e_status status;
10872 bool min_valid, max_valid;
10873 u32 max_bw, min_bw;
10875 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
10876 &min_valid, &max_valid);
10880 pf->min_bw = min_bw;
10882 pf->max_bw = max_bw;
10889 * i40e_set_partition_bw_setting - Set BW settings for this PF partition
10890 * @pf: board private structure
10892 i40e_status i40e_set_partition_bw_setting(struct i40e_pf *pf)
10894 struct i40e_aqc_configure_partition_bw_data bw_data;
10895 i40e_status status;
10897 /* Set the valid bit for this PF */
10898 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
10899 bw_data.max_bw[pf->hw.pf_id] = pf->max_bw & I40E_ALT_BW_VALUE_MASK;
10900 bw_data.min_bw[pf->hw.pf_id] = pf->min_bw & I40E_ALT_BW_VALUE_MASK;
10902 /* Set the new bandwidths */
10903 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
10909 * i40e_commit_partition_bw_setting - Commit BW settings for this PF partition
10910 * @pf: board private structure
10912 i40e_status i40e_commit_partition_bw_setting(struct i40e_pf *pf)
10914 /* Commit temporary BW setting to permanent NVM image */
10915 enum i40e_admin_queue_err last_aq_status;
10919 if (pf->hw.partition_id != 1) {
10920 dev_info(&pf->pdev->dev,
10921 "Commit BW only works on partition 1! This is partition %d",
10922 pf->hw.partition_id);
10923 ret = I40E_NOT_SUPPORTED;
10924 goto bw_commit_out;
10927 /* Acquire NVM for read access */
10928 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
10929 last_aq_status = pf->hw.aq.asq_last_status;
10931 dev_info(&pf->pdev->dev,
10932 "Cannot acquire NVM for read access, err %s aq_err %s\n",
10933 i40e_stat_str(&pf->hw, ret),
10934 i40e_aq_str(&pf->hw, last_aq_status));
10935 goto bw_commit_out;
10938 /* Read word 0x10 of NVM - SW compatibility word 1 */
10939 ret = i40e_aq_read_nvm(&pf->hw,
10940 I40E_SR_NVM_CONTROL_WORD,
10941 0x10, sizeof(nvm_word), &nvm_word,
10943 /* Save off last admin queue command status before releasing
10946 last_aq_status = pf->hw.aq.asq_last_status;
10947 i40e_release_nvm(&pf->hw);
10949 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
10950 i40e_stat_str(&pf->hw, ret),
10951 i40e_aq_str(&pf->hw, last_aq_status));
10952 goto bw_commit_out;
10955 /* Wait a bit for NVM release to complete */
10958 /* Acquire NVM for write access */
10959 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
10960 last_aq_status = pf->hw.aq.asq_last_status;
10962 dev_info(&pf->pdev->dev,
10963 "Cannot acquire NVM for write access, err %s aq_err %s\n",
10964 i40e_stat_str(&pf->hw, ret),
10965 i40e_aq_str(&pf->hw, last_aq_status));
10966 goto bw_commit_out;
10968 /* Write it back out unchanged to initiate update NVM,
10969 * which will force a write of the shadow (alt) RAM to
10970 * the NVM - thus storing the bandwidth values permanently.
10972 ret = i40e_aq_update_nvm(&pf->hw,
10973 I40E_SR_NVM_CONTROL_WORD,
10974 0x10, sizeof(nvm_word),
10975 &nvm_word, true, NULL);
10976 /* Save off last admin queue command status before releasing
10979 last_aq_status = pf->hw.aq.asq_last_status;
10980 i40e_release_nvm(&pf->hw);
10982 dev_info(&pf->pdev->dev,
10983 "BW settings NOT SAVED, err %s aq_err %s\n",
10984 i40e_stat_str(&pf->hw, ret),
10985 i40e_aq_str(&pf->hw, last_aq_status));
10992 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
10993 * @pf: board private structure to initialize
10995 * i40e_sw_init initializes the Adapter private data structure.
10996 * Fields are initialized based on PCI device information and
10997 * OS network device settings (MTU size).
10999 static int i40e_sw_init(struct i40e_pf *pf)
11004 /* Set default capability flags */
11005 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
11006 I40E_FLAG_MSI_ENABLED |
11007 I40E_FLAG_MSIX_ENABLED;
11009 /* Set default ITR */
11010 pf->rx_itr_default = I40E_ITR_RX_DEF;
11011 pf->tx_itr_default = I40E_ITR_TX_DEF;
11013 /* Depending on PF configurations, it is possible that the RSS
11014 * maximum might end up larger than the available queues
11016 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
11017 pf->alloc_rss_size = 1;
11018 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
11019 pf->rss_size_max = min_t(int, pf->rss_size_max,
11020 pf->hw.func_caps.num_tx_qp);
11021 if (pf->hw.func_caps.rss) {
11022 pf->flags |= I40E_FLAG_RSS_ENABLED;
11023 pf->alloc_rss_size = min_t(int, pf->rss_size_max,
11024 num_online_cpus());
11027 /* MFP mode enabled */
11028 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
11029 pf->flags |= I40E_FLAG_MFP_ENABLED;
11030 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
11031 if (i40e_get_partition_bw_setting(pf)) {
11032 dev_warn(&pf->pdev->dev,
11033 "Could not get partition bw settings\n");
11035 dev_info(&pf->pdev->dev,
11036 "Partition BW Min = %8.8x, Max = %8.8x\n",
11037 pf->min_bw, pf->max_bw);
11039 /* nudge the Tx scheduler */
11040 i40e_set_partition_bw_setting(pf);
11044 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
11045 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
11046 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
11047 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
11048 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
11049 pf->hw.num_partitions > 1)
11050 dev_info(&pf->pdev->dev,
11051 "Flow Director Sideband mode Disabled in MFP mode\n");
11053 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
11054 pf->fdir_pf_filter_count =
11055 pf->hw.func_caps.fd_filters_guaranteed;
11056 pf->hw.fdir_shared_filter_count =
11057 pf->hw.func_caps.fd_filters_best_effort;
11060 if (pf->hw.mac.type == I40E_MAC_X722) {
11061 pf->hw_features |= (I40E_HW_RSS_AQ_CAPABLE |
11062 I40E_HW_128_QP_RSS_CAPABLE |
11063 I40E_HW_ATR_EVICT_CAPABLE |
11064 I40E_HW_WB_ON_ITR_CAPABLE |
11065 I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE |
11066 I40E_HW_NO_PCI_LINK_CHECK |
11067 I40E_HW_USE_SET_LLDP_MIB |
11068 I40E_HW_GENEVE_OFFLOAD_CAPABLE |
11069 I40E_HW_PTP_L4_CAPABLE |
11070 I40E_HW_WOL_MC_MAGIC_PKT_WAKE |
11071 I40E_HW_OUTER_UDP_CSUM_CAPABLE);
11073 #define I40E_FDEVICT_PCTYPE_DEFAULT 0xc03
11074 if (rd32(&pf->hw, I40E_GLQF_FDEVICTENA(1)) !=
11075 I40E_FDEVICT_PCTYPE_DEFAULT) {
11076 dev_warn(&pf->pdev->dev,
11077 "FD EVICT PCTYPES are not right, disable FD HW EVICT\n");
11078 pf->hw_features &= ~I40E_HW_ATR_EVICT_CAPABLE;
11080 } else if ((pf->hw.aq.api_maj_ver > 1) ||
11081 ((pf->hw.aq.api_maj_ver == 1) &&
11082 (pf->hw.aq.api_min_ver > 4))) {
11083 /* Supported in FW API version higher than 1.4 */
11084 pf->hw_features |= I40E_HW_GENEVE_OFFLOAD_CAPABLE;
11087 /* Enable HW ATR eviction if possible */
11088 if (pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE)
11089 pf->flags |= I40E_FLAG_HW_ATR_EVICT_ENABLED;
11091 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
11092 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
11093 (pf->hw.aq.fw_maj_ver < 4))) {
11094 pf->hw_features |= I40E_HW_RESTART_AUTONEG;
11095 /* No DCB support for FW < v4.33 */
11096 pf->hw_features |= I40E_HW_NO_DCB_SUPPORT;
11099 /* Disable FW LLDP if FW < v4.3 */
11100 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
11101 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
11102 (pf->hw.aq.fw_maj_ver < 4)))
11103 pf->hw_features |= I40E_HW_STOP_FW_LLDP;
11105 /* Use the FW Set LLDP MIB API if FW > v4.40 */
11106 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
11107 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver >= 40)) ||
11108 (pf->hw.aq.fw_maj_ver >= 5)))
11109 pf->hw_features |= I40E_HW_USE_SET_LLDP_MIB;
11111 /* Enable PTP L4 if FW > v6.0 */
11112 if (pf->hw.mac.type == I40E_MAC_XL710 &&
11113 pf->hw.aq.fw_maj_ver >= 6)
11114 pf->hw_features |= I40E_HW_PTP_L4_CAPABLE;
11116 if (pf->hw.func_caps.vmdq) {
11117 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
11118 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
11119 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
11122 if (pf->hw.func_caps.iwarp) {
11123 pf->flags |= I40E_FLAG_IWARP_ENABLED;
11124 /* IWARP needs one extra vector for CQP just like MISC.*/
11125 pf->num_iwarp_msix = (int)num_online_cpus() + 1;
11128 #ifdef CONFIG_PCI_IOV
11129 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
11130 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
11131 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
11132 pf->num_req_vfs = min_t(int,
11133 pf->hw.func_caps.num_vfs,
11134 I40E_MAX_VF_COUNT);
11136 #endif /* CONFIG_PCI_IOV */
11137 pf->eeprom_version = 0xDEAD;
11138 pf->lan_veb = I40E_NO_VEB;
11139 pf->lan_vsi = I40E_NO_VSI;
11141 /* By default FW has this off for performance reasons */
11142 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
11144 /* set up queue assignment tracking */
11145 size = sizeof(struct i40e_lump_tracking)
11146 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
11147 pf->qp_pile = kzalloc(size, GFP_KERNEL);
11148 if (!pf->qp_pile) {
11152 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
11153 pf->qp_pile->search_hint = 0;
11155 pf->tx_timeout_recovery_level = 1;
11157 mutex_init(&pf->switch_mutex);
11164 * i40e_set_ntuple - set the ntuple feature flag and take action
11165 * @pf: board private structure to initialize
11166 * @features: the feature set that the stack is suggesting
11168 * returns a bool to indicate if reset needs to happen
11170 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
11172 bool need_reset = false;
11174 /* Check if Flow Director n-tuple support was enabled or disabled. If
11175 * the state changed, we need to reset.
11177 if (features & NETIF_F_NTUPLE) {
11178 /* Enable filters and mark for reset */
11179 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
11181 /* enable FD_SB only if there is MSI-X vector and no cloud
11184 if (pf->num_fdsb_msix > 0 && !pf->num_cloud_filters) {
11185 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
11186 pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
11189 /* turn off filters, mark for reset and clear SW filter list */
11190 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
11192 i40e_fdir_filter_exit(pf);
11194 pf->flags &= ~(I40E_FLAG_FD_SB_ENABLED |
11195 I40E_FLAG_FD_SB_AUTO_DISABLED);
11196 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
11198 /* reset fd counters */
11199 pf->fd_add_err = 0;
11200 pf->fd_atr_cnt = 0;
11201 /* if ATR was auto disabled it can be re-enabled. */
11202 if (pf->flags & I40E_FLAG_FD_ATR_AUTO_DISABLED) {
11203 pf->flags &= ~I40E_FLAG_FD_ATR_AUTO_DISABLED;
11204 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
11205 (I40E_DEBUG_FD & pf->hw.debug_mask))
11206 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
11213 * i40e_clear_rss_lut - clear the rx hash lookup table
11214 * @vsi: the VSI being configured
11216 static void i40e_clear_rss_lut(struct i40e_vsi *vsi)
11218 struct i40e_pf *pf = vsi->back;
11219 struct i40e_hw *hw = &pf->hw;
11220 u16 vf_id = vsi->vf_id;
11223 if (vsi->type == I40E_VSI_MAIN) {
11224 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
11225 wr32(hw, I40E_PFQF_HLUT(i), 0);
11226 } else if (vsi->type == I40E_VSI_SRIOV) {
11227 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
11228 i40e_write_rx_ctl(hw, I40E_VFQF_HLUT1(i, vf_id), 0);
11230 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
11235 * i40e_set_features - set the netdev feature flags
11236 * @netdev: ptr to the netdev being adjusted
11237 * @features: the feature set that the stack is suggesting
11238 * Note: expects to be called while under rtnl_lock()
11240 static int i40e_set_features(struct net_device *netdev,
11241 netdev_features_t features)
11243 struct i40e_netdev_priv *np = netdev_priv(netdev);
11244 struct i40e_vsi *vsi = np->vsi;
11245 struct i40e_pf *pf = vsi->back;
11248 if (features & NETIF_F_RXHASH && !(netdev->features & NETIF_F_RXHASH))
11249 i40e_pf_config_rss(pf);
11250 else if (!(features & NETIF_F_RXHASH) &&
11251 netdev->features & NETIF_F_RXHASH)
11252 i40e_clear_rss_lut(vsi);
11254 if (features & NETIF_F_HW_VLAN_CTAG_RX)
11255 i40e_vlan_stripping_enable(vsi);
11257 i40e_vlan_stripping_disable(vsi);
11259 if (!(features & NETIF_F_HW_TC) && pf->num_cloud_filters) {
11260 dev_err(&pf->pdev->dev,
11261 "Offloaded tc filters active, can't turn hw_tc_offload off");
11265 need_reset = i40e_set_ntuple(pf, features);
11268 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
11274 * i40e_get_udp_port_idx - Lookup a possibly offloaded for Rx UDP port
11275 * @pf: board private structure
11276 * @port: The UDP port to look up
11278 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
11280 static u8 i40e_get_udp_port_idx(struct i40e_pf *pf, u16 port)
11284 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
11285 if (pf->udp_ports[i].port == port)
11293 * i40e_udp_tunnel_add - Get notifications about UDP tunnel ports that come up
11294 * @netdev: This physical port's netdev
11295 * @ti: Tunnel endpoint information
11297 static void i40e_udp_tunnel_add(struct net_device *netdev,
11298 struct udp_tunnel_info *ti)
11300 struct i40e_netdev_priv *np = netdev_priv(netdev);
11301 struct i40e_vsi *vsi = np->vsi;
11302 struct i40e_pf *pf = vsi->back;
11303 u16 port = ntohs(ti->port);
11307 idx = i40e_get_udp_port_idx(pf, port);
11309 /* Check if port already exists */
11310 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
11311 netdev_info(netdev, "port %d already offloaded\n", port);
11315 /* Now check if there is space to add the new port */
11316 next_idx = i40e_get_udp_port_idx(pf, 0);
11318 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
11319 netdev_info(netdev, "maximum number of offloaded UDP ports reached, not adding port %d\n",
11324 switch (ti->type) {
11325 case UDP_TUNNEL_TYPE_VXLAN:
11326 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_VXLAN;
11328 case UDP_TUNNEL_TYPE_GENEVE:
11329 if (!(pf->hw_features & I40E_HW_GENEVE_OFFLOAD_CAPABLE))
11331 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_NGE;
11337 /* New port: add it and mark its index in the bitmap */
11338 pf->udp_ports[next_idx].port = port;
11339 pf->pending_udp_bitmap |= BIT_ULL(next_idx);
11340 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
11344 * i40e_udp_tunnel_del - Get notifications about UDP tunnel ports that go away
11345 * @netdev: This physical port's netdev
11346 * @ti: Tunnel endpoint information
11348 static void i40e_udp_tunnel_del(struct net_device *netdev,
11349 struct udp_tunnel_info *ti)
11351 struct i40e_netdev_priv *np = netdev_priv(netdev);
11352 struct i40e_vsi *vsi = np->vsi;
11353 struct i40e_pf *pf = vsi->back;
11354 u16 port = ntohs(ti->port);
11357 idx = i40e_get_udp_port_idx(pf, port);
11359 /* Check if port already exists */
11360 if (idx >= I40E_MAX_PF_UDP_OFFLOAD_PORTS)
11363 switch (ti->type) {
11364 case UDP_TUNNEL_TYPE_VXLAN:
11365 if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_VXLAN)
11368 case UDP_TUNNEL_TYPE_GENEVE:
11369 if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_NGE)
11376 /* if port exists, set it to 0 (mark for deletion)
11377 * and make it pending
11379 pf->udp_ports[idx].port = 0;
11380 pf->pending_udp_bitmap |= BIT_ULL(idx);
11381 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
11385 netdev_warn(netdev, "UDP port %d was not found, not deleting\n",
11389 static int i40e_get_phys_port_id(struct net_device *netdev,
11390 struct netdev_phys_item_id *ppid)
11392 struct i40e_netdev_priv *np = netdev_priv(netdev);
11393 struct i40e_pf *pf = np->vsi->back;
11394 struct i40e_hw *hw = &pf->hw;
11396 if (!(pf->hw_features & I40E_HW_PORT_ID_VALID))
11397 return -EOPNOTSUPP;
11399 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
11400 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
11406 * i40e_ndo_fdb_add - add an entry to the hardware database
11407 * @ndm: the input from the stack
11408 * @tb: pointer to array of nladdr (unused)
11409 * @dev: the net device pointer
11410 * @addr: the MAC address entry being added
11411 * @flags: instructions from stack about fdb operation
11413 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
11414 struct net_device *dev,
11415 const unsigned char *addr, u16 vid,
11418 struct i40e_netdev_priv *np = netdev_priv(dev);
11419 struct i40e_pf *pf = np->vsi->back;
11422 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
11423 return -EOPNOTSUPP;
11426 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
11430 /* Hardware does not support aging addresses so if a
11431 * ndm_state is given only allow permanent addresses
11433 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
11434 netdev_info(dev, "FDB only supports static addresses\n");
11438 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
11439 err = dev_uc_add_excl(dev, addr);
11440 else if (is_multicast_ether_addr(addr))
11441 err = dev_mc_add_excl(dev, addr);
11445 /* Only return duplicate errors if NLM_F_EXCL is set */
11446 if (err == -EEXIST && !(flags & NLM_F_EXCL))
11453 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
11454 * @dev: the netdev being configured
11455 * @nlh: RTNL message
11457 * Inserts a new hardware bridge if not already created and
11458 * enables the bridging mode requested (VEB or VEPA). If the
11459 * hardware bridge has already been inserted and the request
11460 * is to change the mode then that requires a PF reset to
11461 * allow rebuild of the components with required hardware
11462 * bridge mode enabled.
11464 * Note: expects to be called while under rtnl_lock()
11466 static int i40e_ndo_bridge_setlink(struct net_device *dev,
11467 struct nlmsghdr *nlh,
11470 struct i40e_netdev_priv *np = netdev_priv(dev);
11471 struct i40e_vsi *vsi = np->vsi;
11472 struct i40e_pf *pf = vsi->back;
11473 struct i40e_veb *veb = NULL;
11474 struct nlattr *attr, *br_spec;
11477 /* Only for PF VSI for now */
11478 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
11479 return -EOPNOTSUPP;
11481 /* Find the HW bridge for PF VSI */
11482 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
11483 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
11487 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
11489 nla_for_each_nested(attr, br_spec, rem) {
11492 if (nla_type(attr) != IFLA_BRIDGE_MODE)
11495 mode = nla_get_u16(attr);
11496 if ((mode != BRIDGE_MODE_VEPA) &&
11497 (mode != BRIDGE_MODE_VEB))
11500 /* Insert a new HW bridge */
11502 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
11503 vsi->tc_config.enabled_tc);
11505 veb->bridge_mode = mode;
11506 i40e_config_bridge_mode(veb);
11508 /* No Bridge HW offload available */
11512 } else if (mode != veb->bridge_mode) {
11513 /* Existing HW bridge but different mode needs reset */
11514 veb->bridge_mode = mode;
11515 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
11516 if (mode == BRIDGE_MODE_VEB)
11517 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
11519 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
11520 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
11529 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
11532 * @seq: RTNL message seq #
11533 * @dev: the netdev being configured
11534 * @filter_mask: unused
11535 * @nlflags: netlink flags passed in
11537 * Return the mode in which the hardware bridge is operating in
11540 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
11541 struct net_device *dev,
11542 u32 __always_unused filter_mask,
11545 struct i40e_netdev_priv *np = netdev_priv(dev);
11546 struct i40e_vsi *vsi = np->vsi;
11547 struct i40e_pf *pf = vsi->back;
11548 struct i40e_veb *veb = NULL;
11551 /* Only for PF VSI for now */
11552 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
11553 return -EOPNOTSUPP;
11555 /* Find the HW bridge for the PF VSI */
11556 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
11557 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
11564 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
11565 0, 0, nlflags, filter_mask, NULL);
11569 * i40e_features_check - Validate encapsulated packet conforms to limits
11571 * @dev: This physical port's netdev
11572 * @features: Offload features that the stack believes apply
11574 static netdev_features_t i40e_features_check(struct sk_buff *skb,
11575 struct net_device *dev,
11576 netdev_features_t features)
11580 /* No point in doing any of this if neither checksum nor GSO are
11581 * being requested for this frame. We can rule out both by just
11582 * checking for CHECKSUM_PARTIAL
11584 if (skb->ip_summed != CHECKSUM_PARTIAL)
11587 /* We cannot support GSO if the MSS is going to be less than
11588 * 64 bytes. If it is then we need to drop support for GSO.
11590 if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_size < 64))
11591 features &= ~NETIF_F_GSO_MASK;
11593 /* MACLEN can support at most 63 words */
11594 len = skb_network_header(skb) - skb->data;
11595 if (len & ~(63 * 2))
11598 /* IPLEN and EIPLEN can support at most 127 dwords */
11599 len = skb_transport_header(skb) - skb_network_header(skb);
11600 if (len & ~(127 * 4))
11603 if (skb->encapsulation) {
11604 /* L4TUNLEN can support 127 words */
11605 len = skb_inner_network_header(skb) - skb_transport_header(skb);
11606 if (len & ~(127 * 2))
11609 /* IPLEN can support at most 127 dwords */
11610 len = skb_inner_transport_header(skb) -
11611 skb_inner_network_header(skb);
11612 if (len & ~(127 * 4))
11616 /* No need to validate L4LEN as TCP is the only protocol with a
11617 * a flexible value and we support all possible values supported
11618 * by TCP, which is at most 15 dwords
11623 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
11627 * i40e_xdp_setup - add/remove an XDP program
11628 * @vsi: VSI to changed
11629 * @prog: XDP program
11631 static int i40e_xdp_setup(struct i40e_vsi *vsi,
11632 struct bpf_prog *prog)
11634 int frame_size = vsi->netdev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
11635 struct i40e_pf *pf = vsi->back;
11636 struct bpf_prog *old_prog;
11640 /* Don't allow frames that span over multiple buffers */
11641 if (frame_size > vsi->rx_buf_len)
11644 if (!i40e_enabled_xdp_vsi(vsi) && !prog)
11647 /* When turning XDP on->off/off->on we reset and rebuild the rings. */
11648 need_reset = (i40e_enabled_xdp_vsi(vsi) != !!prog);
11651 i40e_prep_for_reset(pf, true);
11653 old_prog = xchg(&vsi->xdp_prog, prog);
11656 i40e_reset_and_rebuild(pf, true, true);
11658 for (i = 0; i < vsi->num_queue_pairs; i++)
11659 WRITE_ONCE(vsi->rx_rings[i]->xdp_prog, vsi->xdp_prog);
11662 bpf_prog_put(old_prog);
11668 * i40e_xdp - implements ndo_bpf for i40e
11670 * @xdp: XDP command
11672 static int i40e_xdp(struct net_device *dev,
11673 struct netdev_bpf *xdp)
11675 struct i40e_netdev_priv *np = netdev_priv(dev);
11676 struct i40e_vsi *vsi = np->vsi;
11678 if (vsi->type != I40E_VSI_MAIN)
11681 switch (xdp->command) {
11682 case XDP_SETUP_PROG:
11683 return i40e_xdp_setup(vsi, xdp->prog);
11684 case XDP_QUERY_PROG:
11685 xdp->prog_attached = i40e_enabled_xdp_vsi(vsi);
11686 xdp->prog_id = vsi->xdp_prog ? vsi->xdp_prog->aux->id : 0;
11693 static const struct net_device_ops i40e_netdev_ops = {
11694 .ndo_open = i40e_open,
11695 .ndo_stop = i40e_close,
11696 .ndo_start_xmit = i40e_lan_xmit_frame,
11697 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
11698 .ndo_set_rx_mode = i40e_set_rx_mode,
11699 .ndo_validate_addr = eth_validate_addr,
11700 .ndo_set_mac_address = i40e_set_mac,
11701 .ndo_change_mtu = i40e_change_mtu,
11702 .ndo_do_ioctl = i40e_ioctl,
11703 .ndo_tx_timeout = i40e_tx_timeout,
11704 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
11705 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
11706 #ifdef CONFIG_NET_POLL_CONTROLLER
11707 .ndo_poll_controller = i40e_netpoll,
11709 .ndo_setup_tc = __i40e_setup_tc,
11710 .ndo_set_features = i40e_set_features,
11711 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
11712 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
11713 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
11714 .ndo_get_vf_config = i40e_ndo_get_vf_config,
11715 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
11716 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
11717 .ndo_set_vf_trust = i40e_ndo_set_vf_trust,
11718 .ndo_udp_tunnel_add = i40e_udp_tunnel_add,
11719 .ndo_udp_tunnel_del = i40e_udp_tunnel_del,
11720 .ndo_get_phys_port_id = i40e_get_phys_port_id,
11721 .ndo_fdb_add = i40e_ndo_fdb_add,
11722 .ndo_features_check = i40e_features_check,
11723 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
11724 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
11725 .ndo_bpf = i40e_xdp,
11729 * i40e_config_netdev - Setup the netdev flags
11730 * @vsi: the VSI being configured
11732 * Returns 0 on success, negative value on failure
11734 static int i40e_config_netdev(struct i40e_vsi *vsi)
11736 struct i40e_pf *pf = vsi->back;
11737 struct i40e_hw *hw = &pf->hw;
11738 struct i40e_netdev_priv *np;
11739 struct net_device *netdev;
11740 u8 broadcast[ETH_ALEN];
11741 u8 mac_addr[ETH_ALEN];
11743 netdev_features_t hw_enc_features;
11744 netdev_features_t hw_features;
11746 etherdev_size = sizeof(struct i40e_netdev_priv);
11747 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
11751 vsi->netdev = netdev;
11752 np = netdev_priv(netdev);
11755 hw_enc_features = NETIF_F_SG |
11757 NETIF_F_IPV6_CSUM |
11759 NETIF_F_SOFT_FEATURES |
11764 NETIF_F_GSO_GRE_CSUM |
11765 NETIF_F_GSO_PARTIAL |
11766 NETIF_F_GSO_UDP_TUNNEL |
11767 NETIF_F_GSO_UDP_TUNNEL_CSUM |
11773 if (!(pf->hw_features & I40E_HW_OUTER_UDP_CSUM_CAPABLE))
11774 netdev->gso_partial_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;
11776 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
11778 netdev->hw_enc_features |= hw_enc_features;
11780 /* record features VLANs can make use of */
11781 netdev->vlan_features |= hw_enc_features | NETIF_F_TSO_MANGLEID;
11783 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
11784 netdev->hw_features |= NETIF_F_NTUPLE | NETIF_F_HW_TC;
11786 hw_features = hw_enc_features |
11787 NETIF_F_HW_VLAN_CTAG_TX |
11788 NETIF_F_HW_VLAN_CTAG_RX;
11790 netdev->hw_features |= hw_features;
11792 netdev->features |= hw_features | NETIF_F_HW_VLAN_CTAG_FILTER;
11793 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
11795 if (vsi->type == I40E_VSI_MAIN) {
11796 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
11797 ether_addr_copy(mac_addr, hw->mac.perm_addr);
11798 /* The following steps are necessary for two reasons. First,
11799 * some older NVM configurations load a default MAC-VLAN
11800 * filter that will accept any tagged packet, and we want to
11801 * replace this with a normal filter. Additionally, it is
11802 * possible our MAC address was provided by the platform using
11803 * Open Firmware or similar.
11805 * Thus, we need to remove the default filter and install one
11806 * specific to the MAC address.
11808 i40e_rm_default_mac_filter(vsi, mac_addr);
11809 spin_lock_bh(&vsi->mac_filter_hash_lock);
11810 i40e_add_mac_filter(vsi, mac_addr);
11811 spin_unlock_bh(&vsi->mac_filter_hash_lock);
11813 /* Relate the VSI_VMDQ name to the VSI_MAIN name. Note that we
11814 * are still limited by IFNAMSIZ, but we're adding 'v%d\0' to
11815 * the end, which is 4 bytes long, so force truncation of the
11816 * original name by IFNAMSIZ - 4
11818 snprintf(netdev->name, IFNAMSIZ, "%.*sv%%d",
11820 pf->vsi[pf->lan_vsi]->netdev->name);
11821 random_ether_addr(mac_addr);
11823 spin_lock_bh(&vsi->mac_filter_hash_lock);
11824 i40e_add_mac_filter(vsi, mac_addr);
11825 spin_unlock_bh(&vsi->mac_filter_hash_lock);
11828 /* Add the broadcast filter so that we initially will receive
11829 * broadcast packets. Note that when a new VLAN is first added the
11830 * driver will convert all filters marked I40E_VLAN_ANY into VLAN
11831 * specific filters as part of transitioning into "vlan" operation.
11832 * When more VLANs are added, the driver will copy each existing MAC
11833 * filter and add it for the new VLAN.
11835 * Broadcast filters are handled specially by
11836 * i40e_sync_filters_subtask, as the driver must to set the broadcast
11837 * promiscuous bit instead of adding this directly as a MAC/VLAN
11838 * filter. The subtask will update the correct broadcast promiscuous
11839 * bits as VLANs become active or inactive.
11841 eth_broadcast_addr(broadcast);
11842 spin_lock_bh(&vsi->mac_filter_hash_lock);
11843 i40e_add_mac_filter(vsi, broadcast);
11844 spin_unlock_bh(&vsi->mac_filter_hash_lock);
11846 ether_addr_copy(netdev->dev_addr, mac_addr);
11847 ether_addr_copy(netdev->perm_addr, mac_addr);
11849 netdev->priv_flags |= IFF_UNICAST_FLT;
11850 netdev->priv_flags |= IFF_SUPP_NOFCS;
11851 /* Setup netdev TC information */
11852 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
11854 netdev->netdev_ops = &i40e_netdev_ops;
11855 netdev->watchdog_timeo = 5 * HZ;
11856 i40e_set_ethtool_ops(netdev);
11858 /* MTU range: 68 - 9706 */
11859 netdev->min_mtu = ETH_MIN_MTU;
11860 netdev->max_mtu = I40E_MAX_RXBUFFER - I40E_PACKET_HDR_PAD;
11866 * i40e_vsi_delete - Delete a VSI from the switch
11867 * @vsi: the VSI being removed
11869 * Returns 0 on success, negative value on failure
11871 static void i40e_vsi_delete(struct i40e_vsi *vsi)
11873 /* remove default VSI is not allowed */
11874 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
11877 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
11881 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
11882 * @vsi: the VSI being queried
11884 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
11886 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
11888 struct i40e_veb *veb;
11889 struct i40e_pf *pf = vsi->back;
11891 /* Uplink is not a bridge so default to VEB */
11892 if (vsi->veb_idx == I40E_NO_VEB)
11895 veb = pf->veb[vsi->veb_idx];
11897 dev_info(&pf->pdev->dev,
11898 "There is no veb associated with the bridge\n");
11902 /* Uplink is a bridge in VEPA mode */
11903 if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
11906 /* Uplink is a bridge in VEB mode */
11910 /* VEPA is now default bridge, so return 0 */
11915 * i40e_add_vsi - Add a VSI to the switch
11916 * @vsi: the VSI being configured
11918 * This initializes a VSI context depending on the VSI type to be added and
11919 * passes it down to the add_vsi aq command.
11921 static int i40e_add_vsi(struct i40e_vsi *vsi)
11924 struct i40e_pf *pf = vsi->back;
11925 struct i40e_hw *hw = &pf->hw;
11926 struct i40e_vsi_context ctxt;
11927 struct i40e_mac_filter *f;
11928 struct hlist_node *h;
11931 u8 enabled_tc = 0x1; /* TC0 enabled */
11934 memset(&ctxt, 0, sizeof(ctxt));
11935 switch (vsi->type) {
11936 case I40E_VSI_MAIN:
11937 /* The PF's main VSI is already setup as part of the
11938 * device initialization, so we'll not bother with
11939 * the add_vsi call, but we will retrieve the current
11942 ctxt.seid = pf->main_vsi_seid;
11943 ctxt.pf_num = pf->hw.pf_id;
11945 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
11946 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
11948 dev_info(&pf->pdev->dev,
11949 "couldn't get PF vsi config, err %s aq_err %s\n",
11950 i40e_stat_str(&pf->hw, ret),
11951 i40e_aq_str(&pf->hw,
11952 pf->hw.aq.asq_last_status));
11955 vsi->info = ctxt.info;
11956 vsi->info.valid_sections = 0;
11958 vsi->seid = ctxt.seid;
11959 vsi->id = ctxt.vsi_number;
11961 enabled_tc = i40e_pf_get_tc_map(pf);
11963 /* Source pruning is enabled by default, so the flag is
11964 * negative logic - if it's set, we need to fiddle with
11965 * the VSI to disable source pruning.
11967 if (pf->flags & I40E_FLAG_SOURCE_PRUNING_DISABLED) {
11968 memset(&ctxt, 0, sizeof(ctxt));
11969 ctxt.seid = pf->main_vsi_seid;
11970 ctxt.pf_num = pf->hw.pf_id;
11972 ctxt.info.valid_sections |=
11973 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
11974 ctxt.info.switch_id =
11975 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_LOCAL_LB);
11976 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
11978 dev_info(&pf->pdev->dev,
11979 "update vsi failed, err %s aq_err %s\n",
11980 i40e_stat_str(&pf->hw, ret),
11981 i40e_aq_str(&pf->hw,
11982 pf->hw.aq.asq_last_status));
11988 /* MFP mode setup queue map and update VSI */
11989 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
11990 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
11991 memset(&ctxt, 0, sizeof(ctxt));
11992 ctxt.seid = pf->main_vsi_seid;
11993 ctxt.pf_num = pf->hw.pf_id;
11995 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
11996 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
11998 dev_info(&pf->pdev->dev,
11999 "update vsi failed, err %s aq_err %s\n",
12000 i40e_stat_str(&pf->hw, ret),
12001 i40e_aq_str(&pf->hw,
12002 pf->hw.aq.asq_last_status));
12006 /* update the local VSI info queue map */
12007 i40e_vsi_update_queue_map(vsi, &ctxt);
12008 vsi->info.valid_sections = 0;
12010 /* Default/Main VSI is only enabled for TC0
12011 * reconfigure it to enable all TCs that are
12012 * available on the port in SFP mode.
12013 * For MFP case the iSCSI PF would use this
12014 * flow to enable LAN+iSCSI TC.
12016 ret = i40e_vsi_config_tc(vsi, enabled_tc);
12018 /* Single TC condition is not fatal,
12019 * message and continue
12021 dev_info(&pf->pdev->dev,
12022 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
12024 i40e_stat_str(&pf->hw, ret),
12025 i40e_aq_str(&pf->hw,
12026 pf->hw.aq.asq_last_status));
12031 case I40E_VSI_FDIR:
12032 ctxt.pf_num = hw->pf_id;
12034 ctxt.uplink_seid = vsi->uplink_seid;
12035 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
12036 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
12037 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
12038 (i40e_is_vsi_uplink_mode_veb(vsi))) {
12039 ctxt.info.valid_sections |=
12040 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
12041 ctxt.info.switch_id =
12042 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
12044 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
12047 case I40E_VSI_VMDQ2:
12048 ctxt.pf_num = hw->pf_id;
12050 ctxt.uplink_seid = vsi->uplink_seid;
12051 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
12052 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
12054 /* This VSI is connected to VEB so the switch_id
12055 * should be set to zero by default.
12057 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
12058 ctxt.info.valid_sections |=
12059 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
12060 ctxt.info.switch_id =
12061 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
12064 /* Setup the VSI tx/rx queue map for TC0 only for now */
12065 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
12068 case I40E_VSI_SRIOV:
12069 ctxt.pf_num = hw->pf_id;
12070 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
12071 ctxt.uplink_seid = vsi->uplink_seid;
12072 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
12073 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
12075 /* This VSI is connected to VEB so the switch_id
12076 * should be set to zero by default.
12078 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
12079 ctxt.info.valid_sections |=
12080 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
12081 ctxt.info.switch_id =
12082 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
12085 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
12086 ctxt.info.valid_sections |=
12087 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
12088 ctxt.info.queueing_opt_flags |=
12089 (I40E_AQ_VSI_QUE_OPT_TCP_ENA |
12090 I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI);
12093 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
12094 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
12095 if (pf->vf[vsi->vf_id].spoofchk) {
12096 ctxt.info.valid_sections |=
12097 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
12098 ctxt.info.sec_flags |=
12099 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
12100 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
12102 /* Setup the VSI tx/rx queue map for TC0 only for now */
12103 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
12106 case I40E_VSI_IWARP:
12107 /* send down message to iWARP */
12114 if (vsi->type != I40E_VSI_MAIN) {
12115 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
12117 dev_info(&vsi->back->pdev->dev,
12118 "add vsi failed, err %s aq_err %s\n",
12119 i40e_stat_str(&pf->hw, ret),
12120 i40e_aq_str(&pf->hw,
12121 pf->hw.aq.asq_last_status));
12125 vsi->info = ctxt.info;
12126 vsi->info.valid_sections = 0;
12127 vsi->seid = ctxt.seid;
12128 vsi->id = ctxt.vsi_number;
12131 vsi->active_filters = 0;
12132 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
12133 spin_lock_bh(&vsi->mac_filter_hash_lock);
12134 /* If macvlan filters already exist, force them to get loaded */
12135 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
12136 f->state = I40E_FILTER_NEW;
12139 spin_unlock_bh(&vsi->mac_filter_hash_lock);
12142 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
12143 pf->flags |= I40E_FLAG_FILTER_SYNC;
12146 /* Update VSI BW information */
12147 ret = i40e_vsi_get_bw_info(vsi);
12149 dev_info(&pf->pdev->dev,
12150 "couldn't get vsi bw info, err %s aq_err %s\n",
12151 i40e_stat_str(&pf->hw, ret),
12152 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
12153 /* VSI is already added so not tearing that up */
12162 * i40e_vsi_release - Delete a VSI and free its resources
12163 * @vsi: the VSI being removed
12165 * Returns 0 on success or < 0 on error
12167 int i40e_vsi_release(struct i40e_vsi *vsi)
12169 struct i40e_mac_filter *f;
12170 struct hlist_node *h;
12171 struct i40e_veb *veb = NULL;
12172 struct i40e_pf *pf;
12178 /* release of a VEB-owner or last VSI is not allowed */
12179 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
12180 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
12181 vsi->seid, vsi->uplink_seid);
12184 if (vsi == pf->vsi[pf->lan_vsi] &&
12185 !test_bit(__I40E_DOWN, pf->state)) {
12186 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
12190 uplink_seid = vsi->uplink_seid;
12191 if (vsi->type != I40E_VSI_SRIOV) {
12192 if (vsi->netdev_registered) {
12193 vsi->netdev_registered = false;
12195 /* results in a call to i40e_close() */
12196 unregister_netdev(vsi->netdev);
12199 i40e_vsi_close(vsi);
12201 i40e_vsi_disable_irq(vsi);
12204 spin_lock_bh(&vsi->mac_filter_hash_lock);
12206 /* clear the sync flag on all filters */
12208 __dev_uc_unsync(vsi->netdev, NULL);
12209 __dev_mc_unsync(vsi->netdev, NULL);
12212 /* make sure any remaining filters are marked for deletion */
12213 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
12214 __i40e_del_filter(vsi, f);
12216 spin_unlock_bh(&vsi->mac_filter_hash_lock);
12218 i40e_sync_vsi_filters(vsi);
12220 i40e_vsi_delete(vsi);
12221 i40e_vsi_free_q_vectors(vsi);
12223 free_netdev(vsi->netdev);
12224 vsi->netdev = NULL;
12226 i40e_vsi_clear_rings(vsi);
12227 i40e_vsi_clear(vsi);
12229 /* If this was the last thing on the VEB, except for the
12230 * controlling VSI, remove the VEB, which puts the controlling
12231 * VSI onto the next level down in the switch.
12233 * Well, okay, there's one more exception here: don't remove
12234 * the orphan VEBs yet. We'll wait for an explicit remove request
12235 * from up the network stack.
12237 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
12239 pf->vsi[i]->uplink_seid == uplink_seid &&
12240 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
12241 n++; /* count the VSIs */
12244 for (i = 0; i < I40E_MAX_VEB; i++) {
12247 if (pf->veb[i]->uplink_seid == uplink_seid)
12248 n++; /* count the VEBs */
12249 if (pf->veb[i]->seid == uplink_seid)
12252 if (n == 0 && veb && veb->uplink_seid != 0)
12253 i40e_veb_release(veb);
12259 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
12260 * @vsi: ptr to the VSI
12262 * This should only be called after i40e_vsi_mem_alloc() which allocates the
12263 * corresponding SW VSI structure and initializes num_queue_pairs for the
12264 * newly allocated VSI.
12266 * Returns 0 on success or negative on failure
12268 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
12271 struct i40e_pf *pf = vsi->back;
12273 if (vsi->q_vectors[0]) {
12274 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
12279 if (vsi->base_vector) {
12280 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
12281 vsi->seid, vsi->base_vector);
12285 ret = i40e_vsi_alloc_q_vectors(vsi);
12287 dev_info(&pf->pdev->dev,
12288 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
12289 vsi->num_q_vectors, vsi->seid, ret);
12290 vsi->num_q_vectors = 0;
12291 goto vector_setup_out;
12294 /* In Legacy mode, we do not have to get any other vector since we
12295 * piggyback on the misc/ICR0 for queue interrupts.
12297 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
12299 if (vsi->num_q_vectors)
12300 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
12301 vsi->num_q_vectors, vsi->idx);
12302 if (vsi->base_vector < 0) {
12303 dev_info(&pf->pdev->dev,
12304 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
12305 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
12306 i40e_vsi_free_q_vectors(vsi);
12308 goto vector_setup_out;
12316 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
12317 * @vsi: pointer to the vsi.
12319 * This re-allocates a vsi's queue resources.
12321 * Returns pointer to the successfully allocated and configured VSI sw struct
12322 * on success, otherwise returns NULL on failure.
12324 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
12326 u16 alloc_queue_pairs;
12327 struct i40e_pf *pf;
12336 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
12337 i40e_vsi_clear_rings(vsi);
12339 i40e_vsi_free_arrays(vsi, false);
12340 i40e_set_num_rings_in_vsi(vsi);
12341 ret = i40e_vsi_alloc_arrays(vsi, false);
12345 alloc_queue_pairs = vsi->alloc_queue_pairs *
12346 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
12348 ret = i40e_get_lump(pf, pf->qp_pile, alloc_queue_pairs, vsi->idx);
12350 dev_info(&pf->pdev->dev,
12351 "failed to get tracking for %d queues for VSI %d err %d\n",
12352 alloc_queue_pairs, vsi->seid, ret);
12355 vsi->base_queue = ret;
12357 /* Update the FW view of the VSI. Force a reset of TC and queue
12358 * layout configurations.
12360 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
12361 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
12362 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
12363 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
12364 if (vsi->type == I40E_VSI_MAIN)
12365 i40e_rm_default_mac_filter(vsi, pf->hw.mac.perm_addr);
12367 /* assign it some queues */
12368 ret = i40e_alloc_rings(vsi);
12372 /* map all of the rings to the q_vectors */
12373 i40e_vsi_map_rings_to_vectors(vsi);
12377 i40e_vsi_free_q_vectors(vsi);
12378 if (vsi->netdev_registered) {
12379 vsi->netdev_registered = false;
12380 unregister_netdev(vsi->netdev);
12381 free_netdev(vsi->netdev);
12382 vsi->netdev = NULL;
12384 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
12386 i40e_vsi_clear(vsi);
12391 * i40e_vsi_setup - Set up a VSI by a given type
12392 * @pf: board private structure
12394 * @uplink_seid: the switch element to link to
12395 * @param1: usage depends upon VSI type. For VF types, indicates VF id
12397 * This allocates the sw VSI structure and its queue resources, then add a VSI
12398 * to the identified VEB.
12400 * Returns pointer to the successfully allocated and configure VSI sw struct on
12401 * success, otherwise returns NULL on failure.
12403 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
12404 u16 uplink_seid, u32 param1)
12406 struct i40e_vsi *vsi = NULL;
12407 struct i40e_veb *veb = NULL;
12408 u16 alloc_queue_pairs;
12412 /* The requested uplink_seid must be either
12413 * - the PF's port seid
12414 * no VEB is needed because this is the PF
12415 * or this is a Flow Director special case VSI
12416 * - seid of an existing VEB
12417 * - seid of a VSI that owns an existing VEB
12418 * - seid of a VSI that doesn't own a VEB
12419 * a new VEB is created and the VSI becomes the owner
12420 * - seid of the PF VSI, which is what creates the first VEB
12421 * this is a special case of the previous
12423 * Find which uplink_seid we were given and create a new VEB if needed
12425 for (i = 0; i < I40E_MAX_VEB; i++) {
12426 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
12432 if (!veb && uplink_seid != pf->mac_seid) {
12434 for (i = 0; i < pf->num_alloc_vsi; i++) {
12435 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
12441 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
12446 if (vsi->uplink_seid == pf->mac_seid)
12447 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
12448 vsi->tc_config.enabled_tc);
12449 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
12450 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
12451 vsi->tc_config.enabled_tc);
12453 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
12454 dev_info(&vsi->back->pdev->dev,
12455 "New VSI creation error, uplink seid of LAN VSI expected.\n");
12458 /* We come up by default in VEPA mode if SRIOV is not
12459 * already enabled, in which case we can't force VEPA
12462 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
12463 veb->bridge_mode = BRIDGE_MODE_VEPA;
12464 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
12466 i40e_config_bridge_mode(veb);
12468 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
12469 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
12473 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
12477 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
12478 uplink_seid = veb->seid;
12481 /* get vsi sw struct */
12482 v_idx = i40e_vsi_mem_alloc(pf, type);
12485 vsi = pf->vsi[v_idx];
12489 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
12491 if (type == I40E_VSI_MAIN)
12492 pf->lan_vsi = v_idx;
12493 else if (type == I40E_VSI_SRIOV)
12494 vsi->vf_id = param1;
12495 /* assign it some queues */
12496 alloc_queue_pairs = vsi->alloc_queue_pairs *
12497 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
12499 ret = i40e_get_lump(pf, pf->qp_pile, alloc_queue_pairs, vsi->idx);
12501 dev_info(&pf->pdev->dev,
12502 "failed to get tracking for %d queues for VSI %d err=%d\n",
12503 alloc_queue_pairs, vsi->seid, ret);
12506 vsi->base_queue = ret;
12508 /* get a VSI from the hardware */
12509 vsi->uplink_seid = uplink_seid;
12510 ret = i40e_add_vsi(vsi);
12514 switch (vsi->type) {
12515 /* setup the netdev if needed */
12516 case I40E_VSI_MAIN:
12517 case I40E_VSI_VMDQ2:
12518 ret = i40e_config_netdev(vsi);
12521 ret = register_netdev(vsi->netdev);
12524 vsi->netdev_registered = true;
12525 netif_carrier_off(vsi->netdev);
12526 #ifdef CONFIG_I40E_DCB
12527 /* Setup DCB netlink interface */
12528 i40e_dcbnl_setup(vsi);
12529 #endif /* CONFIG_I40E_DCB */
12532 case I40E_VSI_FDIR:
12533 /* set up vectors and rings if needed */
12534 ret = i40e_vsi_setup_vectors(vsi);
12538 ret = i40e_alloc_rings(vsi);
12542 /* map all of the rings to the q_vectors */
12543 i40e_vsi_map_rings_to_vectors(vsi);
12545 i40e_vsi_reset_stats(vsi);
12549 /* no netdev or rings for the other VSI types */
12553 if ((pf->hw_features & I40E_HW_RSS_AQ_CAPABLE) &&
12554 (vsi->type == I40E_VSI_VMDQ2)) {
12555 ret = i40e_vsi_config_rss(vsi);
12560 i40e_vsi_free_q_vectors(vsi);
12562 if (vsi->netdev_registered) {
12563 vsi->netdev_registered = false;
12564 unregister_netdev(vsi->netdev);
12565 free_netdev(vsi->netdev);
12566 vsi->netdev = NULL;
12569 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
12571 i40e_vsi_clear(vsi);
12577 * i40e_veb_get_bw_info - Query VEB BW information
12578 * @veb: the veb to query
12580 * Query the Tx scheduler BW configuration data for given VEB
12582 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
12584 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
12585 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
12586 struct i40e_pf *pf = veb->pf;
12587 struct i40e_hw *hw = &pf->hw;
12592 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
12595 dev_info(&pf->pdev->dev,
12596 "query veb bw config failed, err %s aq_err %s\n",
12597 i40e_stat_str(&pf->hw, ret),
12598 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
12602 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
12605 dev_info(&pf->pdev->dev,
12606 "query veb bw ets config failed, err %s aq_err %s\n",
12607 i40e_stat_str(&pf->hw, ret),
12608 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
12612 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
12613 veb->bw_max_quanta = ets_data.tc_bw_max;
12614 veb->is_abs_credits = bw_data.absolute_credits_enable;
12615 veb->enabled_tc = ets_data.tc_valid_bits;
12616 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
12617 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
12618 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
12619 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
12620 veb->bw_tc_limit_credits[i] =
12621 le16_to_cpu(bw_data.tc_bw_limits[i]);
12622 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
12630 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
12631 * @pf: board private structure
12633 * On error: returns error code (negative)
12634 * On success: returns vsi index in PF (positive)
12636 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
12639 struct i40e_veb *veb;
12642 /* Need to protect the allocation of switch elements at the PF level */
12643 mutex_lock(&pf->switch_mutex);
12645 /* VEB list may be fragmented if VEB creation/destruction has
12646 * been happening. We can afford to do a quick scan to look
12647 * for any free slots in the list.
12649 * find next empty veb slot, looping back around if necessary
12652 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
12654 if (i >= I40E_MAX_VEB) {
12656 goto err_alloc_veb; /* out of VEB slots! */
12659 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
12662 goto err_alloc_veb;
12666 veb->enabled_tc = 1;
12671 mutex_unlock(&pf->switch_mutex);
12676 * i40e_switch_branch_release - Delete a branch of the switch tree
12677 * @branch: where to start deleting
12679 * This uses recursion to find the tips of the branch to be
12680 * removed, deleting until we get back to and can delete this VEB.
12682 static void i40e_switch_branch_release(struct i40e_veb *branch)
12684 struct i40e_pf *pf = branch->pf;
12685 u16 branch_seid = branch->seid;
12686 u16 veb_idx = branch->idx;
12689 /* release any VEBs on this VEB - RECURSION */
12690 for (i = 0; i < I40E_MAX_VEB; i++) {
12693 if (pf->veb[i]->uplink_seid == branch->seid)
12694 i40e_switch_branch_release(pf->veb[i]);
12697 /* Release the VSIs on this VEB, but not the owner VSI.
12699 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
12700 * the VEB itself, so don't use (*branch) after this loop.
12702 for (i = 0; i < pf->num_alloc_vsi; i++) {
12705 if (pf->vsi[i]->uplink_seid == branch_seid &&
12706 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
12707 i40e_vsi_release(pf->vsi[i]);
12711 /* There's one corner case where the VEB might not have been
12712 * removed, so double check it here and remove it if needed.
12713 * This case happens if the veb was created from the debugfs
12714 * commands and no VSIs were added to it.
12716 if (pf->veb[veb_idx])
12717 i40e_veb_release(pf->veb[veb_idx]);
12721 * i40e_veb_clear - remove veb struct
12722 * @veb: the veb to remove
12724 static void i40e_veb_clear(struct i40e_veb *veb)
12730 struct i40e_pf *pf = veb->pf;
12732 mutex_lock(&pf->switch_mutex);
12733 if (pf->veb[veb->idx] == veb)
12734 pf->veb[veb->idx] = NULL;
12735 mutex_unlock(&pf->switch_mutex);
12742 * i40e_veb_release - Delete a VEB and free its resources
12743 * @veb: the VEB being removed
12745 void i40e_veb_release(struct i40e_veb *veb)
12747 struct i40e_vsi *vsi = NULL;
12748 struct i40e_pf *pf;
12753 /* find the remaining VSI and check for extras */
12754 for (i = 0; i < pf->num_alloc_vsi; i++) {
12755 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
12761 dev_info(&pf->pdev->dev,
12762 "can't remove VEB %d with %d VSIs left\n",
12767 /* move the remaining VSI to uplink veb */
12768 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
12769 if (veb->uplink_seid) {
12770 vsi->uplink_seid = veb->uplink_seid;
12771 if (veb->uplink_seid == pf->mac_seid)
12772 vsi->veb_idx = I40E_NO_VEB;
12774 vsi->veb_idx = veb->veb_idx;
12777 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
12778 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
12781 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
12782 i40e_veb_clear(veb);
12786 * i40e_add_veb - create the VEB in the switch
12787 * @veb: the VEB to be instantiated
12788 * @vsi: the controlling VSI
12790 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
12792 struct i40e_pf *pf = veb->pf;
12793 bool enable_stats = !!(pf->flags & I40E_FLAG_VEB_STATS_ENABLED);
12796 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
12797 veb->enabled_tc, false,
12798 &veb->seid, enable_stats, NULL);
12800 /* get a VEB from the hardware */
12802 dev_info(&pf->pdev->dev,
12803 "couldn't add VEB, err %s aq_err %s\n",
12804 i40e_stat_str(&pf->hw, ret),
12805 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
12809 /* get statistics counter */
12810 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
12811 &veb->stats_idx, NULL, NULL, NULL);
12813 dev_info(&pf->pdev->dev,
12814 "couldn't get VEB statistics idx, err %s aq_err %s\n",
12815 i40e_stat_str(&pf->hw, ret),
12816 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
12819 ret = i40e_veb_get_bw_info(veb);
12821 dev_info(&pf->pdev->dev,
12822 "couldn't get VEB bw info, err %s aq_err %s\n",
12823 i40e_stat_str(&pf->hw, ret),
12824 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
12825 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
12829 vsi->uplink_seid = veb->seid;
12830 vsi->veb_idx = veb->idx;
12831 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
12837 * i40e_veb_setup - Set up a VEB
12838 * @pf: board private structure
12839 * @flags: VEB setup flags
12840 * @uplink_seid: the switch element to link to
12841 * @vsi_seid: the initial VSI seid
12842 * @enabled_tc: Enabled TC bit-map
12844 * This allocates the sw VEB structure and links it into the switch
12845 * It is possible and legal for this to be a duplicate of an already
12846 * existing VEB. It is also possible for both uplink and vsi seids
12847 * to be zero, in order to create a floating VEB.
12849 * Returns pointer to the successfully allocated VEB sw struct on
12850 * success, otherwise returns NULL on failure.
12852 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
12853 u16 uplink_seid, u16 vsi_seid,
12856 struct i40e_veb *veb, *uplink_veb = NULL;
12857 int vsi_idx, veb_idx;
12860 /* if one seid is 0, the other must be 0 to create a floating relay */
12861 if ((uplink_seid == 0 || vsi_seid == 0) &&
12862 (uplink_seid + vsi_seid != 0)) {
12863 dev_info(&pf->pdev->dev,
12864 "one, not both seid's are 0: uplink=%d vsi=%d\n",
12865 uplink_seid, vsi_seid);
12869 /* make sure there is such a vsi and uplink */
12870 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
12871 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
12873 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
12874 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
12879 if (uplink_seid && uplink_seid != pf->mac_seid) {
12880 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
12881 if (pf->veb[veb_idx] &&
12882 pf->veb[veb_idx]->seid == uplink_seid) {
12883 uplink_veb = pf->veb[veb_idx];
12888 dev_info(&pf->pdev->dev,
12889 "uplink seid %d not found\n", uplink_seid);
12894 /* get veb sw struct */
12895 veb_idx = i40e_veb_mem_alloc(pf);
12898 veb = pf->veb[veb_idx];
12899 veb->flags = flags;
12900 veb->uplink_seid = uplink_seid;
12901 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
12902 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
12904 /* create the VEB in the switch */
12905 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
12908 if (vsi_idx == pf->lan_vsi)
12909 pf->lan_veb = veb->idx;
12914 i40e_veb_clear(veb);
12920 * i40e_setup_pf_switch_element - set PF vars based on switch type
12921 * @pf: board private structure
12922 * @ele: element we are building info from
12923 * @num_reported: total number of elements
12924 * @printconfig: should we print the contents
12926 * helper function to assist in extracting a few useful SEID values.
12928 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
12929 struct i40e_aqc_switch_config_element_resp *ele,
12930 u16 num_reported, bool printconfig)
12932 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
12933 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
12934 u8 element_type = ele->element_type;
12935 u16 seid = le16_to_cpu(ele->seid);
12938 dev_info(&pf->pdev->dev,
12939 "type=%d seid=%d uplink=%d downlink=%d\n",
12940 element_type, seid, uplink_seid, downlink_seid);
12942 switch (element_type) {
12943 case I40E_SWITCH_ELEMENT_TYPE_MAC:
12944 pf->mac_seid = seid;
12946 case I40E_SWITCH_ELEMENT_TYPE_VEB:
12948 if (uplink_seid != pf->mac_seid)
12950 if (pf->lan_veb == I40E_NO_VEB) {
12953 /* find existing or else empty VEB */
12954 for (v = 0; v < I40E_MAX_VEB; v++) {
12955 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
12960 if (pf->lan_veb == I40E_NO_VEB) {
12961 v = i40e_veb_mem_alloc(pf);
12968 pf->veb[pf->lan_veb]->seid = seid;
12969 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
12970 pf->veb[pf->lan_veb]->pf = pf;
12971 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
12973 case I40E_SWITCH_ELEMENT_TYPE_VSI:
12974 if (num_reported != 1)
12976 /* This is immediately after a reset so we can assume this is
12979 pf->mac_seid = uplink_seid;
12980 pf->pf_seid = downlink_seid;
12981 pf->main_vsi_seid = seid;
12983 dev_info(&pf->pdev->dev,
12984 "pf_seid=%d main_vsi_seid=%d\n",
12985 pf->pf_seid, pf->main_vsi_seid);
12987 case I40E_SWITCH_ELEMENT_TYPE_PF:
12988 case I40E_SWITCH_ELEMENT_TYPE_VF:
12989 case I40E_SWITCH_ELEMENT_TYPE_EMP:
12990 case I40E_SWITCH_ELEMENT_TYPE_BMC:
12991 case I40E_SWITCH_ELEMENT_TYPE_PE:
12992 case I40E_SWITCH_ELEMENT_TYPE_PA:
12993 /* ignore these for now */
12996 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
12997 element_type, seid);
13003 * i40e_fetch_switch_configuration - Get switch config from firmware
13004 * @pf: board private structure
13005 * @printconfig: should we print the contents
13007 * Get the current switch configuration from the device and
13008 * extract a few useful SEID values.
13010 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
13012 struct i40e_aqc_get_switch_config_resp *sw_config;
13018 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
13022 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
13024 u16 num_reported, num_total;
13026 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
13030 dev_info(&pf->pdev->dev,
13031 "get switch config failed err %s aq_err %s\n",
13032 i40e_stat_str(&pf->hw, ret),
13033 i40e_aq_str(&pf->hw,
13034 pf->hw.aq.asq_last_status));
13039 num_reported = le16_to_cpu(sw_config->header.num_reported);
13040 num_total = le16_to_cpu(sw_config->header.num_total);
13043 dev_info(&pf->pdev->dev,
13044 "header: %d reported %d total\n",
13045 num_reported, num_total);
13047 for (i = 0; i < num_reported; i++) {
13048 struct i40e_aqc_switch_config_element_resp *ele =
13049 &sw_config->element[i];
13051 i40e_setup_pf_switch_element(pf, ele, num_reported,
13054 } while (next_seid != 0);
13061 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
13062 * @pf: board private structure
13063 * @reinit: if the Main VSI needs to re-initialized.
13065 * Returns 0 on success, negative value on failure
13067 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
13072 /* find out what's out there already */
13073 ret = i40e_fetch_switch_configuration(pf, false);
13075 dev_info(&pf->pdev->dev,
13076 "couldn't fetch switch config, err %s aq_err %s\n",
13077 i40e_stat_str(&pf->hw, ret),
13078 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
13081 i40e_pf_reset_stats(pf);
13083 /* set the switch config bit for the whole device to
13084 * support limited promisc or true promisc
13085 * when user requests promisc. The default is limited
13089 if ((pf->hw.pf_id == 0) &&
13090 !(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) {
13091 flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
13092 pf->last_sw_conf_flags = flags;
13095 if (pf->hw.pf_id == 0) {
13098 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
13099 ret = i40e_aq_set_switch_config(&pf->hw, flags, valid_flags, 0,
13101 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
13102 dev_info(&pf->pdev->dev,
13103 "couldn't set switch config bits, err %s aq_err %s\n",
13104 i40e_stat_str(&pf->hw, ret),
13105 i40e_aq_str(&pf->hw,
13106 pf->hw.aq.asq_last_status));
13107 /* not a fatal problem, just keep going */
13109 pf->last_sw_conf_valid_flags = valid_flags;
13112 /* first time setup */
13113 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
13114 struct i40e_vsi *vsi = NULL;
13117 /* Set up the PF VSI associated with the PF's main VSI
13118 * that is already in the HW switch
13120 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
13121 uplink_seid = pf->veb[pf->lan_veb]->seid;
13123 uplink_seid = pf->mac_seid;
13124 if (pf->lan_vsi == I40E_NO_VSI)
13125 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
13127 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
13129 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
13130 i40e_cloud_filter_exit(pf);
13131 i40e_fdir_teardown(pf);
13135 /* force a reset of TC and queue layout configurations */
13136 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
13138 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
13139 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
13140 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
13142 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
13144 i40e_fdir_sb_setup(pf);
13146 /* Setup static PF queue filter control settings */
13147 ret = i40e_setup_pf_filter_control(pf);
13149 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
13151 /* Failure here should not stop continuing other steps */
13154 /* enable RSS in the HW, even for only one queue, as the stack can use
13157 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
13158 i40e_pf_config_rss(pf);
13160 /* fill in link information and enable LSE reporting */
13161 i40e_link_event(pf);
13163 /* Initialize user-specific link properties */
13164 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
13165 I40E_AQ_AN_COMPLETED) ? true : false);
13169 /* repopulate tunnel port filters */
13170 i40e_sync_udp_filters(pf);
13176 * i40e_determine_queue_usage - Work out queue distribution
13177 * @pf: board private structure
13179 static void i40e_determine_queue_usage(struct i40e_pf *pf)
13184 pf->num_lan_qps = 0;
13186 /* Find the max queues to be put into basic use. We'll always be
13187 * using TC0, whether or not DCB is running, and TC0 will get the
13190 queues_left = pf->hw.func_caps.num_tx_qp;
13192 if ((queues_left == 1) ||
13193 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
13194 /* one qp for PF, no queues for anything else */
13196 pf->alloc_rss_size = pf->num_lan_qps = 1;
13198 /* make sure all the fancies are disabled */
13199 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
13200 I40E_FLAG_IWARP_ENABLED |
13201 I40E_FLAG_FD_SB_ENABLED |
13202 I40E_FLAG_FD_ATR_ENABLED |
13203 I40E_FLAG_DCB_CAPABLE |
13204 I40E_FLAG_DCB_ENABLED |
13205 I40E_FLAG_SRIOV_ENABLED |
13206 I40E_FLAG_VMDQ_ENABLED);
13207 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
13208 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
13209 I40E_FLAG_FD_SB_ENABLED |
13210 I40E_FLAG_FD_ATR_ENABLED |
13211 I40E_FLAG_DCB_CAPABLE))) {
13212 /* one qp for PF */
13213 pf->alloc_rss_size = pf->num_lan_qps = 1;
13214 queues_left -= pf->num_lan_qps;
13216 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
13217 I40E_FLAG_IWARP_ENABLED |
13218 I40E_FLAG_FD_SB_ENABLED |
13219 I40E_FLAG_FD_ATR_ENABLED |
13220 I40E_FLAG_DCB_ENABLED |
13221 I40E_FLAG_VMDQ_ENABLED);
13222 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
13224 /* Not enough queues for all TCs */
13225 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
13226 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
13227 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE |
13228 I40E_FLAG_DCB_ENABLED);
13229 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
13232 /* limit lan qps to the smaller of qps, cpus or msix */
13233 q_max = max_t(int, pf->rss_size_max, num_online_cpus());
13234 q_max = min_t(int, q_max, pf->hw.func_caps.num_tx_qp);
13235 q_max = min_t(int, q_max, pf->hw.func_caps.num_msix_vectors);
13236 pf->num_lan_qps = q_max;
13238 queues_left -= pf->num_lan_qps;
13241 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
13242 if (queues_left > 1) {
13243 queues_left -= 1; /* save 1 queue for FD */
13245 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
13246 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
13247 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
13251 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
13252 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
13253 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
13254 (queues_left / pf->num_vf_qps));
13255 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
13258 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
13259 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
13260 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
13261 (queues_left / pf->num_vmdq_qps));
13262 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
13265 pf->queues_left = queues_left;
13266 dev_dbg(&pf->pdev->dev,
13267 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
13268 pf->hw.func_caps.num_tx_qp,
13269 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
13270 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
13271 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
13276 * i40e_setup_pf_filter_control - Setup PF static filter control
13277 * @pf: PF to be setup
13279 * i40e_setup_pf_filter_control sets up a PF's initial filter control
13280 * settings. If PE/FCoE are enabled then it will also set the per PF
13281 * based filter sizes required for them. It also enables Flow director,
13282 * ethertype and macvlan type filter settings for the pf.
13284 * Returns 0 on success, negative on failure
13286 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
13288 struct i40e_filter_control_settings *settings = &pf->filter_settings;
13290 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
13292 /* Flow Director is enabled */
13293 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
13294 settings->enable_fdir = true;
13296 /* Ethtype and MACVLAN filters enabled for PF */
13297 settings->enable_ethtype = true;
13298 settings->enable_macvlan = true;
13300 if (i40e_set_filter_control(&pf->hw, settings))
13306 #define INFO_STRING_LEN 255
13307 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
13308 static void i40e_print_features(struct i40e_pf *pf)
13310 struct i40e_hw *hw = &pf->hw;
13314 buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL);
13318 i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id);
13319 #ifdef CONFIG_PCI_IOV
13320 i += snprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs);
13322 i += snprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d",
13323 pf->hw.func_caps.num_vsis,
13324 pf->vsi[pf->lan_vsi]->num_queue_pairs);
13325 if (pf->flags & I40E_FLAG_RSS_ENABLED)
13326 i += snprintf(&buf[i], REMAIN(i), " RSS");
13327 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
13328 i += snprintf(&buf[i], REMAIN(i), " FD_ATR");
13329 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
13330 i += snprintf(&buf[i], REMAIN(i), " FD_SB");
13331 i += snprintf(&buf[i], REMAIN(i), " NTUPLE");
13333 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
13334 i += snprintf(&buf[i], REMAIN(i), " DCB");
13335 i += snprintf(&buf[i], REMAIN(i), " VxLAN");
13336 i += snprintf(&buf[i], REMAIN(i), " Geneve");
13337 if (pf->flags & I40E_FLAG_PTP)
13338 i += snprintf(&buf[i], REMAIN(i), " PTP");
13339 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
13340 i += snprintf(&buf[i], REMAIN(i), " VEB");
13342 i += snprintf(&buf[i], REMAIN(i), " VEPA");
13344 dev_info(&pf->pdev->dev, "%s\n", buf);
13346 WARN_ON(i > INFO_STRING_LEN);
13350 * i40e_get_platform_mac_addr - get platform-specific MAC address
13351 * @pdev: PCI device information struct
13352 * @pf: board private structure
13354 * Look up the MAC address for the device. First we'll try
13355 * eth_platform_get_mac_address, which will check Open Firmware, or arch
13356 * specific fallback. Otherwise, we'll default to the stored value in
13359 static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf)
13361 if (eth_platform_get_mac_address(&pdev->dev, pf->hw.mac.addr))
13362 i40e_get_mac_addr(&pf->hw, pf->hw.mac.addr);
13366 * i40e_probe - Device initialization routine
13367 * @pdev: PCI device information struct
13368 * @ent: entry in i40e_pci_tbl
13370 * i40e_probe initializes a PF identified by a pci_dev structure.
13371 * The OS initialization, configuring of the PF private structure,
13372 * and a hardware reset occur.
13374 * Returns 0 on success, negative on failure
13376 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
13378 struct i40e_aq_get_phy_abilities_resp abilities;
13379 struct i40e_pf *pf;
13380 struct i40e_hw *hw;
13381 static u16 pfs_found;
13389 err = pci_enable_device_mem(pdev);
13393 /* set up for high or low dma */
13394 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
13396 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
13398 dev_err(&pdev->dev,
13399 "DMA configuration failed: 0x%x\n", err);
13404 /* set up pci connections */
13405 err = pci_request_mem_regions(pdev, i40e_driver_name);
13407 dev_info(&pdev->dev,
13408 "pci_request_selected_regions failed %d\n", err);
13412 pci_enable_pcie_error_reporting(pdev);
13413 pci_set_master(pdev);
13415 /* Now that we have a PCI connection, we need to do the
13416 * low level device setup. This is primarily setting up
13417 * the Admin Queue structures and then querying for the
13418 * device's current profile information.
13420 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
13427 set_bit(__I40E_DOWN, pf->state);
13432 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
13433 I40E_MAX_CSR_SPACE);
13435 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
13436 if (!hw->hw_addr) {
13438 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
13439 (unsigned int)pci_resource_start(pdev, 0),
13440 pf->ioremap_len, err);
13443 hw->vendor_id = pdev->vendor;
13444 hw->device_id = pdev->device;
13445 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
13446 hw->subsystem_vendor_id = pdev->subsystem_vendor;
13447 hw->subsystem_device_id = pdev->subsystem_device;
13448 hw->bus.device = PCI_SLOT(pdev->devfn);
13449 hw->bus.func = PCI_FUNC(pdev->devfn);
13450 hw->bus.bus_id = pdev->bus->number;
13451 pf->instance = pfs_found;
13453 /* Select something other than the 802.1ad ethertype for the
13454 * switch to use internally and drop on ingress.
13456 hw->switch_tag = 0xffff;
13457 hw->first_tag = ETH_P_8021AD;
13458 hw->second_tag = ETH_P_8021Q;
13460 INIT_LIST_HEAD(&pf->l3_flex_pit_list);
13461 INIT_LIST_HEAD(&pf->l4_flex_pit_list);
13463 /* set up the locks for the AQ, do this only once in probe
13464 * and destroy them only once in remove
13466 mutex_init(&hw->aq.asq_mutex);
13467 mutex_init(&hw->aq.arq_mutex);
13469 pf->msg_enable = netif_msg_init(debug,
13474 pf->hw.debug_mask = debug;
13476 /* do a special CORER for clearing PXE mode once at init */
13477 if (hw->revision_id == 0 &&
13478 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
13479 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
13484 i40e_clear_pxe_mode(hw);
13487 /* Reset here to make sure all is clean and to define PF 'n' */
13489 err = i40e_pf_reset(hw);
13491 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
13496 hw->aq.num_arq_entries = I40E_AQ_LEN;
13497 hw->aq.num_asq_entries = I40E_AQ_LEN;
13498 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
13499 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
13500 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
13502 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
13504 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
13506 err = i40e_init_shared_code(hw);
13508 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
13513 /* set up a default setting for link flow control */
13514 pf->hw.fc.requested_mode = I40E_FC_NONE;
13516 err = i40e_init_adminq(hw);
13518 if (err == I40E_ERR_FIRMWARE_API_VERSION)
13519 dev_info(&pdev->dev,
13520 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
13522 dev_info(&pdev->dev,
13523 "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
13527 i40e_get_oem_version(hw);
13529 /* provide nvm, fw, api versions */
13530 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s\n",
13531 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
13532 hw->aq.api_maj_ver, hw->aq.api_min_ver,
13533 i40e_nvm_version_str(hw));
13535 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
13536 hw->aq.api_min_ver > I40E_FW_MINOR_VERSION(hw))
13537 dev_info(&pdev->dev,
13538 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
13539 else if (hw->aq.api_maj_ver == 1 && hw->aq.api_min_ver < 4)
13540 dev_info(&pdev->dev,
13541 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
13543 i40e_verify_eeprom(pf);
13545 /* Rev 0 hardware was never productized */
13546 if (hw->revision_id < 1)
13547 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
13549 i40e_clear_pxe_mode(hw);
13550 err = i40e_get_capabilities(pf, i40e_aqc_opc_list_func_capabilities);
13552 goto err_adminq_setup;
13554 err = i40e_sw_init(pf);
13556 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
13560 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
13561 hw->func_caps.num_rx_qp, 0, 0);
13563 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
13564 goto err_init_lan_hmc;
13567 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
13569 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
13571 goto err_configure_lan_hmc;
13574 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
13575 * Ignore error return codes because if it was already disabled via
13576 * hardware settings this will fail
13578 if (pf->hw_features & I40E_HW_STOP_FW_LLDP) {
13579 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
13580 i40e_aq_stop_lldp(hw, true, NULL);
13583 /* allow a platform config to override the HW addr */
13584 i40e_get_platform_mac_addr(pdev, pf);
13586 if (!is_valid_ether_addr(hw->mac.addr)) {
13587 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
13591 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
13592 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
13593 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
13594 if (is_valid_ether_addr(hw->mac.port_addr))
13595 pf->hw_features |= I40E_HW_PORT_ID_VALID;
13597 pci_set_drvdata(pdev, pf);
13598 pci_save_state(pdev);
13599 #ifdef CONFIG_I40E_DCB
13600 err = i40e_init_pf_dcb(pf);
13602 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
13603 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE | I40E_FLAG_DCB_ENABLED);
13604 /* Continue without DCB enabled */
13606 #endif /* CONFIG_I40E_DCB */
13608 /* set up periodic task facility */
13609 timer_setup(&pf->service_timer, i40e_service_timer, 0);
13610 pf->service_timer_period = HZ;
13612 INIT_WORK(&pf->service_task, i40e_service_task);
13613 clear_bit(__I40E_SERVICE_SCHED, pf->state);
13615 /* NVM bit on means WoL disabled for the port */
13616 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
13617 if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1)
13618 pf->wol_en = false;
13621 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
13623 /* set up the main switch operations */
13624 i40e_determine_queue_usage(pf);
13625 err = i40e_init_interrupt_scheme(pf);
13627 goto err_switch_setup;
13629 /* The number of VSIs reported by the FW is the minimum guaranteed
13630 * to us; HW supports far more and we share the remaining pool with
13631 * the other PFs. We allocate space for more than the guarantee with
13632 * the understanding that we might not get them all later.
13634 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
13635 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
13637 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
13639 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
13640 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
13644 goto err_switch_setup;
13647 #ifdef CONFIG_PCI_IOV
13648 /* prep for VF support */
13649 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
13650 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
13651 !test_bit(__I40E_BAD_EEPROM, pf->state)) {
13652 if (pci_num_vf(pdev))
13653 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
13656 err = i40e_setup_pf_switch(pf, false);
13658 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
13661 INIT_LIST_HEAD(&pf->vsi[pf->lan_vsi]->ch_list);
13663 /* Make sure flow control is set according to current settings */
13664 err = i40e_set_fc(hw, &set_fc_aq_fail, true);
13665 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_GET)
13666 dev_dbg(&pf->pdev->dev,
13667 "Set fc with err %s aq_err %s on get_phy_cap\n",
13668 i40e_stat_str(hw, err),
13669 i40e_aq_str(hw, hw->aq.asq_last_status));
13670 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_SET)
13671 dev_dbg(&pf->pdev->dev,
13672 "Set fc with err %s aq_err %s on set_phy_config\n",
13673 i40e_stat_str(hw, err),
13674 i40e_aq_str(hw, hw->aq.asq_last_status));
13675 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_UPDATE)
13676 dev_dbg(&pf->pdev->dev,
13677 "Set fc with err %s aq_err %s on get_link_info\n",
13678 i40e_stat_str(hw, err),
13679 i40e_aq_str(hw, hw->aq.asq_last_status));
13681 /* if FDIR VSI was set up, start it now */
13682 for (i = 0; i < pf->num_alloc_vsi; i++) {
13683 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
13684 i40e_vsi_open(pf->vsi[i]);
13689 /* The driver only wants link up/down and module qualification
13690 * reports from firmware. Note the negative logic.
13692 err = i40e_aq_set_phy_int_mask(&pf->hw,
13693 ~(I40E_AQ_EVENT_LINK_UPDOWN |
13694 I40E_AQ_EVENT_MEDIA_NA |
13695 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
13697 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
13698 i40e_stat_str(&pf->hw, err),
13699 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
13701 /* Reconfigure hardware for allowing smaller MSS in the case
13702 * of TSO, so that we avoid the MDD being fired and causing
13703 * a reset in the case of small MSS+TSO.
13705 val = rd32(hw, I40E_REG_MSS);
13706 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
13707 val &= ~I40E_REG_MSS_MIN_MASK;
13708 val |= I40E_64BYTE_MSS;
13709 wr32(hw, I40E_REG_MSS, val);
13712 if (pf->hw_features & I40E_HW_RESTART_AUTONEG) {
13714 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
13716 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
13717 i40e_stat_str(&pf->hw, err),
13718 i40e_aq_str(&pf->hw,
13719 pf->hw.aq.asq_last_status));
13721 /* The main driver is (mostly) up and happy. We need to set this state
13722 * before setting up the misc vector or we get a race and the vector
13723 * ends up disabled forever.
13725 clear_bit(__I40E_DOWN, pf->state);
13727 /* In case of MSIX we are going to setup the misc vector right here
13728 * to handle admin queue events etc. In case of legacy and MSI
13729 * the misc functionality and queue processing is combined in
13730 * the same vector and that gets setup at open.
13732 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
13733 err = i40e_setup_misc_vector(pf);
13735 dev_info(&pdev->dev,
13736 "setup of misc vector failed: %d\n", err);
13741 #ifdef CONFIG_PCI_IOV
13742 /* prep for VF support */
13743 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
13744 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
13745 !test_bit(__I40E_BAD_EEPROM, pf->state)) {
13746 /* disable link interrupts for VFs */
13747 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
13748 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
13749 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
13752 if (pci_num_vf(pdev)) {
13753 dev_info(&pdev->dev,
13754 "Active VFs found, allocating resources.\n");
13755 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
13757 dev_info(&pdev->dev,
13758 "Error %d allocating resources for existing VFs\n",
13762 #endif /* CONFIG_PCI_IOV */
13764 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
13765 pf->iwarp_base_vector = i40e_get_lump(pf, pf->irq_pile,
13766 pf->num_iwarp_msix,
13767 I40E_IWARP_IRQ_PILE_ID);
13768 if (pf->iwarp_base_vector < 0) {
13769 dev_info(&pdev->dev,
13770 "failed to get tracking for %d vectors for IWARP err=%d\n",
13771 pf->num_iwarp_msix, pf->iwarp_base_vector);
13772 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
13776 i40e_dbg_pf_init(pf);
13778 /* tell the firmware that we're starting */
13779 i40e_send_version(pf);
13781 /* since everything's happy, start the service_task timer */
13782 mod_timer(&pf->service_timer,
13783 round_jiffies(jiffies + pf->service_timer_period));
13785 /* add this PF to client device list and launch a client service task */
13786 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
13787 err = i40e_lan_add_device(pf);
13789 dev_info(&pdev->dev, "Failed to add PF to client API service list: %d\n",
13793 #define PCI_SPEED_SIZE 8
13794 #define PCI_WIDTH_SIZE 8
13795 /* Devices on the IOSF bus do not have this information
13796 * and will report PCI Gen 1 x 1 by default so don't bother
13799 if (!(pf->hw_features & I40E_HW_NO_PCI_LINK_CHECK)) {
13800 char speed[PCI_SPEED_SIZE] = "Unknown";
13801 char width[PCI_WIDTH_SIZE] = "Unknown";
13803 /* Get the negotiated link width and speed from PCI config
13806 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
13809 i40e_set_pci_config_data(hw, link_status);
13811 switch (hw->bus.speed) {
13812 case i40e_bus_speed_8000:
13813 strncpy(speed, "8.0", PCI_SPEED_SIZE); break;
13814 case i40e_bus_speed_5000:
13815 strncpy(speed, "5.0", PCI_SPEED_SIZE); break;
13816 case i40e_bus_speed_2500:
13817 strncpy(speed, "2.5", PCI_SPEED_SIZE); break;
13821 switch (hw->bus.width) {
13822 case i40e_bus_width_pcie_x8:
13823 strncpy(width, "8", PCI_WIDTH_SIZE); break;
13824 case i40e_bus_width_pcie_x4:
13825 strncpy(width, "4", PCI_WIDTH_SIZE); break;
13826 case i40e_bus_width_pcie_x2:
13827 strncpy(width, "2", PCI_WIDTH_SIZE); break;
13828 case i40e_bus_width_pcie_x1:
13829 strncpy(width, "1", PCI_WIDTH_SIZE); break;
13834 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
13837 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
13838 hw->bus.speed < i40e_bus_speed_8000) {
13839 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
13840 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
13844 /* get the requested speeds from the fw */
13845 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
13847 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n",
13848 i40e_stat_str(&pf->hw, err),
13849 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
13850 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
13852 /* get the supported phy types from the fw */
13853 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
13855 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n",
13856 i40e_stat_str(&pf->hw, err),
13857 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
13859 /* Add a filter to drop all Flow control frames from any VSI from being
13860 * transmitted. By doing so we stop a malicious VF from sending out
13861 * PAUSE or PFC frames and potentially controlling traffic for other
13863 * The FW can still send Flow control frames if enabled.
13865 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
13866 pf->main_vsi_seid);
13868 if ((pf->hw.device_id == I40E_DEV_ID_10G_BASE_T) ||
13869 (pf->hw.device_id == I40E_DEV_ID_10G_BASE_T4))
13870 pf->hw_features |= I40E_HW_PHY_CONTROLS_LEDS;
13871 if (pf->hw.device_id == I40E_DEV_ID_SFP_I_X722)
13872 pf->hw_features |= I40E_HW_HAVE_CRT_RETIMER;
13873 /* print a string summarizing features */
13874 i40e_print_features(pf);
13878 /* Unwind what we've done if something failed in the setup */
13880 set_bit(__I40E_DOWN, pf->state);
13881 i40e_clear_interrupt_scheme(pf);
13884 i40e_reset_interrupt_capability(pf);
13885 del_timer_sync(&pf->service_timer);
13887 err_configure_lan_hmc:
13888 (void)i40e_shutdown_lan_hmc(hw);
13890 kfree(pf->qp_pile);
13894 iounmap(hw->hw_addr);
13898 pci_disable_pcie_error_reporting(pdev);
13899 pci_release_mem_regions(pdev);
13902 pci_disable_device(pdev);
13907 * i40e_remove - Device removal routine
13908 * @pdev: PCI device information struct
13910 * i40e_remove is called by the PCI subsystem to alert the driver
13911 * that is should release a PCI device. This could be caused by a
13912 * Hot-Plug event, or because the driver is going to be removed from
13915 static void i40e_remove(struct pci_dev *pdev)
13917 struct i40e_pf *pf = pci_get_drvdata(pdev);
13918 struct i40e_hw *hw = &pf->hw;
13919 i40e_status ret_code;
13922 i40e_dbg_pf_exit(pf);
13926 /* Disable RSS in hw */
13927 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), 0);
13928 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), 0);
13930 /* no more scheduling of any task */
13931 set_bit(__I40E_SUSPENDED, pf->state);
13932 set_bit(__I40E_DOWN, pf->state);
13933 if (pf->service_timer.function)
13934 del_timer_sync(&pf->service_timer);
13935 if (pf->service_task.func)
13936 cancel_work_sync(&pf->service_task);
13938 /* Client close must be called explicitly here because the timer
13939 * has been stopped.
13941 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
13943 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
13945 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
13948 i40e_fdir_teardown(pf);
13950 /* If there is a switch structure or any orphans, remove them.
13951 * This will leave only the PF's VSI remaining.
13953 for (i = 0; i < I40E_MAX_VEB; i++) {
13957 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
13958 pf->veb[i]->uplink_seid == 0)
13959 i40e_switch_branch_release(pf->veb[i]);
13962 /* Now we can shutdown the PF's VSI, just before we kill
13965 if (pf->vsi[pf->lan_vsi])
13966 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
13968 i40e_cloud_filter_exit(pf);
13970 /* remove attached clients */
13971 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
13972 ret_code = i40e_lan_del_device(pf);
13974 dev_warn(&pdev->dev, "Failed to delete client device: %d\n",
13978 /* shutdown and destroy the HMC */
13979 if (hw->hmc.hmc_obj) {
13980 ret_code = i40e_shutdown_lan_hmc(hw);
13982 dev_warn(&pdev->dev,
13983 "Failed to destroy the HMC resources: %d\n",
13987 /* shutdown the adminq */
13988 i40e_shutdown_adminq(hw);
13990 /* destroy the locks only once, here */
13991 mutex_destroy(&hw->aq.arq_mutex);
13992 mutex_destroy(&hw->aq.asq_mutex);
13994 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
13995 i40e_clear_interrupt_scheme(pf);
13996 for (i = 0; i < pf->num_alloc_vsi; i++) {
13998 i40e_vsi_clear_rings(pf->vsi[i]);
13999 i40e_vsi_clear(pf->vsi[i]);
14004 for (i = 0; i < I40E_MAX_VEB; i++) {
14009 kfree(pf->qp_pile);
14012 iounmap(hw->hw_addr);
14014 pci_release_mem_regions(pdev);
14016 pci_disable_pcie_error_reporting(pdev);
14017 pci_disable_device(pdev);
14021 * i40e_pci_error_detected - warning that something funky happened in PCI land
14022 * @pdev: PCI device information struct
14024 * Called to warn that something happened and the error handling steps
14025 * are in progress. Allows the driver to quiesce things, be ready for
14028 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
14029 enum pci_channel_state error)
14031 struct i40e_pf *pf = pci_get_drvdata(pdev);
14033 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
14036 dev_info(&pdev->dev,
14037 "Cannot recover - error happened during device probe\n");
14038 return PCI_ERS_RESULT_DISCONNECT;
14041 /* shutdown all operations */
14042 if (!test_bit(__I40E_SUSPENDED, pf->state))
14043 i40e_prep_for_reset(pf, false);
14045 /* Request a slot reset */
14046 return PCI_ERS_RESULT_NEED_RESET;
14050 * i40e_pci_error_slot_reset - a PCI slot reset just happened
14051 * @pdev: PCI device information struct
14053 * Called to find if the driver can work with the device now that
14054 * the pci slot has been reset. If a basic connection seems good
14055 * (registers are readable and have sane content) then return a
14056 * happy little PCI_ERS_RESULT_xxx.
14058 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
14060 struct i40e_pf *pf = pci_get_drvdata(pdev);
14061 pci_ers_result_t result;
14065 dev_dbg(&pdev->dev, "%s\n", __func__);
14066 if (pci_enable_device_mem(pdev)) {
14067 dev_info(&pdev->dev,
14068 "Cannot re-enable PCI device after reset.\n");
14069 result = PCI_ERS_RESULT_DISCONNECT;
14071 pci_set_master(pdev);
14072 pci_restore_state(pdev);
14073 pci_save_state(pdev);
14074 pci_wake_from_d3(pdev, false);
14076 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
14078 result = PCI_ERS_RESULT_RECOVERED;
14080 result = PCI_ERS_RESULT_DISCONNECT;
14083 err = pci_cleanup_aer_uncorrect_error_status(pdev);
14085 dev_info(&pdev->dev,
14086 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
14088 /* non-fatal, continue */
14095 * i40e_pci_error_reset_prepare - prepare device driver for pci reset
14096 * @pdev: PCI device information struct
14098 static void i40e_pci_error_reset_prepare(struct pci_dev *pdev)
14100 struct i40e_pf *pf = pci_get_drvdata(pdev);
14102 i40e_prep_for_reset(pf, false);
14106 * i40e_pci_error_reset_done - pci reset done, device driver reset can begin
14107 * @pdev: PCI device information struct
14109 static void i40e_pci_error_reset_done(struct pci_dev *pdev)
14111 struct i40e_pf *pf = pci_get_drvdata(pdev);
14113 i40e_reset_and_rebuild(pf, false, false);
14117 * i40e_pci_error_resume - restart operations after PCI error recovery
14118 * @pdev: PCI device information struct
14120 * Called to allow the driver to bring things back up after PCI error
14121 * and/or reset recovery has finished.
14123 static void i40e_pci_error_resume(struct pci_dev *pdev)
14125 struct i40e_pf *pf = pci_get_drvdata(pdev);
14127 dev_dbg(&pdev->dev, "%s\n", __func__);
14128 if (test_bit(__I40E_SUSPENDED, pf->state))
14131 i40e_handle_reset_warning(pf, false);
14135 * i40e_enable_mc_magic_wake - enable multicast magic packet wake up
14136 * using the mac_address_write admin q function
14137 * @pf: pointer to i40e_pf struct
14139 static void i40e_enable_mc_magic_wake(struct i40e_pf *pf)
14141 struct i40e_hw *hw = &pf->hw;
14146 /* Get current MAC address in case it's an LAA */
14147 if (pf->vsi[pf->lan_vsi] && pf->vsi[pf->lan_vsi]->netdev) {
14148 ether_addr_copy(mac_addr,
14149 pf->vsi[pf->lan_vsi]->netdev->dev_addr);
14151 dev_err(&pf->pdev->dev,
14152 "Failed to retrieve MAC address; using default\n");
14153 ether_addr_copy(mac_addr, hw->mac.addr);
14156 /* The FW expects the mac address write cmd to first be called with
14157 * one of these flags before calling it again with the multicast
14160 flags = I40E_AQC_WRITE_TYPE_LAA_WOL;
14162 if (hw->func_caps.flex10_enable && hw->partition_id != 1)
14163 flags = I40E_AQC_WRITE_TYPE_LAA_ONLY;
14165 ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
14167 dev_err(&pf->pdev->dev,
14168 "Failed to update MAC address registers; cannot enable Multicast Magic packet wake up");
14172 flags = I40E_AQC_MC_MAG_EN
14173 | I40E_AQC_WOL_PRESERVE_ON_PFR
14174 | I40E_AQC_WRITE_TYPE_UPDATE_MC_MAG;
14175 ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
14177 dev_err(&pf->pdev->dev,
14178 "Failed to enable Multicast Magic Packet wake up\n");
14182 * i40e_shutdown - PCI callback for shutting down
14183 * @pdev: PCI device information struct
14185 static void i40e_shutdown(struct pci_dev *pdev)
14187 struct i40e_pf *pf = pci_get_drvdata(pdev);
14188 struct i40e_hw *hw = &pf->hw;
14190 set_bit(__I40E_SUSPENDED, pf->state);
14191 set_bit(__I40E_DOWN, pf->state);
14193 i40e_prep_for_reset(pf, true);
14196 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
14197 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
14199 del_timer_sync(&pf->service_timer);
14200 cancel_work_sync(&pf->service_task);
14201 i40e_cloud_filter_exit(pf);
14202 i40e_fdir_teardown(pf);
14204 /* Client close must be called explicitly here because the timer
14205 * has been stopped.
14207 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
14209 if (pf->wol_en && (pf->hw_features & I40E_HW_WOL_MC_MAGIC_PKT_WAKE))
14210 i40e_enable_mc_magic_wake(pf);
14212 i40e_prep_for_reset(pf, false);
14214 wr32(hw, I40E_PFPM_APM,
14215 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
14216 wr32(hw, I40E_PFPM_WUFC,
14217 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
14219 i40e_clear_interrupt_scheme(pf);
14221 if (system_state == SYSTEM_POWER_OFF) {
14222 pci_wake_from_d3(pdev, pf->wol_en);
14223 pci_set_power_state(pdev, PCI_D3hot);
14228 * i40e_suspend - PM callback for moving to D3
14229 * @dev: generic device information structure
14231 static int __maybe_unused i40e_suspend(struct device *dev)
14233 struct pci_dev *pdev = to_pci_dev(dev);
14234 struct i40e_pf *pf = pci_get_drvdata(pdev);
14235 struct i40e_hw *hw = &pf->hw;
14237 /* If we're already suspended, then there is nothing to do */
14238 if (test_and_set_bit(__I40E_SUSPENDED, pf->state))
14241 set_bit(__I40E_DOWN, pf->state);
14243 /* Ensure service task will not be running */
14244 del_timer_sync(&pf->service_timer);
14245 cancel_work_sync(&pf->service_task);
14247 if (pf->wol_en && (pf->hw_features & I40E_HW_WOL_MC_MAGIC_PKT_WAKE))
14248 i40e_enable_mc_magic_wake(pf);
14250 i40e_prep_for_reset(pf, false);
14252 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
14253 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
14255 /* Clear the interrupt scheme and release our IRQs so that the system
14256 * can safely hibernate even when there are a large number of CPUs.
14257 * Otherwise hibernation might fail when mapping all the vectors back
14260 i40e_clear_interrupt_scheme(pf);
14266 * i40e_resume - PM callback for waking up from D3
14267 * @dev: generic device information structure
14269 static int __maybe_unused i40e_resume(struct device *dev)
14271 struct pci_dev *pdev = to_pci_dev(dev);
14272 struct i40e_pf *pf = pci_get_drvdata(pdev);
14275 /* If we're not suspended, then there is nothing to do */
14276 if (!test_bit(__I40E_SUSPENDED, pf->state))
14279 /* We cleared the interrupt scheme when we suspended, so we need to
14280 * restore it now to resume device functionality.
14282 err = i40e_restore_interrupt_scheme(pf);
14284 dev_err(&pdev->dev, "Cannot restore interrupt scheme: %d\n",
14288 clear_bit(__I40E_DOWN, pf->state);
14289 i40e_reset_and_rebuild(pf, false, false);
14291 /* Clear suspended state last after everything is recovered */
14292 clear_bit(__I40E_SUSPENDED, pf->state);
14294 /* Restart the service task */
14295 mod_timer(&pf->service_timer,
14296 round_jiffies(jiffies + pf->service_timer_period));
14301 static const struct pci_error_handlers i40e_err_handler = {
14302 .error_detected = i40e_pci_error_detected,
14303 .slot_reset = i40e_pci_error_slot_reset,
14304 .reset_prepare = i40e_pci_error_reset_prepare,
14305 .reset_done = i40e_pci_error_reset_done,
14306 .resume = i40e_pci_error_resume,
14309 static SIMPLE_DEV_PM_OPS(i40e_pm_ops, i40e_suspend, i40e_resume);
14311 static struct pci_driver i40e_driver = {
14312 .name = i40e_driver_name,
14313 .id_table = i40e_pci_tbl,
14314 .probe = i40e_probe,
14315 .remove = i40e_remove,
14317 .pm = &i40e_pm_ops,
14319 .shutdown = i40e_shutdown,
14320 .err_handler = &i40e_err_handler,
14321 .sriov_configure = i40e_pci_sriov_configure,
14325 * i40e_init_module - Driver registration routine
14327 * i40e_init_module is the first routine called when the driver is
14328 * loaded. All it does is register with the PCI subsystem.
14330 static int __init i40e_init_module(void)
14332 pr_info("%s: %s - version %s\n", i40e_driver_name,
14333 i40e_driver_string, i40e_driver_version_str);
14334 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
14336 /* There is no need to throttle the number of active tasks because
14337 * each device limits its own task using a state bit for scheduling
14338 * the service task, and the device tasks do not interfere with each
14339 * other, so we don't set a max task limit. We must set WQ_MEM_RECLAIM
14340 * since we need to be able to guarantee forward progress even under
14343 i40e_wq = alloc_workqueue("%s", WQ_MEM_RECLAIM, 0, i40e_driver_name);
14345 pr_err("%s: Failed to create workqueue\n", i40e_driver_name);
14350 return pci_register_driver(&i40e_driver);
14352 module_init(i40e_init_module);
14355 * i40e_exit_module - Driver exit cleanup routine
14357 * i40e_exit_module is called just before the driver is removed
14360 static void __exit i40e_exit_module(void)
14362 pci_unregister_driver(&i40e_driver);
14363 destroy_workqueue(i40e_wq);
14366 module_exit(i40e_exit_module);