drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c

   1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
   2 /* Copyright 2014-2016 Freescale Semiconductor Inc.
   3  * Copyright 2016-2017 NXP
   4  */
   5 #include <linux/init.h>
   6 #include <linux/module.h>
   7 #include <linux/platform_device.h>
   8 #include <linux/etherdevice.h>
   9 #include <linux/of_net.h>
  10 #include <linux/interrupt.h>
  11 #include <linux/msi.h>
  12 #include <linux/kthread.h>
  13 #include <linux/iommu.h>
  14 #include <linux/net_tstamp.h>
  15 #include <linux/fsl/mc.h>
  16 #include <linux/bpf.h>
  17 #include <linux/bpf_trace.h>
  18 #include <net/sock.h>
  19
  20 #include "dpaa2-eth.h"
  21
  22 /* CREATE_TRACE_POINTS only needs to be defined once. Other dpa files
  23  * using trace events only need to #include <trace/events/sched.h>
  24  */
  25 #define CREATE_TRACE_POINTS
  26 #include "dpaa2-eth-trace.h"
  27
  28 MODULE_LICENSE("Dual BSD/GPL");
  29 MODULE_AUTHOR("Freescale Semiconductor, Inc");
  30 MODULE_DESCRIPTION("Freescale DPAA2 Ethernet Driver");
  31
  32 static void *dpaa2_iova_to_virt(struct iommu_domain *domain,
  33                                 dma_addr_t iova_addr)
  34 {
  35         phys_addr_t phys_addr;
  36
  37         phys_addr = domain ? iommu_iova_to_phys(domain, iova_addr) : iova_addr;
  38
  39         return phys_to_virt(phys_addr);
  40 }
  41
  42 static void validate_rx_csum(struct dpaa2_eth_priv *priv,
  43                              u32 fd_status,
  44                              struct sk_buff *skb)
  45 {
  46         skb_checksum_none_assert(skb);
  47
  48         /* HW checksum validation is disabled, nothing to do here */
  49         if (!(priv->net_dev->features & NETIF_F_RXCSUM))
  50                 return;
  51
  52         /* Read checksum validation bits */
  53         if (!((fd_status & DPAA2_FAS_L3CV) &&
  54               (fd_status & DPAA2_FAS_L4CV)))
  55                 return;
  56
  57         /* Inform the stack there's no need to compute L3/L4 csum anymore */
  58         skb->ip_summed = CHECKSUM_UNNECESSARY;
  59 }
  60
  61 /* Free a received FD.
  62  * Not to be used for Tx conf FDs or on any other paths.
  63  */
  64 static void free_rx_fd(struct dpaa2_eth_priv *priv,
  65                        const struct dpaa2_fd *fd,
  66                        void *vaddr)
  67 {
  68         struct device *dev = priv->net_dev->dev.parent;
  69         dma_addr_t addr = dpaa2_fd_get_addr(fd);
  70         u8 fd_format = dpaa2_fd_get_format(fd);
  71         struct dpaa2_sg_entry *sgt;
  72         void *sg_vaddr;
  73         int i;
  74
  75         /* If single buffer frame, just free the data buffer */
  76         if (fd_format == dpaa2_fd_single)
  77                 goto free_buf;
  78         else if (fd_format != dpaa2_fd_sg)
  79                 /* We don't support any other format */
  80                 return;
  81
  82         /* For S/G frames, we first need to free all SG entries
  83          * except the first one, which was taken care of already
  84          */
  85         sgt = vaddr + dpaa2_fd_get_offset(fd);
  86         for (i = 1; i < DPAA2_ETH_MAX_SG_ENTRIES; i++) {
  87                 addr = dpaa2_sg_get_addr(&sgt[i]);
  88                 sg_vaddr = dpaa2_iova_to_virt(priv->iommu_domain, addr);
  89                 dma_unmap_page(dev, addr, DPAA2_ETH_RX_BUF_SIZE,
  90                                DMA_BIDIRECTIONAL);
  91
  92                 free_pages((unsigned long)sg_vaddr, 0);
  93                 if (dpaa2_sg_is_final(&sgt[i]))
  94                         break;
  95         }
  96
  97 free_buf:
  98         free_pages((unsigned long)vaddr, 0);
  99 }
 100
 101 /* Build a linear skb based on a single-buffer frame descriptor */
 102 static struct sk_buff *build_linear_skb(struct dpaa2_eth_channel *ch,
 103                                         const struct dpaa2_fd *fd,
 104                                         void *fd_vaddr)
 105 {
 106         struct sk_buff *skb = NULL;
 107         u16 fd_offset = dpaa2_fd_get_offset(fd);
 108         u32 fd_length = dpaa2_fd_get_len(fd);
 109
 110         ch->buf_count--;
 111
 112         skb = build_skb(fd_vaddr, DPAA2_ETH_RX_BUF_RAW_SIZE);
 113         if (unlikely(!skb))
 114                 return NULL;
 115
 116         skb_reserve(skb, fd_offset);
 117         skb_put(skb, fd_length);
 118
 119         return skb;
 120 }
 121
 122 /* Build a non linear (fragmented) skb based on a S/G table */
 123 static struct sk_buff *build_frag_skb(struct dpaa2_eth_priv *priv,
 124                                       struct dpaa2_eth_channel *ch,
 125                                       struct dpaa2_sg_entry *sgt)
 126 {
 127         struct sk_buff *skb = NULL;
 128         struct device *dev = priv->net_dev->dev.parent;
 129         void *sg_vaddr;
 130         dma_addr_t sg_addr;
 131         u16 sg_offset;
 132         u32 sg_length;
 133         struct page *page, *head_page;
 134         int page_offset;
 135         int i;
 136
 137         for (i = 0; i < DPAA2_ETH_MAX_SG_ENTRIES; i++) {
 138                 struct dpaa2_sg_entry *sge = &sgt[i];
 139
 140                 /* NOTE: We only support SG entries in dpaa2_sg_single format,
 141                  * but this is the only format we may receive from HW anyway
 142                  */
 143
 144                 /* Get the address and length from the S/G entry */
 145                 sg_addr = dpaa2_sg_get_addr(sge);
 146                 sg_vaddr = dpaa2_iova_to_virt(priv->iommu_domain, sg_addr);
 147                 dma_unmap_page(dev, sg_addr, DPAA2_ETH_RX_BUF_SIZE,
 148                                DMA_BIDIRECTIONAL);
 149
 150                 sg_length = dpaa2_sg_get_len(sge);
 151
 152                 if (i == 0) {
 153                         /* We build the skb around the first data buffer */
 154                         skb = build_skb(sg_vaddr, DPAA2_ETH_RX_BUF_RAW_SIZE);
 155                         if (unlikely(!skb)) {
 156                                 /* Free the first SG entry now, since we already
 157                                  * unmapped it and obtained the virtual address
 158                                  */
 159                                 free_pages((unsigned long)sg_vaddr, 0);
 160
 161                                 /* We still need to subtract the buffers used
 162                                  * by this FD from our software counter
 163                                  */
 164                                 while (!dpaa2_sg_is_final(&sgt[i]) &&
 165                                        i < DPAA2_ETH_MAX_SG_ENTRIES)
 166                                         i++;
 167                                 break;
 168                         }
 169
 170                         sg_offset = dpaa2_sg_get_offset(sge);
 171                         skb_reserve(skb, sg_offset);
 172                         skb_put(skb, sg_length);
 173                 } else {
 174                         /* Rest of the data buffers are stored as skb frags */
 175                         page = virt_to_page(sg_vaddr);
 176                         head_page = virt_to_head_page(sg_vaddr);
 177
 178                         /* Offset in page (which may be compound).
 179                          * Data in subsequent SG entries is stored from the
 180                          * beginning of the buffer, so we don't need to add the
 181                          * sg_offset.
 182                          */
 183                         page_offset = ((unsigned long)sg_vaddr &
 184                                 (PAGE_SIZE - 1)) +
 185                                 (page_address(page) - page_address(head_page));
 186
 187                         skb_add_rx_frag(skb, i - 1, head_page, page_offset,
 188                                         sg_length, DPAA2_ETH_RX_BUF_SIZE);
 189                 }
 190
 191                 if (dpaa2_sg_is_final(sge))
 192                         break;
 193         }
 194
 195         WARN_ONCE(i == DPAA2_ETH_MAX_SG_ENTRIES, "Final bit not set in SGT");
 196
 197         /* Count all data buffers + SG table buffer */
 198         ch->buf_count -= i + 2;
 199
 200         return skb;
 201 }
 202
 203 /* Free buffers acquired from the buffer pool or which were meant to
 204  * be released in the pool
 205  */
 206 static void free_bufs(struct dpaa2_eth_priv *priv, u64 *buf_array, int count)
 207 {
 208         struct device *dev = priv->net_dev->dev.parent;
 209         void *vaddr;
 210         int i;
 211
 212         for (i = 0; i < count; i++) {
 213                 vaddr = dpaa2_iova_to_virt(priv->iommu_domain, buf_array[i]);
 214                 dma_unmap_page(dev, buf_array[i], DPAA2_ETH_RX_BUF_SIZE,
 215                                DMA_BIDIRECTIONAL);
 216                 free_pages((unsigned long)vaddr, 0);
 217         }
 218 }
 219
 220 static void xdp_release_buf(struct dpaa2_eth_priv *priv,
 221                             struct dpaa2_eth_channel *ch,
 222                             dma_addr_t addr)
 223 {
 224         int err;
 225
 226         ch->xdp.drop_bufs[ch->xdp.drop_cnt++] = addr;
 227         if (ch->xdp.drop_cnt < DPAA2_ETH_BUFS_PER_CMD)
 228                 return;
 229
 230         while ((err = dpaa2_io_service_release(ch->dpio, priv->bpid,
 231                                                ch->xdp.drop_bufs,
 232                                                ch->xdp.drop_cnt)) == -EBUSY)
 233                 cpu_relax();
 234
 235         if (err) {
 236                 free_bufs(priv, ch->xdp.drop_bufs, ch->xdp.drop_cnt);
 237                 ch->buf_count -= ch->xdp.drop_cnt;
 238         }
 239
 240         ch->xdp.drop_cnt = 0;
 241 }
 242
 243 static int xdp_enqueue(struct dpaa2_eth_priv *priv, struct dpaa2_fd *fd,
 244                        void *buf_start, u16 queue_id)
 245 {
 246         struct dpaa2_eth_fq *fq;
 247         struct dpaa2_faead *faead;
 248         u32 ctrl, frc;
 249         int i, err;
 250
 251         /* Mark the egress frame hardware annotation area as valid */
 252         frc = dpaa2_fd_get_frc(fd);
 253         dpaa2_fd_set_frc(fd, frc | DPAA2_FD_FRC_FAEADV);
 254         dpaa2_fd_set_ctrl(fd, DPAA2_FD_CTRL_ASAL);
 255
 256         /* Instruct hardware to release the FD buffer directly into
 257          * the buffer pool once transmission is completed, instead of
 258          * sending a Tx confirmation frame to us
 259          */
 260         ctrl = DPAA2_FAEAD_A4V | DPAA2_FAEAD_A2V | DPAA2_FAEAD_EBDDV;
 261         faead = dpaa2_get_faead(buf_start, false);
 262         faead->ctrl = cpu_to_le32(ctrl);
 263         faead->conf_fqid = 0;
 264
 265         fq = &priv->fq[queue_id];
 266         for (i = 0; i < DPAA2_ETH_ENQUEUE_RETRIES; i++) {
 267                 err = priv->enqueue(priv, fq, fd, 0);
 268                 if (err != -EBUSY)
 269                         break;
 270         }
 271
 272         return err;
 273 }
 274
 275 static u32 run_xdp(struct dpaa2_eth_priv *priv,
 276                    struct dpaa2_eth_channel *ch,
 277                    struct dpaa2_eth_fq *rx_fq,
 278                    struct dpaa2_fd *fd, void *vaddr)
 279 {
 280         dma_addr_t addr = dpaa2_fd_get_addr(fd);
 281         struct rtnl_link_stats64 *percpu_stats;
 282         struct bpf_prog *xdp_prog;
 283         struct xdp_buff xdp;
 284         u32 xdp_act = XDP_PASS;
 285         int err;
 286
 287         percpu_stats = this_cpu_ptr(priv->percpu_stats);
 288
 289         rcu_read_lock();
 290
 291         xdp_prog = READ_ONCE(ch->xdp.prog);
 292         if (!xdp_prog)
 293                 goto out;
 294
 295         xdp.data = vaddr + dpaa2_fd_get_offset(fd);
 296         xdp.data_end = xdp.data + dpaa2_fd_get_len(fd);
 297         xdp.data_hard_start = xdp.data - XDP_PACKET_HEADROOM;
 298         xdp_set_data_meta_invalid(&xdp);
 299         xdp.rxq = &ch->xdp_rxq;
 300
 301         xdp_act = bpf_prog_run_xdp(xdp_prog, &xdp);
 302
 303         /* xdp.data pointer may have changed */
 304         dpaa2_fd_set_offset(fd, xdp.data - vaddr);
 305         dpaa2_fd_set_len(fd, xdp.data_end - xdp.data);
 306
 307         switch (xdp_act) {
 308         case XDP_PASS:
 309                 break;
 310         case XDP_TX:
 311                 err = xdp_enqueue(priv, fd, vaddr, rx_fq->flowid);
 312                 if (err) {
 313                         xdp_release_buf(priv, ch, addr);
 314                         percpu_stats->tx_errors++;
 315                         ch->stats.xdp_tx_err++;
 316                 } else {
 317                         percpu_stats->tx_packets++;
 318                         percpu_stats->tx_bytes += dpaa2_fd_get_len(fd);
 319                         ch->stats.xdp_tx++;
 320                 }
 321                 break;
 322         default:
 323                 bpf_warn_invalid_xdp_action(xdp_act);
 324                 /* fall through */
 325         case XDP_ABORTED:
 326                 trace_xdp_exception(priv->net_dev, xdp_prog, xdp_act);
 327                 /* fall through */
 328         case XDP_DROP:
 329                 xdp_release_buf(priv, ch, addr);
 330                 ch->stats.xdp_drop++;
 331                 break;
 332         case XDP_REDIRECT:
 333                 dma_unmap_page(priv->net_dev->dev.parent, addr,
 334                                DPAA2_ETH_RX_BUF_SIZE, DMA_BIDIRECTIONAL);
 335                 ch->buf_count--;
 336                 xdp.data_hard_start = vaddr;
 337                 err = xdp_do_redirect(priv->net_dev, &xdp, xdp_prog);
 338                 if (unlikely(err))
 339                         ch->stats.xdp_drop++;
 340                 else
 341                         ch->stats.xdp_redirect++;
 342                 break;
 343         }
 344
 345         ch->xdp.res |= xdp_act;
 346 out:
 347         rcu_read_unlock();
 348         return xdp_act;
 349 }
 350
 351 /* Main Rx frame processing routine */
 352 static void dpaa2_eth_rx(struct dpaa2_eth_priv *priv,
 353                          struct dpaa2_eth_channel *ch,
 354                          const struct dpaa2_fd *fd,
 355                          struct dpaa2_eth_fq *fq)
 356 {
 357         dma_addr_t addr = dpaa2_fd_get_addr(fd);
 358         u8 fd_format = dpaa2_fd_get_format(fd);
 359         void *vaddr;
 360         struct sk_buff *skb;
 361         struct rtnl_link_stats64 *percpu_stats;
 362         struct dpaa2_eth_drv_stats *percpu_extras;
 363         struct device *dev = priv->net_dev->dev.parent;
 364         struct dpaa2_fas *fas;
 365         void *buf_data;
 366         u32 status = 0;
 367         u32 xdp_act;
 368
 369         /* Tracing point */
 370         trace_dpaa2_rx_fd(priv->net_dev, fd);
 371
 372         vaddr = dpaa2_iova_to_virt(priv->iommu_domain, addr);
 373         dma_sync_single_for_cpu(dev, addr, DPAA2_ETH_RX_BUF_SIZE,
 374                                 DMA_BIDIRECTIONAL);
 375
 376         fas = dpaa2_get_fas(vaddr, false);
 377         prefetch(fas);
 378         buf_data = vaddr + dpaa2_fd_get_offset(fd);
 379         prefetch(buf_data);
 380
 381         percpu_stats = this_cpu_ptr(priv->percpu_stats);
 382         percpu_extras = this_cpu_ptr(priv->percpu_extras);
 383
 384         if (fd_format == dpaa2_fd_single) {
 385                 xdp_act = run_xdp(priv, ch, fq, (struct dpaa2_fd *)fd, vaddr);
 386                 if (xdp_act != XDP_PASS) {
 387                         percpu_stats->rx_packets++;
 388                         percpu_stats->rx_bytes += dpaa2_fd_get_len(fd);
 389                         return;
 390                 }
 391
 392                 dma_unmap_page(dev, addr, DPAA2_ETH_RX_BUF_SIZE,
 393                                DMA_BIDIRECTIONAL);
 394                 skb = build_linear_skb(ch, fd, vaddr);
 395         } else if (fd_format == dpaa2_fd_sg) {
 396                 WARN_ON(priv->xdp_prog);
 397
 398                 dma_unmap_page(dev, addr, DPAA2_ETH_RX_BUF_SIZE,
 399                                DMA_BIDIRECTIONAL);
 400                 skb = build_frag_skb(priv, ch, buf_data);
 401                 free_pages((unsigned long)vaddr, 0);
 402                 percpu_extras->rx_sg_frames++;
 403                 percpu_extras->rx_sg_bytes += dpaa2_fd_get_len(fd);
 404         } else {
 405                 /* We don't support any other format */
 406                 goto err_frame_format;
 407         }
 408
 409         if (unlikely(!skb))
 410                 goto err_build_skb;
 411
 412         prefetch(skb->data);
 413
 414         /* Get the timestamp value */
 415         if (priv->rx_tstamp) {
 416                 struct skb_shared_hwtstamps *shhwtstamps = skb_hwtstamps(skb);
 417                 __le64 *ts = dpaa2_get_ts(vaddr, false);
 418                 u64 ns;
 419
 420                 memset(shhwtstamps, 0, sizeof(*shhwtstamps));
 421
 422                 ns = DPAA2_PTP_CLK_PERIOD_NS * le64_to_cpup(ts);
 423                 shhwtstamps->hwtstamp = ns_to_ktime(ns);
 424         }
 425
 426         /* Check if we need to validate the L4 csum */
 427         if (likely(dpaa2_fd_get_frc(fd) & DPAA2_FD_FRC_FASV)) {
 428                 status = le32_to_cpu(fas->status);
 429                 validate_rx_csum(priv, status, skb);
 430         }
 431
 432         skb->protocol = eth_type_trans(skb, priv->net_dev);
 433         skb_record_rx_queue(skb, fq->flowid);
 434
 435         percpu_stats->rx_packets++;
 436         percpu_stats->rx_bytes += dpaa2_fd_get_len(fd);
 437
 438         napi_gro_receive(&ch->napi, skb);
 439
 440         return;
 441
 442 err_build_skb:
 443         free_rx_fd(priv, fd, vaddr);
 444 err_frame_format:
 445         percpu_stats->rx_dropped++;
 446 }
 447
 448 /* Consume all frames pull-dequeued into the store. This is the simplest way to
 449  * make sure we don't accidentally issue another volatile dequeue which would
 450  * overwrite (leak) frames already in the store.
 451  *
 452  * Observance of NAPI budget is not our concern, leaving that to the caller.
 453  */
 454 static int consume_frames(struct dpaa2_eth_channel *ch,
 455                           struct dpaa2_eth_fq **src)
 456 {
 457         struct dpaa2_eth_priv *priv = ch->priv;
 458         struct dpaa2_eth_fq *fq = NULL;
 459         struct dpaa2_dq *dq;
 460         const struct dpaa2_fd *fd;
 461         int cleaned = 0;
 462         int is_last;
 463
 464         do {
 465                 dq = dpaa2_io_store_next(ch->store, &is_last);
 466                 if (unlikely(!dq)) {
 467                         /* If we're here, we *must* have placed a
 468                          * volatile dequeue comnmand, so keep reading through
 469                          * the store until we get some sort of valid response
 470                          * token (either a valid frame or an "empty dequeue")
 471                          */
 472                         continue;
 473                 }
 474
 475                 fd = dpaa2_dq_fd(dq);
 476                 fq = (struct dpaa2_eth_fq *)(uintptr_t)dpaa2_dq_fqd_ctx(dq);
 477
 478                 fq->consume(priv, ch, fd, fq);
 479                 cleaned++;
 480         } while (!is_last);
 481
 482         if (!cleaned)
 483                 return 0;
 484
 485         fq->stats.frames += cleaned;
 486
 487         /* A dequeue operation only pulls frames from a single queue
 488          * into the store. Return the frame queue as an out param.
 489          */
 490         if (src)
 491                 *src = fq;
 492
 493         return cleaned;
 494 }
 495
 496 /* Configure the egress frame annotation for timestamp update */
 497 static void enable_tx_tstamp(struct dpaa2_fd *fd, void *buf_start)
 498 {
 499         struct dpaa2_faead *faead;
 500         u32 ctrl, frc;
 501
 502         /* Mark the egress frame annotation area as valid */
 503         frc = dpaa2_fd_get_frc(fd);
 504         dpaa2_fd_set_frc(fd, frc | DPAA2_FD_FRC_FAEADV);
 505
 506         /* Set hardware annotation size */
 507         ctrl = dpaa2_fd_get_ctrl(fd);
 508         dpaa2_fd_set_ctrl(fd, ctrl | DPAA2_FD_CTRL_ASAL);
 509
 510         /* enable UPD (update prepanded data) bit in FAEAD field of
 511          * hardware frame annotation area
 512          */
 513         ctrl = DPAA2_FAEAD_A2V | DPAA2_FAEAD_UPDV | DPAA2_FAEAD_UPD;
 514         faead = dpaa2_get_faead(buf_start, true);
 515         faead->ctrl = cpu_to_le32(ctrl);
 516 }
 517
 518 /* Create a frame descriptor based on a fragmented skb */
 519 static int build_sg_fd(struct dpaa2_eth_priv *priv,
 520                        struct sk_buff *skb,
 521                        struct dpaa2_fd *fd)
 522 {
 523         struct device *dev = priv->net_dev->dev.parent;
 524         void *sgt_buf = NULL;
 525         dma_addr_t addr;
 526         int nr_frags = skb_shinfo(skb)->nr_frags;
 527         struct dpaa2_sg_entry *sgt;
 528         int i, err;
 529         int sgt_buf_size;
 530         struct scatterlist *scl, *crt_scl;
 531         int num_sg;
 532         int num_dma_bufs;
 533         struct dpaa2_eth_swa *swa;
 534
 535         /* Create and map scatterlist.
 536          * We don't advertise NETIF_F_FRAGLIST, so skb_to_sgvec() will not have
 537          * to go beyond nr_frags+1.
 538          * Note: We don't support chained scatterlists
 539          */
 540         if (unlikely(PAGE_SIZE / sizeof(struct scatterlist) < nr_frags + 1))
 541                 return -EINVAL;
 542
 543         scl = kcalloc(nr_frags + 1, sizeof(struct scatterlist), GFP_ATOMIC);
 544         if (unlikely(!scl))
 545                 return -ENOMEM;
 546
 547         sg_init_table(scl, nr_frags + 1);
 548         num_sg = skb_to_sgvec(skb, scl, 0, skb->len);
 549         num_dma_bufs = dma_map_sg(dev, scl, num_sg, DMA_BIDIRECTIONAL);
 550         if (unlikely(!num_dma_bufs)) {
 551                 err = -ENOMEM;
 552                 goto dma_map_sg_failed;
 553         }
 554
 555         /* Prepare the HW SGT structure */
 556         sgt_buf_size = priv->tx_data_offset +
 557                        sizeof(struct dpaa2_sg_entry) *  num_dma_bufs;
 558         sgt_buf = netdev_alloc_frag(sgt_buf_size + DPAA2_ETH_TX_BUF_ALIGN);
 559         if (unlikely(!sgt_buf)) {
 560                 err = -ENOMEM;
 561                 goto sgt_buf_alloc_failed;
 562         }
 563         sgt_buf = PTR_ALIGN(sgt_buf, DPAA2_ETH_TX_BUF_ALIGN);
 564         memset(sgt_buf, 0, sgt_buf_size);
 565
 566         sgt = (struct dpaa2_sg_entry *)(sgt_buf + priv->tx_data_offset);
 567
 568         /* Fill in the HW SGT structure.
 569          *
 570          * sgt_buf is zeroed out, so the following fields are implicit
 571          * in all sgt entries:
 572          *   - offset is 0
 573          *   - format is 'dpaa2_sg_single'
 574          */
 575         for_each_sg(scl, crt_scl, num_dma_bufs, i) {
 576                 dpaa2_sg_set_addr(&sgt[i], sg_dma_address(crt_scl));
 577                 dpaa2_sg_set_len(&sgt[i], sg_dma_len(crt_scl));
 578         }
 579         dpaa2_sg_set_final(&sgt[i - 1], true);
 580
 581         /* Store the skb backpointer in the SGT buffer.
 582          * Fit the scatterlist and the number of buffers alongside the
 583          * skb backpointer in the software annotation area. We'll need
 584          * all of them on Tx Conf.
 585          */
 586         swa = (struct dpaa2_eth_swa *)sgt_buf;
 587         swa->type = DPAA2_ETH_SWA_SG;
 588         swa->sg.skb = skb;
 589         swa->sg.scl = scl;
 590         swa->sg.num_sg = num_sg;
 591         swa->sg.sgt_size = sgt_buf_size;
 592
 593         /* Separately map the SGT buffer */
 594         addr = dma_map_single(dev, sgt_buf, sgt_buf_size, DMA_BIDIRECTIONAL);
 595         if (unlikely(dma_mapping_error(dev, addr))) {
 596                 err = -ENOMEM;
 597                 goto dma_map_single_failed;
 598         }
 599         dpaa2_fd_set_offset(fd, priv->tx_data_offset);
 600         dpaa2_fd_set_format(fd, dpaa2_fd_sg);
 601         dpaa2_fd_set_addr(fd, addr);
 602         dpaa2_fd_set_len(fd, skb->len);
 603         dpaa2_fd_set_ctrl(fd, FD_CTRL_PTA);
 604
 605         if (priv->tx_tstamp && skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)
 606                 enable_tx_tstamp(fd, sgt_buf);
 607
 608         return 0;
 609
 610 dma_map_single_failed:
 611         skb_free_frag(sgt_buf);
 612 sgt_buf_alloc_failed:
 613         dma_unmap_sg(dev, scl, num_sg, DMA_BIDIRECTIONAL);
 614 dma_map_sg_failed:
 615         kfree(scl);
 616         return err;
 617 }
 618
 619 /* Create a frame descriptor based on a linear skb */
 620 static int build_single_fd(struct dpaa2_eth_priv *priv,
 621                            struct sk_buff *skb,
 622                            struct dpaa2_fd *fd)
 623 {
 624         struct device *dev = priv->net_dev->dev.parent;
 625         u8 *buffer_start, *aligned_start;
 626         struct dpaa2_eth_swa *swa;
 627         dma_addr_t addr;
 628
 629         buffer_start = skb->data - dpaa2_eth_needed_headroom(priv, skb);
 630
 631         /* If there's enough room to align the FD address, do it.
 632          * It will help hardware optimize accesses.
 633          */
 634         aligned_start = PTR_ALIGN(buffer_start - DPAA2_ETH_TX_BUF_ALIGN,
 635                                   DPAA2_ETH_TX_BUF_ALIGN);
 636         if (aligned_start >= skb->head)
 637                 buffer_start = aligned_start;
 638
 639         /* Store a backpointer to the skb at the beginning of the buffer
 640          * (in the private data area) such that we can release it
 641          * on Tx confirm
 642          */
 643         swa = (struct dpaa2_eth_swa *)buffer_start;
 644         swa->type = DPAA2_ETH_SWA_SINGLE;
 645         swa->single.skb = skb;
 646
 647         addr = dma_map_single(dev, buffer_start,
 648                               skb_tail_pointer(skb) - buffer_start,
 649                               DMA_BIDIRECTIONAL);
 650         if (unlikely(dma_mapping_error(dev, addr)))
 651                 return -ENOMEM;
 652
 653         dpaa2_fd_set_addr(fd, addr);
 654         dpaa2_fd_set_offset(fd, (u16)(skb->data - buffer_start));
 655         dpaa2_fd_set_len(fd, skb->len);
 656         dpaa2_fd_set_format(fd, dpaa2_fd_single);
 657         dpaa2_fd_set_ctrl(fd, FD_CTRL_PTA);
 658
 659         if (priv->tx_tstamp && skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)
 660                 enable_tx_tstamp(fd, buffer_start);
 661
 662         return 0;
 663 }
 664
 665 /* FD freeing routine on the Tx path
 666  *
 667  * DMA-unmap and free FD and possibly SGT buffer allocated on Tx. The skb
 668  * back-pointed to is also freed.
 669  * This can be called either from dpaa2_eth_tx_conf() or on the error path of
 670  * dpaa2_eth_tx().
 671  */
 672 static void free_tx_fd(const struct dpaa2_eth_priv *priv,
 673                        struct dpaa2_eth_fq *fq,
 674                        const struct dpaa2_fd *fd, bool in_napi)
 675 {
 676         struct device *dev = priv->net_dev->dev.parent;
 677         dma_addr_t fd_addr;
 678         struct sk_buff *skb = NULL;
 679         unsigned char *buffer_start;
 680         struct dpaa2_eth_swa *swa;
 681         u8 fd_format = dpaa2_fd_get_format(fd);
 682         u32 fd_len = dpaa2_fd_get_len(fd);
 683
 684         fd_addr = dpaa2_fd_get_addr(fd);
 685         buffer_start = dpaa2_iova_to_virt(priv->iommu_domain, fd_addr);
 686         swa = (struct dpaa2_eth_swa *)buffer_start;
 687
 688         if (fd_format == dpaa2_fd_single) {
 689                 if (swa->type == DPAA2_ETH_SWA_SINGLE) {
 690                         skb = swa->single.skb;
 691                         /* Accessing the skb buffer is safe before dma unmap,
 692                          * because we didn't map the actual skb shell.
 693                          */
 694                         dma_unmap_single(dev, fd_addr,
 695                                          skb_tail_pointer(skb) - buffer_start,
 696                                          DMA_BIDIRECTIONAL);
 697                 } else {
 698                         WARN_ONCE(swa->type != DPAA2_ETH_SWA_XDP, "Wrong SWA type");
 699                         dma_unmap_single(dev, fd_addr, swa->xdp.dma_size,
 700                                          DMA_BIDIRECTIONAL);
 701                 }
 702         } else if (fd_format == dpaa2_fd_sg) {
 703                 skb = swa->sg.skb;
 704
 705                 /* Unmap the scatterlist */
 706                 dma_unmap_sg(dev, swa->sg.scl, swa->sg.num_sg,
 707                              DMA_BIDIRECTIONAL);
 708                 kfree(swa->sg.scl);
 709
 710                 /* Unmap the SGT buffer */
 711                 dma_unmap_single(dev, fd_addr, swa->sg.sgt_size,
 712                                  DMA_BIDIRECTIONAL);
 713         } else {
 714                 netdev_dbg(priv->net_dev, "Invalid FD format\n");
 715                 return;
 716         }
 717
 718         if (swa->type != DPAA2_ETH_SWA_XDP && in_napi) {
 719                 fq->dq_frames++;
 720                 fq->dq_bytes += fd_len;
 721         }
 722
 723         if (swa->type == DPAA2_ETH_SWA_XDP) {
 724                 xdp_return_frame(swa->xdp.xdpf);
 725                 return;
 726         }
 727
 728         /* Get the timestamp value */
 729         if (priv->tx_tstamp && skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) {
 730                 struct skb_shared_hwtstamps shhwtstamps;
 731                 __le64 *ts = dpaa2_get_ts(buffer_start, true);
 732                 u64 ns;
 733
 734                 memset(&shhwtstamps, 0, sizeof(shhwtstamps));
 735
 736                 ns = DPAA2_PTP_CLK_PERIOD_NS * le64_to_cpup(ts);
 737                 shhwtstamps.hwtstamp = ns_to_ktime(ns);
 738                 skb_tstamp_tx(skb, &shhwtstamps);
 739         }
 740
 741         /* Free SGT buffer allocated on tx */
 742         if (fd_format != dpaa2_fd_single)
 743                 skb_free_frag(buffer_start);
 744
 745         /* Move on with skb release */
 746         napi_consume_skb(skb, in_napi);
 747 }
 748
 749 static netdev_tx_t dpaa2_eth_tx(struct sk_buff *skb, struct net_device *net_dev)
 750 {
 751         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
 752         struct dpaa2_fd fd;
 753         struct rtnl_link_stats64 *percpu_stats;
 754         struct dpaa2_eth_drv_stats *percpu_extras;
 755         struct dpaa2_eth_fq *fq;
 756         struct netdev_queue *nq;
 757         u16 queue_mapping;
 758         unsigned int needed_headroom;
 759         u32 fd_len;
 760         int err, i;
 761
 762         percpu_stats = this_cpu_ptr(priv->percpu_stats);
 763         percpu_extras = this_cpu_ptr(priv->percpu_extras);
 764
 765         needed_headroom = dpaa2_eth_needed_headroom(priv, skb);
 766         if (skb_headroom(skb) < needed_headroom) {
 767                 struct sk_buff *ns;
 768
 769                 ns = skb_realloc_headroom(skb, needed_headroom);
 770                 if (unlikely(!ns)) {
 771                         percpu_stats->tx_dropped++;
 772                         goto err_alloc_headroom;
 773                 }
 774                 percpu_extras->tx_reallocs++;
 775
 776                 if (skb->sk)
 777                         skb_set_owner_w(ns, skb->sk);
 778
 779                 dev_kfree_skb(skb);
 780                 skb = ns;
 781         }
 782
 783         /* We'll be holding a back-reference to the skb until Tx Confirmation;
 784          * we don't want that overwritten by a concurrent Tx with a cloned skb.
 785          */
 786         skb = skb_unshare(skb, GFP_ATOMIC);
 787         if (unlikely(!skb)) {
 788                 /* skb_unshare() has already freed the skb */
 789                 percpu_stats->tx_dropped++;
 790                 return NETDEV_TX_OK;
 791         }
 792
 793         /* Setup the FD fields */
 794         memset(&fd, 0, sizeof(fd));
 795
 796         if (skb_is_nonlinear(skb)) {
 797                 err = build_sg_fd(priv, skb, &fd);
 798                 percpu_extras->tx_sg_frames++;
 799                 percpu_extras->tx_sg_bytes += skb->len;
 800         } else {
 801                 err = build_single_fd(priv, skb, &fd);
 802         }
 803
 804         if (unlikely(err)) {
 805                 percpu_stats->tx_dropped++;
 806                 goto err_build_fd;
 807         }
 808
 809         /* Tracing point */
 810         trace_dpaa2_tx_fd(net_dev, &fd);
 811
 812         /* TxConf FQ selection relies on queue id from the stack.
 813          * In case of a forwarded frame from another DPNI interface, we choose
 814          * a queue affined to the same core that processed the Rx frame
 815          */
 816         queue_mapping = skb_get_queue_mapping(skb);
 817         fq = &priv->fq[queue_mapping];
 818         for (i = 0; i < DPAA2_ETH_ENQUEUE_RETRIES; i++) {
 819                 err = priv->enqueue(priv, fq, &fd, 0);
 820                 if (err != -EBUSY)
 821                         break;
 822         }
 823         percpu_extras->tx_portal_busy += i;
 824         if (unlikely(err < 0)) {
 825                 percpu_stats->tx_errors++;
 826                 /* Clean up everything, including freeing the skb */
 827                 free_tx_fd(priv, fq, &fd, false);
 828         } else {
 829                 fd_len = dpaa2_fd_get_len(&fd);
 830                 percpu_stats->tx_packets++;
 831                 percpu_stats->tx_bytes += fd_len;
 832
 833                 nq = netdev_get_tx_queue(net_dev, queue_mapping);
 834                 netdev_tx_sent_queue(nq, fd_len);
 835         }
 836
 837         return NETDEV_TX_OK;
 838
 839 err_build_fd:
 840 err_alloc_headroom:
 841         dev_kfree_skb(skb);
 842
 843         return NETDEV_TX_OK;
 844 }
 845
 846 /* Tx confirmation frame processing routine */
 847 static void dpaa2_eth_tx_conf(struct dpaa2_eth_priv *priv,
 848                               struct dpaa2_eth_channel *ch __always_unused,
 849                               const struct dpaa2_fd *fd,
 850                               struct dpaa2_eth_fq *fq)
 851 {
 852         struct rtnl_link_stats64 *percpu_stats;
 853         struct dpaa2_eth_drv_stats *percpu_extras;
 854         u32 fd_len = dpaa2_fd_get_len(fd);
 855         u32 fd_errors;
 856
 857         /* Tracing point */
 858         trace_dpaa2_tx_conf_fd(priv->net_dev, fd);
 859
 860         percpu_extras = this_cpu_ptr(priv->percpu_extras);
 861         percpu_extras->tx_conf_frames++;
 862         percpu_extras->tx_conf_bytes += fd_len;
 863
 864         /* Check frame errors in the FD field */
 865         fd_errors = dpaa2_fd_get_ctrl(fd) & DPAA2_FD_TX_ERR_MASK;
 866         free_tx_fd(priv, fq, fd, true);
 867
 868         if (likely(!fd_errors))
 869                 return;
 870
 871         if (net_ratelimit())
 872                 netdev_dbg(priv->net_dev, "TX frame FD error: 0x%08x\n",
 873                            fd_errors);
 874
 875         percpu_stats = this_cpu_ptr(priv->percpu_stats);
 876         /* Tx-conf logically pertains to the egress path. */
 877         percpu_stats->tx_errors++;
 878 }
 879
 880 static int set_rx_csum(struct dpaa2_eth_priv *priv, bool enable)
 881 {
 882         int err;
 883
 884         err = dpni_set_offload(priv->mc_io, 0, priv->mc_token,
 885                                DPNI_OFF_RX_L3_CSUM, enable);
 886         if (err) {
 887                 netdev_err(priv->net_dev,
 888                            "dpni_set_offload(RX_L3_CSUM) failed\n");
 889                 return err;
 890         }
 891
 892         err = dpni_set_offload(priv->mc_io, 0, priv->mc_token,
 893                                DPNI_OFF_RX_L4_CSUM, enable);
 894         if (err) {
 895                 netdev_err(priv->net_dev,
 896                            "dpni_set_offload(RX_L4_CSUM) failed\n");
 897                 return err;
 898         }
 899
 900         return 0;
 901 }
 902
 903 static int set_tx_csum(struct dpaa2_eth_priv *priv, bool enable)
 904 {
 905         int err;
 906
 907         err = dpni_set_offload(priv->mc_io, 0, priv->mc_token,
 908                                DPNI_OFF_TX_L3_CSUM, enable);
 909         if (err) {
 910                 netdev_err(priv->net_dev, "dpni_set_offload(TX_L3_CSUM) failed\n");
 911                 return err;
 912         }
 913
 914         err = dpni_set_offload(priv->mc_io, 0, priv->mc_token,
 915                                DPNI_OFF_TX_L4_CSUM, enable);
 916         if (err) {
 917                 netdev_err(priv->net_dev, "dpni_set_offload(TX_L4_CSUM) failed\n");
 918                 return err;
 919         }
 920
 921         return 0;
 922 }
 923
 924 /* Perform a single release command to add buffers
 925  * to the specified buffer pool
 926  */
 927 static int add_bufs(struct dpaa2_eth_priv *priv,
 928                     struct dpaa2_eth_channel *ch, u16 bpid)
 929 {
 930         struct device *dev = priv->net_dev->dev.parent;
 931         u64 buf_array[DPAA2_ETH_BUFS_PER_CMD];
 932         struct page *page;
 933         dma_addr_t addr;
 934         int i, err;
 935
 936         for (i = 0; i < DPAA2_ETH_BUFS_PER_CMD; i++) {
 937                 /* Allocate buffer visible to WRIOP + skb shared info +
 938                  * alignment padding
 939                  */
 940                 /* allocate one page for each Rx buffer. WRIOP sees
 941                  * the entire page except for a tailroom reserved for
 942                  * skb shared info
 943                  */
 944                 page = dev_alloc_pages(0);
 945                 if (!page)
 946                         goto err_alloc;
 947
 948                 addr = dma_map_page(dev, page, 0, DPAA2_ETH_RX_BUF_SIZE,
 949                                     DMA_BIDIRECTIONAL);
 950                 if (unlikely(dma_mapping_error(dev, addr)))
 951                         goto err_map;
 952
 953                 buf_array[i] = addr;
 954
 955                 /* tracing point */
 956                 trace_dpaa2_eth_buf_seed(priv->net_dev,
 957                                          page, DPAA2_ETH_RX_BUF_RAW_SIZE,
 958                                          addr, DPAA2_ETH_RX_BUF_SIZE,
 959                                          bpid);
 960         }
 961
 962 release_bufs:
 963         /* In case the portal is busy, retry until successful */
 964         while ((err = dpaa2_io_service_release(ch->dpio, bpid,
 965                                                buf_array, i)) == -EBUSY)
 966                 cpu_relax();
 967
 968         /* If release command failed, clean up and bail out;
 969          * not much else we can do about it
 970          */
 971         if (err) {
 972                 free_bufs(priv, buf_array, i);
 973                 return 0;
 974         }
 975
 976         return i;
 977
 978 err_map:
 979         __free_pages(page, 0);
 980 err_alloc:
 981         /* If we managed to allocate at least some buffers,
 982          * release them to hardware
 983          */
 984         if (i)
 985                 goto release_bufs;
 986
 987         return 0;
 988 }
 989
 990 static int seed_pool(struct dpaa2_eth_priv *priv, u16 bpid)
 991 {
 992         int i, j;
 993         int new_count;
 994
 995         /* This is the lazy seeding of Rx buffer pools.
 996          * dpaa2_add_bufs() is also used on the Rx hotpath and calls
 997          * napi_alloc_frag(). The trouble with that is that it in turn ends up
 998          * calling this_cpu_ptr(), which mandates execution in atomic context.
 999          * Rather than splitting up the code, do a one-off preempt disable.
1000          */
1001         preempt_disable();
1002         for (j = 0; j < priv->num_channels; j++) {
1003                 for (i = 0; i < DPAA2_ETH_NUM_BUFS;
1004                      i += DPAA2_ETH_BUFS_PER_CMD) {
1005                         new_count = add_bufs(priv, priv->channel[j], bpid);
1006                         priv->channel[j]->buf_count += new_count;
1007
1008                         if (new_count < DPAA2_ETH_BUFS_PER_CMD) {
1009                                 preempt_enable();
1010                                 return -ENOMEM;
1011                         }
1012                 }
1013         }
1014         preempt_enable();
1015
1016         return 0;
1017 }
1018
1019 /**
1020  * Drain the specified number of buffers from the DPNI's private buffer pool.
1021  * @count must not exceeed DPAA2_ETH_BUFS_PER_CMD
1022  */
1023 static void drain_bufs(struct dpaa2_eth_priv *priv, int count)
1024 {
1025         u64 buf_array[DPAA2_ETH_BUFS_PER_CMD];
1026         int ret;
1027
1028         do {
1029                 ret = dpaa2_io_service_acquire(NULL, priv->bpid,
1030                                                buf_array, count);
1031                 if (ret < 0) {
1032                         netdev_err(priv->net_dev, "dpaa2_io_service_acquire() failed\n");
1033                         return;
1034                 }
1035                 free_bufs(priv, buf_array, ret);
1036         } while (ret);
1037 }
1038
1039 static void drain_pool(struct dpaa2_eth_priv *priv)
1040 {
1041         int i;
1042
1043         drain_bufs(priv, DPAA2_ETH_BUFS_PER_CMD);
1044         drain_bufs(priv, 1);
1045
1046         for (i = 0; i < priv->num_channels; i++)
1047                 priv->channel[i]->buf_count = 0;
1048 }
1049
1050 /* Function is called from softirq context only, so we don't need to guard
1051  * the access to percpu count
1052  */
1053 static int refill_pool(struct dpaa2_eth_priv *priv,
1054                        struct dpaa2_eth_channel *ch,
1055                        u16 bpid)
1056 {
1057         int new_count;
1058
1059         if (likely(ch->buf_count >= DPAA2_ETH_REFILL_THRESH))
1060                 return 0;
1061
1062         do {
1063                 new_count = add_bufs(priv, ch, bpid);
1064                 if (unlikely(!new_count)) {
1065                         /* Out of memory; abort for now, we'll try later on */
1066                         break;
1067                 }
1068                 ch->buf_count += new_count;
1069         } while (ch->buf_count < DPAA2_ETH_NUM_BUFS);
1070
1071         if (unlikely(ch->buf_count < DPAA2_ETH_NUM_BUFS))
1072                 return -ENOMEM;
1073
1074         return 0;
1075 }
1076
1077 static int pull_channel(struct dpaa2_eth_channel *ch)
1078 {
1079         int err;
1080         int dequeues = -1;
1081
1082         /* Retry while portal is busy */
1083         do {
1084                 err = dpaa2_io_service_pull_channel(ch->dpio, ch->ch_id,
1085                                                     ch->store);
1086                 dequeues++;
1087                 cpu_relax();
1088         } while (err == -EBUSY);
1089
1090         ch->stats.dequeue_portal_busy += dequeues;
1091         if (unlikely(err))
1092                 ch->stats.pull_err++;
1093
1094         return err;
1095 }
1096
1097 /* NAPI poll routine
1098  *
1099  * Frames are dequeued from the QMan channel associated with this NAPI context.
1100  * Rx, Tx confirmation and (if configured) Rx error frames all count
1101  * towards the NAPI budget.
1102  */
1103 static int dpaa2_eth_poll(struct napi_struct *napi, int budget)
1104 {
1105         struct dpaa2_eth_channel *ch;
1106         struct dpaa2_eth_priv *priv;
1107         int rx_cleaned = 0, txconf_cleaned = 0;
1108         struct dpaa2_eth_fq *fq, *txc_fq = NULL;
1109         struct netdev_queue *nq;
1110         int store_cleaned, work_done;
1111         int err;
1112
1113         ch = container_of(napi, struct dpaa2_eth_channel, napi);
1114         ch->xdp.res = 0;
1115         priv = ch->priv;
1116
1117         do {
1118                 err = pull_channel(ch);
1119                 if (unlikely(err))
1120                         break;
1121
1122                 /* Refill pool if appropriate */
1123                 refill_pool(priv, ch, priv->bpid);
1124
1125                 store_cleaned = consume_frames(ch, &fq);
1126                 if (!store_cleaned)
1127                         break;
1128                 if (fq->type == DPAA2_RX_FQ) {
1129                         rx_cleaned += store_cleaned;
1130                 } else {
1131                         txconf_cleaned += store_cleaned;
1132                         /* We have a single Tx conf FQ on this channel */
1133                         txc_fq = fq;
1134                 }
1135
1136                 /* If we either consumed the whole NAPI budget with Rx frames
1137                  * or we reached the Tx confirmations threshold, we're done.
1138                  */
1139                 if (rx_cleaned >= budget ||
1140                     txconf_cleaned >= DPAA2_ETH_TXCONF_PER_NAPI) {
1141                         work_done = budget;
1142                         goto out;
1143                 }
1144         } while (store_cleaned);
1145
1146         /* We didn't consume the entire budget, so finish napi and
1147          * re-enable data availability notifications
1148          */
1149         napi_complete_done(napi, rx_cleaned);
1150         do {
1151                 err = dpaa2_io_service_rearm(ch->dpio, &ch->nctx);
1152                 cpu_relax();
1153         } while (err == -EBUSY);
1154         WARN_ONCE(err, "CDAN notifications rearm failed on core %d",
1155                   ch->nctx.desired_cpu);
1156
1157         work_done = max(rx_cleaned, 1);
1158
1159 out:
1160         if (txc_fq && txc_fq->dq_frames) {
1161                 nq = netdev_get_tx_queue(priv->net_dev, txc_fq->flowid);
1162                 netdev_tx_completed_queue(nq, txc_fq->dq_frames,
1163                                           txc_fq->dq_bytes);
1164                 txc_fq->dq_frames = 0;
1165                 txc_fq->dq_bytes = 0;
1166         }
1167
1168         if (ch->xdp.res & XDP_REDIRECT)
1169                 xdp_do_flush_map();
1170
1171         return work_done;
1172 }
1173
1174 static void enable_ch_napi(struct dpaa2_eth_priv *priv)
1175 {
1176         struct dpaa2_eth_channel *ch;
1177         int i;
1178
1179         for (i = 0; i < priv->num_channels; i++) {
1180                 ch = priv->channel[i];
1181                 napi_enable(&ch->napi);
1182         }
1183 }
1184
1185 static void disable_ch_napi(struct dpaa2_eth_priv *priv)
1186 {
1187         struct dpaa2_eth_channel *ch;
1188         int i;
1189
1190         for (i = 0; i < priv->num_channels; i++) {
1191                 ch = priv->channel[i];
1192                 napi_disable(&ch->napi);
1193         }
1194 }
1195
1196 static int link_state_update(struct dpaa2_eth_priv *priv)
1197 {
1198         struct dpni_link_state state = {0};
1199         int err;
1200
1201         err = dpni_get_link_state(priv->mc_io, 0, priv->mc_token, &state);
1202         if (unlikely(err)) {
1203                 netdev_err(priv->net_dev,
1204                            "dpni_get_link_state() failed\n");
1205                 return err;
1206         }
1207
1208         /* Chech link state; speed / duplex changes are not treated yet */
1209         if (priv->link_state.up == state.up)
1210                 return 0;
1211
1212         priv->link_state = state;
1213         if (state.up) {
1214                 netif_carrier_on(priv->net_dev);
1215                 netif_tx_start_all_queues(priv->net_dev);
1216         } else {
1217                 netif_tx_stop_all_queues(priv->net_dev);
1218                 netif_carrier_off(priv->net_dev);
1219         }
1220
1221         netdev_info(priv->net_dev, "Link Event: state %s\n",
1222                     state.up ? "up" : "down");
1223
1224         return 0;
1225 }
1226
1227 static int dpaa2_eth_open(struct net_device *net_dev)
1228 {
1229         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
1230         int err;
1231
1232         err = seed_pool(priv, priv->bpid);
1233         if (err) {
1234                 /* Not much to do; the buffer pool, though not filled up,
1235                  * may still contain some buffers which would enable us
1236                  * to limp on.
1237                  */
1238                 netdev_err(net_dev, "Buffer seeding failed for DPBP %d (bpid=%d)\n",
1239                            priv->dpbp_dev->obj_desc.id, priv->bpid);
1240         }
1241
1242         /* We'll only start the txqs when the link is actually ready; make sure
1243          * we don't race against the link up notification, which may come
1244          * immediately after dpni_enable();
1245          */
1246         netif_tx_stop_all_queues(net_dev);
1247         enable_ch_napi(priv);
1248         /* Also, explicitly set carrier off, otherwise netif_carrier_ok() will
1249          * return true and cause 'ip link show' to report the LOWER_UP flag,
1250          * even though the link notification wasn't even received.
1251          */
1252         netif_carrier_off(net_dev);
1253
1254         err = dpni_enable(priv->mc_io, 0, priv->mc_token);
1255         if (err < 0) {
1256                 netdev_err(net_dev, "dpni_enable() failed\n");
1257                 goto enable_err;
1258         }
1259
1260         /* If the DPMAC object has already processed the link up interrupt,
1261          * we have to learn the link state ourselves.
1262          */
1263         err = link_state_update(priv);
1264         if (err < 0) {
1265                 netdev_err(net_dev, "Can't update link state\n");
1266                 goto link_state_err;
1267         }
1268
1269         return 0;
1270
1271 link_state_err:
1272 enable_err:
1273         disable_ch_napi(priv);
1274         drain_pool(priv);
1275         return err;
1276 }
1277
1278 /* Total number of in-flight frames on ingress queues */
1279 static u32 ingress_fq_count(struct dpaa2_eth_priv *priv)
1280 {
1281         struct dpaa2_eth_fq *fq;
1282         u32 fcnt = 0, bcnt = 0, total = 0;
1283         int i, err;
1284
1285         for (i = 0; i < priv->num_fqs; i++) {
1286                 fq = &priv->fq[i];
1287                 err = dpaa2_io_query_fq_count(NULL, fq->fqid, &fcnt, &bcnt);
1288                 if (err) {
1289                         netdev_warn(priv->net_dev, "query_fq_count failed");
1290                         break;
1291                 }
1292                 total += fcnt;
1293         }
1294
1295         return total;
1296 }
1297
1298 static void wait_for_fq_empty(struct dpaa2_eth_priv *priv)
1299 {
1300         int retries = 10;
1301         u32 pending;
1302
1303         do {
1304                 pending = ingress_fq_count(priv);
1305                 if (pending)
1306                         msleep(100);
1307         } while (pending && --retries);
1308 }
1309
1310 static int dpaa2_eth_stop(struct net_device *net_dev)
1311 {
1312         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
1313         int dpni_enabled = 0;
1314         int retries = 10;
1315
1316         netif_tx_stop_all_queues(net_dev);
1317         netif_carrier_off(net_dev);
1318
1319         /* On dpni_disable(), the MC firmware will:
1320          * - stop MAC Rx and wait for all Rx frames to be enqueued to software
1321          * - cut off WRIOP dequeues from egress FQs and wait until transmission
1322          * of all in flight Tx frames is finished (and corresponding Tx conf
1323          * frames are enqueued back to software)
1324          *
1325          * Before calling dpni_disable(), we wait for all Tx frames to arrive
1326          * on WRIOP. After it finishes, wait until all remaining frames on Rx
1327          * and Tx conf queues are consumed on NAPI poll.
1328          */
1329         msleep(500);
1330
1331         do {
1332                 dpni_disable(priv->mc_io, 0, priv->mc_token);
1333                 dpni_is_enabled(priv->mc_io, 0, priv->mc_token, &dpni_enabled);
1334                 if (dpni_enabled)
1335                         /* Allow the hardware some slack */
1336                         msleep(100);
1337         } while (dpni_enabled && --retries);
1338         if (!retries) {
1339                 netdev_warn(net_dev, "Retry count exceeded disabling DPNI\n");
1340                 /* Must go on and disable NAPI nonetheless, so we don't crash at
1341                  * the next "ifconfig up"
1342                  */
1343         }
1344
1345         wait_for_fq_empty(priv);
1346         disable_ch_napi(priv);
1347
1348         /* Empty the buffer pool */
1349         drain_pool(priv);
1350
1351         return 0;
1352 }
1353
1354 static int dpaa2_eth_set_addr(struct net_device *net_dev, void *addr)
1355 {
1356         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
1357         struct device *dev = net_dev->dev.parent;
1358         int err;
1359
1360         err = eth_mac_addr(net_dev, addr);
1361         if (err < 0) {
1362                 dev_err(dev, "eth_mac_addr() failed (%d)\n", err);
1363                 return err;
1364         }
1365
1366         err = dpni_set_primary_mac_addr(priv->mc_io, 0, priv->mc_token,
1367                                         net_dev->dev_addr);
1368         if (err) {
1369                 dev_err(dev, "dpni_set_primary_mac_addr() failed (%d)\n", err);
1370                 return err;
1371         }
1372
1373         return 0;
1374 }
1375
1376 /** Fill in counters maintained by the GPP driver. These may be different from
1377  * the hardware counters obtained by ethtool.
1378  */
1379 static void dpaa2_eth_get_stats(struct net_device *net_dev,
1380                                 struct rtnl_link_stats64 *stats)
1381 {
1382         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
1383         struct rtnl_link_stats64 *percpu_stats;
1384         u64 *cpustats;
1385         u64 *netstats = (u64 *)stats;
1386         int i, j;
1387         int num = sizeof(struct rtnl_link_stats64) / sizeof(u64);
1388
1389         for_each_possible_cpu(i) {
1390                 percpu_stats = per_cpu_ptr(priv->percpu_stats, i);
1391                 cpustats = (u64 *)percpu_stats;
1392                 for (j = 0; j < num; j++)
1393                         netstats[j] += cpustats[j];
1394         }
1395 }
1396
1397 /* Copy mac unicast addresses from @net_dev to @priv.
1398  * Its sole purpose is to make dpaa2_eth_set_rx_mode() more readable.
1399  */
1400 static void add_uc_hw_addr(const struct net_device *net_dev,
1401                            struct dpaa2_eth_priv *priv)
1402 {
1403         struct netdev_hw_addr *ha;
1404         int err;
1405
1406         netdev_for_each_uc_addr(ha, net_dev) {
1407                 err = dpni_add_mac_addr(priv->mc_io, 0, priv->mc_token,
1408                                         ha->addr);
1409                 if (err)
1410                         netdev_warn(priv->net_dev,
1411                                     "Could not add ucast MAC %pM to the filtering table (err %d)\n",
1412                                     ha->addr, err);
1413         }
1414 }
1415
1416 /* Copy mac multicast addresses from @net_dev to @priv
1417  * Its sole purpose is to make dpaa2_eth_set_rx_mode() more readable.
1418  */
1419 static void add_mc_hw_addr(const struct net_device *net_dev,
1420                            struct dpaa2_eth_priv *priv)
1421 {
1422         struct netdev_hw_addr *ha;
1423         int err;
1424
1425         netdev_for_each_mc_addr(ha, net_dev) {
1426                 err = dpni_add_mac_addr(priv->mc_io, 0, priv->mc_token,
1427                                         ha->addr);
1428                 if (err)
1429                         netdev_warn(priv->net_dev,
1430                                     "Could not add mcast MAC %pM to the filtering table (err %d)\n",
1431                                     ha->addr, err);
1432         }
1433 }
1434
1435 static void dpaa2_eth_set_rx_mode(struct net_device *net_dev)
1436 {
1437         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
1438         int uc_count = netdev_uc_count(net_dev);
1439         int mc_count = netdev_mc_count(net_dev);
1440         u8 max_mac = priv->dpni_attrs.mac_filter_entries;
1441         u32 options = priv->dpni_attrs.options;
1442         u16 mc_token = priv->mc_token;
1443         struct fsl_mc_io *mc_io = priv->mc_io;
1444         int err;
1445
1446         /* Basic sanity checks; these probably indicate a misconfiguration */
1447         if (options & DPNI_OPT_NO_MAC_FILTER && max_mac != 0)
1448                 netdev_info(net_dev,
1449                             "mac_filter_entries=%d, DPNI_OPT_NO_MAC_FILTER option must be disabled\n",
1450                             max_mac);
1451
1452         /* Force promiscuous if the uc or mc counts exceed our capabilities. */
1453         if (uc_count > max_mac) {
1454                 netdev_info(net_dev,
1455                             "Unicast addr count reached %d, max allowed is %d; forcing promisc\n",
1456                             uc_count, max_mac);
1457                 goto force_promisc;
1458         }
1459         if (mc_count + uc_count > max_mac) {
1460                 netdev_info(net_dev,
1461                             "Unicast + multicast addr count reached %d, max allowed is %d; forcing promisc\n",
1462                             uc_count + mc_count, max_mac);
1463                 goto force_mc_promisc;
1464         }
1465
1466         /* Adjust promisc settings due to flag combinations */
1467         if (net_dev->flags & IFF_PROMISC)
1468                 goto force_promisc;
1469         if (net_dev->flags & IFF_ALLMULTI) {
1470                 /* First, rebuild unicast filtering table. This should be done
1471                  * in promisc mode, in order to avoid frame loss while we
1472                  * progressively add entries to the table.
1473                  * We don't know whether we had been in promisc already, and
1474                  * making an MC call to find out is expensive; so set uc promisc
1475                  * nonetheless.
1476                  */
1477                 err = dpni_set_unicast_promisc(mc_io, 0, mc_token, 1);
1478                 if (err)
1479                         netdev_warn(net_dev, "Can't set uc promisc\n");
1480
1481                 /* Actual uc table reconstruction. */
1482                 err = dpni_clear_mac_filters(mc_io, 0, mc_token, 1, 0);
1483                 if (err)
1484                         netdev_warn(net_dev, "Can't clear uc filters\n");
1485                 add_uc_hw_addr(net_dev, priv);
1486
1487                 /* Finally, clear uc promisc and set mc promisc as requested. */
1488                 err = dpni_set_unicast_promisc(mc_io, 0, mc_token, 0);
1489                 if (err)
1490                         netdev_warn(net_dev, "Can't clear uc promisc\n");
1491                 goto force_mc_promisc;
1492         }
1493
1494         /* Neither unicast, nor multicast promisc will be on... eventually.
1495          * For now, rebuild mac filtering tables while forcing both of them on.
1496          */
1497         err = dpni_set_unicast_promisc(mc_io, 0, mc_token, 1);
1498         if (err)
1499                 netdev_warn(net_dev, "Can't set uc promisc (%d)\n", err);
1500         err = dpni_set_multicast_promisc(mc_io, 0, mc_token, 1);
1501         if (err)
1502                 netdev_warn(net_dev, "Can't set mc promisc (%d)\n", err);
1503
1504         /* Actual mac filtering tables reconstruction */
1505         err = dpni_clear_mac_filters(mc_io, 0, mc_token, 1, 1);
1506         if (err)
1507                 netdev_warn(net_dev, "Can't clear mac filters\n");
1508         add_mc_hw_addr(net_dev, priv);
1509         add_uc_hw_addr(net_dev, priv);
1510
1511         /* Now we can clear both ucast and mcast promisc, without risking
1512          * to drop legitimate frames anymore.
1513          */
1514         err = dpni_set_unicast_promisc(mc_io, 0, mc_token, 0);
1515         if (err)
1516                 netdev_warn(net_dev, "Can't clear ucast promisc\n");
1517         err = dpni_set_multicast_promisc(mc_io, 0, mc_token, 0);
1518         if (err)
1519                 netdev_warn(net_dev, "Can't clear mcast promisc\n");
1520
1521         return;
1522
1523 force_promisc:
1524         err = dpni_set_unicast_promisc(mc_io, 0, mc_token, 1);
1525         if (err)
1526                 netdev_warn(net_dev, "Can't set ucast promisc\n");
1527 force_mc_promisc:
1528         err = dpni_set_multicast_promisc(mc_io, 0, mc_token, 1);
1529         if (err)
1530                 netdev_warn(net_dev, "Can't set mcast promisc\n");
1531 }
1532
1533 static int dpaa2_eth_set_features(struct net_device *net_dev,
1534                                   netdev_features_t features)
1535 {
1536         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
1537         netdev_features_t changed = features ^ net_dev->features;
1538         bool enable;
1539         int err;
1540
1541         if (changed & NETIF_F_RXCSUM) {
1542                 enable = !!(features & NETIF_F_RXCSUM);
1543                 err = set_rx_csum(priv, enable);
1544                 if (err)
1545                         return err;
1546         }
1547
1548         if (changed & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM)) {
1549                 enable = !!(features & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM));
1550                 err = set_tx_csum(priv, enable);
1551                 if (err)
1552                         return err;
1553         }
1554
1555         return 0;
1556 }
1557
1558 static int dpaa2_eth_ts_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1559 {
1560         struct dpaa2_eth_priv *priv = netdev_priv(dev);
1561         struct hwtstamp_config config;
1562
1563         if (copy_from_user(&config, rq->ifr_data, sizeof(config)))
1564                 return -EFAULT;
1565
1566         switch (config.tx_type) {
1567         case HWTSTAMP_TX_OFF:
1568                 priv->tx_tstamp = false;
1569                 break;
1570         case HWTSTAMP_TX_ON:
1571                 priv->tx_tstamp = true;
1572                 break;
1573         default:
1574                 return -ERANGE;
1575         }
1576
1577         if (config.rx_filter == HWTSTAMP_FILTER_NONE) {
1578                 priv->rx_tstamp = false;
1579         } else {
1580                 priv->rx_tstamp = true;
1581                 /* TS is set for all frame types, not only those requested */
1582                 config.rx_filter = HWTSTAMP_FILTER_ALL;
1583         }
1584
1585         return copy_to_user(rq->ifr_data, &config, sizeof(config)) ?
1586                         -EFAULT : 0;
1587 }
1588
1589 static int dpaa2_eth_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1590 {
1591         if (cmd == SIOCSHWTSTAMP)
1592                 return dpaa2_eth_ts_ioctl(dev, rq, cmd);
1593
1594         return -EINVAL;
1595 }
1596
1597 static bool xdp_mtu_valid(struct dpaa2_eth_priv *priv, int mtu)
1598 {
1599         int mfl, linear_mfl;
1600
1601         mfl = DPAA2_ETH_L2_MAX_FRM(mtu);
1602         linear_mfl = DPAA2_ETH_RX_BUF_SIZE - DPAA2_ETH_RX_HWA_SIZE -
1603                      dpaa2_eth_rx_head_room(priv) - XDP_PACKET_HEADROOM;
1604
1605         if (mfl > linear_mfl) {
1606                 netdev_warn(priv->net_dev, "Maximum MTU for XDP is %d\n",
1607                             linear_mfl - VLAN_ETH_HLEN);
1608                 return false;
1609         }
1610
1611         return true;
1612 }
1613
1614 static int set_rx_mfl(struct dpaa2_eth_priv *priv, int mtu, bool has_xdp)
1615 {
1616         int mfl, err;
1617
1618         /* We enforce a maximum Rx frame length based on MTU only if we have
1619          * an XDP program attached (in order to avoid Rx S/G frames).
1620          * Otherwise, we accept all incoming frames as long as they are not
1621          * larger than maximum size supported in hardware
1622          */
1623         if (has_xdp)
1624                 mfl = DPAA2_ETH_L2_MAX_FRM(mtu);
1625         else
1626                 mfl = DPAA2_ETH_MFL;
1627
1628         err = dpni_set_max_frame_length(priv->mc_io, 0, priv->mc_token, mfl);
1629         if (err) {
1630                 netdev_err(priv->net_dev, "dpni_set_max_frame_length failed\n");
1631                 return err;
1632         }
1633
1634         return 0;
1635 }
1636
1637 static int dpaa2_eth_change_mtu(struct net_device *dev, int new_mtu)
1638 {
1639         struct dpaa2_eth_priv *priv = netdev_priv(dev);
1640         int err;
1641
1642         if (!priv->xdp_prog)
1643                 goto out;
1644
1645         if (!xdp_mtu_valid(priv, new_mtu))
1646                 return -EINVAL;
1647
1648         err = set_rx_mfl(priv, new_mtu, true);
1649         if (err)
1650                 return err;
1651
1652 out:
1653         dev->mtu = new_mtu;
1654         return 0;
1655 }
1656
1657 static int update_rx_buffer_headroom(struct dpaa2_eth_priv *priv, bool has_xdp)
1658 {
1659         struct dpni_buffer_layout buf_layout = {0};
1660         int err;
1661
1662         err = dpni_get_buffer_layout(priv->mc_io, 0, priv->mc_token,
1663                                      DPNI_QUEUE_RX, &buf_layout);
1664         if (err) {
1665                 netdev_err(priv->net_dev, "dpni_get_buffer_layout failed\n");
1666                 return err;
1667         }
1668
1669         /* Reserve extra headroom for XDP header size changes */
1670         buf_layout.data_head_room = dpaa2_eth_rx_head_room(priv) +
1671                                     (has_xdp ? XDP_PACKET_HEADROOM : 0);
1672         buf_layout.options = DPNI_BUF_LAYOUT_OPT_DATA_HEAD_ROOM;
1673         err = dpni_set_buffer_layout(priv->mc_io, 0, priv->mc_token,
1674                                      DPNI_QUEUE_RX, &buf_layout);
1675         if (err) {
1676                 netdev_err(priv->net_dev, "dpni_set_buffer_layout failed\n");
1677                 return err;
1678         }
1679
1680         return 0;
1681 }
1682
1683 static int setup_xdp(struct net_device *dev, struct bpf_prog *prog)
1684 {
1685         struct dpaa2_eth_priv *priv = netdev_priv(dev);
1686         struct dpaa2_eth_channel *ch;
1687         struct bpf_prog *old;
1688         bool up, need_update;
1689         int i, err;
1690
1691         if (prog && !xdp_mtu_valid(priv, dev->mtu))
1692                 return -EINVAL;
1693
1694         if (prog) {
1695                 prog = bpf_prog_add(prog, priv->num_channels);
1696                 if (IS_ERR(prog))
1697                         return PTR_ERR(prog);
1698         }
1699
1700         up = netif_running(dev);
1701         need_update = (!!priv->xdp_prog != !!prog);
1702
1703         if (up)
1704                 dpaa2_eth_stop(dev);
1705
1706         /* While in xdp mode, enforce a maximum Rx frame size based on MTU.
1707          * Also, when switching between xdp/non-xdp modes we need to reconfigure
1708          * our Rx buffer layout. Buffer pool was drained on dpaa2_eth_stop,
1709          * so we are sure no old format buffers will be used from now on.
1710          */
1711         if (need_update) {
1712                 err = set_rx_mfl(priv, dev->mtu, !!prog);
1713                 if (err)
1714                         goto out_err;
1715                 err = update_rx_buffer_headroom(priv, !!prog);
1716                 if (err)
1717                         goto out_err;
1718         }
1719
1720         old = xchg(&priv->xdp_prog, prog);
1721         if (old)
1722                 bpf_prog_put(old);
1723
1724         for (i = 0; i < priv->num_channels; i++) {
1725                 ch = priv->channel[i];
1726                 old = xchg(&ch->xdp.prog, prog);
1727                 if (old)
1728                         bpf_prog_put(old);
1729         }
1730
1731         if (up) {
1732                 err = dpaa2_eth_open(dev);
1733                 if (err)
1734                         return err;
1735         }
1736
1737         return 0;
1738
1739 out_err:
1740         if (prog)
1741                 bpf_prog_sub(prog, priv->num_channels);
1742         if (up)
1743                 dpaa2_eth_open(dev);
1744
1745         return err;
1746 }
1747
1748 static int dpaa2_eth_xdp(struct net_device *dev, struct netdev_bpf *xdp)
1749 {
1750         struct dpaa2_eth_priv *priv = netdev_priv(dev);
1751
1752         switch (xdp->command) {
1753         case XDP_SETUP_PROG:
1754                 return setup_xdp(dev, xdp->prog);
1755         case XDP_QUERY_PROG:
1756                 xdp->prog_id = priv->xdp_prog ? priv->xdp_prog->aux->id : 0;
1757                 break;
1758         default:
1759                 return -EINVAL;
1760         }
1761
1762         return 0;
1763 }
1764
1765 static int dpaa2_eth_xdp_xmit_frame(struct net_device *net_dev,
1766                                     struct xdp_frame *xdpf)
1767 {
1768         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
1769         struct device *dev = net_dev->dev.parent;
1770         struct rtnl_link_stats64 *percpu_stats;
1771         struct dpaa2_eth_drv_stats *percpu_extras;
1772         unsigned int needed_headroom;
1773         struct dpaa2_eth_swa *swa;
1774         struct dpaa2_eth_fq *fq;
1775         struct dpaa2_fd fd;
1776         void *buffer_start, *aligned_start;
1777         dma_addr_t addr;
1778         int err, i;
1779
1780         /* We require a minimum headroom to be able to transmit the frame.
1781          * Otherwise return an error and let the original net_device handle it
1782          */
1783         needed_headroom = dpaa2_eth_needed_headroom(priv, NULL);
1784         if (xdpf->headroom < needed_headroom)
1785                 return -EINVAL;
1786
1787         percpu_stats = this_cpu_ptr(priv->percpu_stats);
1788         percpu_extras = this_cpu_ptr(priv->percpu_extras);
1789
1790         /* Setup the FD fields */
1791         memset(&fd, 0, sizeof(fd));
1792
1793         /* Align FD address, if possible */
1794         buffer_start = xdpf->data - needed_headroom;
1795         aligned_start = PTR_ALIGN(buffer_start - DPAA2_ETH_TX_BUF_ALIGN,
1796                                   DPAA2_ETH_TX_BUF_ALIGN);
1797         if (aligned_start >= xdpf->data - xdpf->headroom)
1798                 buffer_start = aligned_start;
1799
1800         swa = (struct dpaa2_eth_swa *)buffer_start;
1801         /* fill in necessary fields here */
1802         swa->type = DPAA2_ETH_SWA_XDP;
1803         swa->xdp.dma_size = xdpf->data + xdpf->len - buffer_start;
1804         swa->xdp.xdpf = xdpf;
1805
1806         addr = dma_map_single(dev, buffer_start,
1807                               swa->xdp.dma_size,
1808                               DMA_BIDIRECTIONAL);
1809         if (unlikely(dma_mapping_error(dev, addr))) {
1810                 percpu_stats->tx_dropped++;
1811                 return -ENOMEM;
1812         }
1813
1814         dpaa2_fd_set_addr(&fd, addr);
1815         dpaa2_fd_set_offset(&fd, xdpf->data - buffer_start);
1816         dpaa2_fd_set_len(&fd, xdpf->len);
1817         dpaa2_fd_set_format(&fd, dpaa2_fd_single);
1818         dpaa2_fd_set_ctrl(&fd, FD_CTRL_PTA);
1819
1820         fq = &priv->fq[smp_processor_id()];
1821         for (i = 0; i < DPAA2_ETH_ENQUEUE_RETRIES; i++) {
1822                 err = priv->enqueue(priv, fq, &fd, 0);
1823                 if (err != -EBUSY)
1824                         break;
1825         }
1826         percpu_extras->tx_portal_busy += i;
1827         if (unlikely(err < 0)) {
1828                 percpu_stats->tx_errors++;
1829                 /* let the Rx device handle the cleanup */
1830                 return err;
1831         }
1832
1833         percpu_stats->tx_packets++;
1834         percpu_stats->tx_bytes += dpaa2_fd_get_len(&fd);
1835
1836         return 0;
1837 }
1838
1839 static int dpaa2_eth_xdp_xmit(struct net_device *net_dev, int n,
1840                               struct xdp_frame **frames, u32 flags)
1841 {
1842         int drops = 0;
1843         int i, err;
1844
1845         if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
1846                 return -EINVAL;
1847
1848         if (!netif_running(net_dev))
1849                 return -ENETDOWN;
1850
1851         for (i = 0; i < n; i++) {
1852                 struct xdp_frame *xdpf = frames[i];
1853
1854                 err = dpaa2_eth_xdp_xmit_frame(net_dev, xdpf);
1855                 if (err) {
1856                         xdp_return_frame_rx_napi(xdpf);
1857                         drops++;
1858                 }
1859         }
1860
1861         return n - drops;
1862 }
1863
1864 static const struct net_device_ops dpaa2_eth_ops = {
1865         .ndo_open = dpaa2_eth_open,
1866         .ndo_start_xmit = dpaa2_eth_tx,
1867         .ndo_stop = dpaa2_eth_stop,
1868         .ndo_set_mac_address = dpaa2_eth_set_addr,
1869         .ndo_get_stats64 = dpaa2_eth_get_stats,
1870         .ndo_set_rx_mode = dpaa2_eth_set_rx_mode,
1871         .ndo_set_features = dpaa2_eth_set_features,
1872         .ndo_do_ioctl = dpaa2_eth_ioctl,
1873         .ndo_change_mtu = dpaa2_eth_change_mtu,
1874         .ndo_bpf = dpaa2_eth_xdp,
1875         .ndo_xdp_xmit = dpaa2_eth_xdp_xmit,
1876 };
1877
1878 static void cdan_cb(struct dpaa2_io_notification_ctx *ctx)
1879 {
1880         struct dpaa2_eth_channel *ch;
1881
1882         ch = container_of(ctx, struct dpaa2_eth_channel, nctx);
1883
1884         /* Update NAPI statistics */
1885         ch->stats.cdan++;
1886
1887         napi_schedule_irqoff(&ch->napi);
1888 }
1889
1890 /* Allocate and configure a DPCON object */
1891 static struct fsl_mc_device *setup_dpcon(struct dpaa2_eth_priv *priv)
1892 {
1893         struct fsl_mc_device *dpcon;
1894         struct device *dev = priv->net_dev->dev.parent;
1895         struct dpcon_attr attrs;
1896         int err;
1897
1898         err = fsl_mc_object_allocate(to_fsl_mc_device(dev),
1899                                      FSL_MC_POOL_DPCON, &dpcon);
1900         if (err) {
1901                 if (err == -ENXIO)
1902                         err = -EPROBE_DEFER;
1903                 else
1904                         dev_info(dev, "Not enough DPCONs, will go on as-is\n");
1905                 return ERR_PTR(err);
1906         }
1907
1908         err = dpcon_open(priv->mc_io, 0, dpcon->obj_desc.id, &dpcon->mc_handle);
1909         if (err) {
1910                 dev_err(dev, "dpcon_open() failed\n");
1911                 goto free;
1912         }
1913
1914         err = dpcon_reset(priv->mc_io, 0, dpcon->mc_handle);
1915         if (err) {
1916                 dev_err(dev, "dpcon_reset() failed\n");
1917                 goto close;
1918         }
1919
1920         err = dpcon_get_attributes(priv->mc_io, 0, dpcon->mc_handle, &attrs);
1921         if (err) {
1922                 dev_err(dev, "dpcon_get_attributes() failed\n");
1923                 goto close;
1924         }
1925
1926         err = dpcon_enable(priv->mc_io, 0, dpcon->mc_handle);
1927         if (err) {
1928                 dev_err(dev, "dpcon_enable() failed\n");
1929                 goto close;
1930         }
1931
1932         return dpcon;
1933
1934 close:
1935         dpcon_close(priv->mc_io, 0, dpcon->mc_handle);
1936 free:
1937         fsl_mc_object_free(dpcon);
1938
1939         return NULL;
1940 }
1941
1942 static void free_dpcon(struct dpaa2_eth_priv *priv,
1943                        struct fsl_mc_device *dpcon)
1944 {
1945         dpcon_disable(priv->mc_io, 0, dpcon->mc_handle);
1946         dpcon_close(priv->mc_io, 0, dpcon->mc_handle);
1947         fsl_mc_object_free(dpcon);
1948 }
1949
1950 static struct dpaa2_eth_channel *
1951 alloc_channel(struct dpaa2_eth_priv *priv)
1952 {
1953         struct dpaa2_eth_channel *channel;
1954         struct dpcon_attr attr;
1955         struct device *dev = priv->net_dev->dev.parent;
1956         int err;
1957
1958         channel = kzalloc(sizeof(*channel), GFP_KERNEL);
1959         if (!channel)
1960                 return NULL;
1961
1962         channel->dpcon = setup_dpcon(priv);
1963         if (IS_ERR_OR_NULL(channel->dpcon)) {
1964                 err = PTR_ERR(channel->dpcon);
1965                 goto err_setup;
1966         }
1967
1968         err = dpcon_get_attributes(priv->mc_io, 0, channel->dpcon->mc_handle,
1969                                    &attr);
1970         if (err) {
1971                 dev_err(dev, "dpcon_get_attributes() failed\n");
1972                 goto err_get_attr;
1973         }
1974
1975         channel->dpcon_id = attr.id;
1976         channel->ch_id = attr.qbman_ch_id;
1977         channel->priv = priv;
1978
1979         return channel;
1980
1981 err_get_attr:
1982         free_dpcon(priv, channel->dpcon);
1983 err_setup:
1984         kfree(channel);
1985         return ERR_PTR(err);
1986 }
1987
1988 static void free_channel(struct dpaa2_eth_priv *priv,
1989                          struct dpaa2_eth_channel *channel)
1990 {
1991         free_dpcon(priv, channel->dpcon);
1992         kfree(channel);
1993 }
1994
1995 /* DPIO setup: allocate and configure QBMan channels, setup core affinity
1996  * and register data availability notifications
1997  */
1998 static int setup_dpio(struct dpaa2_eth_priv *priv)
1999 {
2000         struct dpaa2_io_notification_ctx *nctx;
2001         struct dpaa2_eth_channel *channel;
2002         struct dpcon_notification_cfg dpcon_notif_cfg;
2003         struct device *dev = priv->net_dev->dev.parent;
2004         int i, err;
2005
2006         /* We want the ability to spread ingress traffic (RX, TX conf) to as
2007          * many cores as possible, so we need one channel for each core
2008          * (unless there's fewer queues than cores, in which case the extra
2009          * channels would be wasted).
2010          * Allocate one channel per core and register it to the core's
2011          * affine DPIO. If not enough channels are available for all cores
2012          * or if some cores don't have an affine DPIO, there will be no
2013          * ingress frame processing on those cores.
2014          */
2015         cpumask_clear(&priv->dpio_cpumask);
2016         for_each_online_cpu(i) {
2017                 /* Try to allocate a channel */
2018                 channel = alloc_channel(priv);
2019                 if (IS_ERR_OR_NULL(channel)) {
2020                         err = PTR_ERR(channel);
2021                         if (err != -EPROBE_DEFER)
2022                                 dev_info(dev,
2023                                          "No affine channel for cpu %d and above\n", i);
2024                         goto err_alloc_ch;
2025                 }
2026
2027                 priv->channel[priv->num_channels] = channel;
2028
2029                 nctx = &channel->nctx;
2030                 nctx->is_cdan = 1;
2031                 nctx->cb = cdan_cb;
2032                 nctx->id = channel->ch_id;
2033                 nctx->desired_cpu = i;
2034
2035                 /* Register the new context */
2036                 channel->dpio = dpaa2_io_service_select(i);
2037                 err = dpaa2_io_service_register(channel->dpio, nctx, dev);
2038                 if (err) {
2039                         dev_dbg(dev, "No affine DPIO for cpu %d\n", i);
2040                         /* If no affine DPIO for this core, there's probably
2041                          * none available for next cores either. Signal we want
2042                          * to retry later, in case the DPIO devices weren't
2043                          * probed yet.
2044                          */
2045                         err = -EPROBE_DEFER;
2046                         goto err_service_reg;
2047                 }
2048
2049                 /* Register DPCON notification with MC */
2050                 dpcon_notif_cfg.dpio_id = nctx->dpio_id;
2051                 dpcon_notif_cfg.priority = 0;
2052                 dpcon_notif_cfg.user_ctx = nctx->qman64;
2053                 err = dpcon_set_notification(priv->mc_io, 0,
2054                                              channel->dpcon->mc_handle,
2055                                              &dpcon_notif_cfg);
2056                 if (err) {
2057                         dev_err(dev, "dpcon_set_notification failed()\n");
2058                         goto err_set_cdan;
2059                 }
2060
2061                 /* If we managed to allocate a channel and also found an affine
2062                  * DPIO for this core, add it to the final mask
2063                  */
2064                 cpumask_set_cpu(i, &priv->dpio_cpumask);
2065                 priv->num_channels++;
2066
2067                 /* Stop if we already have enough channels to accommodate all
2068                  * RX and TX conf queues
2069                  */
2070                 if (priv->num_channels == priv->dpni_attrs.num_queues)
2071                         break;
2072         }
2073
2074         return 0;
2075
2076 err_set_cdan:
2077         dpaa2_io_service_deregister(channel->dpio, nctx, dev);
2078 err_service_reg:
2079         free_channel(priv, channel);
2080 err_alloc_ch:
2081         if (err == -EPROBE_DEFER)
2082                 return err;
2083
2084         if (cpumask_empty(&priv->dpio_cpumask)) {
2085                 dev_err(dev, "No cpu with an affine DPIO/DPCON\n");
2086                 return -ENODEV;
2087         }
2088
2089         dev_info(dev, "Cores %*pbl available for processing ingress traffic\n",
2090                  cpumask_pr_args(&priv->dpio_cpumask));
2091
2092         return 0;
2093 }
2094
2095 static void free_dpio(struct dpaa2_eth_priv *priv)
2096 {
2097         struct device *dev = priv->net_dev->dev.parent;
2098         struct dpaa2_eth_channel *ch;
2099         int i;
2100
2101         /* deregister CDAN notifications and free channels */
2102         for (i = 0; i < priv->num_channels; i++) {
2103                 ch = priv->channel[i];
2104                 dpaa2_io_service_deregister(ch->dpio, &ch->nctx, dev);
2105                 free_channel(priv, ch);
2106         }
2107 }
2108
2109 static struct dpaa2_eth_channel *get_affine_channel(struct dpaa2_eth_priv *priv,
2110                                                     int cpu)
2111 {
2112         struct device *dev = priv->net_dev->dev.parent;
2113         int i;
2114
2115         for (i = 0; i < priv->num_channels; i++)
2116                 if (priv->channel[i]->nctx.desired_cpu == cpu)
2117                         return priv->channel[i];
2118
2119         /* We should never get here. Issue a warning and return
2120          * the first channel, because it's still better than nothing
2121          */
2122         dev_warn(dev, "No affine channel found for cpu %d\n", cpu);
2123
2124         return priv->channel[0];
2125 }
2126
2127 static void set_fq_affinity(struct dpaa2_eth_priv *priv)
2128 {
2129         struct device *dev = priv->net_dev->dev.parent;
2130         struct cpumask xps_mask;
2131         struct dpaa2_eth_fq *fq;
2132         int rx_cpu, txc_cpu;
2133         int i, err;
2134
2135         /* For each FQ, pick one channel/CPU to deliver frames to.
2136          * This may well change at runtime, either through irqbalance or
2137          * through direct user intervention.
2138          */
2139         rx_cpu = txc_cpu = cpumask_first(&priv->dpio_cpumask);
2140
2141         for (i = 0; i < priv->num_fqs; i++) {
2142                 fq = &priv->fq[i];
2143                 switch (fq->type) {
2144                 case DPAA2_RX_FQ:
2145                         fq->target_cpu = rx_cpu;
2146                         rx_cpu = cpumask_next(rx_cpu, &priv->dpio_cpumask);
2147                         if (rx_cpu >= nr_cpu_ids)
2148                                 rx_cpu = cpumask_first(&priv->dpio_cpumask);
2149                         break;
2150                 case DPAA2_TX_CONF_FQ:
2151                         fq->target_cpu = txc_cpu;
2152
2153                         /* Tell the stack to affine to txc_cpu the Tx queue
2154                          * associated with the confirmation one
2155                          */
2156                         cpumask_clear(&xps_mask);
2157                         cpumask_set_cpu(txc_cpu, &xps_mask);
2158                         err = netif_set_xps_queue(priv->net_dev, &xps_mask,
2159                                                   fq->flowid);
2160                         if (err)
2161                                 dev_err(dev, "Error setting XPS queue\n");
2162
2163                         txc_cpu = cpumask_next(txc_cpu, &priv->dpio_cpumask);
2164                         if (txc_cpu >= nr_cpu_ids)
2165                                 txc_cpu = cpumask_first(&priv->dpio_cpumask);
2166                         break;
2167                 default:
2168                         dev_err(dev, "Unknown FQ type: %d\n", fq->type);
2169                 }
2170                 fq->channel = get_affine_channel(priv, fq->target_cpu);
2171         }
2172 }
2173
2174 static void setup_fqs(struct dpaa2_eth_priv *priv)
2175 {
2176         int i;
2177
2178         /* We have one TxConf FQ per Tx flow.
2179          * The number of Tx and Rx queues is the same.
2180          * Tx queues come first in the fq array.
2181          */
2182         for (i = 0; i < dpaa2_eth_queue_count(priv); i++) {
2183                 priv->fq[priv->num_fqs].type = DPAA2_TX_CONF_FQ;
2184                 priv->fq[priv->num_fqs].consume = dpaa2_eth_tx_conf;
2185                 priv->fq[priv->num_fqs++].flowid = (u16)i;
2186         }
2187
2188         for (i = 0; i < dpaa2_eth_queue_count(priv); i++) {
2189                 priv->fq[priv->num_fqs].type = DPAA2_RX_FQ;
2190                 priv->fq[priv->num_fqs].consume = dpaa2_eth_rx;
2191                 priv->fq[priv->num_fqs++].flowid = (u16)i;
2192         }
2193
2194         /* For each FQ, decide on which core to process incoming frames */
2195         set_fq_affinity(priv);
2196 }
2197
2198 /* Allocate and configure one buffer pool for each interface */
2199 static int setup_dpbp(struct dpaa2_eth_priv *priv)
2200 {
2201         int err;
2202         struct fsl_mc_device *dpbp_dev;
2203         struct device *dev = priv->net_dev->dev.parent;
2204         struct dpbp_attr dpbp_attrs;
2205
2206         err = fsl_mc_object_allocate(to_fsl_mc_device(dev), FSL_MC_POOL_DPBP,
2207                                      &dpbp_dev);
2208         if (err) {
2209                 if (err == -ENXIO)
2210                         err = -EPROBE_DEFER;
2211                 else
2212                         dev_err(dev, "DPBP device allocation failed\n");
2213                 return err;
2214         }
2215
2216         priv->dpbp_dev = dpbp_dev;
2217
2218         err = dpbp_open(priv->mc_io, 0, priv->dpbp_dev->obj_desc.id,
2219                         &dpbp_dev->mc_handle);
2220         if (err) {
2221                 dev_err(dev, "dpbp_open() failed\n");
2222                 goto err_open;
2223         }
2224
2225         err = dpbp_reset(priv->mc_io, 0, dpbp_dev->mc_handle);
2226         if (err) {
2227                 dev_err(dev, "dpbp_reset() failed\n");
2228                 goto err_reset;
2229         }
2230
2231         err = dpbp_enable(priv->mc_io, 0, dpbp_dev->mc_handle);
2232         if (err) {
2233                 dev_err(dev, "dpbp_enable() failed\n");
2234                 goto err_enable;
2235         }
2236
2237         err = dpbp_get_attributes(priv->mc_io, 0, dpbp_dev->mc_handle,
2238                                   &dpbp_attrs);
2239         if (err) {
2240                 dev_err(dev, "dpbp_get_attributes() failed\n");
2241                 goto err_get_attr;
2242         }
2243         priv->bpid = dpbp_attrs.bpid;
2244
2245         return 0;
2246
2247 err_get_attr:
2248         dpbp_disable(priv->mc_io, 0, dpbp_dev->mc_handle);
2249 err_enable:
2250 err_reset:
2251         dpbp_close(priv->mc_io, 0, dpbp_dev->mc_handle);
2252 err_open:
2253         fsl_mc_object_free(dpbp_dev);
2254
2255         return err;
2256 }
2257
2258 static void free_dpbp(struct dpaa2_eth_priv *priv)
2259 {
2260         drain_pool(priv);
2261         dpbp_disable(priv->mc_io, 0, priv->dpbp_dev->mc_handle);
2262         dpbp_close(priv->mc_io, 0, priv->dpbp_dev->mc_handle);
2263         fsl_mc_object_free(priv->dpbp_dev);
2264 }
2265
2266 static int set_buffer_layout(struct dpaa2_eth_priv *priv)
2267 {
2268         struct device *dev = priv->net_dev->dev.parent;
2269         struct dpni_buffer_layout buf_layout = {0};
2270         u16 rx_buf_align;
2271         int err;
2272
2273         /* We need to check for WRIOP version 1.0.0, but depending on the MC
2274          * version, this number is not always provided correctly on rev1.
2275          * We need to check for both alternatives in this situation.
2276          */
2277         if (priv->dpni_attrs.wriop_version == DPAA2_WRIOP_VERSION(0, 0, 0) ||
2278             priv->dpni_attrs.wriop_version == DPAA2_WRIOP_VERSION(1, 0, 0))
2279                 rx_buf_align = DPAA2_ETH_RX_BUF_ALIGN_REV1;
2280         else
2281                 rx_buf_align = DPAA2_ETH_RX_BUF_ALIGN;
2282
2283         /* tx buffer */
2284         buf_layout.private_data_size = DPAA2_ETH_SWA_SIZE;
2285         buf_layout.pass_timestamp = true;
2286         buf_layout.options = DPNI_BUF_LAYOUT_OPT_PRIVATE_DATA_SIZE |
2287                              DPNI_BUF_LAYOUT_OPT_TIMESTAMP;
2288         err = dpni_set_buffer_layout(priv->mc_io, 0, priv->mc_token,
2289                                      DPNI_QUEUE_TX, &buf_layout);
2290         if (err) {
2291                 dev_err(dev, "dpni_set_buffer_layout(TX) failed\n");
2292                 return err;
2293         }
2294
2295         /* tx-confirm buffer */
2296         buf_layout.options = DPNI_BUF_LAYOUT_OPT_TIMESTAMP;
2297         err = dpni_set_buffer_layout(priv->mc_io, 0, priv->mc_token,
2298                                      DPNI_QUEUE_TX_CONFIRM, &buf_layout);
2299         if (err) {
2300                 dev_err(dev, "dpni_set_buffer_layout(TX_CONF) failed\n");
2301                 return err;
2302         }
2303
2304         /* Now that we've set our tx buffer layout, retrieve the minimum
2305          * required tx data offset.
2306          */
2307         err = dpni_get_tx_data_offset(priv->mc_io, 0, priv->mc_token,
2308                                       &priv->tx_data_offset);
2309         if (err) {
2310                 dev_err(dev, "dpni_get_tx_data_offset() failed\n");
2311                 return err;
2312         }
2313
2314         if ((priv->tx_data_offset % 64) != 0)
2315                 dev_warn(dev, "Tx data offset (%d) not a multiple of 64B\n",
2316                          priv->tx_data_offset);
2317
2318         /* rx buffer */
2319         buf_layout.pass_frame_status = true;
2320         buf_layout.pass_parser_result = true;
2321         buf_layout.data_align = rx_buf_align;
2322         buf_layout.data_head_room = dpaa2_eth_rx_head_room(priv);
2323         buf_layout.private_data_size = 0;
2324         buf_layout.options = DPNI_BUF_LAYOUT_OPT_PARSER_RESULT |
2325                              DPNI_BUF_LAYOUT_OPT_FRAME_STATUS |
2326                              DPNI_BUF_LAYOUT_OPT_DATA_ALIGN |
2327                              DPNI_BUF_LAYOUT_OPT_DATA_HEAD_ROOM |
2328                              DPNI_BUF_LAYOUT_OPT_TIMESTAMP;
2329         err = dpni_set_buffer_layout(priv->mc_io, 0, priv->mc_token,
2330                                      DPNI_QUEUE_RX, &buf_layout);
2331         if (err) {
2332                 dev_err(dev, "dpni_set_buffer_layout(RX) failed\n");
2333                 return err;
2334         }
2335
2336         return 0;
2337 }
2338
2339 #define DPNI_ENQUEUE_FQID_VER_MAJOR     7
2340 #define DPNI_ENQUEUE_FQID_VER_MINOR     9
2341
2342 static inline int dpaa2_eth_enqueue_qd(struct dpaa2_eth_priv *priv,
2343                                        struct dpaa2_eth_fq *fq,
2344                                        struct dpaa2_fd *fd, u8 prio)
2345 {
2346         return dpaa2_io_service_enqueue_qd(fq->channel->dpio,
2347                                            priv->tx_qdid, prio,
2348                                            fq->tx_qdbin, fd);
2349 }
2350
2351 static inline int dpaa2_eth_enqueue_fq(struct dpaa2_eth_priv *priv,
2352                                        struct dpaa2_eth_fq *fq,
2353                                        struct dpaa2_fd *fd,
2354                                        u8 prio __always_unused)
2355 {
2356         return dpaa2_io_service_enqueue_fq(fq->channel->dpio,
2357                                            fq->tx_fqid, fd);
2358 }
2359
2360 static void set_enqueue_mode(struct dpaa2_eth_priv *priv)
2361 {
2362         if (dpaa2_eth_cmp_dpni_ver(priv, DPNI_ENQUEUE_FQID_VER_MAJOR,
2363                                    DPNI_ENQUEUE_FQID_VER_MINOR) < 0)
2364                 priv->enqueue = dpaa2_eth_enqueue_qd;
2365         else
2366                 priv->enqueue = dpaa2_eth_enqueue_fq;
2367 }
2368
2369 /* Configure the DPNI object this interface is associated with */
2370 static int setup_dpni(struct fsl_mc_device *ls_dev)
2371 {
2372         struct device *dev = &ls_dev->dev;
2373         struct dpaa2_eth_priv *priv;
2374         struct net_device *net_dev;
2375         int err;
2376
2377         net_dev = dev_get_drvdata(dev);
2378         priv = netdev_priv(net_dev);
2379
2380         /* get a handle for the DPNI object */
2381         err = dpni_open(priv->mc_io, 0, ls_dev->obj_desc.id, &priv->mc_token);
2382         if (err) {
2383                 dev_err(dev, "dpni_open() failed\n");
2384                 return err;
2385         }
2386
2387         /* Check if we can work with this DPNI object */
2388         err = dpni_get_api_version(priv->mc_io, 0, &priv->dpni_ver_major,
2389                                    &priv->dpni_ver_minor);
2390         if (err) {
2391                 dev_err(dev, "dpni_get_api_version() failed\n");
2392                 goto close;
2393         }
2394         if (dpaa2_eth_cmp_dpni_ver(priv, DPNI_VER_MAJOR, DPNI_VER_MINOR) < 0) {
2395                 dev_err(dev, "DPNI version %u.%u not supported, need >= %u.%u\n",
2396                         priv->dpni_ver_major, priv->dpni_ver_minor,
2397                         DPNI_VER_MAJOR, DPNI_VER_MINOR);
2398                 err = -ENOTSUPP;
2399                 goto close;
2400         }
2401
2402         ls_dev->mc_io = priv->mc_io;
2403         ls_dev->mc_handle = priv->mc_token;
2404
2405         err = dpni_reset(priv->mc_io, 0, priv->mc_token);
2406         if (err) {
2407                 dev_err(dev, "dpni_reset() failed\n");
2408                 goto close;
2409         }
2410
2411         err = dpni_get_attributes(priv->mc_io, 0, priv->mc_token,
2412                                   &priv->dpni_attrs);
2413         if (err) {
2414                 dev_err(dev, "dpni_get_attributes() failed (err=%d)\n", err);
2415                 goto close;
2416         }
2417
2418         err = set_buffer_layout(priv);
2419         if (err)
2420                 goto close;
2421
2422         set_enqueue_mode(priv);
2423
2424         priv->cls_rules = devm_kzalloc(dev, sizeof(struct dpaa2_eth_cls_rule) *
2425                                        dpaa2_eth_fs_count(priv), GFP_KERNEL);
2426         if (!priv->cls_rules)
2427                 goto close;
2428
2429         return 0;
2430
2431 close:
2432         dpni_close(priv->mc_io, 0, priv->mc_token);
2433
2434         return err;
2435 }
2436
2437 static void free_dpni(struct dpaa2_eth_priv *priv)
2438 {
2439         int err;
2440
2441         err = dpni_reset(priv->mc_io, 0, priv->mc_token);
2442         if (err)
2443                 netdev_warn(priv->net_dev, "dpni_reset() failed (err %d)\n",
2444                             err);
2445
2446         dpni_close(priv->mc_io, 0, priv->mc_token);
2447 }
2448
2449 static int setup_rx_flow(struct dpaa2_eth_priv *priv,
2450                          struct dpaa2_eth_fq *fq)
2451 {
2452         struct device *dev = priv->net_dev->dev.parent;
2453         struct dpni_queue queue;
2454         struct dpni_queue_id qid;
2455         struct dpni_taildrop td;
2456         int err;
2457
2458         err = dpni_get_queue(priv->mc_io, 0, priv->mc_token,
2459                              DPNI_QUEUE_RX, 0, fq->flowid, &queue, &qid);
2460         if (err) {
2461                 dev_err(dev, "dpni_get_queue(RX) failed\n");
2462                 return err;
2463         }
2464
2465         fq->fqid = qid.fqid;
2466
2467         queue.destination.id = fq->channel->dpcon_id;
2468         queue.destination.type = DPNI_DEST_DPCON;
2469         queue.destination.priority = 1;
2470         queue.user_context = (u64)(uintptr_t)fq;
2471         err = dpni_set_queue(priv->mc_io, 0, priv->mc_token,
2472                              DPNI_QUEUE_RX, 0, fq->flowid,
2473                              DPNI_QUEUE_OPT_USER_CTX | DPNI_QUEUE_OPT_DEST,
2474                              &queue);
2475         if (err) {
2476                 dev_err(dev, "dpni_set_queue(RX) failed\n");
2477                 return err;
2478         }
2479
2480         td.enable = 1;
2481         td.threshold = DPAA2_ETH_TAILDROP_THRESH;
2482         err = dpni_set_taildrop(priv->mc_io, 0, priv->mc_token, DPNI_CP_QUEUE,
2483                                 DPNI_QUEUE_RX, 0, fq->flowid, &td);
2484         if (err) {
2485                 dev_err(dev, "dpni_set_threshold() failed\n");
2486                 return err;
2487         }
2488
2489         /* xdp_rxq setup */
2490         err = xdp_rxq_info_reg(&fq->channel->xdp_rxq, priv->net_dev,
2491                                fq->flowid);
2492         if (err) {
2493                 dev_err(dev, "xdp_rxq_info_reg failed\n");
2494                 return err;
2495         }
2496
2497         err = xdp_rxq_info_reg_mem_model(&fq->channel->xdp_rxq,
2498                                          MEM_TYPE_PAGE_ORDER0, NULL);
2499         if (err) {
2500                 dev_err(dev, "xdp_rxq_info_reg_mem_model failed\n");
2501                 return err;
2502         }
2503
2504         return 0;
2505 }
2506
2507 static int setup_tx_flow(struct dpaa2_eth_priv *priv,
2508                          struct dpaa2_eth_fq *fq)
2509 {
2510         struct device *dev = priv->net_dev->dev.parent;
2511         struct dpni_queue queue;
2512         struct dpni_queue_id qid;
2513         int err;
2514
2515         err = dpni_get_queue(priv->mc_io, 0, priv->mc_token,
2516                              DPNI_QUEUE_TX, 0, fq->flowid, &queue, &qid);
2517         if (err) {
2518                 dev_err(dev, "dpni_get_queue(TX) failed\n");
2519                 return err;
2520         }
2521
2522         fq->tx_qdbin = qid.qdbin;
2523         fq->tx_fqid = qid.fqid;
2524
2525         err = dpni_get_queue(priv->mc_io, 0, priv->mc_token,
2526                              DPNI_QUEUE_TX_CONFIRM, 0, fq->flowid,
2527                              &queue, &qid);
2528         if (err) {
2529                 dev_err(dev, "dpni_get_queue(TX_CONF) failed\n");
2530                 return err;
2531         }
2532
2533         fq->fqid = qid.fqid;
2534
2535         queue.destination.id = fq->channel->dpcon_id;
2536         queue.destination.type = DPNI_DEST_DPCON;
2537         queue.destination.priority = 0;
2538         queue.user_context = (u64)(uintptr_t)fq;
2539         err = dpni_set_queue(priv->mc_io, 0, priv->mc_token,
2540                              DPNI_QUEUE_TX_CONFIRM, 0, fq->flowid,
2541                              DPNI_QUEUE_OPT_USER_CTX | DPNI_QUEUE_OPT_DEST,
2542                              &queue);
2543         if (err) {
2544                 dev_err(dev, "dpni_set_queue(TX_CONF) failed\n");
2545                 return err;
2546         }
2547
2548         return 0;
2549 }
2550
2551 /* Supported header fields for Rx hash distribution key */
2552 static const struct dpaa2_eth_dist_fields dist_fields[] = {
2553         {
2554                 /* L2 header */
2555                 .rxnfc_field = RXH_L2DA,
2556                 .cls_prot = NET_PROT_ETH,
2557                 .cls_field = NH_FLD_ETH_DA,
2558                 .size = 6,
2559         }, {
2560                 .cls_prot = NET_PROT_ETH,
2561                 .cls_field = NH_FLD_ETH_SA,
2562                 .size = 6,
2563         }, {
2564                 /* This is the last ethertype field parsed:
2565                  * depending on frame format, it can be the MAC ethertype
2566                  * or the VLAN etype.
2567                  */
2568                 .cls_prot = NET_PROT_ETH,
2569                 .cls_field = NH_FLD_ETH_TYPE,
2570                 .size = 2,
2571         }, {
2572                 /* VLAN header */
2573                 .rxnfc_field = RXH_VLAN,
2574                 .cls_prot = NET_PROT_VLAN,
2575                 .cls_field = NH_FLD_VLAN_TCI,
2576                 .size = 2,
2577         }, {
2578                 /* IP header */
2579                 .rxnfc_field = RXH_IP_SRC,
2580                 .cls_prot = NET_PROT_IP,
2581                 .cls_field = NH_FLD_IP_SRC,
2582                 .size = 4,
2583         }, {
2584                 .rxnfc_field = RXH_IP_DST,
2585                 .cls_prot = NET_PROT_IP,
2586                 .cls_field = NH_FLD_IP_DST,
2587                 .size = 4,
2588         }, {
2589                 .rxnfc_field = RXH_L3_PROTO,
2590                 .cls_prot = NET_PROT_IP,
2591                 .cls_field = NH_FLD_IP_PROTO,
2592                 .size = 1,
2593         }, {
2594                 /* Using UDP ports, this is functionally equivalent to raw
2595                  * byte pairs from L4 header.
2596                  */
2597                 .rxnfc_field = RXH_L4_B_0_1,
2598                 .cls_prot = NET_PROT_UDP,
2599                 .cls_field = NH_FLD_UDP_PORT_SRC,
2600                 .size = 2,
2601         }, {
2602                 .rxnfc_field = RXH_L4_B_2_3,
2603                 .cls_prot = NET_PROT_UDP,
2604                 .cls_field = NH_FLD_UDP_PORT_DST,
2605                 .size = 2,
2606         },
2607 };
2608
2609 /* Configure the Rx hash key using the legacy API */
2610 static int config_legacy_hash_key(struct dpaa2_eth_priv *priv, dma_addr_t key)
2611 {
2612         struct device *dev = priv->net_dev->dev.parent;
2613         struct dpni_rx_tc_dist_cfg dist_cfg;
2614         int err;
2615
2616         memset(&dist_cfg, 0, sizeof(dist_cfg));
2617
2618         dist_cfg.key_cfg_iova = key;
2619         dist_cfg.dist_size = dpaa2_eth_queue_count(priv);
2620         dist_cfg.dist_mode = DPNI_DIST_MODE_HASH;
2621
2622         err = dpni_set_rx_tc_dist(priv->mc_io, 0, priv->mc_token, 0, &dist_cfg);
2623         if (err)
2624                 dev_err(dev, "dpni_set_rx_tc_dist failed\n");
2625
2626         return err;
2627 }
2628
2629 /* Configure the Rx hash key using the new API */
2630 static int config_hash_key(struct dpaa2_eth_priv *priv, dma_addr_t key)
2631 {
2632         struct device *dev = priv->net_dev->dev.parent;
2633         struct dpni_rx_dist_cfg dist_cfg;
2634         int err;
2635
2636         memset(&dist_cfg, 0, sizeof(dist_cfg));
2637
2638         dist_cfg.key_cfg_iova = key;
2639         dist_cfg.dist_size = dpaa2_eth_queue_count(priv);
2640         dist_cfg.enable = 1;
2641
2642         err = dpni_set_rx_hash_dist(priv->mc_io, 0, priv->mc_token, &dist_cfg);
2643         if (err)
2644                 dev_err(dev, "dpni_set_rx_hash_dist failed\n");
2645
2646         return err;
2647 }
2648
2649 /* Configure the Rx flow classification key */
2650 static int config_cls_key(struct dpaa2_eth_priv *priv, dma_addr_t key)
2651 {
2652         struct device *dev = priv->net_dev->dev.parent;
2653         struct dpni_rx_dist_cfg dist_cfg;
2654         int err;
2655
2656         memset(&dist_cfg, 0, sizeof(dist_cfg));
2657
2658         dist_cfg.key_cfg_iova = key;
2659         dist_cfg.dist_size = dpaa2_eth_queue_count(priv);
2660         dist_cfg.enable = 1;
2661
2662         err = dpni_set_rx_fs_dist(priv->mc_io, 0, priv->mc_token, &dist_cfg);
2663         if (err)
2664                 dev_err(dev, "dpni_set_rx_fs_dist failed\n");
2665
2666         return err;
2667 }
2668
2669 /* Size of the Rx flow classification key */
2670 int dpaa2_eth_cls_key_size(void)
2671 {
2672         int i, size = 0;
2673
2674         for (i = 0; i < ARRAY_SIZE(dist_fields); i++)
2675                 size += dist_fields[i].size;
2676
2677         return size;
2678 }
2679
2680 /* Offset of header field in Rx classification key */
2681 int dpaa2_eth_cls_fld_off(int prot, int field)
2682 {
2683         int i, off = 0;
2684
2685         for (i = 0; i < ARRAY_SIZE(dist_fields); i++) {
2686                 if (dist_fields[i].cls_prot == prot &&
2687                     dist_fields[i].cls_field == field)
2688                         return off;
2689                 off += dist_fields[i].size;
2690         }
2691
2692         WARN_ONCE(1, "Unsupported header field used for Rx flow cls\n");
2693         return 0;
2694 }
2695
2696 /* Set Rx distribution (hash or flow classification) key
2697  * flags is a combination of RXH_ bits
2698  */
2699 static int dpaa2_eth_set_dist_key(struct net_device *net_dev,
2700                                   enum dpaa2_eth_rx_dist type, u64 flags)
2701 {
2702         struct device *dev = net_dev->dev.parent;
2703         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
2704         struct dpkg_profile_cfg cls_cfg;
2705         u32 rx_hash_fields = 0;
2706         dma_addr_t key_iova;
2707         u8 *dma_mem;
2708         int i;
2709         int err = 0;
2710
2711         memset(&cls_cfg, 0, sizeof(cls_cfg));
2712
2713         for (i = 0; i < ARRAY_SIZE(dist_fields); i++) {
2714                 struct dpkg_extract *key =
2715                         &cls_cfg.extracts[cls_cfg.num_extracts];
2716
2717                 /* For Rx hashing key we set only the selected fields.
2718                  * For Rx flow classification key we set all supported fields
2719                  */
2720                 if (type == DPAA2_ETH_RX_DIST_HASH) {
2721                         if (!(flags & dist_fields[i].rxnfc_field))
2722                                 continue;
2723                         rx_hash_fields |= dist_fields[i].rxnfc_field;
2724                 }
2725
2726                 if (cls_cfg.num_extracts >= DPKG_MAX_NUM_OF_EXTRACTS) {
2727                         dev_err(dev, "error adding key extraction rule, too many rules?\n");
2728                         return -E2BIG;
2729                 }
2730
2731                 key->type = DPKG_EXTRACT_FROM_HDR;
2732                 key->extract.from_hdr.prot = dist_fields[i].cls_prot;
2733                 key->extract.from_hdr.type = DPKG_FULL_FIELD;
2734                 key->extract.from_hdr.field = dist_fields[i].cls_field;
2735                 cls_cfg.num_extracts++;
2736         }
2737
2738         dma_mem = kzalloc(DPAA2_CLASSIFIER_DMA_SIZE, GFP_KERNEL);
2739         if (!dma_mem)
2740                 return -ENOMEM;
2741
2742         err = dpni_prepare_key_cfg(&cls_cfg, dma_mem);
2743         if (err) {
2744                 dev_err(dev, "dpni_prepare_key_cfg error %d\n", err);
2745                 goto free_key;
2746         }
2747
2748         /* Prepare for setting the rx dist */
2749         key_iova = dma_map_single(dev, dma_mem, DPAA2_CLASSIFIER_DMA_SIZE,
2750                                   DMA_TO_DEVICE);
2751         if (dma_mapping_error(dev, key_iova)) {
2752                 dev_err(dev, "DMA mapping failed\n");
2753                 err = -ENOMEM;
2754                 goto free_key;
2755         }
2756
2757         if (type == DPAA2_ETH_RX_DIST_HASH) {
2758                 if (dpaa2_eth_has_legacy_dist(priv))
2759                         err = config_legacy_hash_key(priv, key_iova);
2760                 else
2761                         err = config_hash_key(priv, key_iova);
2762         } else {
2763                 err = config_cls_key(priv, key_iova);
2764         }
2765
2766         dma_unmap_single(dev, key_iova, DPAA2_CLASSIFIER_DMA_SIZE,
2767                          DMA_TO_DEVICE);
2768         if (!err && type == DPAA2_ETH_RX_DIST_HASH)
2769                 priv->rx_hash_fields = rx_hash_fields;
2770
2771 free_key:
2772         kfree(dma_mem);
2773         return err;
2774 }
2775
2776 int dpaa2_eth_set_hash(struct net_device *net_dev, u64 flags)
2777 {
2778         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
2779
2780         if (!dpaa2_eth_hash_enabled(priv))
2781                 return -EOPNOTSUPP;
2782
2783         return dpaa2_eth_set_dist_key(net_dev, DPAA2_ETH_RX_DIST_HASH, flags);
2784 }
2785
2786 static int dpaa2_eth_set_cls(struct dpaa2_eth_priv *priv)
2787 {
2788         struct device *dev = priv->net_dev->dev.parent;
2789
2790         /* Check if we actually support Rx flow classification */
2791         if (dpaa2_eth_has_legacy_dist(priv)) {
2792                 dev_dbg(dev, "Rx cls not supported by current MC version\n");
2793                 return -EOPNOTSUPP;
2794         }
2795
2796         if (priv->dpni_attrs.options & DPNI_OPT_NO_FS ||
2797             !(priv->dpni_attrs.options & DPNI_OPT_HAS_KEY_MASKING)) {
2798                 dev_dbg(dev, "Rx cls disabled in DPNI options\n");
2799                 return -EOPNOTSUPP;
2800         }
2801
2802         if (!dpaa2_eth_hash_enabled(priv)) {
2803                 dev_dbg(dev, "Rx cls disabled for single queue DPNIs\n");
2804                 return -EOPNOTSUPP;
2805         }
2806
2807         priv->rx_cls_enabled = 1;
2808
2809         return dpaa2_eth_set_dist_key(priv->net_dev, DPAA2_ETH_RX_DIST_CLS, 0);
2810 }
2811
2812 /* Bind the DPNI to its needed objects and resources: buffer pool, DPIOs,
2813  * frame queues and channels
2814  */
2815 static int bind_dpni(struct dpaa2_eth_priv *priv)
2816 {
2817         struct net_device *net_dev = priv->net_dev;
2818         struct device *dev = net_dev->dev.parent;
2819         struct dpni_pools_cfg pools_params;
2820         struct dpni_error_cfg err_cfg;
2821         int err = 0;
2822         int i;
2823
2824         pools_params.num_dpbp = 1;
2825         pools_params.pools[0].dpbp_id = priv->dpbp_dev->obj_desc.id;
2826         pools_params.pools[0].backup_pool = 0;
2827         pools_params.pools[0].buffer_size = DPAA2_ETH_RX_BUF_SIZE;
2828         err = dpni_set_pools(priv->mc_io, 0, priv->mc_token, &pools_params);
2829         if (err) {
2830                 dev_err(dev, "dpni_set_pools() failed\n");
2831                 return err;
2832         }
2833
2834         /* have the interface implicitly distribute traffic based on
2835          * the default hash key
2836          */
2837         err = dpaa2_eth_set_hash(net_dev, DPAA2_RXH_DEFAULT);
2838         if (err && err != -EOPNOTSUPP)
2839                 dev_err(dev, "Failed to configure hashing\n");
2840
2841         /* Configure the flow classification key; it includes all
2842          * supported header fields and cannot be modified at runtime
2843          */
2844         err = dpaa2_eth_set_cls(priv);
2845         if (err && err != -EOPNOTSUPP)
2846                 dev_err(dev, "Failed to configure Rx classification key\n");
2847
2848         /* Configure handling of error frames */
2849         err_cfg.errors = DPAA2_FAS_RX_ERR_MASK;
2850         err_cfg.set_frame_annotation = 1;
2851         err_cfg.error_action = DPNI_ERROR_ACTION_DISCARD;
2852         err = dpni_set_errors_behavior(priv->mc_io, 0, priv->mc_token,
2853                                        &err_cfg);
2854         if (err) {
2855                 dev_err(dev, "dpni_set_errors_behavior failed\n");
2856                 return err;
2857         }
2858
2859         /* Configure Rx and Tx conf queues to generate CDANs */
2860         for (i = 0; i < priv->num_fqs; i++) {
2861                 switch (priv->fq[i].type) {
2862                 case DPAA2_RX_FQ:
2863                         err = setup_rx_flow(priv, &priv->fq[i]);
2864                         break;
2865                 case DPAA2_TX_CONF_FQ:
2866                         err = setup_tx_flow(priv, &priv->fq[i]);
2867                         break;
2868                 default:
2869                         dev_err(dev, "Invalid FQ type %d\n", priv->fq[i].type);
2870                         return -EINVAL;
2871                 }
2872                 if (err)
2873                         return err;
2874         }
2875
2876         err = dpni_get_qdid(priv->mc_io, 0, priv->mc_token,
2877                             DPNI_QUEUE_TX, &priv->tx_qdid);
2878         if (err) {
2879                 dev_err(dev, "dpni_get_qdid() failed\n");
2880                 return err;
2881         }
2882
2883         return 0;
2884 }
2885
2886 /* Allocate rings for storing incoming frame descriptors */
2887 static int alloc_rings(struct dpaa2_eth_priv *priv)
2888 {
2889         struct net_device *net_dev = priv->net_dev;
2890         struct device *dev = net_dev->dev.parent;
2891         int i;
2892
2893         for (i = 0; i < priv->num_channels; i++) {
2894                 priv->channel[i]->store =
2895                         dpaa2_io_store_create(DPAA2_ETH_STORE_SIZE, dev);
2896                 if (!priv->channel[i]->store) {
2897                         netdev_err(net_dev, "dpaa2_io_store_create() failed\n");
2898                         goto err_ring;
2899                 }
2900         }
2901
2902         return 0;
2903
2904 err_ring:
2905         for (i = 0; i < priv->num_channels; i++) {
2906                 if (!priv->channel[i]->store)
2907                         break;
2908                 dpaa2_io_store_destroy(priv->channel[i]->store);
2909         }
2910
2911         return -ENOMEM;
2912 }
2913
2914 static void free_rings(struct dpaa2_eth_priv *priv)
2915 {
2916         int i;
2917
2918         for (i = 0; i < priv->num_channels; i++)
2919                 dpaa2_io_store_destroy(priv->channel[i]->store);
2920 }
2921
2922 static int set_mac_addr(struct dpaa2_eth_priv *priv)
2923 {
2924         struct net_device *net_dev = priv->net_dev;
2925         struct device *dev = net_dev->dev.parent;
2926         u8 mac_addr[ETH_ALEN], dpni_mac_addr[ETH_ALEN];
2927         int err;
2928
2929         /* Get firmware address, if any */
2930         err = dpni_get_port_mac_addr(priv->mc_io, 0, priv->mc_token, mac_addr);
2931         if (err) {
2932                 dev_err(dev, "dpni_get_port_mac_addr() failed\n");
2933                 return err;
2934         }
2935
2936         /* Get DPNI attributes address, if any */
2937         err = dpni_get_primary_mac_addr(priv->mc_io, 0, priv->mc_token,
2938                                         dpni_mac_addr);
2939         if (err) {
2940                 dev_err(dev, "dpni_get_primary_mac_addr() failed\n");
2941                 return err;
2942         }
2943
2944         /* First check if firmware has any address configured by bootloader */
2945         if (!is_zero_ether_addr(mac_addr)) {
2946                 /* If the DPMAC addr != DPNI addr, update it */
2947                 if (!ether_addr_equal(mac_addr, dpni_mac_addr)) {
2948                         err = dpni_set_primary_mac_addr(priv->mc_io, 0,
2949                                                         priv->mc_token,
2950                                                         mac_addr);
2951                         if (err) {
2952                                 dev_err(dev, "dpni_set_primary_mac_addr() failed\n");
2953                                 return err;
2954                         }
2955                 }
2956                 memcpy(net_dev->dev_addr, mac_addr, net_dev->addr_len);
2957         } else if (is_zero_ether_addr(dpni_mac_addr)) {
2958                 /* No MAC address configured, fill in net_dev->dev_addr
2959                  * with a random one
2960                  */
2961                 eth_hw_addr_random(net_dev);
2962                 dev_dbg_once(dev, "device(s) have all-zero hwaddr, replaced with random\n");
2963
2964                 err = dpni_set_primary_mac_addr(priv->mc_io, 0, priv->mc_token,
2965                                                 net_dev->dev_addr);
2966                 if (err) {
2967                         dev_err(dev, "dpni_set_primary_mac_addr() failed\n");
2968                         return err;
2969                 }
2970
2971                 /* Override NET_ADDR_RANDOM set by eth_hw_addr_random(); for all
2972                  * practical purposes, this will be our "permanent" mac address,
2973                  * at least until the next reboot. This move will also permit
2974                  * register_netdevice() to properly fill up net_dev->perm_addr.
2975                  */
2976                 net_dev->addr_assign_type = NET_ADDR_PERM;
2977         } else {
2978                 /* NET_ADDR_PERM is default, all we have to do is
2979                  * fill in the device addr.
2980                  */
2981                 memcpy(net_dev->dev_addr, dpni_mac_addr, net_dev->addr_len);
2982         }
2983
2984         return 0;
2985 }
2986
2987 static int netdev_init(struct net_device *net_dev)
2988 {
2989         struct device *dev = net_dev->dev.parent;
2990         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
2991         u32 options = priv->dpni_attrs.options;
2992         u64 supported = 0, not_supported = 0;
2993         u8 bcast_addr[ETH_ALEN];
2994         u8 num_queues;
2995         int err;
2996
2997         net_dev->netdev_ops = &dpaa2_eth_ops;
2998         net_dev->ethtool_ops = &dpaa2_ethtool_ops;
2999
3000         err = set_mac_addr(priv);
3001         if (err)
3002                 return err;
3003
3004         /* Explicitly add the broadcast address to the MAC filtering table */
3005         eth_broadcast_addr(bcast_addr);
3006         err = dpni_add_mac_addr(priv->mc_io, 0, priv->mc_token, bcast_addr);
3007         if (err) {
3008                 dev_err(dev, "dpni_add_mac_addr() failed\n");
3009                 return err;
3010         }
3011
3012         /* Set MTU upper limit; lower limit is 68B (default value) */
3013         net_dev->max_mtu = DPAA2_ETH_MAX_MTU;
3014         err = dpni_set_max_frame_length(priv->mc_io, 0, priv->mc_token,
3015                                         DPAA2_ETH_MFL);
3016         if (err) {
3017                 dev_err(dev, "dpni_set_max_frame_length() failed\n");
3018                 return err;
3019         }
3020
3021         /* Set actual number of queues in the net device */
3022         num_queues = dpaa2_eth_queue_count(priv);
3023         err = netif_set_real_num_tx_queues(net_dev, num_queues);
3024         if (err) {
3025                 dev_err(dev, "netif_set_real_num_tx_queues() failed\n");
3026                 return err;
3027         }
3028         err = netif_set_real_num_rx_queues(net_dev, num_queues);
3029         if (err) {
3030                 dev_err(dev, "netif_set_real_num_rx_queues() failed\n");
3031                 return err;
3032         }
3033
3034         /* Capabilities listing */
3035         supported |= IFF_LIVE_ADDR_CHANGE;
3036
3037         if (options & DPNI_OPT_NO_MAC_FILTER)
3038                 not_supported |= IFF_UNICAST_FLT;
3039         else
3040                 supported |= IFF_UNICAST_FLT;
3041
3042         net_dev->priv_flags |= supported;
3043         net_dev->priv_flags &= ~not_supported;
3044
3045         /* Features */
3046         net_dev->features = NETIF_F_RXCSUM |
3047                             NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
3048                             NETIF_F_SG | NETIF_F_HIGHDMA |
3049                             NETIF_F_LLTX;
3050         net_dev->hw_features = net_dev->features;
3051
3052         return 0;
3053 }
3054
3055 static int poll_link_state(void *arg)
3056 {
3057         struct dpaa2_eth_priv *priv = (struct dpaa2_eth_priv *)arg;
3058         int err;
3059
3060         while (!kthread_should_stop()) {
3061                 err = link_state_update(priv);
3062                 if (unlikely(err))
3063                         return err;
3064
3065                 msleep(DPAA2_ETH_LINK_STATE_REFRESH);
3066         }
3067
3068         return 0;
3069 }
3070
3071 static irqreturn_t dpni_irq0_handler_thread(int irq_num, void *arg)
3072 {
3073         u32 status = ~0;
3074         struct device *dev = (struct device *)arg;
3075         struct fsl_mc_device *dpni_dev = to_fsl_mc_device(dev);
3076         struct net_device *net_dev = dev_get_drvdata(dev);
3077         int err;
3078
3079         err = dpni_get_irq_status(dpni_dev->mc_io, 0, dpni_dev->mc_handle,
3080                                   DPNI_IRQ_INDEX, &status);
3081         if (unlikely(err)) {
3082                 netdev_err(net_dev, "Can't get irq status (err %d)\n", err);
3083                 return IRQ_HANDLED;
3084         }
3085
3086         if (status & DPNI_IRQ_EVENT_LINK_CHANGED)
3087                 link_state_update(netdev_priv(net_dev));
3088
3089         return IRQ_HANDLED;
3090 }
3091
3092 static int setup_irqs(struct fsl_mc_device *ls_dev)
3093 {
3094         int err = 0;
3095         struct fsl_mc_device_irq *irq;
3096
3097         err = fsl_mc_allocate_irqs(ls_dev);
3098         if (err) {
3099                 dev_err(&ls_dev->dev, "MC irqs allocation failed\n");
3100                 return err;
3101         }
3102
3103         irq = ls_dev->irqs[0];
3104         err = devm_request_threaded_irq(&ls_dev->dev, irq->msi_desc->irq,
3105                                         NULL, dpni_irq0_handler_thread,
3106                                         IRQF_NO_SUSPEND | IRQF_ONESHOT,
3107                                         dev_name(&ls_dev->dev), &ls_dev->dev);
3108         if (err < 0) {
3109                 dev_err(&ls_dev->dev, "devm_request_threaded_irq(): %d\n", err);
3110                 goto free_mc_irq;
3111         }
3112
3113         err = dpni_set_irq_mask(ls_dev->mc_io, 0, ls_dev->mc_handle,
3114                                 DPNI_IRQ_INDEX, DPNI_IRQ_EVENT_LINK_CHANGED);
3115         if (err < 0) {
3116                 dev_err(&ls_dev->dev, "dpni_set_irq_mask(): %d\n", err);
3117                 goto free_irq;
3118         }
3119
3120         err = dpni_set_irq_enable(ls_dev->mc_io, 0, ls_dev->mc_handle,
3121                                   DPNI_IRQ_INDEX, 1);
3122         if (err < 0) {
3123                 dev_err(&ls_dev->dev, "dpni_set_irq_enable(): %d\n", err);
3124                 goto free_irq;
3125         }
3126
3127         return 0;
3128
3129 free_irq:
3130         devm_free_irq(&ls_dev->dev, irq->msi_desc->irq, &ls_dev->dev);
3131 free_mc_irq:
3132         fsl_mc_free_irqs(ls_dev);
3133
3134         return err;
3135 }
3136
3137 static void add_ch_napi(struct dpaa2_eth_priv *priv)
3138 {
3139         int i;
3140         struct dpaa2_eth_channel *ch;
3141
3142         for (i = 0; i < priv->num_channels; i++) {
3143                 ch = priv->channel[i];
3144                 /* NAPI weight *MUST* be a multiple of DPAA2_ETH_STORE_SIZE */
3145                 netif_napi_add(priv->net_dev, &ch->napi, dpaa2_eth_poll,
3146                                NAPI_POLL_WEIGHT);
3147         }
3148 }
3149
3150 static void del_ch_napi(struct dpaa2_eth_priv *priv)
3151 {
3152         int i;
3153         struct dpaa2_eth_channel *ch;
3154
3155         for (i = 0; i < priv->num_channels; i++) {
3156                 ch = priv->channel[i];
3157                 netif_napi_del(&ch->napi);
3158         }
3159 }
3160
3161 static int dpaa2_eth_probe(struct fsl_mc_device *dpni_dev)
3162 {
3163         struct device *dev;
3164         struct net_device *net_dev = NULL;
3165         struct dpaa2_eth_priv *priv = NULL;
3166         int err = 0;
3167
3168         dev = &dpni_dev->dev;
3169
3170         /* Net device */
3171         net_dev = alloc_etherdev_mq(sizeof(*priv), DPAA2_ETH_MAX_TX_QUEUES);
3172         if (!net_dev) {
3173                 dev_err(dev, "alloc_etherdev_mq() failed\n");
3174                 return -ENOMEM;
3175         }
3176
3177         SET_NETDEV_DEV(net_dev, dev);
3178         dev_set_drvdata(dev, net_dev);
3179
3180         priv = netdev_priv(net_dev);
3181         priv->net_dev = net_dev;
3182
3183         priv->iommu_domain = iommu_get_domain_for_dev(dev);
3184
3185         /* Obtain a MC portal */
3186         err = fsl_mc_portal_allocate(dpni_dev, FSL_MC_IO_ATOMIC_CONTEXT_PORTAL,
3187                                      &priv->mc_io);
3188         if (err) {
3189                 if (err == -ENXIO)
3190                         err = -EPROBE_DEFER;
3191                 else
3192                         dev_err(dev, "MC portal allocation failed\n");
3193                 goto err_portal_alloc;
3194         }
3195
3196         /* MC objects initialization and configuration */
3197         err = setup_dpni(dpni_dev);
3198         if (err)
3199                 goto err_dpni_setup;
3200
3201         err = setup_dpio(priv);
3202         if (err)
3203                 goto err_dpio_setup;
3204
3205         setup_fqs(priv);
3206
3207         err = setup_dpbp(priv);
3208         if (err)
3209                 goto err_dpbp_setup;
3210
3211         err = bind_dpni(priv);
3212         if (err)
3213                 goto err_bind;
3214
3215         /* Add a NAPI context for each channel */
3216         add_ch_napi(priv);
3217
3218         /* Percpu statistics */
3219         priv->percpu_stats = alloc_percpu(*priv->percpu_stats);
3220         if (!priv->percpu_stats) {
3221                 dev_err(dev, "alloc_percpu(percpu_stats) failed\n");
3222                 err = -ENOMEM;
3223                 goto err_alloc_percpu_stats;
3224         }
3225         priv->percpu_extras = alloc_percpu(*priv->percpu_extras);
3226         if (!priv->percpu_extras) {
3227                 dev_err(dev, "alloc_percpu(percpu_extras) failed\n");
3228                 err = -ENOMEM;
3229                 goto err_alloc_percpu_extras;
3230         }
3231
3232         err = netdev_init(net_dev);
3233         if (err)
3234                 goto err_netdev_init;
3235
3236         /* Configure checksum offload based on current interface flags */
3237         err = set_rx_csum(priv, !!(net_dev->features & NETIF_F_RXCSUM));
3238         if (err)
3239                 goto err_csum;
3240
3241         err = set_tx_csum(priv, !!(net_dev->features &
3242                                    (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM)));
3243         if (err)
3244                 goto err_csum;
3245
3246         err = alloc_rings(priv);
3247         if (err)
3248                 goto err_alloc_rings;
3249
3250         err = setup_irqs(dpni_dev);
3251         if (err) {
3252                 netdev_warn(net_dev, "Failed to set link interrupt, fall back to polling\n");
3253                 priv->poll_thread = kthread_run(poll_link_state, priv,
3254                                                 "%s_poll_link", net_dev->name);
3255                 if (IS_ERR(priv->poll_thread)) {
3256                         dev_err(dev, "Error starting polling thread\n");
3257                         goto err_poll_thread;
3258                 }
3259                 priv->do_link_poll = true;
3260         }
3261
3262         err = register_netdev(net_dev);
3263         if (err < 0) {
3264                 dev_err(dev, "register_netdev() failed\n");
3265                 goto err_netdev_reg;
3266         }
3267
3268 #ifdef CONFIG_DEBUG_FS
3269         dpaa2_dbg_add(priv);
3270 #endif
3271
3272         dev_info(dev, "Probed interface %s\n", net_dev->name);
3273         return 0;
3274
3275 err_netdev_reg:
3276         if (priv->do_link_poll)
3277                 kthread_stop(priv->poll_thread);
3278         else
3279                 fsl_mc_free_irqs(dpni_dev);
3280 err_poll_thread:
3281         free_rings(priv);
3282 err_alloc_rings:
3283 err_csum:
3284 err_netdev_init:
3285         free_percpu(priv->percpu_extras);
3286 err_alloc_percpu_extras:
3287         free_percpu(priv->percpu_stats);
3288 err_alloc_percpu_stats:
3289         del_ch_napi(priv);
3290 err_bind:
3291         free_dpbp(priv);
3292 err_dpbp_setup:
3293         free_dpio(priv);
3294 err_dpio_setup:
3295         free_dpni(priv);
3296 err_dpni_setup:
3297         fsl_mc_portal_free(priv->mc_io);
3298 err_portal_alloc:
3299         dev_set_drvdata(dev, NULL);
3300         free_netdev(net_dev);
3301
3302         return err;
3303 }
3304
3305 static int dpaa2_eth_remove(struct fsl_mc_device *ls_dev)
3306 {
3307         struct device *dev;
3308         struct net_device *net_dev;
3309         struct dpaa2_eth_priv *priv;
3310
3311         dev = &ls_dev->dev;
3312         net_dev = dev_get_drvdata(dev);
3313         priv = netdev_priv(net_dev);
3314
3315 #ifdef CONFIG_DEBUG_FS
3316         dpaa2_dbg_remove(priv);
3317 #endif
3318         unregister_netdev(net_dev);
3319
3320         if (priv->do_link_poll)
3321                 kthread_stop(priv->poll_thread);
3322         else
3323                 fsl_mc_free_irqs(ls_dev);
3324
3325         free_rings(priv);
3326         free_percpu(priv->percpu_stats);
3327         free_percpu(priv->percpu_extras);
3328
3329         del_ch_napi(priv);
3330         free_dpbp(priv);
3331         free_dpio(priv);
3332         free_dpni(priv);
3333
3334         fsl_mc_portal_free(priv->mc_io);
3335
3336         free_netdev(net_dev);
3337
3338         dev_dbg(net_dev->dev.parent, "Removed interface %s\n", net_dev->name);
3339
3340         return 0;
3341 }
3342
3343 static const struct fsl_mc_device_id dpaa2_eth_match_id_table[] = {
3344         {
3345                 .vendor = FSL_MC_VENDOR_FREESCALE,
3346                 .obj_type = "dpni",
3347         },
3348         { .vendor = 0x0 }
3349 };
3350 MODULE_DEVICE_TABLE(fslmc, dpaa2_eth_match_id_table);
3351
3352 static struct fsl_mc_driver dpaa2_eth_driver = {
3353         .driver = {
3354                 .name = KBUILD_MODNAME,
3355                 .owner = THIS_MODULE,
3356         },
3357         .probe = dpaa2_eth_probe,
3358         .remove = dpaa2_eth_remove,
3359         .match_id_table = dpaa2_eth_match_id_table
3360 };
3361
3362 static int __init dpaa2_eth_driver_init(void)
3363 {
3364         int err;
3365
3366         dpaa2_eth_dbg_init();
3367         err = fsl_mc_driver_register(&dpaa2_eth_driver);
3368         if (err) {
3369                 dpaa2_eth_dbg_exit();
3370                 return err;
3371         }
3372
3373         return 0;
3374 }
3375
3376 static void __exit dpaa2_eth_driver_exit(void)
3377 {
3378         dpaa2_eth_dbg_exit();
3379         fsl_mc_driver_unregister(&dpaa2_eth_driver);
3380 }
3381
3382 module_init(dpaa2_eth_driver_init);
3383 module_exit(dpaa2_eth_driver_exit);