2 * Copyright (C) 2015 Cavium, Inc.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of version 2 of the GNU General Public License
6 * as published by the Free Software Foundation.
9 #include <linux/module.h>
10 #include <linux/interrupt.h>
11 #include <linux/pci.h>
12 #include <linux/netdevice.h>
13 #include <linux/if_vlan.h>
14 #include <linux/etherdevice.h>
15 #include <linux/ethtool.h>
16 #include <linux/log2.h>
17 #include <linux/prefetch.h>
18 #include <linux/irq.h>
22 #include "nicvf_queues.h"
23 #include "thunder_bgx.h"
25 #define DRV_NAME "thunder-nicvf"
26 #define DRV_VERSION "1.0"
28 /* Supported devices */
29 static const struct pci_device_id nicvf_id_table[] = {
30 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM,
31 PCI_DEVICE_ID_THUNDER_NIC_VF,
33 PCI_SUBSYS_DEVID_88XX_NIC_VF) },
34 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM,
35 PCI_DEVICE_ID_THUNDER_PASS1_NIC_VF,
37 PCI_SUBSYS_DEVID_88XX_PASS1_NIC_VF) },
38 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM,
39 PCI_DEVICE_ID_THUNDER_NIC_VF,
41 PCI_SUBSYS_DEVID_81XX_NIC_VF) },
42 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM,
43 PCI_DEVICE_ID_THUNDER_NIC_VF,
45 PCI_SUBSYS_DEVID_83XX_NIC_VF) },
46 { 0, } /* end of table */
49 MODULE_AUTHOR("Sunil Goutham");
50 MODULE_DESCRIPTION("Cavium Thunder NIC Virtual Function Driver");
51 MODULE_LICENSE("GPL v2");
52 MODULE_VERSION(DRV_VERSION);
53 MODULE_DEVICE_TABLE(pci, nicvf_id_table);
55 static int debug = 0x00;
56 module_param(debug, int, 0644);
57 MODULE_PARM_DESC(debug, "Debug message level bitmap");
59 static int cpi_alg = CPI_ALG_NONE;
60 module_param(cpi_alg, int, S_IRUGO);
61 MODULE_PARM_DESC(cpi_alg,
62 "PFC algorithm (0=none, 1=VLAN, 2=VLAN16, 3=IP Diffserv)");
64 static inline u8 nicvf_netdev_qidx(struct nicvf *nic, u8 qidx)
67 return qidx + ((nic->sqs_id + 1) * MAX_CMP_QUEUES_PER_QS);
72 /* The Cavium ThunderX network controller can *only* be found in SoCs
73 * containing the ThunderX ARM64 CPU implementation. All accesses to the device
74 * registers on this platform are implicitly strongly ordered with respect
75 * to memory accesses. So writeq_relaxed() and readq_relaxed() are safe to use
76 * with no memory barriers in this driver. The readq()/writeq() functions add
77 * explicit ordering operation which in this case are redundant, and only
81 /* Register read/write APIs */
82 void nicvf_reg_write(struct nicvf *nic, u64 offset, u64 val)
84 writeq_relaxed(val, nic->reg_base + offset);
87 u64 nicvf_reg_read(struct nicvf *nic, u64 offset)
89 return readq_relaxed(nic->reg_base + offset);
92 void nicvf_queue_reg_write(struct nicvf *nic, u64 offset,
95 void __iomem *addr = nic->reg_base + offset;
97 writeq_relaxed(val, addr + (qidx << NIC_Q_NUM_SHIFT));
100 u64 nicvf_queue_reg_read(struct nicvf *nic, u64 offset, u64 qidx)
102 void __iomem *addr = nic->reg_base + offset;
104 return readq_relaxed(addr + (qidx << NIC_Q_NUM_SHIFT));
107 /* VF -> PF mailbox communication */
108 static void nicvf_write_to_mbx(struct nicvf *nic, union nic_mbx *mbx)
110 u64 *msg = (u64 *)mbx;
112 nicvf_reg_write(nic, NIC_VF_PF_MAILBOX_0_1 + 0, msg[0]);
113 nicvf_reg_write(nic, NIC_VF_PF_MAILBOX_0_1 + 8, msg[1]);
116 int nicvf_send_msg_to_pf(struct nicvf *nic, union nic_mbx *mbx)
118 int timeout = NIC_MBOX_MSG_TIMEOUT;
121 nic->pf_acked = false;
122 nic->pf_nacked = false;
124 nicvf_write_to_mbx(nic, mbx);
126 /* Wait for previous message to be acked, timeout 2sec */
127 while (!nic->pf_acked) {
128 if (nic->pf_nacked) {
129 netdev_err(nic->netdev,
130 "PF NACK to mbox msg 0x%02x from VF%d\n",
131 (mbx->msg.msg & 0xFF), nic->vf_id);
139 netdev_err(nic->netdev,
140 "PF didn't ACK to mbox msg 0x%02x from VF%d\n",
141 (mbx->msg.msg & 0xFF), nic->vf_id);
148 /* Checks if VF is able to comminicate with PF
149 * and also gets the VNIC number this VF is associated to.
151 static int nicvf_check_pf_ready(struct nicvf *nic)
153 union nic_mbx mbx = {};
155 mbx.msg.msg = NIC_MBOX_MSG_READY;
156 if (nicvf_send_msg_to_pf(nic, &mbx)) {
157 netdev_err(nic->netdev,
158 "PF didn't respond to READY msg\n");
165 static void nicvf_read_bgx_stats(struct nicvf *nic, struct bgx_stats_msg *bgx)
168 nic->bgx_stats.rx_stats[bgx->idx] = bgx->stats;
170 nic->bgx_stats.tx_stats[bgx->idx] = bgx->stats;
173 static void nicvf_handle_mbx_intr(struct nicvf *nic)
175 union nic_mbx mbx = {};
180 mbx_addr = NIC_VF_PF_MAILBOX_0_1;
181 mbx_data = (u64 *)&mbx;
183 for (i = 0; i < NIC_PF_VF_MAILBOX_SIZE; i++) {
184 *mbx_data = nicvf_reg_read(nic, mbx_addr);
186 mbx_addr += sizeof(u64);
189 netdev_dbg(nic->netdev, "Mbox message: msg: 0x%x\n", mbx.msg.msg);
190 switch (mbx.msg.msg) {
191 case NIC_MBOX_MSG_READY:
192 nic->pf_acked = true;
193 nic->vf_id = mbx.nic_cfg.vf_id & 0x7F;
194 nic->tns_mode = mbx.nic_cfg.tns_mode & 0x7F;
195 nic->node = mbx.nic_cfg.node_id;
196 if (!nic->set_mac_pending)
197 ether_addr_copy(nic->netdev->dev_addr,
198 mbx.nic_cfg.mac_addr);
199 nic->sqs_mode = mbx.nic_cfg.sqs_mode;
200 nic->loopback_supported = mbx.nic_cfg.loopback_supported;
201 nic->link_up = false;
205 case NIC_MBOX_MSG_ACK:
206 nic->pf_acked = true;
208 case NIC_MBOX_MSG_NACK:
209 nic->pf_nacked = true;
211 case NIC_MBOX_MSG_RSS_SIZE:
212 nic->rss_info.rss_size = mbx.rss_size.ind_tbl_size;
213 nic->pf_acked = true;
215 case NIC_MBOX_MSG_BGX_STATS:
216 nicvf_read_bgx_stats(nic, &mbx.bgx_stats);
217 nic->pf_acked = true;
219 case NIC_MBOX_MSG_BGX_LINK_CHANGE:
220 nic->pf_acked = true;
221 nic->link_up = mbx.link_status.link_up;
222 nic->duplex = mbx.link_status.duplex;
223 nic->speed = mbx.link_status.speed;
225 netdev_info(nic->netdev, "%s: Link is Up %d Mbps %s\n",
226 nic->netdev->name, nic->speed,
227 nic->duplex == DUPLEX_FULL ?
228 "Full duplex" : "Half duplex");
229 netif_carrier_on(nic->netdev);
230 netif_tx_start_all_queues(nic->netdev);
232 netdev_info(nic->netdev, "%s: Link is Down\n",
234 netif_carrier_off(nic->netdev);
235 netif_tx_stop_all_queues(nic->netdev);
238 case NIC_MBOX_MSG_ALLOC_SQS:
239 nic->sqs_count = mbx.sqs_alloc.qs_count;
240 nic->pf_acked = true;
242 case NIC_MBOX_MSG_SNICVF_PTR:
243 /* Primary VF: make note of secondary VF's pointer
244 * to be used while packet transmission.
246 nic->snicvf[mbx.nicvf.sqs_id] =
247 (struct nicvf *)mbx.nicvf.nicvf;
248 nic->pf_acked = true;
250 case NIC_MBOX_MSG_PNICVF_PTR:
251 /* Secondary VF/Qset: make note of primary VF's pointer
252 * to be used while packet reception, to handover packet
253 * to primary VF's netdev.
255 nic->pnicvf = (struct nicvf *)mbx.nicvf.nicvf;
256 nic->pf_acked = true;
259 netdev_err(nic->netdev,
260 "Invalid message from PF, msg 0x%x\n", mbx.msg.msg);
263 nicvf_clear_intr(nic, NICVF_INTR_MBOX, 0);
266 static int nicvf_hw_set_mac_addr(struct nicvf *nic, struct net_device *netdev)
268 union nic_mbx mbx = {};
270 mbx.mac.msg = NIC_MBOX_MSG_SET_MAC;
271 mbx.mac.vf_id = nic->vf_id;
272 ether_addr_copy(mbx.mac.mac_addr, netdev->dev_addr);
274 return nicvf_send_msg_to_pf(nic, &mbx);
277 static void nicvf_config_cpi(struct nicvf *nic)
279 union nic_mbx mbx = {};
281 mbx.cpi_cfg.msg = NIC_MBOX_MSG_CPI_CFG;
282 mbx.cpi_cfg.vf_id = nic->vf_id;
283 mbx.cpi_cfg.cpi_alg = nic->cpi_alg;
284 mbx.cpi_cfg.rq_cnt = nic->qs->rq_cnt;
286 nicvf_send_msg_to_pf(nic, &mbx);
289 static void nicvf_get_rss_size(struct nicvf *nic)
291 union nic_mbx mbx = {};
293 mbx.rss_size.msg = NIC_MBOX_MSG_RSS_SIZE;
294 mbx.rss_size.vf_id = nic->vf_id;
295 nicvf_send_msg_to_pf(nic, &mbx);
298 void nicvf_config_rss(struct nicvf *nic)
300 union nic_mbx mbx = {};
301 struct nicvf_rss_info *rss = &nic->rss_info;
302 int ind_tbl_len = rss->rss_size;
305 mbx.rss_cfg.vf_id = nic->vf_id;
306 mbx.rss_cfg.hash_bits = rss->hash_bits;
307 while (ind_tbl_len) {
308 mbx.rss_cfg.tbl_offset = nextq;
309 mbx.rss_cfg.tbl_len = min(ind_tbl_len,
310 RSS_IND_TBL_LEN_PER_MBX_MSG);
311 mbx.rss_cfg.msg = mbx.rss_cfg.tbl_offset ?
312 NIC_MBOX_MSG_RSS_CFG_CONT : NIC_MBOX_MSG_RSS_CFG;
314 for (i = 0; i < mbx.rss_cfg.tbl_len; i++)
315 mbx.rss_cfg.ind_tbl[i] = rss->ind_tbl[nextq++];
317 nicvf_send_msg_to_pf(nic, &mbx);
319 ind_tbl_len -= mbx.rss_cfg.tbl_len;
323 void nicvf_set_rss_key(struct nicvf *nic)
325 struct nicvf_rss_info *rss = &nic->rss_info;
326 u64 key_addr = NIC_VNIC_RSS_KEY_0_4;
329 for (idx = 0; idx < RSS_HASH_KEY_SIZE; idx++) {
330 nicvf_reg_write(nic, key_addr, rss->key[idx]);
331 key_addr += sizeof(u64);
335 static int nicvf_rss_init(struct nicvf *nic)
337 struct nicvf_rss_info *rss = &nic->rss_info;
340 nicvf_get_rss_size(nic);
342 if (cpi_alg != CPI_ALG_NONE) {
350 netdev_rss_key_fill(rss->key, RSS_HASH_KEY_SIZE * sizeof(u64));
351 nicvf_set_rss_key(nic);
353 rss->cfg = RSS_IP_HASH_ENA | RSS_TCP_HASH_ENA | RSS_UDP_HASH_ENA;
354 nicvf_reg_write(nic, NIC_VNIC_RSS_CFG, rss->cfg);
356 rss->hash_bits = ilog2(rounddown_pow_of_two(rss->rss_size));
358 for (idx = 0; idx < rss->rss_size; idx++)
359 rss->ind_tbl[idx] = ethtool_rxfh_indir_default(idx,
361 nicvf_config_rss(nic);
365 /* Request PF to allocate additional Qsets */
366 static void nicvf_request_sqs(struct nicvf *nic)
368 union nic_mbx mbx = {};
370 int sqs_count = nic->sqs_count;
371 int rx_queues = 0, tx_queues = 0;
373 /* Only primary VF should request */
374 if (nic->sqs_mode || !nic->sqs_count)
377 mbx.sqs_alloc.msg = NIC_MBOX_MSG_ALLOC_SQS;
378 mbx.sqs_alloc.vf_id = nic->vf_id;
379 mbx.sqs_alloc.qs_count = nic->sqs_count;
380 if (nicvf_send_msg_to_pf(nic, &mbx)) {
381 /* No response from PF */
386 /* Return if no Secondary Qsets available */
390 if (nic->rx_queues > MAX_RCV_QUEUES_PER_QS)
391 rx_queues = nic->rx_queues - MAX_RCV_QUEUES_PER_QS;
392 if (nic->tx_queues > MAX_SND_QUEUES_PER_QS)
393 tx_queues = nic->tx_queues - MAX_SND_QUEUES_PER_QS;
395 /* Set no of Rx/Tx queues in each of the SQsets */
396 for (sqs = 0; sqs < nic->sqs_count; sqs++) {
397 mbx.nicvf.msg = NIC_MBOX_MSG_SNICVF_PTR;
398 mbx.nicvf.vf_id = nic->vf_id;
399 mbx.nicvf.sqs_id = sqs;
400 nicvf_send_msg_to_pf(nic, &mbx);
402 nic->snicvf[sqs]->sqs_id = sqs;
403 if (rx_queues > MAX_RCV_QUEUES_PER_QS) {
404 nic->snicvf[sqs]->qs->rq_cnt = MAX_RCV_QUEUES_PER_QS;
405 rx_queues -= MAX_RCV_QUEUES_PER_QS;
407 nic->snicvf[sqs]->qs->rq_cnt = rx_queues;
411 if (tx_queues > MAX_SND_QUEUES_PER_QS) {
412 nic->snicvf[sqs]->qs->sq_cnt = MAX_SND_QUEUES_PER_QS;
413 tx_queues -= MAX_SND_QUEUES_PER_QS;
415 nic->snicvf[sqs]->qs->sq_cnt = tx_queues;
419 nic->snicvf[sqs]->qs->cq_cnt =
420 max(nic->snicvf[sqs]->qs->rq_cnt, nic->snicvf[sqs]->qs->sq_cnt);
422 /* Initialize secondary Qset's queues and its interrupts */
423 nicvf_open(nic->snicvf[sqs]->netdev);
426 /* Update stack with actual Rx/Tx queue count allocated */
427 if (sqs_count != nic->sqs_count)
428 nicvf_set_real_num_queues(nic->netdev,
429 nic->tx_queues, nic->rx_queues);
432 /* Send this Qset's nicvf pointer to PF.
433 * PF inturn sends primary VF's nicvf struct to secondary Qsets/VFs
434 * so that packets received by these Qsets can use primary VF's netdev
436 static void nicvf_send_vf_struct(struct nicvf *nic)
438 union nic_mbx mbx = {};
440 mbx.nicvf.msg = NIC_MBOX_MSG_NICVF_PTR;
441 mbx.nicvf.sqs_mode = nic->sqs_mode;
442 mbx.nicvf.nicvf = (u64)nic;
443 nicvf_send_msg_to_pf(nic, &mbx);
446 static void nicvf_get_primary_vf_struct(struct nicvf *nic)
448 union nic_mbx mbx = {};
450 mbx.nicvf.msg = NIC_MBOX_MSG_PNICVF_PTR;
451 nicvf_send_msg_to_pf(nic, &mbx);
454 int nicvf_set_real_num_queues(struct net_device *netdev,
455 int tx_queues, int rx_queues)
459 err = netif_set_real_num_tx_queues(netdev, tx_queues);
462 "Failed to set no of Tx queues: %d\n", tx_queues);
466 err = netif_set_real_num_rx_queues(netdev, rx_queues);
469 "Failed to set no of Rx queues: %d\n", rx_queues);
473 static int nicvf_init_resources(struct nicvf *nic)
478 nicvf_qset_config(nic, true);
480 /* Initialize queues and HW for data transfer */
481 err = nicvf_config_data_transfer(nic, true);
483 netdev_err(nic->netdev,
484 "Failed to alloc/config VF's QSet resources\n");
491 static void nicvf_snd_pkt_handler(struct net_device *netdev,
492 struct cqe_send_t *cqe_tx,
493 int cqe_type, int budget,
494 unsigned int *tx_pkts, unsigned int *tx_bytes)
496 struct sk_buff *skb = NULL;
497 struct nicvf *nic = netdev_priv(netdev);
498 struct snd_queue *sq;
499 struct sq_hdr_subdesc *hdr;
500 struct sq_hdr_subdesc *tso_sqe;
502 sq = &nic->qs->sq[cqe_tx->sq_idx];
504 hdr = (struct sq_hdr_subdesc *)GET_SQ_DESC(sq, cqe_tx->sqe_ptr);
505 if (hdr->subdesc_type != SQ_DESC_TYPE_HEADER)
508 netdev_dbg(nic->netdev,
509 "%s Qset #%d SQ #%d SQ ptr #%d subdesc count %d\n",
510 __func__, cqe_tx->sq_qs, cqe_tx->sq_idx,
511 cqe_tx->sqe_ptr, hdr->subdesc_cnt);
513 nicvf_check_cqe_tx_errs(nic, cqe_tx);
514 skb = (struct sk_buff *)sq->skbuff[cqe_tx->sqe_ptr];
516 /* Check for dummy descriptor used for HW TSO offload on 88xx */
517 if (hdr->dont_send) {
518 /* Get actual TSO descriptors and free them */
520 (struct sq_hdr_subdesc *)GET_SQ_DESC(sq, hdr->rsvd2);
521 nicvf_put_sq_desc(sq, tso_sqe->subdesc_cnt + 1);
523 nicvf_put_sq_desc(sq, hdr->subdesc_cnt + 1);
526 *tx_bytes += skb->len;
527 napi_consume_skb(skb, budget);
528 sq->skbuff[cqe_tx->sqe_ptr] = (u64)NULL;
530 /* In case of SW TSO on 88xx, only last segment will have
531 * a SKB attached, so just free SQEs here.
534 nicvf_put_sq_desc(sq, hdr->subdesc_cnt + 1);
538 static inline void nicvf_set_rxhash(struct net_device *netdev,
539 struct cqe_rx_t *cqe_rx,
545 if (!(netdev->features & NETIF_F_RXHASH))
548 switch (cqe_rx->rss_alg) {
551 hash_type = PKT_HASH_TYPE_L4;
552 hash = cqe_rx->rss_tag;
555 hash_type = PKT_HASH_TYPE_L3;
556 hash = cqe_rx->rss_tag;
559 hash_type = PKT_HASH_TYPE_NONE;
563 skb_set_hash(skb, hash, hash_type);
566 static void nicvf_rcv_pkt_handler(struct net_device *netdev,
567 struct napi_struct *napi,
568 struct cqe_rx_t *cqe_rx)
571 struct nicvf *nic = netdev_priv(netdev);
575 rq_idx = nicvf_netdev_qidx(nic, cqe_rx->rq_idx);
578 /* Use primary VF's 'nicvf' struct */
580 netdev = nic->netdev;
583 /* Check for errors */
584 err = nicvf_check_cqe_rx_errs(nic, cqe_rx);
585 if (err && !cqe_rx->rb_cnt)
588 skb = nicvf_get_rcv_skb(nic, cqe_rx);
590 netdev_dbg(nic->netdev, "Packet not received\n");
594 if (netif_msg_pktdata(nic)) {
595 netdev_info(nic->netdev, "%s: skb 0x%p, len=%d\n", netdev->name,
597 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 1,
598 skb->data, skb->len, true);
601 /* If error packet, drop it here */
603 dev_kfree_skb_any(skb);
607 nicvf_set_rxhash(netdev, cqe_rx, skb);
609 skb_record_rx_queue(skb, rq_idx);
610 if (netdev->hw_features & NETIF_F_RXCSUM) {
611 /* HW by default verifies TCP/UDP/SCTP checksums */
612 skb->ip_summed = CHECKSUM_UNNECESSARY;
614 skb_checksum_none_assert(skb);
617 skb->protocol = eth_type_trans(skb, netdev);
619 /* Check for stripped VLAN */
620 if (cqe_rx->vlan_found && cqe_rx->vlan_stripped)
621 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
622 ntohs((__force __be16)cqe_rx->vlan_tci));
624 if (napi && (netdev->features & NETIF_F_GRO))
625 napi_gro_receive(napi, skb);
627 netif_receive_skb(skb);
630 static int nicvf_cq_intr_handler(struct net_device *netdev, u8 cq_idx,
631 struct napi_struct *napi, int budget)
633 int processed_cqe, work_done = 0, tx_done = 0;
634 int cqe_count, cqe_head;
635 struct nicvf *nic = netdev_priv(netdev);
636 struct queue_set *qs = nic->qs;
637 struct cmp_queue *cq = &qs->cq[cq_idx];
638 struct cqe_rx_t *cq_desc;
639 struct netdev_queue *txq;
640 unsigned int tx_pkts = 0, tx_bytes = 0;
642 spin_lock_bh(&cq->lock);
645 /* Get no of valid CQ entries to process */
646 cqe_count = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_STATUS, cq_idx);
647 cqe_count &= CQ_CQE_COUNT;
651 /* Get head of the valid CQ entries */
652 cqe_head = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_HEAD, cq_idx) >> 9;
655 netdev_dbg(nic->netdev, "%s CQ%d cqe_count %d cqe_head %d\n",
656 __func__, cq_idx, cqe_count, cqe_head);
657 while (processed_cqe < cqe_count) {
658 /* Get the CQ descriptor */
659 cq_desc = (struct cqe_rx_t *)GET_CQ_DESC(cq, cqe_head);
661 cqe_head &= (cq->dmem.q_len - 1);
662 /* Initiate prefetch for next descriptor */
663 prefetch((struct cqe_rx_t *)GET_CQ_DESC(cq, cqe_head));
665 if ((work_done >= budget) && napi &&
666 (cq_desc->cqe_type != CQE_TYPE_SEND)) {
670 netdev_dbg(nic->netdev, "CQ%d cq_desc->cqe_type %d\n",
671 cq_idx, cq_desc->cqe_type);
672 switch (cq_desc->cqe_type) {
674 nicvf_rcv_pkt_handler(netdev, napi, cq_desc);
678 nicvf_snd_pkt_handler(netdev,
679 (void *)cq_desc, CQE_TYPE_SEND,
680 budget, &tx_pkts, &tx_bytes);
683 case CQE_TYPE_INVALID:
684 case CQE_TYPE_RX_SPLIT:
685 case CQE_TYPE_RX_TCP:
686 case CQE_TYPE_SEND_PTP:
692 netdev_dbg(nic->netdev,
693 "%s CQ%d processed_cqe %d work_done %d budget %d\n",
694 __func__, cq_idx, processed_cqe, work_done, budget);
696 /* Ring doorbell to inform H/W to reuse processed CQEs */
697 nicvf_queue_reg_write(nic, NIC_QSET_CQ_0_7_DOOR,
698 cq_idx, processed_cqe);
700 if ((work_done < budget) && napi)
704 /* Wakeup TXQ if its stopped earlier due to SQ full */
706 netdev = nic->pnicvf->netdev;
707 txq = netdev_get_tx_queue(netdev,
708 nicvf_netdev_qidx(nic, cq_idx));
710 netdev_tx_completed_queue(txq, tx_pkts, tx_bytes);
713 if (netif_tx_queue_stopped(txq) && netif_carrier_ok(netdev)) {
714 netif_tx_start_queue(txq);
715 this_cpu_inc(nic->drv_stats->txq_wake);
716 if (netif_msg_tx_err(nic))
718 "%s: Transmit queue wakeup SQ%d\n",
719 netdev->name, cq_idx);
723 spin_unlock_bh(&cq->lock);
727 static int nicvf_poll(struct napi_struct *napi, int budget)
731 struct net_device *netdev = napi->dev;
732 struct nicvf *nic = netdev_priv(netdev);
733 struct nicvf_cq_poll *cq;
735 cq = container_of(napi, struct nicvf_cq_poll, napi);
736 work_done = nicvf_cq_intr_handler(netdev, cq->cq_idx, napi, budget);
738 if (work_done < budget) {
739 /* Slow packet rate, exit polling */
741 /* Re-enable interrupts */
742 cq_head = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_HEAD,
744 nicvf_clear_intr(nic, NICVF_INTR_CQ, cq->cq_idx);
745 nicvf_queue_reg_write(nic, NIC_QSET_CQ_0_7_HEAD,
746 cq->cq_idx, cq_head);
747 nicvf_enable_intr(nic, NICVF_INTR_CQ, cq->cq_idx);
752 /* Qset error interrupt handler
754 * As of now only CQ errors are handled
756 static void nicvf_handle_qs_err(unsigned long data)
758 struct nicvf *nic = (struct nicvf *)data;
759 struct queue_set *qs = nic->qs;
763 netif_tx_disable(nic->netdev);
765 /* Check if it is CQ err */
766 for (qidx = 0; qidx < qs->cq_cnt; qidx++) {
767 status = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_STATUS,
769 if (!(status & CQ_ERR_MASK))
771 /* Process already queued CQEs and reconfig CQ */
772 nicvf_disable_intr(nic, NICVF_INTR_CQ, qidx);
773 nicvf_sq_disable(nic, qidx);
774 nicvf_cq_intr_handler(nic->netdev, qidx, NULL, 0);
775 nicvf_cmp_queue_config(nic, qs, qidx, true);
776 nicvf_sq_free_used_descs(nic->netdev, &qs->sq[qidx], qidx);
777 nicvf_sq_enable(nic, &qs->sq[qidx], qidx);
779 nicvf_enable_intr(nic, NICVF_INTR_CQ, qidx);
782 netif_tx_start_all_queues(nic->netdev);
783 /* Re-enable Qset error interrupt */
784 nicvf_enable_intr(nic, NICVF_INTR_QS_ERR, 0);
787 static void nicvf_dump_intr_status(struct nicvf *nic)
789 if (netif_msg_intr(nic))
790 netdev_info(nic->netdev, "%s: interrupt status 0x%llx\n",
791 nic->netdev->name, nicvf_reg_read(nic, NIC_VF_INT));
794 static irqreturn_t nicvf_misc_intr_handler(int irq, void *nicvf_irq)
796 struct nicvf *nic = (struct nicvf *)nicvf_irq;
799 nicvf_dump_intr_status(nic);
801 intr = nicvf_reg_read(nic, NIC_VF_INT);
802 /* Check for spurious interrupt */
803 if (!(intr & NICVF_INTR_MBOX_MASK))
806 nicvf_handle_mbx_intr(nic);
811 static irqreturn_t nicvf_intr_handler(int irq, void *cq_irq)
813 struct nicvf_cq_poll *cq_poll = (struct nicvf_cq_poll *)cq_irq;
814 struct nicvf *nic = cq_poll->nicvf;
815 int qidx = cq_poll->cq_idx;
817 nicvf_dump_intr_status(nic);
819 /* Disable interrupts */
820 nicvf_disable_intr(nic, NICVF_INTR_CQ, qidx);
823 napi_schedule_irqoff(&cq_poll->napi);
825 /* Clear interrupt */
826 nicvf_clear_intr(nic, NICVF_INTR_CQ, qidx);
831 static irqreturn_t nicvf_rbdr_intr_handler(int irq, void *nicvf_irq)
833 struct nicvf *nic = (struct nicvf *)nicvf_irq;
837 nicvf_dump_intr_status(nic);
839 /* Disable RBDR interrupt and schedule softirq */
840 for (qidx = 0; qidx < nic->qs->rbdr_cnt; qidx++) {
841 if (!nicvf_is_intr_enabled(nic, NICVF_INTR_RBDR, qidx))
843 nicvf_disable_intr(nic, NICVF_INTR_RBDR, qidx);
844 tasklet_hi_schedule(&nic->rbdr_task);
845 /* Clear interrupt */
846 nicvf_clear_intr(nic, NICVF_INTR_RBDR, qidx);
852 static irqreturn_t nicvf_qs_err_intr_handler(int irq, void *nicvf_irq)
854 struct nicvf *nic = (struct nicvf *)nicvf_irq;
856 nicvf_dump_intr_status(nic);
858 /* Disable Qset err interrupt and schedule softirq */
859 nicvf_disable_intr(nic, NICVF_INTR_QS_ERR, 0);
860 tasklet_hi_schedule(&nic->qs_err_task);
861 nicvf_clear_intr(nic, NICVF_INTR_QS_ERR, 0);
866 static int nicvf_enable_msix(struct nicvf *nic)
870 nic->num_vec = NIC_VF_MSIX_VECTORS;
872 for (vec = 0; vec < nic->num_vec; vec++)
873 nic->msix_entries[vec].entry = vec;
875 ret = pci_enable_msix(nic->pdev, nic->msix_entries, nic->num_vec);
877 netdev_err(nic->netdev,
878 "Req for #%d msix vectors failed\n", nic->num_vec);
881 nic->msix_enabled = 1;
885 static void nicvf_disable_msix(struct nicvf *nic)
887 if (nic->msix_enabled) {
888 pci_disable_msix(nic->pdev);
889 nic->msix_enabled = 0;
894 static void nicvf_set_irq_affinity(struct nicvf *nic)
899 for (vec = 0; vec < nic->num_vec; vec++) {
900 if (!nic->irq_allocated[vec])
903 if (!zalloc_cpumask_var(&nic->affinity_mask[vec], GFP_KERNEL))
906 if (vec < NICVF_INTR_ID_SQ)
907 /* Leave CPU0 for RBDR and other interrupts */
908 cpu = nicvf_netdev_qidx(nic, vec) + 1;
912 cpumask_set_cpu(cpumask_local_spread(cpu, nic->node),
913 nic->affinity_mask[vec]);
914 irqnum = nic->msix_entries[vec].vector;
915 irq_set_affinity_hint(irqnum, nic->affinity_mask[vec]);
919 static int nicvf_register_interrupts(struct nicvf *nic)
925 sprintf(nic->irq_name[irq], "%s-rxtx-%d",
926 nic->pnicvf->netdev->name,
927 nicvf_netdev_qidx(nic, irq));
930 sprintf(nic->irq_name[irq], "%s-sq-%d",
931 nic->pnicvf->netdev->name,
932 nicvf_netdev_qidx(nic, irq - NICVF_INTR_ID_SQ));
934 for_each_rbdr_irq(irq)
935 sprintf(nic->irq_name[irq], "%s-rbdr-%d",
936 nic->pnicvf->netdev->name,
937 nic->sqs_mode ? (nic->sqs_id + 1) : 0);
939 /* Register CQ interrupts */
940 for (irq = 0; irq < nic->qs->cq_cnt; irq++) {
941 vector = nic->msix_entries[irq].vector;
942 ret = request_irq(vector, nicvf_intr_handler,
943 0, nic->irq_name[irq], nic->napi[irq]);
946 nic->irq_allocated[irq] = true;
949 /* Register RBDR interrupt */
950 for (irq = NICVF_INTR_ID_RBDR;
951 irq < (NICVF_INTR_ID_RBDR + nic->qs->rbdr_cnt); irq++) {
952 vector = nic->msix_entries[irq].vector;
953 ret = request_irq(vector, nicvf_rbdr_intr_handler,
954 0, nic->irq_name[irq], nic);
957 nic->irq_allocated[irq] = true;
960 /* Register QS error interrupt */
961 sprintf(nic->irq_name[NICVF_INTR_ID_QS_ERR], "%s-qset-err-%d",
962 nic->pnicvf->netdev->name,
963 nic->sqs_mode ? (nic->sqs_id + 1) : 0);
964 irq = NICVF_INTR_ID_QS_ERR;
965 ret = request_irq(nic->msix_entries[irq].vector,
966 nicvf_qs_err_intr_handler,
967 0, nic->irq_name[irq], nic);
971 nic->irq_allocated[irq] = true;
973 /* Set IRQ affinities */
974 nicvf_set_irq_affinity(nic);
978 netdev_err(nic->netdev, "request_irq failed, vector %d\n", irq);
983 static void nicvf_unregister_interrupts(struct nicvf *nic)
987 /* Free registered interrupts */
988 for (irq = 0; irq < nic->num_vec; irq++) {
989 if (!nic->irq_allocated[irq])
992 irq_set_affinity_hint(nic->msix_entries[irq].vector, NULL);
993 free_cpumask_var(nic->affinity_mask[irq]);
995 if (irq < NICVF_INTR_ID_SQ)
996 free_irq(nic->msix_entries[irq].vector, nic->napi[irq]);
998 free_irq(nic->msix_entries[irq].vector, nic);
1000 nic->irq_allocated[irq] = false;
1004 nicvf_disable_msix(nic);
1007 /* Initialize MSIX vectors and register MISC interrupt.
1008 * Send READY message to PF to check if its alive
1010 static int nicvf_register_misc_interrupt(struct nicvf *nic)
1013 int irq = NICVF_INTR_ID_MISC;
1015 /* Return if mailbox interrupt is already registered */
1016 if (nic->msix_enabled)
1020 if (!nicvf_enable_msix(nic))
1023 sprintf(nic->irq_name[irq], "%s Mbox", "NICVF");
1024 /* Register Misc interrupt */
1025 ret = request_irq(nic->msix_entries[irq].vector,
1026 nicvf_misc_intr_handler, 0, nic->irq_name[irq], nic);
1030 nic->irq_allocated[irq] = true;
1032 /* Enable mailbox interrupt */
1033 nicvf_enable_intr(nic, NICVF_INTR_MBOX, 0);
1035 /* Check if VF is able to communicate with PF */
1036 if (!nicvf_check_pf_ready(nic)) {
1037 nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0);
1038 nicvf_unregister_interrupts(nic);
1045 static netdev_tx_t nicvf_xmit(struct sk_buff *skb, struct net_device *netdev)
1047 struct nicvf *nic = netdev_priv(netdev);
1048 int qid = skb_get_queue_mapping(skb);
1049 struct netdev_queue *txq = netdev_get_tx_queue(netdev, qid);
1051 /* Check for minimum packet length */
1052 if (skb->len <= ETH_HLEN) {
1054 return NETDEV_TX_OK;
1057 if (!netif_tx_queue_stopped(txq) && !nicvf_sq_append_skb(nic, skb)) {
1058 netif_tx_stop_queue(txq);
1059 this_cpu_inc(nic->drv_stats->txq_stop);
1060 if (netif_msg_tx_err(nic))
1062 "%s: Transmit ring full, stopping SQ%d\n",
1064 return NETDEV_TX_BUSY;
1067 return NETDEV_TX_OK;
1070 static inline void nicvf_free_cq_poll(struct nicvf *nic)
1072 struct nicvf_cq_poll *cq_poll;
1075 for (qidx = 0; qidx < nic->qs->cq_cnt; qidx++) {
1076 cq_poll = nic->napi[qidx];
1079 nic->napi[qidx] = NULL;
1084 int nicvf_stop(struct net_device *netdev)
1087 struct nicvf *nic = netdev_priv(netdev);
1088 struct queue_set *qs = nic->qs;
1089 struct nicvf_cq_poll *cq_poll = NULL;
1090 union nic_mbx mbx = {};
1092 mbx.msg.msg = NIC_MBOX_MSG_SHUTDOWN;
1093 nicvf_send_msg_to_pf(nic, &mbx);
1095 netif_carrier_off(netdev);
1096 netif_tx_stop_all_queues(nic->netdev);
1097 nic->link_up = false;
1099 /* Teardown secondary qsets first */
1100 if (!nic->sqs_mode) {
1101 for (qidx = 0; qidx < nic->sqs_count; qidx++) {
1102 if (!nic->snicvf[qidx])
1104 nicvf_stop(nic->snicvf[qidx]->netdev);
1105 nic->snicvf[qidx] = NULL;
1109 /* Disable RBDR & QS error interrupts */
1110 for (qidx = 0; qidx < qs->rbdr_cnt; qidx++) {
1111 nicvf_disable_intr(nic, NICVF_INTR_RBDR, qidx);
1112 nicvf_clear_intr(nic, NICVF_INTR_RBDR, qidx);
1114 nicvf_disable_intr(nic, NICVF_INTR_QS_ERR, 0);
1115 nicvf_clear_intr(nic, NICVF_INTR_QS_ERR, 0);
1117 /* Wait for pending IRQ handlers to finish */
1118 for (irq = 0; irq < nic->num_vec; irq++)
1119 synchronize_irq(nic->msix_entries[irq].vector);
1121 tasklet_kill(&nic->rbdr_task);
1122 tasklet_kill(&nic->qs_err_task);
1123 if (nic->rb_work_scheduled)
1124 cancel_delayed_work_sync(&nic->rbdr_work);
1126 for (qidx = 0; qidx < nic->qs->cq_cnt; qidx++) {
1127 cq_poll = nic->napi[qidx];
1130 napi_synchronize(&cq_poll->napi);
1131 /* CQ intr is enabled while napi_complete,
1134 nicvf_disable_intr(nic, NICVF_INTR_CQ, qidx);
1135 nicvf_clear_intr(nic, NICVF_INTR_CQ, qidx);
1136 napi_disable(&cq_poll->napi);
1137 netif_napi_del(&cq_poll->napi);
1140 netif_tx_disable(netdev);
1142 for (qidx = 0; qidx < netdev->num_tx_queues; qidx++)
1143 netdev_tx_reset_queue(netdev_get_tx_queue(netdev, qidx));
1145 /* Free resources */
1146 nicvf_config_data_transfer(nic, false);
1148 /* Disable HW Qset */
1149 nicvf_qset_config(nic, false);
1151 /* disable mailbox interrupt */
1152 nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0);
1154 nicvf_unregister_interrupts(nic);
1156 nicvf_free_cq_poll(nic);
1158 /* Clear multiqset info */
1164 static int nicvf_update_hw_max_frs(struct nicvf *nic, int mtu)
1166 union nic_mbx mbx = {};
1168 mbx.frs.msg = NIC_MBOX_MSG_SET_MAX_FRS;
1169 mbx.frs.max_frs = mtu;
1170 mbx.frs.vf_id = nic->vf_id;
1172 return nicvf_send_msg_to_pf(nic, &mbx);
1175 int nicvf_open(struct net_device *netdev)
1178 struct nicvf *nic = netdev_priv(netdev);
1179 struct queue_set *qs = nic->qs;
1180 struct nicvf_cq_poll *cq_poll = NULL;
1181 union nic_mbx mbx = {};
1183 netif_carrier_off(netdev);
1185 err = nicvf_register_misc_interrupt(nic);
1189 /* Register NAPI handler for processing CQEs */
1190 for (qidx = 0; qidx < qs->cq_cnt; qidx++) {
1191 cq_poll = kzalloc(sizeof(*cq_poll), GFP_KERNEL);
1196 cq_poll->cq_idx = qidx;
1197 cq_poll->nicvf = nic;
1198 netif_napi_add(netdev, &cq_poll->napi, nicvf_poll,
1200 napi_enable(&cq_poll->napi);
1201 nic->napi[qidx] = cq_poll;
1204 /* Check if we got MAC address from PF or else generate a radom MAC */
1205 if (!nic->sqs_mode && is_zero_ether_addr(netdev->dev_addr)) {
1206 eth_hw_addr_random(netdev);
1207 nicvf_hw_set_mac_addr(nic, netdev);
1210 if (nic->set_mac_pending) {
1211 nic->set_mac_pending = false;
1212 nicvf_hw_set_mac_addr(nic, netdev);
1215 /* Init tasklet for handling Qset err interrupt */
1216 tasklet_init(&nic->qs_err_task, nicvf_handle_qs_err,
1217 (unsigned long)nic);
1219 /* Init RBDR tasklet which will refill RBDR */
1220 tasklet_init(&nic->rbdr_task, nicvf_rbdr_task,
1221 (unsigned long)nic);
1222 INIT_DELAYED_WORK(&nic->rbdr_work, nicvf_rbdr_work);
1224 /* Configure CPI alorithm */
1225 nic->cpi_alg = cpi_alg;
1227 nicvf_config_cpi(nic);
1229 nicvf_request_sqs(nic);
1231 nicvf_get_primary_vf_struct(nic);
1233 /* Configure receive side scaling and MTU */
1234 if (!nic->sqs_mode) {
1235 nicvf_rss_init(nic);
1236 if (nicvf_update_hw_max_frs(nic, netdev->mtu))
1239 /* Clear percpu stats */
1240 for_each_possible_cpu(cpu)
1241 memset(per_cpu_ptr(nic->drv_stats, cpu), 0,
1242 sizeof(struct nicvf_drv_stats));
1245 err = nicvf_register_interrupts(nic);
1249 /* Initialize the queues */
1250 err = nicvf_init_resources(nic);
1254 /* Make sure queue initialization is written */
1257 nicvf_reg_write(nic, NIC_VF_INT, -1);
1258 /* Enable Qset err interrupt */
1259 nicvf_enable_intr(nic, NICVF_INTR_QS_ERR, 0);
1261 /* Enable completion queue interrupt */
1262 for (qidx = 0; qidx < qs->cq_cnt; qidx++)
1263 nicvf_enable_intr(nic, NICVF_INTR_CQ, qidx);
1265 /* Enable RBDR threshold interrupt */
1266 for (qidx = 0; qidx < qs->rbdr_cnt; qidx++)
1267 nicvf_enable_intr(nic, NICVF_INTR_RBDR, qidx);
1269 /* Send VF config done msg to PF */
1270 mbx.msg.msg = NIC_MBOX_MSG_CFG_DONE;
1271 nicvf_write_to_mbx(nic, &mbx);
1275 nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0);
1276 nicvf_unregister_interrupts(nic);
1277 tasklet_kill(&nic->qs_err_task);
1278 tasklet_kill(&nic->rbdr_task);
1280 for (qidx = 0; qidx < qs->cq_cnt; qidx++) {
1281 cq_poll = nic->napi[qidx];
1284 napi_disable(&cq_poll->napi);
1285 netif_napi_del(&cq_poll->napi);
1287 nicvf_free_cq_poll(nic);
1291 static int nicvf_change_mtu(struct net_device *netdev, int new_mtu)
1293 struct nicvf *nic = netdev_priv(netdev);
1295 if (new_mtu > NIC_HW_MAX_FRS)
1298 if (new_mtu < NIC_HW_MIN_FRS)
1301 netdev->mtu = new_mtu;
1303 if (!netif_running(netdev))
1306 if (nicvf_update_hw_max_frs(nic, new_mtu))
1312 static int nicvf_set_mac_address(struct net_device *netdev, void *p)
1314 struct sockaddr *addr = p;
1315 struct nicvf *nic = netdev_priv(netdev);
1317 if (!is_valid_ether_addr(addr->sa_data))
1318 return -EADDRNOTAVAIL;
1320 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1322 if (nic->msix_enabled) {
1323 if (nicvf_hw_set_mac_addr(nic, netdev))
1326 nic->set_mac_pending = true;
1332 void nicvf_update_lmac_stats(struct nicvf *nic)
1335 union nic_mbx mbx = {};
1337 if (!netif_running(nic->netdev))
1340 mbx.bgx_stats.msg = NIC_MBOX_MSG_BGX_STATS;
1341 mbx.bgx_stats.vf_id = nic->vf_id;
1343 mbx.bgx_stats.rx = 1;
1344 while (stat < BGX_RX_STATS_COUNT) {
1345 mbx.bgx_stats.idx = stat;
1346 if (nicvf_send_msg_to_pf(nic, &mbx))
1354 mbx.bgx_stats.rx = 0;
1355 while (stat < BGX_TX_STATS_COUNT) {
1356 mbx.bgx_stats.idx = stat;
1357 if (nicvf_send_msg_to_pf(nic, &mbx))
1363 void nicvf_update_stats(struct nicvf *nic)
1367 struct nicvf_hw_stats *stats = &nic->hw_stats;
1368 struct nicvf_drv_stats *drv_stats;
1369 struct queue_set *qs = nic->qs;
1371 #define GET_RX_STATS(reg) \
1372 nicvf_reg_read(nic, NIC_VNIC_RX_STAT_0_13 | (reg << 3))
1373 #define GET_TX_STATS(reg) \
1374 nicvf_reg_read(nic, NIC_VNIC_TX_STAT_0_4 | (reg << 3))
1376 stats->rx_bytes = GET_RX_STATS(RX_OCTS);
1377 stats->rx_ucast_frames = GET_RX_STATS(RX_UCAST);
1378 stats->rx_bcast_frames = GET_RX_STATS(RX_BCAST);
1379 stats->rx_mcast_frames = GET_RX_STATS(RX_MCAST);
1380 stats->rx_fcs_errors = GET_RX_STATS(RX_FCS);
1381 stats->rx_l2_errors = GET_RX_STATS(RX_L2ERR);
1382 stats->rx_drop_red = GET_RX_STATS(RX_RED);
1383 stats->rx_drop_red_bytes = GET_RX_STATS(RX_RED_OCTS);
1384 stats->rx_drop_overrun = GET_RX_STATS(RX_ORUN);
1385 stats->rx_drop_overrun_bytes = GET_RX_STATS(RX_ORUN_OCTS);
1386 stats->rx_drop_bcast = GET_RX_STATS(RX_DRP_BCAST);
1387 stats->rx_drop_mcast = GET_RX_STATS(RX_DRP_MCAST);
1388 stats->rx_drop_l3_bcast = GET_RX_STATS(RX_DRP_L3BCAST);
1389 stats->rx_drop_l3_mcast = GET_RX_STATS(RX_DRP_L3MCAST);
1391 stats->tx_bytes = GET_TX_STATS(TX_OCTS);
1392 stats->tx_ucast_frames = GET_TX_STATS(TX_UCAST);
1393 stats->tx_bcast_frames = GET_TX_STATS(TX_BCAST);
1394 stats->tx_mcast_frames = GET_TX_STATS(TX_MCAST);
1395 stats->tx_drops = GET_TX_STATS(TX_DROP);
1397 /* On T88 pass 2.0, the dummy SQE added for TSO notification
1398 * via CQE has 'dont_send' set. Hence HW drops the pkt pointed
1399 * pointed by dummy SQE and results in tx_drops counter being
1400 * incremented. Subtracting it from tx_tso counter will give
1401 * exact tx_drops counter.
1403 if (nic->t88 && nic->hw_tso) {
1404 for_each_possible_cpu(cpu) {
1405 drv_stats = per_cpu_ptr(nic->drv_stats, cpu);
1406 tmp_stats += drv_stats->tx_tso;
1408 stats->tx_drops = tmp_stats - stats->tx_drops;
1410 stats->tx_frames = stats->tx_ucast_frames +
1411 stats->tx_bcast_frames +
1412 stats->tx_mcast_frames;
1413 stats->rx_frames = stats->rx_ucast_frames +
1414 stats->rx_bcast_frames +
1415 stats->rx_mcast_frames;
1416 stats->rx_drops = stats->rx_drop_red +
1417 stats->rx_drop_overrun;
1419 /* Update RQ and SQ stats */
1420 for (qidx = 0; qidx < qs->rq_cnt; qidx++)
1421 nicvf_update_rq_stats(nic, qidx);
1422 for (qidx = 0; qidx < qs->sq_cnt; qidx++)
1423 nicvf_update_sq_stats(nic, qidx);
1426 static struct rtnl_link_stats64 *nicvf_get_stats64(struct net_device *netdev,
1427 struct rtnl_link_stats64 *stats)
1429 struct nicvf *nic = netdev_priv(netdev);
1430 struct nicvf_hw_stats *hw_stats = &nic->hw_stats;
1432 nicvf_update_stats(nic);
1434 stats->rx_bytes = hw_stats->rx_bytes;
1435 stats->rx_packets = hw_stats->rx_frames;
1436 stats->rx_dropped = hw_stats->rx_drops;
1437 stats->multicast = hw_stats->rx_mcast_frames;
1439 stats->tx_bytes = hw_stats->tx_bytes;
1440 stats->tx_packets = hw_stats->tx_frames;
1441 stats->tx_dropped = hw_stats->tx_drops;
1446 static void nicvf_tx_timeout(struct net_device *dev)
1448 struct nicvf *nic = netdev_priv(dev);
1450 if (netif_msg_tx_err(nic))
1451 netdev_warn(dev, "%s: Transmit timed out, resetting\n",
1454 this_cpu_inc(nic->drv_stats->tx_timeout);
1455 schedule_work(&nic->reset_task);
1458 static void nicvf_reset_task(struct work_struct *work)
1462 nic = container_of(work, struct nicvf, reset_task);
1464 if (!netif_running(nic->netdev))
1467 nicvf_stop(nic->netdev);
1468 nicvf_open(nic->netdev);
1469 netif_trans_update(nic->netdev);
1472 static int nicvf_config_loopback(struct nicvf *nic,
1473 netdev_features_t features)
1475 union nic_mbx mbx = {};
1477 mbx.lbk.msg = NIC_MBOX_MSG_LOOPBACK;
1478 mbx.lbk.vf_id = nic->vf_id;
1479 mbx.lbk.enable = (features & NETIF_F_LOOPBACK) != 0;
1481 return nicvf_send_msg_to_pf(nic, &mbx);
1484 static netdev_features_t nicvf_fix_features(struct net_device *netdev,
1485 netdev_features_t features)
1487 struct nicvf *nic = netdev_priv(netdev);
1489 if ((features & NETIF_F_LOOPBACK) &&
1490 netif_running(netdev) && !nic->loopback_supported)
1491 features &= ~NETIF_F_LOOPBACK;
1496 static int nicvf_set_features(struct net_device *netdev,
1497 netdev_features_t features)
1499 struct nicvf *nic = netdev_priv(netdev);
1500 netdev_features_t changed = features ^ netdev->features;
1502 if (changed & NETIF_F_HW_VLAN_CTAG_RX)
1503 nicvf_config_vlan_stripping(nic, features);
1505 if ((changed & NETIF_F_LOOPBACK) && netif_running(netdev))
1506 return nicvf_config_loopback(nic, features);
1511 static const struct net_device_ops nicvf_netdev_ops = {
1512 .ndo_open = nicvf_open,
1513 .ndo_stop = nicvf_stop,
1514 .ndo_start_xmit = nicvf_xmit,
1515 .ndo_change_mtu = nicvf_change_mtu,
1516 .ndo_set_mac_address = nicvf_set_mac_address,
1517 .ndo_get_stats64 = nicvf_get_stats64,
1518 .ndo_tx_timeout = nicvf_tx_timeout,
1519 .ndo_fix_features = nicvf_fix_features,
1520 .ndo_set_features = nicvf_set_features,
1523 static int nicvf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1525 struct device *dev = &pdev->dev;
1526 struct net_device *netdev;
1531 err = pci_enable_device(pdev);
1533 dev_err(dev, "Failed to enable PCI device\n");
1537 err = pci_request_regions(pdev, DRV_NAME);
1539 dev_err(dev, "PCI request regions failed 0x%x\n", err);
1540 goto err_disable_device;
1543 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(48));
1545 dev_err(dev, "Unable to get usable DMA configuration\n");
1546 goto err_release_regions;
1549 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(48));
1551 dev_err(dev, "unable to get 48-bit DMA for consistent allocations\n");
1552 goto err_release_regions;
1555 qcount = netif_get_num_default_rss_queues();
1557 /* Restrict multiqset support only for host bound VFs */
1558 if (pdev->is_virtfn) {
1559 /* Set max number of queues per VF */
1560 qcount = min_t(int, num_online_cpus(),
1561 (MAX_SQS_PER_VF + 1) * MAX_CMP_QUEUES_PER_QS);
1564 netdev = alloc_etherdev_mqs(sizeof(struct nicvf), qcount, qcount);
1567 goto err_release_regions;
1570 pci_set_drvdata(pdev, netdev);
1572 SET_NETDEV_DEV(netdev, &pdev->dev);
1574 nic = netdev_priv(netdev);
1575 nic->netdev = netdev;
1578 nic->max_queues = qcount;
1580 /* MAP VF's configuration registers */
1581 nic->reg_base = pcim_iomap(pdev, PCI_CFG_REG_BAR_NUM, 0);
1582 if (!nic->reg_base) {
1583 dev_err(dev, "Cannot map config register space, aborting\n");
1585 goto err_free_netdev;
1588 nic->drv_stats = netdev_alloc_pcpu_stats(struct nicvf_drv_stats);
1589 if (!nic->drv_stats) {
1591 goto err_free_netdev;
1594 err = nicvf_set_qset_resources(nic);
1596 goto err_free_netdev;
1598 /* Check if PF is alive and get MAC address for this VF */
1599 err = nicvf_register_misc_interrupt(nic);
1601 goto err_free_netdev;
1603 nicvf_send_vf_struct(nic);
1605 if (!pass1_silicon(nic->pdev))
1608 pci_read_config_word(nic->pdev, PCI_SUBSYSTEM_ID, &sdevid);
1609 if (sdevid == 0xA134)
1612 /* Check if this VF is in QS only mode */
1616 err = nicvf_set_real_num_queues(netdev, nic->tx_queues, nic->rx_queues);
1618 goto err_unregister_interrupts;
1620 netdev->hw_features = (NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
1621 NETIF_F_TSO | NETIF_F_GRO |
1622 NETIF_F_HW_VLAN_CTAG_RX);
1624 netdev->hw_features |= NETIF_F_RXHASH;
1626 netdev->features |= netdev->hw_features;
1627 netdev->hw_features |= NETIF_F_LOOPBACK;
1629 netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO;
1631 netdev->netdev_ops = &nicvf_netdev_ops;
1632 netdev->watchdog_timeo = NICVF_TX_TIMEOUT;
1634 INIT_WORK(&nic->reset_task, nicvf_reset_task);
1636 err = register_netdev(netdev);
1638 dev_err(dev, "Failed to register netdevice\n");
1639 goto err_unregister_interrupts;
1642 nic->msg_enable = debug;
1644 nicvf_set_ethtool_ops(netdev);
1648 err_unregister_interrupts:
1649 nicvf_unregister_interrupts(nic);
1651 pci_set_drvdata(pdev, NULL);
1653 free_percpu(nic->drv_stats);
1654 free_netdev(netdev);
1655 err_release_regions:
1656 pci_release_regions(pdev);
1658 pci_disable_device(pdev);
1662 static void nicvf_remove(struct pci_dev *pdev)
1664 struct net_device *netdev = pci_get_drvdata(pdev);
1666 struct net_device *pnetdev;
1671 nic = netdev_priv(netdev);
1672 pnetdev = nic->pnicvf->netdev;
1674 /* Check if this Qset is assigned to different VF.
1675 * If yes, clean primary and all secondary Qsets.
1677 if (pnetdev && (pnetdev->reg_state == NETREG_REGISTERED))
1678 unregister_netdev(pnetdev);
1679 nicvf_unregister_interrupts(nic);
1680 pci_set_drvdata(pdev, NULL);
1682 free_percpu(nic->drv_stats);
1683 free_netdev(netdev);
1684 pci_release_regions(pdev);
1685 pci_disable_device(pdev);
1688 static void nicvf_shutdown(struct pci_dev *pdev)
1693 static struct pci_driver nicvf_driver = {
1695 .id_table = nicvf_id_table,
1696 .probe = nicvf_probe,
1697 .remove = nicvf_remove,
1698 .shutdown = nicvf_shutdown,
1701 static int __init nicvf_init_module(void)
1703 pr_info("%s, ver %s\n", DRV_NAME, DRV_VERSION);
1705 return pci_register_driver(&nicvf_driver);
1708 static void __exit nicvf_cleanup_module(void)
1710 pci_unregister_driver(&nicvf_driver);
1713 module_init(nicvf_init_module);
1714 module_exit(nicvf_cleanup_module);