treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157
[sfrench/cifs-2.6.git] / drivers / mtd / nand / raw / nand_toshiba.c
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Copyright (C) 2017 Free Electrons
4  * Copyright (C) 2017 NextThing Co
5  *
6  * Author: Boris Brezillon <boris.brezillon@free-electrons.com>
7  */
8
9 #include "internals.h"
10
11 /* Bit for detecting BENAND */
12 #define TOSHIBA_NAND_ID4_IS_BENAND              BIT(7)
13
14 /* Recommended to rewrite for BENAND */
15 #define TOSHIBA_NAND_STATUS_REWRITE_RECOMMENDED BIT(3)
16
17 static int toshiba_nand_benand_eccstatus(struct nand_chip *chip)
18 {
19         struct mtd_info *mtd = nand_to_mtd(chip);
20         int ret;
21         unsigned int max_bitflips = 0;
22         u8 status;
23
24         /* Check Status */
25         ret = nand_status_op(chip, &status);
26         if (ret)
27                 return ret;
28
29         if (status & NAND_STATUS_FAIL) {
30                 /* uncorrected */
31                 mtd->ecc_stats.failed++;
32         } else if (status & TOSHIBA_NAND_STATUS_REWRITE_RECOMMENDED) {
33                 /* corrected */
34                 max_bitflips = mtd->bitflip_threshold;
35                 mtd->ecc_stats.corrected += max_bitflips;
36         }
37
38         return max_bitflips;
39 }
40
41 static int
42 toshiba_nand_read_page_benand(struct nand_chip *chip, uint8_t *buf,
43                               int oob_required, int page)
44 {
45         int ret;
46
47         ret = nand_read_page_raw(chip, buf, oob_required, page);
48         if (ret)
49                 return ret;
50
51         return toshiba_nand_benand_eccstatus(chip);
52 }
53
54 static int
55 toshiba_nand_read_subpage_benand(struct nand_chip *chip, uint32_t data_offs,
56                                  uint32_t readlen, uint8_t *bufpoi, int page)
57 {
58         int ret;
59
60         ret = nand_read_page_op(chip, page, data_offs,
61                                 bufpoi + data_offs, readlen);
62         if (ret)
63                 return ret;
64
65         return toshiba_nand_benand_eccstatus(chip);
66 }
67
68 static void toshiba_nand_benand_init(struct nand_chip *chip)
69 {
70         struct mtd_info *mtd = nand_to_mtd(chip);
71
72         /*
73          * On BENAND, the entire OOB region can be used by the MTD user.
74          * The calculated ECC bytes are stored into other isolated
75          * area which is not accessible to users.
76          * This is why chip->ecc.bytes = 0.
77          */
78         chip->ecc.bytes = 0;
79         chip->ecc.size = 512;
80         chip->ecc.strength = 8;
81         chip->ecc.read_page = toshiba_nand_read_page_benand;
82         chip->ecc.read_subpage = toshiba_nand_read_subpage_benand;
83         chip->ecc.write_page = nand_write_page_raw;
84         chip->ecc.read_page_raw = nand_read_page_raw_notsupp;
85         chip->ecc.write_page_raw = nand_write_page_raw_notsupp;
86
87         chip->options |= NAND_SUBPAGE_READ;
88
89         mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops);
90 }
91
92 static void toshiba_nand_decode_id(struct nand_chip *chip)
93 {
94         struct mtd_info *mtd = nand_to_mtd(chip);
95         struct nand_memory_organization *memorg;
96
97         memorg = nanddev_get_memorg(&chip->base);
98
99         nand_decode_ext_id(chip);
100
101         /*
102          * Toshiba 24nm raw SLC (i.e., not BENAND) have 32B OOB per
103          * 512B page. For Toshiba SLC, we decode the 5th/6th byte as
104          * follows:
105          * - ID byte 6, bits[2:0]: 100b -> 43nm, 101b -> 32nm,
106          *                         110b -> 24nm
107          * - ID byte 5, bit[7]:    1 -> BENAND, 0 -> raw SLC
108          */
109         if (chip->id.len >= 6 && nand_is_slc(chip) &&
110             (chip->id.data[5] & 0x7) == 0x6 /* 24nm */ &&
111             !(chip->id.data[4] & 0x80) /* !BENAND */) {
112                 memorg->oobsize = 32 * memorg->pagesize >> 9;
113                 mtd->oobsize = memorg->oobsize;
114         }
115
116         /*
117          * Extract ECC requirements from 6th id byte.
118          * For Toshiba SLC, ecc requrements are as follows:
119          *  - 43nm: 1 bit ECC for each 512Byte is required.
120          *  - 32nm: 4 bit ECC for each 512Byte is required.
121          *  - 24nm: 8 bit ECC for each 512Byte is required.
122          */
123         if (chip->id.len >= 6 && nand_is_slc(chip)) {
124                 chip->base.eccreq.step_size = 512;
125                 switch (chip->id.data[5] & 0x7) {
126                 case 0x4:
127                         chip->base.eccreq.strength = 1;
128                         break;
129                 case 0x5:
130                         chip->base.eccreq.strength = 4;
131                         break;
132                 case 0x6:
133                         chip->base.eccreq.strength = 8;
134                         break;
135                 default:
136                         WARN(1, "Could not get ECC info");
137                         chip->base.eccreq.step_size = 0;
138                         break;
139                 }
140         }
141 }
142
143 static int toshiba_nand_init(struct nand_chip *chip)
144 {
145         if (nand_is_slc(chip))
146                 chip->options |= NAND_BBM_FIRSTPAGE | NAND_BBM_SECONDPAGE;
147
148         /* Check that chip is BENAND and ECC mode is on-die */
149         if (nand_is_slc(chip) && chip->ecc.mode == NAND_ECC_ON_DIE &&
150             chip->id.data[4] & TOSHIBA_NAND_ID4_IS_BENAND)
151                 toshiba_nand_benand_init(chip);
152
153         return 0;
154 }
155
156 const struct nand_manufacturer_ops toshiba_nand_manuf_ops = {
157         .detect = toshiba_nand_decode_id,
158         .init = toshiba_nand_init,
159 };