drivers/mmc/host/sdhci.c

   1 /*
   2  *  linux/drivers/mmc/sdhci.c - Secure Digital Host Controller Interface driver
   3  *
   4  *  Copyright (C) 2005-2007 Pierre Ossman, All Rights Reserved.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or (at
   9  * your option) any later version.
  10  */
  11
  12 #include <linux/delay.h>
  13 #include <linux/highmem.h>
  14 #include <linux/pci.h>
  15 #include <linux/dma-mapping.h>
  16
  17 #include <linux/mmc/host.h>
  18
  19 #include <asm/scatterlist.h>
  20
  21 #include "sdhci.h"
  22
  23 #define DRIVER_NAME "sdhci"
  24
  25 #define DBG(f, x...) \
  26         pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x)
  27
  28 static unsigned int debug_nodma = 0;
  29 static unsigned int debug_forcedma = 0;
  30 static unsigned int debug_quirks = 0;
  31
  32 #define SDHCI_QUIRK_CLOCK_BEFORE_RESET                  (1<<0)
  33 #define SDHCI_QUIRK_FORCE_DMA                           (1<<1)
  34 /* Controller doesn't like some resets when there is no card inserted. */
  35 #define SDHCI_QUIRK_NO_CARD_NO_RESET                    (1<<2)
  36 #define SDHCI_QUIRK_SINGLE_POWER_WRITE                  (1<<3)
  37
  38 static const struct pci_device_id pci_ids[] __devinitdata = {
  39         {
  40                 .vendor         = PCI_VENDOR_ID_RICOH,
  41                 .device         = PCI_DEVICE_ID_RICOH_R5C822,
  42                 .subvendor      = PCI_VENDOR_ID_IBM,
  43                 .subdevice      = PCI_ANY_ID,
  44                 .driver_data    = SDHCI_QUIRK_CLOCK_BEFORE_RESET |
  45                                   SDHCI_QUIRK_FORCE_DMA,
  46         },
  47
  48         {
  49                 .vendor         = PCI_VENDOR_ID_RICOH,
  50                 .device         = PCI_DEVICE_ID_RICOH_R5C822,
  51                 .subvendor      = PCI_ANY_ID,
  52                 .subdevice      = PCI_ANY_ID,
  53                 .driver_data    = SDHCI_QUIRK_FORCE_DMA |
  54                                   SDHCI_QUIRK_NO_CARD_NO_RESET,
  55         },
  56
  57         {
  58                 .vendor         = PCI_VENDOR_ID_TI,
  59                 .device         = PCI_DEVICE_ID_TI_XX21_XX11_SD,
  60                 .subvendor      = PCI_ANY_ID,
  61                 .subdevice      = PCI_ANY_ID,
  62                 .driver_data    = SDHCI_QUIRK_FORCE_DMA,
  63         },
  64
  65         {
  66                 .vendor         = PCI_VENDOR_ID_ENE,
  67                 .device         = PCI_DEVICE_ID_ENE_CB712_SD,
  68                 .subvendor      = PCI_ANY_ID,
  69                 .subdevice      = PCI_ANY_ID,
  70                 .driver_data    = SDHCI_QUIRK_SINGLE_POWER_WRITE,
  71         },
  72
  73         {       /* Generic SD host controller */
  74                 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
  75         },
  76
  77         { /* end: all zeroes */ },
  78 };
  79
  80 MODULE_DEVICE_TABLE(pci, pci_ids);
  81
  82 static void sdhci_prepare_data(struct sdhci_host *, struct mmc_data *);
  83 static void sdhci_finish_data(struct sdhci_host *);
  84
  85 static void sdhci_send_command(struct sdhci_host *, struct mmc_command *);
  86 static void sdhci_finish_command(struct sdhci_host *);
  87
  88 static void sdhci_dumpregs(struct sdhci_host *host)
  89 {
  90         printk(KERN_DEBUG DRIVER_NAME ": ============== REGISTER DUMP ==============\n");
  91
  92         printk(KERN_DEBUG DRIVER_NAME ": Sys addr: 0x%08x | Version:  0x%08x\n",
  93                 readl(host->ioaddr + SDHCI_DMA_ADDRESS),
  94                 readw(host->ioaddr + SDHCI_HOST_VERSION));
  95         printk(KERN_DEBUG DRIVER_NAME ": Blk size: 0x%08x | Blk cnt:  0x%08x\n",
  96                 readw(host->ioaddr + SDHCI_BLOCK_SIZE),
  97                 readw(host->ioaddr + SDHCI_BLOCK_COUNT));
  98         printk(KERN_DEBUG DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n",
  99                 readl(host->ioaddr + SDHCI_ARGUMENT),
 100                 readw(host->ioaddr + SDHCI_TRANSFER_MODE));
 101         printk(KERN_DEBUG DRIVER_NAME ": Present:  0x%08x | Host ctl: 0x%08x\n",
 102                 readl(host->ioaddr + SDHCI_PRESENT_STATE),
 103                 readb(host->ioaddr + SDHCI_HOST_CONTROL));
 104         printk(KERN_DEBUG DRIVER_NAME ": Power:    0x%08x | Blk gap:  0x%08x\n",
 105                 readb(host->ioaddr + SDHCI_POWER_CONTROL),
 106                 readb(host->ioaddr + SDHCI_BLOCK_GAP_CONTROL));
 107         printk(KERN_DEBUG DRIVER_NAME ": Wake-up:  0x%08x | Clock:    0x%08x\n",
 108                 readb(host->ioaddr + SDHCI_WALK_UP_CONTROL),
 109                 readw(host->ioaddr + SDHCI_CLOCK_CONTROL));
 110         printk(KERN_DEBUG DRIVER_NAME ": Timeout:  0x%08x | Int stat: 0x%08x\n",
 111                 readb(host->ioaddr + SDHCI_TIMEOUT_CONTROL),
 112                 readl(host->ioaddr + SDHCI_INT_STATUS));
 113         printk(KERN_DEBUG DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n",
 114                 readl(host->ioaddr + SDHCI_INT_ENABLE),
 115                 readl(host->ioaddr + SDHCI_SIGNAL_ENABLE));
 116         printk(KERN_DEBUG DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n",
 117                 readw(host->ioaddr + SDHCI_ACMD12_ERR),
 118                 readw(host->ioaddr + SDHCI_SLOT_INT_STATUS));
 119         printk(KERN_DEBUG DRIVER_NAME ": Caps:     0x%08x | Max curr: 0x%08x\n",
 120                 readl(host->ioaddr + SDHCI_CAPABILITIES),
 121                 readl(host->ioaddr + SDHCI_MAX_CURRENT));
 122
 123         printk(KERN_DEBUG DRIVER_NAME ": ===========================================\n");
 124 }
 125
 126 /*****************************************************************************\
 127  *                                                                           *
 128  * Low level functions                                                       *
 129  *                                                                           *
 130 \*****************************************************************************/
 131
 132 static void sdhci_reset(struct sdhci_host *host, u8 mask)
 133 {
 134         unsigned long timeout;
 135
 136         if (host->chip->quirks & SDHCI_QUIRK_NO_CARD_NO_RESET) {
 137                 if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) &
 138                         SDHCI_CARD_PRESENT))
 139                         return;
 140         }
 141
 142         writeb(mask, host->ioaddr + SDHCI_SOFTWARE_RESET);
 143
 144         if (mask & SDHCI_RESET_ALL)
 145                 host->clock = 0;
 146
 147         /* Wait max 100 ms */
 148         timeout = 100;
 149
 150         /* hw clears the bit when it's done */
 151         while (readb(host->ioaddr + SDHCI_SOFTWARE_RESET) & mask) {
 152                 if (timeout == 0) {
 153                         printk(KERN_ERR "%s: Reset 0x%x never completed.\n",
 154                                 mmc_hostname(host->mmc), (int)mask);
 155                         sdhci_dumpregs(host);
 156                         return;
 157                 }
 158                 timeout--;
 159                 mdelay(1);
 160         }
 161 }
 162
 163 static void sdhci_init(struct sdhci_host *host)
 164 {
 165         u32 intmask;
 166
 167         sdhci_reset(host, SDHCI_RESET_ALL);
 168
 169         intmask = SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT |
 170                 SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX |
 171                 SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT |
 172                 SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT |
 173                 SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL |
 174                 SDHCI_INT_DMA_END | SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE;
 175
 176         writel(intmask, host->ioaddr + SDHCI_INT_ENABLE);
 177         writel(intmask, host->ioaddr + SDHCI_SIGNAL_ENABLE);
 178 }
 179
 180 static void sdhci_activate_led(struct sdhci_host *host)
 181 {
 182         u8 ctrl;
 183
 184         ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
 185         ctrl |= SDHCI_CTRL_LED;
 186         writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
 187 }
 188
 189 static void sdhci_deactivate_led(struct sdhci_host *host)
 190 {
 191         u8 ctrl;
 192
 193         ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
 194         ctrl &= ~SDHCI_CTRL_LED;
 195         writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
 196 }
 197
 198 /*****************************************************************************\
 199  *                                                                           *
 200  * Core functions                                                            *
 201  *                                                                           *
 202 \*****************************************************************************/
 203
 204 static inline char* sdhci_sg_to_buffer(struct sdhci_host* host)
 205 {
 206         return page_address(host->cur_sg->page) + host->cur_sg->offset;
 207 }
 208
 209 static inline int sdhci_next_sg(struct sdhci_host* host)
 210 {
 211         /*
 212          * Skip to next SG entry.
 213          */
 214         host->cur_sg++;
 215         host->num_sg--;
 216
 217         /*
 218          * Any entries left?
 219          */
 220         if (host->num_sg > 0) {
 221                 host->offset = 0;
 222                 host->remain = host->cur_sg->length;
 223         }
 224
 225         return host->num_sg;
 226 }
 227
 228 static void sdhci_read_block_pio(struct sdhci_host *host)
 229 {
 230         int blksize, chunk_remain;
 231         u32 data;
 232         char *buffer;
 233         int size;
 234
 235         DBG("PIO reading\n");
 236
 237         blksize = host->data->blksz;
 238         chunk_remain = 0;
 239         data = 0;
 240
 241         buffer = sdhci_sg_to_buffer(host) + host->offset;
 242
 243         while (blksize) {
 244                 if (chunk_remain == 0) {
 245                         data = readl(host->ioaddr + SDHCI_BUFFER);
 246                         chunk_remain = min(blksize, 4);
 247                 }
 248
 249                 size = min(host->remain, chunk_remain);
 250
 251                 chunk_remain -= size;
 252                 blksize -= size;
 253                 host->offset += size;
 254                 host->remain -= size;
 255
 256                 while (size) {
 257                         *buffer = data & 0xFF;
 258                         buffer++;
 259                         data >>= 8;
 260                         size--;
 261                 }
 262
 263                 if (host->remain == 0) {
 264                         if (sdhci_next_sg(host) == 0) {
 265                                 BUG_ON(blksize != 0);
 266                                 return;
 267                         }
 268                         buffer = sdhci_sg_to_buffer(host);
 269                 }
 270         }
 271 }
 272
 273 static void sdhci_write_block_pio(struct sdhci_host *host)
 274 {
 275         int blksize, chunk_remain;
 276         u32 data;
 277         char *buffer;
 278         int bytes, size;
 279
 280         DBG("PIO writing\n");
 281
 282         blksize = host->data->blksz;
 283         chunk_remain = 4;
 284         data = 0;
 285
 286         bytes = 0;
 287         buffer = sdhci_sg_to_buffer(host) + host->offset;
 288
 289         while (blksize) {
 290                 size = min(host->remain, chunk_remain);
 291
 292                 chunk_remain -= size;
 293                 blksize -= size;
 294                 host->offset += size;
 295                 host->remain -= size;
 296
 297                 while (size) {
 298                         data >>= 8;
 299                         data |= (u32)*buffer << 24;
 300                         buffer++;
 301                         size--;
 302                 }
 303
 304                 if (chunk_remain == 0) {
 305                         writel(data, host->ioaddr + SDHCI_BUFFER);
 306                         chunk_remain = min(blksize, 4);
 307                 }
 308
 309                 if (host->remain == 0) {
 310                         if (sdhci_next_sg(host) == 0) {
 311                                 BUG_ON(blksize != 0);
 312                                 return;
 313                         }
 314                         buffer = sdhci_sg_to_buffer(host);
 315                 }
 316         }
 317 }
 318
 319 static void sdhci_transfer_pio(struct sdhci_host *host)
 320 {
 321         u32 mask;
 322
 323         BUG_ON(!host->data);
 324
 325         if (host->num_sg == 0)
 326                 return;
 327
 328         if (host->data->flags & MMC_DATA_READ)
 329                 mask = SDHCI_DATA_AVAILABLE;
 330         else
 331                 mask = SDHCI_SPACE_AVAILABLE;
 332
 333         while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) {
 334                 if (host->data->flags & MMC_DATA_READ)
 335                         sdhci_read_block_pio(host);
 336                 else
 337                         sdhci_write_block_pio(host);
 338
 339                 if (host->num_sg == 0)
 340                         break;
 341         }
 342
 343         DBG("PIO transfer complete.\n");
 344 }
 345
 346 static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data)
 347 {
 348         u8 count;
 349         unsigned target_timeout, current_timeout;
 350
 351         WARN_ON(host->data);
 352
 353         if (data == NULL)
 354                 return;
 355
 356         DBG("blksz %04x blks %04x flags %08x\n",
 357                 data->blksz, data->blocks, data->flags);
 358         DBG("tsac %d ms nsac %d clk\n",
 359                 data->timeout_ns / 1000000, data->timeout_clks);
 360
 361         /* Sanity checks */
 362         BUG_ON(data->blksz * data->blocks > 524288);
 363         BUG_ON(data->blksz > host->mmc->max_blk_size);
 364         BUG_ON(data->blocks > 65535);
 365
 366         /* timeout in us */
 367         target_timeout = data->timeout_ns / 1000 +
 368                 data->timeout_clks / host->clock;
 369
 370         /*
 371          * Figure out needed cycles.
 372          * We do this in steps in order to fit inside a 32 bit int.
 373          * The first step is the minimum timeout, which will have a
 374          * minimum resolution of 6 bits:
 375          * (1) 2^13*1000 > 2^22,
 376          * (2) host->timeout_clk < 2^16
 377          *     =>
 378          *     (1) / (2) > 2^6
 379          */
 380         count = 0;
 381         current_timeout = (1 << 13) * 1000 / host->timeout_clk;
 382         while (current_timeout < target_timeout) {
 383                 count++;
 384                 current_timeout <<= 1;
 385                 if (count >= 0xF)
 386                         break;
 387         }
 388
 389         if (count >= 0xF) {
 390                 printk(KERN_WARNING "%s: Too large timeout requested!\n",
 391                         mmc_hostname(host->mmc));
 392                 count = 0xE;
 393         }
 394
 395         writeb(count, host->ioaddr + SDHCI_TIMEOUT_CONTROL);
 396
 397         if (host->flags & SDHCI_USE_DMA) {
 398                 int count;
 399
 400                 count = pci_map_sg(host->chip->pdev, data->sg, data->sg_len,
 401                         (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
 402                 BUG_ON(count != 1);
 403
 404                 writel(sg_dma_address(data->sg), host->ioaddr + SDHCI_DMA_ADDRESS);
 405         } else {
 406                 host->cur_sg = data->sg;
 407                 host->num_sg = data->sg_len;
 408
 409                 host->offset = 0;
 410                 host->remain = host->cur_sg->length;
 411         }
 412
 413         /* We do not handle DMA boundaries, so set it to max (512 KiB) */
 414         writew(SDHCI_MAKE_BLKSZ(7, data->blksz),
 415                 host->ioaddr + SDHCI_BLOCK_SIZE);
 416         writew(data->blocks, host->ioaddr + SDHCI_BLOCK_COUNT);
 417 }
 418
 419 static void sdhci_set_transfer_mode(struct sdhci_host *host,
 420         struct mmc_data *data)
 421 {
 422         u16 mode;
 423
 424         WARN_ON(host->data);
 425
 426         if (data == NULL)
 427                 return;
 428
 429         mode = SDHCI_TRNS_BLK_CNT_EN;
 430         if (data->blocks > 1)
 431                 mode |= SDHCI_TRNS_MULTI;
 432         if (data->flags & MMC_DATA_READ)
 433                 mode |= SDHCI_TRNS_READ;
 434         if (host->flags & SDHCI_USE_DMA)
 435                 mode |= SDHCI_TRNS_DMA;
 436
 437         writew(mode, host->ioaddr + SDHCI_TRANSFER_MODE);
 438 }
 439
 440 static void sdhci_finish_data(struct sdhci_host *host)
 441 {
 442         struct mmc_data *data;
 443         u16 blocks;
 444
 445         BUG_ON(!host->data);
 446
 447         data = host->data;
 448         host->data = NULL;
 449
 450         if (host->flags & SDHCI_USE_DMA) {
 451                 pci_unmap_sg(host->chip->pdev, data->sg, data->sg_len,
 452                         (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
 453         }
 454
 455         /*
 456          * Controller doesn't count down when in single block mode.
 457          */
 458         if ((data->blocks == 1) && (data->error == MMC_ERR_NONE))
 459                 blocks = 0;
 460         else
 461                 blocks = readw(host->ioaddr + SDHCI_BLOCK_COUNT);
 462         data->bytes_xfered = data->blksz * (data->blocks - blocks);
 463
 464         if ((data->error == MMC_ERR_NONE) && blocks) {
 465                 printk(KERN_ERR "%s: Controller signalled completion even "
 466                         "though there were blocks left.\n",
 467                         mmc_hostname(host->mmc));
 468                 data->error = MMC_ERR_FAILED;
 469         }
 470
 471         DBG("Ending data transfer (%d bytes)\n", data->bytes_xfered);
 472
 473         if (data->stop) {
 474                 /*
 475                  * The controller needs a reset of internal state machines
 476                  * upon error conditions.
 477                  */
 478                 if (data->error != MMC_ERR_NONE) {
 479                         sdhci_reset(host, SDHCI_RESET_CMD);
 480                         sdhci_reset(host, SDHCI_RESET_DATA);
 481                 }
 482
 483                 sdhci_send_command(host, data->stop);
 484         } else
 485                 tasklet_schedule(&host->finish_tasklet);
 486 }
 487
 488 static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd)
 489 {
 490         int flags;
 491         u32 mask;
 492         unsigned long timeout;
 493
 494         WARN_ON(host->cmd);
 495
 496         DBG("Sending cmd (%x)\n", cmd->opcode);
 497
 498         /* Wait max 10 ms */
 499         timeout = 10;
 500
 501         mask = SDHCI_CMD_INHIBIT;
 502         if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY))
 503                 mask |= SDHCI_DATA_INHIBIT;
 504
 505         /* We shouldn't wait for data inihibit for stop commands, even
 506            though they might use busy signaling */
 507         if (host->mrq->data && (cmd == host->mrq->data->stop))
 508                 mask &= ~SDHCI_DATA_INHIBIT;
 509
 510         while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) {
 511                 if (timeout == 0) {
 512                         printk(KERN_ERR "%s: Controller never released "
 513                                 "inhibit bit(s).\n", mmc_hostname(host->mmc));
 514                         sdhci_dumpregs(host);
 515                         cmd->error = MMC_ERR_FAILED;
 516                         tasklet_schedule(&host->finish_tasklet);
 517                         return;
 518                 }
 519                 timeout--;
 520                 mdelay(1);
 521         }
 522
 523         mod_timer(&host->timer, jiffies + 10 * HZ);
 524
 525         host->cmd = cmd;
 526
 527         sdhci_prepare_data(host, cmd->data);
 528
 529         writel(cmd->arg, host->ioaddr + SDHCI_ARGUMENT);
 530
 531         sdhci_set_transfer_mode(host, cmd->data);
 532
 533         if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) {
 534                 printk(KERN_ERR "%s: Unsupported response type!\n",
 535                         mmc_hostname(host->mmc));
 536                 cmd->error = MMC_ERR_INVALID;
 537                 tasklet_schedule(&host->finish_tasklet);
 538                 return;
 539         }
 540
 541         if (!(cmd->flags & MMC_RSP_PRESENT))
 542                 flags = SDHCI_CMD_RESP_NONE;
 543         else if (cmd->flags & MMC_RSP_136)
 544                 flags = SDHCI_CMD_RESP_LONG;
 545         else if (cmd->flags & MMC_RSP_BUSY)
 546                 flags = SDHCI_CMD_RESP_SHORT_BUSY;
 547         else
 548                 flags = SDHCI_CMD_RESP_SHORT;
 549
 550         if (cmd->flags & MMC_RSP_CRC)
 551                 flags |= SDHCI_CMD_CRC;
 552         if (cmd->flags & MMC_RSP_OPCODE)
 553                 flags |= SDHCI_CMD_INDEX;
 554         if (cmd->data)
 555                 flags |= SDHCI_CMD_DATA;
 556
 557         writew(SDHCI_MAKE_CMD(cmd->opcode, flags),
 558                 host->ioaddr + SDHCI_COMMAND);
 559 }
 560
 561 static void sdhci_finish_command(struct sdhci_host *host)
 562 {
 563         int i;
 564
 565         BUG_ON(host->cmd == NULL);
 566
 567         if (host->cmd->flags & MMC_RSP_PRESENT) {
 568                 if (host->cmd->flags & MMC_RSP_136) {
 569                         /* CRC is stripped so we need to do some shifting. */
 570                         for (i = 0;i < 4;i++) {
 571                                 host->cmd->resp[i] = readl(host->ioaddr +
 572                                         SDHCI_RESPONSE + (3-i)*4) << 8;
 573                                 if (i != 3)
 574                                         host->cmd->resp[i] |=
 575                                                 readb(host->ioaddr +
 576                                                 SDHCI_RESPONSE + (3-i)*4-1);
 577                         }
 578                 } else {
 579                         host->cmd->resp[0] = readl(host->ioaddr + SDHCI_RESPONSE);
 580                 }
 581         }
 582
 583         host->cmd->error = MMC_ERR_NONE;
 584
 585         DBG("Ending cmd (%x)\n", host->cmd->opcode);
 586
 587         if (host->cmd->data)
 588                 host->data = host->cmd->data;
 589         else
 590                 tasklet_schedule(&host->finish_tasklet);
 591
 592         host->cmd = NULL;
 593 }
 594
 595 static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
 596 {
 597         int div;
 598         u16 clk;
 599         unsigned long timeout;
 600
 601         if (clock == host->clock)
 602                 return;
 603
 604         writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);
 605
 606         if (clock == 0)
 607                 goto out;
 608
 609         for (div = 1;div < 256;div *= 2) {
 610                 if ((host->max_clk / div) <= clock)
 611                         break;
 612         }
 613         div >>= 1;
 614
 615         clk = div << SDHCI_DIVIDER_SHIFT;
 616         clk |= SDHCI_CLOCK_INT_EN;
 617         writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
 618
 619         /* Wait max 10 ms */
 620         timeout = 10;
 621         while (!((clk = readw(host->ioaddr + SDHCI_CLOCK_CONTROL))
 622                 & SDHCI_CLOCK_INT_STABLE)) {
 623                 if (timeout == 0) {
 624                         printk(KERN_ERR "%s: Internal clock never "
 625                                 "stabilised.\n", mmc_hostname(host->mmc));
 626                         sdhci_dumpregs(host);
 627                         return;
 628                 }
 629                 timeout--;
 630                 mdelay(1);
 631         }
 632
 633         clk |= SDHCI_CLOCK_CARD_EN;
 634         writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
 635
 636 out:
 637         host->clock = clock;
 638 }
 639
 640 static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
 641 {
 642         u8 pwr;
 643
 644         if (host->power == power)
 645                 return;
 646
 647         if (power == (unsigned short)-1) {
 648                 writeb(0, host->ioaddr + SDHCI_POWER_CONTROL);
 649                 goto out;
 650         }
 651
 652         /*
 653          * Spec says that we should clear the power reg before setting
 654          * a new value. Some controllers don't seem to like this though.
 655          */
 656         if (!(host->chip->quirks & SDHCI_QUIRK_SINGLE_POWER_WRITE))
 657                 writeb(0, host->ioaddr + SDHCI_POWER_CONTROL);
 658
 659         pwr = SDHCI_POWER_ON;
 660
 661         switch (1 << power) {
 662         case MMC_VDD_165_195:
 663                 pwr |= SDHCI_POWER_180;
 664                 break;
 665         case MMC_VDD_29_30:
 666         case MMC_VDD_30_31:
 667                 pwr |= SDHCI_POWER_300;
 668                 break;
 669         case MMC_VDD_32_33:
 670         case MMC_VDD_33_34:
 671                 pwr |= SDHCI_POWER_330;
 672                 break;
 673         default:
 674                 BUG();
 675         }
 676
 677         writeb(pwr, host->ioaddr + SDHCI_POWER_CONTROL);
 678
 679 out:
 680         host->power = power;
 681 }
 682
 683 /*****************************************************************************\
 684  *                                                                           *
 685  * MMC callbacks                                                             *
 686  *                                                                           *
 687 \*****************************************************************************/
 688
 689 static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq)
 690 {
 691         struct sdhci_host *host;
 692         unsigned long flags;
 693
 694         host = mmc_priv(mmc);
 695
 696         spin_lock_irqsave(&host->lock, flags);
 697
 698         WARN_ON(host->mrq != NULL);
 699
 700         sdhci_activate_led(host);
 701
 702         host->mrq = mrq;
 703
 704         if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
 705                 host->mrq->cmd->error = MMC_ERR_TIMEOUT;
 706                 tasklet_schedule(&host->finish_tasklet);
 707         } else
 708                 sdhci_send_command(host, mrq->cmd);
 709
 710         mmiowb();
 711         spin_unlock_irqrestore(&host->lock, flags);
 712 }
 713
 714 static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
 715 {
 716         struct sdhci_host *host;
 717         unsigned long flags;
 718         u8 ctrl;
 719
 720         host = mmc_priv(mmc);
 721
 722         spin_lock_irqsave(&host->lock, flags);
 723
 724         /*
 725          * Reset the chip on each power off.
 726          * Should clear out any weird states.
 727          */
 728         if (ios->power_mode == MMC_POWER_OFF) {
 729                 writel(0, host->ioaddr + SDHCI_SIGNAL_ENABLE);
 730                 sdhci_init(host);
 731         }
 732
 733         sdhci_set_clock(host, ios->clock);
 734
 735         if (ios->power_mode == MMC_POWER_OFF)
 736                 sdhci_set_power(host, -1);
 737         else
 738                 sdhci_set_power(host, ios->vdd);
 739
 740         ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
 741
 742         if (ios->bus_width == MMC_BUS_WIDTH_4)
 743                 ctrl |= SDHCI_CTRL_4BITBUS;
 744         else
 745                 ctrl &= ~SDHCI_CTRL_4BITBUS;
 746
 747         if (ios->timing == MMC_TIMING_SD_HS)
 748                 ctrl |= SDHCI_CTRL_HISPD;
 749         else
 750                 ctrl &= ~SDHCI_CTRL_HISPD;
 751
 752         writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
 753
 754         mmiowb();
 755         spin_unlock_irqrestore(&host->lock, flags);
 756 }
 757
 758 static int sdhci_get_ro(struct mmc_host *mmc)
 759 {
 760         struct sdhci_host *host;
 761         unsigned long flags;
 762         int present;
 763
 764         host = mmc_priv(mmc);
 765
 766         spin_lock_irqsave(&host->lock, flags);
 767
 768         present = readl(host->ioaddr + SDHCI_PRESENT_STATE);
 769
 770         spin_unlock_irqrestore(&host->lock, flags);
 771
 772         return !(present & SDHCI_WRITE_PROTECT);
 773 }
 774
 775 static const struct mmc_host_ops sdhci_ops = {
 776         .request        = sdhci_request,
 777         .set_ios        = sdhci_set_ios,
 778         .get_ro         = sdhci_get_ro,
 779 };
 780
 781 /*****************************************************************************\
 782  *                                                                           *
 783  * Tasklets                                                                  *
 784  *                                                                           *
 785 \*****************************************************************************/
 786
 787 static void sdhci_tasklet_card(unsigned long param)
 788 {
 789         struct sdhci_host *host;
 790         unsigned long flags;
 791
 792         host = (struct sdhci_host*)param;
 793
 794         spin_lock_irqsave(&host->lock, flags);
 795
 796         if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
 797                 if (host->mrq) {
 798                         printk(KERN_ERR "%s: Card removed during transfer!\n",
 799                                 mmc_hostname(host->mmc));
 800                         printk(KERN_ERR "%s: Resetting controller.\n",
 801                                 mmc_hostname(host->mmc));
 802
 803                         sdhci_reset(host, SDHCI_RESET_CMD);
 804                         sdhci_reset(host, SDHCI_RESET_DATA);
 805
 806                         host->mrq->cmd->error = MMC_ERR_FAILED;
 807                         tasklet_schedule(&host->finish_tasklet);
 808                 }
 809         }
 810
 811         spin_unlock_irqrestore(&host->lock, flags);
 812
 813         mmc_detect_change(host->mmc, msecs_to_jiffies(500));
 814 }
 815
 816 static void sdhci_tasklet_finish(unsigned long param)
 817 {
 818         struct sdhci_host *host;
 819         unsigned long flags;
 820         struct mmc_request *mrq;
 821
 822         host = (struct sdhci_host*)param;
 823
 824         spin_lock_irqsave(&host->lock, flags);
 825
 826         del_timer(&host->timer);
 827
 828         mrq = host->mrq;
 829
 830         DBG("Ending request, cmd (%x)\n", mrq->cmd->opcode);
 831
 832         /*
 833          * The controller needs a reset of internal state machines
 834          * upon error conditions.
 835          */
 836         if ((mrq->cmd->error != MMC_ERR_NONE) ||
 837                 (mrq->data && ((mrq->data->error != MMC_ERR_NONE) ||
 838                 (mrq->data->stop && (mrq->data->stop->error != MMC_ERR_NONE))))) {
 839
 840                 /* Some controllers need this kick or reset won't work here */
 841                 if (host->chip->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) {
 842                         unsigned int clock;
 843
 844                         /* This is to force an update */
 845                         clock = host->clock;
 846                         host->clock = 0;
 847                         sdhci_set_clock(host, clock);
 848                 }
 849
 850                 /* Spec says we should do both at the same time, but Ricoh
 851                    controllers do not like that. */
 852                 sdhci_reset(host, SDHCI_RESET_CMD);
 853                 sdhci_reset(host, SDHCI_RESET_DATA);
 854         }
 855
 856         host->mrq = NULL;
 857         host->cmd = NULL;
 858         host->data = NULL;
 859
 860         sdhci_deactivate_led(host);
 861
 862         mmiowb();
 863         spin_unlock_irqrestore(&host->lock, flags);
 864
 865         mmc_request_done(host->mmc, mrq);
 866 }
 867
 868 static void sdhci_timeout_timer(unsigned long data)
 869 {
 870         struct sdhci_host *host;
 871         unsigned long flags;
 872
 873         host = (struct sdhci_host*)data;
 874
 875         spin_lock_irqsave(&host->lock, flags);
 876
 877         if (host->mrq) {
 878                 printk(KERN_ERR "%s: Timeout waiting for hardware "
 879                         "interrupt.\n", mmc_hostname(host->mmc));
 880                 sdhci_dumpregs(host);
 881
 882                 if (host->data) {
 883                         host->data->error = MMC_ERR_TIMEOUT;
 884                         sdhci_finish_data(host);
 885                 } else {
 886                         if (host->cmd)
 887                                 host->cmd->error = MMC_ERR_TIMEOUT;
 888                         else
 889                                 host->mrq->cmd->error = MMC_ERR_TIMEOUT;
 890
 891                         tasklet_schedule(&host->finish_tasklet);
 892                 }
 893         }
 894
 895         mmiowb();
 896         spin_unlock_irqrestore(&host->lock, flags);
 897 }
 898
 899 /*****************************************************************************\
 900  *                                                                           *
 901  * Interrupt handling                                                        *
 902  *                                                                           *
 903 \*****************************************************************************/
 904
 905 static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask)
 906 {
 907         BUG_ON(intmask == 0);
 908
 909         if (!host->cmd) {
 910                 printk(KERN_ERR "%s: Got command interrupt even though no "
 911                         "command operation was in progress.\n",
 912                         mmc_hostname(host->mmc));
 913                 sdhci_dumpregs(host);
 914                 return;
 915         }
 916
 917         if (intmask & SDHCI_INT_RESPONSE)
 918                 sdhci_finish_command(host);
 919         else {
 920                 if (intmask & SDHCI_INT_TIMEOUT)
 921                         host->cmd->error = MMC_ERR_TIMEOUT;
 922                 else if (intmask & SDHCI_INT_CRC)
 923                         host->cmd->error = MMC_ERR_BADCRC;
 924                 else if (intmask & (SDHCI_INT_END_BIT | SDHCI_INT_INDEX))
 925                         host->cmd->error = MMC_ERR_FAILED;
 926                 else
 927                         host->cmd->error = MMC_ERR_INVALID;
 928
 929                 tasklet_schedule(&host->finish_tasklet);
 930         }
 931 }
 932
 933 static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
 934 {
 935         BUG_ON(intmask == 0);
 936
 937         if (!host->data) {
 938                 /*
 939                  * A data end interrupt is sent together with the response
 940                  * for the stop command.
 941                  */
 942                 if (intmask & SDHCI_INT_DATA_END)
 943                         return;
 944
 945                 printk(KERN_ERR "%s: Got data interrupt even though no "
 946                         "data operation was in progress.\n",
 947                         mmc_hostname(host->mmc));
 948                 sdhci_dumpregs(host);
 949
 950                 return;
 951         }
 952
 953         if (intmask & SDHCI_INT_DATA_TIMEOUT)
 954                 host->data->error = MMC_ERR_TIMEOUT;
 955         else if (intmask & SDHCI_INT_DATA_CRC)
 956                 host->data->error = MMC_ERR_BADCRC;
 957         else if (intmask & SDHCI_INT_DATA_END_BIT)
 958                 host->data->error = MMC_ERR_FAILED;
 959
 960         if (host->data->error != MMC_ERR_NONE)
 961                 sdhci_finish_data(host);
 962         else {
 963                 if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL))
 964                         sdhci_transfer_pio(host);
 965
 966                 if (intmask & SDHCI_INT_DATA_END)
 967                         sdhci_finish_data(host);
 968         }
 969 }
 970
 971 static irqreturn_t sdhci_irq(int irq, void *dev_id)
 972 {
 973         irqreturn_t result;
 974         struct sdhci_host* host = dev_id;
 975         u32 intmask;
 976
 977         spin_lock(&host->lock);
 978
 979         intmask = readl(host->ioaddr + SDHCI_INT_STATUS);
 980
 981         if (!intmask || intmask == 0xffffffff) {
 982                 result = IRQ_NONE;
 983                 goto out;
 984         }
 985
 986         DBG("*** %s got interrupt: 0x%08x\n", host->slot_descr, intmask);
 987
 988         if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) {
 989                 writel(intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE),
 990                         host->ioaddr + SDHCI_INT_STATUS);
 991                 tasklet_schedule(&host->card_tasklet);
 992         }
 993
 994         intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE);
 995
 996         if (intmask & SDHCI_INT_CMD_MASK) {
 997                 writel(intmask & SDHCI_INT_CMD_MASK,
 998                         host->ioaddr + SDHCI_INT_STATUS);
 999                 sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK);
1000         }
1001
1002         if (intmask & SDHCI_INT_DATA_MASK) {
1003                 writel(intmask & SDHCI_INT_DATA_MASK,
1004                         host->ioaddr + SDHCI_INT_STATUS);
1005                 sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK);
1006         }
1007
1008         intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK);
1009
1010         if (intmask & SDHCI_INT_BUS_POWER) {
1011                 printk(KERN_ERR "%s: Card is consuming too much power!\n",
1012                         mmc_hostname(host->mmc));
1013                 writel(SDHCI_INT_BUS_POWER, host->ioaddr + SDHCI_INT_STATUS);
1014         }
1015
1016         intmask &= SDHCI_INT_BUS_POWER;
1017
1018         if (intmask) {
1019                 printk(KERN_ERR "%s: Unexpected interrupt 0x%08x.\n",
1020                         mmc_hostname(host->mmc), intmask);
1021                 sdhci_dumpregs(host);
1022
1023                 writel(intmask, host->ioaddr + SDHCI_INT_STATUS);
1024         }
1025
1026         result = IRQ_HANDLED;
1027
1028         mmiowb();
1029 out:
1030         spin_unlock(&host->lock);
1031
1032         return result;
1033 }
1034
1035 /*****************************************************************************\
1036  *                                                                           *
1037  * Suspend/resume                                                            *
1038  *                                                                           *
1039 \*****************************************************************************/
1040
1041 #ifdef CONFIG_PM
1042
1043 static int sdhci_suspend (struct pci_dev *pdev, pm_message_t state)
1044 {
1045         struct sdhci_chip *chip;
1046         int i, ret;
1047
1048         chip = pci_get_drvdata(pdev);
1049         if (!chip)
1050                 return 0;
1051
1052         DBG("Suspending...\n");
1053
1054         for (i = 0;i < chip->num_slots;i++) {
1055                 if (!chip->hosts[i])
1056                         continue;
1057                 ret = mmc_suspend_host(chip->hosts[i]->mmc, state);
1058                 if (ret) {
1059                         for (i--;i >= 0;i--)
1060                                 mmc_resume_host(chip->hosts[i]->mmc);
1061                         return ret;
1062                 }
1063         }
1064
1065         pci_save_state(pdev);
1066         pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
1067
1068         for (i = 0;i < chip->num_slots;i++) {
1069                 if (!chip->hosts[i])
1070                         continue;
1071                 free_irq(chip->hosts[i]->irq, chip->hosts[i]);
1072         }
1073
1074         pci_disable_device(pdev);
1075         pci_set_power_state(pdev, pci_choose_state(pdev, state));
1076
1077         return 0;
1078 }
1079
1080 static int sdhci_resume (struct pci_dev *pdev)
1081 {
1082         struct sdhci_chip *chip;
1083         int i, ret;
1084
1085         chip = pci_get_drvdata(pdev);
1086         if (!chip)
1087                 return 0;
1088
1089         DBG("Resuming...\n");
1090
1091         pci_set_power_state(pdev, PCI_D0);
1092         pci_restore_state(pdev);
1093         ret = pci_enable_device(pdev);
1094         if (ret)
1095                 return ret;
1096
1097         for (i = 0;i < chip->num_slots;i++) {
1098                 if (!chip->hosts[i])
1099                         continue;
1100                 if (chip->hosts[i]->flags & SDHCI_USE_DMA)
1101                         pci_set_master(pdev);
1102                 ret = request_irq(chip->hosts[i]->irq, sdhci_irq,
1103                         IRQF_SHARED, chip->hosts[i]->slot_descr,
1104                         chip->hosts[i]);
1105                 if (ret)
1106                         return ret;
1107                 sdhci_init(chip->hosts[i]);
1108                 mmiowb();
1109                 ret = mmc_resume_host(chip->hosts[i]->mmc);
1110                 if (ret)
1111                         return ret;
1112         }
1113
1114         return 0;
1115 }
1116
1117 #else /* CONFIG_PM */
1118
1119 #define sdhci_suspend NULL
1120 #define sdhci_resume NULL
1121
1122 #endif /* CONFIG_PM */
1123
1124 /*****************************************************************************\
1125  *                                                                           *
1126  * Device probing/removal                                                    *
1127  *                                                                           *
1128 \*****************************************************************************/
1129
1130 static int __devinit sdhci_probe_slot(struct pci_dev *pdev, int slot)
1131 {
1132         int ret;
1133         unsigned int version;
1134         struct sdhci_chip *chip;
1135         struct mmc_host *mmc;
1136         struct sdhci_host *host;
1137
1138         u8 first_bar;
1139         unsigned int caps;
1140
1141         chip = pci_get_drvdata(pdev);
1142         BUG_ON(!chip);
1143
1144         ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1145         if (ret)
1146                 return ret;
1147
1148         first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1149
1150         if (first_bar > 5) {
1151                 printk(KERN_ERR DRIVER_NAME ": Invalid first BAR. Aborting.\n");
1152                 return -ENODEV;
1153         }
1154
1155         if (!(pci_resource_flags(pdev, first_bar + slot) & IORESOURCE_MEM)) {
1156                 printk(KERN_ERR DRIVER_NAME ": BAR is not iomem. Aborting.\n");
1157                 return -ENODEV;
1158         }
1159
1160         if (pci_resource_len(pdev, first_bar + slot) != 0x100) {
1161                 printk(KERN_ERR DRIVER_NAME ": Invalid iomem size. "
1162                         "You may experience problems.\n");
1163         }
1164
1165         if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
1166                 printk(KERN_ERR DRIVER_NAME ": Vendor specific interface. Aborting.\n");
1167                 return -ENODEV;
1168         }
1169
1170         if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
1171                 printk(KERN_ERR DRIVER_NAME ": Unknown interface. Aborting.\n");
1172                 return -ENODEV;
1173         }
1174
1175         mmc = mmc_alloc_host(sizeof(struct sdhci_host), &pdev->dev);
1176         if (!mmc)
1177                 return -ENOMEM;
1178
1179         host = mmc_priv(mmc);
1180         host->mmc = mmc;
1181
1182         host->chip = chip;
1183         chip->hosts[slot] = host;
1184
1185         host->bar = first_bar + slot;
1186
1187         host->addr = pci_resource_start(pdev, host->bar);
1188         host->irq = pdev->irq;
1189
1190         DBG("slot %d at 0x%08lx, irq %d\n", slot, host->addr, host->irq);
1191
1192         snprintf(host->slot_descr, 20, "sdhci:slot%d", slot);
1193
1194         ret = pci_request_region(pdev, host->bar, host->slot_descr);
1195         if (ret)
1196                 goto free;
1197
1198         host->ioaddr = ioremap_nocache(host->addr,
1199                 pci_resource_len(pdev, host->bar));
1200         if (!host->ioaddr) {
1201                 ret = -ENOMEM;
1202                 goto release;
1203         }
1204
1205         sdhci_reset(host, SDHCI_RESET_ALL);
1206
1207         version = readw(host->ioaddr + SDHCI_HOST_VERSION);
1208         version = (version & SDHCI_SPEC_VER_MASK) >> SDHCI_SPEC_VER_SHIFT;
1209         if (version != 0) {
1210                 printk(KERN_ERR "%s: Unknown controller version (%d). "
1211                         "You may experience problems.\n", host->slot_descr,
1212                         version);
1213         }
1214
1215         caps = readl(host->ioaddr + SDHCI_CAPABILITIES);
1216
1217         if (debug_nodma)
1218                 DBG("DMA forced off\n");
1219         else if (debug_forcedma) {
1220                 DBG("DMA forced on\n");
1221                 host->flags |= SDHCI_USE_DMA;
1222         } else if (chip->quirks & SDHCI_QUIRK_FORCE_DMA)
1223                 host->flags |= SDHCI_USE_DMA;
1224         else if ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA)
1225                 DBG("Controller doesn't have DMA interface\n");
1226         else if (!(caps & SDHCI_CAN_DO_DMA))
1227                 DBG("Controller doesn't have DMA capability\n");
1228         else
1229                 host->flags |= SDHCI_USE_DMA;
1230
1231         if (host->flags & SDHCI_USE_DMA) {
1232                 if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
1233                         printk(KERN_WARNING "%s: No suitable DMA available. "
1234                                 "Falling back to PIO.\n", host->slot_descr);
1235                         host->flags &= ~SDHCI_USE_DMA;
1236                 }
1237         }
1238
1239         if (host->flags & SDHCI_USE_DMA)
1240                 pci_set_master(pdev);
1241         else /* XXX: Hack to get MMC layer to avoid highmem */
1242                 pdev->dma_mask = 0;
1243
1244         host->max_clk =
1245                 (caps & SDHCI_CLOCK_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT;
1246         if (host->max_clk == 0) {
1247                 printk(KERN_ERR "%s: Hardware doesn't specify base clock "
1248                         "frequency.\n", host->slot_descr);
1249                 ret = -ENODEV;
1250                 goto unmap;
1251         }
1252         host->max_clk *= 1000000;
1253
1254         host->timeout_clk =
1255                 (caps & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT;
1256         if (host->timeout_clk == 0) {
1257                 printk(KERN_ERR "%s: Hardware doesn't specify timeout clock "
1258                         "frequency.\n", host->slot_descr);
1259                 ret = -ENODEV;
1260                 goto unmap;
1261         }
1262         if (caps & SDHCI_TIMEOUT_CLK_UNIT)
1263                 host->timeout_clk *= 1000;
1264
1265         /*
1266          * Set host parameters.
1267          */
1268         mmc->ops = &sdhci_ops;
1269         mmc->f_min = host->max_clk / 256;
1270         mmc->f_max = host->max_clk;
1271         mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_MULTIWRITE | MMC_CAP_BYTEBLOCK;
1272
1273         if (caps & SDHCI_CAN_DO_HISPD)
1274                 mmc->caps |= MMC_CAP_SD_HIGHSPEED;
1275
1276         mmc->ocr_avail = 0;
1277         if (caps & SDHCI_CAN_VDD_330)
1278                 mmc->ocr_avail |= MMC_VDD_32_33|MMC_VDD_33_34;
1279         if (caps & SDHCI_CAN_VDD_300)
1280                 mmc->ocr_avail |= MMC_VDD_29_30|MMC_VDD_30_31;
1281         if (caps & SDHCI_CAN_VDD_180)
1282                 mmc->ocr_avail |= MMC_VDD_165_195;
1283
1284         if (mmc->ocr_avail == 0) {
1285                 printk(KERN_ERR "%s: Hardware doesn't report any "
1286                         "support voltages.\n", host->slot_descr);
1287                 ret = -ENODEV;
1288                 goto unmap;
1289         }
1290
1291         spin_lock_init(&host->lock);
1292
1293         /*
1294          * Maximum number of segments. Hardware cannot do scatter lists.
1295          */
1296         if (host->flags & SDHCI_USE_DMA)
1297                 mmc->max_hw_segs = 1;
1298         else
1299                 mmc->max_hw_segs = 16;
1300         mmc->max_phys_segs = 16;
1301
1302         /*
1303          * Maximum number of sectors in one transfer. Limited by DMA boundary
1304          * size (512KiB).
1305          */
1306         mmc->max_req_size = 524288;
1307
1308         /*
1309          * Maximum segment size. Could be one segment with the maximum number
1310          * of bytes.
1311          */
1312         mmc->max_seg_size = mmc->max_req_size;
1313
1314         /*
1315          * Maximum block size. This varies from controller to controller and
1316          * is specified in the capabilities register.
1317          */
1318         mmc->max_blk_size = (caps & SDHCI_MAX_BLOCK_MASK) >> SDHCI_MAX_BLOCK_SHIFT;
1319         if (mmc->max_blk_size >= 3) {
1320                 printk(KERN_ERR "%s: Invalid maximum block size.\n",
1321                         host->slot_descr);
1322                 ret = -ENODEV;
1323                 goto unmap;
1324         }
1325         mmc->max_blk_size = 512 << mmc->max_blk_size;
1326
1327         /*
1328          * Maximum block count.
1329          */
1330         mmc->max_blk_count = 65535;
1331
1332         /*
1333          * Init tasklets.
1334          */
1335         tasklet_init(&host->card_tasklet,
1336                 sdhci_tasklet_card, (unsigned long)host);
1337         tasklet_init(&host->finish_tasklet,
1338                 sdhci_tasklet_finish, (unsigned long)host);
1339
1340         setup_timer(&host->timer, sdhci_timeout_timer, (unsigned long)host);
1341
1342         ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED,
1343                 host->slot_descr, host);
1344         if (ret)
1345                 goto untasklet;
1346
1347         sdhci_init(host);
1348
1349 #ifdef CONFIG_MMC_DEBUG
1350         sdhci_dumpregs(host);
1351 #endif
1352
1353         mmiowb();
1354
1355         mmc_add_host(mmc);
1356
1357         printk(KERN_INFO "%s: SDHCI at 0x%08lx irq %d %s\n", mmc_hostname(mmc),
1358                 host->addr, host->irq,
1359                 (host->flags & SDHCI_USE_DMA)?"DMA":"PIO");
1360
1361         return 0;
1362
1363 untasklet:
1364         tasklet_kill(&host->card_tasklet);
1365         tasklet_kill(&host->finish_tasklet);
1366 unmap:
1367         iounmap(host->ioaddr);
1368 release:
1369         pci_release_region(pdev, host->bar);
1370 free:
1371         mmc_free_host(mmc);
1372
1373         return ret;
1374 }
1375
1376 static void sdhci_remove_slot(struct pci_dev *pdev, int slot)
1377 {
1378         struct sdhci_chip *chip;
1379         struct mmc_host *mmc;
1380         struct sdhci_host *host;
1381
1382         chip = pci_get_drvdata(pdev);
1383         host = chip->hosts[slot];
1384         mmc = host->mmc;
1385
1386         chip->hosts[slot] = NULL;
1387
1388         mmc_remove_host(mmc);
1389
1390         sdhci_reset(host, SDHCI_RESET_ALL);
1391
1392         free_irq(host->irq, host);
1393
1394         del_timer_sync(&host->timer);
1395
1396         tasklet_kill(&host->card_tasklet);
1397         tasklet_kill(&host->finish_tasklet);
1398
1399         iounmap(host->ioaddr);
1400
1401         pci_release_region(pdev, host->bar);
1402
1403         mmc_free_host(mmc);
1404 }
1405
1406 static int __devinit sdhci_probe(struct pci_dev *pdev,
1407         const struct pci_device_id *ent)
1408 {
1409         int ret, i;
1410         u8 slots, rev;
1411         struct sdhci_chip *chip;
1412
1413         BUG_ON(pdev == NULL);
1414         BUG_ON(ent == NULL);
1415
1416         pci_read_config_byte(pdev, PCI_CLASS_REVISION, &rev);
1417
1418         printk(KERN_INFO DRIVER_NAME
1419                 ": SDHCI controller found at %s [%04x:%04x] (rev %x)\n",
1420                 pci_name(pdev), (int)pdev->vendor, (int)pdev->device,
1421                 (int)rev);
1422
1423         ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1424         if (ret)
1425                 return ret;
1426
1427         slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1428         DBG("found %d slot(s)\n", slots);
1429         if (slots == 0)
1430                 return -ENODEV;
1431
1432         ret = pci_enable_device(pdev);
1433         if (ret)
1434                 return ret;
1435
1436         chip = kzalloc(sizeof(struct sdhci_chip) +
1437                 sizeof(struct sdhci_host*) * slots, GFP_KERNEL);
1438         if (!chip) {
1439                 ret = -ENOMEM;
1440                 goto err;
1441         }
1442
1443         chip->pdev = pdev;
1444         chip->quirks = ent->driver_data;
1445
1446         if (debug_quirks)
1447                 chip->quirks = debug_quirks;
1448
1449         chip->num_slots = slots;
1450         pci_set_drvdata(pdev, chip);
1451
1452         for (i = 0;i < slots;i++) {
1453                 ret = sdhci_probe_slot(pdev, i);
1454                 if (ret) {
1455                         for (i--;i >= 0;i--)
1456                                 sdhci_remove_slot(pdev, i);
1457                         goto free;
1458                 }
1459         }
1460
1461         return 0;
1462
1463 free:
1464         pci_set_drvdata(pdev, NULL);
1465         kfree(chip);
1466
1467 err:
1468         pci_disable_device(pdev);
1469         return ret;
1470 }
1471
1472 static void __devexit sdhci_remove(struct pci_dev *pdev)
1473 {
1474         int i;
1475         struct sdhci_chip *chip;
1476
1477         chip = pci_get_drvdata(pdev);
1478
1479         if (chip) {
1480                 for (i = 0;i < chip->num_slots;i++)
1481                         sdhci_remove_slot(pdev, i);
1482
1483                 pci_set_drvdata(pdev, NULL);
1484
1485                 kfree(chip);
1486         }
1487
1488         pci_disable_device(pdev);
1489 }
1490
1491 static struct pci_driver sdhci_driver = {
1492         .name =         DRIVER_NAME,
1493         .id_table =     pci_ids,
1494         .probe =        sdhci_probe,
1495         .remove =       __devexit_p(sdhci_remove),
1496         .suspend =      sdhci_suspend,
1497         .resume =       sdhci_resume,
1498 };
1499
1500 /*****************************************************************************\
1501  *                                                                           *
1502  * Driver init/exit                                                          *
1503  *                                                                           *
1504 \*****************************************************************************/
1505
1506 static int __init sdhci_drv_init(void)
1507 {
1508         printk(KERN_INFO DRIVER_NAME
1509                 ": Secure Digital Host Controller Interface driver\n");
1510         printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n");
1511
1512         return pci_register_driver(&sdhci_driver);
1513 }
1514
1515 static void __exit sdhci_drv_exit(void)
1516 {
1517         DBG("Exiting\n");
1518
1519         pci_unregister_driver(&sdhci_driver);
1520 }
1521
1522 module_init(sdhci_drv_init);
1523 module_exit(sdhci_drv_exit);
1524
1525 module_param(debug_nodma, uint, 0444);
1526 module_param(debug_forcedma, uint, 0444);
1527 module_param(debug_quirks, uint, 0444);
1528
1529 MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>");
1530 MODULE_DESCRIPTION("Secure Digital Host Controller Interface driver");
1531 MODULE_LICENSE("GPL");
1532
1533 MODULE_PARM_DESC(debug_nodma, "Forcefully disable DMA transfers. (default 0)");
1534 MODULE_PARM_DESC(debug_forcedma, "Forcefully enable DMA transfers. (default 0)");
1535 MODULE_PARM_DESC(debug_quirks, "Force certain quirks.");