1 // SPDX-License-Identifier: GPL-2.0
3 * DMA support use of SYS DMAC with SDHI SD/SDIO controller
5 * Copyright (C) 2016-17 Renesas Electronics Corporation
6 * Copyright (C) 2016-17 Sang Engineering, Wolfram Sang
7 * Copyright (C) 2017 Horms Solutions, Simon Horman
8 * Copyright (C) 2010-2011 Guennadi Liakhovetski
11 #include <linux/device.h>
12 #include <linux/dma-mapping.h>
13 #include <linux/dmaengine.h>
14 #include <linux/mfd/tmio.h>
15 #include <linux/mmc/host.h>
16 #include <linux/mod_devicetable.h>
17 #include <linux/module.h>
18 #include <linux/of_device.h>
19 #include <linux/pagemap.h>
20 #include <linux/scatterlist.h>
21 #include <linux/sys_soc.h>
23 #include "renesas_sdhi.h"
26 #define TMIO_MMC_MIN_DMA_LEN 8
28 static const struct renesas_sdhi_of_data of_default_cfg = {
29 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
32 static const struct renesas_sdhi_of_data of_rz_compatible = {
33 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_32BIT_DATA_PORT |
35 .tmio_ocr_mask = MMC_VDD_32_33,
36 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
39 static const struct renesas_sdhi_of_data of_rcar_gen1_compatible = {
40 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL,
41 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
42 .capabilities2 = MMC_CAP2_NO_WRITE_PROTECT,
45 /* Definitions for sampling clocks */
46 static struct renesas_sdhi_scc rcar_gen2_scc_taps[] = {
48 .clk_rate = 156000000,
57 static const struct renesas_sdhi_of_data of_rcar_gen2_compatible = {
58 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL |
59 TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2,
60 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
62 .capabilities2 = MMC_CAP2_NO_WRITE_PROTECT,
63 .dma_buswidth = DMA_SLAVE_BUSWIDTH_4_BYTES,
64 .dma_rx_offset = 0x2000,
66 .taps = rcar_gen2_scc_taps,
67 .taps_num = ARRAY_SIZE(rcar_gen2_scc_taps),
70 /* Definitions for sampling clocks */
71 static struct renesas_sdhi_scc rcar_gen3_scc_taps[] = {
78 static const struct renesas_sdhi_of_data of_rcar_r8a7795_compatible = {
79 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL |
80 TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2 |
81 TMIO_MMC_HAVE_4TAP_HS400,
82 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
84 .capabilities2 = MMC_CAP2_NO_WRITE_PROTECT,
87 .taps = rcar_gen3_scc_taps,
88 .taps_num = ARRAY_SIZE(rcar_gen3_scc_taps),
91 static const struct renesas_sdhi_of_data of_rcar_gen3_compatible = {
92 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL |
93 TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2,
94 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
96 .capabilities2 = MMC_CAP2_NO_WRITE_PROTECT,
99 .taps = rcar_gen3_scc_taps,
100 .taps_num = ARRAY_SIZE(rcar_gen3_scc_taps),
103 static const struct of_device_id renesas_sdhi_sys_dmac_of_match[] = {
104 { .compatible = "renesas,sdhi-sh73a0", .data = &of_default_cfg, },
105 { .compatible = "renesas,sdhi-r8a73a4", .data = &of_default_cfg, },
106 { .compatible = "renesas,sdhi-r8a7740", .data = &of_default_cfg, },
107 { .compatible = "renesas,sdhi-r7s72100", .data = &of_rz_compatible, },
108 { .compatible = "renesas,sdhi-r8a7778", .data = &of_rcar_gen1_compatible, },
109 { .compatible = "renesas,sdhi-r8a7779", .data = &of_rcar_gen1_compatible, },
110 { .compatible = "renesas,sdhi-r8a7743", .data = &of_rcar_gen2_compatible, },
111 { .compatible = "renesas,sdhi-r8a7745", .data = &of_rcar_gen2_compatible, },
112 { .compatible = "renesas,sdhi-r8a7790", .data = &of_rcar_gen2_compatible, },
113 { .compatible = "renesas,sdhi-r8a7791", .data = &of_rcar_gen2_compatible, },
114 { .compatible = "renesas,sdhi-r8a7792", .data = &of_rcar_gen2_compatible, },
115 { .compatible = "renesas,sdhi-r8a7793", .data = &of_rcar_gen2_compatible, },
116 { .compatible = "renesas,sdhi-r8a7794", .data = &of_rcar_gen2_compatible, },
117 { .compatible = "renesas,sdhi-r8a7795", .data = &of_rcar_r8a7795_compatible, },
118 { .compatible = "renesas,sdhi-r8a7796", .data = &of_rcar_r8a7795_compatible, },
119 { .compatible = "renesas,rcar-gen1-sdhi", .data = &of_rcar_gen1_compatible, },
120 { .compatible = "renesas,rcar-gen2-sdhi", .data = &of_rcar_gen2_compatible, },
121 { .compatible = "renesas,rcar-gen3-sdhi", .data = &of_rcar_gen3_compatible, },
122 { .compatible = "renesas,sdhi-shmobile" },
125 MODULE_DEVICE_TABLE(of, renesas_sdhi_sys_dmac_of_match);
127 static void renesas_sdhi_sys_dmac_enable_dma(struct tmio_mmc_host *host,
130 struct renesas_sdhi *priv = host_to_priv(host);
132 if (!host->chan_tx || !host->chan_rx)
135 if (priv->dma_priv.enable)
136 priv->dma_priv.enable(host, enable);
139 static void renesas_sdhi_sys_dmac_abort_dma(struct tmio_mmc_host *host)
141 renesas_sdhi_sys_dmac_enable_dma(host, false);
144 dmaengine_terminate_all(host->chan_rx);
146 dmaengine_terminate_all(host->chan_tx);
148 renesas_sdhi_sys_dmac_enable_dma(host, true);
151 static void renesas_sdhi_sys_dmac_dataend_dma(struct tmio_mmc_host *host)
153 struct renesas_sdhi *priv = host_to_priv(host);
155 complete(&priv->dma_priv.dma_dataend);
158 static void renesas_sdhi_sys_dmac_dma_callback(void *arg)
160 struct tmio_mmc_host *host = arg;
161 struct renesas_sdhi *priv = host_to_priv(host);
163 spin_lock_irq(&host->lock);
168 if (host->data->flags & MMC_DATA_READ)
169 dma_unmap_sg(host->chan_rx->device->dev,
170 host->sg_ptr, host->sg_len,
173 dma_unmap_sg(host->chan_tx->device->dev,
174 host->sg_ptr, host->sg_len,
177 spin_unlock_irq(&host->lock);
179 wait_for_completion(&priv->dma_priv.dma_dataend);
181 spin_lock_irq(&host->lock);
182 tmio_mmc_do_data_irq(host);
184 spin_unlock_irq(&host->lock);
187 static void renesas_sdhi_sys_dmac_start_dma_rx(struct tmio_mmc_host *host)
189 struct renesas_sdhi *priv = host_to_priv(host);
190 struct scatterlist *sg = host->sg_ptr, *sg_tmp;
191 struct dma_async_tx_descriptor *desc = NULL;
192 struct dma_chan *chan = host->chan_rx;
195 bool aligned = true, multiple = true;
196 unsigned int align = (1 << host->pdata->alignment_shift) - 1;
198 for_each_sg(sg, sg_tmp, host->sg_len, i) {
199 if (sg_tmp->offset & align)
201 if (sg_tmp->length & align) {
207 if ((!aligned && (host->sg_len > 1 || sg->length > PAGE_SIZE ||
208 (align & PAGE_MASK))) || !multiple) {
213 if (sg->length < TMIO_MMC_MIN_DMA_LEN)
216 /* The only sg element can be unaligned, use our bounce buffer then */
218 sg_init_one(&host->bounce_sg, host->bounce_buf, sg->length);
219 host->sg_ptr = &host->bounce_sg;
223 ret = dma_map_sg(chan->device->dev, sg, host->sg_len, DMA_FROM_DEVICE);
225 desc = dmaengine_prep_slave_sg(chan, sg, ret, DMA_DEV_TO_MEM,
229 reinit_completion(&priv->dma_priv.dma_dataend);
230 desc->callback = renesas_sdhi_sys_dmac_dma_callback;
231 desc->callback_param = host;
233 cookie = dmaengine_submit(desc);
242 /* DMA failed, fall back to PIO */
243 renesas_sdhi_sys_dmac_enable_dma(host, false);
246 host->chan_rx = NULL;
247 dma_release_channel(chan);
248 /* Free the Tx channel too */
249 chan = host->chan_tx;
251 host->chan_tx = NULL;
252 dma_release_channel(chan);
254 dev_warn(&host->pdev->dev,
255 "DMA failed: %d, falling back to PIO\n", ret);
259 static void renesas_sdhi_sys_dmac_start_dma_tx(struct tmio_mmc_host *host)
261 struct renesas_sdhi *priv = host_to_priv(host);
262 struct scatterlist *sg = host->sg_ptr, *sg_tmp;
263 struct dma_async_tx_descriptor *desc = NULL;
264 struct dma_chan *chan = host->chan_tx;
267 bool aligned = true, multiple = true;
268 unsigned int align = (1 << host->pdata->alignment_shift) - 1;
270 for_each_sg(sg, sg_tmp, host->sg_len, i) {
271 if (sg_tmp->offset & align)
273 if (sg_tmp->length & align) {
279 if ((!aligned && (host->sg_len > 1 || sg->length > PAGE_SIZE ||
280 (align & PAGE_MASK))) || !multiple) {
285 if (sg->length < TMIO_MMC_MIN_DMA_LEN)
288 /* The only sg element can be unaligned, use our bounce buffer then */
291 void *sg_vaddr = tmio_mmc_kmap_atomic(sg, &flags);
293 sg_init_one(&host->bounce_sg, host->bounce_buf, sg->length);
294 memcpy(host->bounce_buf, sg_vaddr, host->bounce_sg.length);
295 tmio_mmc_kunmap_atomic(sg, &flags, sg_vaddr);
296 host->sg_ptr = &host->bounce_sg;
300 ret = dma_map_sg(chan->device->dev, sg, host->sg_len, DMA_TO_DEVICE);
302 desc = dmaengine_prep_slave_sg(chan, sg, ret, DMA_MEM_TO_DEV,
306 reinit_completion(&priv->dma_priv.dma_dataend);
307 desc->callback = renesas_sdhi_sys_dmac_dma_callback;
308 desc->callback_param = host;
310 cookie = dmaengine_submit(desc);
319 /* DMA failed, fall back to PIO */
320 renesas_sdhi_sys_dmac_enable_dma(host, false);
323 host->chan_tx = NULL;
324 dma_release_channel(chan);
325 /* Free the Rx channel too */
326 chan = host->chan_rx;
328 host->chan_rx = NULL;
329 dma_release_channel(chan);
331 dev_warn(&host->pdev->dev,
332 "DMA failed: %d, falling back to PIO\n", ret);
336 static void renesas_sdhi_sys_dmac_start_dma(struct tmio_mmc_host *host,
337 struct mmc_data *data)
339 if (data->flags & MMC_DATA_READ) {
341 renesas_sdhi_sys_dmac_start_dma_rx(host);
344 renesas_sdhi_sys_dmac_start_dma_tx(host);
348 static void renesas_sdhi_sys_dmac_issue_tasklet_fn(unsigned long priv)
350 struct tmio_mmc_host *host = (struct tmio_mmc_host *)priv;
351 struct dma_chan *chan = NULL;
353 spin_lock_irq(&host->lock);
356 if (host->data->flags & MMC_DATA_READ)
357 chan = host->chan_rx;
359 chan = host->chan_tx;
362 spin_unlock_irq(&host->lock);
364 tmio_mmc_enable_mmc_irqs(host, TMIO_STAT_DATAEND);
367 dma_async_issue_pending(chan);
370 static void renesas_sdhi_sys_dmac_request_dma(struct tmio_mmc_host *host,
371 struct tmio_mmc_data *pdata)
373 struct renesas_sdhi *priv = host_to_priv(host);
375 /* We can only either use DMA for both Tx and Rx or not use it at all */
376 if (!host->pdev->dev.of_node &&
377 (!pdata->chan_priv_tx || !pdata->chan_priv_rx))
380 if (!host->chan_tx && !host->chan_rx) {
381 struct resource *res = platform_get_resource(host->pdev,
383 struct dma_slave_config cfg = {};
391 dma_cap_set(DMA_SLAVE, mask);
393 host->chan_tx = dma_request_slave_channel_compat(mask,
394 priv->dma_priv.filter, pdata->chan_priv_tx,
395 &host->pdev->dev, "tx");
396 dev_dbg(&host->pdev->dev, "%s: TX: got channel %p\n", __func__,
402 cfg.direction = DMA_MEM_TO_DEV;
403 cfg.dst_addr = res->start +
404 (CTL_SD_DATA_PORT << host->bus_shift);
405 cfg.dst_addr_width = priv->dma_priv.dma_buswidth;
406 if (!cfg.dst_addr_width)
407 cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
409 ret = dmaengine_slave_config(host->chan_tx, &cfg);
413 host->chan_rx = dma_request_slave_channel_compat(mask,
414 priv->dma_priv.filter, pdata->chan_priv_rx,
415 &host->pdev->dev, "rx");
416 dev_dbg(&host->pdev->dev, "%s: RX: got channel %p\n", __func__,
422 cfg.direction = DMA_DEV_TO_MEM;
423 cfg.src_addr = cfg.dst_addr + host->pdata->dma_rx_offset;
424 cfg.src_addr_width = priv->dma_priv.dma_buswidth;
425 if (!cfg.src_addr_width)
426 cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
428 ret = dmaengine_slave_config(host->chan_rx, &cfg);
432 host->bounce_buf = (u8 *)__get_free_page(GFP_KERNEL | GFP_DMA);
433 if (!host->bounce_buf)
436 init_completion(&priv->dma_priv.dma_dataend);
437 tasklet_init(&host->dma_issue,
438 renesas_sdhi_sys_dmac_issue_tasklet_fn,
439 (unsigned long)host);
442 renesas_sdhi_sys_dmac_enable_dma(host, true);
448 dma_release_channel(host->chan_rx);
449 host->chan_rx = NULL;
452 dma_release_channel(host->chan_tx);
453 host->chan_tx = NULL;
456 static void renesas_sdhi_sys_dmac_release_dma(struct tmio_mmc_host *host)
459 struct dma_chan *chan = host->chan_tx;
461 host->chan_tx = NULL;
462 dma_release_channel(chan);
465 struct dma_chan *chan = host->chan_rx;
467 host->chan_rx = NULL;
468 dma_release_channel(chan);
470 if (host->bounce_buf) {
471 free_pages((unsigned long)host->bounce_buf, 0);
472 host->bounce_buf = NULL;
476 static const struct tmio_mmc_dma_ops renesas_sdhi_sys_dmac_dma_ops = {
477 .start = renesas_sdhi_sys_dmac_start_dma,
478 .enable = renesas_sdhi_sys_dmac_enable_dma,
479 .request = renesas_sdhi_sys_dmac_request_dma,
480 .release = renesas_sdhi_sys_dmac_release_dma,
481 .abort = renesas_sdhi_sys_dmac_abort_dma,
482 .dataend = renesas_sdhi_sys_dmac_dataend_dma,
486 * Whitelist of specific R-Car Gen3 SoC ES versions to use this DMAC
487 * implementation. Currently empty as all supported ES versions use
490 static const struct soc_device_attribute gen3_soc_whitelist[] = {
494 static int renesas_sdhi_sys_dmac_probe(struct platform_device *pdev)
496 if ((of_device_get_match_data(&pdev->dev) == &of_rcar_gen3_compatible ||
497 of_device_get_match_data(&pdev->dev) == &of_rcar_r8a7795_compatible) &&
498 !soc_device_match(gen3_soc_whitelist))
501 return renesas_sdhi_probe(pdev, &renesas_sdhi_sys_dmac_dma_ops);
504 static const struct dev_pm_ops renesas_sdhi_sys_dmac_dev_pm_ops = {
505 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
506 pm_runtime_force_resume)
507 SET_RUNTIME_PM_OPS(tmio_mmc_host_runtime_suspend,
508 tmio_mmc_host_runtime_resume,
512 static struct platform_driver renesas_sys_dmac_sdhi_driver = {
514 .name = "sh_mobile_sdhi",
515 .pm = &renesas_sdhi_sys_dmac_dev_pm_ops,
516 .of_match_table = renesas_sdhi_sys_dmac_of_match,
518 .probe = renesas_sdhi_sys_dmac_probe,
519 .remove = renesas_sdhi_remove,
522 module_platform_driver(renesas_sys_dmac_sdhi_driver);
524 MODULE_DESCRIPTION("Renesas SDHI driver");
525 MODULE_AUTHOR("Magnus Damm");
526 MODULE_LICENSE("GPL v2");
527 MODULE_ALIAS("platform:sh_mobile_sdhi");