drivers/mmc/host/renesas_sdhi_sys_dmac.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * DMA support use of SYS DMAC with SDHI SD/SDIO controller
   4  *
   5  * Copyright (C) 2016-17 Renesas Electronics Corporation
   6  * Copyright (C) 2016-17 Sang Engineering, Wolfram Sang
   7  * Copyright (C) 2017 Horms Solutions, Simon Horman
   8  * Copyright (C) 2010-2011 Guennadi Liakhovetski
   9  */
  10
  11 #include <linux/device.h>
  12 #include <linux/dma-mapping.h>
  13 #include <linux/dmaengine.h>
  14 #include <linux/mfd/tmio.h>
  15 #include <linux/mmc/host.h>
  16 #include <linux/mod_devicetable.h>
  17 #include <linux/module.h>
  18 #include <linux/of_device.h>
  19 #include <linux/pagemap.h>
  20 #include <linux/scatterlist.h>
  21 #include <linux/sys_soc.h>
  22
  23 #include "renesas_sdhi.h"
  24 #include "tmio_mmc.h"
  25
  26 #define TMIO_MMC_MIN_DMA_LEN 8
  27
  28 static const struct renesas_sdhi_of_data of_default_cfg = {
  29         .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
  30 };
  31
  32 static const struct renesas_sdhi_of_data of_rz_compatible = {
  33         .tmio_flags     = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_32BIT_DATA_PORT |
  34                           TMIO_MMC_HAVE_CBSY,
  35         .tmio_ocr_mask  = MMC_VDD_32_33,
  36         .capabilities   = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
  37 };
  38
  39 static const struct renesas_sdhi_of_data of_rcar_gen1_compatible = {
  40         .tmio_flags     = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL,
  41         .capabilities   = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
  42         .capabilities2  = MMC_CAP2_NO_WRITE_PROTECT,
  43 };
  44
  45 /* Definitions for sampling clocks */
  46 static struct renesas_sdhi_scc rcar_gen2_scc_taps[] = {
  47         {
  48                 .clk_rate = 156000000,
  49                 .tap = 0x00000703,
  50         },
  51         {
  52                 .clk_rate = 0,
  53                 .tap = 0x00000300,
  54         },
  55 };
  56
  57 static const struct renesas_sdhi_of_data of_rcar_gen2_compatible = {
  58         .tmio_flags     = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL |
  59                           TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2,
  60         .capabilities   = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
  61                           MMC_CAP_CMD23,
  62         .capabilities2  = MMC_CAP2_NO_WRITE_PROTECT,
  63         .dma_buswidth   = DMA_SLAVE_BUSWIDTH_4_BYTES,
  64         .dma_rx_offset  = 0x2000,
  65         .scc_offset     = 0x0300,
  66         .taps           = rcar_gen2_scc_taps,
  67         .taps_num       = ARRAY_SIZE(rcar_gen2_scc_taps),
  68         .max_blk_count  = 0xffffffff,
  69 };
  70
  71 /* Definitions for sampling clocks */
  72 static struct renesas_sdhi_scc rcar_gen3_scc_taps[] = {
  73         {
  74                 .clk_rate = 0,
  75                 .tap = 0x00000300,
  76         },
  77 };
  78
  79 static const struct renesas_sdhi_of_data of_rcar_gen3_compatible = {
  80         .tmio_flags     = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL |
  81                           TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2,
  82         .capabilities   = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
  83                           MMC_CAP_CMD23,
  84         .capabilities2  = MMC_CAP2_NO_WRITE_PROTECT,
  85         .bus_shift      = 2,
  86         .scc_offset     = 0x1000,
  87         .taps           = rcar_gen3_scc_taps,
  88         .taps_num       = ARRAY_SIZE(rcar_gen3_scc_taps),
  89 };
  90
  91 static const struct of_device_id renesas_sdhi_sys_dmac_of_match[] = {
  92         { .compatible = "renesas,sdhi-sh73a0", .data = &of_default_cfg, },
  93         { .compatible = "renesas,sdhi-r8a73a4", .data = &of_default_cfg, },
  94         { .compatible = "renesas,sdhi-r8a7740", .data = &of_default_cfg, },
  95         { .compatible = "renesas,sdhi-r7s72100", .data = &of_rz_compatible, },
  96         { .compatible = "renesas,sdhi-r8a7778", .data = &of_rcar_gen1_compatible, },
  97         { .compatible = "renesas,sdhi-r8a7779", .data = &of_rcar_gen1_compatible, },
  98         { .compatible = "renesas,sdhi-r8a7743", .data = &of_rcar_gen2_compatible, },
  99         { .compatible = "renesas,sdhi-r8a7745", .data = &of_rcar_gen2_compatible, },
 100         { .compatible = "renesas,sdhi-r8a7790", .data = &of_rcar_gen2_compatible, },
 101         { .compatible = "renesas,sdhi-r8a7791", .data = &of_rcar_gen2_compatible, },
 102         { .compatible = "renesas,sdhi-r8a7792", .data = &of_rcar_gen2_compatible, },
 103         { .compatible = "renesas,sdhi-r8a7793", .data = &of_rcar_gen2_compatible, },
 104         { .compatible = "renesas,sdhi-r8a7794", .data = &of_rcar_gen2_compatible, },
 105         { .compatible = "renesas,sdhi-r8a7795", .data = &of_rcar_gen3_compatible, },
 106         { .compatible = "renesas,sdhi-r8a7796", .data = &of_rcar_gen3_compatible, },
 107         { .compatible = "renesas,rcar-gen1-sdhi", .data = &of_rcar_gen1_compatible, },
 108         { .compatible = "renesas,rcar-gen2-sdhi", .data = &of_rcar_gen2_compatible, },
 109         { .compatible = "renesas,rcar-gen3-sdhi", .data = &of_rcar_gen3_compatible, },
 110         { .compatible = "renesas,sdhi-shmobile" },
 111         {},
 112 };
 113 MODULE_DEVICE_TABLE(of, renesas_sdhi_sys_dmac_of_match);
 114
 115 static void renesas_sdhi_sys_dmac_enable_dma(struct tmio_mmc_host *host,
 116                                              bool enable)
 117 {
 118         struct renesas_sdhi *priv = host_to_priv(host);
 119
 120         if (!host->chan_tx || !host->chan_rx)
 121                 return;
 122
 123         if (priv->dma_priv.enable)
 124                 priv->dma_priv.enable(host, enable);
 125 }
 126
 127 static void renesas_sdhi_sys_dmac_abort_dma(struct tmio_mmc_host *host)
 128 {
 129         renesas_sdhi_sys_dmac_enable_dma(host, false);
 130
 131         if (host->chan_rx)
 132                 dmaengine_terminate_all(host->chan_rx);
 133         if (host->chan_tx)
 134                 dmaengine_terminate_all(host->chan_tx);
 135
 136         renesas_sdhi_sys_dmac_enable_dma(host, true);
 137 }
 138
 139 static void renesas_sdhi_sys_dmac_dataend_dma(struct tmio_mmc_host *host)
 140 {
 141         struct renesas_sdhi *priv = host_to_priv(host);
 142
 143         complete(&priv->dma_priv.dma_dataend);
 144 }
 145
 146 static void renesas_sdhi_sys_dmac_dma_callback(void *arg)
 147 {
 148         struct tmio_mmc_host *host = arg;
 149         struct renesas_sdhi *priv = host_to_priv(host);
 150
 151         spin_lock_irq(&host->lock);
 152
 153         if (!host->data)
 154                 goto out;
 155
 156         if (host->data->flags & MMC_DATA_READ)
 157                 dma_unmap_sg(host->chan_rx->device->dev,
 158                              host->sg_ptr, host->sg_len,
 159                              DMA_FROM_DEVICE);
 160         else
 161                 dma_unmap_sg(host->chan_tx->device->dev,
 162                              host->sg_ptr, host->sg_len,
 163                              DMA_TO_DEVICE);
 164
 165         spin_unlock_irq(&host->lock);
 166
 167         wait_for_completion(&priv->dma_priv.dma_dataend);
 168
 169         spin_lock_irq(&host->lock);
 170         tmio_mmc_do_data_irq(host);
 171 out:
 172         spin_unlock_irq(&host->lock);
 173 }
 174
 175 static void renesas_sdhi_sys_dmac_start_dma_rx(struct tmio_mmc_host *host)
 176 {
 177         struct renesas_sdhi *priv = host_to_priv(host);
 178         struct scatterlist *sg = host->sg_ptr, *sg_tmp;
 179         struct dma_async_tx_descriptor *desc = NULL;
 180         struct dma_chan *chan = host->chan_rx;
 181         dma_cookie_t cookie;
 182         int ret, i;
 183         bool aligned = true, multiple = true;
 184         unsigned int align = (1 << host->pdata->alignment_shift) - 1;
 185
 186         for_each_sg(sg, sg_tmp, host->sg_len, i) {
 187                 if (sg_tmp->offset & align)
 188                         aligned = false;
 189                 if (sg_tmp->length & align) {
 190                         multiple = false;
 191                         break;
 192                 }
 193         }
 194
 195         if ((!aligned && (host->sg_len > 1 || sg->length > PAGE_SIZE ||
 196                           (align & PAGE_MASK))) || !multiple) {
 197                 ret = -EINVAL;
 198                 goto pio;
 199         }
 200
 201         if (sg->length < TMIO_MMC_MIN_DMA_LEN)
 202                 return;
 203
 204         /* The only sg element can be unaligned, use our bounce buffer then */
 205         if (!aligned) {
 206                 sg_init_one(&host->bounce_sg, host->bounce_buf, sg->length);
 207                 host->sg_ptr = &host->bounce_sg;
 208                 sg = host->sg_ptr;
 209         }
 210
 211         ret = dma_map_sg(chan->device->dev, sg, host->sg_len, DMA_FROM_DEVICE);
 212         if (ret > 0)
 213                 desc = dmaengine_prep_slave_sg(chan, sg, ret, DMA_DEV_TO_MEM,
 214                                                DMA_CTRL_ACK);
 215
 216         if (desc) {
 217                 reinit_completion(&priv->dma_priv.dma_dataend);
 218                 desc->callback = renesas_sdhi_sys_dmac_dma_callback;
 219                 desc->callback_param = host;
 220
 221                 cookie = dmaengine_submit(desc);
 222                 if (cookie < 0) {
 223                         desc = NULL;
 224                         ret = cookie;
 225                 }
 226                 host->dma_on = true;
 227         }
 228 pio:
 229         if (!desc) {
 230                 /* DMA failed, fall back to PIO */
 231                 renesas_sdhi_sys_dmac_enable_dma(host, false);
 232                 if (ret >= 0)
 233                         ret = -EIO;
 234                 host->chan_rx = NULL;
 235                 dma_release_channel(chan);
 236                 /* Free the Tx channel too */
 237                 chan = host->chan_tx;
 238                 if (chan) {
 239                         host->chan_tx = NULL;
 240                         dma_release_channel(chan);
 241                 }
 242                 dev_warn(&host->pdev->dev,
 243                          "DMA failed: %d, falling back to PIO\n", ret);
 244         }
 245 }
 246
 247 static void renesas_sdhi_sys_dmac_start_dma_tx(struct tmio_mmc_host *host)
 248 {
 249         struct renesas_sdhi *priv = host_to_priv(host);
 250         struct scatterlist *sg = host->sg_ptr, *sg_tmp;
 251         struct dma_async_tx_descriptor *desc = NULL;
 252         struct dma_chan *chan = host->chan_tx;
 253         dma_cookie_t cookie;
 254         int ret, i;
 255         bool aligned = true, multiple = true;
 256         unsigned int align = (1 << host->pdata->alignment_shift) - 1;
 257
 258         for_each_sg(sg, sg_tmp, host->sg_len, i) {
 259                 if (sg_tmp->offset & align)
 260                         aligned = false;
 261                 if (sg_tmp->length & align) {
 262                         multiple = false;
 263                         break;
 264                 }
 265         }
 266
 267         if ((!aligned && (host->sg_len > 1 || sg->length > PAGE_SIZE ||
 268                           (align & PAGE_MASK))) || !multiple) {
 269                 ret = -EINVAL;
 270                 goto pio;
 271         }
 272
 273         if (sg->length < TMIO_MMC_MIN_DMA_LEN)
 274                 return;
 275
 276         /* The only sg element can be unaligned, use our bounce buffer then */
 277         if (!aligned) {
 278                 unsigned long flags;
 279                 void *sg_vaddr = tmio_mmc_kmap_atomic(sg, &flags);
 280
 281                 sg_init_one(&host->bounce_sg, host->bounce_buf, sg->length);
 282                 memcpy(host->bounce_buf, sg_vaddr, host->bounce_sg.length);
 283                 tmio_mmc_kunmap_atomic(sg, &flags, sg_vaddr);
 284                 host->sg_ptr = &host->bounce_sg;
 285                 sg = host->sg_ptr;
 286         }
 287
 288         ret = dma_map_sg(chan->device->dev, sg, host->sg_len, DMA_TO_DEVICE);
 289         if (ret > 0)
 290                 desc = dmaengine_prep_slave_sg(chan, sg, ret, DMA_MEM_TO_DEV,
 291                                                DMA_CTRL_ACK);
 292
 293         if (desc) {
 294                 reinit_completion(&priv->dma_priv.dma_dataend);
 295                 desc->callback = renesas_sdhi_sys_dmac_dma_callback;
 296                 desc->callback_param = host;
 297
 298                 cookie = dmaengine_submit(desc);
 299                 if (cookie < 0) {
 300                         desc = NULL;
 301                         ret = cookie;
 302                 }
 303                 host->dma_on = true;
 304         }
 305 pio:
 306         if (!desc) {
 307                 /* DMA failed, fall back to PIO */
 308                 renesas_sdhi_sys_dmac_enable_dma(host, false);
 309                 if (ret >= 0)
 310                         ret = -EIO;
 311                 host->chan_tx = NULL;
 312                 dma_release_channel(chan);
 313                 /* Free the Rx channel too */
 314                 chan = host->chan_rx;
 315                 if (chan) {
 316                         host->chan_rx = NULL;
 317                         dma_release_channel(chan);
 318                 }
 319                 dev_warn(&host->pdev->dev,
 320                          "DMA failed: %d, falling back to PIO\n", ret);
 321         }
 322 }
 323
 324 static void renesas_sdhi_sys_dmac_start_dma(struct tmio_mmc_host *host,
 325                                             struct mmc_data *data)
 326 {
 327         if (data->flags & MMC_DATA_READ) {
 328                 if (host->chan_rx)
 329                         renesas_sdhi_sys_dmac_start_dma_rx(host);
 330         } else {
 331                 if (host->chan_tx)
 332                         renesas_sdhi_sys_dmac_start_dma_tx(host);
 333         }
 334 }
 335
 336 static void renesas_sdhi_sys_dmac_issue_tasklet_fn(unsigned long priv)
 337 {
 338         struct tmio_mmc_host *host = (struct tmio_mmc_host *)priv;
 339         struct dma_chan *chan = NULL;
 340
 341         spin_lock_irq(&host->lock);
 342
 343         if (host->data) {
 344                 if (host->data->flags & MMC_DATA_READ)
 345                         chan = host->chan_rx;
 346                 else
 347                         chan = host->chan_tx;
 348         }
 349
 350         spin_unlock_irq(&host->lock);
 351
 352         tmio_mmc_enable_mmc_irqs(host, TMIO_STAT_DATAEND);
 353
 354         if (chan)
 355                 dma_async_issue_pending(chan);
 356 }
 357
 358 static void renesas_sdhi_sys_dmac_request_dma(struct tmio_mmc_host *host,
 359                                               struct tmio_mmc_data *pdata)
 360 {
 361         struct renesas_sdhi *priv = host_to_priv(host);
 362
 363         /* We can only either use DMA for both Tx and Rx or not use it at all */
 364         if (!host->pdev->dev.of_node &&
 365             (!pdata->chan_priv_tx || !pdata->chan_priv_rx))
 366                 return;
 367
 368         if (!host->chan_tx && !host->chan_rx) {
 369                 struct resource *res = platform_get_resource(host->pdev,
 370                                                              IORESOURCE_MEM, 0);
 371                 struct dma_slave_config cfg = {};
 372                 dma_cap_mask_t mask;
 373                 int ret;
 374
 375                 if (!res)
 376                         return;
 377
 378                 dma_cap_zero(mask);
 379                 dma_cap_set(DMA_SLAVE, mask);
 380
 381                 host->chan_tx = dma_request_slave_channel_compat(mask,
 382                                         priv->dma_priv.filter, pdata->chan_priv_tx,
 383                                         &host->pdev->dev, "tx");
 384                 dev_dbg(&host->pdev->dev, "%s: TX: got channel %p\n", __func__,
 385                         host->chan_tx);
 386
 387                 if (!host->chan_tx)
 388                         return;
 389
 390                 cfg.direction = DMA_MEM_TO_DEV;
 391                 cfg.dst_addr = res->start +
 392                         (CTL_SD_DATA_PORT << host->bus_shift);
 393                 cfg.dst_addr_width = priv->dma_priv.dma_buswidth;
 394                 if (!cfg.dst_addr_width)
 395                         cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
 396                 cfg.src_addr = 0;
 397                 ret = dmaengine_slave_config(host->chan_tx, &cfg);
 398                 if (ret < 0)
 399                         goto ecfgtx;
 400
 401                 host->chan_rx = dma_request_slave_channel_compat(mask,
 402                                         priv->dma_priv.filter, pdata->chan_priv_rx,
 403                                         &host->pdev->dev, "rx");
 404                 dev_dbg(&host->pdev->dev, "%s: RX: got channel %p\n", __func__,
 405                         host->chan_rx);
 406
 407                 if (!host->chan_rx)
 408                         goto ereqrx;
 409
 410                 cfg.direction = DMA_DEV_TO_MEM;
 411                 cfg.src_addr = cfg.dst_addr + host->pdata->dma_rx_offset;
 412                 cfg.src_addr_width = priv->dma_priv.dma_buswidth;
 413                 if (!cfg.src_addr_width)
 414                         cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
 415                 cfg.dst_addr = 0;
 416                 ret = dmaengine_slave_config(host->chan_rx, &cfg);
 417                 if (ret < 0)
 418                         goto ecfgrx;
 419
 420                 host->bounce_buf = (u8 *)__get_free_page(GFP_KERNEL | GFP_DMA);
 421                 if (!host->bounce_buf)
 422                         goto ebouncebuf;
 423
 424                 init_completion(&priv->dma_priv.dma_dataend);
 425                 tasklet_init(&host->dma_issue,
 426                              renesas_sdhi_sys_dmac_issue_tasklet_fn,
 427                              (unsigned long)host);
 428         }
 429
 430         renesas_sdhi_sys_dmac_enable_dma(host, true);
 431
 432         return;
 433
 434 ebouncebuf:
 435 ecfgrx:
 436         dma_release_channel(host->chan_rx);
 437         host->chan_rx = NULL;
 438 ereqrx:
 439 ecfgtx:
 440         dma_release_channel(host->chan_tx);
 441         host->chan_tx = NULL;
 442 }
 443
 444 static void renesas_sdhi_sys_dmac_release_dma(struct tmio_mmc_host *host)
 445 {
 446         if (host->chan_tx) {
 447                 struct dma_chan *chan = host->chan_tx;
 448
 449                 host->chan_tx = NULL;
 450                 dma_release_channel(chan);
 451         }
 452         if (host->chan_rx) {
 453                 struct dma_chan *chan = host->chan_rx;
 454
 455                 host->chan_rx = NULL;
 456                 dma_release_channel(chan);
 457         }
 458         if (host->bounce_buf) {
 459                 free_pages((unsigned long)host->bounce_buf, 0);
 460                 host->bounce_buf = NULL;
 461         }
 462 }
 463
 464 static const struct tmio_mmc_dma_ops renesas_sdhi_sys_dmac_dma_ops = {
 465         .start = renesas_sdhi_sys_dmac_start_dma,
 466         .enable = renesas_sdhi_sys_dmac_enable_dma,
 467         .request = renesas_sdhi_sys_dmac_request_dma,
 468         .release = renesas_sdhi_sys_dmac_release_dma,
 469         .abort = renesas_sdhi_sys_dmac_abort_dma,
 470         .dataend = renesas_sdhi_sys_dmac_dataend_dma,
 471 };
 472
 473 /*
 474  * Whitelist of specific R-Car Gen3 SoC ES versions to use this DMAC
 475  * implementation. Currently empty as all supported ES versions use
 476  * the internal DMAC.
 477  */
 478 static const struct soc_device_attribute gen3_soc_whitelist[] = {
 479         { /* sentinel */ }
 480 };
 481
 482 static int renesas_sdhi_sys_dmac_probe(struct platform_device *pdev)
 483 {
 484         if (of_device_get_match_data(&pdev->dev) == &of_rcar_gen3_compatible &&
 485             !soc_device_match(gen3_soc_whitelist))
 486                 return -ENODEV;
 487
 488         return renesas_sdhi_probe(pdev, &renesas_sdhi_sys_dmac_dma_ops);
 489 }
 490
 491 static const struct dev_pm_ops renesas_sdhi_sys_dmac_dev_pm_ops = {
 492         SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
 493                                 pm_runtime_force_resume)
 494         SET_RUNTIME_PM_OPS(tmio_mmc_host_runtime_suspend,
 495                            tmio_mmc_host_runtime_resume,
 496                            NULL)
 497 };
 498
 499 static struct platform_driver renesas_sys_dmac_sdhi_driver = {
 500         .driver         = {
 501                 .name   = "sh_mobile_sdhi",
 502                 .pm     = &renesas_sdhi_sys_dmac_dev_pm_ops,
 503                 .of_match_table = renesas_sdhi_sys_dmac_of_match,
 504         },
 505         .probe          = renesas_sdhi_sys_dmac_probe,
 506         .remove         = renesas_sdhi_remove,
 507 };
 508
 509 module_platform_driver(renesas_sys_dmac_sdhi_driver);
 510
 511 MODULE_DESCRIPTION("Renesas SDHI driver");
 512 MODULE_AUTHOR("Magnus Damm");
 513 MODULE_LICENSE("GPL v2");
 514 MODULE_ALIAS("platform:sh_mobile_sdhi");