3 * Intel Management Engine Interface (Intel MEI) Linux driver
4 * Copyright (c) 2003-2012, Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 #include <linux/module.h>
17 #include <linux/moduleparam.h>
18 #include <linux/kernel.h>
19 #include <linux/device.h>
21 #include <linux/errno.h>
22 #include <linux/types.h>
23 #include <linux/fcntl.h>
24 #include <linux/pci.h>
25 #include <linux/poll.h>
26 #include <linux/ioctl.h>
27 #include <linux/cdev.h>
28 #include <linux/sched.h>
29 #include <linux/uuid.h>
30 #include <linux/compat.h>
31 #include <linux/jiffies.h>
32 #include <linux/interrupt.h>
34 #include <linux/pm_domain.h>
35 #include <linux/pm_runtime.h>
37 #include <linux/mei.h>
41 #include "hw-me-regs.h"
44 /* mei_pci_tbl - PCI Device ID Table */
45 static const struct pci_device_id mei_me_pci_tbl[] = {
46 {MEI_PCI_DEVICE(MEI_DEV_ID_82946GZ, MEI_ME_ICH_CFG)},
47 {MEI_PCI_DEVICE(MEI_DEV_ID_82G35, MEI_ME_ICH_CFG)},
48 {MEI_PCI_DEVICE(MEI_DEV_ID_82Q965, MEI_ME_ICH_CFG)},
49 {MEI_PCI_DEVICE(MEI_DEV_ID_82G965, MEI_ME_ICH_CFG)},
50 {MEI_PCI_DEVICE(MEI_DEV_ID_82GM965, MEI_ME_ICH_CFG)},
51 {MEI_PCI_DEVICE(MEI_DEV_ID_82GME965, MEI_ME_ICH_CFG)},
52 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q35, MEI_ME_ICH_CFG)},
53 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82G33, MEI_ME_ICH_CFG)},
54 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q33, MEI_ME_ICH_CFG)},
55 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82X38, MEI_ME_ICH_CFG)},
56 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_3200, MEI_ME_ICH_CFG)},
58 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_6, MEI_ME_ICH_CFG)},
59 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_7, MEI_ME_ICH_CFG)},
60 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_8, MEI_ME_ICH_CFG)},
61 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_9, MEI_ME_ICH_CFG)},
62 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_10, MEI_ME_ICH_CFG)},
63 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_1, MEI_ME_ICH_CFG)},
64 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_2, MEI_ME_ICH_CFG)},
65 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_3, MEI_ME_ICH_CFG)},
66 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_4, MEI_ME_ICH_CFG)},
68 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_1, MEI_ME_ICH10_CFG)},
69 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_2, MEI_ME_ICH10_CFG)},
70 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_3, MEI_ME_ICH10_CFG)},
71 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_4, MEI_ME_ICH10_CFG)},
73 {MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_1, MEI_ME_PCH_CFG)},
74 {MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_2, MEI_ME_PCH_CFG)},
75 {MEI_PCI_DEVICE(MEI_DEV_ID_CPT_1, MEI_ME_PCH_CPT_PBG_CFG)},
76 {MEI_PCI_DEVICE(MEI_DEV_ID_PBG_1, MEI_ME_PCH_CPT_PBG_CFG)},
77 {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_1, MEI_ME_PCH_CFG)},
78 {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_2, MEI_ME_PCH_CFG)},
79 {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_3, MEI_ME_PCH_CFG)},
80 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_H, MEI_ME_PCH8_SPS_CFG)},
81 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_W, MEI_ME_PCH8_SPS_CFG)},
82 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_LP, MEI_ME_PCH8_CFG)},
83 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_HR, MEI_ME_PCH8_SPS_CFG)},
84 {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP, MEI_ME_PCH8_CFG)},
85 {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP_2, MEI_ME_PCH8_CFG)},
87 {MEI_PCI_DEVICE(MEI_DEV_ID_SPT, MEI_ME_PCH8_CFG)},
88 {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_2, MEI_ME_PCH8_CFG)},
89 {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H, MEI_ME_PCH8_SPS_CFG)},
90 {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H_2, MEI_ME_PCH8_SPS_CFG)},
91 {MEI_PCI_DEVICE(MEI_DEV_ID_LBG, MEI_ME_PCH12_CFG)},
93 {MEI_PCI_DEVICE(MEI_DEV_ID_BXT_M, MEI_ME_PCH8_CFG)},
94 {MEI_PCI_DEVICE(MEI_DEV_ID_APL_I, MEI_ME_PCH8_CFG)},
96 {MEI_PCI_DEVICE(MEI_DEV_ID_DNV_IE, MEI_ME_PCH8_CFG)},
98 {MEI_PCI_DEVICE(MEI_DEV_ID_GLK, MEI_ME_PCH8_CFG)},
100 {MEI_PCI_DEVICE(MEI_DEV_ID_KBP, MEI_ME_PCH8_CFG)},
101 {MEI_PCI_DEVICE(MEI_DEV_ID_KBP_2, MEI_ME_PCH8_CFG)},
103 {MEI_PCI_DEVICE(MEI_DEV_ID_CNP_LP, MEI_ME_PCH12_CFG)},
104 {MEI_PCI_DEVICE(MEI_DEV_ID_CNP_LP_4, MEI_ME_PCH8_CFG)},
105 {MEI_PCI_DEVICE(MEI_DEV_ID_CNP_H, MEI_ME_PCH12_CFG)},
106 {MEI_PCI_DEVICE(MEI_DEV_ID_CNP_H_4, MEI_ME_PCH8_CFG)},
108 {MEI_PCI_DEVICE(MEI_DEV_ID_ICP_LP, MEI_ME_PCH12_CFG)},
110 /* required last entry */
114 MODULE_DEVICE_TABLE(pci, mei_me_pci_tbl);
117 static inline void mei_me_set_pm_domain(struct mei_device *dev);
118 static inline void mei_me_unset_pm_domain(struct mei_device *dev);
120 static inline void mei_me_set_pm_domain(struct mei_device *dev) {}
121 static inline void mei_me_unset_pm_domain(struct mei_device *dev) {}
122 #endif /* CONFIG_PM */
125 * mei_me_quirk_probe - probe for devices that doesn't valid ME interface
127 * @pdev: PCI device structure
128 * @cfg: per generation config
130 * Return: true if ME Interface is valid, false otherwise
132 static bool mei_me_quirk_probe(struct pci_dev *pdev,
133 const struct mei_cfg *cfg)
135 if (cfg->quirk_probe && cfg->quirk_probe(pdev)) {
136 dev_info(&pdev->dev, "Device doesn't have valid ME Interface\n");
144 * mei_me_probe - Device Initialization Routine
146 * @pdev: PCI device structure
147 * @ent: entry in kcs_pci_tbl
149 * Return: 0 on success, <0 on failure.
151 static int mei_me_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
153 const struct mei_cfg *cfg;
154 struct mei_device *dev;
155 struct mei_me_hw *hw;
156 unsigned int irqflags;
159 cfg = mei_me_get_cfg(ent->driver_data);
163 if (!mei_me_quirk_probe(pdev, cfg))
167 err = pcim_enable_device(pdev);
169 dev_err(&pdev->dev, "failed to enable pci device.\n");
172 /* set PCI host mastering */
173 pci_set_master(pdev);
174 /* pci request regions and mapping IO device memory for mei driver */
175 err = pcim_iomap_regions(pdev, BIT(0), KBUILD_MODNAME);
177 dev_err(&pdev->dev, "failed to get pci regions.\n");
181 if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) ||
182 dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
184 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
186 err = dma_set_coherent_mask(&pdev->dev,
190 dev_err(&pdev->dev, "No usable DMA configuration, aborting\n");
194 /* allocates and initializes the mei dev structure */
195 dev = mei_me_dev_init(pdev, cfg);
201 hw->mem_addr = pcim_iomap_table(pdev)[0];
203 pci_enable_msi(pdev);
205 /* request and enable interrupt */
206 irqflags = pci_dev_msi_enabled(pdev) ? IRQF_ONESHOT : IRQF_SHARED;
208 err = request_threaded_irq(pdev->irq,
209 mei_me_irq_quick_handler,
210 mei_me_irq_thread_handler,
211 irqflags, KBUILD_MODNAME, dev);
213 dev_err(&pdev->dev, "request_threaded_irq failure. irq = %d\n",
218 if (mei_start(dev)) {
219 dev_err(&pdev->dev, "init hw failure.\n");
224 pm_runtime_set_autosuspend_delay(&pdev->dev, MEI_ME_RPM_TIMEOUT);
225 pm_runtime_use_autosuspend(&pdev->dev);
227 err = mei_register(dev, &pdev->dev);
231 pci_set_drvdata(pdev, dev);
234 * MEI requires to resume from runtime suspend mode
235 * in order to perform link reset flow upon system suspend.
237 dev_pm_set_driver_flags(&pdev->dev, DPM_FLAG_NEVER_SKIP);
240 * ME maps runtime suspend/resume to D0i states,
241 * hence we need to go around native PCI runtime service which
242 * eventually brings the device into D3cold/hot state,
243 * but the mei device cannot wake up from D3 unlike from D0i3.
244 * To get around the PCI device native runtime pm,
245 * ME uses runtime pm domain handlers which take precedence
246 * over the driver's pm handlers.
248 mei_me_set_pm_domain(dev);
250 if (mei_pg_is_enabled(dev)) {
251 pm_runtime_put_noidle(&pdev->dev);
252 if (hw->d0i3_supported)
253 pm_runtime_allow(&pdev->dev);
256 dev_dbg(&pdev->dev, "initialization successful.\n");
263 mei_cancel_work(dev);
264 mei_disable_interrupts(dev);
265 free_irq(pdev->irq, dev);
267 dev_err(&pdev->dev, "initialization failed.\n");
272 * mei_me_shutdown - Device Removal Routine
274 * @pdev: PCI device structure
276 * mei_me_shutdown is called from the reboot notifier
277 * it's a simplified version of remove so we go down
280 static void mei_me_shutdown(struct pci_dev *pdev)
282 struct mei_device *dev;
284 dev = pci_get_drvdata(pdev);
288 dev_dbg(&pdev->dev, "shutdown\n");
291 mei_me_unset_pm_domain(dev);
293 mei_disable_interrupts(dev);
294 free_irq(pdev->irq, dev);
298 * mei_me_remove - Device Removal Routine
300 * @pdev: PCI device structure
302 * mei_me_remove is called by the PCI subsystem to alert the driver
303 * that it should release a PCI device.
305 static void mei_me_remove(struct pci_dev *pdev)
307 struct mei_device *dev;
309 dev = pci_get_drvdata(pdev);
313 if (mei_pg_is_enabled(dev))
314 pm_runtime_get_noresume(&pdev->dev);
316 dev_dbg(&pdev->dev, "stop\n");
319 mei_me_unset_pm_domain(dev);
321 mei_disable_interrupts(dev);
323 free_irq(pdev->irq, dev);
328 #ifdef CONFIG_PM_SLEEP
329 static int mei_me_pci_suspend(struct device *device)
331 struct pci_dev *pdev = to_pci_dev(device);
332 struct mei_device *dev = pci_get_drvdata(pdev);
337 dev_dbg(&pdev->dev, "suspend\n");
341 mei_disable_interrupts(dev);
343 free_irq(pdev->irq, dev);
344 pci_disable_msi(pdev);
349 static int mei_me_pci_resume(struct device *device)
351 struct pci_dev *pdev = to_pci_dev(device);
352 struct mei_device *dev;
353 unsigned int irqflags;
356 dev = pci_get_drvdata(pdev);
360 pci_enable_msi(pdev);
362 irqflags = pci_dev_msi_enabled(pdev) ? IRQF_ONESHOT : IRQF_SHARED;
364 /* request and enable interrupt */
365 err = request_threaded_irq(pdev->irq,
366 mei_me_irq_quick_handler,
367 mei_me_irq_thread_handler,
368 irqflags, KBUILD_MODNAME, dev);
371 dev_err(&pdev->dev, "request_threaded_irq failed: irq = %d.\n",
376 err = mei_restart(dev);
380 /* Start timer if stopped in suspend */
381 schedule_delayed_work(&dev->timer_work, HZ);
385 #endif /* CONFIG_PM_SLEEP */
388 static int mei_me_pm_runtime_idle(struct device *device)
390 struct pci_dev *pdev = to_pci_dev(device);
391 struct mei_device *dev;
393 dev_dbg(&pdev->dev, "rpm: me: runtime_idle\n");
395 dev = pci_get_drvdata(pdev);
398 if (mei_write_is_idle(dev))
399 pm_runtime_autosuspend(device);
404 static int mei_me_pm_runtime_suspend(struct device *device)
406 struct pci_dev *pdev = to_pci_dev(device);
407 struct mei_device *dev;
410 dev_dbg(&pdev->dev, "rpm: me: runtime suspend\n");
412 dev = pci_get_drvdata(pdev);
416 mutex_lock(&dev->device_lock);
418 if (mei_write_is_idle(dev))
419 ret = mei_me_pg_enter_sync(dev);
423 mutex_unlock(&dev->device_lock);
425 dev_dbg(&pdev->dev, "rpm: me: runtime suspend ret=%d\n", ret);
427 if (ret && ret != -EAGAIN)
428 schedule_work(&dev->reset_work);
433 static int mei_me_pm_runtime_resume(struct device *device)
435 struct pci_dev *pdev = to_pci_dev(device);
436 struct mei_device *dev;
439 dev_dbg(&pdev->dev, "rpm: me: runtime resume\n");
441 dev = pci_get_drvdata(pdev);
445 mutex_lock(&dev->device_lock);
447 ret = mei_me_pg_exit_sync(dev);
449 mutex_unlock(&dev->device_lock);
451 dev_dbg(&pdev->dev, "rpm: me: runtime resume ret = %d\n", ret);
454 schedule_work(&dev->reset_work);
460 * mei_me_set_pm_domain - fill and set pm domain structure for device
464 static inline void mei_me_set_pm_domain(struct mei_device *dev)
466 struct pci_dev *pdev = to_pci_dev(dev->dev);
468 if (pdev->dev.bus && pdev->dev.bus->pm) {
469 dev->pg_domain.ops = *pdev->dev.bus->pm;
471 dev->pg_domain.ops.runtime_suspend = mei_me_pm_runtime_suspend;
472 dev->pg_domain.ops.runtime_resume = mei_me_pm_runtime_resume;
473 dev->pg_domain.ops.runtime_idle = mei_me_pm_runtime_idle;
475 dev_pm_domain_set(&pdev->dev, &dev->pg_domain);
480 * mei_me_unset_pm_domain - clean pm domain structure for device
484 static inline void mei_me_unset_pm_domain(struct mei_device *dev)
486 /* stop using pm callbacks if any */
487 dev_pm_domain_set(dev->dev, NULL);
490 static const struct dev_pm_ops mei_me_pm_ops = {
491 SET_SYSTEM_SLEEP_PM_OPS(mei_me_pci_suspend,
494 mei_me_pm_runtime_suspend,
495 mei_me_pm_runtime_resume,
496 mei_me_pm_runtime_idle)
499 #define MEI_ME_PM_OPS (&mei_me_pm_ops)
501 #define MEI_ME_PM_OPS NULL
502 #endif /* CONFIG_PM */
504 * PCI driver structure
506 static struct pci_driver mei_me_driver = {
507 .name = KBUILD_MODNAME,
508 .id_table = mei_me_pci_tbl,
509 .probe = mei_me_probe,
510 .remove = mei_me_remove,
511 .shutdown = mei_me_shutdown,
512 .driver.pm = MEI_ME_PM_OPS,
513 .driver.probe_type = PROBE_PREFER_ASYNCHRONOUS,
516 module_pci_driver(mei_me_driver);
518 MODULE_AUTHOR("Intel Corporation");
519 MODULE_DESCRIPTION("Intel(R) Management Engine Interface");
520 MODULE_LICENSE("GPL v2");