Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bart/ide-2.6
[sfrench/cifs-2.6.git] / drivers / mfd / wm8350-core.c
1 /*
2  * wm8350-core.c  --  Device access for Wolfson WM8350
3  *
4  * Copyright 2007, 2008 Wolfson Microelectronics PLC.
5  *
6  * Author: Liam Girdwood, Mark Brown
7  *
8  *  This program is free software; you can redistribute  it and/or modify it
9  *  under  the terms of  the GNU General  Public License as published by the
10  *  Free Software Foundation;  either version 2 of the  License, or (at your
11  *  option) any later version.
12  *
13  */
14
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/init.h>
18 #include <linux/bug.h>
19 #include <linux/device.h>
20 #include <linux/delay.h>
21 #include <linux/interrupt.h>
22 #include <linux/workqueue.h>
23
24 #include <linux/mfd/wm8350/core.h>
25 #include <linux/mfd/wm8350/audio.h>
26 #include <linux/mfd/wm8350/comparator.h>
27 #include <linux/mfd/wm8350/gpio.h>
28 #include <linux/mfd/wm8350/pmic.h>
29 #include <linux/mfd/wm8350/rtc.h>
30 #include <linux/mfd/wm8350/supply.h>
31 #include <linux/mfd/wm8350/wdt.h>
32
33 #define WM8350_UNLOCK_KEY               0x0013
34 #define WM8350_LOCK_KEY                 0x0000
35
36 #define WM8350_CLOCK_CONTROL_1          0x28
37 #define WM8350_AIF_TEST                 0x74
38
39 /* debug */
40 #define WM8350_BUS_DEBUG 0
41 #if WM8350_BUS_DEBUG
42 #define dump(regs, src) do { \
43         int i_; \
44         u16 *src_ = src; \
45         printk(KERN_DEBUG); \
46         for (i_ = 0; i_ < regs; i_++) \
47                 printk(" 0x%4.4x", *src_++); \
48         printk("\n"); \
49 } while (0);
50 #else
51 #define dump(bytes, src)
52 #endif
53
54 #define WM8350_LOCK_DEBUG 0
55 #if WM8350_LOCK_DEBUG
56 #define ldbg(format, arg...) printk(format, ## arg)
57 #else
58 #define ldbg(format, arg...)
59 #endif
60
61 /*
62  * WM8350 Device IO
63  */
64 static DEFINE_MUTEX(io_mutex);
65 static DEFINE_MUTEX(reg_lock_mutex);
66
67 /* Perform a physical read from the device.
68  */
69 static int wm8350_phys_read(struct wm8350 *wm8350, u8 reg, int num_regs,
70                             u16 *dest)
71 {
72         int i, ret;
73         int bytes = num_regs * 2;
74
75         dev_dbg(wm8350->dev, "volatile read\n");
76         ret = wm8350->read_dev(wm8350, reg, bytes, (char *)dest);
77
78         for (i = reg; i < reg + num_regs; i++) {
79                 /* Cache is CPU endian */
80                 dest[i - reg] = be16_to_cpu(dest[i - reg]);
81
82                 /* Mask out non-readable bits */
83                 dest[i - reg] &= wm8350_reg_io_map[i].readable;
84         }
85
86         dump(num_regs, dest);
87
88         return ret;
89 }
90
91 static int wm8350_read(struct wm8350 *wm8350, u8 reg, int num_regs, u16 *dest)
92 {
93         int i;
94         int end = reg + num_regs;
95         int ret = 0;
96         int bytes = num_regs * 2;
97
98         if (wm8350->read_dev == NULL)
99                 return -ENODEV;
100
101         if ((reg + num_regs - 1) > WM8350_MAX_REGISTER) {
102                 dev_err(wm8350->dev, "invalid reg %x\n",
103                         reg + num_regs - 1);
104                 return -EINVAL;
105         }
106
107         dev_dbg(wm8350->dev,
108                 "%s R%d(0x%2.2x) %d regs\n", __func__, reg, reg, num_regs);
109
110 #if WM8350_BUS_DEBUG
111         /* we can _safely_ read any register, but warn if read not supported */
112         for (i = reg; i < end; i++) {
113                 if (!wm8350_reg_io_map[i].readable)
114                         dev_warn(wm8350->dev,
115                                 "reg R%d is not readable\n", i);
116         }
117 #endif
118
119         /* if any volatile registers are required, then read back all */
120         for (i = reg; i < end; i++)
121                 if (wm8350_reg_io_map[i].vol)
122                         return wm8350_phys_read(wm8350, reg, num_regs, dest);
123
124         /* no volatiles, then cache is good */
125         dev_dbg(wm8350->dev, "cache read\n");
126         memcpy(dest, &wm8350->reg_cache[reg], bytes);
127         dump(num_regs, dest);
128         return ret;
129 }
130
131 static inline int is_reg_locked(struct wm8350 *wm8350, u8 reg)
132 {
133         if (reg == WM8350_SECURITY ||
134             wm8350->reg_cache[WM8350_SECURITY] == WM8350_UNLOCK_KEY)
135                 return 0;
136
137         if ((reg == WM8350_GPIO_CONFIGURATION_I_O) ||
138             (reg >= WM8350_GPIO_FUNCTION_SELECT_1 &&
139              reg <= WM8350_GPIO_FUNCTION_SELECT_4) ||
140             (reg >= WM8350_BATTERY_CHARGER_CONTROL_1 &&
141              reg <= WM8350_BATTERY_CHARGER_CONTROL_3))
142                 return 1;
143         return 0;
144 }
145
146 static int wm8350_write(struct wm8350 *wm8350, u8 reg, int num_regs, u16 *src)
147 {
148         int i;
149         int end = reg + num_regs;
150         int bytes = num_regs * 2;
151
152         if (wm8350->write_dev == NULL)
153                 return -ENODEV;
154
155         if ((reg + num_regs - 1) > WM8350_MAX_REGISTER) {
156                 dev_err(wm8350->dev, "invalid reg %x\n",
157                         reg + num_regs - 1);
158                 return -EINVAL;
159         }
160
161         /* it's generally not a good idea to write to RO or locked registers */
162         for (i = reg; i < end; i++) {
163                 if (!wm8350_reg_io_map[i].writable) {
164                         dev_err(wm8350->dev,
165                                 "attempted write to read only reg R%d\n", i);
166                         return -EINVAL;
167                 }
168
169                 if (is_reg_locked(wm8350, i)) {
170                         dev_err(wm8350->dev,
171                                "attempted write to locked reg R%d\n", i);
172                         return -EINVAL;
173                 }
174
175                 src[i - reg] &= wm8350_reg_io_map[i].writable;
176
177                 wm8350->reg_cache[i] =
178                         (wm8350->reg_cache[i] & ~wm8350_reg_io_map[i].writable)
179                         | src[i - reg];
180
181                 src[i - reg] = cpu_to_be16(src[i - reg]);
182         }
183
184         /* Actually write it out */
185         return wm8350->write_dev(wm8350, reg, bytes, (char *)src);
186 }
187
188 /*
189  * Safe read, modify, write methods
190  */
191 int wm8350_clear_bits(struct wm8350 *wm8350, u16 reg, u16 mask)
192 {
193         u16 data;
194         int err;
195
196         mutex_lock(&io_mutex);
197         err = wm8350_read(wm8350, reg, 1, &data);
198         if (err) {
199                 dev_err(wm8350->dev, "read from reg R%d failed\n", reg);
200                 goto out;
201         }
202
203         data &= ~mask;
204         err = wm8350_write(wm8350, reg, 1, &data);
205         if (err)
206                 dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
207 out:
208         mutex_unlock(&io_mutex);
209         return err;
210 }
211 EXPORT_SYMBOL_GPL(wm8350_clear_bits);
212
213 int wm8350_set_bits(struct wm8350 *wm8350, u16 reg, u16 mask)
214 {
215         u16 data;
216         int err;
217
218         mutex_lock(&io_mutex);
219         err = wm8350_read(wm8350, reg, 1, &data);
220         if (err) {
221                 dev_err(wm8350->dev, "read from reg R%d failed\n", reg);
222                 goto out;
223         }
224
225         data |= mask;
226         err = wm8350_write(wm8350, reg, 1, &data);
227         if (err)
228                 dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
229 out:
230         mutex_unlock(&io_mutex);
231         return err;
232 }
233 EXPORT_SYMBOL_GPL(wm8350_set_bits);
234
235 u16 wm8350_reg_read(struct wm8350 *wm8350, int reg)
236 {
237         u16 data;
238         int err;
239
240         mutex_lock(&io_mutex);
241         err = wm8350_read(wm8350, reg, 1, &data);
242         if (err)
243                 dev_err(wm8350->dev, "read from reg R%d failed\n", reg);
244
245         mutex_unlock(&io_mutex);
246         return data;
247 }
248 EXPORT_SYMBOL_GPL(wm8350_reg_read);
249
250 int wm8350_reg_write(struct wm8350 *wm8350, int reg, u16 val)
251 {
252         int ret;
253         u16 data = val;
254
255         mutex_lock(&io_mutex);
256         ret = wm8350_write(wm8350, reg, 1, &data);
257         if (ret)
258                 dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
259         mutex_unlock(&io_mutex);
260         return ret;
261 }
262 EXPORT_SYMBOL_GPL(wm8350_reg_write);
263
264 int wm8350_block_read(struct wm8350 *wm8350, int start_reg, int regs,
265                       u16 *dest)
266 {
267         int err = 0;
268
269         mutex_lock(&io_mutex);
270         err = wm8350_read(wm8350, start_reg, regs, dest);
271         if (err)
272                 dev_err(wm8350->dev, "block read starting from R%d failed\n",
273                         start_reg);
274         mutex_unlock(&io_mutex);
275         return err;
276 }
277 EXPORT_SYMBOL_GPL(wm8350_block_read);
278
279 int wm8350_block_write(struct wm8350 *wm8350, int start_reg, int regs,
280                        u16 *src)
281 {
282         int ret = 0;
283
284         mutex_lock(&io_mutex);
285         ret = wm8350_write(wm8350, start_reg, regs, src);
286         if (ret)
287                 dev_err(wm8350->dev, "block write starting at R%d failed\n",
288                         start_reg);
289         mutex_unlock(&io_mutex);
290         return ret;
291 }
292 EXPORT_SYMBOL_GPL(wm8350_block_write);
293
294 /**
295  * wm8350_reg_lock()
296  *
297  * The WM8350 has a hardware lock which can be used to prevent writes to
298  * some registers (generally those which can cause particularly serious
299  * problems if misused).  This function enables that lock.
300  */
301 int wm8350_reg_lock(struct wm8350 *wm8350)
302 {
303         u16 key = WM8350_LOCK_KEY;
304         int ret;
305
306         ldbg(__func__);
307         mutex_lock(&io_mutex);
308         ret = wm8350_write(wm8350, WM8350_SECURITY, 1, &key);
309         if (ret)
310                 dev_err(wm8350->dev, "lock failed\n");
311         mutex_unlock(&io_mutex);
312         return ret;
313 }
314 EXPORT_SYMBOL_GPL(wm8350_reg_lock);
315
316 /**
317  * wm8350_reg_unlock()
318  *
319  * The WM8350 has a hardware lock which can be used to prevent writes to
320  * some registers (generally those which can cause particularly serious
321  * problems if misused).  This function disables that lock so updates
322  * can be performed.  For maximum safety this should be done only when
323  * required.
324  */
325 int wm8350_reg_unlock(struct wm8350 *wm8350)
326 {
327         u16 key = WM8350_UNLOCK_KEY;
328         int ret;
329
330         ldbg(__func__);
331         mutex_lock(&io_mutex);
332         ret = wm8350_write(wm8350, WM8350_SECURITY, 1, &key);
333         if (ret)
334                 dev_err(wm8350->dev, "unlock failed\n");
335         mutex_unlock(&io_mutex);
336         return ret;
337 }
338 EXPORT_SYMBOL_GPL(wm8350_reg_unlock);
339
340 static void wm8350_irq_call_handler(struct wm8350 *wm8350, int irq)
341 {
342         mutex_lock(&wm8350->irq_mutex);
343
344         if (wm8350->irq[irq].handler)
345                 wm8350->irq[irq].handler(wm8350, irq, wm8350->irq[irq].data);
346         else {
347                 dev_err(wm8350->dev, "irq %d nobody cared. now masked.\n",
348                         irq);
349                 wm8350_mask_irq(wm8350, irq);
350         }
351
352         mutex_unlock(&wm8350->irq_mutex);
353 }
354
355 /*
356  * wm8350_irq_worker actually handles the interrupts.  Since all
357  * interrupts are clear on read the IRQ line will be reasserted and
358  * the physical IRQ will be handled again if another interrupt is
359  * asserted while we run - in the normal course of events this is a
360  * rare occurrence so we save I2C/SPI reads.
361  */
362 static void wm8350_irq_worker(struct work_struct *work)
363 {
364         struct wm8350 *wm8350 = container_of(work, struct wm8350, irq_work);
365         u16 level_one, status1, status2, comp;
366
367         /* TODO: Use block reads to improve performance? */
368         level_one = wm8350_reg_read(wm8350, WM8350_SYSTEM_INTERRUPTS)
369                 & ~wm8350_reg_read(wm8350, WM8350_SYSTEM_INTERRUPTS_MASK);
370         status1 = wm8350_reg_read(wm8350, WM8350_INT_STATUS_1)
371                 & ~wm8350_reg_read(wm8350, WM8350_INT_STATUS_1_MASK);
372         status2 = wm8350_reg_read(wm8350, WM8350_INT_STATUS_2)
373                 & ~wm8350_reg_read(wm8350, WM8350_INT_STATUS_2_MASK);
374         comp = wm8350_reg_read(wm8350, WM8350_COMPARATOR_INT_STATUS)
375                 & ~wm8350_reg_read(wm8350, WM8350_COMPARATOR_INT_STATUS_MASK);
376
377         /* over current */
378         if (level_one & WM8350_OC_INT) {
379                 u16 oc;
380
381                 oc = wm8350_reg_read(wm8350, WM8350_OVER_CURRENT_INT_STATUS);
382                 oc &= ~wm8350_reg_read(wm8350,
383                                        WM8350_OVER_CURRENT_INT_STATUS_MASK);
384
385                 if (oc & WM8350_OC_LS_EINT)     /* limit switch */
386                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_OC_LS);
387         }
388
389         /* under voltage */
390         if (level_one & WM8350_UV_INT) {
391                 u16 uv;
392
393                 uv = wm8350_reg_read(wm8350, WM8350_UNDER_VOLTAGE_INT_STATUS);
394                 uv &= ~wm8350_reg_read(wm8350,
395                                        WM8350_UNDER_VOLTAGE_INT_STATUS_MASK);
396
397                 if (uv & WM8350_UV_DC1_EINT)
398                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_DC1);
399                 if (uv & WM8350_UV_DC2_EINT)
400                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_DC2);
401                 if (uv & WM8350_UV_DC3_EINT)
402                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_DC3);
403                 if (uv & WM8350_UV_DC4_EINT)
404                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_DC4);
405                 if (uv & WM8350_UV_DC5_EINT)
406                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_DC5);
407                 if (uv & WM8350_UV_DC6_EINT)
408                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_DC6);
409                 if (uv & WM8350_UV_LDO1_EINT)
410                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_LDO1);
411                 if (uv & WM8350_UV_LDO2_EINT)
412                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_LDO2);
413                 if (uv & WM8350_UV_LDO3_EINT)
414                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_LDO3);
415                 if (uv & WM8350_UV_LDO4_EINT)
416                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_LDO4);
417         }
418
419         /* charger, RTC */
420         if (status1) {
421                 if (status1 & WM8350_CHG_BAT_HOT_EINT)
422                         wm8350_irq_call_handler(wm8350,
423                                                 WM8350_IRQ_CHG_BAT_HOT);
424                 if (status1 & WM8350_CHG_BAT_COLD_EINT)
425                         wm8350_irq_call_handler(wm8350,
426                                                 WM8350_IRQ_CHG_BAT_COLD);
427                 if (status1 & WM8350_CHG_BAT_FAIL_EINT)
428                         wm8350_irq_call_handler(wm8350,
429                                                 WM8350_IRQ_CHG_BAT_FAIL);
430                 if (status1 & WM8350_CHG_TO_EINT)
431                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_CHG_TO);
432                 if (status1 & WM8350_CHG_END_EINT)
433                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_CHG_END);
434                 if (status1 & WM8350_CHG_START_EINT)
435                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_CHG_START);
436                 if (status1 & WM8350_CHG_FAST_RDY_EINT)
437                         wm8350_irq_call_handler(wm8350,
438                                                 WM8350_IRQ_CHG_FAST_RDY);
439                 if (status1 & WM8350_CHG_VBATT_LT_3P9_EINT)
440                         wm8350_irq_call_handler(wm8350,
441                                                 WM8350_IRQ_CHG_VBATT_LT_3P9);
442                 if (status1 & WM8350_CHG_VBATT_LT_3P1_EINT)
443                         wm8350_irq_call_handler(wm8350,
444                                                 WM8350_IRQ_CHG_VBATT_LT_3P1);
445                 if (status1 & WM8350_CHG_VBATT_LT_2P85_EINT)
446                         wm8350_irq_call_handler(wm8350,
447                                                 WM8350_IRQ_CHG_VBATT_LT_2P85);
448                 if (status1 & WM8350_RTC_ALM_EINT)
449                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_RTC_ALM);
450                 if (status1 & WM8350_RTC_SEC_EINT)
451                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_RTC_SEC);
452                 if (status1 & WM8350_RTC_PER_EINT)
453                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_RTC_PER);
454         }
455
456         /* current sink, system, aux adc */
457         if (status2) {
458                 if (status2 & WM8350_CS1_EINT)
459                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_CS1);
460                 if (status2 & WM8350_CS2_EINT)
461                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_CS2);
462
463                 if (status2 & WM8350_SYS_HYST_COMP_FAIL_EINT)
464                         wm8350_irq_call_handler(wm8350,
465                                                 WM8350_IRQ_SYS_HYST_COMP_FAIL);
466                 if (status2 & WM8350_SYS_CHIP_GT115_EINT)
467                         wm8350_irq_call_handler(wm8350,
468                                                 WM8350_IRQ_SYS_CHIP_GT115);
469                 if (status2 & WM8350_SYS_CHIP_GT140_EINT)
470                         wm8350_irq_call_handler(wm8350,
471                                                 WM8350_IRQ_SYS_CHIP_GT140);
472                 if (status2 & WM8350_SYS_WDOG_TO_EINT)
473                         wm8350_irq_call_handler(wm8350,
474                                                 WM8350_IRQ_SYS_WDOG_TO);
475
476                 if (status2 & WM8350_AUXADC_DATARDY_EINT)
477                         wm8350_irq_call_handler(wm8350,
478                                                 WM8350_IRQ_AUXADC_DATARDY);
479                 if (status2 & WM8350_AUXADC_DCOMP4_EINT)
480                         wm8350_irq_call_handler(wm8350,
481                                                 WM8350_IRQ_AUXADC_DCOMP4);
482                 if (status2 & WM8350_AUXADC_DCOMP3_EINT)
483                         wm8350_irq_call_handler(wm8350,
484                                                 WM8350_IRQ_AUXADC_DCOMP3);
485                 if (status2 & WM8350_AUXADC_DCOMP2_EINT)
486                         wm8350_irq_call_handler(wm8350,
487                                                 WM8350_IRQ_AUXADC_DCOMP2);
488                 if (status2 & WM8350_AUXADC_DCOMP1_EINT)
489                         wm8350_irq_call_handler(wm8350,
490                                                 WM8350_IRQ_AUXADC_DCOMP1);
491
492                 if (status2 & WM8350_USB_LIMIT_EINT)
493                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_USB_LIMIT);
494         }
495
496         /* wake, codec, ext */
497         if (comp) {
498                 if (comp & WM8350_WKUP_OFF_STATE_EINT)
499                         wm8350_irq_call_handler(wm8350,
500                                                 WM8350_IRQ_WKUP_OFF_STATE);
501                 if (comp & WM8350_WKUP_HIB_STATE_EINT)
502                         wm8350_irq_call_handler(wm8350,
503                                                 WM8350_IRQ_WKUP_HIB_STATE);
504                 if (comp & WM8350_WKUP_CONV_FAULT_EINT)
505                         wm8350_irq_call_handler(wm8350,
506                                                 WM8350_IRQ_WKUP_CONV_FAULT);
507                 if (comp & WM8350_WKUP_WDOG_RST_EINT)
508                         wm8350_irq_call_handler(wm8350,
509                                                 WM8350_IRQ_WKUP_WDOG_RST);
510                 if (comp & WM8350_WKUP_GP_PWR_ON_EINT)
511                         wm8350_irq_call_handler(wm8350,
512                                                 WM8350_IRQ_WKUP_GP_PWR_ON);
513                 if (comp & WM8350_WKUP_ONKEY_EINT)
514                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_WKUP_ONKEY);
515                 if (comp & WM8350_WKUP_GP_WAKEUP_EINT)
516                         wm8350_irq_call_handler(wm8350,
517                                                 WM8350_IRQ_WKUP_GP_WAKEUP);
518
519                 if (comp & WM8350_CODEC_JCK_DET_L_EINT)
520                         wm8350_irq_call_handler(wm8350,
521                                                 WM8350_IRQ_CODEC_JCK_DET_L);
522                 if (comp & WM8350_CODEC_JCK_DET_R_EINT)
523                         wm8350_irq_call_handler(wm8350,
524                                                 WM8350_IRQ_CODEC_JCK_DET_R);
525                 if (comp & WM8350_CODEC_MICSCD_EINT)
526                         wm8350_irq_call_handler(wm8350,
527                                                 WM8350_IRQ_CODEC_MICSCD);
528                 if (comp & WM8350_CODEC_MICD_EINT)
529                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_CODEC_MICD);
530
531                 if (comp & WM8350_EXT_USB_FB_EINT)
532                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_EXT_USB_FB);
533                 if (comp & WM8350_EXT_WALL_FB_EINT)
534                         wm8350_irq_call_handler(wm8350,
535                                                 WM8350_IRQ_EXT_WALL_FB);
536                 if (comp & WM8350_EXT_BAT_FB_EINT)
537                         wm8350_irq_call_handler(wm8350, WM8350_IRQ_EXT_BAT_FB);
538         }
539
540         if (level_one & WM8350_GP_INT) {
541                 int i;
542                 u16 gpio;
543
544                 gpio = wm8350_reg_read(wm8350, WM8350_GPIO_INT_STATUS);
545                 gpio &= ~wm8350_reg_read(wm8350,
546                                          WM8350_GPIO_INT_STATUS_MASK);
547
548                 for (i = 0; i < 12; i++) {
549                         if (gpio & (1 << i))
550                                 wm8350_irq_call_handler(wm8350,
551                                                         WM8350_IRQ_GPIO(i));
552                 }
553         }
554
555         enable_irq(wm8350->chip_irq);
556 }
557
558 static irqreturn_t wm8350_irq(int irq, void *data)
559 {
560         struct wm8350 *wm8350 = data;
561
562         disable_irq_nosync(irq);
563         schedule_work(&wm8350->irq_work);
564
565         return IRQ_HANDLED;
566 }
567
568 int wm8350_register_irq(struct wm8350 *wm8350, int irq,
569                         void (*handler) (struct wm8350 *, int, void *),
570                         void *data)
571 {
572         if (irq < 0 || irq > WM8350_NUM_IRQ || !handler)
573                 return -EINVAL;
574
575         if (wm8350->irq[irq].handler)
576                 return -EBUSY;
577
578         mutex_lock(&wm8350->irq_mutex);
579         wm8350->irq[irq].handler = handler;
580         wm8350->irq[irq].data = data;
581         mutex_unlock(&wm8350->irq_mutex);
582
583         return 0;
584 }
585 EXPORT_SYMBOL_GPL(wm8350_register_irq);
586
587 int wm8350_free_irq(struct wm8350 *wm8350, int irq)
588 {
589         if (irq < 0 || irq > WM8350_NUM_IRQ)
590                 return -EINVAL;
591
592         mutex_lock(&wm8350->irq_mutex);
593         wm8350->irq[irq].handler = NULL;
594         mutex_unlock(&wm8350->irq_mutex);
595         return 0;
596 }
597 EXPORT_SYMBOL_GPL(wm8350_free_irq);
598
599 int wm8350_mask_irq(struct wm8350 *wm8350, int irq)
600 {
601         switch (irq) {
602         case WM8350_IRQ_CHG_BAT_HOT:
603                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
604                                        WM8350_IM_CHG_BAT_HOT_EINT);
605         case WM8350_IRQ_CHG_BAT_COLD:
606                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
607                                        WM8350_IM_CHG_BAT_COLD_EINT);
608         case WM8350_IRQ_CHG_BAT_FAIL:
609                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
610                                        WM8350_IM_CHG_BAT_FAIL_EINT);
611         case WM8350_IRQ_CHG_TO:
612                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
613                                        WM8350_IM_CHG_TO_EINT);
614         case WM8350_IRQ_CHG_END:
615                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
616                                        WM8350_IM_CHG_END_EINT);
617         case WM8350_IRQ_CHG_START:
618                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
619                                        WM8350_IM_CHG_START_EINT);
620         case WM8350_IRQ_CHG_FAST_RDY:
621                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
622                                        WM8350_IM_CHG_FAST_RDY_EINT);
623         case WM8350_IRQ_RTC_PER:
624                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
625                                        WM8350_IM_RTC_PER_EINT);
626         case WM8350_IRQ_RTC_SEC:
627                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
628                                        WM8350_IM_RTC_SEC_EINT);
629         case WM8350_IRQ_RTC_ALM:
630                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
631                                        WM8350_IM_RTC_ALM_EINT);
632         case WM8350_IRQ_CHG_VBATT_LT_3P9:
633                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
634                                        WM8350_IM_CHG_VBATT_LT_3P9_EINT);
635         case WM8350_IRQ_CHG_VBATT_LT_3P1:
636                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
637                                        WM8350_IM_CHG_VBATT_LT_3P1_EINT);
638         case WM8350_IRQ_CHG_VBATT_LT_2P85:
639                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
640                                        WM8350_IM_CHG_VBATT_LT_2P85_EINT);
641         case WM8350_IRQ_CS1:
642                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK,
643                                        WM8350_IM_CS1_EINT);
644         case WM8350_IRQ_CS2:
645                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK,
646                                        WM8350_IM_CS2_EINT);
647         case WM8350_IRQ_USB_LIMIT:
648                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK,
649                                        WM8350_IM_USB_LIMIT_EINT);
650         case WM8350_IRQ_AUXADC_DATARDY:
651                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK,
652                                        WM8350_IM_AUXADC_DATARDY_EINT);
653         case WM8350_IRQ_AUXADC_DCOMP4:
654                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK,
655                                        WM8350_IM_AUXADC_DCOMP4_EINT);
656         case WM8350_IRQ_AUXADC_DCOMP3:
657                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK,
658                                        WM8350_IM_AUXADC_DCOMP3_EINT);
659         case WM8350_IRQ_AUXADC_DCOMP2:
660                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK,
661                                        WM8350_IM_AUXADC_DCOMP2_EINT);
662         case WM8350_IRQ_AUXADC_DCOMP1:
663                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK,
664                                        WM8350_IM_AUXADC_DCOMP1_EINT);
665         case WM8350_IRQ_SYS_HYST_COMP_FAIL:
666                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK,
667                                        WM8350_IM_SYS_HYST_COMP_FAIL_EINT);
668         case WM8350_IRQ_SYS_CHIP_GT115:
669                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK,
670                                        WM8350_IM_SYS_CHIP_GT115_EINT);
671         case WM8350_IRQ_SYS_CHIP_GT140:
672                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK,
673                                        WM8350_IM_SYS_CHIP_GT140_EINT);
674         case WM8350_IRQ_SYS_WDOG_TO:
675                 return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK,
676                                        WM8350_IM_SYS_WDOG_TO_EINT);
677         case WM8350_IRQ_UV_LDO4:
678                 return wm8350_set_bits(wm8350,
679                                        WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
680                                        WM8350_IM_UV_LDO4_EINT);
681         case WM8350_IRQ_UV_LDO3:
682                 return wm8350_set_bits(wm8350,
683                                        WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
684                                        WM8350_IM_UV_LDO3_EINT);
685         case WM8350_IRQ_UV_LDO2:
686                 return wm8350_set_bits(wm8350,
687                                        WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
688                                        WM8350_IM_UV_LDO2_EINT);
689         case WM8350_IRQ_UV_LDO1:
690                 return wm8350_set_bits(wm8350,
691                                        WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
692                                        WM8350_IM_UV_LDO1_EINT);
693         case WM8350_IRQ_UV_DC6:
694                 return wm8350_set_bits(wm8350,
695                                        WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
696                                        WM8350_IM_UV_DC6_EINT);
697         case WM8350_IRQ_UV_DC5:
698                 return wm8350_set_bits(wm8350,
699                                        WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
700                                        WM8350_IM_UV_DC5_EINT);
701         case WM8350_IRQ_UV_DC4:
702                 return wm8350_set_bits(wm8350,
703                                        WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
704                                        WM8350_IM_UV_DC4_EINT);
705         case WM8350_IRQ_UV_DC3:
706                 return wm8350_set_bits(wm8350,
707                                        WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
708                                        WM8350_IM_UV_DC3_EINT);
709         case WM8350_IRQ_UV_DC2:
710                 return wm8350_set_bits(wm8350,
711                                        WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
712                                        WM8350_IM_UV_DC2_EINT);
713         case WM8350_IRQ_UV_DC1:
714                 return wm8350_set_bits(wm8350,
715                                        WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
716                                        WM8350_IM_UV_DC1_EINT);
717         case WM8350_IRQ_OC_LS:
718                 return wm8350_set_bits(wm8350,
719                                        WM8350_OVER_CURRENT_INT_STATUS_MASK,
720                                        WM8350_IM_OC_LS_EINT);
721         case WM8350_IRQ_EXT_USB_FB:
722                 return wm8350_set_bits(wm8350,
723                                        WM8350_COMPARATOR_INT_STATUS_MASK,
724                                        WM8350_IM_EXT_USB_FB_EINT);
725         case WM8350_IRQ_EXT_WALL_FB:
726                 return wm8350_set_bits(wm8350,
727                                        WM8350_COMPARATOR_INT_STATUS_MASK,
728                                        WM8350_IM_EXT_WALL_FB_EINT);
729         case WM8350_IRQ_EXT_BAT_FB:
730                 return wm8350_set_bits(wm8350,
731                                        WM8350_COMPARATOR_INT_STATUS_MASK,
732                                        WM8350_IM_EXT_BAT_FB_EINT);
733         case WM8350_IRQ_CODEC_JCK_DET_L:
734                 return wm8350_set_bits(wm8350,
735                                        WM8350_COMPARATOR_INT_STATUS_MASK,
736                                        WM8350_IM_CODEC_JCK_DET_L_EINT);
737         case WM8350_IRQ_CODEC_JCK_DET_R:
738                 return wm8350_set_bits(wm8350,
739                                        WM8350_COMPARATOR_INT_STATUS_MASK,
740                                        WM8350_IM_CODEC_JCK_DET_R_EINT);
741         case WM8350_IRQ_CODEC_MICSCD:
742                 return wm8350_set_bits(wm8350,
743                                        WM8350_COMPARATOR_INT_STATUS_MASK,
744                                        WM8350_IM_CODEC_MICSCD_EINT);
745         case WM8350_IRQ_CODEC_MICD:
746                 return wm8350_set_bits(wm8350,
747                                        WM8350_COMPARATOR_INT_STATUS_MASK,
748                                        WM8350_IM_CODEC_MICD_EINT);
749         case WM8350_IRQ_WKUP_OFF_STATE:
750                 return wm8350_set_bits(wm8350,
751                                        WM8350_COMPARATOR_INT_STATUS_MASK,
752                                        WM8350_IM_WKUP_OFF_STATE_EINT);
753         case WM8350_IRQ_WKUP_HIB_STATE:
754                 return wm8350_set_bits(wm8350,
755                                        WM8350_COMPARATOR_INT_STATUS_MASK,
756                                        WM8350_IM_WKUP_HIB_STATE_EINT);
757         case WM8350_IRQ_WKUP_CONV_FAULT:
758                 return wm8350_set_bits(wm8350,
759                                        WM8350_COMPARATOR_INT_STATUS_MASK,
760                                        WM8350_IM_WKUP_CONV_FAULT_EINT);
761         case WM8350_IRQ_WKUP_WDOG_RST:
762                 return wm8350_set_bits(wm8350,
763                                        WM8350_COMPARATOR_INT_STATUS_MASK,
764                                        WM8350_IM_WKUP_OFF_STATE_EINT);
765         case WM8350_IRQ_WKUP_GP_PWR_ON:
766                 return wm8350_set_bits(wm8350,
767                                        WM8350_COMPARATOR_INT_STATUS_MASK,
768                                        WM8350_IM_WKUP_GP_PWR_ON_EINT);
769         case WM8350_IRQ_WKUP_ONKEY:
770                 return wm8350_set_bits(wm8350,
771                                        WM8350_COMPARATOR_INT_STATUS_MASK,
772                                        WM8350_IM_WKUP_ONKEY_EINT);
773         case WM8350_IRQ_WKUP_GP_WAKEUP:
774                 return wm8350_set_bits(wm8350,
775                                        WM8350_COMPARATOR_INT_STATUS_MASK,
776                                        WM8350_IM_WKUP_GP_WAKEUP_EINT);
777         case WM8350_IRQ_GPIO(0):
778                 return wm8350_set_bits(wm8350,
779                                        WM8350_GPIO_INT_STATUS_MASK,
780                                        WM8350_IM_GP0_EINT);
781         case WM8350_IRQ_GPIO(1):
782                 return wm8350_set_bits(wm8350,
783                                        WM8350_GPIO_INT_STATUS_MASK,
784                                        WM8350_IM_GP1_EINT);
785         case WM8350_IRQ_GPIO(2):
786                 return wm8350_set_bits(wm8350,
787                                        WM8350_GPIO_INT_STATUS_MASK,
788                                        WM8350_IM_GP2_EINT);
789         case WM8350_IRQ_GPIO(3):
790                 return wm8350_set_bits(wm8350,
791                                        WM8350_GPIO_INT_STATUS_MASK,
792                                        WM8350_IM_GP3_EINT);
793         case WM8350_IRQ_GPIO(4):
794                 return wm8350_set_bits(wm8350,
795                                        WM8350_GPIO_INT_STATUS_MASK,
796                                        WM8350_IM_GP4_EINT);
797         case WM8350_IRQ_GPIO(5):
798                 return wm8350_set_bits(wm8350,
799                                        WM8350_GPIO_INT_STATUS_MASK,
800                                        WM8350_IM_GP5_EINT);
801         case WM8350_IRQ_GPIO(6):
802                 return wm8350_set_bits(wm8350,
803                                        WM8350_GPIO_INT_STATUS_MASK,
804                                        WM8350_IM_GP6_EINT);
805         case WM8350_IRQ_GPIO(7):
806                 return wm8350_set_bits(wm8350,
807                                        WM8350_GPIO_INT_STATUS_MASK,
808                                        WM8350_IM_GP7_EINT);
809         case WM8350_IRQ_GPIO(8):
810                 return wm8350_set_bits(wm8350,
811                                        WM8350_GPIO_INT_STATUS_MASK,
812                                        WM8350_IM_GP8_EINT);
813         case WM8350_IRQ_GPIO(9):
814                 return wm8350_set_bits(wm8350,
815                                        WM8350_GPIO_INT_STATUS_MASK,
816                                        WM8350_IM_GP9_EINT);
817         case WM8350_IRQ_GPIO(10):
818                 return wm8350_set_bits(wm8350,
819                                        WM8350_GPIO_INT_STATUS_MASK,
820                                        WM8350_IM_GP10_EINT);
821         case WM8350_IRQ_GPIO(11):
822                 return wm8350_set_bits(wm8350,
823                                        WM8350_GPIO_INT_STATUS_MASK,
824                                        WM8350_IM_GP11_EINT);
825         case WM8350_IRQ_GPIO(12):
826                 return wm8350_set_bits(wm8350,
827                                        WM8350_GPIO_INT_STATUS_MASK,
828                                        WM8350_IM_GP12_EINT);
829         default:
830                 dev_warn(wm8350->dev, "Attempting to mask unknown IRQ %d\n",
831                          irq);
832                 return -EINVAL;
833         }
834         return 0;
835 }
836 EXPORT_SYMBOL_GPL(wm8350_mask_irq);
837
838 int wm8350_unmask_irq(struct wm8350 *wm8350, int irq)
839 {
840         switch (irq) {
841         case WM8350_IRQ_CHG_BAT_HOT:
842                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
843                                          WM8350_IM_CHG_BAT_HOT_EINT);
844         case WM8350_IRQ_CHG_BAT_COLD:
845                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
846                                          WM8350_IM_CHG_BAT_COLD_EINT);
847         case WM8350_IRQ_CHG_BAT_FAIL:
848                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
849                                          WM8350_IM_CHG_BAT_FAIL_EINT);
850         case WM8350_IRQ_CHG_TO:
851                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
852                                          WM8350_IM_CHG_TO_EINT);
853         case WM8350_IRQ_CHG_END:
854                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
855                                          WM8350_IM_CHG_END_EINT);
856         case WM8350_IRQ_CHG_START:
857                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
858                                          WM8350_IM_CHG_START_EINT);
859         case WM8350_IRQ_CHG_FAST_RDY:
860                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
861                                          WM8350_IM_CHG_FAST_RDY_EINT);
862         case WM8350_IRQ_RTC_PER:
863                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
864                                          WM8350_IM_RTC_PER_EINT);
865         case WM8350_IRQ_RTC_SEC:
866                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
867                                          WM8350_IM_RTC_SEC_EINT);
868         case WM8350_IRQ_RTC_ALM:
869                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
870                                          WM8350_IM_RTC_ALM_EINT);
871         case WM8350_IRQ_CHG_VBATT_LT_3P9:
872                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
873                                          WM8350_IM_CHG_VBATT_LT_3P9_EINT);
874         case WM8350_IRQ_CHG_VBATT_LT_3P1:
875                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
876                                          WM8350_IM_CHG_VBATT_LT_3P1_EINT);
877         case WM8350_IRQ_CHG_VBATT_LT_2P85:
878                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
879                                          WM8350_IM_CHG_VBATT_LT_2P85_EINT);
880         case WM8350_IRQ_CS1:
881                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK,
882                                          WM8350_IM_CS1_EINT);
883         case WM8350_IRQ_CS2:
884                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK,
885                                          WM8350_IM_CS2_EINT);
886         case WM8350_IRQ_USB_LIMIT:
887                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK,
888                                          WM8350_IM_USB_LIMIT_EINT);
889         case WM8350_IRQ_AUXADC_DATARDY:
890                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK,
891                                          WM8350_IM_AUXADC_DATARDY_EINT);
892         case WM8350_IRQ_AUXADC_DCOMP4:
893                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK,
894                                          WM8350_IM_AUXADC_DCOMP4_EINT);
895         case WM8350_IRQ_AUXADC_DCOMP3:
896                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK,
897                                          WM8350_IM_AUXADC_DCOMP3_EINT);
898         case WM8350_IRQ_AUXADC_DCOMP2:
899                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK,
900                                          WM8350_IM_AUXADC_DCOMP2_EINT);
901         case WM8350_IRQ_AUXADC_DCOMP1:
902                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK,
903                                          WM8350_IM_AUXADC_DCOMP1_EINT);
904         case WM8350_IRQ_SYS_HYST_COMP_FAIL:
905                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK,
906                                          WM8350_IM_SYS_HYST_COMP_FAIL_EINT);
907         case WM8350_IRQ_SYS_CHIP_GT115:
908                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK,
909                                          WM8350_IM_SYS_CHIP_GT115_EINT);
910         case WM8350_IRQ_SYS_CHIP_GT140:
911                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK,
912                                          WM8350_IM_SYS_CHIP_GT140_EINT);
913         case WM8350_IRQ_SYS_WDOG_TO:
914                 return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK,
915                                          WM8350_IM_SYS_WDOG_TO_EINT);
916         case WM8350_IRQ_UV_LDO4:
917                 return wm8350_clear_bits(wm8350,
918                                          WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
919                                          WM8350_IM_UV_LDO4_EINT);
920         case WM8350_IRQ_UV_LDO3:
921                 return wm8350_clear_bits(wm8350,
922                                          WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
923                                          WM8350_IM_UV_LDO3_EINT);
924         case WM8350_IRQ_UV_LDO2:
925                 return wm8350_clear_bits(wm8350,
926                                          WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
927                                          WM8350_IM_UV_LDO2_EINT);
928         case WM8350_IRQ_UV_LDO1:
929                 return wm8350_clear_bits(wm8350,
930                                          WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
931                                          WM8350_IM_UV_LDO1_EINT);
932         case WM8350_IRQ_UV_DC6:
933                 return wm8350_clear_bits(wm8350,
934                                          WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
935                                          WM8350_IM_UV_DC6_EINT);
936         case WM8350_IRQ_UV_DC5:
937                 return wm8350_clear_bits(wm8350,
938                                          WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
939                                          WM8350_IM_UV_DC5_EINT);
940         case WM8350_IRQ_UV_DC4:
941                 return wm8350_clear_bits(wm8350,
942                                          WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
943                                          WM8350_IM_UV_DC4_EINT);
944         case WM8350_IRQ_UV_DC3:
945                 return wm8350_clear_bits(wm8350,
946                                          WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
947                                          WM8350_IM_UV_DC3_EINT);
948         case WM8350_IRQ_UV_DC2:
949                 return wm8350_clear_bits(wm8350,
950                                          WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
951                                          WM8350_IM_UV_DC2_EINT);
952         case WM8350_IRQ_UV_DC1:
953                 return wm8350_clear_bits(wm8350,
954                                          WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
955                                          WM8350_IM_UV_DC1_EINT);
956         case WM8350_IRQ_OC_LS:
957                 return wm8350_clear_bits(wm8350,
958                                          WM8350_OVER_CURRENT_INT_STATUS_MASK,
959                                          WM8350_IM_OC_LS_EINT);
960         case WM8350_IRQ_EXT_USB_FB:
961                 return wm8350_clear_bits(wm8350,
962                                          WM8350_COMPARATOR_INT_STATUS_MASK,
963                                          WM8350_IM_EXT_USB_FB_EINT);
964         case WM8350_IRQ_EXT_WALL_FB:
965                 return wm8350_clear_bits(wm8350,
966                                          WM8350_COMPARATOR_INT_STATUS_MASK,
967                                          WM8350_IM_EXT_WALL_FB_EINT);
968         case WM8350_IRQ_EXT_BAT_FB:
969                 return wm8350_clear_bits(wm8350,
970                                          WM8350_COMPARATOR_INT_STATUS_MASK,
971                                          WM8350_IM_EXT_BAT_FB_EINT);
972         case WM8350_IRQ_CODEC_JCK_DET_L:
973                 return wm8350_clear_bits(wm8350,
974                                          WM8350_COMPARATOR_INT_STATUS_MASK,
975                                          WM8350_IM_CODEC_JCK_DET_L_EINT);
976         case WM8350_IRQ_CODEC_JCK_DET_R:
977                 return wm8350_clear_bits(wm8350,
978                                          WM8350_COMPARATOR_INT_STATUS_MASK,
979                                          WM8350_IM_CODEC_JCK_DET_R_EINT);
980         case WM8350_IRQ_CODEC_MICSCD:
981                 return wm8350_clear_bits(wm8350,
982                                          WM8350_COMPARATOR_INT_STATUS_MASK,
983                                          WM8350_IM_CODEC_MICSCD_EINT);
984         case WM8350_IRQ_CODEC_MICD:
985                 return wm8350_clear_bits(wm8350,
986                                          WM8350_COMPARATOR_INT_STATUS_MASK,
987                                          WM8350_IM_CODEC_MICD_EINT);
988         case WM8350_IRQ_WKUP_OFF_STATE:
989                 return wm8350_clear_bits(wm8350,
990                                          WM8350_COMPARATOR_INT_STATUS_MASK,
991                                          WM8350_IM_WKUP_OFF_STATE_EINT);
992         case WM8350_IRQ_WKUP_HIB_STATE:
993                 return wm8350_clear_bits(wm8350,
994                                          WM8350_COMPARATOR_INT_STATUS_MASK,
995                                          WM8350_IM_WKUP_HIB_STATE_EINT);
996         case WM8350_IRQ_WKUP_CONV_FAULT:
997                 return wm8350_clear_bits(wm8350,
998                                          WM8350_COMPARATOR_INT_STATUS_MASK,
999                                          WM8350_IM_WKUP_CONV_FAULT_EINT);
1000         case WM8350_IRQ_WKUP_WDOG_RST:
1001                 return wm8350_clear_bits(wm8350,
1002                                          WM8350_COMPARATOR_INT_STATUS_MASK,
1003                                          WM8350_IM_WKUP_OFF_STATE_EINT);
1004         case WM8350_IRQ_WKUP_GP_PWR_ON:
1005                 return wm8350_clear_bits(wm8350,
1006                                          WM8350_COMPARATOR_INT_STATUS_MASK,
1007                                          WM8350_IM_WKUP_GP_PWR_ON_EINT);
1008         case WM8350_IRQ_WKUP_ONKEY:
1009                 return wm8350_clear_bits(wm8350,
1010                                          WM8350_COMPARATOR_INT_STATUS_MASK,
1011                                          WM8350_IM_WKUP_ONKEY_EINT);
1012         case WM8350_IRQ_WKUP_GP_WAKEUP:
1013                 return wm8350_clear_bits(wm8350,
1014                                          WM8350_COMPARATOR_INT_STATUS_MASK,
1015                                          WM8350_IM_WKUP_GP_WAKEUP_EINT);
1016         case WM8350_IRQ_GPIO(0):
1017                 return wm8350_clear_bits(wm8350,
1018                                          WM8350_GPIO_INT_STATUS_MASK,
1019                                          WM8350_IM_GP0_EINT);
1020         case WM8350_IRQ_GPIO(1):
1021                 return wm8350_clear_bits(wm8350,
1022                                          WM8350_GPIO_INT_STATUS_MASK,
1023                                          WM8350_IM_GP1_EINT);
1024         case WM8350_IRQ_GPIO(2):
1025                 return wm8350_clear_bits(wm8350,
1026                                          WM8350_GPIO_INT_STATUS_MASK,
1027                                          WM8350_IM_GP2_EINT);
1028         case WM8350_IRQ_GPIO(3):
1029                 return wm8350_clear_bits(wm8350,
1030                                          WM8350_GPIO_INT_STATUS_MASK,
1031                                          WM8350_IM_GP3_EINT);
1032         case WM8350_IRQ_GPIO(4):
1033                 return wm8350_clear_bits(wm8350,
1034                                          WM8350_GPIO_INT_STATUS_MASK,
1035                                          WM8350_IM_GP4_EINT);
1036         case WM8350_IRQ_GPIO(5):
1037                 return wm8350_clear_bits(wm8350,
1038                                          WM8350_GPIO_INT_STATUS_MASK,
1039                                          WM8350_IM_GP5_EINT);
1040         case WM8350_IRQ_GPIO(6):
1041                 return wm8350_clear_bits(wm8350,
1042                                          WM8350_GPIO_INT_STATUS_MASK,
1043                                          WM8350_IM_GP6_EINT);
1044         case WM8350_IRQ_GPIO(7):
1045                 return wm8350_clear_bits(wm8350,
1046                                          WM8350_GPIO_INT_STATUS_MASK,
1047                                          WM8350_IM_GP7_EINT);
1048         case WM8350_IRQ_GPIO(8):
1049                 return wm8350_clear_bits(wm8350,
1050                                          WM8350_GPIO_INT_STATUS_MASK,
1051                                          WM8350_IM_GP8_EINT);
1052         case WM8350_IRQ_GPIO(9):
1053                 return wm8350_clear_bits(wm8350,
1054                                          WM8350_GPIO_INT_STATUS_MASK,
1055                                          WM8350_IM_GP9_EINT);
1056         case WM8350_IRQ_GPIO(10):
1057                 return wm8350_clear_bits(wm8350,
1058                                          WM8350_GPIO_INT_STATUS_MASK,
1059                                          WM8350_IM_GP10_EINT);
1060         case WM8350_IRQ_GPIO(11):
1061                 return wm8350_clear_bits(wm8350,
1062                                          WM8350_GPIO_INT_STATUS_MASK,
1063                                          WM8350_IM_GP11_EINT);
1064         case WM8350_IRQ_GPIO(12):
1065                 return wm8350_clear_bits(wm8350,
1066                                          WM8350_GPIO_INT_STATUS_MASK,
1067                                          WM8350_IM_GP12_EINT);
1068         default:
1069                 dev_warn(wm8350->dev, "Attempting to unmask unknown IRQ %d\n",
1070                          irq);
1071                 return -EINVAL;
1072         }
1073         return 0;
1074 }
1075 EXPORT_SYMBOL_GPL(wm8350_unmask_irq);
1076
1077 int wm8350_read_auxadc(struct wm8350 *wm8350, int channel, int scale, int vref)
1078 {
1079         u16 reg, result = 0;
1080         int tries = 5;
1081
1082         if (channel < WM8350_AUXADC_AUX1 || channel > WM8350_AUXADC_TEMP)
1083                 return -EINVAL;
1084         if (channel >= WM8350_AUXADC_USB && channel <= WM8350_AUXADC_TEMP
1085             && (scale != 0 || vref != 0))
1086                 return -EINVAL;
1087
1088         mutex_lock(&wm8350->auxadc_mutex);
1089
1090         /* Turn on the ADC */
1091         reg = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_5);
1092         wm8350_reg_write(wm8350, WM8350_POWER_MGMT_5, reg | WM8350_AUXADC_ENA);
1093
1094         if (scale || vref) {
1095                 reg = scale << 13;
1096                 reg |= vref << 12;
1097                 wm8350_reg_write(wm8350, WM8350_AUX1_READBACK + channel, reg);
1098         }
1099
1100         reg = wm8350_reg_read(wm8350, WM8350_DIGITISER_CONTROL_1);
1101         reg |= 1 << channel | WM8350_AUXADC_POLL;
1102         wm8350_reg_write(wm8350, WM8350_DIGITISER_CONTROL_1, reg);
1103
1104         do {
1105                 schedule_timeout_interruptible(1);
1106                 reg = wm8350_reg_read(wm8350, WM8350_DIGITISER_CONTROL_1);
1107         } while ((reg & WM8350_AUXADC_POLL) && --tries);
1108
1109         if (!tries)
1110                 dev_err(wm8350->dev, "adc chn %d read timeout\n", channel);
1111         else
1112                 result = wm8350_reg_read(wm8350,
1113                                          WM8350_AUX1_READBACK + channel);
1114
1115         /* Turn off the ADC */
1116         reg = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_5);
1117         wm8350_reg_write(wm8350, WM8350_POWER_MGMT_5,
1118                          reg & ~WM8350_AUXADC_ENA);
1119
1120         mutex_unlock(&wm8350->auxadc_mutex);
1121
1122         return result & WM8350_AUXADC_DATA1_MASK;
1123 }
1124 EXPORT_SYMBOL_GPL(wm8350_read_auxadc);
1125
1126 /*
1127  * Cache is always host endian.
1128  */
1129 static int wm8350_create_cache(struct wm8350 *wm8350, int type, int mode)
1130 {
1131         int i, ret = 0;
1132         u16 value;
1133         const u16 *reg_map;
1134
1135         switch (type) {
1136         case 0:
1137                 switch (mode) {
1138 #ifdef CONFIG_MFD_WM8350_CONFIG_MODE_0
1139                 case 0:
1140                         reg_map = wm8350_mode0_defaults;
1141                         break;
1142 #endif
1143 #ifdef CONFIG_MFD_WM8350_CONFIG_MODE_1
1144                 case 1:
1145                         reg_map = wm8350_mode1_defaults;
1146                         break;
1147 #endif
1148 #ifdef CONFIG_MFD_WM8350_CONFIG_MODE_2
1149                 case 2:
1150                         reg_map = wm8350_mode2_defaults;
1151                         break;
1152 #endif
1153 #ifdef CONFIG_MFD_WM8350_CONFIG_MODE_3
1154                 case 3:
1155                         reg_map = wm8350_mode3_defaults;
1156                         break;
1157 #endif
1158                 default:
1159                         dev_err(wm8350->dev,
1160                                 "WM8350 configuration mode %d not supported\n",
1161                                 mode);
1162                         return -EINVAL;
1163                 }
1164                 break;
1165
1166         case 1:
1167                 switch (mode) {
1168 #ifdef CONFIG_MFD_WM8351_CONFIG_MODE_0
1169                 case 0:
1170                         reg_map = wm8351_mode0_defaults;
1171                         break;
1172 #endif
1173 #ifdef CONFIG_MFD_WM8351_CONFIG_MODE_1
1174                 case 1:
1175                         reg_map = wm8351_mode1_defaults;
1176                         break;
1177 #endif
1178 #ifdef CONFIG_MFD_WM8351_CONFIG_MODE_2
1179                 case 2:
1180                         reg_map = wm8351_mode2_defaults;
1181                         break;
1182 #endif
1183 #ifdef CONFIG_MFD_WM8351_CONFIG_MODE_3
1184                 case 3:
1185                         reg_map = wm8351_mode3_defaults;
1186                         break;
1187 #endif
1188                 default:
1189                         dev_err(wm8350->dev,
1190                                 "WM8351 configuration mode %d not supported\n",
1191                                 mode);
1192                         return -EINVAL;
1193                 }
1194                 break;
1195
1196         case 2:
1197                 switch (mode) {
1198 #ifdef CONFIG_MFD_WM8352_CONFIG_MODE_0
1199                 case 0:
1200                         reg_map = wm8352_mode0_defaults;
1201                         break;
1202 #endif
1203 #ifdef CONFIG_MFD_WM8352_CONFIG_MODE_1
1204                 case 1:
1205                         reg_map = wm8352_mode1_defaults;
1206                         break;
1207 #endif
1208 #ifdef CONFIG_MFD_WM8352_CONFIG_MODE_2
1209                 case 2:
1210                         reg_map = wm8352_mode2_defaults;
1211                         break;
1212 #endif
1213 #ifdef CONFIG_MFD_WM8352_CONFIG_MODE_3
1214                 case 3:
1215                         reg_map = wm8352_mode3_defaults;
1216                         break;
1217 #endif
1218                 default:
1219                         dev_err(wm8350->dev,
1220                                 "WM8352 configuration mode %d not supported\n",
1221                                 mode);
1222                         return -EINVAL;
1223                 }
1224                 break;
1225
1226         default:
1227                 dev_err(wm8350->dev,
1228                         "WM835x configuration mode %d not supported\n",
1229                         mode);
1230                 return -EINVAL;
1231         }
1232
1233         wm8350->reg_cache =
1234                 kmalloc(sizeof(u16) * (WM8350_MAX_REGISTER + 1), GFP_KERNEL);
1235         if (wm8350->reg_cache == NULL)
1236                 return -ENOMEM;
1237
1238         /* Read the initial cache state back from the device - this is
1239          * a PMIC so the device many not be in a virgin state and we
1240          * can't rely on the silicon values.
1241          */
1242         ret = wm8350->read_dev(wm8350, 0,
1243                                sizeof(u16) * (WM8350_MAX_REGISTER + 1),
1244                                wm8350->reg_cache);
1245         if (ret < 0) {
1246                 dev_err(wm8350->dev,
1247                         "failed to read initial cache values\n");
1248                 goto out;
1249         }
1250
1251         /* Mask out uncacheable/unreadable bits and the audio. */
1252         for (i = 0; i < WM8350_MAX_REGISTER; i++) {
1253                 if (wm8350_reg_io_map[i].readable &&
1254                     (i < WM8350_CLOCK_CONTROL_1 || i > WM8350_AIF_TEST)) {
1255                         value = be16_to_cpu(wm8350->reg_cache[i]);
1256                         value &= wm8350_reg_io_map[i].readable;
1257                         wm8350->reg_cache[i] = value;
1258                 } else
1259                         wm8350->reg_cache[i] = reg_map[i];
1260         }
1261
1262 out:
1263         return ret;
1264 }
1265
1266 /*
1267  * Register a client device.  This is non-fatal since there is no need to
1268  * fail the entire device init due to a single platform device failing.
1269  */
1270 static void wm8350_client_dev_register(struct wm8350 *wm8350,
1271                                        const char *name,
1272                                        struct platform_device **pdev)
1273 {
1274         int ret;
1275
1276         *pdev = platform_device_alloc(name, -1);
1277         if (pdev == NULL) {
1278                 dev_err(wm8350->dev, "Failed to allocate %s\n", name);
1279                 return;
1280         }
1281
1282         (*pdev)->dev.parent = wm8350->dev;
1283         platform_set_drvdata(*pdev, wm8350);
1284         ret = platform_device_add(*pdev);
1285         if (ret != 0) {
1286                 dev_err(wm8350->dev, "Failed to register %s: %d\n", name, ret);
1287                 platform_device_put(*pdev);
1288                 *pdev = NULL;
1289         }
1290 }
1291
1292 int wm8350_device_init(struct wm8350 *wm8350, int irq,
1293                        struct wm8350_platform_data *pdata)
1294 {
1295         int ret;
1296         u16 id1, id2, mask_rev;
1297         u16 cust_id, mode, chip_rev;
1298
1299         /* get WM8350 revision and config mode */
1300         ret = wm8350->read_dev(wm8350, WM8350_RESET_ID, sizeof(id1), &id1);
1301         if (ret != 0) {
1302                 dev_err(wm8350->dev, "Failed to read ID: %d\n", ret);
1303                 goto err;
1304         }
1305
1306         ret = wm8350->read_dev(wm8350, WM8350_ID, sizeof(id2), &id2);
1307         if (ret != 0) {
1308                 dev_err(wm8350->dev, "Failed to read ID: %d\n", ret);
1309                 goto err;
1310         }
1311
1312         ret = wm8350->read_dev(wm8350, WM8350_REVISION, sizeof(mask_rev),
1313                                &mask_rev);
1314         if (ret != 0) {
1315                 dev_err(wm8350->dev, "Failed to read revision: %d\n", ret);
1316                 goto err;
1317         }
1318
1319         id1 = be16_to_cpu(id1);
1320         id2 = be16_to_cpu(id2);
1321         mask_rev = be16_to_cpu(mask_rev);
1322
1323         if (id1 != 0x6143) {
1324                 dev_err(wm8350->dev,
1325                         "Device with ID %x is not a WM8350\n", id1);
1326                 ret = -ENODEV;
1327                 goto err;
1328         }
1329
1330         mode = id2 & WM8350_CONF_STS_MASK >> 10;
1331         cust_id = id2 & WM8350_CUST_ID_MASK;
1332         chip_rev = (id2 & WM8350_CHIP_REV_MASK) >> 12;
1333         dev_info(wm8350->dev,
1334                  "CONF_STS %d, CUST_ID %d, MASK_REV %d, CHIP_REV %d\n",
1335                  mode, cust_id, mask_rev, chip_rev);
1336
1337         if (cust_id != 0) {
1338                 dev_err(wm8350->dev, "Unsupported CUST_ID\n");
1339                 ret = -ENODEV;
1340                 goto err;
1341         }
1342
1343         switch (mask_rev) {
1344         case 0:
1345                 wm8350->pmic.max_dcdc = WM8350_DCDC_6;
1346                 wm8350->pmic.max_isink = WM8350_ISINK_B;
1347
1348                 switch (chip_rev) {
1349                 case WM8350_REV_E:
1350                         dev_info(wm8350->dev, "WM8350 Rev E\n");
1351                         break;
1352                 case WM8350_REV_F:
1353                         dev_info(wm8350->dev, "WM8350 Rev F\n");
1354                         break;
1355                 case WM8350_REV_G:
1356                         dev_info(wm8350->dev, "WM8350 Rev G\n");
1357                         wm8350->power.rev_g_coeff = 1;
1358                         break;
1359                 case WM8350_REV_H:
1360                         dev_info(wm8350->dev, "WM8350 Rev H\n");
1361                         wm8350->power.rev_g_coeff = 1;
1362                         break;
1363                 default:
1364                         /* For safety we refuse to run on unknown hardware */
1365                         dev_err(wm8350->dev, "Unknown WM8350 CHIP_REV\n");
1366                         ret = -ENODEV;
1367                         goto err;
1368                 }
1369                 break;
1370
1371         case 1:
1372                 wm8350->pmic.max_dcdc = WM8350_DCDC_4;
1373                 wm8350->pmic.max_isink = WM8350_ISINK_A;
1374
1375                 switch (chip_rev) {
1376                 case 0:
1377                         dev_info(wm8350->dev, "WM8351 Rev A\n");
1378                         wm8350->power.rev_g_coeff = 1;
1379                         break;
1380
1381                 case 1:
1382                         dev_info(wm8350->dev, "WM8351 Rev B\n");
1383                         wm8350->power.rev_g_coeff = 1;
1384                         break;
1385
1386                 default:
1387                         dev_err(wm8350->dev, "Unknown WM8351 CHIP_REV\n");
1388                         ret = -ENODEV;
1389                         goto err;
1390                 }
1391                 break;
1392
1393         case 2:
1394                 wm8350->pmic.max_dcdc = WM8350_DCDC_6;
1395                 wm8350->pmic.max_isink = WM8350_ISINK_B;
1396
1397                 switch (chip_rev) {
1398                 case 0:
1399                         dev_info(wm8350->dev, "WM8352 Rev A\n");
1400                         wm8350->power.rev_g_coeff = 1;
1401                         break;
1402
1403                 default:
1404                         dev_err(wm8350->dev, "Unknown WM8352 CHIP_REV\n");
1405                         ret = -ENODEV;
1406                         goto err;
1407                 }
1408                 break;
1409
1410         default:
1411                 dev_err(wm8350->dev, "Unknown MASK_REV\n");
1412                 ret = -ENODEV;
1413                 goto err;
1414         }
1415
1416         ret = wm8350_create_cache(wm8350, mask_rev, mode);
1417         if (ret < 0) {
1418                 dev_err(wm8350->dev, "Failed to create register cache\n");
1419                 return ret;
1420         }
1421
1422         wm8350_reg_write(wm8350, WM8350_SYSTEM_INTERRUPTS_MASK, 0xFFFF);
1423         wm8350_reg_write(wm8350, WM8350_INT_STATUS_1_MASK, 0xFFFF);
1424         wm8350_reg_write(wm8350, WM8350_INT_STATUS_2_MASK, 0xFFFF);
1425         wm8350_reg_write(wm8350, WM8350_UNDER_VOLTAGE_INT_STATUS_MASK, 0xFFFF);
1426         wm8350_reg_write(wm8350, WM8350_GPIO_INT_STATUS_MASK, 0xFFFF);
1427         wm8350_reg_write(wm8350, WM8350_COMPARATOR_INT_STATUS_MASK, 0xFFFF);
1428
1429         mutex_init(&wm8350->auxadc_mutex);
1430         mutex_init(&wm8350->irq_mutex);
1431         INIT_WORK(&wm8350->irq_work, wm8350_irq_worker);
1432         if (irq) {
1433                 int flags = 0;
1434
1435                 if (pdata && pdata->irq_high) {
1436                         flags |= IRQF_TRIGGER_HIGH;
1437
1438                         wm8350_set_bits(wm8350, WM8350_SYSTEM_CONTROL_1,
1439                                         WM8350_IRQ_POL);
1440                 } else {
1441                         flags |= IRQF_TRIGGER_LOW;
1442
1443                         wm8350_clear_bits(wm8350, WM8350_SYSTEM_CONTROL_1,
1444                                           WM8350_IRQ_POL);
1445                 }
1446
1447                 ret = request_irq(irq, wm8350_irq, flags,
1448                                   "wm8350", wm8350);
1449                 if (ret != 0) {
1450                         dev_err(wm8350->dev, "Failed to request IRQ: %d\n",
1451                                 ret);
1452                         goto err;
1453                 }
1454         } else {
1455                 dev_err(wm8350->dev, "No IRQ configured\n");
1456                 goto err;
1457         }
1458         wm8350->chip_irq = irq;
1459
1460         if (pdata && pdata->init) {
1461                 ret = pdata->init(wm8350);
1462                 if (ret != 0) {
1463                         dev_err(wm8350->dev, "Platform init() failed: %d\n",
1464                                 ret);
1465                         goto err;
1466                 }
1467         }
1468
1469         wm8350_reg_write(wm8350, WM8350_SYSTEM_INTERRUPTS_MASK, 0x0);
1470
1471         wm8350_client_dev_register(wm8350, "wm8350-codec",
1472                                    &(wm8350->codec.pdev));
1473         wm8350_client_dev_register(wm8350, "wm8350-gpio",
1474                                    &(wm8350->gpio.pdev));
1475         wm8350_client_dev_register(wm8350, "wm8350-power",
1476                                    &(wm8350->power.pdev));
1477         wm8350_client_dev_register(wm8350, "wm8350-rtc", &(wm8350->rtc.pdev));
1478         wm8350_client_dev_register(wm8350, "wm8350-wdt", &(wm8350->wdt.pdev));
1479
1480         return 0;
1481
1482 err:
1483         kfree(wm8350->reg_cache);
1484         return ret;
1485 }
1486 EXPORT_SYMBOL_GPL(wm8350_device_init);
1487
1488 void wm8350_device_exit(struct wm8350 *wm8350)
1489 {
1490         int i;
1491
1492         for (i = 0; i < ARRAY_SIZE(wm8350->pmic.led); i++)
1493                 platform_device_unregister(wm8350->pmic.led[i].pdev);
1494
1495         for (i = 0; i < ARRAY_SIZE(wm8350->pmic.pdev); i++)
1496                 platform_device_unregister(wm8350->pmic.pdev[i]);
1497
1498         platform_device_unregister(wm8350->wdt.pdev);
1499         platform_device_unregister(wm8350->rtc.pdev);
1500         platform_device_unregister(wm8350->power.pdev);
1501         platform_device_unregister(wm8350->gpio.pdev);
1502         platform_device_unregister(wm8350->codec.pdev);
1503
1504         free_irq(wm8350->chip_irq, wm8350);
1505         flush_work(&wm8350->irq_work);
1506         kfree(wm8350->reg_cache);
1507 }
1508 EXPORT_SYMBOL_GPL(wm8350_device_exit);
1509
1510 MODULE_DESCRIPTION("WM8350 AudioPlus PMIC core driver");
1511 MODULE_LICENSE("GPL");