e14d70e074189624c86f5c2bce2f9a596cad19ae
[sfrench/cifs-2.6.git] / drivers / mfd / sm501.c
1 /* linux/drivers/mfd/sm501.c
2  *
3  * Copyright (C) 2006 Simtec Electronics
4  *      Ben Dooks <ben@simtec.co.uk>
5  *      Vincent Sanders <vince@simtec.co.uk>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  *
11  * SM501 MFD driver
12 */
13
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/delay.h>
17 #include <linux/init.h>
18 #include <linux/list.h>
19 #include <linux/device.h>
20 #include <linux/platform_device.h>
21 #include <linux/pci.h>
22
23 #include <linux/sm501.h>
24 #include <linux/sm501-regs.h>
25
26 #include <asm/io.h>
27
28 struct sm501_device {
29         struct list_head                list;
30         struct platform_device          pdev;
31 };
32
33 struct sm501_devdata {
34         spinlock_t                       reg_lock;
35         struct mutex                     clock_lock;
36         struct list_head                 devices;
37
38         struct device                   *dev;
39         struct resource                 *io_res;
40         struct resource                 *mem_res;
41         struct resource                 *regs_claim;
42         struct sm501_platdata           *platdata;
43
44         unsigned int                     in_suspend;
45         unsigned long                    pm_misc;
46
47         int                              unit_power[20];
48         unsigned int                     pdev_id;
49         unsigned int                     irq;
50         void __iomem                    *regs;
51 };
52
53 #define MHZ (1000 * 1000)
54
55 #ifdef DEBUG
56 static const unsigned int misc_div[] = {
57         [0]             = 1,
58         [1]             = 2,
59         [2]             = 4,
60         [3]             = 8,
61         [4]             = 16,
62         [5]             = 32,
63         [6]             = 64,
64         [7]             = 128,
65         [8]             = 3,
66         [9]             = 6,
67         [10]            = 12,
68         [11]            = 24,
69         [12]            = 48,
70         [13]            = 96,
71         [14]            = 192,
72         [15]            = 384,
73 };
74
75 static const unsigned int px_div[] = {
76         [0]             = 1,
77         [1]             = 2,
78         [2]             = 4,
79         [3]             = 8,
80         [4]             = 16,
81         [5]             = 32,
82         [6]             = 64,
83         [7]             = 128,
84         [8]             = 3,
85         [9]             = 6,
86         [10]            = 12,
87         [11]            = 24,
88         [12]            = 48,
89         [13]            = 96,
90         [14]            = 192,
91         [15]            = 384,
92         [16]            = 5,
93         [17]            = 10,
94         [18]            = 20,
95         [19]            = 40,
96         [20]            = 80,
97         [21]            = 160,
98         [22]            = 320,
99         [23]            = 604,
100 };
101
102 static unsigned long decode_div(unsigned long pll2, unsigned long val,
103                                 unsigned int lshft, unsigned int selbit,
104                                 unsigned long mask, const unsigned int *dtab)
105 {
106         if (val & selbit)
107                 pll2 = 288 * MHZ;
108
109         return pll2 / dtab[(val >> lshft) & mask];
110 }
111
112 #define fmt_freq(x) ((x) / MHZ), ((x) % MHZ), (x)
113
114 /* sm501_dump_clk
115  *
116  * Print out the current clock configuration for the device
117 */
118
119 static void sm501_dump_clk(struct sm501_devdata *sm)
120 {
121         unsigned long misct = readl(sm->regs + SM501_MISC_TIMING);
122         unsigned long pm0 = readl(sm->regs + SM501_POWER_MODE_0_CLOCK);
123         unsigned long pm1 = readl(sm->regs + SM501_POWER_MODE_1_CLOCK);
124         unsigned long pmc = readl(sm->regs + SM501_POWER_MODE_CONTROL);
125         unsigned long sdclk0, sdclk1;
126         unsigned long pll2 = 0;
127
128         switch (misct & 0x30) {
129         case 0x00:
130                 pll2 = 336 * MHZ;
131                 break;
132         case 0x10:
133                 pll2 = 288 * MHZ;
134                 break;
135         case 0x20:
136                 pll2 = 240 * MHZ;
137                 break;
138         case 0x30:
139                 pll2 = 192 * MHZ;
140                 break;
141         }
142
143         sdclk0 = (misct & (1<<12)) ? pll2 : 288 * MHZ;
144         sdclk0 /= misc_div[((misct >> 8) & 0xf)];
145
146         sdclk1 = (misct & (1<<20)) ? pll2 : 288 * MHZ;
147         sdclk1 /= misc_div[((misct >> 16) & 0xf)];
148
149         dev_dbg(sm->dev, "MISCT=%08lx, PM0=%08lx, PM1=%08lx\n",
150                 misct, pm0, pm1);
151
152         dev_dbg(sm->dev, "PLL2 = %ld.%ld MHz (%ld), SDCLK0=%08lx, SDCLK1=%08lx\n",
153                 fmt_freq(pll2), sdclk0, sdclk1);
154
155         dev_dbg(sm->dev, "SDRAM: PM0=%ld, PM1=%ld\n", sdclk0, sdclk1);
156
157         dev_dbg(sm->dev, "PM0[%c]: "
158                  "P2 %ld.%ld MHz (%ld), V2 %ld.%ld (%ld), "
159 x                "M %ld.%ld (%ld), MX1 %ld.%ld (%ld)\n",
160                  (pmc & 3 ) == 0 ? '*' : '-',
161                  fmt_freq(decode_div(pll2, pm0, 24, 1<<29, 31, px_div)),
162                  fmt_freq(decode_div(pll2, pm0, 16, 1<<20, 15, misc_div)),
163                  fmt_freq(decode_div(pll2, pm0, 8,  1<<12, 15, misc_div)),
164                  fmt_freq(decode_div(pll2, pm0, 0,  1<<4,  15, misc_div)));
165
166         dev_dbg(sm->dev, "PM1[%c]: "
167                 "P2 %ld.%ld MHz (%ld), V2 %ld.%ld (%ld), "
168                 "M %ld.%ld (%ld), MX1 %ld.%ld (%ld)\n",
169                 (pmc & 3 ) == 1 ? '*' : '-',
170                 fmt_freq(decode_div(pll2, pm1, 24, 1<<29, 31, px_div)),
171                 fmt_freq(decode_div(pll2, pm1, 16, 1<<20, 15, misc_div)),
172                 fmt_freq(decode_div(pll2, pm1, 8,  1<<12, 15, misc_div)),
173                 fmt_freq(decode_div(pll2, pm1, 0,  1<<4,  15, misc_div)));
174 }
175
176 static void sm501_dump_regs(struct sm501_devdata *sm)
177 {
178         void __iomem *regs = sm->regs;
179
180         dev_info(sm->dev, "System Control   %08x\n",
181                         readl(regs + SM501_SYSTEM_CONTROL));
182         dev_info(sm->dev, "Misc Control     %08x\n",
183                         readl(regs + SM501_MISC_CONTROL));
184         dev_info(sm->dev, "GPIO Control Low %08x\n",
185                         readl(regs + SM501_GPIO31_0_CONTROL));
186         dev_info(sm->dev, "GPIO Control Hi  %08x\n",
187                         readl(regs + SM501_GPIO63_32_CONTROL));
188         dev_info(sm->dev, "DRAM Control     %08x\n",
189                         readl(regs + SM501_DRAM_CONTROL));
190         dev_info(sm->dev, "Arbitration Ctrl %08x\n",
191                         readl(regs + SM501_ARBTRTN_CONTROL));
192         dev_info(sm->dev, "Misc Timing      %08x\n",
193                         readl(regs + SM501_MISC_TIMING));
194 }
195
196 static void sm501_dump_gate(struct sm501_devdata *sm)
197 {
198         dev_info(sm->dev, "CurrentGate      %08x\n",
199                         readl(sm->regs + SM501_CURRENT_GATE));
200         dev_info(sm->dev, "CurrentClock     %08x\n",
201                         readl(sm->regs + SM501_CURRENT_CLOCK));
202         dev_info(sm->dev, "PowerModeControl %08x\n",
203                         readl(sm->regs + SM501_POWER_MODE_CONTROL));
204 }
205
206 #else
207 static inline void sm501_dump_gate(struct sm501_devdata *sm) { }
208 static inline void sm501_dump_regs(struct sm501_devdata *sm) { }
209 static inline void sm501_dump_clk(struct sm501_devdata *sm) { }
210 #endif
211
212 /* sm501_sync_regs
213  *
214  * ensure the
215 */
216
217 static void sm501_sync_regs(struct sm501_devdata *sm)
218 {
219         readl(sm->regs);
220 }
221
222 static inline void sm501_mdelay(struct sm501_devdata *sm, unsigned int delay)
223 {
224         /* during suspend/resume, we are currently not allowed to sleep,
225          * so change to using mdelay() instead of msleep() if we
226          * are in one of these paths */
227
228         if (sm->in_suspend)
229                 mdelay(delay);
230         else
231                 msleep(delay);
232 }
233
234 /* sm501_misc_control
235  *
236  * alters the miscellaneous control parameters
237 */
238
239 int sm501_misc_control(struct device *dev,
240                        unsigned long set, unsigned long clear)
241 {
242         struct sm501_devdata *sm = dev_get_drvdata(dev);
243         unsigned long misc;
244         unsigned long save;
245         unsigned long to;
246
247         spin_lock_irqsave(&sm->reg_lock, save);
248
249         misc = readl(sm->regs + SM501_MISC_CONTROL);
250         to = (misc & ~clear) | set;
251
252         if (to != misc) {
253                 writel(to, sm->regs + SM501_MISC_CONTROL);
254                 sm501_sync_regs(sm);
255
256                 dev_dbg(sm->dev, "MISC_CONTROL %08lx\n", misc);
257         }
258
259         spin_unlock_irqrestore(&sm->reg_lock, save);
260         return to;
261 }
262
263 EXPORT_SYMBOL_GPL(sm501_misc_control);
264
265 /* sm501_modify_reg
266  *
267  * Modify a register in the SM501 which may be shared with other
268  * drivers.
269 */
270
271 unsigned long sm501_modify_reg(struct device *dev,
272                                unsigned long reg,
273                                unsigned long set,
274                                unsigned long clear)
275 {
276         struct sm501_devdata *sm = dev_get_drvdata(dev);
277         unsigned long data;
278         unsigned long save;
279
280         spin_lock_irqsave(&sm->reg_lock, save);
281
282         data = readl(sm->regs + reg);
283         data |= set;
284         data &= ~clear;
285
286         writel(data, sm->regs + reg);
287         sm501_sync_regs(sm);
288
289         spin_unlock_irqrestore(&sm->reg_lock, save);
290
291         return data;
292 }
293
294 EXPORT_SYMBOL_GPL(sm501_modify_reg);
295
296 unsigned long sm501_gpio_get(struct device *dev,
297                              unsigned long gpio)
298 {
299         struct sm501_devdata *sm = dev_get_drvdata(dev);
300         unsigned long result;
301         unsigned long reg;
302
303         reg = (gpio > 32) ? SM501_GPIO_DATA_HIGH : SM501_GPIO_DATA_LOW;
304         result = readl(sm->regs + reg);
305
306         result >>= (gpio & 31);
307         return result & 1UL;
308 }
309
310 EXPORT_SYMBOL_GPL(sm501_gpio_get);
311
312 void sm501_gpio_set(struct device *dev,
313                     unsigned long gpio,
314                     unsigned int to,
315                     unsigned int dir)
316 {
317         struct sm501_devdata *sm = dev_get_drvdata(dev);
318
319         unsigned long bit = 1 << (gpio & 31);
320         unsigned long base;
321         unsigned long save;
322         unsigned long val;
323
324         base = (gpio > 32) ? SM501_GPIO_DATA_HIGH : SM501_GPIO_DATA_LOW;
325         base += SM501_GPIO;
326
327         spin_lock_irqsave(&sm->reg_lock, save);
328
329         val = readl(sm->regs + base) & ~bit;
330         if (to)
331                 val |= bit;
332         writel(val, sm->regs + base);
333
334         val = readl(sm->regs + SM501_GPIO_DDR_LOW) & ~bit;
335         if (dir)
336                 val |= bit;
337
338         writel(val, sm->regs + SM501_GPIO_DDR_LOW);
339         sm501_sync_regs(sm);
340
341         spin_unlock_irqrestore(&sm->reg_lock, save);
342
343 }
344
345 EXPORT_SYMBOL_GPL(sm501_gpio_set);
346
347
348 /* sm501_unit_power
349  *
350  * alters the power active gate to set specific units on or off
351  */
352
353 int sm501_unit_power(struct device *dev, unsigned int unit, unsigned int to)
354 {
355         struct sm501_devdata *sm = dev_get_drvdata(dev);
356         unsigned long mode;
357         unsigned long gate;
358         unsigned long clock;
359
360         mutex_lock(&sm->clock_lock);
361
362         mode = readl(sm->regs + SM501_POWER_MODE_CONTROL);
363         gate = readl(sm->regs + SM501_CURRENT_GATE);
364         clock = readl(sm->regs + SM501_CURRENT_CLOCK);
365
366         mode &= 3;              /* get current power mode */
367
368         if (unit >= ARRAY_SIZE(sm->unit_power)) {
369                 dev_err(dev, "%s: bad unit %d\n", __FUNCTION__, unit);
370                 goto already;
371         }
372
373         dev_dbg(sm->dev, "%s: unit %d, cur %d, to %d\n", __FUNCTION__, unit,
374                 sm->unit_power[unit], to);
375
376         if (to == 0 && sm->unit_power[unit] == 0) {
377                 dev_err(sm->dev, "unit %d is already shutdown\n", unit);
378                 goto already;
379         }
380
381         sm->unit_power[unit] += to ? 1 : -1;
382         to = sm->unit_power[unit] ? 1 : 0;
383
384         if (to) {
385                 if (gate & (1 << unit))
386                         goto already;
387                 gate |= (1 << unit);
388         } else {
389                 if (!(gate & (1 << unit)))
390                         goto already;
391                 gate &= ~(1 << unit);
392         }
393
394         switch (mode) {
395         case 1:
396                 writel(gate, sm->regs + SM501_POWER_MODE_0_GATE);
397                 writel(clock, sm->regs + SM501_POWER_MODE_0_CLOCK);
398                 mode = 0;
399                 break;
400         case 2:
401         case 0:
402                 writel(gate, sm->regs + SM501_POWER_MODE_1_GATE);
403                 writel(clock, sm->regs + SM501_POWER_MODE_1_CLOCK);
404                 mode = 1;
405                 break;
406
407         default:
408                 return -1;
409         }
410
411         writel(mode, sm->regs + SM501_POWER_MODE_CONTROL);
412         sm501_sync_regs(sm);
413
414         dev_dbg(sm->dev, "gate %08lx, clock %08lx, mode %08lx\n",
415                 gate, clock, mode);
416
417         sm501_mdelay(sm, 16);
418
419  already:
420         mutex_unlock(&sm->clock_lock);
421         return gate;
422 }
423
424 EXPORT_SYMBOL_GPL(sm501_unit_power);
425
426
427 /* Perform a rounded division. */
428 static long sm501fb_round_div(long num, long denom)
429 {
430         /* n / d + 1 / 2 = (2n + d) / 2d */
431         return (2 * num + denom) / (2 * denom);
432 }
433
434 /* clock value structure. */
435 struct sm501_clock {
436         unsigned long mclk;
437         int divider;
438         int shift;
439 };
440
441 /* sm501_select_clock
442  *
443  * selects nearest discrete clock frequency the SM501 can achive
444  *   the maximum divisor is 3 or 5
445  */
446 static unsigned long sm501_select_clock(unsigned long freq,
447                                         struct sm501_clock *clock,
448                                         int max_div)
449 {
450         unsigned long mclk;
451         int divider;
452         int shift;
453         long diff;
454         long best_diff = 999999999;
455
456         /* Try 288MHz and 336MHz clocks. */
457         for (mclk = 288000000; mclk <= 336000000; mclk += 48000000) {
458                 /* try dividers 1 and 3 for CRT and for panel,
459                    try divider 5 for panel only.*/
460
461                 for (divider = 1; divider <= max_div; divider += 2) {
462                         /* try all 8 shift values.*/
463                         for (shift = 0; shift < 8; shift++) {
464                                 /* Calculate difference to requested clock */
465                                 diff = sm501fb_round_div(mclk, divider << shift) - freq;
466                                 if (diff < 0)
467                                         diff = -diff;
468
469                                 /* If it is less than the current, use it */
470                                 if (diff < best_diff) {
471                                         best_diff = diff;
472
473                                         clock->mclk = mclk;
474                                         clock->divider = divider;
475                                         clock->shift = shift;
476                                 }
477                         }
478                 }
479         }
480
481         /* Return best clock. */
482         return clock->mclk / (clock->divider << clock->shift);
483 }
484
485 /* sm501_set_clock
486  *
487  * set one of the four clock sources to the closest available frequency to
488  *  the one specified
489 */
490
491 unsigned long sm501_set_clock(struct device *dev,
492                               int clksrc,
493                               unsigned long req_freq)
494 {
495         struct sm501_devdata *sm = dev_get_drvdata(dev);
496         unsigned long mode = readl(sm->regs + SM501_POWER_MODE_CONTROL);
497         unsigned long gate = readl(sm->regs + SM501_CURRENT_GATE);
498         unsigned long clock = readl(sm->regs + SM501_CURRENT_CLOCK);
499         unsigned char reg;
500         unsigned long sm501_freq; /* the actual frequency acheived */
501
502         struct sm501_clock to;
503
504         /* find achivable discrete frequency and setup register value
505          * accordingly, V2XCLK, MCLK and M1XCLK are the same P2XCLK
506          * has an extra bit for the divider */
507
508         switch (clksrc) {
509         case SM501_CLOCK_P2XCLK:
510                 /* This clock is divided in half so to achive the
511                  * requested frequency the value must be multiplied by
512                  * 2. This clock also has an additional pre divisor */
513
514                 sm501_freq = (sm501_select_clock(2 * req_freq, &to, 5) / 2);
515                 reg=to.shift & 0x07;/* bottom 3 bits are shift */
516                 if (to.divider == 3)
517                         reg |= 0x08; /* /3 divider required */
518                 else if (to.divider == 5)
519                         reg |= 0x10; /* /5 divider required */
520                 if (to.mclk != 288000000)
521                         reg |= 0x20; /* which mclk pll is source */
522                 break;
523
524         case SM501_CLOCK_V2XCLK:
525                 /* This clock is divided in half so to achive the
526                  * requested frequency the value must be multiplied by 2. */
527
528                 sm501_freq = (sm501_select_clock(2 * req_freq, &to, 3) / 2);
529                 reg=to.shift & 0x07;    /* bottom 3 bits are shift */
530                 if (to.divider == 3)
531                         reg |= 0x08;    /* /3 divider required */
532                 if (to.mclk != 288000000)
533                         reg |= 0x10;    /* which mclk pll is source */
534                 break;
535
536         case SM501_CLOCK_MCLK:
537         case SM501_CLOCK_M1XCLK:
538                 /* These clocks are the same and not further divided */
539
540                 sm501_freq = sm501_select_clock( req_freq, &to, 3);
541                 reg=to.shift & 0x07;    /* bottom 3 bits are shift */
542                 if (to.divider == 3)
543                         reg |= 0x08;    /* /3 divider required */
544                 if (to.mclk != 288000000)
545                         reg |= 0x10;    /* which mclk pll is source */
546                 break;
547
548         default:
549                 return 0; /* this is bad */
550         }
551
552         mutex_lock(&sm->clock_lock);
553
554         mode = readl(sm->regs + SM501_POWER_MODE_CONTROL);
555         gate = readl(sm->regs + SM501_CURRENT_GATE);
556         clock = readl(sm->regs + SM501_CURRENT_CLOCK);
557
558         clock = clock & ~(0xFF << clksrc);
559         clock |= reg<<clksrc;
560
561         mode &= 3;      /* find current mode */
562
563         switch (mode) {
564         case 1:
565                 writel(gate, sm->regs + SM501_POWER_MODE_0_GATE);
566                 writel(clock, sm->regs + SM501_POWER_MODE_0_CLOCK);
567                 mode = 0;
568                 break;
569         case 2:
570         case 0:
571                 writel(gate, sm->regs + SM501_POWER_MODE_1_GATE);
572                 writel(clock, sm->regs + SM501_POWER_MODE_1_CLOCK);
573                 mode = 1;
574                 break;
575
576         default:
577                 mutex_unlock(&sm->clock_lock);
578                 return -1;
579         }
580
581         writel(mode, sm->regs + SM501_POWER_MODE_CONTROL);
582         sm501_sync_regs(sm);
583
584         dev_info(sm->dev, "gate %08lx, clock %08lx, mode %08lx\n",
585                  gate, clock, mode);
586
587         sm501_mdelay(sm, 16);
588         mutex_unlock(&sm->clock_lock);
589
590         sm501_dump_clk(sm);
591
592         return sm501_freq;
593 }
594
595 EXPORT_SYMBOL_GPL(sm501_set_clock);
596
597 /* sm501_find_clock
598  *
599  * finds the closest available frequency for a given clock
600 */
601
602 unsigned long sm501_find_clock(int clksrc,
603                                unsigned long req_freq)
604 {
605         unsigned long sm501_freq; /* the frequency achiveable by the 501 */
606         struct sm501_clock to;
607
608         switch (clksrc) {
609         case SM501_CLOCK_P2XCLK:
610                 sm501_freq = (sm501_select_clock(2 * req_freq, &to, 5) / 2);
611                 break;
612
613         case SM501_CLOCK_V2XCLK:
614                 sm501_freq = (sm501_select_clock(2 * req_freq, &to, 3) / 2);
615                 break;
616
617         case SM501_CLOCK_MCLK:
618         case SM501_CLOCK_M1XCLK:
619                 sm501_freq = sm501_select_clock(req_freq, &to, 3);
620                 break;
621
622         default:
623                 sm501_freq = 0;         /* error */
624         }
625
626         return sm501_freq;
627 }
628
629 EXPORT_SYMBOL_GPL(sm501_find_clock);
630
631 static struct sm501_device *to_sm_device(struct platform_device *pdev)
632 {
633         return container_of(pdev, struct sm501_device, pdev);
634 }
635
636 /* sm501_device_release
637  *
638  * A release function for the platform devices we create to allow us to
639  * free any items we allocated
640 */
641
642 static void sm501_device_release(struct device *dev)
643 {
644         kfree(to_sm_device(to_platform_device(dev)));
645 }
646
647 /* sm501_create_subdev
648  *
649  * Create a skeleton platform device with resources for passing to a
650  * sub-driver
651 */
652
653 static struct platform_device *
654 sm501_create_subdev(struct sm501_devdata *sm,
655                     char *name, unsigned int res_count)
656 {
657         struct sm501_device *smdev;
658
659         smdev = kzalloc(sizeof(struct sm501_device) +
660                         sizeof(struct resource) * res_count, GFP_KERNEL);
661         if (!smdev)
662                 return NULL;
663
664         smdev->pdev.dev.release = sm501_device_release;
665
666         smdev->pdev.name = name;
667         smdev->pdev.id = sm->pdev_id;
668         smdev->pdev.resource = (struct resource *)(smdev+1);
669         smdev->pdev.num_resources = res_count;
670
671         smdev->pdev.dev.parent = sm->dev;
672
673         return &smdev->pdev;
674 }
675
676 /* sm501_register_device
677  *
678  * Register a platform device created with sm501_create_subdev()
679 */
680
681 static int sm501_register_device(struct sm501_devdata *sm,
682                                  struct platform_device *pdev)
683 {
684         struct sm501_device *smdev = to_sm_device(pdev);
685         int ptr;
686         int ret;
687
688         for (ptr = 0; ptr < pdev->num_resources; ptr++) {
689                 printk("%s[%d] flags %08lx: %08llx..%08llx\n",
690                        pdev->name, ptr,
691                        pdev->resource[ptr].flags,
692                        (unsigned long long)pdev->resource[ptr].start,
693                        (unsigned long long)pdev->resource[ptr].end);
694         }
695
696         ret = platform_device_register(pdev);
697
698         if (ret >= 0) {
699                 dev_dbg(sm->dev, "registered %s\n", pdev->name);
700                 list_add_tail(&smdev->list, &sm->devices);
701         } else
702                 dev_err(sm->dev, "error registering %s (%d)\n",
703                         pdev->name, ret);
704
705         return ret;
706 }
707
708 /* sm501_create_subio
709  *
710  * Fill in an IO resource for a sub device
711 */
712
713 static void sm501_create_subio(struct sm501_devdata *sm,
714                                struct resource *res,
715                                resource_size_t offs,
716                                resource_size_t size)
717 {
718         res->flags = IORESOURCE_MEM;
719         res->parent = sm->io_res;
720         res->start = sm->io_res->start + offs;
721         res->end = res->start + size - 1;
722 }
723
724 /* sm501_create_mem
725  *
726  * Fill in an MEM resource for a sub device
727 */
728
729 static void sm501_create_mem(struct sm501_devdata *sm,
730                              struct resource *res,
731                              resource_size_t *offs,
732                              resource_size_t size)
733 {
734         *offs -= size;          /* adjust memory size */
735
736         res->flags = IORESOURCE_MEM;
737         res->parent = sm->mem_res;
738         res->start = sm->mem_res->start + *offs;
739         res->end = res->start + size - 1;
740 }
741
742 /* sm501_create_irq
743  *
744  * Fill in an IRQ resource for a sub device
745 */
746
747 static void sm501_create_irq(struct sm501_devdata *sm,
748                              struct resource *res)
749 {
750         res->flags = IORESOURCE_IRQ;
751         res->parent = NULL;
752         res->start = res->end = sm->irq;
753 }
754
755 static int sm501_register_usbhost(struct sm501_devdata *sm,
756                                   resource_size_t *mem_avail)
757 {
758         struct platform_device *pdev;
759
760         pdev = sm501_create_subdev(sm, "sm501-usb", 3);
761         if (!pdev)
762                 return -ENOMEM;
763
764         sm501_create_subio(sm, &pdev->resource[0], 0x40000, 0x20000);
765         sm501_create_mem(sm, &pdev->resource[1], mem_avail, 256*1024);
766         sm501_create_irq(sm, &pdev->resource[2]);
767
768         return sm501_register_device(sm, pdev);
769 }
770
771 static int sm501_register_display(struct sm501_devdata *sm,
772                                   resource_size_t *mem_avail)
773 {
774         struct platform_device *pdev;
775
776         pdev = sm501_create_subdev(sm, "sm501-fb", 4);
777         if (!pdev)
778                 return -ENOMEM;
779
780         sm501_create_subio(sm, &pdev->resource[0], 0x80000, 0x10000);
781         sm501_create_subio(sm, &pdev->resource[1], 0x100000, 0x50000);
782         sm501_create_mem(sm, &pdev->resource[2], mem_avail, *mem_avail);
783         sm501_create_irq(sm, &pdev->resource[3]);
784
785         return sm501_register_device(sm, pdev);
786 }
787
788 /* sm501_dbg_regs
789  *
790  * Debug attribute to attach to parent device to show core registers
791 */
792
793 static ssize_t sm501_dbg_regs(struct device *dev,
794                               struct device_attribute *attr, char *buff)
795 {
796         struct sm501_devdata *sm = dev_get_drvdata(dev) ;
797         unsigned int reg;
798         char *ptr = buff;
799         int ret;
800
801         for (reg = 0x00; reg < 0x70; reg += 4) {
802                 ret = sprintf(ptr, "%08x = %08x\n",
803                               reg, readl(sm->regs + reg));
804                 ptr += ret;
805         }
806
807         return ptr - buff;
808 }
809
810
811 static DEVICE_ATTR(dbg_regs, 0666, sm501_dbg_regs, NULL);
812
813 /* sm501_init_reg
814  *
815  * Helper function for the init code to setup a register
816  *
817  * clear the bits which are set in r->mask, and then set
818  * the bits set in r->set.
819 */
820
821 static inline void sm501_init_reg(struct sm501_devdata *sm,
822                                   unsigned long reg,
823                                   struct sm501_reg_init *r)
824 {
825         unsigned long tmp;
826
827         tmp = readl(sm->regs + reg);
828         tmp &= ~r->mask;
829         tmp |= r->set;
830         writel(tmp, sm->regs + reg);
831 }
832
833 /* sm501_init_regs
834  *
835  * Setup core register values
836 */
837
838 static void sm501_init_regs(struct sm501_devdata *sm,
839                             struct sm501_initdata *init)
840 {
841         sm501_misc_control(sm->dev,
842                            init->misc_control.set,
843                            init->misc_control.mask);
844
845         sm501_init_reg(sm, SM501_MISC_TIMING, &init->misc_timing);
846         sm501_init_reg(sm, SM501_GPIO31_0_CONTROL, &init->gpio_low);
847         sm501_init_reg(sm, SM501_GPIO63_32_CONTROL, &init->gpio_high);
848
849         if (init->m1xclk) {
850                 dev_info(sm->dev, "setting M1XCLK to %ld\n", init->m1xclk);
851                 sm501_set_clock(sm->dev, SM501_CLOCK_M1XCLK, init->m1xclk);
852         }
853
854         if (init->mclk) {
855                 dev_info(sm->dev, "setting MCLK to %ld\n", init->mclk);
856                 sm501_set_clock(sm->dev, SM501_CLOCK_MCLK, init->mclk);
857         }
858
859 }
860
861 /* Check the PLL sources for the M1CLK and M1XCLK
862  *
863  * If the M1CLK and M1XCLKs are not sourced from the same PLL, then
864  * there is a risk (see errata AB-5) that the SM501 will cease proper
865  * function. If this happens, then it is likely the SM501 will
866  * hang the system.
867 */
868
869 static int sm501_check_clocks(struct sm501_devdata *sm)
870 {
871         unsigned long pwrmode = readl(sm->regs + SM501_CURRENT_CLOCK);
872         unsigned long msrc = (pwrmode & SM501_POWERMODE_M_SRC);
873         unsigned long m1src = (pwrmode & SM501_POWERMODE_M1_SRC);
874
875         return ((msrc == 0 && m1src != 0) || (msrc != 0 && m1src == 0));
876 }
877
878 static unsigned int sm501_mem_local[] = {
879         [0]     = 4*1024*1024,
880         [1]     = 8*1024*1024,
881         [2]     = 16*1024*1024,
882         [3]     = 32*1024*1024,
883         [4]     = 64*1024*1024,
884         [5]     = 2*1024*1024,
885 };
886
887 /* sm501_init_dev
888  *
889  * Common init code for an SM501
890 */
891
892 static int sm501_init_dev(struct sm501_devdata *sm)
893 {
894         resource_size_t mem_avail;
895         unsigned long dramctrl;
896         int ret;
897
898         mutex_init(&sm->clock_lock);
899         spin_lock_init(&sm->reg_lock);
900
901         INIT_LIST_HEAD(&sm->devices);
902
903         dramctrl = readl(sm->regs + SM501_DRAM_CONTROL);
904
905         mem_avail = sm501_mem_local[(dramctrl >> 13) & 0x7];
906
907         dev_info(sm->dev, "SM501 At %p: Version %08x, %ld Mb, IRQ %d\n",
908                  sm->regs, readl(sm->regs + SM501_DEVICEID),
909                  (unsigned long)mem_avail >> 20, sm->irq);
910
911         sm501_dump_gate(sm);
912
913         ret = device_create_file(sm->dev, &dev_attr_dbg_regs);
914         if (ret)
915                 dev_err(sm->dev, "failed to create debug regs file\n");
916
917         sm501_dump_clk(sm);
918
919         /* check to see if we have some device initialisation */
920
921         if (sm->platdata) {
922                 struct sm501_platdata *pdata = sm->platdata;
923
924                 if (pdata->init) {
925                         sm501_init_regs(sm, sm->platdata->init);
926
927                         if (pdata->init->devices & SM501_USE_USB_HOST)
928                                 sm501_register_usbhost(sm, &mem_avail);
929                 }
930         }
931
932         ret = sm501_check_clocks(sm);
933         if (ret) {
934                 dev_err(sm->dev, "M1X and M clocks sourced from different "
935                                         "PLLs\n");
936                 return -EINVAL;
937         }
938
939         /* always create a framebuffer */
940         sm501_register_display(sm, &mem_avail);
941
942         return 0;
943 }
944
945 static int sm501_plat_probe(struct platform_device *dev)
946 {
947         struct sm501_devdata *sm;
948         int err;
949
950         sm = kzalloc(sizeof(struct sm501_devdata), GFP_KERNEL);
951         if (sm == NULL) {
952                 dev_err(&dev->dev, "no memory for device data\n");
953                 err = -ENOMEM;
954                 goto err1;
955         }
956
957         sm->dev = &dev->dev;
958         sm->pdev_id = dev->id;
959         sm->irq = platform_get_irq(dev, 0);
960         sm->io_res = platform_get_resource(dev, IORESOURCE_MEM, 1);
961         sm->mem_res = platform_get_resource(dev, IORESOURCE_MEM, 0);
962         sm->platdata = dev->dev.platform_data;
963
964         if (sm->irq < 0) {
965                 dev_err(&dev->dev, "failed to get irq resource\n");
966                 err = sm->irq;
967                 goto err_res;
968         }
969
970         if (sm->io_res == NULL || sm->mem_res == NULL) {
971                 dev_err(&dev->dev, "failed to get IO resource\n");
972                 err = -ENOENT;
973                 goto err_res;
974         }
975
976         sm->regs_claim = request_mem_region(sm->io_res->start,
977                                             0x100, "sm501");
978
979         if (sm->regs_claim == NULL) {
980                 dev_err(&dev->dev, "cannot claim registers\n");
981                 err= -EBUSY;
982                 goto err_res;
983         }
984
985         platform_set_drvdata(dev, sm);
986
987         sm->regs = ioremap(sm->io_res->start,
988                            (sm->io_res->end - sm->io_res->start) - 1);
989
990         if (sm->regs == NULL) {
991                 dev_err(&dev->dev, "cannot remap registers\n");
992                 err = -EIO;
993                 goto err_claim;
994         }
995
996         return sm501_init_dev(sm);
997
998  err_claim:
999         release_resource(sm->regs_claim);
1000         kfree(sm->regs_claim);
1001  err_res:
1002         kfree(sm);
1003  err1:
1004         return err;
1005
1006 }
1007
1008 #ifdef CONFIG_PM
1009 /* power management support */
1010
1011 static int sm501_plat_suspend(struct platform_device *pdev, pm_message_t state)
1012 {
1013         struct sm501_devdata *sm = platform_get_drvdata(pdev);
1014
1015         sm->in_suspend = 1;
1016         sm->pm_misc = readl(sm->regs + SM501_MISC_CONTROL);
1017
1018         sm501_dump_regs(sm);
1019         return 0;
1020 }
1021
1022 static int sm501_plat_resume(struct platform_device *pdev)
1023 {
1024         struct sm501_devdata *sm = platform_get_drvdata(pdev);
1025
1026         sm501_dump_regs(sm);
1027         sm501_dump_gate(sm);
1028         sm501_dump_clk(sm);
1029
1030         /* check to see if we are in the same state as when suspended */
1031
1032         if (readl(sm->regs + SM501_MISC_CONTROL) != sm->pm_misc) {
1033                 dev_info(sm->dev, "SM501_MISC_CONTROL changed over sleep\n");
1034                 writel(sm->pm_misc, sm->regs + SM501_MISC_CONTROL);
1035
1036                 /* our suspend causes the controller state to change,
1037                  * either by something attempting setup, power loss,
1038                  * or an external reset event on power change */
1039
1040                 if (sm->platdata && sm->platdata->init) {
1041                         sm501_init_regs(sm, sm->platdata->init);
1042                 }
1043         }
1044
1045         /* dump our state from resume */
1046
1047         sm501_dump_regs(sm);
1048         sm501_dump_clk(sm);
1049
1050         sm->in_suspend = 0;
1051
1052         return 0;
1053 }
1054 #else
1055 #define sm501_plat_suspend NULL
1056 #define sm501_plat_resume NULL
1057 #endif
1058
1059 /* Initialisation data for PCI devices */
1060
1061 static struct sm501_initdata sm501_pci_initdata = {
1062         .gpio_high      = {
1063                 .set    = 0x3F000000,           /* 24bit panel */
1064                 .mask   = 0x0,
1065         },
1066         .misc_timing    = {
1067                 .set    = 0x010100,             /* SDRAM timing */
1068                 .mask   = 0x1F1F00,
1069         },
1070         .misc_control   = {
1071                 .set    = SM501_MISC_PNL_24BIT,
1072                 .mask   = 0,
1073         },
1074
1075         .devices        = SM501_USE_ALL,
1076
1077         /* Errata AB-3 says that 72MHz is the fastest available
1078          * for 33MHZ PCI with proper bus-mastering operation */
1079
1080         .mclk           = 72 * MHZ,
1081         .m1xclk         = 144 * MHZ,
1082 };
1083
1084 static struct sm501_platdata_fbsub sm501_pdata_fbsub = {
1085         .flags          = (SM501FB_FLAG_USE_INIT_MODE |
1086                            SM501FB_FLAG_USE_HWCURSOR |
1087                            SM501FB_FLAG_USE_HWACCEL |
1088                            SM501FB_FLAG_DISABLE_AT_EXIT),
1089 };
1090
1091 static struct sm501_platdata_fb sm501_fb_pdata = {
1092         .fb_route       = SM501_FB_OWN,
1093         .fb_crt         = &sm501_pdata_fbsub,
1094         .fb_pnl         = &sm501_pdata_fbsub,
1095 };
1096
1097 static struct sm501_platdata sm501_pci_platdata = {
1098         .init           = &sm501_pci_initdata,
1099         .fb             = &sm501_fb_pdata,
1100 };
1101
1102 static int sm501_pci_probe(struct pci_dev *dev,
1103                            const struct pci_device_id *id)
1104 {
1105         struct sm501_devdata *sm;
1106         int err;
1107
1108         sm = kzalloc(sizeof(struct sm501_devdata), GFP_KERNEL);
1109         if (sm == NULL) {
1110                 dev_err(&dev->dev, "no memory for device data\n");
1111                 err = -ENOMEM;
1112                 goto err1;
1113         }
1114
1115         /* set a default set of platform data */
1116         dev->dev.platform_data = sm->platdata = &sm501_pci_platdata;
1117
1118         /* set a hopefully unique id for our child platform devices */
1119         sm->pdev_id = 32 + dev->devfn;
1120
1121         pci_set_drvdata(dev, sm);
1122
1123         err = pci_enable_device(dev);
1124         if (err) {
1125                 dev_err(&dev->dev, "cannot enable device\n");
1126                 goto err2;
1127         }
1128
1129         sm->dev = &dev->dev;
1130         sm->irq = dev->irq;
1131
1132 #ifdef __BIG_ENDIAN
1133         /* if the system is big-endian, we most probably have a
1134          * translation in the IO layer making the PCI bus little endian
1135          * so make the framebuffer swapped pixels */
1136
1137         sm501_fb_pdata.flags |= SM501_FBPD_SWAP_FB_ENDIAN;
1138 #endif
1139
1140         /* check our resources */
1141
1142         if (!(pci_resource_flags(dev, 0) & IORESOURCE_MEM)) {
1143                 dev_err(&dev->dev, "region #0 is not memory?\n");
1144                 err = -EINVAL;
1145                 goto err3;
1146         }
1147
1148         if (!(pci_resource_flags(dev, 1) & IORESOURCE_MEM)) {
1149                 dev_err(&dev->dev, "region #1 is not memory?\n");
1150                 err = -EINVAL;
1151                 goto err3;
1152         }
1153
1154         /* make our resources ready for sharing */
1155
1156         sm->io_res = &dev->resource[1];
1157         sm->mem_res = &dev->resource[0];
1158
1159         sm->regs_claim = request_mem_region(sm->io_res->start,
1160                                             0x100, "sm501");
1161         if (sm->regs_claim == NULL) {
1162                 dev_err(&dev->dev, "cannot claim registers\n");
1163                 err= -EBUSY;
1164                 goto err3;
1165         }
1166
1167         sm->regs = ioremap(pci_resource_start(dev, 1),
1168                            pci_resource_len(dev, 1));
1169
1170         if (sm->regs == NULL) {
1171                 dev_err(&dev->dev, "cannot remap registers\n");
1172                 err = -EIO;
1173                 goto err4;
1174         }
1175
1176         sm501_init_dev(sm);
1177         return 0;
1178
1179  err4:
1180         release_resource(sm->regs_claim);
1181         kfree(sm->regs_claim);
1182  err3:
1183         pci_disable_device(dev);
1184  err2:
1185         pci_set_drvdata(dev, NULL);
1186         kfree(sm);
1187  err1:
1188         return err;
1189 }
1190
1191 static void sm501_remove_sub(struct sm501_devdata *sm,
1192                              struct sm501_device *smdev)
1193 {
1194         list_del(&smdev->list);
1195         platform_device_unregister(&smdev->pdev);
1196 }
1197
1198 static void sm501_dev_remove(struct sm501_devdata *sm)
1199 {
1200         struct sm501_device *smdev, *tmp;
1201
1202         list_for_each_entry_safe(smdev, tmp, &sm->devices, list)
1203                 sm501_remove_sub(sm, smdev);
1204
1205         device_remove_file(sm->dev, &dev_attr_dbg_regs);
1206 }
1207
1208 static void sm501_pci_remove(struct pci_dev *dev)
1209 {
1210         struct sm501_devdata *sm = pci_get_drvdata(dev);
1211
1212         sm501_dev_remove(sm);
1213         iounmap(sm->regs);
1214
1215         release_resource(sm->regs_claim);
1216         kfree(sm->regs_claim);
1217
1218         pci_set_drvdata(dev, NULL);
1219         pci_disable_device(dev);
1220 }
1221
1222 static int sm501_plat_remove(struct platform_device *dev)
1223 {
1224         struct sm501_devdata *sm = platform_get_drvdata(dev);
1225
1226         sm501_dev_remove(sm);
1227         iounmap(sm->regs);
1228
1229         release_resource(sm->regs_claim);
1230         kfree(sm->regs_claim);
1231
1232         return 0;
1233 }
1234
1235 static struct pci_device_id sm501_pci_tbl[] = {
1236         { 0x126f, 0x0501, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
1237         { 0, },
1238 };
1239
1240 MODULE_DEVICE_TABLE(pci, sm501_pci_tbl);
1241
1242 static struct pci_driver sm501_pci_drv = {
1243         .name           = "sm501",
1244         .id_table       = sm501_pci_tbl,
1245         .probe          = sm501_pci_probe,
1246         .remove         = sm501_pci_remove,
1247 };
1248
1249 static struct platform_driver sm501_plat_drv = {
1250         .driver         = {
1251                 .name   = "sm501",
1252                 .owner  = THIS_MODULE,
1253         },
1254         .probe          = sm501_plat_probe,
1255         .remove         = sm501_plat_remove,
1256         .suspend        = sm501_plat_suspend,
1257         .resume         = sm501_plat_resume,
1258 };
1259
1260 static int __init sm501_base_init(void)
1261 {
1262         platform_driver_register(&sm501_plat_drv);
1263         return pci_register_driver(&sm501_pci_drv);
1264 }
1265
1266 static void __exit sm501_base_exit(void)
1267 {
1268         platform_driver_unregister(&sm501_plat_drv);
1269         pci_unregister_driver(&sm501_pci_drv);
1270 }
1271
1272 module_init(sm501_base_init);
1273 module_exit(sm501_base_exit);
1274
1275 MODULE_DESCRIPTION("SM501 Core Driver");
1276 MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>, Vincent Sanders");
1277 MODULE_LICENSE("GPL v2");