drivers/media/video/sn9c102/sn9c102_ov7630.c

   1 /***************************************************************************
   2  * Plug-in for OV7630 image sensor connected to the SN9C1xx PC Camera      *
   3  * Controllers                                                             *
   4  *                                                                         *
   5  * Copyright (C) 2006-2007 by Luca Risolia <luca.risolia@studio.unibo.it>  *
   6  *                                                                         *
   7  * This program is free software; you can redistribute it and/or modify    *
   8  * it under the terms of the GNU General Public License as published by    *
   9  * the Free Software Foundation; either version 2 of the License, or       *
  10  * (at your option) any later version.                                     *
  11  *                                                                         *
  12  * This program is distributed in the hope that it will be useful,         *
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of          *
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the           *
  15  * GNU General Public License for more details.                            *
  16  *                                                                         *
  17  * You should have received a copy of the GNU General Public License       *
  18  * along with this program; if not, write to the Free Software             *
  19  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.               *
  20  ***************************************************************************/
  21
  22 #include "sn9c102_sensor.h"
  23
  24
  25 static int ov7630_init(struct sn9c102_device* cam)
  26 {
  27         int err = 0;
  28
  29         switch (sn9c102_get_bridge(cam)) {
  30         case BRIDGE_SN9C101:
  31         case BRIDGE_SN9C102:
  32                 err = sn9c102_write_const_regs(cam, {0x00, 0x14},
  33                                                {0x60, 0x17}, {0x0f, 0x18},
  34                                                {0x50, 0x19});
  35
  36                 err += sn9c102_i2c_write(cam, 0x12, 0x8d);
  37                 err += sn9c102_i2c_write(cam, 0x12, 0x0d);
  38                 err += sn9c102_i2c_write(cam, 0x11, 0x00);
  39                 err += sn9c102_i2c_write(cam, 0x15, 0x35);
  40                 err += sn9c102_i2c_write(cam, 0x16, 0x03);
  41                 err += sn9c102_i2c_write(cam, 0x17, 0x1c);
  42                 err += sn9c102_i2c_write(cam, 0x18, 0xbd);
  43                 err += sn9c102_i2c_write(cam, 0x19, 0x06);
  44                 err += sn9c102_i2c_write(cam, 0x1a, 0xf6);
  45                 err += sn9c102_i2c_write(cam, 0x1b, 0x04);
  46                 err += sn9c102_i2c_write(cam, 0x20, 0x44);
  47                 err += sn9c102_i2c_write(cam, 0x23, 0xee);
  48                 err += sn9c102_i2c_write(cam, 0x26, 0xa0);
  49                 err += sn9c102_i2c_write(cam, 0x27, 0x9a);
  50                 err += sn9c102_i2c_write(cam, 0x28, 0x20);
  51                 err += sn9c102_i2c_write(cam, 0x29, 0x30);
  52                 err += sn9c102_i2c_write(cam, 0x2f, 0x3d);
  53                 err += sn9c102_i2c_write(cam, 0x30, 0x24);
  54                 err += sn9c102_i2c_write(cam, 0x32, 0x86);
  55                 err += sn9c102_i2c_write(cam, 0x60, 0xa9);
  56                 err += sn9c102_i2c_write(cam, 0x61, 0x42);
  57                 err += sn9c102_i2c_write(cam, 0x65, 0x00);
  58                 err += sn9c102_i2c_write(cam, 0x69, 0x38);
  59                 err += sn9c102_i2c_write(cam, 0x6f, 0x88);
  60                 err += sn9c102_i2c_write(cam, 0x70, 0x0b);
  61                 err += sn9c102_i2c_write(cam, 0x71, 0x00);
  62                 err += sn9c102_i2c_write(cam, 0x74, 0x21);
  63                 err += sn9c102_i2c_write(cam, 0x7d, 0xf7);
  64
  65                 break;
  66         case BRIDGE_SN9C103:
  67                 err = sn9c102_write_const_regs(cam, {0x00, 0x02}, {0x00, 0x03},
  68                                                {0x1a, 0x04}, {0x20, 0x05},
  69                                                {0x20, 0x06}, {0x20, 0x07},
  70                                                {0x03, 0x10}, {0x0a, 0x14},
  71                                                {0x60, 0x17}, {0x0f, 0x18},
  72                                                {0x50, 0x19}, {0x1d, 0x1a},
  73                                                {0x10, 0x1b}, {0x02, 0x1c},
  74                                                {0x03, 0x1d}, {0x0f, 0x1e},
  75                                                {0x0c, 0x1f}, {0x00, 0x20},
  76                                                {0x10, 0x21}, {0x20, 0x22},
  77                                                {0x30, 0x23}, {0x40, 0x24},
  78                                                {0x50, 0x25}, {0x60, 0x26},
  79                                                {0x70, 0x27}, {0x80, 0x28},
  80                                                {0x90, 0x29}, {0xa0, 0x2a},
  81                                                {0xb0, 0x2b}, {0xc0, 0x2c},
  82                                                {0xd0, 0x2d}, {0xe0, 0x2e},
  83                                                {0xf0, 0x2f}, {0xff, 0x30});
  84
  85                 err += sn9c102_i2c_write(cam, 0x12, 0x8d);
  86                 err += sn9c102_i2c_write(cam, 0x12, 0x0d);
  87                 err += sn9c102_i2c_write(cam, 0x15, 0x34);
  88                 err += sn9c102_i2c_write(cam, 0x11, 0x01);
  89                 err += sn9c102_i2c_write(cam, 0x1b, 0x04);
  90                 err += sn9c102_i2c_write(cam, 0x20, 0x44);
  91                 err += sn9c102_i2c_write(cam, 0x23, 0xee);
  92                 err += sn9c102_i2c_write(cam, 0x26, 0xa0);
  93                 err += sn9c102_i2c_write(cam, 0x27, 0x9a);
  94                 err += sn9c102_i2c_write(cam, 0x28, 0x20);
  95                 err += sn9c102_i2c_write(cam, 0x29, 0x30);
  96                 err += sn9c102_i2c_write(cam, 0x2f, 0x3d);
  97                 err += sn9c102_i2c_write(cam, 0x30, 0x24);
  98                 err += sn9c102_i2c_write(cam, 0x32, 0x86);
  99                 err += sn9c102_i2c_write(cam, 0x60, 0xa9);
 100                 err += sn9c102_i2c_write(cam, 0x61, 0x42);
 101                 err += sn9c102_i2c_write(cam, 0x65, 0x00);
 102                 err += sn9c102_i2c_write(cam, 0x69, 0x38);
 103                 err += sn9c102_i2c_write(cam, 0x6f, 0x88);
 104                 err += sn9c102_i2c_write(cam, 0x70, 0x0b);
 105                 err += sn9c102_i2c_write(cam, 0x71, 0x00);
 106                 err += sn9c102_i2c_write(cam, 0x74, 0x21);
 107                 err += sn9c102_i2c_write(cam, 0x7d, 0xf7);
 108                 break;
 109         default:
 110                 break;
 111         }
 112
 113         return err;
 114 }
 115
 116
 117 static int ov7630_get_ctrl(struct sn9c102_device* cam,
 118                            struct v4l2_control* ctrl)
 119 {
 120         int err = 0;
 121
 122         switch (ctrl->id) {
 123         case V4L2_CID_EXPOSURE:
 124                 if ((ctrl->value = sn9c102_i2c_read(cam, 0x10)) < 0)
 125                         return -EIO;
 126                 break;
 127         case V4L2_CID_RED_BALANCE:
 128                 ctrl->value = sn9c102_pread_reg(cam, 0x07);
 129                 break;
 130         case V4L2_CID_BLUE_BALANCE:
 131                 ctrl->value = sn9c102_pread_reg(cam, 0x06);
 132                 break;
 133         case SN9C102_V4L2_CID_GREEN_BALANCE:
 134                 ctrl->value = sn9c102_pread_reg(cam, 0x05);
 135                 break;
 136         case V4L2_CID_GAIN:
 137                 if ((ctrl->value = sn9c102_i2c_read(cam, 0x00)) < 0)
 138                         return -EIO;
 139                 ctrl->value &= 0x3f;
 140                 break;
 141         case V4L2_CID_DO_WHITE_BALANCE:
 142                 if ((ctrl->value = sn9c102_i2c_read(cam, 0x0c)) < 0)
 143                         return -EIO;
 144                 ctrl->value &= 0x3f;
 145                 break;
 146         case V4L2_CID_WHITENESS:
 147                 if ((ctrl->value = sn9c102_i2c_read(cam, 0x0d)) < 0)
 148                         return -EIO;
 149                 ctrl->value &= 0x3f;
 150                 break;
 151         case V4L2_CID_AUTOGAIN:
 152                 if ((ctrl->value = sn9c102_i2c_read(cam, 0x13)) < 0)
 153                         return -EIO;
 154                 ctrl->value &= 0x01;
 155                 break;
 156         case V4L2_CID_VFLIP:
 157                 if ((ctrl->value = sn9c102_i2c_read(cam, 0x75)) < 0)
 158                         return -EIO;
 159                 ctrl->value = (ctrl->value & 0x80) ? 1 : 0;
 160                 break;
 161         case SN9C102_V4L2_CID_GAMMA:
 162                 if ((ctrl->value = sn9c102_i2c_read(cam, 0x14)) < 0)
 163                         return -EIO;
 164                 ctrl->value = (ctrl->value & 0x02) ? 1 : 0;
 165                 break;
 166         case SN9C102_V4L2_CID_BAND_FILTER:
 167                 if ((ctrl->value = sn9c102_i2c_read(cam, 0x2d)) < 0)
 168                         return -EIO;
 169                 ctrl->value = (ctrl->value & 0x02) ? 1 : 0;
 170                 break;
 171         default:
 172                 return -EINVAL;
 173         }
 174
 175         return err ? -EIO : 0;
 176 }
 177
 178
 179 static int ov7630_set_ctrl(struct sn9c102_device* cam,
 180                            const struct v4l2_control* ctrl)
 181 {
 182         int err = 0;
 183
 184         switch (ctrl->id) {
 185         case V4L2_CID_EXPOSURE:
 186                 err += sn9c102_i2c_write(cam, 0x10, ctrl->value);
 187                 break;
 188         case V4L2_CID_RED_BALANCE:
 189                 err += sn9c102_write_reg(cam, ctrl->value, 0x07);
 190                 break;
 191         case V4L2_CID_BLUE_BALANCE:
 192                 err += sn9c102_write_reg(cam, ctrl->value, 0x06);
 193                 break;
 194         case SN9C102_V4L2_CID_GREEN_BALANCE:
 195                 err += sn9c102_write_reg(cam, ctrl->value, 0x05);
 196                 break;
 197         case V4L2_CID_GAIN:
 198                 err += sn9c102_i2c_write(cam, 0x00, ctrl->value);
 199                 break;
 200         case V4L2_CID_DO_WHITE_BALANCE:
 201                 err += sn9c102_i2c_write(cam, 0x0c, ctrl->value);
 202                 break;
 203         case V4L2_CID_WHITENESS:
 204                 err += sn9c102_i2c_write(cam, 0x0d, ctrl->value);
 205                 break;
 206         case V4L2_CID_AUTOGAIN:
 207                 err += sn9c102_i2c_write(cam, 0x13, ctrl->value |
 208                                                     (ctrl->value << 1));
 209                 break;
 210         case V4L2_CID_VFLIP:
 211                 err += sn9c102_i2c_write(cam, 0x75, 0x0e | (ctrl->value << 7));
 212                 break;
 213         case SN9C102_V4L2_CID_GAMMA:
 214                 err += sn9c102_i2c_write(cam, 0x14, ctrl->value << 2);
 215                 break;
 216         case SN9C102_V4L2_CID_BAND_FILTER:
 217                 err += sn9c102_i2c_write(cam, 0x2d, ctrl->value << 2);
 218                 break;
 219         default:
 220                 return -EINVAL;
 221         }
 222
 223         return err ? -EIO : 0;
 224 }
 225
 226
 227 static int ov7630_set_crop(struct sn9c102_device* cam,
 228                            const struct v4l2_rect* rect)
 229 {
 230         struct sn9c102_sensor* s = sn9c102_get_sensor(cam);
 231         int err = 0;
 232         u8 h_start = (u8)(rect->left - s->cropcap.bounds.left) + 1,
 233            v_start = (u8)(rect->top - s->cropcap.bounds.top) + 1;
 234
 235         err += sn9c102_write_reg(cam, h_start, 0x12);
 236         err += sn9c102_write_reg(cam, v_start, 0x13);
 237
 238         return err;
 239 }
 240
 241
 242 static int ov7630_set_pix_format(struct sn9c102_device* cam,
 243                                  const struct v4l2_pix_format* pix)
 244 {
 245         int err = 0;
 246
 247         if (pix->pixelformat == V4L2_PIX_FMT_SN9C10X)
 248                 err += sn9c102_write_reg(cam, 0x20, 0x19);
 249         else
 250                 err += sn9c102_write_reg(cam, 0x50, 0x19);
 251
 252         return err;
 253 }
 254
 255
 256 static struct sn9c102_sensor ov7630 = {
 257         .name = "OV7630",
 258         .maintainer = "Luca Risolia <luca.risolia@studio.unibo.it>",
 259         .supported_bridge = BRIDGE_SN9C101 | BRIDGE_SN9C102 | BRIDGE_SN9C103,
 260         .sysfs_ops = SN9C102_I2C_READ | SN9C102_I2C_WRITE,
 261         .frequency = SN9C102_I2C_100KHZ,
 262         .interface = SN9C102_I2C_2WIRES,
 263         .i2c_slave_id = 0x21,
 264         .init = &ov7630_init,
 265         .qctrl = {
 266                 {
 267                         .id = V4L2_CID_GAIN,
 268                         .type = V4L2_CTRL_TYPE_INTEGER,
 269                         .name = "global gain",
 270                         .minimum = 0x00,
 271                         .maximum = 0x3f,
 272                         .step = 0x01,
 273                         .default_value = 0x14,
 274                         .flags = 0,
 275                 },
 276                 {
 277                         .id = V4L2_CID_EXPOSURE,
 278                         .type = V4L2_CTRL_TYPE_INTEGER,
 279                         .name = "exposure",
 280                         .minimum = 0x00,
 281                         .maximum = 0xff,
 282                         .step = 0x01,
 283                         .default_value = 0x60,
 284                         .flags = 0,
 285                 },
 286                 {
 287                         .id = V4L2_CID_WHITENESS,
 288                         .type = V4L2_CTRL_TYPE_INTEGER,
 289                         .name = "white balance background: red",
 290                         .minimum = 0x00,
 291                         .maximum = 0x3f,
 292                         .step = 0x01,
 293                         .default_value = 0x20,
 294                         .flags = 0,
 295                 },
 296                 {
 297                         .id = V4L2_CID_DO_WHITE_BALANCE,
 298                         .type = V4L2_CTRL_TYPE_INTEGER,
 299                         .name = "white balance background: blue",
 300                         .minimum = 0x00,
 301                         .maximum = 0x3f,
 302                         .step = 0x01,
 303                         .default_value = 0x20,
 304                         .flags = 0,
 305                 },
 306                 {
 307                         .id = V4L2_CID_RED_BALANCE,
 308                         .type = V4L2_CTRL_TYPE_INTEGER,
 309                         .name = "red balance",
 310                         .minimum = 0x00,
 311                         .maximum = 0x7f,
 312                         .step = 0x01,
 313                         .default_value = 0x20,
 314                         .flags = 0,
 315                 },
 316                 {
 317                         .id = V4L2_CID_BLUE_BALANCE,
 318                         .type = V4L2_CTRL_TYPE_INTEGER,
 319                         .name = "blue balance",
 320                         .minimum = 0x00,
 321                         .maximum = 0x7f,
 322                         .step = 0x01,
 323                         .default_value = 0x20,
 324                         .flags = 0,
 325                 },
 326                 {
 327                         .id = V4L2_CID_AUTOGAIN,
 328                         .type = V4L2_CTRL_TYPE_BOOLEAN,
 329                         .name = "auto adjust",
 330                         .minimum = 0x00,
 331                         .maximum = 0x01,
 332                         .step = 0x01,
 333                         .default_value = 0x00,
 334                         .flags = 0,
 335                 },
 336                 {
 337                         .id = V4L2_CID_VFLIP,
 338                         .type = V4L2_CTRL_TYPE_BOOLEAN,
 339                         .name = "vertical flip",
 340                         .minimum = 0x00,
 341                         .maximum = 0x01,
 342                         .step = 0x01,
 343                         .default_value = 0x01,
 344                         .flags = 0,
 345                 },
 346                 {
 347                         .id = SN9C102_V4L2_CID_GREEN_BALANCE,
 348                         .type = V4L2_CTRL_TYPE_INTEGER,
 349                         .name = "green balance",
 350                         .minimum = 0x00,
 351                         .maximum = 0x7f,
 352                         .step = 0x01,
 353                         .default_value = 0x20,
 354                         .flags = 0,
 355                 },
 356                 {
 357                         .id = SN9C102_V4L2_CID_BAND_FILTER,
 358                         .type = V4L2_CTRL_TYPE_BOOLEAN,
 359                         .name = "band filter",
 360                         .minimum = 0x00,
 361                         .maximum = 0x01,
 362                         .step = 0x01,
 363                         .default_value = 0x00,
 364                         .flags = 0,
 365                 },
 366                 {
 367                         .id = SN9C102_V4L2_CID_GAMMA,
 368                         .type = V4L2_CTRL_TYPE_BOOLEAN,
 369                         .name = "rgb gamma",
 370                         .minimum = 0x00,
 371                         .maximum = 0x01,
 372                         .step = 0x01,
 373                         .default_value = 0x00,
 374                         .flags = 0,
 375                 },
 376         },
 377         .get_ctrl = &ov7630_get_ctrl,
 378         .set_ctrl = &ov7630_set_ctrl,
 379         .cropcap = {
 380                 .bounds = {
 381                         .left = 0,
 382                         .top = 0,
 383                         .width = 640,
 384                         .height = 480,
 385                 },
 386                 .defrect = {
 387                         .left = 0,
 388                         .top = 0,
 389                         .width = 640,
 390                         .height = 480,
 391                 },
 392         },
 393         .set_crop = &ov7630_set_crop,
 394         .pix_format = {
 395                 .width = 640,
 396                 .height = 480,
 397                 .pixelformat = V4L2_PIX_FMT_SN9C10X,
 398                 .priv = 8,
 399         },
 400         .set_pix_format = &ov7630_set_pix_format
 401 };
 402
 403
 404 int sn9c102_probe_ov7630(struct sn9c102_device* cam)
 405 {
 406         int pid, ver, err = 0;
 407
 408         switch (sn9c102_get_bridge(cam)) {
 409         case BRIDGE_SN9C101:
 410         case BRIDGE_SN9C102:
 411                 err = sn9c102_write_const_regs(cam, {0x01, 0x01},
 412                                                {0x00, 0x01}, {0x28, 0x17});
 413
 414                 break;
 415         case BRIDGE_SN9C103: /* do _not_ change anything! */
 416                 err = sn9c102_write_const_regs(cam, {0x09, 0x01},
 417                                                {0x42, 0x01}, {0x28, 0x17},
 418                                                {0x44, 0x02});
 419                 pid = sn9c102_i2c_try_read(cam, &ov7630, 0x0a);
 420                 if (err || pid < 0) { /* try a different initialization */
 421                         err = sn9c102_write_reg(cam, 0x01, 0x01);
 422                         err += sn9c102_write_reg(cam, 0x00, 0x01);
 423                 }
 424                 break;
 425         default:
 426                 break;
 427         }
 428
 429         pid = sn9c102_i2c_try_read(cam, &ov7630, 0x0a);
 430         ver = sn9c102_i2c_try_read(cam, &ov7630, 0x0b);
 431         if (err || pid < 0 || ver < 0)
 432                 return -EIO;
 433         if (pid != 0x76 || ver != 0x31)
 434                 return -ENODEV;
 435         sn9c102_attach_sensor(cam, &ov7630);
 436
 437         return 0;
 438 }