2 * Driver for the Conexant CX23885 PCIe bridge
4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 #include <linux/init.h>
23 #include <linux/module.h>
24 #include <linux/pci.h>
25 #include <linux/delay.h>
26 #include <media/cx25840.h>
29 #include "tuner-xc2028.h"
30 #include "netup-init.h"
31 #include "cx23888-ir.h"
33 /* ------------------------------------------------------------------ */
34 /* board config info */
36 struct cx23885_board cx23885_boards[] = {
37 [CX23885_BOARD_UNKNOWN] = {
38 .name = "UNKNOWN/GENERIC",
39 /* Ensure safe default for unknown boards */
42 .type = CX23885_VMUX_COMPOSITE1,
45 .type = CX23885_VMUX_COMPOSITE2,
48 .type = CX23885_VMUX_COMPOSITE3,
51 .type = CX23885_VMUX_COMPOSITE4,
55 [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
56 .name = "Hauppauge WinTV-HVR1800lp",
57 .portc = CX23885_MPEG_DVB,
59 .type = CX23885_VMUX_TELEVISION,
63 .type = CX23885_VMUX_DEBUG,
67 .type = CX23885_VMUX_COMPOSITE1,
71 .type = CX23885_VMUX_SVIDEO,
76 [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
77 .name = "Hauppauge WinTV-HVR1800",
78 .porta = CX23885_ANALOG_VIDEO,
79 .portb = CX23885_MPEG_ENCODER,
80 .portc = CX23885_MPEG_DVB,
81 .tuner_type = TUNER_PHILIPS_TDA8290,
82 .tuner_addr = 0x42, /* 0x84 >> 1 */
84 .type = CX23885_VMUX_TELEVISION,
85 .vmux = CX25840_VIN7_CH3 |
90 .type = CX23885_VMUX_COMPOSITE1,
91 .vmux = CX25840_VIN7_CH3 |
96 .type = CX23885_VMUX_SVIDEO,
97 .vmux = CX25840_VIN7_CH3 |
104 [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
105 .name = "Hauppauge WinTV-HVR1250",
106 .portc = CX23885_MPEG_DVB,
108 .type = CX23885_VMUX_TELEVISION,
112 .type = CX23885_VMUX_DEBUG,
116 .type = CX23885_VMUX_COMPOSITE1,
120 .type = CX23885_VMUX_SVIDEO,
125 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
126 .name = "DViCO FusionHDTV5 Express",
127 .portb = CX23885_MPEG_DVB,
129 [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
130 .name = "Hauppauge WinTV-HVR1500Q",
131 .portc = CX23885_MPEG_DVB,
133 [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
134 .name = "Hauppauge WinTV-HVR1500",
135 .portc = CX23885_MPEG_DVB,
137 [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
138 .name = "Hauppauge WinTV-HVR1200",
139 .portc = CX23885_MPEG_DVB,
141 [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
142 .name = "Hauppauge WinTV-HVR1700",
143 .portc = CX23885_MPEG_DVB,
145 [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
146 .name = "Hauppauge WinTV-HVR1400",
147 .portc = CX23885_MPEG_DVB,
149 [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
150 .name = "DViCO FusionHDTV7 Dual Express",
151 .portb = CX23885_MPEG_DVB,
152 .portc = CX23885_MPEG_DVB,
154 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
155 .name = "DViCO FusionHDTV DVB-T Dual Express",
156 .portb = CX23885_MPEG_DVB,
157 .portc = CX23885_MPEG_DVB,
159 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
160 .name = "Leadtek Winfast PxDVR3200 H",
161 .portc = CX23885_MPEG_DVB,
163 [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
164 .name = "Compro VideoMate E650F",
165 .portc = CX23885_MPEG_DVB,
167 [CX23885_BOARD_TBS_6920] = {
168 .name = "TurboSight TBS 6920",
169 .portb = CX23885_MPEG_DVB,
171 [CX23885_BOARD_TEVII_S470] = {
172 .name = "TeVii S470",
173 .portb = CX23885_MPEG_DVB,
175 [CX23885_BOARD_DVBWORLD_2005] = {
176 .name = "DVBWorld DVB-S2 2005",
177 .portb = CX23885_MPEG_DVB,
179 [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
181 .name = "NetUP Dual DVB-S2 CI",
182 .portb = CX23885_MPEG_DVB,
183 .portc = CX23885_MPEG_DVB,
185 [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
186 .name = "Hauppauge WinTV-HVR1270",
187 .portc = CX23885_MPEG_DVB,
189 [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
190 .name = "Hauppauge WinTV-HVR1275",
191 .portc = CX23885_MPEG_DVB,
193 [CX23885_BOARD_HAUPPAUGE_HVR1255] = {
194 .name = "Hauppauge WinTV-HVR1255",
195 .portc = CX23885_MPEG_DVB,
197 [CX23885_BOARD_HAUPPAUGE_HVR1210] = {
198 .name = "Hauppauge WinTV-HVR1210",
199 .portc = CX23885_MPEG_DVB,
201 [CX23885_BOARD_MYGICA_X8506] = {
202 .name = "Mygica X8506 DMB-TH",
203 .tuner_type = TUNER_XC5000,
205 .porta = CX23885_ANALOG_VIDEO,
206 .portb = CX23885_MPEG_DVB,
209 .type = CX23885_VMUX_TELEVISION,
210 .vmux = CX25840_COMPOSITE2,
213 .type = CX23885_VMUX_COMPOSITE1,
214 .vmux = CX25840_COMPOSITE8,
217 .type = CX23885_VMUX_SVIDEO,
218 .vmux = CX25840_SVIDEO_LUMA3 |
219 CX25840_SVIDEO_CHROMA4,
222 .type = CX23885_VMUX_COMPONENT,
223 .vmux = CX25840_COMPONENT_ON |
230 [CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
231 .name = "Magic-Pro ProHDTV Extreme 2",
232 .tuner_type = TUNER_XC5000,
234 .porta = CX23885_ANALOG_VIDEO,
235 .portb = CX23885_MPEG_DVB,
238 .type = CX23885_VMUX_TELEVISION,
239 .vmux = CX25840_COMPOSITE2,
242 .type = CX23885_VMUX_COMPOSITE1,
243 .vmux = CX25840_COMPOSITE8,
246 .type = CX23885_VMUX_SVIDEO,
247 .vmux = CX25840_SVIDEO_LUMA3 |
248 CX25840_SVIDEO_CHROMA4,
251 .type = CX23885_VMUX_COMPONENT,
252 .vmux = CX25840_COMPONENT_ON |
259 [CX23885_BOARD_HAUPPAUGE_HVR1850] = {
260 .name = "Hauppauge WinTV-HVR1850",
261 .portb = CX23885_MPEG_ENCODER,
262 .portc = CX23885_MPEG_DVB,
264 [CX23885_BOARD_COMPRO_VIDEOMATE_E800] = {
265 .name = "Compro VideoMate E800",
266 .portc = CX23885_MPEG_DVB,
268 [CX23885_BOARD_HAUPPAUGE_HVR1290] = {
269 .name = "Hauppauge WinTV-HVR1290",
270 .portc = CX23885_MPEG_DVB,
272 [CX23885_BOARD_MYGICA_X8558PRO] = {
273 .name = "Mygica X8558 PRO DMB-TH",
274 .portb = CX23885_MPEG_DVB,
275 .portc = CX23885_MPEG_DVB,
277 [CX23885_BOARD_LEADTEK_WINFAST_PXTV1200] = {
278 .name = "LEADTEK WinFast PxTV1200",
279 .porta = CX23885_ANALOG_VIDEO,
280 .tuner_type = TUNER_XC2028,
283 .type = CX23885_VMUX_TELEVISION,
284 .vmux = CX25840_VIN2_CH1 |
288 .type = CX23885_VMUX_COMPOSITE1,
289 .vmux = CX25840_COMPOSITE1,
291 .type = CX23885_VMUX_SVIDEO,
292 .vmux = CX25840_SVIDEO_LUMA3 |
293 CX25840_SVIDEO_CHROMA4,
295 .type = CX23885_VMUX_COMPONENT,
296 .vmux = CX25840_VIN7_CH1 |
299 CX25840_COMPONENT_ON,
303 const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
305 /* ------------------------------------------------------------------ */
306 /* PCI subsystem IDs */
308 struct cx23885_subid cx23885_subids[] = {
312 .card = CX23885_BOARD_UNKNOWN,
316 .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
320 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
324 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
328 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
332 .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
336 .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
340 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
344 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
348 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
352 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
356 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
360 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
364 .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
368 .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
372 .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
376 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
380 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
384 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
388 .card = CX23885_BOARD_TBS_6920,
392 .card = CX23885_BOARD_TEVII_S470,
396 .card = CX23885_BOARD_DVBWORLD_2005,
400 .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
404 .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
408 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
412 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
416 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
420 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
424 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
428 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
432 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
436 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
440 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
444 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
448 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
452 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
456 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
460 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
464 .card = CX23885_BOARD_MYGICA_X8506,
468 .card = CX23885_BOARD_MAGICPRO_PROHDTVE2,
472 .card = CX23885_BOARD_HAUPPAUGE_HVR1850,
476 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E800,
480 .card = CX23885_BOARD_HAUPPAUGE_HVR1290,
484 .card = CX23885_BOARD_MYGICA_X8558PRO,
488 .card = CX23885_BOARD_LEADTEK_WINFAST_PXTV1200,
491 const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
493 void cx23885_card_list(struct cx23885_dev *dev)
497 if (0 == dev->pci->subsystem_vendor &&
498 0 == dev->pci->subsystem_device) {
500 "%s: Board has no valid PCIe Subsystem ID and can't\n"
501 "%s: be autodetected. Pass card=<n> insmod option\n"
502 "%s: to workaround that. Redirect complaints to the\n"
503 "%s: vendor of the TV card. Best regards,\n"
505 dev->name, dev->name, dev->name, dev->name, dev->name);
508 "%s: Your board isn't known (yet) to the driver.\n"
509 "%s: Try to pick one of the existing card configs via\n"
510 "%s: card=<n> insmod option. Updating to the latest\n"
511 "%s: version might help as well.\n",
512 dev->name, dev->name, dev->name, dev->name);
514 printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
516 for (i = 0; i < cx23885_bcount; i++)
517 printk(KERN_INFO "%s: card=%d -> %s\n",
518 dev->name, i, cx23885_boards[i].name);
521 static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
525 tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
528 /* Make sure we support the board model */
531 /* WinTV-HVR1270 (PCIe, Retail, half height)
532 * ATSC/QAM and basic analog, IR Blast */
534 /* WinTV-HVR1210 (PCIe, Retail, half height)
535 * DVB-T and basic analog, IR Blast */
537 /* WinTV-HVR1270 (PCIe, Retail, half height)
538 * ATSC/QAM and basic analog, IR Recv */
540 /* WinTV-HVR1210 (PCIe, Retail, half height)
541 * DVB-T and basic analog, IR Recv */
543 /* WinTV-HVR1275 (PCIe, Retail, half height)
544 * ATSC/QAM and basic analog, IR Recv */
546 /* WinTV-HVR1210 (PCIe, Retail, half height)
547 * DVB-T and basic analog, IR Recv */
549 /* WinTV-HVR1270 (PCIe, Retail, full height)
550 * ATSC/QAM and basic analog, IR Blast */
552 /* WinTV-HVR1210 (PCIe, Retail, full height)
553 * DVB-T and basic analog, IR Blast */
555 /* WinTV-HVR1270 (PCIe, Retail, full height)
556 * ATSC/QAM and basic analog, IR Recv */
558 /* WinTV-HVR1210 (PCIe, Retail, full height)
559 * DVB-T and basic analog, IR Recv */
561 /* WinTV-HVR1275 (PCIe, Retail, full height)
562 * ATSC/QAM and basic analog, IR Recv */
564 /* WinTV-HVR1210 (PCIe, Retail, full height)
565 * DVB-T and basic analog, IR Recv */
567 /* WinTV-HVR1200 (PCIe, Retail, full height)
568 * DVB-T and basic analog */
570 /* WinTV-HVR1200 (PCIe, OEM, half height)
571 * DVB-T and basic analog */
573 /* WinTV-HVR1200 (PCIe, OEM, half height)
574 * DVB-T and basic analog */
576 /* WinTV-HVR1200 (PCIe, OEM, full height)
577 * DVB-T and basic analog */
579 /* WinTV-HVR1200 (PCIe, OEM, half height)
580 * DVB-T and basic analog */
582 /* WinTV-HVR1200 (PCIe, OEM, full height)
583 * DVB-T and basic analog */
585 /* WinTV-HVR1200 (PCIe, OEM, full height)
586 * DVB-T and basic analog */
588 /* WinTV-HVR1200 (PCIe, OEM, half height)
589 * DVB-T and basic analog */
591 /* WinTV-HVR1200 (PCIe, OEM, full height)
592 * DVB-T and basic analog */
594 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
595 channel ATSC and MPEG2 HW Encoder */
597 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
600 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
603 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
606 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
609 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
610 Dual channel ATSC and MPEG2 HW Encoder */
612 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
613 Dual channel ATSC and MPEG2 HW Encoder */
615 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
616 Dual channel ATSC and MPEG2 HW Encoder */
618 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
619 Dual channel ATSC and MPEG2 HW Encoder */
621 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
622 Dual channel ATSC and MPEG2 HW Encoder */
624 /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
625 ATSC and Basic analog */
627 /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
628 ATSC and Basic analog */
630 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
631 ATSC and Basic analog */
633 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
634 ATSC and Basic analog */
636 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
637 ATSC and Basic analog */
639 /* WinTV-HVR1400 (Express Card, Retail, IR,
640 * DVB-T and Basic analog */
642 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
643 * DVB-T and MPEG2 HW Encoder */
645 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
646 * DVB-T and MPEG2 HW Encoder */
649 /* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM,
650 Dual channel ATSC and MPEG2 HW Encoder */
653 /* WinTV-HVR1290 (PCIe, OEM, RCA in, IR,
654 Dual channel ATSC and Basic analog */
657 printk(KERN_WARNING "%s: warning: "
658 "unknown hauppauge model #%d\n",
659 dev->name, tv.model);
663 printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
664 dev->name, tv.model);
667 int cx23885_tuner_callback(void *priv, int component, int command, int arg)
669 struct cx23885_tsport *port = priv;
670 struct cx23885_dev *dev = port->dev;
673 if (command == XC2028_RESET_CLK)
677 printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
682 switch (dev->board) {
683 case CX23885_BOARD_HAUPPAUGE_HVR1400:
684 case CX23885_BOARD_HAUPPAUGE_HVR1500:
685 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
686 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
687 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
688 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
689 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
690 /* Tuner Reset Command */
693 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
694 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
695 /* Two identical tuners on two different i2c buses,
696 * we need to reset the correct gpio. */
699 else if (port->nr == 2)
705 /* Drive the tuner into reset and back out */
706 cx_clear(GP0_IO, bitmask);
708 cx_set(GP0_IO, bitmask);
714 void cx23885_gpio_setup(struct cx23885_dev *dev)
716 switch (dev->board) {
717 case CX23885_BOARD_HAUPPAUGE_HVR1250:
718 /* GPIO-0 cx24227 demodulator reset */
719 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
721 case CX23885_BOARD_HAUPPAUGE_HVR1500:
722 /* GPIO-0 cx24227 demodulator */
723 /* GPIO-2 xc3028 tuner */
725 /* Put the parts into reset */
726 cx_set(GP0_IO, 0x00050000);
727 cx_clear(GP0_IO, 0x00000005);
730 /* Bring the parts out of reset */
731 cx_set(GP0_IO, 0x00050005);
733 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
734 /* GPIO-0 cx24227 demodulator reset */
735 /* GPIO-2 xc5000 tuner reset */
736 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
738 case CX23885_BOARD_HAUPPAUGE_HVR1800:
741 /* GPIO-2 8295A Reset */
742 /* GPIO-3-10 cx23417 data0-7 */
743 /* GPIO-11-14 cx23417 addr0-3 */
744 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
748 /* EIO15 Zilog Reset */
749 /* EIO14 S5H1409/CX24227 Reset */
750 mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
752 /* Put the demod into reset and protect the eeprom */
753 mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
756 /* Bring the demod and blaster out of reset */
757 mc417_gpio_set(dev, GPIO_15 | GPIO_14);
760 /* Force the TDA8295A into reset and back */
761 cx23885_gpio_enable(dev, GPIO_2, 1);
762 cx23885_gpio_set(dev, GPIO_2);
764 cx23885_gpio_clear(dev, GPIO_2);
766 cx23885_gpio_set(dev, GPIO_2);
769 case CX23885_BOARD_HAUPPAUGE_HVR1200:
770 /* GPIO-0 tda10048 demodulator reset */
771 /* GPIO-2 tda18271 tuner reset */
773 /* Put the parts into reset and back */
774 cx_set(GP0_IO, 0x00050000);
776 cx_clear(GP0_IO, 0x00000005);
778 cx_set(GP0_IO, 0x00050005);
780 case CX23885_BOARD_HAUPPAUGE_HVR1700:
781 /* GPIO-0 TDA10048 demodulator reset */
782 /* GPIO-2 TDA8295A Reset */
783 /* GPIO-3-10 cx23417 data0-7 */
784 /* GPIO-11-14 cx23417 addr0-3 */
785 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
787 /* The following GPIO's are on the interna AVCore (cx25840) */
789 /* GPIO-20 IR_TX 416/DVBT Select */
790 /* GPIO-21 IIS DAT */
791 /* GPIO-22 IIS WCLK */
792 /* GPIO-23 IIS BCLK */
794 /* Put the parts into reset and back */
795 cx_set(GP0_IO, 0x00050000);
797 cx_clear(GP0_IO, 0x00000005);
799 cx_set(GP0_IO, 0x00050005);
801 case CX23885_BOARD_HAUPPAUGE_HVR1400:
802 /* GPIO-0 Dibcom7000p demodulator reset */
803 /* GPIO-2 xc3028L tuner reset */
806 /* Put the parts into reset and back */
807 cx_set(GP0_IO, 0x00050000);
809 cx_clear(GP0_IO, 0x00000005);
811 cx_set(GP0_IO, 0x00050005);
813 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
814 /* GPIO-0 xc5000 tuner reset i2c bus 0 */
815 /* GPIO-1 s5h1409 demod reset i2c bus 0 */
816 /* GPIO-2 xc5000 tuner reset i2c bus 1 */
817 /* GPIO-3 s5h1409 demod reset i2c bus 0 */
819 /* Put the parts into reset and back */
820 cx_set(GP0_IO, 0x000f0000);
822 cx_clear(GP0_IO, 0x0000000f);
824 cx_set(GP0_IO, 0x000f000f);
826 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
827 /* GPIO-0 portb xc3028 reset */
828 /* GPIO-1 portb zl10353 reset */
829 /* GPIO-2 portc xc3028 reset */
830 /* GPIO-3 portc zl10353 reset */
832 /* Put the parts into reset and back */
833 cx_set(GP0_IO, 0x000f0000);
835 cx_clear(GP0_IO, 0x0000000f);
837 cx_set(GP0_IO, 0x000f000f);
839 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
840 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
841 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
842 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
843 /* GPIO-2 xc3028 tuner reset */
845 /* The following GPIO's are on the internal AVCore (cx25840) */
846 /* GPIO-? zl10353 demod reset */
848 /* Put the parts into reset and back */
849 cx_set(GP0_IO, 0x00040000);
851 cx_clear(GP0_IO, 0x00000004);
853 cx_set(GP0_IO, 0x00040004);
855 case CX23885_BOARD_TBS_6920:
856 cx_write(MC417_CTL, 0x00000036);
857 cx_write(MC417_OEN, 0x00001000);
858 cx_set(MC417_RWD, 0x00000002);
860 cx_clear(MC417_RWD, 0x00000800);
862 cx_set(MC417_RWD, 0x00000800);
865 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
866 /* GPIO-0 INTA from CiMax1
867 GPIO-1 INTB from CiMax2
869 GPIO-3 to GPIO-10 data/addr for CA
870 GPIO-11 ~CS0 to CiMax1
871 GPIO-12 ~CS1 to CiMax2
872 GPIO-13 ADL0 load LSB addr
873 GPIO-14 ADL1 load MSB addr
874 GPIO-15 ~RDY from CiMax
878 cx_set(GP0_IO, 0x00040000); /* GPIO as out */
879 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
880 cx_clear(GP0_IO, 0x00030004);
881 mdelay(100);/* reset delay */
882 cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
883 cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
884 /* GPIO-15 IN as ~ACK, rest as OUT */
885 cx_write(MC417_OEN, 0x00001000);
886 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
887 cx_write(MC417_RWD, 0x0000c300);
889 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
891 case CX23885_BOARD_HAUPPAUGE_HVR1270:
892 case CX23885_BOARD_HAUPPAUGE_HVR1275:
893 case CX23885_BOARD_HAUPPAUGE_HVR1255:
894 case CX23885_BOARD_HAUPPAUGE_HVR1210:
895 /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
896 /* GPIO-6 I2C Gate which can isolate the demod from the bus */
897 /* GPIO-9 Demod reset */
899 /* Put the parts into reset and back */
900 cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
901 cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
902 cx23885_gpio_clear(dev, GPIO_9);
904 cx23885_gpio_set(dev, GPIO_9);
906 case CX23885_BOARD_MYGICA_X8506:
907 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
908 /* GPIO-0 (0)Analog / (1)Digital TV */
909 /* GPIO-1 reset XC5000 */
910 /* GPIO-2 reset LGS8GL5 / LGS8G75 */
911 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1);
912 cx23885_gpio_clear(dev, GPIO_1 | GPIO_2);
914 cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2);
917 case CX23885_BOARD_MYGICA_X8558PRO:
918 /* GPIO-0 reset first ATBM8830 */
919 /* GPIO-1 reset second ATBM8830 */
920 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
921 cx23885_gpio_clear(dev, GPIO_0 | GPIO_1);
923 cx23885_gpio_set(dev, GPIO_0 | GPIO_1);
926 case CX23885_BOARD_HAUPPAUGE_HVR1850:
927 case CX23885_BOARD_HAUPPAUGE_HVR1290:
931 /* GPIO-3-10 cx23417 data0-7 */
932 /* GPIO-11-14 cx23417 addr0-3 */
933 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
935 /* GPIO-20 C_IR_TX */
936 /* GPIO-21 I2S DAT */
937 /* GPIO-22 I2S WCLK */
938 /* GPIO-23 I2S BCLK */
939 /* ALT GPIO: EXP GPIO LATCH */
942 /* GPIO-14 S5H1411/CX24228 Reset */
943 /* GPIO-13 EEPROM write protect */
944 mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
946 /* Put the demod into reset and protect the eeprom */
947 mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
950 /* Bring the demod out of reset */
951 mc417_gpio_set(dev, GPIO_14);
955 /* Connected to IF / Mux */
960 int cx23885_ir_init(struct cx23885_dev *dev)
963 switch (dev->board) {
964 case CX23885_BOARD_HAUPPAUGE_HVR1250:
965 case CX23885_BOARD_HAUPPAUGE_HVR1500:
966 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
967 case CX23885_BOARD_HAUPPAUGE_HVR1800:
968 case CX23885_BOARD_HAUPPAUGE_HVR1200:
969 case CX23885_BOARD_HAUPPAUGE_HVR1400:
970 case CX23885_BOARD_HAUPPAUGE_HVR1270:
971 case CX23885_BOARD_HAUPPAUGE_HVR1275:
972 case CX23885_BOARD_HAUPPAUGE_HVR1255:
973 case CX23885_BOARD_HAUPPAUGE_HVR1210:
974 /* FIXME: Implement me */
976 case CX23885_BOARD_HAUPPAUGE_HVR1850:
977 case CX23885_BOARD_HAUPPAUGE_HVR1290:
978 ret = cx23888_ir_probe(dev);
981 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
982 dev->pci_irqmask |= PCI_MSK_IR;
984 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
985 request_module("ir-kbd-i2c");
992 void cx23885_ir_fini(struct cx23885_dev *dev)
994 switch (dev->board) {
995 case CX23885_BOARD_HAUPPAUGE_HVR1850:
996 case CX23885_BOARD_HAUPPAUGE_HVR1290:
997 dev->pci_irqmask &= ~PCI_MSK_IR;
998 cx_clear(PCI_INT_MSK, PCI_MSK_IR);
999 cx23888_ir_remove(dev);
1005 void cx23885_ir_pci_int_enable(struct cx23885_dev *dev)
1007 switch (dev->board) {
1008 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1009 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1010 if (dev->sd_ir && (dev->pci_irqmask & PCI_MSK_IR))
1011 cx_set(PCI_INT_MSK, PCI_MSK_IR);
1016 void cx23885_card_setup(struct cx23885_dev *dev)
1018 struct cx23885_tsport *ts1 = &dev->ts1;
1019 struct cx23885_tsport *ts2 = &dev->ts2;
1021 static u8 eeprom[256];
1023 if (dev->i2c_bus[0].i2c_rc == 0) {
1024 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
1025 tveeprom_read(&dev->i2c_bus[0].i2c_client,
1026 eeprom, sizeof(eeprom));
1029 switch (dev->board) {
1030 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1031 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1032 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1033 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1034 if (dev->i2c_bus[0].i2c_rc == 0)
1035 hauppauge_eeprom(dev, eeprom+0x80);
1037 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1038 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1039 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1040 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1041 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1042 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1043 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1044 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1045 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1046 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1047 if (dev->i2c_bus[0].i2c_rc == 0)
1048 hauppauge_eeprom(dev, eeprom+0xc0);
1052 switch (dev->board) {
1053 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1054 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1055 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1056 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1057 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1058 /* break omitted intentionally */
1059 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
1060 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1061 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1062 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1064 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1065 /* Defaults for VID B - Analog encoder */
1066 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
1067 ts1->gen_ctrl_val = 0x10e;
1068 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1069 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1071 /* APB_TSVALERR_POL (active low)*/
1072 ts1->vld_misc_val = 0x2000;
1073 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
1075 /* Defaults for VID C */
1076 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1077 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1078 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1080 case CX23885_BOARD_TBS_6920:
1081 ts1->gen_ctrl_val = 0x4; /* Parallel */
1082 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1083 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1085 case CX23885_BOARD_TEVII_S470:
1086 case CX23885_BOARD_DVBWORLD_2005:
1087 ts1->gen_ctrl_val = 0x5; /* Parallel */
1088 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1089 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1091 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1092 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1093 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1094 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1095 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1096 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1097 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1099 case CX23885_BOARD_MYGICA_X8506:
1100 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1101 ts1->gen_ctrl_val = 0x5; /* Parallel */
1102 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1103 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1105 case CX23885_BOARD_MYGICA_X8558PRO:
1106 ts1->gen_ctrl_val = 0x5; /* Parallel */
1107 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1108 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1109 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1110 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1111 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1113 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1114 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1115 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1116 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1117 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1118 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1119 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1120 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1121 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1122 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1123 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1124 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1125 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1126 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1127 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1128 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1130 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1131 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1132 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1135 /* Certain boards support analog, or require the avcore to be
1136 * loaded, ensure this happens.
1138 switch (dev->board) {
1139 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1140 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1141 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1142 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1143 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1144 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1145 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1146 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1147 case CX23885_BOARD_MYGICA_X8506:
1148 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1149 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1150 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1151 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
1152 &dev->i2c_bus[2].i2c_adap,
1153 "cx25840", "cx25840", 0x88 >> 1, NULL);
1154 v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
1158 /* AUX-PLL 27MHz CLK */
1159 switch (dev->board) {
1160 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1161 netup_initialize(dev);
1166 /* ------------------------------------------------------------------ */