2 * mxl111sf-i2c.c - driver for the MaxLinear MXL111SF
4 * Copyright (C) 2010-2014 Michael Krufky <mkrufky@linuxtv.org>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 #include "mxl111sf-i2c.h"
20 /* SW-I2C ----------------------------------------------------------------- */
22 #define SW_I2C_ADDR 0x1a
23 #define SW_I2C_EN 0x02
24 #define SW_SCL_OUT 0x04
25 #define SW_SDA_OUT 0x08
26 #define SW_SDA_IN 0x04
28 #define SW_I2C_BUSY_ADDR 0x2f
29 #define SW_I2C_BUSY 0x02
31 static int mxl111sf_i2c_bitbang_sendbyte(struct mxl111sf_state *state,
37 mxl_i2c("(0x%02x)", byte);
39 ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &data);
43 for (i = 0; i < 8; i++) {
45 data = (byte & (0x80 >> i)) ? SW_SDA_OUT : 0;
47 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
48 0x10 | SW_I2C_EN | data);
52 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
53 0x10 | SW_I2C_EN | data | SW_SCL_OUT);
57 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
58 0x10 | SW_I2C_EN | data);
63 /* last bit was 0 so we need to release SDA */
65 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
66 0x10 | SW_I2C_EN | SW_SDA_OUT);
71 /* CLK high for ACK readback */
72 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
73 0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT);
77 ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &data);
81 /* drop the CLK after getting ACK, SDA will go high right away */
82 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
83 0x10 | SW_I2C_EN | SW_SDA_OUT);
93 static int mxl111sf_i2c_bitbang_recvbyte(struct mxl111sf_state *state,
104 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
105 0x10 | SW_I2C_EN | SW_SDA_OUT);
109 for (i = 0; i < 8; i++) {
110 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
112 SW_SCL_OUT | SW_SDA_OUT);
116 ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &data);
120 if (data & SW_SDA_IN)
123 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
124 0x10 | SW_I2C_EN | SW_SDA_OUT);
133 static int mxl111sf_i2c_start(struct mxl111sf_state *state)
139 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
140 0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT);
144 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
145 0x10 | SW_I2C_EN | SW_SCL_OUT);
149 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
150 0x10 | SW_I2C_EN); /* start */
156 static int mxl111sf_i2c_stop(struct mxl111sf_state *state)
162 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
163 0x10 | SW_I2C_EN); /* stop */
167 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
168 0x10 | SW_I2C_EN | SW_SCL_OUT);
172 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
173 0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT);
177 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
178 0x10 | SW_SCL_OUT | SW_SDA_OUT);
184 static int mxl111sf_i2c_ack(struct mxl111sf_state *state)
191 ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &b);
195 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
201 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
202 0x10 | SW_I2C_EN | SW_SCL_OUT);
206 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
207 0x10 | SW_I2C_EN | SW_SDA_OUT);
213 static int mxl111sf_i2c_nack(struct mxl111sf_state *state)
219 /* SDA high to signal last byte read from slave */
220 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
221 0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT);
225 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
226 0x10 | SW_I2C_EN | SW_SDA_OUT);
232 /* ------------------------------------------------------------------------ */
234 static int mxl111sf_i2c_sw_xfer_msg(struct mxl111sf_state *state,
241 if (msg->flags & I2C_M_RD) {
243 ret = mxl111sf_i2c_start(state);
247 ret = mxl111sf_i2c_bitbang_sendbyte(state,
248 (msg->addr << 1) | 0x01);
250 mxl111sf_i2c_stop(state);
254 for (i = 0; i < msg->len; i++) {
255 ret = mxl111sf_i2c_bitbang_recvbyte(state,
258 mxl111sf_i2c_stop(state);
262 if (i < msg->len - 1)
263 mxl111sf_i2c_ack(state);
266 mxl111sf_i2c_nack(state);
268 ret = mxl111sf_i2c_stop(state);
274 ret = mxl111sf_i2c_start(state);
278 ret = mxl111sf_i2c_bitbang_sendbyte(state,
279 (msg->addr << 1) & 0xfe);
281 mxl111sf_i2c_stop(state);
285 for (i = 0; i < msg->len; i++) {
286 ret = mxl111sf_i2c_bitbang_sendbyte(state,
289 mxl111sf_i2c_stop(state);
294 /* FIXME: we only want to do this on the last transaction */
295 mxl111sf_i2c_stop(state);
301 /* HW-I2C ----------------------------------------------------------------- */
303 #define USB_WRITE_I2C_CMD 0x99
304 #define USB_READ_I2C_CMD 0xdd
305 #define USB_END_I2C_CMD 0xfe
307 #define USB_WRITE_I2C_CMD_LEN 26
308 #define USB_READ_I2C_CMD_LEN 24
310 #define I2C_MUX_REG 0x30
311 #define I2C_CONTROL_REG 0x00
312 #define I2C_SLAVE_ADDR_REG 0x08
313 #define I2C_DATA_REG 0x0c
314 #define I2C_INT_STATUS_REG 0x10
316 static int mxl111sf_i2c_send_data(struct mxl111sf_state *state,
319 int ret = mxl111sf_ctrl_msg(state, wdata[0],
320 &wdata[1], 25, NULL, 0);
326 static int mxl111sf_i2c_get_data(struct mxl111sf_state *state,
327 u8 index, u8 *wdata, u8 *rdata)
329 int ret = mxl111sf_ctrl_msg(state, wdata[0],
330 &wdata[1], 25, rdata, 24);
336 static u8 mxl111sf_i2c_check_status(struct mxl111sf_state *state)
343 buf[0] = USB_READ_I2C_CMD;
346 buf[2] = I2C_INT_STATUS_REG;
350 buf[5] = USB_END_I2C_CMD;
352 mxl111sf_i2c_get_data(state, 0, buf, buf);
360 static u8 mxl111sf_i2c_check_fifo(struct mxl111sf_state *state)
367 buf[0] = USB_READ_I2C_CMD;
370 buf[2] = I2C_MUX_REG;
374 buf[5] = I2C_INT_STATUS_REG;
377 buf[8] = USB_END_I2C_CMD;
379 mxl111sf_i2c_get_data(state, 0, buf, buf);
381 if (0x08 == (buf[1] & 0x08))
384 if ((buf[5] & 0x02) == 0x02)
385 mxl_i2c("(buf[5] & 0x02) == 0x02"); /* FIXME */
390 static int mxl111sf_i2c_readagain(struct mxl111sf_state *state,
399 mxl_i2c("read %d bytes", count);
401 while ((fifo_status == 0) && (i++ < 5))
402 fifo_status = mxl111sf_i2c_check_fifo(state);
404 i2c_w_data[0] = 0xDD;
405 i2c_w_data[1] = 0x00;
407 for (i = 2; i < 26; i++)
408 i2c_w_data[i] = 0xFE;
410 for (i = 0; i < count; i++) {
411 i2c_w_data[2+(i*3)] = 0x0C;
412 i2c_w_data[3+(i*3)] = 0x00;
413 i2c_w_data[4+(i*3)] = 0x00;
416 mxl111sf_i2c_get_data(state, 0, i2c_w_data, i2c_r_data);
418 /* Check for I2C NACK status */
419 if (mxl111sf_i2c_check_status(state) == 1) {
422 for (i = 0; i < count; i++) {
423 rbuf[i] = i2c_r_data[(i*3)+1];
424 mxl_i2c("%02x\t %02x",
426 i2c_r_data[(i*3)+2]);
436 static int mxl111sf_i2c_hw_xfer_msg(struct mxl111sf_state *state,
449 mxl_i2c("addr: 0x%02x, read buff len: %d, write buff len: %d",
450 msg->addr, (msg->flags & I2C_M_RD) ? msg->len : 0,
451 (!(msg->flags & I2C_M_RD)) ? msg->len : 0);
453 for (index = 0; index < 26; index++)
454 buf[index] = USB_END_I2C_CMD;
456 /* command to indicate data payload is destined for I2C interface */
457 buf[0] = USB_WRITE_I2C_CMD;
460 /* enable I2C interface */
461 buf[2] = I2C_MUX_REG;
465 /* enable I2C interface */
466 buf[5] = I2C_MUX_REG;
470 /* set Timeout register on I2C interface */
475 /* enable Interrupts on I2C interface */
484 ret = mxl111sf_i2c_send_data(state, 0, buf);
486 /* write data on I2C bus */
487 if (!(msg->flags & I2C_M_RD) && (msg->len > 0)) {
488 mxl_i2c("%d\t%02x", msg->len, msg->buf[0]);
490 /* control register on I2C interface to initialize I2C bus */
491 buf[2] = I2C_CONTROL_REG;
493 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
495 /* I2C Slave device Address */
496 buf[5] = I2C_SLAVE_ADDR_REG;
497 buf[6] = (msg->addr);
499 buf[8] = USB_END_I2C_CMD;
500 ret = mxl111sf_i2c_send_data(state, 0, buf);
502 /* check for slave device status */
503 if (mxl111sf_i2c_check_status(state) == 1) {
504 mxl_i2c("NACK writing slave address %02x",
506 /* if NACK, stop I2C bus and exit */
507 buf[2] = I2C_CONTROL_REG;
509 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
514 /* I2C interface can do I2C operations in block of 8 bytes of
515 I2C data. calculation to figure out number of blocks of i2c
516 data required to program */
517 block_len = (msg->len / 8);
518 left_over_len = (msg->len % 8);
520 mxl_i2c("block_len %d, left_over_len %d",
521 block_len, left_over_len);
523 for (index = 0; index < block_len; index++) {
524 for (i = 0; i < 8; i++) {
525 /* write data on I2C interface */
526 buf[2+(i*3)] = I2C_DATA_REG;
527 buf[3+(i*3)] = msg->buf[(index*8)+i];
531 ret = mxl111sf_i2c_send_data(state, 0, buf);
533 /* check for I2C NACK status */
534 if (mxl111sf_i2c_check_status(state) == 1) {
535 mxl_i2c("NACK writing slave address %02x",
538 /* if NACK, stop I2C bus and exit */
539 buf[2] = I2C_CONTROL_REG;
541 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
549 for (k = 0; k < 26; k++)
550 buf[k] = USB_END_I2C_CMD;
555 for (i = 0; i < left_over_len; i++) {
556 buf[2+(i*3)] = I2C_DATA_REG;
557 buf[3+(i*3)] = msg->buf[(index*8)+i];
558 mxl_i2c("index = %d %d data %d",
559 index, i, msg->buf[(index*8)+i]);
562 ret = mxl111sf_i2c_send_data(state, 0, buf);
564 /* check for I2C NACK status */
565 if (mxl111sf_i2c_check_status(state) == 1) {
566 mxl_i2c("NACK writing slave address %02x",
569 /* if NACK, stop I2C bus and exit */
570 buf[2] = I2C_CONTROL_REG;
572 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
579 /* issue I2C STOP after write */
580 buf[2] = I2C_CONTROL_REG;
582 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
586 /* read data from I2C bus */
587 if ((msg->flags & I2C_M_RD) && (msg->len > 0)) {
588 mxl_i2c("read buf len %d", msg->len);
590 /* command to indicate data payload is
591 destined for I2C interface */
592 buf[2] = I2C_CONTROL_REG;
594 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
596 /* I2C xfer length */
598 buf[6] = (msg->len & 0xFF);
601 /* I2C slave device Address */
602 buf[8] = I2C_SLAVE_ADDR_REG;
605 buf[11] = USB_END_I2C_CMD;
606 ret = mxl111sf_i2c_send_data(state, 0, buf);
608 /* check for I2C NACK status */
609 if (mxl111sf_i2c_check_status(state) == 1) {
610 mxl_i2c("NACK reading slave address %02x",
613 /* if NACK, stop I2C bus and exit */
614 buf[2] = I2C_CONTROL_REG;
616 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
621 /* I2C interface can do I2C operations in block of 8 bytes of
622 I2C data. calculation to figure out number of blocks of
623 i2c data required to program */
624 block_len = ((msg->len) / 8);
625 left_over_len = ((msg->len) % 8);
628 mxl_i2c("block_len %d, left_over_len %d",
629 block_len, left_over_len);
631 /* command to read data from I2C interface */
632 buf[0] = USB_READ_I2C_CMD;
635 for (index = 0; index < block_len; index++) {
636 /* setup I2C read request packet on I2C interface */
637 for (i = 0; i < 8; i++) {
638 buf[2+(i*3)] = I2C_DATA_REG;
643 ret = mxl111sf_i2c_get_data(state, 0, buf, i2c_r_data);
645 /* check for I2C NACK status */
646 if (mxl111sf_i2c_check_status(state) == 1) {
647 mxl_i2c("NACK reading slave address %02x",
650 /* if NACK, stop I2C bus and exit */
651 buf[2] = I2C_CONTROL_REG;
653 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
658 /* copy data from i2c data payload to read buffer */
659 for (i = 0; i < 8; i++) {
660 rd_status[i] = i2c_r_data[(i*3)+2];
662 if (rd_status[i] == 0x04) {
664 mxl_i2c("i2c fifo empty! @ %d",
666 msg->buf[(index*8)+i] =
670 mxl111sf_i2c_readagain(
673 if (ret_status == 1) {
678 msg->buf[(index*8)+(k+i+1)] =
680 mxl_i2c("read data: %02x\t %02x",
681 msg->buf[(index*8)+(k+i)],
683 mxl_i2c("read data: %02x\t %02x",
684 msg->buf[(index*8)+(k+i+1)],
690 mxl_i2c("readagain ERROR!");
693 msg->buf[(index*8)+i] =
697 msg->buf[(index*8)+i] =
707 for (k = 0; k < 26; k++)
708 buf[k] = USB_END_I2C_CMD;
713 for (i = 0; i < left_over_len; i++) {
714 buf[2+(i*3)] = I2C_DATA_REG;
718 ret = mxl111sf_i2c_get_data(state, 0, buf,
721 /* check for I2C NACK status */
722 if (mxl111sf_i2c_check_status(state) == 1) {
723 mxl_i2c("NACK reading slave address %02x",
726 /* if NACK, stop I2C bus and exit */
727 buf[2] = I2C_CONTROL_REG;
729 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
734 for (i = 0; i < left_over_len; i++) {
735 msg->buf[(block_len*8)+i] =
737 mxl_i2c("read data: %02x\t %02x",
739 i2c_r_data[(i*3)+2]);
743 /* indicate I2C interface to issue NACK
744 after next I2C read op */
745 buf[0] = USB_WRITE_I2C_CMD;
748 /* control register */
749 buf[2] = I2C_CONTROL_REG;
751 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
753 buf[5] = USB_END_I2C_CMD;
754 ret = mxl111sf_i2c_send_data(state, 0, buf);
756 /* control register */
757 buf[2] = I2C_CONTROL_REG;
759 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
763 /* STOP and disable I2C MUX */
764 buf[0] = USB_WRITE_I2C_CMD;
767 /* de-initilize I2C BUS */
768 buf[5] = USB_END_I2C_CMD;
769 mxl111sf_i2c_send_data(state, 0, buf);
771 /* Control Register */
772 buf[2] = I2C_CONTROL_REG;
776 /* disable I2C interface */
777 buf[5] = I2C_MUX_REG;
781 /* de-initilize I2C BUS */
782 buf[8] = USB_END_I2C_CMD;
783 mxl111sf_i2c_send_data(state, 0, buf);
785 /* disable I2C interface */
786 buf[2] = I2C_MUX_REG;
790 /* disable I2C interface */
791 buf[5] = I2C_MUX_REG;
795 /* disable I2C interface */
796 buf[8] = I2C_MUX_REG;
800 buf[11] = USB_END_I2C_CMD;
801 mxl111sf_i2c_send_data(state, 0, buf);
806 /* ------------------------------------------------------------------------ */
808 int mxl111sf_i2c_xfer(struct i2c_adapter *adap,
809 struct i2c_msg msg[], int num)
811 struct dvb_usb_device *d = i2c_get_adapdata(adap);
812 struct mxl111sf_state *state = d->priv;
813 int hwi2c = (state->chip_rev > MXL111SF_V6);
816 if (mutex_lock_interruptible(&d->i2c_mutex) < 0)
819 for (i = 0; i < num; i++) {
821 mxl111sf_i2c_hw_xfer_msg(state, &msg[i]) :
822 mxl111sf_i2c_sw_xfer_msg(state, &msg[i]);
824 mxl_debug_adv("failed with error %d on i2c transaction %d of %d, %sing %d bytes to/from 0x%02x",
826 (msg[i].flags & I2C_M_RD) ?
828 msg[i].len, msg[i].addr);
834 mutex_unlock(&d->i2c_mutex);
836 return i == num ? num : -EREMOTEIO;