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[sfrench/cifs-2.6.git] / drivers / media / rc / img-ir / img-ir-hw.c
1 /*
2  * ImgTec IR Hardware Decoder found in PowerDown Controller.
3  *
4  * Copyright 2010-2014 Imagination Technologies Ltd.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by the
8  * Free Software Foundation; either version 2 of the License, or (at your
9  * option) any later version.
10  *
11  * This ties into the input subsystem using the RC-core. Protocol support is
12  * provided in separate modules which provide the parameters and scancode
13  * translation functions to set up the hardware decoder and interpret the
14  * resulting input.
15  */
16
17 #include <linux/bitops.h>
18 #include <linux/clk.h>
19 #include <linux/interrupt.h>
20 #include <linux/spinlock.h>
21 #include <linux/timer.h>
22 #include <media/rc-core.h>
23 #include "img-ir.h"
24
25 /* Decoders lock (only modified to preprocess them) */
26 static DEFINE_SPINLOCK(img_ir_decoders_lock);
27
28 static bool img_ir_decoders_preprocessed;
29 static struct img_ir_decoder *img_ir_decoders[] = {
30 #ifdef CONFIG_IR_IMG_NEC
31         &img_ir_nec,
32 #endif
33 #ifdef CONFIG_IR_IMG_JVC
34         &img_ir_jvc,
35 #endif
36 #ifdef CONFIG_IR_IMG_SONY
37         &img_ir_sony,
38 #endif
39 #ifdef CONFIG_IR_IMG_SHARP
40         &img_ir_sharp,
41 #endif
42 #ifdef CONFIG_IR_IMG_SANYO
43         &img_ir_sanyo,
44 #endif
45 #ifdef CONFIG_IR_IMG_RC5
46         &img_ir_rc5,
47 #endif
48 #ifdef CONFIG_IR_IMG_RC6
49         &img_ir_rc6,
50 #endif
51         NULL
52 };
53
54 #define IMG_IR_F_FILTER         BIT(RC_FILTER_NORMAL)   /* enable filtering */
55 #define IMG_IR_F_WAKE           BIT(RC_FILTER_WAKEUP)   /* enable waking */
56
57 /* code type quirks */
58
59 #define IMG_IR_QUIRK_CODE_BROKEN        0x1     /* Decode is broken */
60 #define IMG_IR_QUIRK_CODE_LEN_INCR      0x2     /* Bit length needs increment */
61 /*
62  * The decoder generates rapid interrupts without actually having
63  * received any new data after an incomplete IR code is decoded.
64  */
65 #define IMG_IR_QUIRK_CODE_IRQ           0x4
66
67 /* functions for preprocessing timings, ensuring max is set */
68
69 static void img_ir_timing_preprocess(struct img_ir_timing_range *range,
70                                      unsigned int unit)
71 {
72         if (range->max < range->min)
73                 range->max = range->min;
74         if (unit) {
75                 /* multiply by unit and convert to microseconds */
76                 range->min = (range->min*unit)/1000;
77                 range->max = (range->max*unit + 999)/1000; /* round up */
78         }
79 }
80
81 static void img_ir_symbol_timing_preprocess(struct img_ir_symbol_timing *timing,
82                                             unsigned int unit)
83 {
84         img_ir_timing_preprocess(&timing->pulse, unit);
85         img_ir_timing_preprocess(&timing->space, unit);
86 }
87
88 static void img_ir_timings_preprocess(struct img_ir_timings *timings,
89                                       unsigned int unit)
90 {
91         img_ir_symbol_timing_preprocess(&timings->ldr, unit);
92         img_ir_symbol_timing_preprocess(&timings->s00, unit);
93         img_ir_symbol_timing_preprocess(&timings->s01, unit);
94         img_ir_symbol_timing_preprocess(&timings->s10, unit);
95         img_ir_symbol_timing_preprocess(&timings->s11, unit);
96         /* default s10 and s11 to s00 and s01 if no leader */
97         if (unit)
98                 /* multiply by unit and convert to microseconds (round up) */
99                 timings->ft.ft_min = (timings->ft.ft_min*unit + 999)/1000;
100 }
101
102 /* functions for filling empty fields with defaults */
103
104 static void img_ir_timing_defaults(struct img_ir_timing_range *range,
105                                    struct img_ir_timing_range *defaults)
106 {
107         if (!range->min)
108                 range->min = defaults->min;
109         if (!range->max)
110                 range->max = defaults->max;
111 }
112
113 static void img_ir_symbol_timing_defaults(struct img_ir_symbol_timing *timing,
114                                           struct img_ir_symbol_timing *defaults)
115 {
116         img_ir_timing_defaults(&timing->pulse, &defaults->pulse);
117         img_ir_timing_defaults(&timing->space, &defaults->space);
118 }
119
120 static void img_ir_timings_defaults(struct img_ir_timings *timings,
121                                     struct img_ir_timings *defaults)
122 {
123         img_ir_symbol_timing_defaults(&timings->ldr, &defaults->ldr);
124         img_ir_symbol_timing_defaults(&timings->s00, &defaults->s00);
125         img_ir_symbol_timing_defaults(&timings->s01, &defaults->s01);
126         img_ir_symbol_timing_defaults(&timings->s10, &defaults->s10);
127         img_ir_symbol_timing_defaults(&timings->s11, &defaults->s11);
128         if (!timings->ft.ft_min)
129                 timings->ft.ft_min = defaults->ft.ft_min;
130 }
131
132 /* functions for converting timings to register values */
133
134 /**
135  * img_ir_control() - Convert control struct to control register value.
136  * @control:    Control data
137  *
138  * Returns:     The control register value equivalent of @control.
139  */
140 static u32 img_ir_control(const struct img_ir_control *control)
141 {
142         u32 ctrl = control->code_type << IMG_IR_CODETYPE_SHIFT;
143         if (control->decoden)
144                 ctrl |= IMG_IR_DECODEN;
145         if (control->hdrtog)
146                 ctrl |= IMG_IR_HDRTOG;
147         if (control->ldrdec)
148                 ctrl |= IMG_IR_LDRDEC;
149         if (control->decodinpol)
150                 ctrl |= IMG_IR_DECODINPOL;
151         if (control->bitorien)
152                 ctrl |= IMG_IR_BITORIEN;
153         if (control->d1validsel)
154                 ctrl |= IMG_IR_D1VALIDSEL;
155         if (control->bitinv)
156                 ctrl |= IMG_IR_BITINV;
157         if (control->decodend2)
158                 ctrl |= IMG_IR_DECODEND2;
159         if (control->bitoriend2)
160                 ctrl |= IMG_IR_BITORIEND2;
161         if (control->bitinvd2)
162                 ctrl |= IMG_IR_BITINVD2;
163         return ctrl;
164 }
165
166 /**
167  * img_ir_timing_range_convert() - Convert microsecond range.
168  * @out:        Output timing range in clock cycles with a shift.
169  * @in:         Input timing range in microseconds.
170  * @tolerance:  Tolerance as a fraction of 128 (roughly percent).
171  * @clock_hz:   IR clock rate in Hz.
172  * @shift:      Shift of output units.
173  *
174  * Converts min and max from microseconds to IR clock cycles, applies a
175  * tolerance, and shifts for the register, rounding in the right direction.
176  * Note that in and out can safely be the same object.
177  */
178 static void img_ir_timing_range_convert(struct img_ir_timing_range *out,
179                                         const struct img_ir_timing_range *in,
180                                         unsigned int tolerance,
181                                         unsigned long clock_hz,
182                                         unsigned int shift)
183 {
184         unsigned int min = in->min;
185         unsigned int max = in->max;
186         /* add a tolerance */
187         min = min - (min*tolerance >> 7);
188         max = max + (max*tolerance >> 7);
189         /* convert from microseconds into clock cycles */
190         min = min*clock_hz / 1000000;
191         max = (max*clock_hz + 999999) / 1000000; /* round up */
192         /* apply shift and copy to output */
193         out->min = min >> shift;
194         out->max = (max + ((1 << shift) - 1)) >> shift; /* round up */
195 }
196
197 /**
198  * img_ir_symbol_timing() - Convert symbol timing struct to register value.
199  * @timing:     Symbol timing data
200  * @tolerance:  Timing tolerance where 0-128 represents 0-100%
201  * @clock_hz:   Frequency of source clock in Hz
202  * @pd_shift:   Shift to apply to symbol period
203  * @w_shift:    Shift to apply to symbol width
204  *
205  * Returns:     Symbol timing register value based on arguments.
206  */
207 static u32 img_ir_symbol_timing(const struct img_ir_symbol_timing *timing,
208                                 unsigned int tolerance,
209                                 unsigned long clock_hz,
210                                 unsigned int pd_shift,
211                                 unsigned int w_shift)
212 {
213         struct img_ir_timing_range hw_pulse, hw_period;
214         /* we calculate period in hw_period, then convert in place */
215         hw_period.min = timing->pulse.min + timing->space.min;
216         hw_period.max = timing->pulse.max + timing->space.max;
217         img_ir_timing_range_convert(&hw_period, &hw_period,
218                         tolerance, clock_hz, pd_shift);
219         img_ir_timing_range_convert(&hw_pulse, &timing->pulse,
220                         tolerance, clock_hz, w_shift);
221         /* construct register value */
222         return  (hw_period.max  << IMG_IR_PD_MAX_SHIFT) |
223                 (hw_period.min  << IMG_IR_PD_MIN_SHIFT) |
224                 (hw_pulse.max   << IMG_IR_W_MAX_SHIFT)  |
225                 (hw_pulse.min   << IMG_IR_W_MIN_SHIFT);
226 }
227
228 /**
229  * img_ir_free_timing() - Convert free time timing struct to register value.
230  * @timing:     Free symbol timing data
231  * @clock_hz:   Source clock frequency in Hz
232  *
233  * Returns:     Free symbol timing register value.
234  */
235 static u32 img_ir_free_timing(const struct img_ir_free_timing *timing,
236                               unsigned long clock_hz)
237 {
238         unsigned int minlen, maxlen, ft_min;
239         /* minlen is only 5 bits, and round minlen to multiple of 2 */
240         if (timing->minlen < 30)
241                 minlen = timing->minlen & -2;
242         else
243                 minlen = 30;
244         /* maxlen has maximum value of 48, and round maxlen to multiple of 2 */
245         if (timing->maxlen < 48)
246                 maxlen = (timing->maxlen + 1) & -2;
247         else
248                 maxlen = 48;
249         /* convert and shift ft_min, rounding upwards */
250         ft_min = (timing->ft_min*clock_hz + 999999) / 1000000;
251         ft_min = (ft_min + 7) >> 3;
252         /* construct register value */
253         return  (maxlen << IMG_IR_MAXLEN_SHIFT) |
254                 (minlen << IMG_IR_MINLEN_SHIFT) |
255                 (ft_min << IMG_IR_FT_MIN_SHIFT);
256 }
257
258 /**
259  * img_ir_free_timing_dynamic() - Update free time register value.
260  * @st_ft:      Static free time register value from img_ir_free_timing.
261  * @filter:     Current filter which may additionally restrict min/max len.
262  *
263  * Returns:     Updated free time register value based on the current filter.
264  */
265 static u32 img_ir_free_timing_dynamic(u32 st_ft, struct img_ir_filter *filter)
266 {
267         unsigned int minlen, maxlen, newminlen, newmaxlen;
268
269         /* round minlen, maxlen to multiple of 2 */
270         newminlen = filter->minlen & -2;
271         newmaxlen = (filter->maxlen + 1) & -2;
272         /* extract min/max len from register */
273         minlen = (st_ft & IMG_IR_MINLEN) >> IMG_IR_MINLEN_SHIFT;
274         maxlen = (st_ft & IMG_IR_MAXLEN) >> IMG_IR_MAXLEN_SHIFT;
275         /* if the new values are more restrictive, update the register value */
276         if (newminlen > minlen) {
277                 st_ft &= ~IMG_IR_MINLEN;
278                 st_ft |= newminlen << IMG_IR_MINLEN_SHIFT;
279         }
280         if (newmaxlen < maxlen) {
281                 st_ft &= ~IMG_IR_MAXLEN;
282                 st_ft |= newmaxlen << IMG_IR_MAXLEN_SHIFT;
283         }
284         return st_ft;
285 }
286
287 /**
288  * img_ir_timings_convert() - Convert timings to register values
289  * @regs:       Output timing register values
290  * @timings:    Input timing data
291  * @tolerance:  Timing tolerance where 0-128 represents 0-100%
292  * @clock_hz:   Source clock frequency in Hz
293  */
294 static void img_ir_timings_convert(struct img_ir_timing_regvals *regs,
295                                    const struct img_ir_timings *timings,
296                                    unsigned int tolerance,
297                                    unsigned int clock_hz)
298 {
299         /* leader symbol timings are divided by 16 */
300         regs->ldr = img_ir_symbol_timing(&timings->ldr, tolerance, clock_hz,
301                         4, 4);
302         /* other symbol timings, pd fields only are divided by 2 */
303         regs->s00 = img_ir_symbol_timing(&timings->s00, tolerance, clock_hz,
304                         1, 0);
305         regs->s01 = img_ir_symbol_timing(&timings->s01, tolerance, clock_hz,
306                         1, 0);
307         regs->s10 = img_ir_symbol_timing(&timings->s10, tolerance, clock_hz,
308                         1, 0);
309         regs->s11 = img_ir_symbol_timing(&timings->s11, tolerance, clock_hz,
310                         1, 0);
311         regs->ft = img_ir_free_timing(&timings->ft, clock_hz);
312 }
313
314 /**
315  * img_ir_decoder_preprocess() - Preprocess timings in decoder.
316  * @decoder:    Decoder to be preprocessed.
317  *
318  * Ensures that the symbol timing ranges are valid with respect to ordering, and
319  * does some fixed conversion on them.
320  */
321 static void img_ir_decoder_preprocess(struct img_ir_decoder *decoder)
322 {
323         /* default tolerance */
324         if (!decoder->tolerance)
325                 decoder->tolerance = 10; /* percent */
326         /* and convert tolerance to fraction out of 128 */
327         decoder->tolerance = decoder->tolerance * 128 / 100;
328
329         /* fill in implicit fields */
330         img_ir_timings_preprocess(&decoder->timings, decoder->unit);
331
332         /* do the same for repeat timings if applicable */
333         if (decoder->repeat) {
334                 img_ir_timings_preprocess(&decoder->rtimings, decoder->unit);
335                 img_ir_timings_defaults(&decoder->rtimings, &decoder->timings);
336         }
337 }
338
339 /**
340  * img_ir_decoder_convert() - Generate internal timings in decoder.
341  * @decoder:    Decoder to be converted to internal timings.
342  * @reg_timings: Timing register values.
343  * @clock_hz:   IR clock rate in Hz.
344  *
345  * Fills out the repeat timings and timing register values for a specific clock
346  * rate.
347  */
348 static void img_ir_decoder_convert(const struct img_ir_decoder *decoder,
349                                    struct img_ir_reg_timings *reg_timings,
350                                    unsigned int clock_hz)
351 {
352         /* calculate control value */
353         reg_timings->ctrl = img_ir_control(&decoder->control);
354
355         /* fill in implicit fields and calculate register values */
356         img_ir_timings_convert(&reg_timings->timings, &decoder->timings,
357                                decoder->tolerance, clock_hz);
358
359         /* do the same for repeat timings if applicable */
360         if (decoder->repeat)
361                 img_ir_timings_convert(&reg_timings->rtimings,
362                                        &decoder->rtimings, decoder->tolerance,
363                                        clock_hz);
364 }
365
366 /**
367  * img_ir_write_timings() - Write timings to the hardware now
368  * @priv:       IR private data
369  * @regs:       Timing register values to write
370  * @type:       RC filter type (RC_FILTER_*)
371  *
372  * Write timing register values @regs to the hardware, taking into account the
373  * current filter which may impose restrictions on the length of the expected
374  * data.
375  */
376 static void img_ir_write_timings(struct img_ir_priv *priv,
377                                  struct img_ir_timing_regvals *regs,
378                                  enum rc_filter_type type)
379 {
380         struct img_ir_priv_hw *hw = &priv->hw;
381
382         /* filter may be more restrictive to minlen, maxlen */
383         u32 ft = regs->ft;
384         if (hw->flags & BIT(type))
385                 ft = img_ir_free_timing_dynamic(regs->ft, &hw->filters[type]);
386         /* write to registers */
387         img_ir_write(priv, IMG_IR_LEAD_SYMB_TIMING, regs->ldr);
388         img_ir_write(priv, IMG_IR_S00_SYMB_TIMING, regs->s00);
389         img_ir_write(priv, IMG_IR_S01_SYMB_TIMING, regs->s01);
390         img_ir_write(priv, IMG_IR_S10_SYMB_TIMING, regs->s10);
391         img_ir_write(priv, IMG_IR_S11_SYMB_TIMING, regs->s11);
392         img_ir_write(priv, IMG_IR_FREE_SYMB_TIMING, ft);
393         dev_dbg(priv->dev, "timings: ldr=%#x, s=[%#x, %#x, %#x, %#x], ft=%#x\n",
394                 regs->ldr, regs->s00, regs->s01, regs->s10, regs->s11, ft);
395 }
396
397 static void img_ir_write_filter(struct img_ir_priv *priv,
398                                 struct img_ir_filter *filter)
399 {
400         if (filter) {
401                 dev_dbg(priv->dev, "IR filter=%016llx & %016llx\n",
402                         (unsigned long long)filter->data,
403                         (unsigned long long)filter->mask);
404                 img_ir_write(priv, IMG_IR_IRQ_MSG_DATA_LW, (u32)filter->data);
405                 img_ir_write(priv, IMG_IR_IRQ_MSG_DATA_UP, (u32)(filter->data
406                                                                         >> 32));
407                 img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_LW, (u32)filter->mask);
408                 img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_UP, (u32)(filter->mask
409                                                                         >> 32));
410         } else {
411                 dev_dbg(priv->dev, "IR clearing filter\n");
412                 img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_LW, 0);
413                 img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_UP, 0);
414         }
415 }
416
417 /* caller must have lock */
418 static void _img_ir_set_filter(struct img_ir_priv *priv,
419                                struct img_ir_filter *filter)
420 {
421         struct img_ir_priv_hw *hw = &priv->hw;
422         u32 irq_en, irq_on;
423
424         irq_en = img_ir_read(priv, IMG_IR_IRQ_ENABLE);
425         if (filter) {
426                 /* Only use the match interrupt */
427                 hw->filters[RC_FILTER_NORMAL] = *filter;
428                 hw->flags |= IMG_IR_F_FILTER;
429                 irq_on = IMG_IR_IRQ_DATA_MATCH;
430                 irq_en &= ~(IMG_IR_IRQ_DATA_VALID | IMG_IR_IRQ_DATA2_VALID);
431         } else {
432                 /* Only use the valid interrupt */
433                 hw->flags &= ~IMG_IR_F_FILTER;
434                 irq_en &= ~IMG_IR_IRQ_DATA_MATCH;
435                 irq_on = IMG_IR_IRQ_DATA_VALID | IMG_IR_IRQ_DATA2_VALID;
436         }
437         irq_en |= irq_on;
438
439         img_ir_write_filter(priv, filter);
440         /* clear any interrupts we're enabling so we don't handle old ones */
441         img_ir_write(priv, IMG_IR_IRQ_CLEAR, irq_on);
442         img_ir_write(priv, IMG_IR_IRQ_ENABLE, irq_en);
443 }
444
445 /* caller must have lock */
446 static void _img_ir_set_wake_filter(struct img_ir_priv *priv,
447                                     struct img_ir_filter *filter)
448 {
449         struct img_ir_priv_hw *hw = &priv->hw;
450         if (filter) {
451                 /* Enable wake, and copy filter for later */
452                 hw->filters[RC_FILTER_WAKEUP] = *filter;
453                 hw->flags |= IMG_IR_F_WAKE;
454         } else {
455                 /* Disable wake */
456                 hw->flags &= ~IMG_IR_F_WAKE;
457         }
458 }
459
460 /* Callback for setting scancode filter */
461 static int img_ir_set_filter(struct rc_dev *dev, enum rc_filter_type type,
462                              struct rc_scancode_filter *sc_filter)
463 {
464         struct img_ir_priv *priv = dev->priv;
465         struct img_ir_priv_hw *hw = &priv->hw;
466         struct img_ir_filter filter, *filter_ptr = &filter;
467         int ret = 0;
468
469         dev_dbg(priv->dev, "IR scancode %sfilter=%08x & %08x\n",
470                 type == RC_FILTER_WAKEUP ? "wake " : "",
471                 sc_filter->data,
472                 sc_filter->mask);
473
474         spin_lock_irq(&priv->lock);
475
476         /* filtering can always be disabled */
477         if (!sc_filter->mask) {
478                 filter_ptr = NULL;
479                 goto set_unlock;
480         }
481
482         /* current decoder must support scancode filtering */
483         if (!hw->decoder || !hw->decoder->filter) {
484                 ret = -EINVAL;
485                 goto unlock;
486         }
487
488         /* convert scancode filter to raw filter */
489         filter.minlen = 0;
490         filter.maxlen = ~0;
491         if (type == RC_FILTER_NORMAL) {
492                 /* guess scancode from protocol */
493                 ret = hw->decoder->filter(sc_filter, &filter,
494                                           dev->enabled_protocols);
495         } else {
496                 /* for wakeup user provided exact protocol variant */
497                 ret = hw->decoder->filter(sc_filter, &filter,
498                                           1ULL << dev->wakeup_protocol);
499         }
500         if (ret)
501                 goto unlock;
502         dev_dbg(priv->dev, "IR raw %sfilter=%016llx & %016llx\n",
503                 type == RC_FILTER_WAKEUP ? "wake " : "",
504                 (unsigned long long)filter.data,
505                 (unsigned long long)filter.mask);
506
507 set_unlock:
508         /* apply raw filters */
509         switch (type) {
510         case RC_FILTER_NORMAL:
511                 _img_ir_set_filter(priv, filter_ptr);
512                 break;
513         case RC_FILTER_WAKEUP:
514                 _img_ir_set_wake_filter(priv, filter_ptr);
515                 break;
516         default:
517                 ret = -EINVAL;
518         }
519
520 unlock:
521         spin_unlock_irq(&priv->lock);
522         return ret;
523 }
524
525 static int img_ir_set_normal_filter(struct rc_dev *dev,
526                                     struct rc_scancode_filter *sc_filter)
527 {
528         return img_ir_set_filter(dev, RC_FILTER_NORMAL, sc_filter);
529 }
530
531 static int img_ir_set_wakeup_filter(struct rc_dev *dev,
532                                     struct rc_scancode_filter *sc_filter)
533 {
534         return img_ir_set_filter(dev, RC_FILTER_WAKEUP, sc_filter);
535 }
536
537 /**
538  * img_ir_set_decoder() - Set the current decoder.
539  * @priv:       IR private data.
540  * @decoder:    Decoder to use with immediate effect.
541  * @proto:      Protocol bitmap (or 0 to use decoder->type).
542  */
543 static void img_ir_set_decoder(struct img_ir_priv *priv,
544                                const struct img_ir_decoder *decoder,
545                                u64 proto)
546 {
547         struct img_ir_priv_hw *hw = &priv->hw;
548         struct rc_dev *rdev = hw->rdev;
549         u32 ir_status, irq_en;
550         spin_lock_irq(&priv->lock);
551
552         /*
553          * First record that the protocol is being stopped so that the end timer
554          * isn't restarted while we're trying to stop it.
555          */
556         hw->stopping = true;
557
558         /*
559          * Release the lock to stop the end timer, since the end timer handler
560          * acquires the lock and we don't want to deadlock waiting for it.
561          */
562         spin_unlock_irq(&priv->lock);
563         del_timer_sync(&hw->end_timer);
564         del_timer_sync(&hw->suspend_timer);
565         spin_lock_irq(&priv->lock);
566
567         hw->stopping = false;
568
569         /* switch off and disable interrupts */
570         img_ir_write(priv, IMG_IR_CONTROL, 0);
571         irq_en = img_ir_read(priv, IMG_IR_IRQ_ENABLE);
572         img_ir_write(priv, IMG_IR_IRQ_ENABLE, irq_en & IMG_IR_IRQ_EDGE);
573         img_ir_write(priv, IMG_IR_IRQ_CLEAR, IMG_IR_IRQ_ALL & ~IMG_IR_IRQ_EDGE);
574
575         /* ack any data already detected */
576         ir_status = img_ir_read(priv, IMG_IR_STATUS);
577         if (ir_status & (IMG_IR_RXDVAL | IMG_IR_RXDVALD2)) {
578                 ir_status &= ~(IMG_IR_RXDVAL | IMG_IR_RXDVALD2);
579                 img_ir_write(priv, IMG_IR_STATUS, ir_status);
580         }
581
582         /* always read data to clear buffer if IR wakes the device */
583         img_ir_read(priv, IMG_IR_DATA_LW);
584         img_ir_read(priv, IMG_IR_DATA_UP);
585
586         /* switch back to normal mode */
587         hw->mode = IMG_IR_M_NORMAL;
588
589         /* clear the wakeup scancode filter */
590         rdev->scancode_wakeup_filter.data = 0;
591         rdev->scancode_wakeup_filter.mask = 0;
592         rdev->wakeup_protocol = RC_PROTO_UNKNOWN;
593
594         /* clear raw filters */
595         _img_ir_set_filter(priv, NULL);
596         _img_ir_set_wake_filter(priv, NULL);
597
598         /* clear the enabled protocols */
599         hw->enabled_protocols = 0;
600
601         /* switch decoder */
602         hw->decoder = decoder;
603         if (!decoder)
604                 goto unlock;
605
606         /* set the enabled protocols */
607         if (!proto)
608                 proto = decoder->type;
609         hw->enabled_protocols = proto;
610
611         /* write the new timings */
612         img_ir_decoder_convert(decoder, &hw->reg_timings, hw->clk_hz);
613         img_ir_write_timings(priv, &hw->reg_timings.timings, RC_FILTER_NORMAL);
614
615         /* set up and enable */
616         img_ir_write(priv, IMG_IR_CONTROL, hw->reg_timings.ctrl);
617
618
619 unlock:
620         spin_unlock_irq(&priv->lock);
621 }
622
623 /**
624  * img_ir_decoder_compatable() - Find whether a decoder will work with a device.
625  * @priv:       IR private data.
626  * @dec:        Decoder to check.
627  *
628  * Returns:     true if @dec is compatible with the device @priv refers to.
629  */
630 static bool img_ir_decoder_compatible(struct img_ir_priv *priv,
631                                       const struct img_ir_decoder *dec)
632 {
633         unsigned int ct;
634
635         /* don't accept decoders using code types which aren't supported */
636         ct = dec->control.code_type;
637         if (priv->hw.ct_quirks[ct] & IMG_IR_QUIRK_CODE_BROKEN)
638                 return false;
639
640         return true;
641 }
642
643 /**
644  * img_ir_allowed_protos() - Get allowed protocols from global decoder list.
645  * @priv:       IR private data.
646  *
647  * Returns:     Mask of protocols supported by the device @priv refers to.
648  */
649 static u64 img_ir_allowed_protos(struct img_ir_priv *priv)
650 {
651         u64 protos = 0;
652         struct img_ir_decoder **decp;
653
654         for (decp = img_ir_decoders; *decp; ++decp) {
655                 const struct img_ir_decoder *dec = *decp;
656                 if (img_ir_decoder_compatible(priv, dec))
657                         protos |= dec->type;
658         }
659         return protos;
660 }
661
662 /* Callback for changing protocol using sysfs */
663 static int img_ir_change_protocol(struct rc_dev *dev, u64 *ir_type)
664 {
665         struct img_ir_priv *priv = dev->priv;
666         struct img_ir_priv_hw *hw = &priv->hw;
667         struct rc_dev *rdev = hw->rdev;
668         struct img_ir_decoder **decp;
669         u64 wakeup_protocols;
670
671         if (!*ir_type) {
672                 /* disable all protocols */
673                 img_ir_set_decoder(priv, NULL, 0);
674                 goto success;
675         }
676         for (decp = img_ir_decoders; *decp; ++decp) {
677                 const struct img_ir_decoder *dec = *decp;
678                 if (!img_ir_decoder_compatible(priv, dec))
679                         continue;
680                 if (*ir_type & dec->type) {
681                         *ir_type &= dec->type;
682                         img_ir_set_decoder(priv, dec, *ir_type);
683                         goto success;
684                 }
685         }
686         return -EINVAL;
687
688 success:
689         /*
690          * Only allow matching wakeup protocols for now, and only if filtering
691          * is supported.
692          */
693         wakeup_protocols = *ir_type;
694         if (!hw->decoder || !hw->decoder->filter)
695                 wakeup_protocols = 0;
696         rdev->allowed_wakeup_protocols = wakeup_protocols;
697         return 0;
698 }
699
700 /* Changes ir-core protocol device attribute */
701 static void img_ir_set_protocol(struct img_ir_priv *priv, u64 proto)
702 {
703         struct rc_dev *rdev = priv->hw.rdev;
704
705         mutex_lock(&rdev->lock);
706         rdev->enabled_protocols = proto;
707         rdev->allowed_wakeup_protocols = proto;
708         mutex_unlock(&rdev->lock);
709 }
710
711 /* Set up IR decoders */
712 static void img_ir_init_decoders(void)
713 {
714         struct img_ir_decoder **decp;
715
716         spin_lock(&img_ir_decoders_lock);
717         if (!img_ir_decoders_preprocessed) {
718                 for (decp = img_ir_decoders; *decp; ++decp)
719                         img_ir_decoder_preprocess(*decp);
720                 img_ir_decoders_preprocessed = true;
721         }
722         spin_unlock(&img_ir_decoders_lock);
723 }
724
725 #ifdef CONFIG_PM_SLEEP
726 /**
727  * img_ir_enable_wake() - Switch to wake mode.
728  * @priv:       IR private data.
729  *
730  * Returns:     non-zero if the IR can wake the system.
731  */
732 static int img_ir_enable_wake(struct img_ir_priv *priv)
733 {
734         struct img_ir_priv_hw *hw = &priv->hw;
735         int ret = 0;
736
737         spin_lock_irq(&priv->lock);
738         if (hw->flags & IMG_IR_F_WAKE) {
739                 /* interrupt only on a match */
740                 hw->suspend_irqen = img_ir_read(priv, IMG_IR_IRQ_ENABLE);
741                 img_ir_write(priv, IMG_IR_IRQ_ENABLE, IMG_IR_IRQ_DATA_MATCH);
742                 img_ir_write_filter(priv, &hw->filters[RC_FILTER_WAKEUP]);
743                 img_ir_write_timings(priv, &hw->reg_timings.timings,
744                                      RC_FILTER_WAKEUP);
745                 hw->mode = IMG_IR_M_WAKE;
746                 ret = 1;
747         }
748         spin_unlock_irq(&priv->lock);
749         return ret;
750 }
751
752 /**
753  * img_ir_disable_wake() - Switch out of wake mode.
754  * @priv:       IR private data
755  *
756  * Returns:     1 if the hardware should be allowed to wake from a sleep state.
757  *              0 otherwise.
758  */
759 static int img_ir_disable_wake(struct img_ir_priv *priv)
760 {
761         struct img_ir_priv_hw *hw = &priv->hw;
762         int ret = 0;
763
764         spin_lock_irq(&priv->lock);
765         if (hw->flags & IMG_IR_F_WAKE) {
766                 /* restore normal filtering */
767                 if (hw->flags & IMG_IR_F_FILTER) {
768                         img_ir_write(priv, IMG_IR_IRQ_ENABLE,
769                                      (hw->suspend_irqen & IMG_IR_IRQ_EDGE) |
770                                      IMG_IR_IRQ_DATA_MATCH);
771                         img_ir_write_filter(priv,
772                                             &hw->filters[RC_FILTER_NORMAL]);
773                 } else {
774                         img_ir_write(priv, IMG_IR_IRQ_ENABLE,
775                                      (hw->suspend_irqen & IMG_IR_IRQ_EDGE) |
776                                      IMG_IR_IRQ_DATA_VALID |
777                                      IMG_IR_IRQ_DATA2_VALID);
778                         img_ir_write_filter(priv, NULL);
779                 }
780                 img_ir_write_timings(priv, &hw->reg_timings.timings,
781                                      RC_FILTER_NORMAL);
782                 hw->mode = IMG_IR_M_NORMAL;
783                 ret = 1;
784         }
785         spin_unlock_irq(&priv->lock);
786         return ret;
787 }
788 #endif /* CONFIG_PM_SLEEP */
789
790 /* lock must be held */
791 static void img_ir_begin_repeat(struct img_ir_priv *priv)
792 {
793         struct img_ir_priv_hw *hw = &priv->hw;
794         if (hw->mode == IMG_IR_M_NORMAL) {
795                 /* switch to repeat timings */
796                 img_ir_write(priv, IMG_IR_CONTROL, 0);
797                 hw->mode = IMG_IR_M_REPEATING;
798                 img_ir_write_timings(priv, &hw->reg_timings.rtimings,
799                                      RC_FILTER_NORMAL);
800                 img_ir_write(priv, IMG_IR_CONTROL, hw->reg_timings.ctrl);
801         }
802 }
803
804 /* lock must be held */
805 static void img_ir_end_repeat(struct img_ir_priv *priv)
806 {
807         struct img_ir_priv_hw *hw = &priv->hw;
808         if (hw->mode == IMG_IR_M_REPEATING) {
809                 /* switch to normal timings */
810                 img_ir_write(priv, IMG_IR_CONTROL, 0);
811                 hw->mode = IMG_IR_M_NORMAL;
812                 img_ir_write_timings(priv, &hw->reg_timings.timings,
813                                      RC_FILTER_NORMAL);
814                 img_ir_write(priv, IMG_IR_CONTROL, hw->reg_timings.ctrl);
815         }
816 }
817
818 /* lock must be held */
819 static void img_ir_handle_data(struct img_ir_priv *priv, u32 len, u64 raw)
820 {
821         struct img_ir_priv_hw *hw = &priv->hw;
822         const struct img_ir_decoder *dec = hw->decoder;
823         int ret = IMG_IR_SCANCODE;
824         struct img_ir_scancode_req request;
825
826         request.protocol = RC_PROTO_UNKNOWN;
827         request.toggle   = 0;
828
829         if (dec->scancode)
830                 ret = dec->scancode(len, raw, hw->enabled_protocols, &request);
831         else if (len >= 32)
832                 request.scancode = (u32)raw;
833         else if (len < 32)
834                 request.scancode = (u32)raw & ((1 << len)-1);
835         dev_dbg(priv->dev, "data (%u bits) = %#llx\n",
836                 len, (unsigned long long)raw);
837         if (ret == IMG_IR_SCANCODE) {
838                 dev_dbg(priv->dev, "decoded scan code %#x, toggle %u\n",
839                         request.scancode, request.toggle);
840                 rc_keydown(hw->rdev, request.protocol, request.scancode,
841                            request.toggle);
842                 img_ir_end_repeat(priv);
843         } else if (ret == IMG_IR_REPEATCODE) {
844                 if (hw->mode == IMG_IR_M_REPEATING) {
845                         dev_dbg(priv->dev, "decoded repeat code\n");
846                         rc_repeat(hw->rdev);
847                 } else {
848                         dev_dbg(priv->dev, "decoded unexpected repeat code, ignoring\n");
849                 }
850         } else {
851                 dev_dbg(priv->dev, "decode failed (%d)\n", ret);
852                 return;
853         }
854
855
856         /* we mustn't update the end timer while trying to stop it */
857         if (dec->repeat && !hw->stopping) {
858                 unsigned long interval;
859
860                 img_ir_begin_repeat(priv);
861
862                 /* update timer, but allowing for 1/8th tolerance */
863                 interval = dec->repeat + (dec->repeat >> 3);
864                 mod_timer(&hw->end_timer,
865                           jiffies + msecs_to_jiffies(interval));
866         }
867 }
868
869 /* timer function to end waiting for repeat. */
870 static void img_ir_end_timer(struct timer_list *t)
871 {
872         struct img_ir_priv *priv = from_timer(priv, t, hw.end_timer);
873
874         spin_lock_irq(&priv->lock);
875         img_ir_end_repeat(priv);
876         spin_unlock_irq(&priv->lock);
877 }
878
879 /*
880  * Timer function to re-enable the current protocol after it had been
881  * cleared when invalid interrupts were generated due to a quirk in the
882  * img-ir decoder.
883  */
884 static void img_ir_suspend_timer(struct timer_list *t)
885 {
886         struct img_ir_priv *priv = from_timer(priv, t, hw.suspend_timer);
887
888         spin_lock_irq(&priv->lock);
889         /*
890          * Don't overwrite enabled valid/match IRQs if they have already been
891          * changed by e.g. a filter change.
892          */
893         if ((priv->hw.quirk_suspend_irq & IMG_IR_IRQ_EDGE) ==
894                                 img_ir_read(priv, IMG_IR_IRQ_ENABLE))
895                 img_ir_write(priv, IMG_IR_IRQ_ENABLE,
896                                         priv->hw.quirk_suspend_irq);
897         /* enable */
898         img_ir_write(priv, IMG_IR_CONTROL, priv->hw.reg_timings.ctrl);
899         spin_unlock_irq(&priv->lock);
900 }
901
902 #ifdef CONFIG_COMMON_CLK
903 static void img_ir_change_frequency(struct img_ir_priv *priv,
904                                     struct clk_notifier_data *change)
905 {
906         struct img_ir_priv_hw *hw = &priv->hw;
907
908         dev_dbg(priv->dev, "clk changed %lu HZ -> %lu HZ\n",
909                 change->old_rate, change->new_rate);
910
911         spin_lock_irq(&priv->lock);
912         if (hw->clk_hz == change->new_rate)
913                 goto unlock;
914         hw->clk_hz = change->new_rate;
915         /* refresh current timings */
916         if (hw->decoder) {
917                 img_ir_decoder_convert(hw->decoder, &hw->reg_timings,
918                                        hw->clk_hz);
919                 switch (hw->mode) {
920                 case IMG_IR_M_NORMAL:
921                         img_ir_write_timings(priv, &hw->reg_timings.timings,
922                                              RC_FILTER_NORMAL);
923                         break;
924                 case IMG_IR_M_REPEATING:
925                         img_ir_write_timings(priv, &hw->reg_timings.rtimings,
926                                              RC_FILTER_NORMAL);
927                         break;
928 #ifdef CONFIG_PM_SLEEP
929                 case IMG_IR_M_WAKE:
930                         img_ir_write_timings(priv, &hw->reg_timings.timings,
931                                              RC_FILTER_WAKEUP);
932                         break;
933 #endif
934                 }
935         }
936 unlock:
937         spin_unlock_irq(&priv->lock);
938 }
939
940 static int img_ir_clk_notify(struct notifier_block *self, unsigned long action,
941                              void *data)
942 {
943         struct img_ir_priv *priv = container_of(self, struct img_ir_priv,
944                                                 hw.clk_nb);
945         switch (action) {
946         case POST_RATE_CHANGE:
947                 img_ir_change_frequency(priv, data);
948                 break;
949         default:
950                 break;
951         }
952         return NOTIFY_OK;
953 }
954 #endif /* CONFIG_COMMON_CLK */
955
956 /* called with priv->lock held */
957 void img_ir_isr_hw(struct img_ir_priv *priv, u32 irq_status)
958 {
959         struct img_ir_priv_hw *hw = &priv->hw;
960         u32 ir_status, len, lw, up;
961         unsigned int ct;
962
963         /* use the current decoder */
964         if (!hw->decoder)
965                 return;
966
967         ct = hw->decoder->control.code_type;
968
969         ir_status = img_ir_read(priv, IMG_IR_STATUS);
970         if (!(ir_status & (IMG_IR_RXDVAL | IMG_IR_RXDVALD2))) {
971                 if (!(priv->hw.ct_quirks[ct] & IMG_IR_QUIRK_CODE_IRQ) ||
972                                 hw->stopping)
973                         return;
974                 /*
975                  * The below functionality is added as a work around to stop
976                  * multiple Interrupts generated when an incomplete IR code is
977                  * received by the decoder.
978                  * The decoder generates rapid interrupts without actually
979                  * having received any new data. After a single interrupt it's
980                  * expected to clear up, but instead multiple interrupts are
981                  * rapidly generated. only way to get out of this loop is to
982                  * reset the control register after a short delay.
983                  */
984                 img_ir_write(priv, IMG_IR_CONTROL, 0);
985                 hw->quirk_suspend_irq = img_ir_read(priv, IMG_IR_IRQ_ENABLE);
986                 img_ir_write(priv, IMG_IR_IRQ_ENABLE,
987                              hw->quirk_suspend_irq & IMG_IR_IRQ_EDGE);
988
989                 /* Timer activated to re-enable the protocol. */
990                 mod_timer(&hw->suspend_timer,
991                           jiffies + msecs_to_jiffies(5));
992                 return;
993         }
994         ir_status &= ~(IMG_IR_RXDVAL | IMG_IR_RXDVALD2);
995         img_ir_write(priv, IMG_IR_STATUS, ir_status);
996
997         len = (ir_status & IMG_IR_RXDLEN) >> IMG_IR_RXDLEN_SHIFT;
998         /* some versions report wrong length for certain code types */
999         if (hw->ct_quirks[ct] & IMG_IR_QUIRK_CODE_LEN_INCR)
1000                 ++len;
1001
1002         lw = img_ir_read(priv, IMG_IR_DATA_LW);
1003         up = img_ir_read(priv, IMG_IR_DATA_UP);
1004         img_ir_handle_data(priv, len, (u64)up << 32 | lw);
1005 }
1006
1007 void img_ir_setup_hw(struct img_ir_priv *priv)
1008 {
1009         struct img_ir_decoder **decp;
1010
1011         if (!priv->hw.rdev)
1012                 return;
1013
1014         /* Use the first available decoder (or disable stuff if NULL) */
1015         for (decp = img_ir_decoders; *decp; ++decp) {
1016                 const struct img_ir_decoder *dec = *decp;
1017                 if (img_ir_decoder_compatible(priv, dec)) {
1018                         img_ir_set_protocol(priv, dec->type);
1019                         img_ir_set_decoder(priv, dec, 0);
1020                         return;
1021                 }
1022         }
1023         img_ir_set_decoder(priv, NULL, 0);
1024 }
1025
1026 /**
1027  * img_ir_probe_hw_caps() - Probe capabilities of the hardware.
1028  * @priv:       IR private data.
1029  */
1030 static void img_ir_probe_hw_caps(struct img_ir_priv *priv)
1031 {
1032         struct img_ir_priv_hw *hw = &priv->hw;
1033         /*
1034          * When a version of the block becomes available without these quirks,
1035          * they'll have to depend on the core revision.
1036          */
1037         hw->ct_quirks[IMG_IR_CODETYPE_PULSELEN]
1038                 |= IMG_IR_QUIRK_CODE_LEN_INCR;
1039         hw->ct_quirks[IMG_IR_CODETYPE_BIPHASE]
1040                 |= IMG_IR_QUIRK_CODE_IRQ;
1041         hw->ct_quirks[IMG_IR_CODETYPE_2BITPULSEPOS]
1042                 |= IMG_IR_QUIRK_CODE_BROKEN;
1043 }
1044
1045 int img_ir_probe_hw(struct img_ir_priv *priv)
1046 {
1047         struct img_ir_priv_hw *hw = &priv->hw;
1048         struct rc_dev *rdev;
1049         int error;
1050
1051         /* Ensure hardware decoders have been preprocessed */
1052         img_ir_init_decoders();
1053
1054         /* Probe hardware capabilities */
1055         img_ir_probe_hw_caps(priv);
1056
1057         /* Set up the end timer */
1058         timer_setup(&hw->end_timer, img_ir_end_timer, 0);
1059         timer_setup(&hw->suspend_timer, img_ir_suspend_timer, 0);
1060
1061         /* Register a clock notifier */
1062         if (!IS_ERR(priv->clk)) {
1063                 hw->clk_hz = clk_get_rate(priv->clk);
1064 #ifdef CONFIG_COMMON_CLK
1065                 hw->clk_nb.notifier_call = img_ir_clk_notify;
1066                 error = clk_notifier_register(priv->clk, &hw->clk_nb);
1067                 if (error)
1068                         dev_warn(priv->dev,
1069                                  "failed to register clock notifier\n");
1070 #endif
1071         } else {
1072                 hw->clk_hz = 32768;
1073         }
1074
1075         /* Allocate hardware decoder */
1076         hw->rdev = rdev = rc_allocate_device(RC_DRIVER_SCANCODE);
1077         if (!rdev) {
1078                 dev_err(priv->dev, "cannot allocate input device\n");
1079                 error = -ENOMEM;
1080                 goto err_alloc_rc;
1081         }
1082         rdev->priv = priv;
1083         rdev->map_name = RC_MAP_EMPTY;
1084         rdev->allowed_protocols = img_ir_allowed_protos(priv);
1085         rdev->device_name = "IMG Infrared Decoder";
1086         rdev->s_filter = img_ir_set_normal_filter;
1087         rdev->s_wakeup_filter = img_ir_set_wakeup_filter;
1088
1089         /* Register hardware decoder */
1090         error = rc_register_device(rdev);
1091         if (error) {
1092                 dev_err(priv->dev, "failed to register IR input device\n");
1093                 goto err_register_rc;
1094         }
1095
1096         /*
1097          * Set this after rc_register_device as no protocols have been
1098          * registered yet.
1099          */
1100         rdev->change_protocol = img_ir_change_protocol;
1101
1102         device_init_wakeup(priv->dev, 1);
1103
1104         return 0;
1105
1106 err_register_rc:
1107         img_ir_set_decoder(priv, NULL, 0);
1108         hw->rdev = NULL;
1109         rc_free_device(rdev);
1110 err_alloc_rc:
1111 #ifdef CONFIG_COMMON_CLK
1112         if (!IS_ERR(priv->clk))
1113                 clk_notifier_unregister(priv->clk, &hw->clk_nb);
1114 #endif
1115         return error;
1116 }
1117
1118 void img_ir_remove_hw(struct img_ir_priv *priv)
1119 {
1120         struct img_ir_priv_hw *hw = &priv->hw;
1121         struct rc_dev *rdev = hw->rdev;
1122         if (!rdev)
1123                 return;
1124         img_ir_set_decoder(priv, NULL, 0);
1125         hw->rdev = NULL;
1126         rc_unregister_device(rdev);
1127 #ifdef CONFIG_COMMON_CLK
1128         if (!IS_ERR(priv->clk))
1129                 clk_notifier_unregister(priv->clk, &hw->clk_nb);
1130 #endif
1131 }
1132
1133 #ifdef CONFIG_PM_SLEEP
1134 int img_ir_suspend(struct device *dev)
1135 {
1136         struct img_ir_priv *priv = dev_get_drvdata(dev);
1137
1138         if (device_may_wakeup(dev) && img_ir_enable_wake(priv))
1139                 enable_irq_wake(priv->irq);
1140         return 0;
1141 }
1142
1143 int img_ir_resume(struct device *dev)
1144 {
1145         struct img_ir_priv *priv = dev_get_drvdata(dev);
1146
1147         if (device_may_wakeup(dev) && img_ir_disable_wake(priv))
1148                 disable_irq_wake(priv->irq);
1149         return 0;
1150 }
1151 #endif  /* CONFIG_PM_SLEEP */