drivers/media/platform/omap3isp/isppreview.c

   1 /*
   2  * isppreview.c
   3  *
   4  * TI OMAP3 ISP driver - Preview module
   5  *
   6  * Copyright (C) 2010 Nokia Corporation
   7  * Copyright (C) 2009 Texas Instruments, Inc.
   8  *
   9  * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  10  *           Sakari Ailus <sakari.ailus@iki.fi>
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License version 2 as
  14  * published by the Free Software Foundation.
  15  *
  16  * This program is distributed in the hope that it will be useful, but
  17  * WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  19  * General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  24  * 02110-1301 USA
  25  */
  26
  27 #include <linux/device.h>
  28 #include <linux/mm.h>
  29 #include <linux/module.h>
  30 #include <linux/mutex.h>
  31 #include <linux/uaccess.h>
  32
  33 #include "isp.h"
  34 #include "ispreg.h"
  35 #include "isppreview.h"
  36
  37 /* Default values in Office Fluorescent Light for RGBtoRGB Blending */
  38 static struct omap3isp_prev_rgbtorgb flr_rgb2rgb = {
  39         {       /* RGB-RGB Matrix */
  40                 {0x01E2, 0x0F30, 0x0FEE},
  41                 {0x0F9B, 0x01AC, 0x0FB9},
  42                 {0x0FE0, 0x0EC0, 0x0260}
  43         },      /* RGB Offset */
  44         {0x0000, 0x0000, 0x0000}
  45 };
  46
  47 /* Default values in Office Fluorescent Light for RGB to YUV Conversion*/
  48 static struct omap3isp_prev_csc flr_prev_csc = {
  49         {       /* CSC Coef Matrix */
  50                 {66, 129, 25},
  51                 {-38, -75, 112},
  52                 {112, -94 , -18}
  53         },      /* CSC Offset */
  54         {0x0, 0x0, 0x0}
  55 };
  56
  57 /* Default values in Office Fluorescent Light for CFA Gradient*/
  58 #define FLR_CFA_GRADTHRS_HORZ   0x28
  59 #define FLR_CFA_GRADTHRS_VERT   0x28
  60
  61 /* Default values in Office Fluorescent Light for Chroma Suppression*/
  62 #define FLR_CSUP_GAIN           0x0D
  63 #define FLR_CSUP_THRES          0xEB
  64
  65 /* Default values in Office Fluorescent Light for Noise Filter*/
  66 #define FLR_NF_STRGTH           0x03
  67
  68 /* Default values for White Balance */
  69 #define FLR_WBAL_DGAIN          0x100
  70 #define FLR_WBAL_COEF           0x20
  71
  72 /* Default values in Office Fluorescent Light for Black Adjustment*/
  73 #define FLR_BLKADJ_BLUE         0x0
  74 #define FLR_BLKADJ_GREEN        0x0
  75 #define FLR_BLKADJ_RED          0x0
  76
  77 #define DEF_DETECT_CORRECT_VAL  0xe
  78
  79 /*
  80  * Margins and image size limits.
  81  *
  82  * The preview engine crops several rows and columns internally depending on
  83  * which filters are enabled. To avoid format changes when the filters are
  84  * enabled or disabled (which would prevent them from being turned on or off
  85  * during streaming), the driver assumes all filters that can be configured
  86  * during streaming are enabled when computing sink crop and source format
  87  * limits.
  88  *
  89  * If a filter is disabled, additional cropping is automatically added at the
  90  * preview engine input by the driver to avoid overflow at line and frame end.
  91  * This is completely transparent for applications.
  92  *
  93  * Median filter                4 pixels
  94  * Noise filter,
  95  * Faulty pixels correction     4 pixels, 4 lines
  96  * Color suppression            2 pixels
  97  * or luma enhancement
  98  * -------------------------------------------------------------
  99  * Maximum total                10 pixels, 4 lines
 100  *
 101  * The color suppression and luma enhancement filters are applied after bayer to
 102  * YUV conversion. They thus can crop one pixel on the left and one pixel on the
 103  * right side of the image without changing the color pattern. When both those
 104  * filters are disabled, the driver must crop the two pixels on the same side of
 105  * the image to avoid changing the bayer pattern. The left margin is thus set to
 106  * 6 pixels and the right margin to 4 pixels.
 107  */
 108
 109 #define PREV_MARGIN_LEFT        6
 110 #define PREV_MARGIN_RIGHT       4
 111 #define PREV_MARGIN_TOP         2
 112 #define PREV_MARGIN_BOTTOM      2
 113
 114 #define PREV_MIN_IN_WIDTH       64
 115 #define PREV_MIN_IN_HEIGHT      8
 116 #define PREV_MAX_IN_HEIGHT      16384
 117
 118 #define PREV_MIN_OUT_WIDTH              0
 119 #define PREV_MIN_OUT_HEIGHT             0
 120 #define PREV_MAX_OUT_WIDTH_REV_1        1280
 121 #define PREV_MAX_OUT_WIDTH_REV_2        3300
 122 #define PREV_MAX_OUT_WIDTH_REV_15       4096
 123
 124 /*
 125  * Coefficient Tables for the submodules in Preview.
 126  * Array is initialised with the values from.the tables text file.
 127  */
 128
 129 /*
 130  * CFA Filter Coefficient Table
 131  *
 132  */
 133 static u32 cfa_coef_table[4][OMAP3ISP_PREV_CFA_BLK_SIZE] = {
 134 #include "cfa_coef_table.h"
 135 };
 136
 137 /*
 138  * Default Gamma Correction Table - All components
 139  */
 140 static u32 gamma_table[] = {
 141 #include "gamma_table.h"
 142 };
 143
 144 /*
 145  * Noise Filter Threshold table
 146  */
 147 static u32 noise_filter_table[] = {
 148 #include "noise_filter_table.h"
 149 };
 150
 151 /*
 152  * Luminance Enhancement Table
 153  */
 154 static u32 luma_enhance_table[] = {
 155 #include "luma_enhance_table.h"
 156 };
 157
 158 /*
 159  * preview_config_luma_enhancement - Configure the Luminance Enhancement table
 160  */
 161 static void
 162 preview_config_luma_enhancement(struct isp_prev_device *prev,
 163                                 const struct prev_params *params)
 164 {
 165         struct isp_device *isp = to_isp_device(prev);
 166         const struct omap3isp_prev_luma *yt = &params->luma;
 167         unsigned int i;
 168
 169         isp_reg_writel(isp, ISPPRV_YENH_TABLE_ADDR,
 170                        OMAP3_ISP_IOMEM_PREV, ISPPRV_SET_TBL_ADDR);
 171         for (i = 0; i < OMAP3ISP_PREV_YENH_TBL_SIZE; i++) {
 172                 isp_reg_writel(isp, yt->table[i],
 173                                OMAP3_ISP_IOMEM_PREV, ISPPRV_SET_TBL_DATA);
 174         }
 175 }
 176
 177 /*
 178  * preview_enable_luma_enhancement - Enable/disable Luminance Enhancement
 179  */
 180 static void
 181 preview_enable_luma_enhancement(struct isp_prev_device *prev, bool enable)
 182 {
 183         struct isp_device *isp = to_isp_device(prev);
 184
 185         if (enable)
 186                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 187                             ISPPRV_PCR_YNENHEN);
 188         else
 189                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 190                             ISPPRV_PCR_YNENHEN);
 191 }
 192
 193 /*
 194  * preview_enable_invalaw - Enable/disable Inverse A-Law decompression
 195  */
 196 static void preview_enable_invalaw(struct isp_prev_device *prev, bool enable)
 197 {
 198         struct isp_device *isp = to_isp_device(prev);
 199
 200         if (enable)
 201                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 202                             ISPPRV_PCR_INVALAW);
 203         else
 204                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 205                             ISPPRV_PCR_INVALAW);
 206 }
 207
 208 /*
 209  * preview_config_hmed - Configure the Horizontal Median Filter
 210  */
 211 static void preview_config_hmed(struct isp_prev_device *prev,
 212                                 const struct prev_params *params)
 213 {
 214         struct isp_device *isp = to_isp_device(prev);
 215         const struct omap3isp_prev_hmed *hmed = &params->hmed;
 216
 217         isp_reg_writel(isp, (hmed->odddist == 1 ? 0 : ISPPRV_HMED_ODDDIST) |
 218                        (hmed->evendist == 1 ? 0 : ISPPRV_HMED_EVENDIST) |
 219                        (hmed->thres << ISPPRV_HMED_THRESHOLD_SHIFT),
 220                        OMAP3_ISP_IOMEM_PREV, ISPPRV_HMED);
 221 }
 222
 223 /*
 224  * preview_enable_hmed - Enable/disable the Horizontal Median Filter
 225  */
 226 static void preview_enable_hmed(struct isp_prev_device *prev, bool enable)
 227 {
 228         struct isp_device *isp = to_isp_device(prev);
 229
 230         if (enable)
 231                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 232                             ISPPRV_PCR_HMEDEN);
 233         else
 234                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 235                             ISPPRV_PCR_HMEDEN);
 236 }
 237
 238 /*
 239  * preview_config_cfa - Configure CFA Interpolation for Bayer formats
 240  *
 241  * The CFA table is organised in four blocks, one per Bayer component. The
 242  * hardware expects blocks to follow the Bayer order of the input data, while
 243  * the driver stores the table in GRBG order in memory. The blocks need to be
 244  * reordered to support non-GRBG Bayer patterns.
 245  */
 246 static void preview_config_cfa(struct isp_prev_device *prev,
 247                                const struct prev_params *params)
 248 {
 249         static const unsigned int cfa_coef_order[4][4] = {
 250                 { 0, 1, 2, 3 }, /* GRBG */
 251                 { 1, 0, 3, 2 }, /* RGGB */
 252                 { 2, 3, 0, 1 }, /* BGGR */
 253                 { 3, 2, 1, 0 }, /* GBRG */
 254         };
 255         const unsigned int *order = cfa_coef_order[prev->params.cfa_order];
 256         const struct omap3isp_prev_cfa *cfa = &params->cfa;
 257         struct isp_device *isp = to_isp_device(prev);
 258         unsigned int i;
 259         unsigned int j;
 260
 261         isp_reg_writel(isp,
 262                 (cfa->gradthrs_vert << ISPPRV_CFA_GRADTH_VER_SHIFT) |
 263                 (cfa->gradthrs_horz << ISPPRV_CFA_GRADTH_HOR_SHIFT),
 264                 OMAP3_ISP_IOMEM_PREV, ISPPRV_CFA);
 265
 266         isp_reg_writel(isp, ISPPRV_CFA_TABLE_ADDR,
 267                        OMAP3_ISP_IOMEM_PREV, ISPPRV_SET_TBL_ADDR);
 268
 269         for (i = 0; i < 4; ++i) {
 270                 const __u32 *block = cfa->table[order[i]];
 271
 272                 for (j = 0; j < OMAP3ISP_PREV_CFA_BLK_SIZE; ++j)
 273                         isp_reg_writel(isp, block[j], OMAP3_ISP_IOMEM_PREV,
 274                                        ISPPRV_SET_TBL_DATA);
 275         }
 276 }
 277
 278 /*
 279  * preview_config_chroma_suppression - Configure Chroma Suppression
 280  */
 281 static void
 282 preview_config_chroma_suppression(struct isp_prev_device *prev,
 283                                   const struct prev_params *params)
 284 {
 285         struct isp_device *isp = to_isp_device(prev);
 286         const struct omap3isp_prev_csup *cs = &params->csup;
 287
 288         isp_reg_writel(isp,
 289                        cs->gain | (cs->thres << ISPPRV_CSUP_THRES_SHIFT) |
 290                        (cs->hypf_en << ISPPRV_CSUP_HPYF_SHIFT),
 291                        OMAP3_ISP_IOMEM_PREV, ISPPRV_CSUP);
 292 }
 293
 294 /*
 295  * preview_enable_chroma_suppression - Enable/disable Chrominance Suppression
 296  */
 297 static void
 298 preview_enable_chroma_suppression(struct isp_prev_device *prev, bool enable)
 299 {
 300         struct isp_device *isp = to_isp_device(prev);
 301
 302         if (enable)
 303                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 304                             ISPPRV_PCR_SUPEN);
 305         else
 306                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 307                             ISPPRV_PCR_SUPEN);
 308 }
 309
 310 /*
 311  * preview_config_whitebalance - Configure White Balance parameters
 312  *
 313  * Coefficient matrix always with default values.
 314  */
 315 static void
 316 preview_config_whitebalance(struct isp_prev_device *prev,
 317                             const struct prev_params *params)
 318 {
 319         struct isp_device *isp = to_isp_device(prev);
 320         const struct omap3isp_prev_wbal *wbal = &params->wbal;
 321         u32 val;
 322
 323         isp_reg_writel(isp, wbal->dgain, OMAP3_ISP_IOMEM_PREV, ISPPRV_WB_DGAIN);
 324
 325         val = wbal->coef0 << ISPPRV_WBGAIN_COEF0_SHIFT;
 326         val |= wbal->coef1 << ISPPRV_WBGAIN_COEF1_SHIFT;
 327         val |= wbal->coef2 << ISPPRV_WBGAIN_COEF2_SHIFT;
 328         val |= wbal->coef3 << ISPPRV_WBGAIN_COEF3_SHIFT;
 329         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_WBGAIN);
 330
 331         isp_reg_writel(isp,
 332                        ISPPRV_WBSEL_COEF0 << ISPPRV_WBSEL_N0_0_SHIFT |
 333                        ISPPRV_WBSEL_COEF1 << ISPPRV_WBSEL_N0_1_SHIFT |
 334                        ISPPRV_WBSEL_COEF0 << ISPPRV_WBSEL_N0_2_SHIFT |
 335                        ISPPRV_WBSEL_COEF1 << ISPPRV_WBSEL_N0_3_SHIFT |
 336                        ISPPRV_WBSEL_COEF2 << ISPPRV_WBSEL_N1_0_SHIFT |
 337                        ISPPRV_WBSEL_COEF3 << ISPPRV_WBSEL_N1_1_SHIFT |
 338                        ISPPRV_WBSEL_COEF2 << ISPPRV_WBSEL_N1_2_SHIFT |
 339                        ISPPRV_WBSEL_COEF3 << ISPPRV_WBSEL_N1_3_SHIFT |
 340                        ISPPRV_WBSEL_COEF0 << ISPPRV_WBSEL_N2_0_SHIFT |
 341                        ISPPRV_WBSEL_COEF1 << ISPPRV_WBSEL_N2_1_SHIFT |
 342                        ISPPRV_WBSEL_COEF0 << ISPPRV_WBSEL_N2_2_SHIFT |
 343                        ISPPRV_WBSEL_COEF1 << ISPPRV_WBSEL_N2_3_SHIFT |
 344                        ISPPRV_WBSEL_COEF2 << ISPPRV_WBSEL_N3_0_SHIFT |
 345                        ISPPRV_WBSEL_COEF3 << ISPPRV_WBSEL_N3_1_SHIFT |
 346                        ISPPRV_WBSEL_COEF2 << ISPPRV_WBSEL_N3_2_SHIFT |
 347                        ISPPRV_WBSEL_COEF3 << ISPPRV_WBSEL_N3_3_SHIFT,
 348                        OMAP3_ISP_IOMEM_PREV, ISPPRV_WBSEL);
 349 }
 350
 351 /*
 352  * preview_config_blkadj - Configure Black Adjustment
 353  */
 354 static void
 355 preview_config_blkadj(struct isp_prev_device *prev,
 356                       const struct prev_params *params)
 357 {
 358         struct isp_device *isp = to_isp_device(prev);
 359         const struct omap3isp_prev_blkadj *blkadj = &params->blkadj;
 360
 361         isp_reg_writel(isp, (blkadj->blue << ISPPRV_BLKADJOFF_B_SHIFT) |
 362                        (blkadj->green << ISPPRV_BLKADJOFF_G_SHIFT) |
 363                        (blkadj->red << ISPPRV_BLKADJOFF_R_SHIFT),
 364                        OMAP3_ISP_IOMEM_PREV, ISPPRV_BLKADJOFF);
 365 }
 366
 367 /*
 368  * preview_config_rgb_blending - Configure RGB-RGB Blending
 369  */
 370 static void
 371 preview_config_rgb_blending(struct isp_prev_device *prev,
 372                             const struct prev_params *params)
 373 {
 374         struct isp_device *isp = to_isp_device(prev);
 375         const struct omap3isp_prev_rgbtorgb *rgbrgb = &params->rgb2rgb;
 376         u32 val;
 377
 378         val = (rgbrgb->matrix[0][0] & 0xfff) << ISPPRV_RGB_MAT1_MTX_RR_SHIFT;
 379         val |= (rgbrgb->matrix[0][1] & 0xfff) << ISPPRV_RGB_MAT1_MTX_GR_SHIFT;
 380         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_RGB_MAT1);
 381
 382         val = (rgbrgb->matrix[0][2] & 0xfff) << ISPPRV_RGB_MAT2_MTX_BR_SHIFT;
 383         val |= (rgbrgb->matrix[1][0] & 0xfff) << ISPPRV_RGB_MAT2_MTX_RG_SHIFT;
 384         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_RGB_MAT2);
 385
 386         val = (rgbrgb->matrix[1][1] & 0xfff) << ISPPRV_RGB_MAT3_MTX_GG_SHIFT;
 387         val |= (rgbrgb->matrix[1][2] & 0xfff) << ISPPRV_RGB_MAT3_MTX_BG_SHIFT;
 388         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_RGB_MAT3);
 389
 390         val = (rgbrgb->matrix[2][0] & 0xfff) << ISPPRV_RGB_MAT4_MTX_RB_SHIFT;
 391         val |= (rgbrgb->matrix[2][1] & 0xfff) << ISPPRV_RGB_MAT4_MTX_GB_SHIFT;
 392         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_RGB_MAT4);
 393
 394         val = (rgbrgb->matrix[2][2] & 0xfff) << ISPPRV_RGB_MAT5_MTX_BB_SHIFT;
 395         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_RGB_MAT5);
 396
 397         val = (rgbrgb->offset[0] & 0x3ff) << ISPPRV_RGB_OFF1_MTX_OFFR_SHIFT;
 398         val |= (rgbrgb->offset[1] & 0x3ff) << ISPPRV_RGB_OFF1_MTX_OFFG_SHIFT;
 399         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_RGB_OFF1);
 400
 401         val = (rgbrgb->offset[2] & 0x3ff) << ISPPRV_RGB_OFF2_MTX_OFFB_SHIFT;
 402         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_RGB_OFF2);
 403 }
 404
 405 /*
 406  * preview_config_csc - Configure Color Space Conversion (RGB to YCbYCr)
 407  */
 408 static void
 409 preview_config_csc(struct isp_prev_device *prev,
 410                    const struct prev_params *params)
 411 {
 412         struct isp_device *isp = to_isp_device(prev);
 413         const struct omap3isp_prev_csc *csc = &params->csc;
 414         u32 val;
 415
 416         val = (csc->matrix[0][0] & 0x3ff) << ISPPRV_CSC0_RY_SHIFT;
 417         val |= (csc->matrix[0][1] & 0x3ff) << ISPPRV_CSC0_GY_SHIFT;
 418         val |= (csc->matrix[0][2] & 0x3ff) << ISPPRV_CSC0_BY_SHIFT;
 419         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_CSC0);
 420
 421         val = (csc->matrix[1][0] & 0x3ff) << ISPPRV_CSC1_RCB_SHIFT;
 422         val |= (csc->matrix[1][1] & 0x3ff) << ISPPRV_CSC1_GCB_SHIFT;
 423         val |= (csc->matrix[1][2] & 0x3ff) << ISPPRV_CSC1_BCB_SHIFT;
 424         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_CSC1);
 425
 426         val = (csc->matrix[2][0] & 0x3ff) << ISPPRV_CSC2_RCR_SHIFT;
 427         val |= (csc->matrix[2][1] & 0x3ff) << ISPPRV_CSC2_GCR_SHIFT;
 428         val |= (csc->matrix[2][2] & 0x3ff) << ISPPRV_CSC2_BCR_SHIFT;
 429         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_CSC2);
 430
 431         val = (csc->offset[0] & 0xff) << ISPPRV_CSC_OFFSET_Y_SHIFT;
 432         val |= (csc->offset[1] & 0xff) << ISPPRV_CSC_OFFSET_CB_SHIFT;
 433         val |= (csc->offset[2] & 0xff) << ISPPRV_CSC_OFFSET_CR_SHIFT;
 434         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_CSC_OFFSET);
 435 }
 436
 437 /*
 438  * preview_config_yc_range - Configure the max and min Y and C values
 439  */
 440 static void
 441 preview_config_yc_range(struct isp_prev_device *prev,
 442                         const struct prev_params *params)
 443 {
 444         struct isp_device *isp = to_isp_device(prev);
 445         const struct omap3isp_prev_yclimit *yc = &params->yclimit;
 446
 447         isp_reg_writel(isp,
 448                        yc->maxC << ISPPRV_SETUP_YC_MAXC_SHIFT |
 449                        yc->maxY << ISPPRV_SETUP_YC_MAXY_SHIFT |
 450                        yc->minC << ISPPRV_SETUP_YC_MINC_SHIFT |
 451                        yc->minY << ISPPRV_SETUP_YC_MINY_SHIFT,
 452                        OMAP3_ISP_IOMEM_PREV, ISPPRV_SETUP_YC);
 453 }
 454
 455 /*
 456  * preview_config_dcor - Configure Couplet Defect Correction
 457  */
 458 static void
 459 preview_config_dcor(struct isp_prev_device *prev,
 460                     const struct prev_params *params)
 461 {
 462         struct isp_device *isp = to_isp_device(prev);
 463         const struct omap3isp_prev_dcor *dcor = &params->dcor;
 464
 465         isp_reg_writel(isp, dcor->detect_correct[0],
 466                        OMAP3_ISP_IOMEM_PREV, ISPPRV_CDC_THR0);
 467         isp_reg_writel(isp, dcor->detect_correct[1],
 468                        OMAP3_ISP_IOMEM_PREV, ISPPRV_CDC_THR1);
 469         isp_reg_writel(isp, dcor->detect_correct[2],
 470                        OMAP3_ISP_IOMEM_PREV, ISPPRV_CDC_THR2);
 471         isp_reg_writel(isp, dcor->detect_correct[3],
 472                        OMAP3_ISP_IOMEM_PREV, ISPPRV_CDC_THR3);
 473         isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 474                         ISPPRV_PCR_DCCOUP,
 475                         dcor->couplet_mode_en ? ISPPRV_PCR_DCCOUP : 0);
 476 }
 477
 478 /*
 479  * preview_enable_dcor - Enable/disable Couplet Defect Correction
 480  */
 481 static void preview_enable_dcor(struct isp_prev_device *prev, bool enable)
 482 {
 483         struct isp_device *isp = to_isp_device(prev);
 484
 485         if (enable)
 486                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 487                             ISPPRV_PCR_DCOREN);
 488         else
 489                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 490                             ISPPRV_PCR_DCOREN);
 491 }
 492
 493 /*
 494  * preview_enable_drkframe_capture - Enable/disable Dark Frame Capture
 495  */
 496 static void
 497 preview_enable_drkframe_capture(struct isp_prev_device *prev, bool enable)
 498 {
 499         struct isp_device *isp = to_isp_device(prev);
 500
 501         if (enable)
 502                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 503                             ISPPRV_PCR_DRKFCAP);
 504         else
 505                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 506                             ISPPRV_PCR_DRKFCAP);
 507 }
 508
 509 /*
 510  * preview_enable_drkframe - Enable/disable Dark Frame Subtraction
 511  */
 512 static void preview_enable_drkframe(struct isp_prev_device *prev, bool enable)
 513 {
 514         struct isp_device *isp = to_isp_device(prev);
 515
 516         if (enable)
 517                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 518                             ISPPRV_PCR_DRKFEN);
 519         else
 520                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 521                             ISPPRV_PCR_DRKFEN);
 522 }
 523
 524 /*
 525  * preview_config_noisefilter - Configure the Noise Filter
 526  */
 527 static void
 528 preview_config_noisefilter(struct isp_prev_device *prev,
 529                            const struct prev_params *params)
 530 {
 531         struct isp_device *isp = to_isp_device(prev);
 532         const struct omap3isp_prev_nf *nf = &params->nf;
 533         unsigned int i;
 534
 535         isp_reg_writel(isp, nf->spread, OMAP3_ISP_IOMEM_PREV, ISPPRV_NF);
 536         isp_reg_writel(isp, ISPPRV_NF_TABLE_ADDR,
 537                        OMAP3_ISP_IOMEM_PREV, ISPPRV_SET_TBL_ADDR);
 538         for (i = 0; i < OMAP3ISP_PREV_NF_TBL_SIZE; i++) {
 539                 isp_reg_writel(isp, nf->table[i],
 540                                OMAP3_ISP_IOMEM_PREV, ISPPRV_SET_TBL_DATA);
 541         }
 542 }
 543
 544 /*
 545  * preview_enable_noisefilter - Enable/disable the Noise Filter
 546  */
 547 static void
 548 preview_enable_noisefilter(struct isp_prev_device *prev, bool enable)
 549 {
 550         struct isp_device *isp = to_isp_device(prev);
 551
 552         if (enable)
 553                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 554                             ISPPRV_PCR_NFEN);
 555         else
 556                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 557                             ISPPRV_PCR_NFEN);
 558 }
 559
 560 /*
 561  * preview_config_gammacorrn - Configure the Gamma Correction tables
 562  */
 563 static void
 564 preview_config_gammacorrn(struct isp_prev_device *prev,
 565                           const struct prev_params *params)
 566 {
 567         struct isp_device *isp = to_isp_device(prev);
 568         const struct omap3isp_prev_gtables *gt = &params->gamma;
 569         unsigned int i;
 570
 571         isp_reg_writel(isp, ISPPRV_REDGAMMA_TABLE_ADDR,
 572                        OMAP3_ISP_IOMEM_PREV, ISPPRV_SET_TBL_ADDR);
 573         for (i = 0; i < OMAP3ISP_PREV_GAMMA_TBL_SIZE; i++)
 574                 isp_reg_writel(isp, gt->red[i], OMAP3_ISP_IOMEM_PREV,
 575                                ISPPRV_SET_TBL_DATA);
 576
 577         isp_reg_writel(isp, ISPPRV_GREENGAMMA_TABLE_ADDR,
 578                        OMAP3_ISP_IOMEM_PREV, ISPPRV_SET_TBL_ADDR);
 579         for (i = 0; i < OMAP3ISP_PREV_GAMMA_TBL_SIZE; i++)
 580                 isp_reg_writel(isp, gt->green[i], OMAP3_ISP_IOMEM_PREV,
 581                                ISPPRV_SET_TBL_DATA);
 582
 583         isp_reg_writel(isp, ISPPRV_BLUEGAMMA_TABLE_ADDR,
 584                        OMAP3_ISP_IOMEM_PREV, ISPPRV_SET_TBL_ADDR);
 585         for (i = 0; i < OMAP3ISP_PREV_GAMMA_TBL_SIZE; i++)
 586                 isp_reg_writel(isp, gt->blue[i], OMAP3_ISP_IOMEM_PREV,
 587                                ISPPRV_SET_TBL_DATA);
 588 }
 589
 590 /*
 591  * preview_enable_gammacorrn - Enable/disable Gamma Correction
 592  *
 593  * When gamma correction is disabled, the module is bypassed and its output is
 594  * the 8 MSB of the 10-bit input .
 595  */
 596 static void
 597 preview_enable_gammacorrn(struct isp_prev_device *prev, bool enable)
 598 {
 599         struct isp_device *isp = to_isp_device(prev);
 600
 601         if (enable)
 602                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 603                             ISPPRV_PCR_GAMMA_BYPASS);
 604         else
 605                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 606                             ISPPRV_PCR_GAMMA_BYPASS);
 607 }
 608
 609 /*
 610  * preview_config_contrast - Configure the Contrast
 611  *
 612  * Value should be programmed before enabling the module.
 613  */
 614 static void
 615 preview_config_contrast(struct isp_prev_device *prev,
 616                         const struct prev_params *params)
 617 {
 618         struct isp_device *isp = to_isp_device(prev);
 619
 620         isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_CNT_BRT,
 621                         0xff << ISPPRV_CNT_BRT_CNT_SHIFT,
 622                         params->contrast << ISPPRV_CNT_BRT_CNT_SHIFT);
 623 }
 624
 625 /*
 626  * preview_config_brightness - Configure the Brightness
 627  */
 628 static void
 629 preview_config_brightness(struct isp_prev_device *prev,
 630                           const struct prev_params *params)
 631 {
 632         struct isp_device *isp = to_isp_device(prev);
 633
 634         isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_CNT_BRT,
 635                         0xff << ISPPRV_CNT_BRT_BRT_SHIFT,
 636                         params->brightness << ISPPRV_CNT_BRT_BRT_SHIFT);
 637 }
 638
 639 /*
 640  * preview_update_contrast - Updates the contrast.
 641  * @contrast: Pointer to hold the current programmed contrast value.
 642  *
 643  * Value should be programmed before enabling the module.
 644  */
 645 static void
 646 preview_update_contrast(struct isp_prev_device *prev, u8 contrast)
 647 {
 648         struct prev_params *params;
 649         unsigned long flags;
 650
 651         spin_lock_irqsave(&prev->params.lock, flags);
 652         params = (prev->params.active & OMAP3ISP_PREV_CONTRAST)
 653                ? &prev->params.params[0] : &prev->params.params[1];
 654
 655         if (params->contrast != (contrast * ISPPRV_CONTRAST_UNITS)) {
 656                 params->contrast = contrast * ISPPRV_CONTRAST_UNITS;
 657                 params->update |= OMAP3ISP_PREV_CONTRAST;
 658         }
 659         spin_unlock_irqrestore(&prev->params.lock, flags);
 660 }
 661
 662 /*
 663  * preview_update_brightness - Updates the brightness in preview module.
 664  * @brightness: Pointer to hold the current programmed brightness value.
 665  *
 666  */
 667 static void
 668 preview_update_brightness(struct isp_prev_device *prev, u8 brightness)
 669 {
 670         struct prev_params *params;
 671         unsigned long flags;
 672
 673         spin_lock_irqsave(&prev->params.lock, flags);
 674         params = (prev->params.active & OMAP3ISP_PREV_BRIGHTNESS)
 675                ? &prev->params.params[0] : &prev->params.params[1];
 676
 677         if (params->brightness != (brightness * ISPPRV_BRIGHT_UNITS)) {
 678                 params->brightness = brightness * ISPPRV_BRIGHT_UNITS;
 679                 params->update |= OMAP3ISP_PREV_BRIGHTNESS;
 680         }
 681         spin_unlock_irqrestore(&prev->params.lock, flags);
 682 }
 683
 684 static u32
 685 preview_params_lock(struct isp_prev_device *prev, u32 update, bool shadow)
 686 {
 687         u32 active = prev->params.active;
 688
 689         if (shadow) {
 690                 /* Mark all shadow parameters we are going to touch as busy. */
 691                 prev->params.params[0].busy |= ~active & update;
 692                 prev->params.params[1].busy |= active & update;
 693         } else {
 694                 /* Mark all active parameters we are going to touch as busy. */
 695                 update = (prev->params.params[0].update & active)
 696                        | (prev->params.params[1].update & ~active);
 697
 698                 prev->params.params[0].busy |= active & update;
 699                 prev->params.params[1].busy |= ~active & update;
 700         }
 701
 702         return update;
 703 }
 704
 705 static void
 706 preview_params_unlock(struct isp_prev_device *prev, u32 update, bool shadow)
 707 {
 708         u32 active = prev->params.active;
 709
 710         if (shadow) {
 711                 /* Set the update flag for shadow parameters that have been
 712                  * updated and clear the busy flag for all shadow parameters.
 713                  */
 714                 prev->params.params[0].update |= (~active & update);
 715                 prev->params.params[1].update |= (active & update);
 716                 prev->params.params[0].busy &= active;
 717                 prev->params.params[1].busy &= ~active;
 718         } else {
 719                 /* Clear the update flag for active parameters that have been
 720                  * applied and the busy flag for all active parameters.
 721                  */
 722                 prev->params.params[0].update &= ~(active & update);
 723                 prev->params.params[1].update &= ~(~active & update);
 724                 prev->params.params[0].busy &= ~active;
 725                 prev->params.params[1].busy &= active;
 726         }
 727 }
 728
 729 static void preview_params_switch(struct isp_prev_device *prev)
 730 {
 731         u32 to_switch;
 732
 733         /* Switch active parameters with updated shadow parameters when the
 734          * shadow parameter has been updated and neither the active not the
 735          * shadow parameter is busy.
 736          */
 737         to_switch = (prev->params.params[0].update & ~prev->params.active)
 738                   | (prev->params.params[1].update & prev->params.active);
 739         to_switch &= ~(prev->params.params[0].busy |
 740                        prev->params.params[1].busy);
 741         if (to_switch == 0)
 742                 return;
 743
 744         prev->params.active ^= to_switch;
 745
 746         /* Remove the update flag for the shadow copy of parameters we have
 747          * switched.
 748          */
 749         prev->params.params[0].update &= ~(~prev->params.active & to_switch);
 750         prev->params.params[1].update &= ~(prev->params.active & to_switch);
 751 }
 752
 753 /* preview parameters update structure */
 754 struct preview_update {
 755         void (*config)(struct isp_prev_device *, const struct prev_params *);
 756         void (*enable)(struct isp_prev_device *, bool);
 757         unsigned int param_offset;
 758         unsigned int param_size;
 759         unsigned int config_offset;
 760         bool skip;
 761 };
 762
 763 /* Keep the array indexed by the OMAP3ISP_PREV_* bit number. */
 764 static const struct preview_update update_attrs[] = {
 765         /* OMAP3ISP_PREV_LUMAENH */ {
 766                 preview_config_luma_enhancement,
 767                 preview_enable_luma_enhancement,
 768                 offsetof(struct prev_params, luma),
 769                 FIELD_SIZEOF(struct prev_params, luma),
 770                 offsetof(struct omap3isp_prev_update_config, luma),
 771         }, /* OMAP3ISP_PREV_INVALAW */ {
 772                 NULL,
 773                 preview_enable_invalaw,
 774         }, /* OMAP3ISP_PREV_HRZ_MED */ {
 775                 preview_config_hmed,
 776                 preview_enable_hmed,
 777                 offsetof(struct prev_params, hmed),
 778                 FIELD_SIZEOF(struct prev_params, hmed),
 779                 offsetof(struct omap3isp_prev_update_config, hmed),
 780         }, /* OMAP3ISP_PREV_CFA */ {
 781                 preview_config_cfa,
 782                 NULL,
 783                 offsetof(struct prev_params, cfa),
 784                 FIELD_SIZEOF(struct prev_params, cfa),
 785                 offsetof(struct omap3isp_prev_update_config, cfa),
 786         }, /* OMAP3ISP_PREV_CHROMA_SUPP */ {
 787                 preview_config_chroma_suppression,
 788                 preview_enable_chroma_suppression,
 789                 offsetof(struct prev_params, csup),
 790                 FIELD_SIZEOF(struct prev_params, csup),
 791                 offsetof(struct omap3isp_prev_update_config, csup),
 792         }, /* OMAP3ISP_PREV_WB */ {
 793                 preview_config_whitebalance,
 794                 NULL,
 795                 offsetof(struct prev_params, wbal),
 796                 FIELD_SIZEOF(struct prev_params, wbal),
 797                 offsetof(struct omap3isp_prev_update_config, wbal),
 798         }, /* OMAP3ISP_PREV_BLKADJ */ {
 799                 preview_config_blkadj,
 800                 NULL,
 801                 offsetof(struct prev_params, blkadj),
 802                 FIELD_SIZEOF(struct prev_params, blkadj),
 803                 offsetof(struct omap3isp_prev_update_config, blkadj),
 804         }, /* OMAP3ISP_PREV_RGB2RGB */ {
 805                 preview_config_rgb_blending,
 806                 NULL,
 807                 offsetof(struct prev_params, rgb2rgb),
 808                 FIELD_SIZEOF(struct prev_params, rgb2rgb),
 809                 offsetof(struct omap3isp_prev_update_config, rgb2rgb),
 810         }, /* OMAP3ISP_PREV_COLOR_CONV */ {
 811                 preview_config_csc,
 812                 NULL,
 813                 offsetof(struct prev_params, csc),
 814                 FIELD_SIZEOF(struct prev_params, csc),
 815                 offsetof(struct omap3isp_prev_update_config, csc),
 816         }, /* OMAP3ISP_PREV_YC_LIMIT */ {
 817                 preview_config_yc_range,
 818                 NULL,
 819                 offsetof(struct prev_params, yclimit),
 820                 FIELD_SIZEOF(struct prev_params, yclimit),
 821                 offsetof(struct omap3isp_prev_update_config, yclimit),
 822         }, /* OMAP3ISP_PREV_DEFECT_COR */ {
 823                 preview_config_dcor,
 824                 preview_enable_dcor,
 825                 offsetof(struct prev_params, dcor),
 826                 FIELD_SIZEOF(struct prev_params, dcor),
 827                 offsetof(struct omap3isp_prev_update_config, dcor),
 828         }, /* Previously OMAP3ISP_PREV_GAMMABYPASS, not used anymore */ {
 829                 NULL,
 830                 NULL,
 831         }, /* OMAP3ISP_PREV_DRK_FRM_CAPTURE */ {
 832                 NULL,
 833                 preview_enable_drkframe_capture,
 834         }, /* OMAP3ISP_PREV_DRK_FRM_SUBTRACT */ {
 835                 NULL,
 836                 preview_enable_drkframe,
 837         }, /* OMAP3ISP_PREV_LENS_SHADING */ {
 838                 NULL,
 839                 preview_enable_drkframe,
 840         }, /* OMAP3ISP_PREV_NF */ {
 841                 preview_config_noisefilter,
 842                 preview_enable_noisefilter,
 843                 offsetof(struct prev_params, nf),
 844                 FIELD_SIZEOF(struct prev_params, nf),
 845                 offsetof(struct omap3isp_prev_update_config, nf),
 846         }, /* OMAP3ISP_PREV_GAMMA */ {
 847                 preview_config_gammacorrn,
 848                 preview_enable_gammacorrn,
 849                 offsetof(struct prev_params, gamma),
 850                 FIELD_SIZEOF(struct prev_params, gamma),
 851                 offsetof(struct omap3isp_prev_update_config, gamma),
 852         }, /* OMAP3ISP_PREV_CONTRAST */ {
 853                 preview_config_contrast,
 854                 NULL,
 855                 0, 0, 0, true,
 856         }, /* OMAP3ISP_PREV_BRIGHTNESS */ {
 857                 preview_config_brightness,
 858                 NULL,
 859                 0, 0, 0, true,
 860         },
 861 };
 862
 863 /*
 864  * preview_config - Copy and update local structure with userspace preview
 865  *                  configuration.
 866  * @prev: ISP preview engine
 867  * @cfg: Configuration
 868  *
 869  * Return zero if success or -EFAULT if the configuration can't be copied from
 870  * userspace.
 871  */
 872 static int preview_config(struct isp_prev_device *prev,
 873                           struct omap3isp_prev_update_config *cfg)
 874 {
 875         unsigned long flags;
 876         unsigned int i;
 877         int rval = 0;
 878         u32 update;
 879         u32 active;
 880
 881         if (cfg->update == 0)
 882                 return 0;
 883
 884         /* Mark the shadow parameters we're going to update as busy. */
 885         spin_lock_irqsave(&prev->params.lock, flags);
 886         preview_params_lock(prev, cfg->update, true);
 887         active = prev->params.active;
 888         spin_unlock_irqrestore(&prev->params.lock, flags);
 889
 890         update = 0;
 891
 892         for (i = 0; i < ARRAY_SIZE(update_attrs); i++) {
 893                 const struct preview_update *attr = &update_attrs[i];
 894                 struct prev_params *params;
 895                 unsigned int bit = 1 << i;
 896
 897                 if (attr->skip || !(cfg->update & bit))
 898                         continue;
 899
 900                 params = &prev->params.params[!!(active & bit)];
 901
 902                 if (cfg->flag & bit) {
 903                         void __user *from = *(void * __user *)
 904                                 ((void *)cfg + attr->config_offset);
 905                         void *to = (void *)params + attr->param_offset;
 906                         size_t size = attr->param_size;
 907
 908                         if (to && from && size) {
 909                                 if (copy_from_user(to, from, size)) {
 910                                         rval = -EFAULT;
 911                                         break;
 912                                 }
 913                         }
 914                         params->features |= bit;
 915                 } else {
 916                         params->features &= ~bit;
 917                 }
 918
 919                 update |= bit;
 920         }
 921
 922         spin_lock_irqsave(&prev->params.lock, flags);
 923         preview_params_unlock(prev, update, true);
 924         preview_params_switch(prev);
 925         spin_unlock_irqrestore(&prev->params.lock, flags);
 926
 927         return rval;
 928 }
 929
 930 /*
 931  * preview_setup_hw - Setup preview registers and/or internal memory
 932  * @prev: pointer to preview private structure
 933  * @update: Bitmask of parameters to setup
 934  * @active: Bitmask of parameters active in set 0
 935  * Note: can be called from interrupt context
 936  * Return none
 937  */
 938 static void preview_setup_hw(struct isp_prev_device *prev, u32 update,
 939                              u32 active)
 940 {
 941         unsigned int i;
 942         u32 features;
 943
 944         if (update == 0)
 945                 return;
 946
 947         features = (prev->params.params[0].features & active)
 948                  | (prev->params.params[1].features & ~active);
 949
 950         for (i = 0; i < ARRAY_SIZE(update_attrs); i++) {
 951                 const struct preview_update *attr = &update_attrs[i];
 952                 struct prev_params *params;
 953                 unsigned int bit = 1 << i;
 954
 955                 if (!(update & bit))
 956                         continue;
 957
 958                 params = &prev->params.params[!(active & bit)];
 959
 960                 if (params->features & bit) {
 961                         if (attr->config)
 962                                 attr->config(prev, params);
 963                         if (attr->enable)
 964                                 attr->enable(prev, true);
 965                 } else {
 966                         if (attr->enable)
 967                                 attr->enable(prev, false);
 968                 }
 969         }
 970 }
 971
 972 /*
 973  * preview_config_ycpos - Configure byte layout of YUV image.
 974  * @prev: pointer to previewer private structure
 975  * @pixelcode: pixel code
 976  */
 977 static void
 978 preview_config_ycpos(struct isp_prev_device *prev,
 979                      enum v4l2_mbus_pixelcode pixelcode)
 980 {
 981         struct isp_device *isp = to_isp_device(prev);
 982         enum preview_ycpos_mode mode;
 983
 984         switch (pixelcode) {
 985         case V4L2_MBUS_FMT_YUYV8_1X16:
 986                 mode = YCPOS_CrYCbY;
 987                 break;
 988         case V4L2_MBUS_FMT_UYVY8_1X16:
 989                 mode = YCPOS_YCrYCb;
 990                 break;
 991         default:
 992                 return;
 993         }
 994
 995         isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 996                         ISPPRV_PCR_YCPOS_CrYCbY,
 997                         mode << ISPPRV_PCR_YCPOS_SHIFT);
 998 }
 999
1000 /*
1001  * preview_config_averager - Enable / disable / configure averager
1002  * @average: Average value to be configured.
1003  */
1004 static void preview_config_averager(struct isp_prev_device *prev, u8 average)
1005 {
1006         struct isp_device *isp = to_isp_device(prev);
1007
1008         isp_reg_writel(isp, ISPPRV_AVE_EVENDIST_2 << ISPPRV_AVE_EVENDIST_SHIFT |
1009                        ISPPRV_AVE_ODDDIST_2 << ISPPRV_AVE_ODDDIST_SHIFT |
1010                        average, OMAP3_ISP_IOMEM_PREV, ISPPRV_AVE);
1011 }
1012
1013
1014 /*
1015  * preview_config_input_format - Configure the input format
1016  * @prev: The preview engine
1017  * @info: Sink pad format information
1018  *
1019  * Enable and configure CFA interpolation for Bayer formats and disable it for
1020  * greyscale formats.
1021  *
1022  * The CFA table is organised in four blocks, one per Bayer component. The
1023  * hardware expects blocks to follow the Bayer order of the input data, while
1024  * the driver stores the table in GRBG order in memory. The blocks need to be
1025  * reordered to support non-GRBG Bayer patterns.
1026  */
1027 static void preview_config_input_format(struct isp_prev_device *prev,
1028                                         const struct isp_format_info *info)
1029 {
1030         struct isp_device *isp = to_isp_device(prev);
1031         struct prev_params *params;
1032
1033         if (info->width == 8)
1034                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
1035                             ISPPRV_PCR_WIDTH);
1036         else
1037                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
1038                             ISPPRV_PCR_WIDTH);
1039
1040         switch (info->flavor) {
1041         case V4L2_MBUS_FMT_SGRBG8_1X8:
1042                 prev->params.cfa_order = 0;
1043                 break;
1044         case V4L2_MBUS_FMT_SRGGB8_1X8:
1045                 prev->params.cfa_order = 1;
1046                 break;
1047         case V4L2_MBUS_FMT_SBGGR8_1X8:
1048                 prev->params.cfa_order = 2;
1049                 break;
1050         case V4L2_MBUS_FMT_SGBRG8_1X8:
1051                 prev->params.cfa_order = 3;
1052                 break;
1053         default:
1054                 /* Disable CFA for non-Bayer formats. */
1055                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
1056                             ISPPRV_PCR_CFAEN);
1057                 return;
1058         }
1059
1060         isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR, ISPPRV_PCR_CFAEN);
1061         isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
1062                         ISPPRV_PCR_CFAFMT_MASK, ISPPRV_PCR_CFAFMT_BAYER);
1063
1064         params = (prev->params.active & OMAP3ISP_PREV_CFA)
1065                ? &prev->params.params[0] : &prev->params.params[1];
1066
1067         preview_config_cfa(prev, params);
1068 }
1069
1070 /*
1071  * preview_config_input_size - Configure the input frame size
1072  *
1073  * The preview engine crops several rows and columns internally depending on
1074  * which processing blocks are enabled. The driver assumes all those blocks are
1075  * enabled when reporting source pad formats to userspace. If this assumption is
1076  * not true, rows and columns must be manually cropped at the preview engine
1077  * input to avoid overflows at the end of lines and frames.
1078  *
1079  * See the explanation at the PREV_MARGIN_* definitions for more details.
1080  */
1081 static void preview_config_input_size(struct isp_prev_device *prev, u32 active)
1082 {
1083         const struct v4l2_mbus_framefmt *format = &prev->formats[PREV_PAD_SINK];
1084         struct isp_device *isp = to_isp_device(prev);
1085         unsigned int sph = prev->crop.left;
1086         unsigned int eph = prev->crop.left + prev->crop.width - 1;
1087         unsigned int slv = prev->crop.top;
1088         unsigned int elv = prev->crop.top + prev->crop.height - 1;
1089         u32 features;
1090
1091         if (format->code != V4L2_MBUS_FMT_Y8_1X8 &&
1092             format->code != V4L2_MBUS_FMT_Y10_1X10) {
1093                 sph -= 2;
1094                 eph += 2;
1095                 slv -= 2;
1096                 elv += 2;
1097         }
1098
1099         features = (prev->params.params[0].features & active)
1100                  | (prev->params.params[1].features & ~active);
1101
1102         if (features & (OMAP3ISP_PREV_DEFECT_COR | OMAP3ISP_PREV_NF)) {
1103                 sph -= 2;
1104                 eph += 2;
1105                 slv -= 2;
1106                 elv += 2;
1107         }
1108         if (features & OMAP3ISP_PREV_HRZ_MED) {
1109                 sph -= 2;
1110                 eph += 2;
1111         }
1112         if (features & (OMAP3ISP_PREV_CHROMA_SUPP | OMAP3ISP_PREV_LUMAENH))
1113                 sph -= 2;
1114
1115         isp_reg_writel(isp, (sph << ISPPRV_HORZ_INFO_SPH_SHIFT) | eph,
1116                        OMAP3_ISP_IOMEM_PREV, ISPPRV_HORZ_INFO);
1117         isp_reg_writel(isp, (slv << ISPPRV_VERT_INFO_SLV_SHIFT) | elv,
1118                        OMAP3_ISP_IOMEM_PREV, ISPPRV_VERT_INFO);
1119 }
1120
1121 /*
1122  * preview_config_inlineoffset - Configures the Read address line offset.
1123  * @prev: Preview module
1124  * @offset: Line offset
1125  *
1126  * According to the TRM, the line offset must be aligned on a 32 bytes boundary.
1127  * However, a hardware bug requires the memory start address to be aligned on a
1128  * 64 bytes boundary, so the offset probably should be aligned on 64 bytes as
1129  * well.
1130  */
1131 static void
1132 preview_config_inlineoffset(struct isp_prev_device *prev, u32 offset)
1133 {
1134         struct isp_device *isp = to_isp_device(prev);
1135
1136         isp_reg_writel(isp, offset & 0xffff, OMAP3_ISP_IOMEM_PREV,
1137                        ISPPRV_RADR_OFFSET);
1138 }
1139
1140 /*
1141  * preview_set_inaddr - Sets memory address of input frame.
1142  * @addr: 32bit memory address aligned on 32byte boundary.
1143  *
1144  * Configures the memory address from which the input frame is to be read.
1145  */
1146 static void preview_set_inaddr(struct isp_prev_device *prev, u32 addr)
1147 {
1148         struct isp_device *isp = to_isp_device(prev);
1149
1150         isp_reg_writel(isp, addr, OMAP3_ISP_IOMEM_PREV, ISPPRV_RSDR_ADDR);
1151 }
1152
1153 /*
1154  * preview_config_outlineoffset - Configures the Write address line offset.
1155  * @offset: Line Offset for the preview output.
1156  *
1157  * The offset must be a multiple of 32 bytes.
1158  */
1159 static void preview_config_outlineoffset(struct isp_prev_device *prev,
1160                                     u32 offset)
1161 {
1162         struct isp_device *isp = to_isp_device(prev);
1163
1164         isp_reg_writel(isp, offset & 0xffff, OMAP3_ISP_IOMEM_PREV,
1165                        ISPPRV_WADD_OFFSET);
1166 }
1167
1168 /*
1169  * preview_set_outaddr - Sets the memory address to store output frame
1170  * @addr: 32bit memory address aligned on 32byte boundary.
1171  *
1172  * Configures the memory address to which the output frame is written.
1173  */
1174 static void preview_set_outaddr(struct isp_prev_device *prev, u32 addr)
1175 {
1176         struct isp_device *isp = to_isp_device(prev);
1177
1178         isp_reg_writel(isp, addr, OMAP3_ISP_IOMEM_PREV, ISPPRV_WSDR_ADDR);
1179 }
1180
1181 static void preview_adjust_bandwidth(struct isp_prev_device *prev)
1182 {
1183         struct isp_pipeline *pipe = to_isp_pipeline(&prev->subdev.entity);
1184         struct isp_device *isp = to_isp_device(prev);
1185         const struct v4l2_mbus_framefmt *ifmt = &prev->formats[PREV_PAD_SINK];
1186         unsigned long l3_ick = pipe->l3_ick;
1187         struct v4l2_fract *timeperframe;
1188         unsigned int cycles_per_frame;
1189         unsigned int requests_per_frame;
1190         unsigned int cycles_per_request;
1191         unsigned int minimum;
1192         unsigned int maximum;
1193         unsigned int value;
1194
1195         if (prev->input != PREVIEW_INPUT_MEMORY) {
1196                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_SDR_REQ_EXP,
1197                             ISPSBL_SDR_REQ_PRV_EXP_MASK);
1198                 return;
1199         }
1200
1201         /* Compute the minimum number of cycles per request, based on the
1202          * pipeline maximum data rate. This is an absolute lower bound if we
1203          * don't want SBL overflows, so round the value up.
1204          */
1205         cycles_per_request = div_u64((u64)l3_ick / 2 * 256 + pipe->max_rate - 1,
1206                                      pipe->max_rate);
1207         minimum = DIV_ROUND_UP(cycles_per_request, 32);
1208
1209         /* Compute the maximum number of cycles per request, based on the
1210          * requested frame rate. This is a soft upper bound to achieve a frame
1211          * rate equal or higher than the requested value, so round the value
1212          * down.
1213          */
1214         timeperframe = &pipe->max_timeperframe;
1215
1216         requests_per_frame = DIV_ROUND_UP(ifmt->width * 2, 256) * ifmt->height;
1217         cycles_per_frame = div_u64((u64)l3_ick * timeperframe->numerator,
1218                                    timeperframe->denominator);
1219         cycles_per_request = cycles_per_frame / requests_per_frame;
1220
1221         maximum = cycles_per_request / 32;
1222
1223         value = max(minimum, maximum);
1224
1225         dev_dbg(isp->dev, "%s: cycles per request = %u\n", __func__, value);
1226         isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_SDR_REQ_EXP,
1227                         ISPSBL_SDR_REQ_PRV_EXP_MASK,
1228                         value << ISPSBL_SDR_REQ_PRV_EXP_SHIFT);
1229 }
1230
1231 /*
1232  * omap3isp_preview_busy - Gets busy state of preview module.
1233  */
1234 int omap3isp_preview_busy(struct isp_prev_device *prev)
1235 {
1236         struct isp_device *isp = to_isp_device(prev);
1237
1238         return isp_reg_readl(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR)
1239                 & ISPPRV_PCR_BUSY;
1240 }
1241
1242 /*
1243  * omap3isp_preview_restore_context - Restores the values of preview registers
1244  */
1245 void omap3isp_preview_restore_context(struct isp_device *isp)
1246 {
1247         struct isp_prev_device *prev = &isp->isp_prev;
1248         const u32 update = OMAP3ISP_PREV_FEATURES_END - 1;
1249
1250         prev->params.params[0].update = prev->params.active & update;
1251         prev->params.params[1].update = ~prev->params.active & update;
1252
1253         preview_setup_hw(prev, update, prev->params.active);
1254
1255         prev->params.params[0].update = 0;
1256         prev->params.params[1].update = 0;
1257 }
1258
1259 /*
1260  * preview_print_status - Dump preview module registers to the kernel log
1261  */
1262 #define PREV_PRINT_REGISTER(isp, name)\
1263         dev_dbg(isp->dev, "###PRV " #name "=0x%08x\n", \
1264                 isp_reg_readl(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_##name))
1265
1266 static void preview_print_status(struct isp_prev_device *prev)
1267 {
1268         struct isp_device *isp = to_isp_device(prev);
1269
1270         dev_dbg(isp->dev, "-------------Preview Register dump----------\n");
1271
1272         PREV_PRINT_REGISTER(isp, PCR);
1273         PREV_PRINT_REGISTER(isp, HORZ_INFO);
1274         PREV_PRINT_REGISTER(isp, VERT_INFO);
1275         PREV_PRINT_REGISTER(isp, RSDR_ADDR);
1276         PREV_PRINT_REGISTER(isp, RADR_OFFSET);
1277         PREV_PRINT_REGISTER(isp, DSDR_ADDR);
1278         PREV_PRINT_REGISTER(isp, DRKF_OFFSET);
1279         PREV_PRINT_REGISTER(isp, WSDR_ADDR);
1280         PREV_PRINT_REGISTER(isp, WADD_OFFSET);
1281         PREV_PRINT_REGISTER(isp, AVE);
1282         PREV_PRINT_REGISTER(isp, HMED);
1283         PREV_PRINT_REGISTER(isp, NF);
1284         PREV_PRINT_REGISTER(isp, WB_DGAIN);
1285         PREV_PRINT_REGISTER(isp, WBGAIN);
1286         PREV_PRINT_REGISTER(isp, WBSEL);
1287         PREV_PRINT_REGISTER(isp, CFA);
1288         PREV_PRINT_REGISTER(isp, BLKADJOFF);
1289         PREV_PRINT_REGISTER(isp, RGB_MAT1);
1290         PREV_PRINT_REGISTER(isp, RGB_MAT2);
1291         PREV_PRINT_REGISTER(isp, RGB_MAT3);
1292         PREV_PRINT_REGISTER(isp, RGB_MAT4);
1293         PREV_PRINT_REGISTER(isp, RGB_MAT5);
1294         PREV_PRINT_REGISTER(isp, RGB_OFF1);
1295         PREV_PRINT_REGISTER(isp, RGB_OFF2);
1296         PREV_PRINT_REGISTER(isp, CSC0);
1297         PREV_PRINT_REGISTER(isp, CSC1);
1298         PREV_PRINT_REGISTER(isp, CSC2);
1299         PREV_PRINT_REGISTER(isp, CSC_OFFSET);
1300         PREV_PRINT_REGISTER(isp, CNT_BRT);
1301         PREV_PRINT_REGISTER(isp, CSUP);
1302         PREV_PRINT_REGISTER(isp, SETUP_YC);
1303         PREV_PRINT_REGISTER(isp, SET_TBL_ADDR);
1304         PREV_PRINT_REGISTER(isp, CDC_THR0);
1305         PREV_PRINT_REGISTER(isp, CDC_THR1);
1306         PREV_PRINT_REGISTER(isp, CDC_THR2);
1307         PREV_PRINT_REGISTER(isp, CDC_THR3);
1308
1309         dev_dbg(isp->dev, "--------------------------------------------\n");
1310 }
1311
1312 /*
1313  * preview_init_params - init image processing parameters.
1314  * @prev: pointer to previewer private structure
1315  */
1316 static void preview_init_params(struct isp_prev_device *prev)
1317 {
1318         struct prev_params *params;
1319         unsigned int i;
1320
1321         spin_lock_init(&prev->params.lock);
1322
1323         prev->params.active = ~0;
1324         prev->params.params[0].busy = 0;
1325         prev->params.params[0].update = OMAP3ISP_PREV_FEATURES_END - 1;
1326         prev->params.params[1].busy = 0;
1327         prev->params.params[1].update = 0;
1328
1329         params = &prev->params.params[0];
1330
1331         /* Init values */
1332         params->contrast = ISPPRV_CONTRAST_DEF * ISPPRV_CONTRAST_UNITS;
1333         params->brightness = ISPPRV_BRIGHT_DEF * ISPPRV_BRIGHT_UNITS;
1334         params->cfa.format = OMAP3ISP_CFAFMT_BAYER;
1335         memcpy(params->cfa.table, cfa_coef_table,
1336                sizeof(params->cfa.table));
1337         params->cfa.gradthrs_horz = FLR_CFA_GRADTHRS_HORZ;
1338         params->cfa.gradthrs_vert = FLR_CFA_GRADTHRS_VERT;
1339         params->csup.gain = FLR_CSUP_GAIN;
1340         params->csup.thres = FLR_CSUP_THRES;
1341         params->csup.hypf_en = 0;
1342         memcpy(params->luma.table, luma_enhance_table,
1343                sizeof(params->luma.table));
1344         params->nf.spread = FLR_NF_STRGTH;
1345         memcpy(params->nf.table, noise_filter_table, sizeof(params->nf.table));
1346         params->dcor.couplet_mode_en = 1;
1347         for (i = 0; i < OMAP3ISP_PREV_DETECT_CORRECT_CHANNELS; i++)
1348                 params->dcor.detect_correct[i] = DEF_DETECT_CORRECT_VAL;
1349         memcpy(params->gamma.blue, gamma_table, sizeof(params->gamma.blue));
1350         memcpy(params->gamma.green, gamma_table, sizeof(params->gamma.green));
1351         memcpy(params->gamma.red, gamma_table, sizeof(params->gamma.red));
1352         params->wbal.dgain = FLR_WBAL_DGAIN;
1353         params->wbal.coef0 = FLR_WBAL_COEF;
1354         params->wbal.coef1 = FLR_WBAL_COEF;
1355         params->wbal.coef2 = FLR_WBAL_COEF;
1356         params->wbal.coef3 = FLR_WBAL_COEF;
1357         params->blkadj.red = FLR_BLKADJ_RED;
1358         params->blkadj.green = FLR_BLKADJ_GREEN;
1359         params->blkadj.blue = FLR_BLKADJ_BLUE;
1360         params->rgb2rgb = flr_rgb2rgb;
1361         params->csc = flr_prev_csc;
1362         params->yclimit.minC = ISPPRV_YC_MIN;
1363         params->yclimit.maxC = ISPPRV_YC_MAX;
1364         params->yclimit.minY = ISPPRV_YC_MIN;
1365         params->yclimit.maxY = ISPPRV_YC_MAX;
1366
1367         params->features = OMAP3ISP_PREV_CFA | OMAP3ISP_PREV_DEFECT_COR
1368                          | OMAP3ISP_PREV_NF | OMAP3ISP_PREV_GAMMA
1369                          | OMAP3ISP_PREV_BLKADJ | OMAP3ISP_PREV_YC_LIMIT
1370                          | OMAP3ISP_PREV_RGB2RGB | OMAP3ISP_PREV_COLOR_CONV
1371                          | OMAP3ISP_PREV_WB | OMAP3ISP_PREV_BRIGHTNESS
1372                          | OMAP3ISP_PREV_CONTRAST;
1373 }
1374
1375 /*
1376  * preview_max_out_width - Handle previewer hardware output limitations
1377  * @prev: pointer to previewer private structure
1378  * returns maximum width output for current isp revision
1379  */
1380 static unsigned int preview_max_out_width(struct isp_prev_device *prev)
1381 {
1382         struct isp_device *isp = to_isp_device(prev);
1383
1384         switch (isp->revision) {
1385         case ISP_REVISION_1_0:
1386                 return PREV_MAX_OUT_WIDTH_REV_1;
1387
1388         case ISP_REVISION_2_0:
1389         default:
1390                 return PREV_MAX_OUT_WIDTH_REV_2;
1391
1392         case ISP_REVISION_15_0:
1393                 return PREV_MAX_OUT_WIDTH_REV_15;
1394         }
1395 }
1396
1397 static void preview_configure(struct isp_prev_device *prev)
1398 {
1399         struct isp_device *isp = to_isp_device(prev);
1400         const struct isp_format_info *info;
1401         struct v4l2_mbus_framefmt *format;
1402         unsigned long flags;
1403         u32 update;
1404         u32 active;
1405
1406         spin_lock_irqsave(&prev->params.lock, flags);
1407         /* Mark all active parameters we are going to touch as busy. */
1408         update = preview_params_lock(prev, 0, false);
1409         active = prev->params.active;
1410         spin_unlock_irqrestore(&prev->params.lock, flags);
1411
1412         /* PREV_PAD_SINK */
1413         format = &prev->formats[PREV_PAD_SINK];
1414         info = omap3isp_video_format_info(format->code);
1415
1416         preview_adjust_bandwidth(prev);
1417
1418         preview_config_input_format(prev, info);
1419         preview_config_input_size(prev, active);
1420
1421         if (prev->input == PREVIEW_INPUT_CCDC)
1422                 preview_config_inlineoffset(prev, 0);
1423         else
1424                 preview_config_inlineoffset(prev, ALIGN(format->width, 0x20) *
1425                                             info->bpp);
1426
1427         preview_setup_hw(prev, update, active);
1428
1429         /* PREV_PAD_SOURCE */
1430         format = &prev->formats[PREV_PAD_SOURCE];
1431
1432         if (prev->output & PREVIEW_OUTPUT_MEMORY)
1433                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
1434                             ISPPRV_PCR_SDRPORT);
1435         else
1436                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
1437                             ISPPRV_PCR_SDRPORT);
1438
1439         if (prev->output & PREVIEW_OUTPUT_RESIZER)
1440                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
1441                             ISPPRV_PCR_RSZPORT);
1442         else
1443                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
1444                             ISPPRV_PCR_RSZPORT);
1445
1446         if (prev->output & PREVIEW_OUTPUT_MEMORY)
1447                 preview_config_outlineoffset(prev,
1448                                 ALIGN(format->width, 0x10) * 2);
1449
1450         preview_config_averager(prev, 0);
1451         preview_config_ycpos(prev, format->code);
1452
1453         spin_lock_irqsave(&prev->params.lock, flags);
1454         preview_params_unlock(prev, update, false);
1455         spin_unlock_irqrestore(&prev->params.lock, flags);
1456 }
1457
1458 /* -----------------------------------------------------------------------------
1459  * Interrupt handling
1460  */
1461
1462 static void preview_enable_oneshot(struct isp_prev_device *prev)
1463 {
1464         struct isp_device *isp = to_isp_device(prev);
1465
1466         /* The PCR.SOURCE bit is automatically reset to 0 when the PCR.ENABLE
1467          * bit is set. As the preview engine is used in single-shot mode, we
1468          * need to set PCR.SOURCE before enabling the preview engine.
1469          */
1470         if (prev->input == PREVIEW_INPUT_MEMORY)
1471                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
1472                             ISPPRV_PCR_SOURCE);
1473
1474         isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
1475                     ISPPRV_PCR_EN | ISPPRV_PCR_ONESHOT);
1476 }
1477
1478 void omap3isp_preview_isr_frame_sync(struct isp_prev_device *prev)
1479 {
1480         /*
1481          * If ISP_VIDEO_DMAQUEUE_QUEUED is set, DMA queue had an underrun
1482          * condition, the module was paused and now we have a buffer queued
1483          * on the output again. Restart the pipeline if running in continuous
1484          * mode.
1485          */
1486         if (prev->state == ISP_PIPELINE_STREAM_CONTINUOUS &&
1487             prev->video_out.dmaqueue_flags & ISP_VIDEO_DMAQUEUE_QUEUED) {
1488                 preview_enable_oneshot(prev);
1489                 isp_video_dmaqueue_flags_clr(&prev->video_out);
1490         }
1491 }
1492
1493 static void preview_isr_buffer(struct isp_prev_device *prev)
1494 {
1495         struct isp_pipeline *pipe = to_isp_pipeline(&prev->subdev.entity);
1496         struct isp_buffer *buffer;
1497         int restart = 0;
1498
1499         if (prev->input == PREVIEW_INPUT_MEMORY) {
1500                 buffer = omap3isp_video_buffer_next(&prev->video_in);
1501                 if (buffer != NULL)
1502                         preview_set_inaddr(prev, buffer->dma);
1503                 pipe->state |= ISP_PIPELINE_IDLE_INPUT;
1504         }
1505
1506         if (prev->output & PREVIEW_OUTPUT_MEMORY) {
1507                 buffer = omap3isp_video_buffer_next(&prev->video_out);
1508                 if (buffer != NULL) {
1509                         preview_set_outaddr(prev, buffer->dma);
1510                         restart = 1;
1511                 }
1512                 pipe->state |= ISP_PIPELINE_IDLE_OUTPUT;
1513         }
1514
1515         switch (prev->state) {
1516         case ISP_PIPELINE_STREAM_SINGLESHOT:
1517                 if (isp_pipeline_ready(pipe))
1518                         omap3isp_pipeline_set_stream(pipe,
1519                                                 ISP_PIPELINE_STREAM_SINGLESHOT);
1520                 break;
1521
1522         case ISP_PIPELINE_STREAM_CONTINUOUS:
1523                 /* If an underrun occurs, the video queue operation handler will
1524                  * restart the preview engine. Otherwise restart it immediately.
1525                  */
1526                 if (restart)
1527                         preview_enable_oneshot(prev);
1528                 break;
1529
1530         case ISP_PIPELINE_STREAM_STOPPED:
1531         default:
1532                 return;
1533         }
1534 }
1535
1536 /*
1537  * omap3isp_preview_isr - ISP preview engine interrupt handler
1538  *
1539  * Manage the preview engine video buffers and configure shadowed registers.
1540  */
1541 void omap3isp_preview_isr(struct isp_prev_device *prev)
1542 {
1543         unsigned long flags;
1544         u32 update;
1545         u32 active;
1546
1547         if (omap3isp_module_sync_is_stopping(&prev->wait, &prev->stopping))
1548                 return;
1549
1550         spin_lock_irqsave(&prev->params.lock, flags);
1551         preview_params_switch(prev);
1552         update = preview_params_lock(prev, 0, false);
1553         active = prev->params.active;
1554         spin_unlock_irqrestore(&prev->params.lock, flags);
1555
1556         preview_setup_hw(prev, update, active);
1557         preview_config_input_size(prev, active);
1558
1559         if (prev->input == PREVIEW_INPUT_MEMORY ||
1560             prev->output & PREVIEW_OUTPUT_MEMORY)
1561                 preview_isr_buffer(prev);
1562         else if (prev->state == ISP_PIPELINE_STREAM_CONTINUOUS)
1563                 preview_enable_oneshot(prev);
1564
1565         spin_lock_irqsave(&prev->params.lock, flags);
1566         preview_params_unlock(prev, update, false);
1567         spin_unlock_irqrestore(&prev->params.lock, flags);
1568 }
1569
1570 /* -----------------------------------------------------------------------------
1571  * ISP video operations
1572  */
1573
1574 static int preview_video_queue(struct isp_video *video,
1575                                struct isp_buffer *buffer)
1576 {
1577         struct isp_prev_device *prev = &video->isp->isp_prev;
1578
1579         if (video->type == V4L2_BUF_TYPE_VIDEO_OUTPUT)
1580                 preview_set_inaddr(prev, buffer->dma);
1581
1582         if (video->type == V4L2_BUF_TYPE_VIDEO_CAPTURE)
1583                 preview_set_outaddr(prev, buffer->dma);
1584
1585         return 0;
1586 }
1587
1588 static const struct isp_video_operations preview_video_ops = {
1589         .queue = preview_video_queue,
1590 };
1591
1592 /* -----------------------------------------------------------------------------
1593  * V4L2 subdev operations
1594  */
1595
1596 /*
1597  * preview_s_ctrl - Handle set control subdev method
1598  * @ctrl: pointer to v4l2 control structure
1599  */
1600 static int preview_s_ctrl(struct v4l2_ctrl *ctrl)
1601 {
1602         struct isp_prev_device *prev =
1603                 container_of(ctrl->handler, struct isp_prev_device, ctrls);
1604
1605         switch (ctrl->id) {
1606         case V4L2_CID_BRIGHTNESS:
1607                 preview_update_brightness(prev, ctrl->val);
1608                 break;
1609         case V4L2_CID_CONTRAST:
1610                 preview_update_contrast(prev, ctrl->val);
1611                 break;
1612         }
1613
1614         return 0;
1615 }
1616
1617 static const struct v4l2_ctrl_ops preview_ctrl_ops = {
1618         .s_ctrl = preview_s_ctrl,
1619 };
1620
1621 /*
1622  * preview_ioctl - Handle preview module private ioctl's
1623  * @sd: pointer to v4l2 subdev structure
1624  * @cmd: configuration command
1625  * @arg: configuration argument
1626  * return -EINVAL or zero on success
1627  */
1628 static long preview_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
1629 {
1630         struct isp_prev_device *prev = v4l2_get_subdevdata(sd);
1631
1632         switch (cmd) {
1633         case VIDIOC_OMAP3ISP_PRV_CFG:
1634                 return preview_config(prev, arg);
1635
1636         default:
1637                 return -ENOIOCTLCMD;
1638         }
1639 }
1640
1641 /*
1642  * preview_set_stream - Enable/Disable streaming on preview subdev
1643  * @sd    : pointer to v4l2 subdev structure
1644  * @enable: 1 == Enable, 0 == Disable
1645  * return -EINVAL or zero on success
1646  */
1647 static int preview_set_stream(struct v4l2_subdev *sd, int enable)
1648 {
1649         struct isp_prev_device *prev = v4l2_get_subdevdata(sd);
1650         struct isp_video *video_out = &prev->video_out;
1651         struct isp_device *isp = to_isp_device(prev);
1652         struct device *dev = to_device(prev);
1653
1654         if (prev->state == ISP_PIPELINE_STREAM_STOPPED) {
1655                 if (enable == ISP_PIPELINE_STREAM_STOPPED)
1656                         return 0;
1657
1658                 omap3isp_subclk_enable(isp, OMAP3_ISP_SUBCLK_PREVIEW);
1659                 preview_configure(prev);
1660                 atomic_set(&prev->stopping, 0);
1661                 preview_print_status(prev);
1662         }
1663
1664         switch (enable) {
1665         case ISP_PIPELINE_STREAM_CONTINUOUS:
1666                 if (prev->output & PREVIEW_OUTPUT_MEMORY)
1667                         omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_PREVIEW_WRITE);
1668
1669                 if (video_out->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_QUEUED ||
1670                     !(prev->output & PREVIEW_OUTPUT_MEMORY))
1671                         preview_enable_oneshot(prev);
1672
1673                 isp_video_dmaqueue_flags_clr(video_out);
1674                 break;
1675
1676         case ISP_PIPELINE_STREAM_SINGLESHOT:
1677                 if (prev->input == PREVIEW_INPUT_MEMORY)
1678                         omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_PREVIEW_READ);
1679                 if (prev->output & PREVIEW_OUTPUT_MEMORY)
1680                         omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_PREVIEW_WRITE);
1681
1682                 preview_enable_oneshot(prev);
1683                 break;
1684
1685         case ISP_PIPELINE_STREAM_STOPPED:
1686                 if (omap3isp_module_sync_idle(&sd->entity, &prev->wait,
1687                                               &prev->stopping))
1688                         dev_dbg(dev, "%s: stop timeout.\n", sd->name);
1689                 omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_PREVIEW_READ);
1690                 omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_PREVIEW_WRITE);
1691                 omap3isp_subclk_disable(isp, OMAP3_ISP_SUBCLK_PREVIEW);
1692                 isp_video_dmaqueue_flags_clr(video_out);
1693                 break;
1694         }
1695
1696         prev->state = enable;
1697         return 0;
1698 }
1699
1700 static struct v4l2_mbus_framefmt *
1701 __preview_get_format(struct isp_prev_device *prev, struct v4l2_subdev_fh *fh,
1702                      unsigned int pad, enum v4l2_subdev_format_whence which)
1703 {
1704         if (which == V4L2_SUBDEV_FORMAT_TRY)
1705                 return v4l2_subdev_get_try_format(fh, pad);
1706         else
1707                 return &prev->formats[pad];
1708 }
1709
1710 static struct v4l2_rect *
1711 __preview_get_crop(struct isp_prev_device *prev, struct v4l2_subdev_fh *fh,
1712                    enum v4l2_subdev_format_whence which)
1713 {
1714         if (which == V4L2_SUBDEV_FORMAT_TRY)
1715                 return v4l2_subdev_get_try_crop(fh, PREV_PAD_SINK);
1716         else
1717                 return &prev->crop;
1718 }
1719
1720 /* previewer format descriptions */
1721 static const unsigned int preview_input_fmts[] = {
1722         V4L2_MBUS_FMT_Y8_1X8,
1723         V4L2_MBUS_FMT_SGRBG8_1X8,
1724         V4L2_MBUS_FMT_SRGGB8_1X8,
1725         V4L2_MBUS_FMT_SBGGR8_1X8,
1726         V4L2_MBUS_FMT_SGBRG8_1X8,
1727         V4L2_MBUS_FMT_Y10_1X10,
1728         V4L2_MBUS_FMT_SGRBG10_1X10,
1729         V4L2_MBUS_FMT_SRGGB10_1X10,
1730         V4L2_MBUS_FMT_SBGGR10_1X10,
1731         V4L2_MBUS_FMT_SGBRG10_1X10,
1732 };
1733
1734 static const unsigned int preview_output_fmts[] = {
1735         V4L2_MBUS_FMT_UYVY8_1X16,
1736         V4L2_MBUS_FMT_YUYV8_1X16,
1737 };
1738
1739 /*
1740  * preview_try_format - Validate a format
1741  * @prev: ISP preview engine
1742  * @fh: V4L2 subdev file handle
1743  * @pad: pad number
1744  * @fmt: format to be validated
1745  * @which: try/active format selector
1746  *
1747  * Validate and adjust the given format for the given pad based on the preview
1748  * engine limits and the format and crop rectangles on other pads.
1749  */
1750 static void preview_try_format(struct isp_prev_device *prev,
1751                                struct v4l2_subdev_fh *fh, unsigned int pad,
1752                                struct v4l2_mbus_framefmt *fmt,
1753                                enum v4l2_subdev_format_whence which)
1754 {
1755         enum v4l2_mbus_pixelcode pixelcode;
1756         struct v4l2_rect *crop;
1757         unsigned int i;
1758
1759         switch (pad) {
1760         case PREV_PAD_SINK:
1761                 /* When reading data from the CCDC, the input size has already
1762                  * been mangled by the CCDC output pad so it can be accepted
1763                  * as-is.
1764                  *
1765                  * When reading data from memory, clamp the requested width and
1766                  * height. The TRM doesn't specify a minimum input height, make
1767                  * sure we got enough lines to enable the noise filter and color
1768                  * filter array interpolation.
1769                  */
1770                 if (prev->input == PREVIEW_INPUT_MEMORY) {
1771                         fmt->width = clamp_t(u32, fmt->width, PREV_MIN_IN_WIDTH,
1772                                              preview_max_out_width(prev));
1773                         fmt->height = clamp_t(u32, fmt->height,
1774                                               PREV_MIN_IN_HEIGHT,
1775                                               PREV_MAX_IN_HEIGHT);
1776                 }
1777
1778                 fmt->colorspace = V4L2_COLORSPACE_SRGB;
1779
1780                 for (i = 0; i < ARRAY_SIZE(preview_input_fmts); i++) {
1781                         if (fmt->code == preview_input_fmts[i])
1782                                 break;
1783                 }
1784
1785                 /* If not found, use SGRBG10 as default */
1786                 if (i >= ARRAY_SIZE(preview_input_fmts))
1787                         fmt->code = V4L2_MBUS_FMT_SGRBG10_1X10;
1788                 break;
1789
1790         case PREV_PAD_SOURCE:
1791                 pixelcode = fmt->code;
1792                 *fmt = *__preview_get_format(prev, fh, PREV_PAD_SINK, which);
1793
1794                 switch (pixelcode) {
1795                 case V4L2_MBUS_FMT_YUYV8_1X16:
1796                 case V4L2_MBUS_FMT_UYVY8_1X16:
1797                         fmt->code = pixelcode;
1798                         break;
1799
1800                 default:
1801                         fmt->code = V4L2_MBUS_FMT_YUYV8_1X16;
1802                         break;
1803                 }
1804
1805                 /* The preview module output size is configurable through the
1806                  * averager (horizontal scaling by 1/1, 1/2, 1/4 or 1/8). This
1807                  * is not supported yet, hardcode the output size to the crop
1808                  * rectangle size.
1809                  */
1810                 crop = __preview_get_crop(prev, fh, which);
1811                 fmt->width = crop->width;
1812                 fmt->height = crop->height;
1813
1814                 fmt->colorspace = V4L2_COLORSPACE_JPEG;
1815                 break;
1816         }
1817
1818         fmt->field = V4L2_FIELD_NONE;
1819 }
1820
1821 /*
1822  * preview_try_crop - Validate a crop rectangle
1823  * @prev: ISP preview engine
1824  * @sink: format on the sink pad
1825  * @crop: crop rectangle to be validated
1826  *
1827  * The preview engine crops lines and columns for its internal operation,
1828  * depending on which filters are enabled. Enforce minimum crop margins to
1829  * handle that transparently for userspace.
1830  *
1831  * See the explanation at the PREV_MARGIN_* definitions for more details.
1832  */
1833 static void preview_try_crop(struct isp_prev_device *prev,
1834                              const struct v4l2_mbus_framefmt *sink,
1835                              struct v4l2_rect *crop)
1836 {
1837         unsigned int left = PREV_MARGIN_LEFT;
1838         unsigned int right = sink->width - PREV_MARGIN_RIGHT;
1839         unsigned int top = PREV_MARGIN_TOP;
1840         unsigned int bottom = sink->height - PREV_MARGIN_BOTTOM;
1841
1842         /* When processing data on-the-fly from the CCDC, at least 2 pixels must
1843          * be cropped from the left and right sides of the image. As we don't
1844          * know which filters will be enabled, increase the left and right
1845          * margins by two.
1846          */
1847         if (prev->input == PREVIEW_INPUT_CCDC) {
1848                 left += 2;
1849                 right -= 2;
1850         }
1851
1852         /* The CFA filter crops 4 lines and 4 columns in Bayer mode, and 2 lines
1853          * and no columns in other modes. Increase the margins based on the sink
1854          * format.
1855          */
1856         if (sink->code != V4L2_MBUS_FMT_Y8_1X8 &&
1857             sink->code != V4L2_MBUS_FMT_Y10_1X10) {
1858                 left += 2;
1859                 right -= 2;
1860                 top += 2;
1861                 bottom -= 2;
1862         }
1863
1864         /* Restrict left/top to even values to keep the Bayer pattern. */
1865         crop->left &= ~1;
1866         crop->top &= ~1;
1867
1868         crop->left = clamp_t(u32, crop->left, left, right - PREV_MIN_OUT_WIDTH);
1869         crop->top = clamp_t(u32, crop->top, top, bottom - PREV_MIN_OUT_HEIGHT);
1870         crop->width = clamp_t(u32, crop->width, PREV_MIN_OUT_WIDTH,
1871                               right - crop->left);
1872         crop->height = clamp_t(u32, crop->height, PREV_MIN_OUT_HEIGHT,
1873                                bottom - crop->top);
1874 }
1875
1876 /*
1877  * preview_enum_mbus_code - Handle pixel format enumeration
1878  * @sd     : pointer to v4l2 subdev structure
1879  * @fh     : V4L2 subdev file handle
1880  * @code   : pointer to v4l2_subdev_mbus_code_enum structure
1881  * return -EINVAL or zero on success
1882  */
1883 static int preview_enum_mbus_code(struct v4l2_subdev *sd,
1884                                   struct v4l2_subdev_fh *fh,
1885                                   struct v4l2_subdev_mbus_code_enum *code)
1886 {
1887         switch (code->pad) {
1888         case PREV_PAD_SINK:
1889                 if (code->index >= ARRAY_SIZE(preview_input_fmts))
1890                         return -EINVAL;
1891
1892                 code->code = preview_input_fmts[code->index];
1893                 break;
1894         case PREV_PAD_SOURCE:
1895                 if (code->index >= ARRAY_SIZE(preview_output_fmts))
1896                         return -EINVAL;
1897
1898                 code->code = preview_output_fmts[code->index];
1899                 break;
1900         default:
1901                 return -EINVAL;
1902         }
1903
1904         return 0;
1905 }
1906
1907 static int preview_enum_frame_size(struct v4l2_subdev *sd,
1908                                    struct v4l2_subdev_fh *fh,
1909                                    struct v4l2_subdev_frame_size_enum *fse)
1910 {
1911         struct isp_prev_device *prev = v4l2_get_subdevdata(sd);
1912         struct v4l2_mbus_framefmt format;
1913
1914         if (fse->index != 0)
1915                 return -EINVAL;
1916
1917         format.code = fse->code;
1918         format.width = 1;
1919         format.height = 1;
1920         preview_try_format(prev, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
1921         fse->min_width = format.width;
1922         fse->min_height = format.height;
1923
1924         if (format.code != fse->code)
1925                 return -EINVAL;
1926
1927         format.code = fse->code;
1928         format.width = -1;
1929         format.height = -1;
1930         preview_try_format(prev, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
1931         fse->max_width = format.width;
1932         fse->max_height = format.height;
1933
1934         return 0;
1935 }
1936
1937 /*
1938  * preview_get_selection - Retrieve a selection rectangle on a pad
1939  * @sd: ISP preview V4L2 subdevice
1940  * @fh: V4L2 subdev file handle
1941  * @sel: Selection rectangle
1942  *
1943  * The only supported rectangles are the crop rectangles on the sink pad.
1944  *
1945  * Return 0 on success or a negative error code otherwise.
1946  */
1947 static int preview_get_selection(struct v4l2_subdev *sd,
1948                                  struct v4l2_subdev_fh *fh,
1949                                  struct v4l2_subdev_selection *sel)
1950 {
1951         struct isp_prev_device *prev = v4l2_get_subdevdata(sd);
1952         struct v4l2_mbus_framefmt *format;
1953
1954         if (sel->pad != PREV_PAD_SINK)
1955                 return -EINVAL;
1956
1957         switch (sel->target) {
1958         case V4L2_SEL_TGT_CROP_BOUNDS:
1959                 sel->r.left = 0;
1960                 sel->r.top = 0;
1961                 sel->r.width = INT_MAX;
1962                 sel->r.height = INT_MAX;
1963
1964                 format = __preview_get_format(prev, fh, PREV_PAD_SINK,
1965                                               sel->which);
1966                 preview_try_crop(prev, format, &sel->r);
1967                 break;
1968
1969         case V4L2_SEL_TGT_CROP:
1970                 sel->r = *__preview_get_crop(prev, fh, sel->which);
1971                 break;
1972
1973         default:
1974                 return -EINVAL;
1975         }
1976
1977         return 0;
1978 }
1979
1980 /*
1981  * preview_set_selection - Set a selection rectangle on a pad
1982  * @sd: ISP preview V4L2 subdevice
1983  * @fh: V4L2 subdev file handle
1984  * @sel: Selection rectangle
1985  *
1986  * The only supported rectangle is the actual crop rectangle on the sink pad.
1987  *
1988  * Return 0 on success or a negative error code otherwise.
1989  */
1990 static int preview_set_selection(struct v4l2_subdev *sd,
1991                                  struct v4l2_subdev_fh *fh,
1992                                  struct v4l2_subdev_selection *sel)
1993 {
1994         struct isp_prev_device *prev = v4l2_get_subdevdata(sd);
1995         struct v4l2_mbus_framefmt *format;
1996
1997         if (sel->target != V4L2_SEL_TGT_CROP ||
1998             sel->pad != PREV_PAD_SINK)
1999                 return -EINVAL;
2000
2001         /* The crop rectangle can't be changed while streaming. */
2002         if (prev->state != ISP_PIPELINE_STREAM_STOPPED)
2003                 return -EBUSY;
2004
2005         /* Modifying the crop rectangle always changes the format on the source
2006          * pad. If the KEEP_CONFIG flag is set, just return the current crop
2007          * rectangle.
2008          */
2009         if (sel->flags & V4L2_SEL_FLAG_KEEP_CONFIG) {
2010                 sel->r = *__preview_get_crop(prev, fh, sel->which);
2011                 return 0;
2012         }
2013
2014         format = __preview_get_format(prev, fh, PREV_PAD_SINK, sel->which);
2015         preview_try_crop(prev, format, &sel->r);
2016         *__preview_get_crop(prev, fh, sel->which) = sel->r;
2017
2018         /* Update the source format. */
2019         format = __preview_get_format(prev, fh, PREV_PAD_SOURCE, sel->which);
2020         preview_try_format(prev, fh, PREV_PAD_SOURCE, format, sel->which);
2021
2022         return 0;
2023 }
2024
2025 /*
2026  * preview_get_format - Handle get format by pads subdev method
2027  * @sd : pointer to v4l2 subdev structure
2028  * @fh : V4L2 subdev file handle
2029  * @fmt: pointer to v4l2 subdev format structure
2030  * return -EINVAL or zero on success
2031  */
2032 static int preview_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
2033                               struct v4l2_subdev_format *fmt)
2034 {
2035         struct isp_prev_device *prev = v4l2_get_subdevdata(sd);
2036         struct v4l2_mbus_framefmt *format;
2037
2038         format = __preview_get_format(prev, fh, fmt->pad, fmt->which);
2039         if (format == NULL)
2040                 return -EINVAL;
2041
2042         fmt->format = *format;
2043         return 0;
2044 }
2045
2046 /*
2047  * preview_set_format - Handle set format by pads subdev method
2048  * @sd : pointer to v4l2 subdev structure
2049  * @fh : V4L2 subdev file handle
2050  * @fmt: pointer to v4l2 subdev format structure
2051  * return -EINVAL or zero on success
2052  */
2053 static int preview_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
2054                               struct v4l2_subdev_format *fmt)
2055 {
2056         struct isp_prev_device *prev = v4l2_get_subdevdata(sd);
2057         struct v4l2_mbus_framefmt *format;
2058         struct v4l2_rect *crop;
2059
2060         format = __preview_get_format(prev, fh, fmt->pad, fmt->which);
2061         if (format == NULL)
2062                 return -EINVAL;
2063
2064         preview_try_format(prev, fh, fmt->pad, &fmt->format, fmt->which);
2065         *format = fmt->format;
2066
2067         /* Propagate the format from sink to source */
2068         if (fmt->pad == PREV_PAD_SINK) {
2069                 /* Reset the crop rectangle. */
2070                 crop = __preview_get_crop(prev, fh, fmt->which);
2071                 crop->left = 0;
2072                 crop->top = 0;
2073                 crop->width = fmt->format.width;
2074                 crop->height = fmt->format.height;
2075
2076                 preview_try_crop(prev, &fmt->format, crop);
2077
2078                 /* Update the source format. */
2079                 format = __preview_get_format(prev, fh, PREV_PAD_SOURCE,
2080                                               fmt->which);
2081                 preview_try_format(prev, fh, PREV_PAD_SOURCE, format,
2082                                    fmt->which);
2083         }
2084
2085         return 0;
2086 }
2087
2088 /*
2089  * preview_init_formats - Initialize formats on all pads
2090  * @sd: ISP preview V4L2 subdevice
2091  * @fh: V4L2 subdev file handle
2092  *
2093  * Initialize all pad formats with default values. If fh is not NULL, try
2094  * formats are initialized on the file handle. Otherwise active formats are
2095  * initialized on the device.
2096  */
2097 static int preview_init_formats(struct v4l2_subdev *sd,
2098                                 struct v4l2_subdev_fh *fh)
2099 {
2100         struct v4l2_subdev_format format;
2101
2102         memset(&format, 0, sizeof(format));
2103         format.pad = PREV_PAD_SINK;
2104         format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
2105         format.format.code = V4L2_MBUS_FMT_SGRBG10_1X10;
2106         format.format.width = 4096;
2107         format.format.height = 4096;
2108         preview_set_format(sd, fh, &format);
2109
2110         return 0;
2111 }
2112
2113 /* subdev core operations */
2114 static const struct v4l2_subdev_core_ops preview_v4l2_core_ops = {
2115         .ioctl = preview_ioctl,
2116 };
2117
2118 /* subdev video operations */
2119 static const struct v4l2_subdev_video_ops preview_v4l2_video_ops = {
2120         .s_stream = preview_set_stream,
2121 };
2122
2123 /* subdev pad operations */
2124 static const struct v4l2_subdev_pad_ops preview_v4l2_pad_ops = {
2125         .enum_mbus_code = preview_enum_mbus_code,
2126         .enum_frame_size = preview_enum_frame_size,
2127         .get_fmt = preview_get_format,
2128         .set_fmt = preview_set_format,
2129         .get_selection = preview_get_selection,
2130         .set_selection = preview_set_selection,
2131 };
2132
2133 /* subdev operations */
2134 static const struct v4l2_subdev_ops preview_v4l2_ops = {
2135         .core = &preview_v4l2_core_ops,
2136         .video = &preview_v4l2_video_ops,
2137         .pad = &preview_v4l2_pad_ops,
2138 };
2139
2140 /* subdev internal operations */
2141 static const struct v4l2_subdev_internal_ops preview_v4l2_internal_ops = {
2142         .open = preview_init_formats,
2143 };
2144
2145 /* -----------------------------------------------------------------------------
2146  * Media entity operations
2147  */
2148
2149 /*
2150  * preview_link_setup - Setup previewer connections.
2151  * @entity : Pointer to media entity structure
2152  * @local  : Pointer to local pad array
2153  * @remote : Pointer to remote pad array
2154  * @flags  : Link flags
2155  * return -EINVAL or zero on success
2156  */
2157 static int preview_link_setup(struct media_entity *entity,
2158                               const struct media_pad *local,
2159                               const struct media_pad *remote, u32 flags)
2160 {
2161         struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
2162         struct isp_prev_device *prev = v4l2_get_subdevdata(sd);
2163
2164         switch (local->index | media_entity_type(remote->entity)) {
2165         case PREV_PAD_SINK | MEDIA_ENT_T_DEVNODE:
2166                 /* read from memory */
2167                 if (flags & MEDIA_LNK_FL_ENABLED) {
2168                         if (prev->input == PREVIEW_INPUT_CCDC)
2169                                 return -EBUSY;
2170                         prev->input = PREVIEW_INPUT_MEMORY;
2171                 } else {
2172                         if (prev->input == PREVIEW_INPUT_MEMORY)
2173                                 prev->input = PREVIEW_INPUT_NONE;
2174                 }
2175                 break;
2176
2177         case PREV_PAD_SINK | MEDIA_ENT_T_V4L2_SUBDEV:
2178                 /* read from ccdc */
2179                 if (flags & MEDIA_LNK_FL_ENABLED) {
2180                         if (prev->input == PREVIEW_INPUT_MEMORY)
2181                                 return -EBUSY;
2182                         prev->input = PREVIEW_INPUT_CCDC;
2183                 } else {
2184                         if (prev->input == PREVIEW_INPUT_CCDC)
2185                                 prev->input = PREVIEW_INPUT_NONE;
2186                 }
2187                 break;
2188
2189         /*
2190          * The ISP core doesn't support pipelines with multiple video outputs.
2191          * Revisit this when it will be implemented, and return -EBUSY for now.
2192          */
2193
2194         case PREV_PAD_SOURCE | MEDIA_ENT_T_DEVNODE:
2195                 /* write to memory */
2196                 if (flags & MEDIA_LNK_FL_ENABLED) {
2197                         if (prev->output & ~PREVIEW_OUTPUT_MEMORY)
2198                                 return -EBUSY;
2199                         prev->output |= PREVIEW_OUTPUT_MEMORY;
2200                 } else {
2201                         prev->output &= ~PREVIEW_OUTPUT_MEMORY;
2202                 }
2203                 break;
2204
2205         case PREV_PAD_SOURCE | MEDIA_ENT_T_V4L2_SUBDEV:
2206                 /* write to resizer */
2207                 if (flags & MEDIA_LNK_FL_ENABLED) {
2208                         if (prev->output & ~PREVIEW_OUTPUT_RESIZER)
2209                                 return -EBUSY;
2210                         prev->output |= PREVIEW_OUTPUT_RESIZER;
2211                 } else {
2212                         prev->output &= ~PREVIEW_OUTPUT_RESIZER;
2213                 }
2214                 break;
2215
2216         default:
2217                 return -EINVAL;
2218         }
2219
2220         return 0;
2221 }
2222
2223 /* media operations */
2224 static const struct media_entity_operations preview_media_ops = {
2225         .link_setup = preview_link_setup,
2226         .link_validate = v4l2_subdev_link_validate,
2227 };
2228
2229 void omap3isp_preview_unregister_entities(struct isp_prev_device *prev)
2230 {
2231         v4l2_device_unregister_subdev(&prev->subdev);
2232         omap3isp_video_unregister(&prev->video_in);
2233         omap3isp_video_unregister(&prev->video_out);
2234 }
2235
2236 int omap3isp_preview_register_entities(struct isp_prev_device *prev,
2237         struct v4l2_device *vdev)
2238 {
2239         int ret;
2240
2241         /* Register the subdev and video nodes. */
2242         ret = v4l2_device_register_subdev(vdev, &prev->subdev);
2243         if (ret < 0)
2244                 goto error;
2245
2246         ret = omap3isp_video_register(&prev->video_in, vdev);
2247         if (ret < 0)
2248                 goto error;
2249
2250         ret = omap3isp_video_register(&prev->video_out, vdev);
2251         if (ret < 0)
2252                 goto error;
2253
2254         return 0;
2255
2256 error:
2257         omap3isp_preview_unregister_entities(prev);
2258         return ret;
2259 }
2260
2261 /* -----------------------------------------------------------------------------
2262  * ISP previewer initialisation and cleanup
2263  */
2264
2265 /*
2266  * preview_init_entities - Initialize subdev and media entity.
2267  * @prev : Pointer to preview structure
2268  * return -ENOMEM or zero on success
2269  */
2270 static int preview_init_entities(struct isp_prev_device *prev)
2271 {
2272         struct v4l2_subdev *sd = &prev->subdev;
2273         struct media_pad *pads = prev->pads;
2274         struct media_entity *me = &sd->entity;
2275         int ret;
2276
2277         prev->input = PREVIEW_INPUT_NONE;
2278
2279         v4l2_subdev_init(sd, &preview_v4l2_ops);
2280         sd->internal_ops = &preview_v4l2_internal_ops;
2281         strlcpy(sd->name, "OMAP3 ISP preview", sizeof(sd->name));
2282         sd->grp_id = 1 << 16;   /* group ID for isp subdevs */
2283         v4l2_set_subdevdata(sd, prev);
2284         sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
2285
2286         v4l2_ctrl_handler_init(&prev->ctrls, 2);
2287         v4l2_ctrl_new_std(&prev->ctrls, &preview_ctrl_ops, V4L2_CID_BRIGHTNESS,
2288                           ISPPRV_BRIGHT_LOW, ISPPRV_BRIGHT_HIGH,
2289                           ISPPRV_BRIGHT_STEP, ISPPRV_BRIGHT_DEF);
2290         v4l2_ctrl_new_std(&prev->ctrls, &preview_ctrl_ops, V4L2_CID_CONTRAST,
2291                           ISPPRV_CONTRAST_LOW, ISPPRV_CONTRAST_HIGH,
2292                           ISPPRV_CONTRAST_STEP, ISPPRV_CONTRAST_DEF);
2293         v4l2_ctrl_handler_setup(&prev->ctrls);
2294         sd->ctrl_handler = &prev->ctrls;
2295
2296         pads[PREV_PAD_SINK].flags = MEDIA_PAD_FL_SINK
2297                                     | MEDIA_PAD_FL_MUST_CONNECT;
2298         pads[PREV_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
2299
2300         me->ops = &preview_media_ops;
2301         ret = media_entity_init(me, PREV_PADS_NUM, pads, 0);
2302         if (ret < 0)
2303                 return ret;
2304
2305         preview_init_formats(sd, NULL);
2306
2307         /* According to the OMAP34xx TRM, video buffers need to be aligned on a
2308          * 32 bytes boundary. However, an undocumented hardware bug requires a
2309          * 64 bytes boundary at the preview engine input.
2310          */
2311         prev->video_in.type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
2312         prev->video_in.ops = &preview_video_ops;
2313         prev->video_in.isp = to_isp_device(prev);
2314         prev->video_in.capture_mem = PAGE_ALIGN(4096 * 4096) * 2 * 3;
2315         prev->video_in.bpl_alignment = 64;
2316         prev->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2317         prev->video_out.ops = &preview_video_ops;
2318         prev->video_out.isp = to_isp_device(prev);
2319         prev->video_out.capture_mem = PAGE_ALIGN(4096 * 4096) * 2 * 3;
2320         prev->video_out.bpl_alignment = 32;
2321
2322         ret = omap3isp_video_init(&prev->video_in, "preview");
2323         if (ret < 0)
2324                 goto error_video_in;
2325
2326         ret = omap3isp_video_init(&prev->video_out, "preview");
2327         if (ret < 0)
2328                 goto error_video_out;
2329
2330         /* Connect the video nodes to the previewer subdev. */
2331         ret = media_entity_create_link(&prev->video_in.video.entity, 0,
2332                         &prev->subdev.entity, PREV_PAD_SINK, 0);
2333         if (ret < 0)
2334                 goto error_link;
2335
2336         ret = media_entity_create_link(&prev->subdev.entity, PREV_PAD_SOURCE,
2337                         &prev->video_out.video.entity, 0, 0);
2338         if (ret < 0)
2339                 goto error_link;
2340
2341         return 0;
2342
2343 error_link:
2344         omap3isp_video_cleanup(&prev->video_out);
2345 error_video_out:
2346         omap3isp_video_cleanup(&prev->video_in);
2347 error_video_in:
2348         media_entity_cleanup(&prev->subdev.entity);
2349         return ret;
2350 }
2351
2352 /*
2353  * omap3isp_preview_init - Previewer initialization.
2354  * @isp : Pointer to ISP device
2355  * return -ENOMEM or zero on success
2356  */
2357 int omap3isp_preview_init(struct isp_device *isp)
2358 {
2359         struct isp_prev_device *prev = &isp->isp_prev;
2360
2361         init_waitqueue_head(&prev->wait);
2362
2363         preview_init_params(prev);
2364
2365         return preview_init_entities(prev);
2366 }
2367
2368 void omap3isp_preview_cleanup(struct isp_device *isp)
2369 {
2370         struct isp_prev_device *prev = &isp->isp_prev;
2371
2372         v4l2_ctrl_handler_free(&prev->ctrls);
2373         omap3isp_video_cleanup(&prev->video_in);
2374         omap3isp_video_cleanup(&prev->video_out);
2375         media_entity_cleanup(&prev->subdev.entity);
2376 }