6 * Copyright (C) 2006-2010 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments, Inc.
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
13 * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 * Sakari Ailus <sakari.ailus@iki.fi>
15 * David Cohen <dacohen@gmail.com>
16 * Stanimir Varbanov <svarbanov@mm-sol.com>
17 * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
18 * Tuukka Toivonen <tuukkat76@gmail.com>
19 * Sergio Aguirre <saaguirre@ti.com>
20 * Antti Koskipaa <akoskipa@gmail.com>
21 * Ivan T. Ivanov <iivanov@mm-sol.com>
22 * RaniSuneela <r-m@ti.com>
23 * Atanas Filipov <afilipov@mm-sol.com>
24 * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
25 * Hiroshi DOYU <hiroshi.doyu@nokia.com>
26 * Nayden Kanchev <nkanchev@mm-sol.com>
27 * Phil Carmody <ext-phil.2.carmody@nokia.com>
28 * Artem Bityutskiy <artem.bityutskiy@nokia.com>
29 * Dominic Curran <dcurran@ti.com>
30 * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
31 * Pallavi Kulkarni <p-kulkarni@ti.com>
32 * Vaibhav Hiremath <hvaibhav@ti.com>
33 * Mohit Jalori <mjalori@ti.com>
34 * Sameer Venkatraman <sameerv@ti.com>
35 * Senthilvadivu Guruswamy <svadivu@ti.com>
36 * Thara Gopinath <thara@ti.com>
37 * Toni Leinonen <toni.leinonen@nokia.com>
38 * Troy Laramy <t-laramy@ti.com>
40 * This program is free software; you can redistribute it and/or modify
41 * it under the terms of the GNU General Public License version 2 as
42 * published by the Free Software Foundation.
44 * This program is distributed in the hope that it will be useful, but
45 * WITHOUT ANY WARRANTY; without even the implied warranty of
46 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
47 * General Public License for more details.
49 * You should have received a copy of the GNU General Public License
50 * along with this program; if not, write to the Free Software
51 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
55 #include <asm/cacheflush.h>
57 #include <linux/clk.h>
58 #include <linux/clkdev.h>
59 #include <linux/delay.h>
60 #include <linux/device.h>
61 #include <linux/dma-mapping.h>
62 #include <linux/i2c.h>
63 #include <linux/interrupt.h>
64 #include <linux/module.h>
65 #include <linux/omap-iommu.h>
66 #include <linux/platform_device.h>
67 #include <linux/regulator/consumer.h>
68 #include <linux/slab.h>
69 #include <linux/sched.h>
70 #include <linux/vmalloc.h>
72 #include <asm/dma-iommu.h>
74 #include <media/v4l2-common.h>
75 #include <media/v4l2-device.h>
80 #include "isppreview.h"
81 #include "ispresizer.h"
87 static unsigned int autoidle;
88 module_param(autoidle, int, 0444);
89 MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
91 static void isp_save_ctx(struct isp_device *isp);
93 static void isp_restore_ctx(struct isp_device *isp);
95 static const struct isp_res_mapping isp_res_maps[] = {
97 .isp_rev = ISP_REVISION_2_0,
98 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
99 1 << OMAP3_ISP_IOMEM_CCP2 |
100 1 << OMAP3_ISP_IOMEM_CCDC |
101 1 << OMAP3_ISP_IOMEM_HIST |
102 1 << OMAP3_ISP_IOMEM_H3A |
103 1 << OMAP3_ISP_IOMEM_PREV |
104 1 << OMAP3_ISP_IOMEM_RESZ |
105 1 << OMAP3_ISP_IOMEM_SBL |
106 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
107 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
108 1 << OMAP3_ISP_IOMEM_343X_CONTROL_CSIRXFE,
111 .isp_rev = ISP_REVISION_15_0,
112 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
113 1 << OMAP3_ISP_IOMEM_CCP2 |
114 1 << OMAP3_ISP_IOMEM_CCDC |
115 1 << OMAP3_ISP_IOMEM_HIST |
116 1 << OMAP3_ISP_IOMEM_H3A |
117 1 << OMAP3_ISP_IOMEM_PREV |
118 1 << OMAP3_ISP_IOMEM_RESZ |
119 1 << OMAP3_ISP_IOMEM_SBL |
120 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
121 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
122 1 << OMAP3_ISP_IOMEM_CSI2A_REGS2 |
123 1 << OMAP3_ISP_IOMEM_CSI2C_REGS1 |
124 1 << OMAP3_ISP_IOMEM_CSIPHY1 |
125 1 << OMAP3_ISP_IOMEM_CSI2C_REGS2 |
126 1 << OMAP3_ISP_IOMEM_3630_CONTROL_CAMERA_PHY_CTRL,
130 /* Structure for saving/restoring ISP module registers */
131 static struct isp_reg isp_reg_list[] = {
132 {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
133 {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
134 {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
139 * omap3isp_flush - Post pending L3 bus writes by doing a register readback
140 * @isp: OMAP3 ISP device
142 * In order to force posting of pending writes, we need to write and
143 * readback the same register, in this case the revision register.
145 * See this link for reference:
146 * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
148 void omap3isp_flush(struct isp_device *isp)
150 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
151 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
154 /* -----------------------------------------------------------------------------
158 #define to_isp_xclk(_hw) container_of(_hw, struct isp_xclk, hw)
160 static void isp_xclk_update(struct isp_xclk *xclk, u32 divider)
164 isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
165 ISPTCTRL_CTRL_DIVA_MASK,
166 divider << ISPTCTRL_CTRL_DIVA_SHIFT);
169 isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
170 ISPTCTRL_CTRL_DIVB_MASK,
171 divider << ISPTCTRL_CTRL_DIVB_SHIFT);
176 static int isp_xclk_prepare(struct clk_hw *hw)
178 struct isp_xclk *xclk = to_isp_xclk(hw);
180 omap3isp_get(xclk->isp);
185 static void isp_xclk_unprepare(struct clk_hw *hw)
187 struct isp_xclk *xclk = to_isp_xclk(hw);
189 omap3isp_put(xclk->isp);
192 static int isp_xclk_enable(struct clk_hw *hw)
194 struct isp_xclk *xclk = to_isp_xclk(hw);
197 spin_lock_irqsave(&xclk->lock, flags);
198 isp_xclk_update(xclk, xclk->divider);
199 xclk->enabled = true;
200 spin_unlock_irqrestore(&xclk->lock, flags);
205 static void isp_xclk_disable(struct clk_hw *hw)
207 struct isp_xclk *xclk = to_isp_xclk(hw);
210 spin_lock_irqsave(&xclk->lock, flags);
211 isp_xclk_update(xclk, 0);
212 xclk->enabled = false;
213 spin_unlock_irqrestore(&xclk->lock, flags);
216 static unsigned long isp_xclk_recalc_rate(struct clk_hw *hw,
217 unsigned long parent_rate)
219 struct isp_xclk *xclk = to_isp_xclk(hw);
221 return parent_rate / xclk->divider;
224 static u32 isp_xclk_calc_divider(unsigned long *rate, unsigned long parent_rate)
228 if (*rate >= parent_rate) {
230 return ISPTCTRL_CTRL_DIV_BYPASS;
233 divider = DIV_ROUND_CLOSEST(parent_rate, *rate);
234 if (divider >= ISPTCTRL_CTRL_DIV_BYPASS)
235 divider = ISPTCTRL_CTRL_DIV_BYPASS - 1;
237 *rate = parent_rate / divider;
241 static long isp_xclk_round_rate(struct clk_hw *hw, unsigned long rate,
242 unsigned long *parent_rate)
244 isp_xclk_calc_divider(&rate, *parent_rate);
248 static int isp_xclk_set_rate(struct clk_hw *hw, unsigned long rate,
249 unsigned long parent_rate)
251 struct isp_xclk *xclk = to_isp_xclk(hw);
255 divider = isp_xclk_calc_divider(&rate, parent_rate);
257 spin_lock_irqsave(&xclk->lock, flags);
259 xclk->divider = divider;
261 isp_xclk_update(xclk, divider);
263 spin_unlock_irqrestore(&xclk->lock, flags);
265 dev_dbg(xclk->isp->dev, "%s: cam_xclk%c set to %lu Hz (div %u)\n",
266 __func__, xclk->id == ISP_XCLK_A ? 'a' : 'b', rate, divider);
270 static const struct clk_ops isp_xclk_ops = {
271 .prepare = isp_xclk_prepare,
272 .unprepare = isp_xclk_unprepare,
273 .enable = isp_xclk_enable,
274 .disable = isp_xclk_disable,
275 .recalc_rate = isp_xclk_recalc_rate,
276 .round_rate = isp_xclk_round_rate,
277 .set_rate = isp_xclk_set_rate,
280 static const char *isp_xclk_parent_name = "cam_mclk";
282 static const struct clk_init_data isp_xclk_init_data = {
284 .ops = &isp_xclk_ops,
285 .parent_names = &isp_xclk_parent_name,
289 static int isp_xclk_init(struct isp_device *isp)
291 struct isp_platform_data *pdata = isp->pdata;
292 struct clk_init_data init;
295 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i)
296 isp->xclks[i].clk = ERR_PTR(-EINVAL);
298 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
299 struct isp_xclk *xclk = &isp->xclks[i];
302 xclk->id = i == 0 ? ISP_XCLK_A : ISP_XCLK_B;
304 spin_lock_init(&xclk->lock);
306 init.name = i == 0 ? "cam_xclka" : "cam_xclkb";
307 init.ops = &isp_xclk_ops;
308 init.parent_names = &isp_xclk_parent_name;
309 init.num_parents = 1;
311 xclk->hw.init = &init;
313 * The first argument is NULL in order to avoid circular
314 * reference, as this driver takes reference on the
315 * sensor subdevice modules and the sensors would take
316 * reference on this module through clk_get().
318 xclk->clk = clk_register(NULL, &xclk->hw);
319 if (IS_ERR(xclk->clk))
320 return PTR_ERR(xclk->clk);
322 if (pdata->xclks[i].con_id == NULL &&
323 pdata->xclks[i].dev_id == NULL)
326 xclk->lookup = kzalloc(sizeof(*xclk->lookup), GFP_KERNEL);
327 if (xclk->lookup == NULL)
330 xclk->lookup->con_id = pdata->xclks[i].con_id;
331 xclk->lookup->dev_id = pdata->xclks[i].dev_id;
332 xclk->lookup->clk = xclk->clk;
334 clkdev_add(xclk->lookup);
340 static void isp_xclk_cleanup(struct isp_device *isp)
344 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
345 struct isp_xclk *xclk = &isp->xclks[i];
347 if (!IS_ERR(xclk->clk))
348 clk_unregister(xclk->clk);
351 clkdev_drop(xclk->lookup);
355 /* -----------------------------------------------------------------------------
360 * isp_enable_interrupts - Enable ISP interrupts.
361 * @isp: OMAP3 ISP device
363 static void isp_enable_interrupts(struct isp_device *isp)
365 static const u32 irq = IRQ0ENABLE_CSIA_IRQ
366 | IRQ0ENABLE_CSIB_IRQ
367 | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
368 | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
369 | IRQ0ENABLE_CCDC_VD0_IRQ
370 | IRQ0ENABLE_CCDC_VD1_IRQ
371 | IRQ0ENABLE_HS_VS_IRQ
372 | IRQ0ENABLE_HIST_DONE_IRQ
373 | IRQ0ENABLE_H3A_AWB_DONE_IRQ
374 | IRQ0ENABLE_H3A_AF_DONE_IRQ
375 | IRQ0ENABLE_PRV_DONE_IRQ
376 | IRQ0ENABLE_RSZ_DONE_IRQ;
378 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
379 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
383 * isp_disable_interrupts - Disable ISP interrupts.
384 * @isp: OMAP3 ISP device
386 static void isp_disable_interrupts(struct isp_device *isp)
388 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
392 * isp_core_init - ISP core settings
393 * @isp: OMAP3 ISP device
394 * @idle: Consider idle state.
396 * Set the power settings for the ISP and SBL bus and configure the HS/VS
399 * We need to configure the HS/VS interrupt source before interrupts get
400 * enabled, as the sensor might be free-running and the ISP default setting
401 * (HS edge) would put an unnecessary burden on the CPU.
403 static void isp_core_init(struct isp_device *isp, int idle)
406 ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
407 ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
408 ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
409 ((isp->revision == ISP_REVISION_15_0) ?
410 ISP_SYSCONFIG_AUTOIDLE : 0),
411 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
414 (isp->autoidle ? ISPCTRL_SBL_AUTOIDLE : 0) |
415 ISPCTRL_SYNC_DETECT_VSRISE,
416 OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
420 * Configure the bridge and lane shifter. Valid inputs are
422 * CCDC_INPUT_PARALLEL: Parallel interface
423 * CCDC_INPUT_CSI2A: CSI2a receiver
424 * CCDC_INPUT_CCP2B: CCP2b receiver
425 * CCDC_INPUT_CSI2C: CSI2c receiver
427 * The bridge and lane shifter are configured according to the selected input
428 * and the ISP platform data.
430 void omap3isp_configure_bridge(struct isp_device *isp,
431 enum ccdc_input_entity input,
432 const struct isp_parallel_platform_data *pdata,
433 unsigned int shift, unsigned int bridge)
437 ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
438 ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
439 ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
440 ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
441 ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
442 ispctrl_val |= bridge;
445 case CCDC_INPUT_PARALLEL:
446 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
447 ispctrl_val |= pdata->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
448 shift += pdata->data_lane_shift * 2;
451 case CCDC_INPUT_CSI2A:
452 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
455 case CCDC_INPUT_CCP2B:
456 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
459 case CCDC_INPUT_CSI2C:
460 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
467 ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
469 isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
472 void omap3isp_hist_dma_done(struct isp_device *isp)
474 if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
475 omap3isp_stat_pcr_busy(&isp->isp_hist)) {
476 /* Histogram cannot be enabled in this frame anymore */
477 atomic_set(&isp->isp_hist.buf_err, 1);
478 dev_dbg(isp->dev, "hist: Out of synchronization with "
479 "CCDC. Ignoring next buffer.\n");
483 static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
485 static const char *name[] = {
504 "CCDC_LSC_PREFETCH_COMPLETED",
505 "CCDC_LSC_PREFETCH_ERROR",
521 dev_dbg(isp->dev, "ISP IRQ: ");
523 for (i = 0; i < ARRAY_SIZE(name); i++) {
524 if ((1 << i) & irqstatus)
525 printk(KERN_CONT "%s ", name[i]);
527 printk(KERN_CONT "\n");
530 static void isp_isr_sbl(struct isp_device *isp)
532 struct device *dev = isp->dev;
533 struct isp_pipeline *pipe;
537 * Handle shared buffer logic overflows for video buffers.
538 * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
540 sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
541 isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
542 sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
545 dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
547 if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
548 pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
553 if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
554 pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
559 if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
560 pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
565 if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
566 pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
571 if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
572 | ISPSBL_PCR_RSZ2_WBL_OVF
573 | ISPSBL_PCR_RSZ3_WBL_OVF
574 | ISPSBL_PCR_RSZ4_WBL_OVF)) {
575 pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
580 if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
581 omap3isp_stat_sbl_overflow(&isp->isp_af);
583 if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
584 omap3isp_stat_sbl_overflow(&isp->isp_aewb);
588 * isp_isr - Interrupt Service Routine for Camera ISP module.
589 * @irq: Not used currently.
590 * @_isp: Pointer to the OMAP3 ISP device
592 * Handles the corresponding callback if plugged in.
594 static irqreturn_t isp_isr(int irq, void *_isp)
596 static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
597 IRQ0STATUS_CCDC_LSC_DONE_IRQ |
598 IRQ0STATUS_CCDC_VD0_IRQ |
599 IRQ0STATUS_CCDC_VD1_IRQ |
600 IRQ0STATUS_HS_VS_IRQ;
601 struct isp_device *isp = _isp;
604 irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
605 isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
609 if (irqstatus & IRQ0STATUS_CSIA_IRQ)
610 omap3isp_csi2_isr(&isp->isp_csi2a);
612 if (irqstatus & IRQ0STATUS_CSIB_IRQ)
613 omap3isp_ccp2_isr(&isp->isp_ccp2);
615 if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
616 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
617 omap3isp_preview_isr_frame_sync(&isp->isp_prev);
618 if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
619 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
620 omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
621 omap3isp_stat_isr_frame_sync(&isp->isp_af);
622 omap3isp_stat_isr_frame_sync(&isp->isp_hist);
625 if (irqstatus & ccdc_events)
626 omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
628 if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
629 if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
630 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
631 omap3isp_preview_isr(&isp->isp_prev);
634 if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
635 omap3isp_resizer_isr(&isp->isp_res);
637 if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
638 omap3isp_stat_isr(&isp->isp_aewb);
640 if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
641 omap3isp_stat_isr(&isp->isp_af);
643 if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
644 omap3isp_stat_isr(&isp->isp_hist);
648 #if defined(DEBUG) && defined(ISP_ISR_DEBUG)
649 isp_isr_dbg(isp, irqstatus);
655 /* -----------------------------------------------------------------------------
656 * Pipeline power management
658 * Entities must be powered up when part of a pipeline that contains at least
659 * one open video device node.
661 * To achieve this use the entity use_count field to track the number of users.
662 * For entities corresponding to video device nodes the use_count field stores
663 * the users count of the node. For entities corresponding to subdevs the
664 * use_count field stores the total number of users of all video device nodes
667 * The omap3isp_pipeline_pm_use() function must be called in the open() and
668 * close() handlers of video device nodes. It increments or decrements the use
669 * count of all subdev entities in the pipeline.
671 * To react to link management on powered pipelines, the link setup notification
672 * callback updates the use count of all entities in the source and sink sides
677 * isp_pipeline_pm_use_count - Count the number of users of a pipeline
678 * @entity: The entity
680 * Return the total number of users of all video device nodes in the pipeline.
682 static int isp_pipeline_pm_use_count(struct media_entity *entity)
684 struct media_entity_graph graph;
687 media_entity_graph_walk_start(&graph, entity);
689 while ((entity = media_entity_graph_walk_next(&graph))) {
690 if (media_entity_type(entity) == MEDIA_ENT_T_DEVNODE)
691 use += entity->use_count;
698 * isp_pipeline_pm_power_one - Apply power change to an entity
699 * @entity: The entity
700 * @change: Use count change
702 * Change the entity use count by @change. If the entity is a subdev update its
703 * power state by calling the core::s_power operation when the use count goes
704 * from 0 to != 0 or from != 0 to 0.
706 * Return 0 on success or a negative error code on failure.
708 static int isp_pipeline_pm_power_one(struct media_entity *entity, int change)
710 struct v4l2_subdev *subdev;
713 subdev = media_entity_type(entity) == MEDIA_ENT_T_V4L2_SUBDEV
714 ? media_entity_to_v4l2_subdev(entity) : NULL;
716 if (entity->use_count == 0 && change > 0 && subdev != NULL) {
717 ret = v4l2_subdev_call(subdev, core, s_power, 1);
718 if (ret < 0 && ret != -ENOIOCTLCMD)
722 entity->use_count += change;
723 WARN_ON(entity->use_count < 0);
725 if (entity->use_count == 0 && change < 0 && subdev != NULL)
726 v4l2_subdev_call(subdev, core, s_power, 0);
732 * isp_pipeline_pm_power - Apply power change to all entities in a pipeline
733 * @entity: The entity
734 * @change: Use count change
736 * Walk the pipeline to update the use count and the power state of all non-node
739 * Return 0 on success or a negative error code on failure.
741 static int isp_pipeline_pm_power(struct media_entity *entity, int change)
743 struct media_entity_graph graph;
744 struct media_entity *first = entity;
750 media_entity_graph_walk_start(&graph, entity);
752 while (!ret && (entity = media_entity_graph_walk_next(&graph)))
753 if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE)
754 ret = isp_pipeline_pm_power_one(entity, change);
759 media_entity_graph_walk_start(&graph, first);
761 while ((first = media_entity_graph_walk_next(&graph))
763 if (media_entity_type(first) != MEDIA_ENT_T_DEVNODE)
764 isp_pipeline_pm_power_one(first, -change);
770 * omap3isp_pipeline_pm_use - Update the use count of an entity
771 * @entity: The entity
772 * @use: Use (1) or stop using (0) the entity
774 * Update the use count of all entities in the pipeline and power entities on or
777 * Return 0 on success or a negative error code on failure. Powering entities
778 * off is assumed to never fail. No failure can occur when the use parameter is
781 int omap3isp_pipeline_pm_use(struct media_entity *entity, int use)
783 int change = use ? 1 : -1;
786 mutex_lock(&entity->parent->graph_mutex);
788 /* Apply use count to node. */
789 entity->use_count += change;
790 WARN_ON(entity->use_count < 0);
792 /* Apply power change to connected non-nodes. */
793 ret = isp_pipeline_pm_power(entity, change);
795 entity->use_count -= change;
797 mutex_unlock(&entity->parent->graph_mutex);
803 * isp_pipeline_link_notify - Link management notification callback
805 * @flags: New link flags that will be applied
806 * @notification: The link's state change notification type (MEDIA_DEV_NOTIFY_*)
808 * React to link management on powered pipelines by updating the use count of
809 * all entities in the source and sink sides of the link. Entities are powered
810 * on or off accordingly.
812 * Return 0 on success or a negative error code on failure. Powering entities
813 * off is assumed to never fail. This function will not fail for disconnection
816 static int isp_pipeline_link_notify(struct media_link *link, u32 flags,
817 unsigned int notification)
819 struct media_entity *source = link->source->entity;
820 struct media_entity *sink = link->sink->entity;
821 int source_use = isp_pipeline_pm_use_count(source);
822 int sink_use = isp_pipeline_pm_use_count(sink);
825 if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH &&
826 !(link->flags & MEDIA_LNK_FL_ENABLED)) {
827 /* Powering off entities is assumed to never fail. */
828 isp_pipeline_pm_power(source, -sink_use);
829 isp_pipeline_pm_power(sink, -source_use);
833 if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH &&
834 (flags & MEDIA_LNK_FL_ENABLED)) {
836 ret = isp_pipeline_pm_power(source, sink_use);
840 ret = isp_pipeline_pm_power(sink, source_use);
842 isp_pipeline_pm_power(source, -sink_use);
850 /* -----------------------------------------------------------------------------
851 * Pipeline stream management
855 * isp_pipeline_enable - Enable streaming on a pipeline
856 * @pipe: ISP pipeline
857 * @mode: Stream mode (single shot or continuous)
859 * Walk the entities chain starting at the pipeline output video node and start
860 * all modules in the chain in the given mode.
862 * Return 0 if successful, or the return value of the failed video::s_stream
863 * operation otherwise.
865 static int isp_pipeline_enable(struct isp_pipeline *pipe,
866 enum isp_pipeline_stream_state mode)
868 struct isp_device *isp = pipe->output->isp;
869 struct media_entity *entity;
870 struct media_pad *pad;
871 struct v4l2_subdev *subdev;
875 /* Refuse to start streaming if an entity included in the pipeline has
876 * crashed. This check must be performed before the loop below to avoid
877 * starting entities if the pipeline won't start anyway (those entities
878 * would then likely fail to stop, making the problem worse).
880 if (pipe->entities & isp->crashed)
883 spin_lock_irqsave(&pipe->lock, flags);
884 pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
885 spin_unlock_irqrestore(&pipe->lock, flags);
887 pipe->do_propagation = false;
889 entity = &pipe->output->video.entity;
891 pad = &entity->pads[0];
892 if (!(pad->flags & MEDIA_PAD_FL_SINK))
895 pad = media_entity_remote_pad(pad);
897 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
900 entity = pad->entity;
901 subdev = media_entity_to_v4l2_subdev(entity);
903 ret = v4l2_subdev_call(subdev, video, s_stream, mode);
904 if (ret < 0 && ret != -ENOIOCTLCMD)
907 if (subdev == &isp->isp_ccdc.subdev) {
908 v4l2_subdev_call(&isp->isp_aewb.subdev, video,
910 v4l2_subdev_call(&isp->isp_af.subdev, video,
912 v4l2_subdev_call(&isp->isp_hist.subdev, video,
914 pipe->do_propagation = true;
921 static int isp_pipeline_wait_resizer(struct isp_device *isp)
923 return omap3isp_resizer_busy(&isp->isp_res);
926 static int isp_pipeline_wait_preview(struct isp_device *isp)
928 return omap3isp_preview_busy(&isp->isp_prev);
931 static int isp_pipeline_wait_ccdc(struct isp_device *isp)
933 return omap3isp_stat_busy(&isp->isp_af)
934 || omap3isp_stat_busy(&isp->isp_aewb)
935 || omap3isp_stat_busy(&isp->isp_hist)
936 || omap3isp_ccdc_busy(&isp->isp_ccdc);
939 #define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
941 static int isp_pipeline_wait(struct isp_device *isp,
942 int(*busy)(struct isp_device *isp))
944 unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
946 while (!time_after(jiffies, timeout)) {
955 * isp_pipeline_disable - Disable streaming on a pipeline
956 * @pipe: ISP pipeline
958 * Walk the entities chain starting at the pipeline output video node and stop
959 * all modules in the chain. Wait synchronously for the modules to be stopped if
962 * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
963 * can't be stopped (in which case a software reset of the ISP is probably
966 static int isp_pipeline_disable(struct isp_pipeline *pipe)
968 struct isp_device *isp = pipe->output->isp;
969 struct media_entity *entity;
970 struct media_pad *pad;
971 struct v4l2_subdev *subdev;
976 * We need to stop all the modules after CCDC first or they'll
977 * never stop since they may not get a full frame from CCDC.
979 entity = &pipe->output->video.entity;
981 pad = &entity->pads[0];
982 if (!(pad->flags & MEDIA_PAD_FL_SINK))
985 pad = media_entity_remote_pad(pad);
987 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
990 entity = pad->entity;
991 subdev = media_entity_to_v4l2_subdev(entity);
993 if (subdev == &isp->isp_ccdc.subdev) {
994 v4l2_subdev_call(&isp->isp_aewb.subdev,
996 v4l2_subdev_call(&isp->isp_af.subdev,
998 v4l2_subdev_call(&isp->isp_hist.subdev,
1002 ret = v4l2_subdev_call(subdev, video, s_stream, 0);
1004 if (subdev == &isp->isp_res.subdev)
1005 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
1006 else if (subdev == &isp->isp_prev.subdev)
1007 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_preview);
1008 else if (subdev == &isp->isp_ccdc.subdev)
1009 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
1011 /* Handle stop failures. An entity that fails to stop can
1012 * usually just be restarted. Flag the stop failure nonetheless
1013 * to trigger an ISP reset the next time the device is released,
1016 * The preview engine is a special case. A failure to stop can
1017 * mean a hardware crash. When that happens the preview engine
1018 * won't respond to read/write operations on the L4 bus anymore,
1019 * resulting in a bus fault and a kernel oops next time it gets
1020 * accessed. Mark it as crashed to prevent pipelines including
1021 * it from being started.
1024 dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
1025 isp->stop_failure = true;
1026 if (subdev == &isp->isp_prev.subdev)
1027 isp->crashed |= 1U << subdev->entity.id;
1028 failure = -ETIMEDOUT;
1036 * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
1037 * @pipe: ISP pipeline
1038 * @state: Stream state (stopped, single shot or continuous)
1040 * Set the pipeline to the given stream state. Pipelines can be started in
1041 * single-shot or continuous mode.
1043 * Return 0 if successful, or the return value of the failed video::s_stream
1044 * operation otherwise. The pipeline state is not updated when the operation
1045 * fails, except when stopping the pipeline.
1047 int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
1048 enum isp_pipeline_stream_state state)
1052 if (state == ISP_PIPELINE_STREAM_STOPPED)
1053 ret = isp_pipeline_disable(pipe);
1055 ret = isp_pipeline_enable(pipe, state);
1057 if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
1058 pipe->stream_state = state;
1064 * omap3isp_pipeline_cancel_stream - Cancel stream on a pipeline
1065 * @pipe: ISP pipeline
1067 * Cancelling a stream mark all buffers on all video nodes in the pipeline as
1068 * erroneous and makes sure no new buffer can be queued. This function is called
1069 * when a fatal error that prevents any further operation on the pipeline
1072 void omap3isp_pipeline_cancel_stream(struct isp_pipeline *pipe)
1075 omap3isp_video_cancel_stream(pipe->input);
1077 omap3isp_video_cancel_stream(pipe->output);
1081 * isp_pipeline_resume - Resume streaming on a pipeline
1082 * @pipe: ISP pipeline
1084 * Resume video output and input and re-enable pipeline.
1086 static void isp_pipeline_resume(struct isp_pipeline *pipe)
1088 int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
1090 omap3isp_video_resume(pipe->output, !singleshot);
1092 omap3isp_video_resume(pipe->input, 0);
1093 isp_pipeline_enable(pipe, pipe->stream_state);
1097 * isp_pipeline_suspend - Suspend streaming on a pipeline
1098 * @pipe: ISP pipeline
1102 static void isp_pipeline_suspend(struct isp_pipeline *pipe)
1104 isp_pipeline_disable(pipe);
1108 * isp_pipeline_is_last - Verify if entity has an enabled link to the output
1110 * @me: ISP module's media entity
1112 * Returns 1 if the entity has an enabled link to the output video node or 0
1113 * otherwise. It's true only while pipeline can have no more than one output
1116 static int isp_pipeline_is_last(struct media_entity *me)
1118 struct isp_pipeline *pipe;
1119 struct media_pad *pad;
1123 pipe = to_isp_pipeline(me);
1124 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
1126 pad = media_entity_remote_pad(&pipe->output->pad);
1127 return pad->entity == me;
1131 * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
1132 * @me: ISP module's media entity
1134 * Suspend the whole pipeline if module's entity has an enabled link to the
1135 * output video node. It works only while pipeline can have no more than one
1138 static void isp_suspend_module_pipeline(struct media_entity *me)
1140 if (isp_pipeline_is_last(me))
1141 isp_pipeline_suspend(to_isp_pipeline(me));
1145 * isp_resume_module_pipeline - Resume pipeline to which belongs the module
1146 * @me: ISP module's media entity
1148 * Resume the whole pipeline if module's entity has an enabled link to the
1149 * output video node. It works only while pipeline can have no more than one
1152 static void isp_resume_module_pipeline(struct media_entity *me)
1154 if (isp_pipeline_is_last(me))
1155 isp_pipeline_resume(to_isp_pipeline(me));
1159 * isp_suspend_modules - Suspend ISP submodules.
1160 * @isp: OMAP3 ISP device
1162 * Returns 0 if suspend left in idle state all the submodules properly,
1163 * or returns 1 if a general Reset is required to suspend the submodules.
1165 static int isp_suspend_modules(struct isp_device *isp)
1167 unsigned long timeout;
1169 omap3isp_stat_suspend(&isp->isp_aewb);
1170 omap3isp_stat_suspend(&isp->isp_af);
1171 omap3isp_stat_suspend(&isp->isp_hist);
1172 isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
1173 isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
1174 isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
1175 isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
1176 isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
1178 timeout = jiffies + ISP_STOP_TIMEOUT;
1179 while (omap3isp_stat_busy(&isp->isp_af)
1180 || omap3isp_stat_busy(&isp->isp_aewb)
1181 || omap3isp_stat_busy(&isp->isp_hist)
1182 || omap3isp_preview_busy(&isp->isp_prev)
1183 || omap3isp_resizer_busy(&isp->isp_res)
1184 || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
1185 if (time_after(jiffies, timeout)) {
1186 dev_info(isp->dev, "can't stop modules.\n");
1196 * isp_resume_modules - Resume ISP submodules.
1197 * @isp: OMAP3 ISP device
1199 static void isp_resume_modules(struct isp_device *isp)
1201 omap3isp_stat_resume(&isp->isp_aewb);
1202 omap3isp_stat_resume(&isp->isp_af);
1203 omap3isp_stat_resume(&isp->isp_hist);
1204 isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
1205 isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
1206 isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
1207 isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
1208 isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
1212 * isp_reset - Reset ISP with a timeout wait for idle.
1213 * @isp: OMAP3 ISP device
1215 static int isp_reset(struct isp_device *isp)
1217 unsigned long timeout = 0;
1220 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
1221 | ISP_SYSCONFIG_SOFTRESET,
1222 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
1223 while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
1224 ISP_SYSSTATUS) & 0x1)) {
1225 if (timeout++ > 10000) {
1226 dev_alert(isp->dev, "cannot reset ISP\n");
1232 isp->stop_failure = false;
1238 * isp_save_context - Saves the values of the ISP module registers.
1239 * @isp: OMAP3 ISP device
1240 * @reg_list: Structure containing pairs of register address and value to
1244 isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
1246 struct isp_reg *next = reg_list;
1248 for (; next->reg != ISP_TOK_TERM; next++)
1249 next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
1253 * isp_restore_context - Restores the values of the ISP module registers.
1254 * @isp: OMAP3 ISP device
1255 * @reg_list: Structure containing pairs of register address and value to
1259 isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
1261 struct isp_reg *next = reg_list;
1263 for (; next->reg != ISP_TOK_TERM; next++)
1264 isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
1268 * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1269 * @isp: OMAP3 ISP device
1271 * Routine for saving the context of each module in the ISP.
1272 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1274 static void isp_save_ctx(struct isp_device *isp)
1276 isp_save_context(isp, isp_reg_list);
1277 omap_iommu_save_ctx(isp->dev);
1281 * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1282 * @isp: OMAP3 ISP device
1284 * Routine for restoring the context of each module in the ISP.
1285 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1287 static void isp_restore_ctx(struct isp_device *isp)
1289 isp_restore_context(isp, isp_reg_list);
1290 omap_iommu_restore_ctx(isp->dev);
1291 omap3isp_ccdc_restore_context(isp);
1292 omap3isp_preview_restore_context(isp);
1295 /* -----------------------------------------------------------------------------
1296 * SBL resources management
1298 #define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
1299 OMAP3_ISP_SBL_CCDC_LSC_READ | \
1300 OMAP3_ISP_SBL_PREVIEW_READ | \
1301 OMAP3_ISP_SBL_RESIZER_READ)
1302 #define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
1303 OMAP3_ISP_SBL_CSI2A_WRITE | \
1304 OMAP3_ISP_SBL_CSI2C_WRITE | \
1305 OMAP3_ISP_SBL_CCDC_WRITE | \
1306 OMAP3_ISP_SBL_PREVIEW_WRITE)
1308 void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
1312 isp->sbl_resources |= res;
1314 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
1315 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1317 if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
1318 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1320 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
1321 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1323 if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
1324 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1326 if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
1327 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1329 if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
1330 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1332 isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1335 void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
1339 isp->sbl_resources &= ~res;
1341 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
1342 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1344 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
1345 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1347 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
1348 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1350 if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
1351 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1353 if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
1354 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1356 if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
1357 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1359 isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1363 * isp_module_sync_idle - Helper to sync module with its idle state
1364 * @me: ISP submodule's media entity
1365 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1366 * @stopping: flag which tells module wants to stop
1368 * This function checks if ISP submodule needs to wait for next interrupt. If
1369 * yes, makes the caller to sleep while waiting for such event.
1371 int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
1374 struct isp_pipeline *pipe = to_isp_pipeline(me);
1376 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
1377 (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1378 !isp_pipeline_ready(pipe)))
1382 * atomic_set() doesn't include memory barrier on ARM platform for SMP
1383 * scenario. We'll call it here to avoid race conditions.
1385 atomic_set(stopping, 1);
1389 * If module is the last one, it's writing to memory. In this case,
1390 * it's necessary to check if the module is already paused due to
1391 * DMA queue underrun or if it has to wait for next interrupt to be
1393 * If it isn't the last one, the function won't sleep but *stopping
1394 * will still be set to warn next submodule caller's interrupt the
1395 * module wants to be idle.
1397 if (isp_pipeline_is_last(me)) {
1398 struct isp_video *video = pipe->output;
1399 unsigned long flags;
1400 spin_lock_irqsave(&video->irqlock, flags);
1401 if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
1402 spin_unlock_irqrestore(&video->irqlock, flags);
1403 atomic_set(stopping, 0);
1407 spin_unlock_irqrestore(&video->irqlock, flags);
1408 if (!wait_event_timeout(*wait, !atomic_read(stopping),
1409 msecs_to_jiffies(1000))) {
1410 atomic_set(stopping, 0);
1420 * omap3isp_module_sync_is_stopping - Helper to verify if module was stopping
1421 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1422 * @stopping: flag which tells module wants to stop
1424 * This function checks if ISP submodule was stopping. In case of yes, it
1425 * notices the caller by setting stopping to 0 and waking up the wait queue.
1426 * Returns 1 if it was stopping or 0 otherwise.
1428 int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
1431 if (atomic_cmpxchg(stopping, 1, 0)) {
1439 /* --------------------------------------------------------------------------
1443 #define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
1444 ISPCTRL_HIST_CLK_EN | \
1445 ISPCTRL_RSZ_CLK_EN | \
1446 (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
1447 (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
1449 static void __isp_subclk_update(struct isp_device *isp)
1453 /* AEWB and AF share the same clock. */
1454 if (isp->subclk_resources &
1455 (OMAP3_ISP_SUBCLK_AEWB | OMAP3_ISP_SUBCLK_AF))
1456 clk |= ISPCTRL_H3A_CLK_EN;
1458 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
1459 clk |= ISPCTRL_HIST_CLK_EN;
1461 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
1462 clk |= ISPCTRL_RSZ_CLK_EN;
1464 /* NOTE: For CCDC & Preview submodules, we need to affect internal
1467 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
1468 clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
1470 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
1471 clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
1473 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
1474 ISPCTRL_CLKS_MASK, clk);
1477 void omap3isp_subclk_enable(struct isp_device *isp,
1478 enum isp_subclk_resource res)
1480 isp->subclk_resources |= res;
1482 __isp_subclk_update(isp);
1485 void omap3isp_subclk_disable(struct isp_device *isp,
1486 enum isp_subclk_resource res)
1488 isp->subclk_resources &= ~res;
1490 __isp_subclk_update(isp);
1494 * isp_enable_clocks - Enable ISP clocks
1495 * @isp: OMAP3 ISP device
1497 * Return 0 if successful, or clk_prepare_enable return value if any of them
1500 static int isp_enable_clocks(struct isp_device *isp)
1505 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_ICK]);
1507 dev_err(isp->dev, "failed to enable cam_ick clock\n");
1508 goto out_clk_enable_ick;
1510 r = clk_set_rate(isp->clock[ISP_CLK_CAM_MCLK], CM_CAM_MCLK_HZ);
1512 dev_err(isp->dev, "clk_set_rate for cam_mclk failed\n");
1513 goto out_clk_enable_mclk;
1515 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_MCLK]);
1517 dev_err(isp->dev, "failed to enable cam_mclk clock\n");
1518 goto out_clk_enable_mclk;
1520 rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
1521 if (rate != CM_CAM_MCLK_HZ)
1522 dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
1524 " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
1525 r = clk_prepare_enable(isp->clock[ISP_CLK_CSI2_FCK]);
1527 dev_err(isp->dev, "failed to enable csi2_fck clock\n");
1528 goto out_clk_enable_csi2_fclk;
1532 out_clk_enable_csi2_fclk:
1533 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
1534 out_clk_enable_mclk:
1535 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
1541 * isp_disable_clocks - Disable ISP clocks
1542 * @isp: OMAP3 ISP device
1544 static void isp_disable_clocks(struct isp_device *isp)
1546 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
1547 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
1548 clk_disable_unprepare(isp->clock[ISP_CLK_CSI2_FCK]);
1551 static const char *isp_clocks[] = {
1558 static int isp_get_clocks(struct isp_device *isp)
1563 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1564 clk = devm_clk_get(isp->dev, isp_clocks[i]);
1566 dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
1567 return PTR_ERR(clk);
1570 isp->clock[i] = clk;
1577 * omap3isp_get - Acquire the ISP resource.
1579 * Initializes the clocks for the first acquire.
1581 * Increment the reference count on the ISP. If the first reference is taken,
1582 * enable clocks and power-up all submodules.
1584 * Return a pointer to the ISP device structure, or NULL if an error occurred.
1586 static struct isp_device *__omap3isp_get(struct isp_device *isp, bool irq)
1588 struct isp_device *__isp = isp;
1593 mutex_lock(&isp->isp_mutex);
1594 if (isp->ref_count > 0)
1597 if (isp_enable_clocks(isp) < 0) {
1602 /* We don't want to restore context before saving it! */
1603 if (isp->has_context)
1604 isp_restore_ctx(isp);
1607 isp_enable_interrupts(isp);
1612 mutex_unlock(&isp->isp_mutex);
1617 struct isp_device *omap3isp_get(struct isp_device *isp)
1619 return __omap3isp_get(isp, true);
1623 * omap3isp_put - Release the ISP
1625 * Decrement the reference count on the ISP. If the last reference is released,
1626 * power-down all submodules, disable clocks and free temporary buffers.
1628 static void __omap3isp_put(struct isp_device *isp, bool save_ctx)
1633 mutex_lock(&isp->isp_mutex);
1634 BUG_ON(isp->ref_count == 0);
1635 if (--isp->ref_count == 0) {
1636 isp_disable_interrupts(isp);
1639 isp->has_context = 1;
1641 /* Reset the ISP if an entity has failed to stop. This is the
1642 * only way to recover from such conditions.
1644 if (isp->crashed || isp->stop_failure)
1646 isp_disable_clocks(isp);
1648 mutex_unlock(&isp->isp_mutex);
1651 void omap3isp_put(struct isp_device *isp)
1653 __omap3isp_put(isp, true);
1656 /* --------------------------------------------------------------------------
1657 * Platform device driver
1661 * omap3isp_print_status - Prints the values of the ISP Control Module registers
1662 * @isp: OMAP3 ISP device
1664 #define ISP_PRINT_REGISTER(isp, name)\
1665 dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
1666 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
1667 #define SBL_PRINT_REGISTER(isp, name)\
1668 dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
1669 isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
1671 void omap3isp_print_status(struct isp_device *isp)
1673 dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
1675 ISP_PRINT_REGISTER(isp, SYSCONFIG);
1676 ISP_PRINT_REGISTER(isp, SYSSTATUS);
1677 ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
1678 ISP_PRINT_REGISTER(isp, IRQ0STATUS);
1679 ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
1680 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
1681 ISP_PRINT_REGISTER(isp, CTRL);
1682 ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
1683 ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
1684 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
1685 ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
1686 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
1687 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
1688 ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
1689 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
1691 SBL_PRINT_REGISTER(isp, PCR);
1692 SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
1694 dev_dbg(isp->dev, "--------------------------------------------\n");
1700 * Power management support.
1702 * As the ISP can't properly handle an input video stream interruption on a non
1703 * frame boundary, the ISP pipelines need to be stopped before sensors get
1704 * suspended. However, as suspending the sensors can require a running clock,
1705 * which can be provided by the ISP, the ISP can't be completely suspended
1706 * before the sensor.
1708 * To solve this problem power management support is split into prepare/complete
1709 * and suspend/resume operations. The pipelines are stopped in prepare() and the
1710 * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
1711 * resume(), and the the pipelines are restarted in complete().
1713 * TODO: PM dependencies between the ISP and sensors are not modelled explicitly
1716 static int isp_pm_prepare(struct device *dev)
1718 struct isp_device *isp = dev_get_drvdata(dev);
1721 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1723 if (isp->ref_count == 0)
1726 reset = isp_suspend_modules(isp);
1727 isp_disable_interrupts(isp);
1735 static int isp_pm_suspend(struct device *dev)
1737 struct isp_device *isp = dev_get_drvdata(dev);
1739 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1742 isp_disable_clocks(isp);
1747 static int isp_pm_resume(struct device *dev)
1749 struct isp_device *isp = dev_get_drvdata(dev);
1751 if (isp->ref_count == 0)
1754 return isp_enable_clocks(isp);
1757 static void isp_pm_complete(struct device *dev)
1759 struct isp_device *isp = dev_get_drvdata(dev);
1761 if (isp->ref_count == 0)
1764 isp_restore_ctx(isp);
1765 isp_enable_interrupts(isp);
1766 isp_resume_modules(isp);
1771 #define isp_pm_prepare NULL
1772 #define isp_pm_suspend NULL
1773 #define isp_pm_resume NULL
1774 #define isp_pm_complete NULL
1776 #endif /* CONFIG_PM */
1778 static void isp_unregister_entities(struct isp_device *isp)
1780 omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
1781 omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
1782 omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
1783 omap3isp_preview_unregister_entities(&isp->isp_prev);
1784 omap3isp_resizer_unregister_entities(&isp->isp_res);
1785 omap3isp_stat_unregister_entities(&isp->isp_aewb);
1786 omap3isp_stat_unregister_entities(&isp->isp_af);
1787 omap3isp_stat_unregister_entities(&isp->isp_hist);
1789 v4l2_device_unregister(&isp->v4l2_dev);
1790 media_device_unregister(&isp->media_dev);
1794 * isp_register_subdev_group - Register a group of subdevices
1795 * @isp: OMAP3 ISP device
1796 * @board_info: I2C subdevs board information array
1798 * Register all I2C subdevices in the board_info array. The array must be
1799 * terminated by a NULL entry, and the first entry must be the sensor.
1801 * Return a pointer to the sensor media entity if it has been successfully
1802 * registered, or NULL otherwise.
1804 static struct v4l2_subdev *
1805 isp_register_subdev_group(struct isp_device *isp,
1806 struct isp_subdev_i2c_board_info *board_info)
1808 struct v4l2_subdev *sensor = NULL;
1811 if (board_info->board_info == NULL)
1814 for (first = 1; board_info->board_info; ++board_info, first = 0) {
1815 struct v4l2_subdev *subdev;
1816 struct i2c_adapter *adapter;
1818 adapter = i2c_get_adapter(board_info->i2c_adapter_id);
1819 if (adapter == NULL) {
1820 dev_err(isp->dev, "%s: Unable to get I2C adapter %d for "
1821 "device %s\n", __func__,
1822 board_info->i2c_adapter_id,
1823 board_info->board_info->type);
1827 subdev = v4l2_i2c_new_subdev_board(&isp->v4l2_dev, adapter,
1828 board_info->board_info, NULL);
1829 if (subdev == NULL) {
1830 dev_err(isp->dev, "%s: Unable to register subdev %s\n",
1831 __func__, board_info->board_info->type);
1842 static int isp_register_entities(struct isp_device *isp)
1844 struct isp_platform_data *pdata = isp->pdata;
1845 struct isp_v4l2_subdevs_group *subdevs;
1848 isp->media_dev.dev = isp->dev;
1849 strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
1850 sizeof(isp->media_dev.model));
1851 isp->media_dev.hw_revision = isp->revision;
1852 isp->media_dev.link_notify = isp_pipeline_link_notify;
1853 ret = media_device_register(&isp->media_dev);
1855 dev_err(isp->dev, "%s: Media device registration failed (%d)\n",
1860 isp->v4l2_dev.mdev = &isp->media_dev;
1861 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
1863 dev_err(isp->dev, "%s: V4L2 device registration failed (%d)\n",
1868 /* Register internal entities */
1869 ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
1873 ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
1877 ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
1881 ret = omap3isp_preview_register_entities(&isp->isp_prev,
1886 ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
1890 ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
1894 ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
1898 ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
1902 /* Register external entities */
1903 for (subdevs = pdata->subdevs; subdevs && subdevs->subdevs; ++subdevs) {
1904 struct v4l2_subdev *sensor;
1905 struct media_entity *input;
1910 sensor = isp_register_subdev_group(isp, subdevs->subdevs);
1914 sensor->host_priv = subdevs;
1916 /* Connect the sensor to the correct interface module. Parallel
1917 * sensors are connected directly to the CCDC, while serial
1918 * sensors are connected to the CSI2a, CCP2b or CSI2c receiver
1919 * through CSIPHY1 or CSIPHY2.
1921 switch (subdevs->interface) {
1922 case ISP_INTERFACE_PARALLEL:
1923 input = &isp->isp_ccdc.subdev.entity;
1924 pad = CCDC_PAD_SINK;
1928 case ISP_INTERFACE_CSI2A_PHY2:
1929 input = &isp->isp_csi2a.subdev.entity;
1930 pad = CSI2_PAD_SINK;
1931 flags = MEDIA_LNK_FL_IMMUTABLE
1932 | MEDIA_LNK_FL_ENABLED;
1935 case ISP_INTERFACE_CCP2B_PHY1:
1936 case ISP_INTERFACE_CCP2B_PHY2:
1937 input = &isp->isp_ccp2.subdev.entity;
1938 pad = CCP2_PAD_SINK;
1942 case ISP_INTERFACE_CSI2C_PHY1:
1943 input = &isp->isp_csi2c.subdev.entity;
1944 pad = CSI2_PAD_SINK;
1945 flags = MEDIA_LNK_FL_IMMUTABLE
1946 | MEDIA_LNK_FL_ENABLED;
1950 dev_err(isp->dev, "%s: invalid interface type %u\n",
1951 __func__, subdevs->interface);
1956 for (i = 0; i < sensor->entity.num_pads; i++) {
1957 if (sensor->entity.pads[i].flags & MEDIA_PAD_FL_SOURCE)
1960 if (i == sensor->entity.num_pads) {
1962 "%s: no source pad in external entity\n",
1968 ret = media_entity_create_link(&sensor->entity, i, input, pad,
1974 ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
1978 isp_unregister_entities(isp);
1983 static void isp_cleanup_modules(struct isp_device *isp)
1985 omap3isp_h3a_aewb_cleanup(isp);
1986 omap3isp_h3a_af_cleanup(isp);
1987 omap3isp_hist_cleanup(isp);
1988 omap3isp_resizer_cleanup(isp);
1989 omap3isp_preview_cleanup(isp);
1990 omap3isp_ccdc_cleanup(isp);
1991 omap3isp_ccp2_cleanup(isp);
1992 omap3isp_csi2_cleanup(isp);
1995 static int isp_initialize_modules(struct isp_device *isp)
1999 ret = omap3isp_csiphy_init(isp);
2001 dev_err(isp->dev, "CSI PHY initialization failed\n");
2005 ret = omap3isp_csi2_init(isp);
2007 dev_err(isp->dev, "CSI2 initialization failed\n");
2011 ret = omap3isp_ccp2_init(isp);
2013 dev_err(isp->dev, "CCP2 initialization failed\n");
2017 ret = omap3isp_ccdc_init(isp);
2019 dev_err(isp->dev, "CCDC initialization failed\n");
2023 ret = omap3isp_preview_init(isp);
2025 dev_err(isp->dev, "Preview initialization failed\n");
2029 ret = omap3isp_resizer_init(isp);
2031 dev_err(isp->dev, "Resizer initialization failed\n");
2035 ret = omap3isp_hist_init(isp);
2037 dev_err(isp->dev, "Histogram initialization failed\n");
2041 ret = omap3isp_h3a_aewb_init(isp);
2043 dev_err(isp->dev, "H3A AEWB initialization failed\n");
2044 goto error_h3a_aewb;
2047 ret = omap3isp_h3a_af_init(isp);
2049 dev_err(isp->dev, "H3A AF initialization failed\n");
2053 /* Connect the submodules. */
2054 ret = media_entity_create_link(
2055 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
2056 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
2060 ret = media_entity_create_link(
2061 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
2062 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
2066 ret = media_entity_create_link(
2067 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2068 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
2072 ret = media_entity_create_link(
2073 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
2074 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
2078 ret = media_entity_create_link(
2079 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
2080 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
2084 ret = media_entity_create_link(
2085 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2086 &isp->isp_aewb.subdev.entity, 0,
2087 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
2091 ret = media_entity_create_link(
2092 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2093 &isp->isp_af.subdev.entity, 0,
2094 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
2098 ret = media_entity_create_link(
2099 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2100 &isp->isp_hist.subdev.entity, 0,
2101 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
2108 omap3isp_h3a_af_cleanup(isp);
2110 omap3isp_h3a_aewb_cleanup(isp);
2112 omap3isp_hist_cleanup(isp);
2114 omap3isp_resizer_cleanup(isp);
2116 omap3isp_preview_cleanup(isp);
2118 omap3isp_ccdc_cleanup(isp);
2120 omap3isp_ccp2_cleanup(isp);
2122 omap3isp_csi2_cleanup(isp);
2128 static void isp_detach_iommu(struct isp_device *isp)
2130 arm_iommu_release_mapping(isp->mapping);
2131 isp->mapping = NULL;
2132 iommu_group_remove_device(isp->dev);
2135 static int isp_attach_iommu(struct isp_device *isp)
2137 struct dma_iommu_mapping *mapping;
2138 struct iommu_group *group;
2141 /* Create a device group and add the device to it. */
2142 group = iommu_group_alloc();
2143 if (IS_ERR(group)) {
2144 dev_err(isp->dev, "failed to allocate IOMMU group\n");
2145 return PTR_ERR(group);
2148 ret = iommu_group_add_device(group, isp->dev);
2149 iommu_group_put(group);
2152 dev_err(isp->dev, "failed to add device to IPMMU group\n");
2157 * Create the ARM mapping, used by the ARM DMA mapping core to allocate
2158 * VAs. This will allocate a corresponding IOMMU domain.
2160 mapping = arm_iommu_create_mapping(&platform_bus_type, SZ_1G, SZ_2G);
2161 if (IS_ERR(mapping)) {
2162 dev_err(isp->dev, "failed to create ARM IOMMU mapping\n");
2163 ret = PTR_ERR(mapping);
2167 isp->mapping = mapping;
2169 /* Attach the ARM VA mapping to the device. */
2170 ret = arm_iommu_attach_device(isp->dev, mapping);
2172 dev_err(isp->dev, "failed to attach device to VA mapping\n");
2179 isp_detach_iommu(isp);
2184 * isp_remove - Remove ISP platform device
2185 * @pdev: Pointer to ISP platform device
2189 static int isp_remove(struct platform_device *pdev)
2191 struct isp_device *isp = platform_get_drvdata(pdev);
2193 isp_unregister_entities(isp);
2194 isp_cleanup_modules(isp);
2195 isp_xclk_cleanup(isp);
2197 __omap3isp_get(isp, false);
2198 isp_detach_iommu(isp);
2199 __omap3isp_put(isp, false);
2204 static int isp_map_mem_resource(struct platform_device *pdev,
2205 struct isp_device *isp,
2206 enum isp_mem_resources res)
2208 struct resource *mem;
2210 /* request the mem region for the camera registers */
2212 mem = platform_get_resource(pdev, IORESOURCE_MEM, res);
2214 /* map the region */
2215 isp->mmio_base[res] = devm_ioremap_resource(isp->dev, mem);
2216 if (IS_ERR(isp->mmio_base[res]))
2217 return PTR_ERR(isp->mmio_base[res]);
2219 isp->mmio_base_phys[res] = mem->start;
2225 * isp_probe - Probe ISP platform device
2226 * @pdev: Pointer to ISP platform device
2228 * Returns 0 if successful,
2229 * -ENOMEM if no memory available,
2230 * -ENODEV if no platform device resources found
2231 * or no space for remapping registers,
2232 * -EINVAL if couldn't install ISR,
2233 * or clk_get return error value.
2235 static int isp_probe(struct platform_device *pdev)
2237 struct isp_platform_data *pdata = pdev->dev.platform_data;
2238 struct isp_device *isp;
2245 isp = devm_kzalloc(&pdev->dev, sizeof(*isp), GFP_KERNEL);
2247 dev_err(&pdev->dev, "could not allocate memory\n");
2251 isp->autoidle = autoidle;
2253 mutex_init(&isp->isp_mutex);
2254 spin_lock_init(&isp->stat_lock);
2256 isp->dev = &pdev->dev;
2260 ret = dma_coerce_mask_and_coherent(isp->dev, DMA_BIT_MASK(32));
2264 platform_set_drvdata(pdev, isp);
2267 isp->isp_csiphy1.vdd = devm_regulator_get(&pdev->dev, "VDD_CSIPHY1");
2268 isp->isp_csiphy2.vdd = devm_regulator_get(&pdev->dev, "VDD_CSIPHY2");
2272 * The ISP clock tree is revision-dependent. We thus need to enable ICLK
2273 * manually to read the revision before calling __omap3isp_get().
2275 ret = isp_map_mem_resource(pdev, isp, OMAP3_ISP_IOMEM_MAIN);
2279 ret = isp_get_clocks(isp);
2283 ret = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
2287 isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
2288 dev_info(isp->dev, "Revision %d.%d found\n",
2289 (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
2291 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
2293 if (__omap3isp_get(isp, false) == NULL) {
2298 ret = isp_reset(isp);
2302 ret = isp_xclk_init(isp);
2306 /* Memory resources */
2307 for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
2308 if (isp->revision == isp_res_maps[m].isp_rev)
2311 if (m == ARRAY_SIZE(isp_res_maps)) {
2312 dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
2313 (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
2318 for (i = 1; i < OMAP3_ISP_IOMEM_LAST; i++) {
2319 if (isp_res_maps[m].map & 1 << i) {
2320 ret = isp_map_mem_resource(pdev, isp, i);
2327 ret = isp_attach_iommu(isp);
2329 dev_err(&pdev->dev, "unable to attach to IOMMU\n");
2334 isp->irq_num = platform_get_irq(pdev, 0);
2335 if (isp->irq_num <= 0) {
2336 dev_err(isp->dev, "No IRQ resource\n");
2341 if (devm_request_irq(isp->dev, isp->irq_num, isp_isr, IRQF_SHARED,
2342 "OMAP3 ISP", isp)) {
2343 dev_err(isp->dev, "Unable to request IRQ\n");
2349 ret = isp_initialize_modules(isp);
2353 ret = isp_register_entities(isp);
2357 isp_core_init(isp, 1);
2363 isp_cleanup_modules(isp);
2365 isp_detach_iommu(isp);
2367 isp_xclk_cleanup(isp);
2368 __omap3isp_put(isp, false);
2370 mutex_destroy(&isp->isp_mutex);
2375 static const struct dev_pm_ops omap3isp_pm_ops = {
2376 .prepare = isp_pm_prepare,
2377 .suspend = isp_pm_suspend,
2378 .resume = isp_pm_resume,
2379 .complete = isp_pm_complete,
2382 static struct platform_device_id omap3isp_id_table[] = {
2386 MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
2388 static struct platform_driver omap3isp_driver = {
2390 .remove = isp_remove,
2391 .id_table = omap3isp_id_table,
2393 .owner = THIS_MODULE,
2395 .pm = &omap3isp_pm_ops,
2399 module_platform_driver(omap3isp_driver);
2401 MODULE_AUTHOR("Nokia Corporation");
2402 MODULE_DESCRIPTION("TI OMAP3 ISP driver");
2403 MODULE_LICENSE("GPL");
2404 MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);