treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157
[sfrench/cifs-2.6.git] / drivers / media / pci / cx88 / cx88-video.c
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  *
4  * device driver for Conexant 2388x based TV cards
5  * video4linux video interface
6  *
7  * (c) 2003-04 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
8  *
9  * (c) 2005-2006 Mauro Carvalho Chehab <mchehab@kernel.org>
10  *      - Multituner support
11  *      - video_ioctl2 conversion
12  *      - PAL/M fixes
13  */
14
15 #include "cx88.h"
16
17 #include <linux/init.h>
18 #include <linux/list.h>
19 #include <linux/module.h>
20 #include <linux/kmod.h>
21 #include <linux/kernel.h>
22 #include <linux/slab.h>
23 #include <linux/interrupt.h>
24 #include <linux/dma-mapping.h>
25 #include <linux/delay.h>
26 #include <linux/kthread.h>
27 #include <asm/div64.h>
28
29 #include <media/v4l2-common.h>
30 #include <media/v4l2-ioctl.h>
31 #include <media/v4l2-event.h>
32 #include <media/i2c/wm8775.h>
33
34 MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards");
35 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
36 MODULE_LICENSE("GPL");
37 MODULE_VERSION(CX88_VERSION);
38
39 /* ------------------------------------------------------------------ */
40
41 static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
42 static unsigned int vbi_nr[]   = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
43 static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
44
45 module_param_array(video_nr, int, NULL, 0444);
46 module_param_array(vbi_nr,   int, NULL, 0444);
47 module_param_array(radio_nr, int, NULL, 0444);
48
49 MODULE_PARM_DESC(video_nr, "video device numbers");
50 MODULE_PARM_DESC(vbi_nr, "vbi device numbers");
51 MODULE_PARM_DESC(radio_nr, "radio device numbers");
52
53 static unsigned int video_debug;
54 module_param(video_debug, int, 0644);
55 MODULE_PARM_DESC(video_debug, "enable debug messages [video]");
56
57 static unsigned int irq_debug;
58 module_param(irq_debug, int, 0644);
59 MODULE_PARM_DESC(irq_debug, "enable debug messages [IRQ handler]");
60
61 #define dprintk(level, fmt, arg...) do {                        \
62         if (video_debug >= level)                               \
63                 printk(KERN_DEBUG pr_fmt("%s: video:" fmt),     \
64                         __func__, ##arg);                       \
65 } while (0)
66
67 /* ------------------------------------------------------------------- */
68 /* static data                                                         */
69
70 static const struct cx8800_fmt formats[] = {
71         {
72                 .name     = "8 bpp, gray",
73                 .fourcc   = V4L2_PIX_FMT_GREY,
74                 .cxformat = ColorFormatY8,
75                 .depth    = 8,
76                 .flags    = FORMAT_FLAGS_PACKED,
77         }, {
78                 .name     = "15 bpp RGB, le",
79                 .fourcc   = V4L2_PIX_FMT_RGB555,
80                 .cxformat = ColorFormatRGB15,
81                 .depth    = 16,
82                 .flags    = FORMAT_FLAGS_PACKED,
83         }, {
84                 .name     = "15 bpp RGB, be",
85                 .fourcc   = V4L2_PIX_FMT_RGB555X,
86                 .cxformat = ColorFormatRGB15 | ColorFormatBSWAP,
87                 .depth    = 16,
88                 .flags    = FORMAT_FLAGS_PACKED,
89         }, {
90                 .name     = "16 bpp RGB, le",
91                 .fourcc   = V4L2_PIX_FMT_RGB565,
92                 .cxformat = ColorFormatRGB16,
93                 .depth    = 16,
94                 .flags    = FORMAT_FLAGS_PACKED,
95         }, {
96                 .name     = "16 bpp RGB, be",
97                 .fourcc   = V4L2_PIX_FMT_RGB565X,
98                 .cxformat = ColorFormatRGB16 | ColorFormatBSWAP,
99                 .depth    = 16,
100                 .flags    = FORMAT_FLAGS_PACKED,
101         }, {
102                 .name     = "24 bpp RGB, le",
103                 .fourcc   = V4L2_PIX_FMT_BGR24,
104                 .cxformat = ColorFormatRGB24,
105                 .depth    = 24,
106                 .flags    = FORMAT_FLAGS_PACKED,
107         }, {
108                 .name     = "32 bpp RGB, le",
109                 .fourcc   = V4L2_PIX_FMT_BGR32,
110                 .cxformat = ColorFormatRGB32,
111                 .depth    = 32,
112                 .flags    = FORMAT_FLAGS_PACKED,
113         }, {
114                 .name     = "32 bpp RGB, be",
115                 .fourcc   = V4L2_PIX_FMT_RGB32,
116                 .cxformat = ColorFormatRGB32 | ColorFormatBSWAP |
117                             ColorFormatWSWAP,
118                 .depth    = 32,
119                 .flags    = FORMAT_FLAGS_PACKED,
120         }, {
121                 .name     = "4:2:2, packed, YUYV",
122                 .fourcc   = V4L2_PIX_FMT_YUYV,
123                 .cxformat = ColorFormatYUY2,
124                 .depth    = 16,
125                 .flags    = FORMAT_FLAGS_PACKED,
126         }, {
127                 .name     = "4:2:2, packed, UYVY",
128                 .fourcc   = V4L2_PIX_FMT_UYVY,
129                 .cxformat = ColorFormatYUY2 | ColorFormatBSWAP,
130                 .depth    = 16,
131                 .flags    = FORMAT_FLAGS_PACKED,
132         },
133 };
134
135 static const struct cx8800_fmt *format_by_fourcc(unsigned int fourcc)
136 {
137         unsigned int i;
138
139         for (i = 0; i < ARRAY_SIZE(formats); i++)
140                 if (formats[i].fourcc == fourcc)
141                         return formats + i;
142         return NULL;
143 }
144
145 /* ------------------------------------------------------------------- */
146
147 struct cx88_ctrl {
148         /* control information */
149         u32 id;
150         s32 minimum;
151         s32 maximum;
152         u32 step;
153         s32 default_value;
154
155         /* control register information */
156         u32 off;
157         u32 reg;
158         u32 sreg;
159         u32 mask;
160         u32 shift;
161 };
162
163 static const struct cx88_ctrl cx8800_vid_ctls[] = {
164         /* --- video --- */
165         {
166                 .id            = V4L2_CID_BRIGHTNESS,
167                 .minimum       = 0x00,
168                 .maximum       = 0xff,
169                 .step          = 1,
170                 .default_value = 0x7f,
171                 .off           = 128,
172                 .reg           = MO_CONTR_BRIGHT,
173                 .mask          = 0x00ff,
174                 .shift         = 0,
175         }, {
176                 .id            = V4L2_CID_CONTRAST,
177                 .minimum       = 0,
178                 .maximum       = 0xff,
179                 .step          = 1,
180                 .default_value = 0x3f,
181                 .off           = 0,
182                 .reg           = MO_CONTR_BRIGHT,
183                 .mask          = 0xff00,
184                 .shift         = 8,
185         }, {
186                 .id            = V4L2_CID_HUE,
187                 .minimum       = 0,
188                 .maximum       = 0xff,
189                 .step          = 1,
190                 .default_value = 0x7f,
191                 .off           = 128,
192                 .reg           = MO_HUE,
193                 .mask          = 0x00ff,
194                 .shift         = 0,
195         }, {
196                 /* strictly, this only describes only U saturation.
197                  * V saturation is handled specially through code.
198                  */
199                 .id            = V4L2_CID_SATURATION,
200                 .minimum       = 0,
201                 .maximum       = 0xff,
202                 .step          = 1,
203                 .default_value = 0x7f,
204                 .off           = 0,
205                 .reg           = MO_UV_SATURATION,
206                 .mask          = 0x00ff,
207                 .shift         = 0,
208         }, {
209                 .id            = V4L2_CID_SHARPNESS,
210                 .minimum       = 0,
211                 .maximum       = 4,
212                 .step          = 1,
213                 .default_value = 0x0,
214                 .off           = 0,
215                 /*
216                  * NOTE: the value is converted and written to both even
217                  * and odd registers in the code
218                  */
219                 .reg           = MO_FILTER_ODD,
220                 .mask          = 7 << 7,
221                 .shift         = 7,
222         }, {
223                 .id            = V4L2_CID_CHROMA_AGC,
224                 .minimum       = 0,
225                 .maximum       = 1,
226                 .default_value = 0x1,
227                 .reg           = MO_INPUT_FORMAT,
228                 .mask          = 1 << 10,
229                 .shift         = 10,
230         }, {
231                 .id            = V4L2_CID_COLOR_KILLER,
232                 .minimum       = 0,
233                 .maximum       = 1,
234                 .default_value = 0x1,
235                 .reg           = MO_INPUT_FORMAT,
236                 .mask          = 1 << 9,
237                 .shift         = 9,
238         }, {
239                 .id            = V4L2_CID_BAND_STOP_FILTER,
240                 .minimum       = 0,
241                 .maximum       = 1,
242                 .step          = 1,
243                 .default_value = 0x0,
244                 .off           = 0,
245                 .reg           = MO_HTOTAL,
246                 .mask          = 3 << 11,
247                 .shift         = 11,
248         }
249 };
250
251 static const struct cx88_ctrl cx8800_aud_ctls[] = {
252         {
253                 /* --- audio --- */
254                 .id            = V4L2_CID_AUDIO_MUTE,
255                 .minimum       = 0,
256                 .maximum       = 1,
257                 .default_value = 1,
258                 .reg           = AUD_VOL_CTL,
259                 .sreg          = SHADOW_AUD_VOL_CTL,
260                 .mask          = (1 << 6),
261                 .shift         = 6,
262         }, {
263                 .id            = V4L2_CID_AUDIO_VOLUME,
264                 .minimum       = 0,
265                 .maximum       = 0x3f,
266                 .step          = 1,
267                 .default_value = 0x3f,
268                 .reg           = AUD_VOL_CTL,
269                 .sreg          = SHADOW_AUD_VOL_CTL,
270                 .mask          = 0x3f,
271                 .shift         = 0,
272         }, {
273                 .id            = V4L2_CID_AUDIO_BALANCE,
274                 .minimum       = 0,
275                 .maximum       = 0x7f,
276                 .step          = 1,
277                 .default_value = 0x40,
278                 .reg           = AUD_BAL_CTL,
279                 .sreg          = SHADOW_AUD_BAL_CTL,
280                 .mask          = 0x7f,
281                 .shift         = 0,
282         }
283 };
284
285 enum {
286         CX8800_VID_CTLS = ARRAY_SIZE(cx8800_vid_ctls),
287         CX8800_AUD_CTLS = ARRAY_SIZE(cx8800_aud_ctls),
288 };
289
290 /* ------------------------------------------------------------------ */
291
292 int cx88_video_mux(struct cx88_core *core, unsigned int input)
293 {
294         /* struct cx88_core *core = dev->core; */
295
296         dprintk(1, "video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n",
297                 input, INPUT(input).vmux,
298                 INPUT(input).gpio0, INPUT(input).gpio1,
299                 INPUT(input).gpio2, INPUT(input).gpio3);
300         core->input = input;
301         cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input).vmux << 14);
302         cx_write(MO_GP3_IO, INPUT(input).gpio3);
303         cx_write(MO_GP0_IO, INPUT(input).gpio0);
304         cx_write(MO_GP1_IO, INPUT(input).gpio1);
305         cx_write(MO_GP2_IO, INPUT(input).gpio2);
306
307         switch (INPUT(input).type) {
308         case CX88_VMUX_SVIDEO:
309                 cx_set(MO_AFECFG_IO,    0x00000001);
310                 cx_set(MO_INPUT_FORMAT, 0x00010010);
311                 cx_set(MO_FILTER_EVEN,  0x00002020);
312                 cx_set(MO_FILTER_ODD,   0x00002020);
313                 break;
314         default:
315                 cx_clear(MO_AFECFG_IO,    0x00000001);
316                 cx_clear(MO_INPUT_FORMAT, 0x00010010);
317                 cx_clear(MO_FILTER_EVEN,  0x00002020);
318                 cx_clear(MO_FILTER_ODD,   0x00002020);
319                 break;
320         }
321
322         /*
323          * if there are audioroutes defined, we have an external
324          * ADC to deal with audio
325          */
326         if (INPUT(input).audioroute) {
327                 /*
328                  * The wm8775 module has the "2" route hardwired into
329                  * the initialization. Some boards may use different
330                  * routes for different inputs. HVR-1300 surely does
331                  */
332                 if (core->sd_wm8775) {
333                         call_all(core, audio, s_routing,
334                                  INPUT(input).audioroute, 0, 0);
335                 }
336                 /*
337                  * cx2388's C-ADC is connected to the tuner only.
338                  * When used with S-Video, that ADC is busy dealing with
339                  * chroma, so an external must be used for baseband audio
340                  */
341                 if (INPUT(input).type != CX88_VMUX_TELEVISION &&
342                     INPUT(input).type != CX88_VMUX_CABLE) {
343                         /* "I2S ADC mode" */
344                         core->tvaudio = WW_I2SADC;
345                         cx88_set_tvaudio(core);
346                 } else {
347                         /* Normal mode */
348                         cx_write(AUD_I2SCNTL, 0x0);
349                         cx_clear(AUD_CTL, EN_I2SIN_ENABLE);
350                 }
351         }
352
353         return 0;
354 }
355 EXPORT_SYMBOL(cx88_video_mux);
356
357 /* ------------------------------------------------------------------ */
358
359 static int start_video_dma(struct cx8800_dev    *dev,
360                            struct cx88_dmaqueue *q,
361                            struct cx88_buffer   *buf)
362 {
363         struct cx88_core *core = dev->core;
364
365         /* setup fifo + format */
366         cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH21],
367                                 buf->bpl, buf->risc.dma);
368         cx88_set_scale(core, core->width, core->height, core->field);
369         cx_write(MO_COLOR_CTRL, dev->fmt->cxformat | ColorFormatGamma);
370
371         /* reset counter */
372         cx_write(MO_VIDY_GPCNTRL, GP_COUNT_CONTROL_RESET);
373         q->count = 0;
374
375         /* enable irqs */
376         cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT);
377
378         /*
379          * Enables corresponding bits at PCI_INT_STAT:
380          *      bits 0 to 4: video, audio, transport stream, VIP, Host
381          *      bit 7: timer
382          *      bits 8 and 9: DMA complete for: SRC, DST
383          *      bits 10 and 11: BERR signal asserted for RISC: RD, WR
384          *      bits 12 to 15: BERR signal asserted for: BRDG, SRC, DST, IPB
385          */
386         cx_set(MO_VID_INTMSK, 0x0f0011);
387
388         /* enable capture */
389         cx_set(VID_CAPTURE_CONTROL, 0x06);
390
391         /* start dma */
392         cx_set(MO_DEV_CNTRL2, (1 << 5));
393         cx_set(MO_VID_DMACNTRL, 0x11); /* Planar Y and packed FIFO and RISC enable */
394
395         return 0;
396 }
397
398 #ifdef CONFIG_PM
399 static int stop_video_dma(struct cx8800_dev    *dev)
400 {
401         struct cx88_core *core = dev->core;
402
403         /* stop dma */
404         cx_clear(MO_VID_DMACNTRL, 0x11);
405
406         /* disable capture */
407         cx_clear(VID_CAPTURE_CONTROL, 0x06);
408
409         /* disable irqs */
410         cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT);
411         cx_clear(MO_VID_INTMSK, 0x0f0011);
412         return 0;
413 }
414
415 static int restart_video_queue(struct cx8800_dev    *dev,
416                                struct cx88_dmaqueue *q)
417 {
418         struct cx88_buffer *buf;
419
420         if (!list_empty(&q->active)) {
421                 buf = list_entry(q->active.next, struct cx88_buffer, list);
422                 dprintk(2, "restart_queue [%p/%d]: restart dma\n",
423                         buf, buf->vb.vb2_buf.index);
424                 start_video_dma(dev, q, buf);
425         }
426         return 0;
427 }
428 #endif
429
430 /* ------------------------------------------------------------------ */
431
432 static int queue_setup(struct vb2_queue *q,
433                        unsigned int *num_buffers, unsigned int *num_planes,
434                        unsigned int sizes[], struct device *alloc_devs[])
435 {
436         struct cx8800_dev *dev = q->drv_priv;
437         struct cx88_core *core = dev->core;
438
439         *num_planes = 1;
440         sizes[0] = (dev->fmt->depth * core->width * core->height) >> 3;
441         return 0;
442 }
443
444 static int buffer_prepare(struct vb2_buffer *vb)
445 {
446         struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
447         struct cx8800_dev *dev = vb->vb2_queue->drv_priv;
448         struct cx88_core *core = dev->core;
449         struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
450         struct sg_table *sgt = vb2_dma_sg_plane_desc(vb, 0);
451
452         buf->bpl = core->width * dev->fmt->depth >> 3;
453
454         if (vb2_plane_size(vb, 0) < core->height * buf->bpl)
455                 return -EINVAL;
456         vb2_set_plane_payload(vb, 0, core->height * buf->bpl);
457
458         switch (core->field) {
459         case V4L2_FIELD_TOP:
460                 cx88_risc_buffer(dev->pci, &buf->risc,
461                                  sgt->sgl, 0, UNSET,
462                                  buf->bpl, 0, core->height);
463                 break;
464         case V4L2_FIELD_BOTTOM:
465                 cx88_risc_buffer(dev->pci, &buf->risc,
466                                  sgt->sgl, UNSET, 0,
467                                  buf->bpl, 0, core->height);
468                 break;
469         case V4L2_FIELD_SEQ_TB:
470                 cx88_risc_buffer(dev->pci, &buf->risc,
471                                  sgt->sgl,
472                                  0, buf->bpl * (core->height >> 1),
473                                  buf->bpl, 0,
474                                  core->height >> 1);
475                 break;
476         case V4L2_FIELD_SEQ_BT:
477                 cx88_risc_buffer(dev->pci, &buf->risc,
478                                  sgt->sgl,
479                                  buf->bpl * (core->height >> 1), 0,
480                                  buf->bpl, 0,
481                                  core->height >> 1);
482                 break;
483         case V4L2_FIELD_INTERLACED:
484         default:
485                 cx88_risc_buffer(dev->pci, &buf->risc,
486                                  sgt->sgl, 0, buf->bpl,
487                                  buf->bpl, buf->bpl,
488                                  core->height >> 1);
489                 break;
490         }
491         dprintk(2,
492                 "[%p/%d] buffer_prepare - %dx%d %dbpp \"%s\" - dma=0x%08lx\n",
493                 buf, buf->vb.vb2_buf.index,
494                 core->width, core->height, dev->fmt->depth, dev->fmt->name,
495                 (unsigned long)buf->risc.dma);
496         return 0;
497 }
498
499 static void buffer_finish(struct vb2_buffer *vb)
500 {
501         struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
502         struct cx8800_dev *dev = vb->vb2_queue->drv_priv;
503         struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
504         struct cx88_riscmem *risc = &buf->risc;
505
506         if (risc->cpu)
507                 pci_free_consistent(dev->pci, risc->size, risc->cpu, risc->dma);
508         memset(risc, 0, sizeof(*risc));
509 }
510
511 static void buffer_queue(struct vb2_buffer *vb)
512 {
513         struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
514         struct cx8800_dev *dev = vb->vb2_queue->drv_priv;
515         struct cx88_buffer    *buf = container_of(vbuf, struct cx88_buffer, vb);
516         struct cx88_buffer    *prev;
517         struct cx88_dmaqueue  *q    = &dev->vidq;
518
519         /* add jump to start */
520         buf->risc.cpu[1] = cpu_to_le32(buf->risc.dma + 8);
521         buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_CNT_INC);
522         buf->risc.jmp[1] = cpu_to_le32(buf->risc.dma + 8);
523
524         if (list_empty(&q->active)) {
525                 list_add_tail(&buf->list, &q->active);
526                 dprintk(2, "[%p/%d] buffer_queue - first active\n",
527                         buf, buf->vb.vb2_buf.index);
528
529         } else {
530                 buf->risc.cpu[0] |= cpu_to_le32(RISC_IRQ1);
531                 prev = list_entry(q->active.prev, struct cx88_buffer, list);
532                 list_add_tail(&buf->list, &q->active);
533                 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
534                 dprintk(2, "[%p/%d] buffer_queue - append to active\n",
535                         buf, buf->vb.vb2_buf.index);
536         }
537 }
538
539 static int start_streaming(struct vb2_queue *q, unsigned int count)
540 {
541         struct cx8800_dev *dev = q->drv_priv;
542         struct cx88_dmaqueue *dmaq = &dev->vidq;
543         struct cx88_buffer *buf = list_entry(dmaq->active.next,
544                         struct cx88_buffer, list);
545
546         start_video_dma(dev, dmaq, buf);
547         return 0;
548 }
549
550 static void stop_streaming(struct vb2_queue *q)
551 {
552         struct cx8800_dev *dev = q->drv_priv;
553         struct cx88_core *core = dev->core;
554         struct cx88_dmaqueue *dmaq = &dev->vidq;
555         unsigned long flags;
556
557         cx_clear(MO_VID_DMACNTRL, 0x11);
558         cx_clear(VID_CAPTURE_CONTROL, 0x06);
559         spin_lock_irqsave(&dev->slock, flags);
560         while (!list_empty(&dmaq->active)) {
561                 struct cx88_buffer *buf = list_entry(dmaq->active.next,
562                         struct cx88_buffer, list);
563
564                 list_del(&buf->list);
565                 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
566         }
567         spin_unlock_irqrestore(&dev->slock, flags);
568 }
569
570 static const struct vb2_ops cx8800_video_qops = {
571         .queue_setup    = queue_setup,
572         .buf_prepare  = buffer_prepare,
573         .buf_finish = buffer_finish,
574         .buf_queue    = buffer_queue,
575         .wait_prepare = vb2_ops_wait_prepare,
576         .wait_finish = vb2_ops_wait_finish,
577         .start_streaming = start_streaming,
578         .stop_streaming = stop_streaming,
579 };
580
581 /* ------------------------------------------------------------------ */
582
583 static int radio_open(struct file *file)
584 {
585         struct cx8800_dev *dev = video_drvdata(file);
586         struct cx88_core *core = dev->core;
587         int ret = v4l2_fh_open(file);
588
589         if (ret)
590                 return ret;
591
592         cx_write(MO_GP3_IO, core->board.radio.gpio3);
593         cx_write(MO_GP0_IO, core->board.radio.gpio0);
594         cx_write(MO_GP1_IO, core->board.radio.gpio1);
595         cx_write(MO_GP2_IO, core->board.radio.gpio2);
596         if (core->board.radio.audioroute) {
597                 if (core->sd_wm8775) {
598                         call_all(core, audio, s_routing,
599                                  core->board.radio.audioroute, 0, 0);
600                 }
601                 /* "I2S ADC mode" */
602                 core->tvaudio = WW_I2SADC;
603                 cx88_set_tvaudio(core);
604         } else {
605                 /* FM Mode */
606                 core->tvaudio = WW_FM;
607                 cx88_set_tvaudio(core);
608                 cx88_set_stereo(core, V4L2_TUNER_MODE_STEREO, 1);
609         }
610         call_all(core, tuner, s_radio);
611         return 0;
612 }
613
614 /* ------------------------------------------------------------------ */
615 /* VIDEO CTRL IOCTLS                                                  */
616
617 static int cx8800_s_vid_ctrl(struct v4l2_ctrl *ctrl)
618 {
619         struct cx88_core *core =
620                 container_of(ctrl->handler, struct cx88_core, video_hdl);
621         const struct cx88_ctrl *cc = ctrl->priv;
622         u32 value, mask;
623
624         mask = cc->mask;
625         switch (ctrl->id) {
626         case V4L2_CID_SATURATION:
627                 /* special v_sat handling */
628
629                 value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
630
631                 if (core->tvnorm & V4L2_STD_SECAM) {
632                         /* For SECAM, both U and V sat should be equal */
633                         value = value << 8 | value;
634                 } else {
635                         /* Keeps U Saturation proportional to V Sat */
636                         value = (value * 0x5a) / 0x7f << 8 | value;
637                 }
638                 mask = 0xffff;
639                 break;
640         case V4L2_CID_SHARPNESS:
641                 /* 0b000, 0b100, 0b101, 0b110, or 0b111 */
642                 value = (ctrl->val < 1 ? 0 : ((ctrl->val + 3) << 7));
643                 /* needs to be set for both fields */
644                 cx_andor(MO_FILTER_EVEN, mask, value);
645                 break;
646         case V4L2_CID_CHROMA_AGC:
647                 value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
648                 break;
649         default:
650                 value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
651                 break;
652         }
653         dprintk(1,
654                 "set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
655                 ctrl->id, ctrl->name, ctrl->val, cc->reg, value,
656                 mask, cc->sreg ? " [shadowed]" : "");
657         if (cc->sreg)
658                 cx_sandor(cc->sreg, cc->reg, mask, value);
659         else
660                 cx_andor(cc->reg, mask, value);
661         return 0;
662 }
663
664 static int cx8800_s_aud_ctrl(struct v4l2_ctrl *ctrl)
665 {
666         struct cx88_core *core =
667                 container_of(ctrl->handler, struct cx88_core, audio_hdl);
668         const struct cx88_ctrl *cc = ctrl->priv;
669         u32 value, mask;
670
671         /* Pass changes onto any WM8775 */
672         if (core->sd_wm8775) {
673                 switch (ctrl->id) {
674                 case V4L2_CID_AUDIO_MUTE:
675                         wm8775_s_ctrl(core, ctrl->id, ctrl->val);
676                         break;
677                 case V4L2_CID_AUDIO_VOLUME:
678                         wm8775_s_ctrl(core, ctrl->id, (ctrl->val) ?
679                                                 (0x90 + ctrl->val) << 8 : 0);
680                         break;
681                 case V4L2_CID_AUDIO_BALANCE:
682                         wm8775_s_ctrl(core, ctrl->id, ctrl->val << 9);
683                         break;
684                 default:
685                         break;
686                 }
687         }
688
689         mask = cc->mask;
690         switch (ctrl->id) {
691         case V4L2_CID_AUDIO_BALANCE:
692                 value = (ctrl->val < 0x40) ?
693                         (0x7f - ctrl->val) : (ctrl->val - 0x40);
694                 break;
695         case V4L2_CID_AUDIO_VOLUME:
696                 value = 0x3f - (ctrl->val & 0x3f);
697                 break;
698         default:
699                 value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
700                 break;
701         }
702         dprintk(1,
703                 "set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
704                 ctrl->id, ctrl->name, ctrl->val, cc->reg, value,
705                 mask, cc->sreg ? " [shadowed]" : "");
706         if (cc->sreg)
707                 cx_sandor(cc->sreg, cc->reg, mask, value);
708         else
709                 cx_andor(cc->reg, mask, value);
710         return 0;
711 }
712
713 /* ------------------------------------------------------------------ */
714 /* VIDEO IOCTLS                                                       */
715
716 static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
717                                 struct v4l2_format *f)
718 {
719         struct cx8800_dev *dev = video_drvdata(file);
720         struct cx88_core *core = dev->core;
721
722         f->fmt.pix.width        = core->width;
723         f->fmt.pix.height       = core->height;
724         f->fmt.pix.field        = core->field;
725         f->fmt.pix.pixelformat  = dev->fmt->fourcc;
726         f->fmt.pix.bytesperline =
727                 (f->fmt.pix.width * dev->fmt->depth) >> 3;
728         f->fmt.pix.sizeimage =
729                 f->fmt.pix.height * f->fmt.pix.bytesperline;
730         f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
731         return 0;
732 }
733
734 static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
735                                   struct v4l2_format *f)
736 {
737         struct cx8800_dev *dev = video_drvdata(file);
738         struct cx88_core *core = dev->core;
739         const struct cx8800_fmt *fmt;
740         enum v4l2_field   field;
741         unsigned int      maxw, maxh;
742
743         fmt = format_by_fourcc(f->fmt.pix.pixelformat);
744         if (!fmt)
745                 return -EINVAL;
746
747         maxw = norm_maxw(core->tvnorm);
748         maxh = norm_maxh(core->tvnorm);
749
750         field = f->fmt.pix.field;
751
752         switch (field) {
753         case V4L2_FIELD_TOP:
754         case V4L2_FIELD_BOTTOM:
755         case V4L2_FIELD_INTERLACED:
756         case V4L2_FIELD_SEQ_BT:
757         case V4L2_FIELD_SEQ_TB:
758                 break;
759         default:
760                 field = (f->fmt.pix.height > maxh / 2)
761                         ? V4L2_FIELD_INTERLACED
762                         : V4L2_FIELD_BOTTOM;
763                 break;
764         }
765         if (V4L2_FIELD_HAS_T_OR_B(field))
766                 maxh /= 2;
767
768         v4l_bound_align_image(&f->fmt.pix.width, 48, maxw, 2,
769                               &f->fmt.pix.height, 32, maxh, 0, 0);
770         f->fmt.pix.field = field;
771         f->fmt.pix.bytesperline =
772                 (f->fmt.pix.width * fmt->depth) >> 3;
773         f->fmt.pix.sizeimage =
774                 f->fmt.pix.height * f->fmt.pix.bytesperline;
775         f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
776
777         return 0;
778 }
779
780 static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
781                                 struct v4l2_format *f)
782 {
783         struct cx8800_dev *dev = video_drvdata(file);
784         struct cx88_core *core = dev->core;
785         int err = vidioc_try_fmt_vid_cap(file, priv, f);
786
787         if (err != 0)
788                 return err;
789         if (vb2_is_busy(&dev->vb2_vidq) || vb2_is_busy(&dev->vb2_vbiq))
790                 return -EBUSY;
791         if (core->dvbdev && vb2_is_busy(&core->dvbdev->vb2_mpegq))
792                 return -EBUSY;
793         dev->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
794         core->width = f->fmt.pix.width;
795         core->height = f->fmt.pix.height;
796         core->field = f->fmt.pix.field;
797         return 0;
798 }
799
800 int cx88_querycap(struct file *file, struct cx88_core *core,
801                   struct v4l2_capability *cap)
802 {
803         struct video_device *vdev = video_devdata(file);
804
805         strscpy(cap->card, core->board.name, sizeof(cap->card));
806         cap->device_caps = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING;
807         if (core->board.tuner_type != UNSET)
808                 cap->device_caps |= V4L2_CAP_TUNER;
809         switch (vdev->vfl_type) {
810         case VFL_TYPE_RADIO:
811                 cap->device_caps = V4L2_CAP_RADIO | V4L2_CAP_TUNER;
812                 break;
813         case VFL_TYPE_GRABBER:
814                 cap->device_caps |= V4L2_CAP_VIDEO_CAPTURE;
815                 break;
816         case VFL_TYPE_VBI:
817                 cap->device_caps |= V4L2_CAP_VBI_CAPTURE;
818                 break;
819         default:
820                 return -EINVAL;
821         }
822         cap->capabilities = cap->device_caps | V4L2_CAP_VIDEO_CAPTURE |
823                 V4L2_CAP_VBI_CAPTURE | V4L2_CAP_DEVICE_CAPS;
824         if (core->board.radio.type == CX88_RADIO)
825                 cap->capabilities |= V4L2_CAP_RADIO;
826         return 0;
827 }
828 EXPORT_SYMBOL(cx88_querycap);
829
830 static int vidioc_querycap(struct file *file, void  *priv,
831                            struct v4l2_capability *cap)
832 {
833         struct cx8800_dev *dev = video_drvdata(file);
834         struct cx88_core *core = dev->core;
835
836         strscpy(cap->driver, "cx8800", sizeof(cap->driver));
837         sprintf(cap->bus_info, "PCI:%s", pci_name(dev->pci));
838         return cx88_querycap(file, core, cap);
839 }
840
841 static int vidioc_enum_fmt_vid_cap(struct file *file, void  *priv,
842                                    struct v4l2_fmtdesc *f)
843 {
844         if (unlikely(f->index >= ARRAY_SIZE(formats)))
845                 return -EINVAL;
846
847         strscpy(f->description, formats[f->index].name, sizeof(f->description));
848         f->pixelformat = formats[f->index].fourcc;
849
850         return 0;
851 }
852
853 static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *tvnorm)
854 {
855         struct cx8800_dev *dev = video_drvdata(file);
856         struct cx88_core *core = dev->core;
857
858         *tvnorm = core->tvnorm;
859         return 0;
860 }
861
862 static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id tvnorms)
863 {
864         struct cx8800_dev *dev = video_drvdata(file);
865         struct cx88_core *core = dev->core;
866
867         return cx88_set_tvnorm(core, tvnorms);
868 }
869
870 /* only one input in this sample driver */
871 int cx88_enum_input(struct cx88_core  *core, struct v4l2_input *i)
872 {
873         static const char * const iname[] = {
874                 [CX88_VMUX_COMPOSITE1] = "Composite1",
875                 [CX88_VMUX_COMPOSITE2] = "Composite2",
876                 [CX88_VMUX_COMPOSITE3] = "Composite3",
877                 [CX88_VMUX_COMPOSITE4] = "Composite4",
878                 [CX88_VMUX_SVIDEO] = "S-Video",
879                 [CX88_VMUX_TELEVISION] = "Television",
880                 [CX88_VMUX_CABLE] = "Cable TV",
881                 [CX88_VMUX_DVB] = "DVB",
882                 [CX88_VMUX_DEBUG] = "for debug only",
883         };
884         unsigned int n = i->index;
885
886         if (n >= 4)
887                 return -EINVAL;
888         if (!INPUT(n).type)
889                 return -EINVAL;
890         i->type  = V4L2_INPUT_TYPE_CAMERA;
891         strscpy(i->name, iname[INPUT(n).type], sizeof(i->name));
892         if ((INPUT(n).type == CX88_VMUX_TELEVISION) ||
893             (INPUT(n).type == CX88_VMUX_CABLE))
894                 i->type = V4L2_INPUT_TYPE_TUNER;
895
896         i->std = CX88_NORMS;
897         return 0;
898 }
899 EXPORT_SYMBOL(cx88_enum_input);
900
901 static int vidioc_enum_input(struct file *file, void *priv,
902                              struct v4l2_input *i)
903 {
904         struct cx8800_dev *dev = video_drvdata(file);
905         struct cx88_core *core = dev->core;
906
907         return cx88_enum_input(core, i);
908 }
909
910 static int vidioc_g_input(struct file *file, void *priv, unsigned int *i)
911 {
912         struct cx8800_dev *dev = video_drvdata(file);
913         struct cx88_core *core = dev->core;
914
915         *i = core->input;
916         return 0;
917 }
918
919 static int vidioc_s_input(struct file *file, void *priv, unsigned int i)
920 {
921         struct cx8800_dev *dev = video_drvdata(file);
922         struct cx88_core *core = dev->core;
923
924         if (i >= 4)
925                 return -EINVAL;
926         if (!INPUT(i).type)
927                 return -EINVAL;
928
929         cx88_newstation(core);
930         cx88_video_mux(core, i);
931         return 0;
932 }
933
934 static int vidioc_g_tuner(struct file *file, void *priv,
935                           struct v4l2_tuner *t)
936 {
937         struct cx8800_dev *dev = video_drvdata(file);
938         struct cx88_core *core = dev->core;
939         u32 reg;
940
941         if (unlikely(core->board.tuner_type == UNSET))
942                 return -EINVAL;
943         if (t->index != 0)
944                 return -EINVAL;
945
946         strscpy(t->name, "Television", sizeof(t->name));
947         t->capability = V4L2_TUNER_CAP_NORM;
948         t->rangehigh  = 0xffffffffUL;
949         call_all(core, tuner, g_tuner, t);
950
951         cx88_get_stereo(core, t);
952         reg = cx_read(MO_DEVICE_STATUS);
953         t->signal = (reg & (1 << 5)) ? 0xffff : 0x0000;
954         return 0;
955 }
956
957 static int vidioc_s_tuner(struct file *file, void *priv,
958                           const struct v4l2_tuner *t)
959 {
960         struct cx8800_dev *dev = video_drvdata(file);
961         struct cx88_core *core = dev->core;
962
963         if (core->board.tuner_type == UNSET)
964                 return -EINVAL;
965         if (t->index != 0)
966                 return -EINVAL;
967
968         cx88_set_stereo(core, t->audmode, 1);
969         return 0;
970 }
971
972 static int vidioc_g_frequency(struct file *file, void *priv,
973                               struct v4l2_frequency *f)
974 {
975         struct cx8800_dev *dev = video_drvdata(file);
976         struct cx88_core *core = dev->core;
977
978         if (unlikely(core->board.tuner_type == UNSET))
979                 return -EINVAL;
980         if (f->tuner)
981                 return -EINVAL;
982
983         f->frequency = core->freq;
984
985         call_all(core, tuner, g_frequency, f);
986
987         return 0;
988 }
989
990 int cx88_set_freq(struct cx88_core  *core,
991                   const struct v4l2_frequency *f)
992 {
993         struct v4l2_frequency new_freq = *f;
994
995         if (unlikely(core->board.tuner_type == UNSET))
996                 return -EINVAL;
997         if (unlikely(f->tuner != 0))
998                 return -EINVAL;
999
1000         cx88_newstation(core);
1001         call_all(core, tuner, s_frequency, f);
1002         call_all(core, tuner, g_frequency, &new_freq);
1003         core->freq = new_freq.frequency;
1004
1005         /* When changing channels it is required to reset TVAUDIO */
1006         usleep_range(10000, 20000);
1007         cx88_set_tvaudio(core);
1008
1009         return 0;
1010 }
1011 EXPORT_SYMBOL(cx88_set_freq);
1012
1013 static int vidioc_s_frequency(struct file *file, void *priv,
1014                               const struct v4l2_frequency *f)
1015 {
1016         struct cx8800_dev *dev = video_drvdata(file);
1017         struct cx88_core *core = dev->core;
1018
1019         return cx88_set_freq(core, f);
1020 }
1021
1022 #ifdef CONFIG_VIDEO_ADV_DEBUG
1023 static int vidioc_g_register(struct file *file, void *fh,
1024                              struct v4l2_dbg_register *reg)
1025 {
1026         struct cx8800_dev *dev = video_drvdata(file);
1027         struct cx88_core *core = dev->core;
1028
1029         /* cx2388x has a 24-bit register space */
1030         reg->val = cx_read(reg->reg & 0xfffffc);
1031         reg->size = 4;
1032         return 0;
1033 }
1034
1035 static int vidioc_s_register(struct file *file, void *fh,
1036                              const struct v4l2_dbg_register *reg)
1037 {
1038         struct cx8800_dev *dev = video_drvdata(file);
1039         struct cx88_core *core = dev->core;
1040
1041         cx_write(reg->reg & 0xfffffc, reg->val);
1042         return 0;
1043 }
1044 #endif
1045
1046 /* ----------------------------------------------------------- */
1047 /* RADIO ESPECIFIC IOCTLS                                      */
1048 /* ----------------------------------------------------------- */
1049
1050 static int radio_g_tuner(struct file *file, void *priv,
1051                          struct v4l2_tuner *t)
1052 {
1053         struct cx8800_dev *dev = video_drvdata(file);
1054         struct cx88_core *core = dev->core;
1055
1056         if (unlikely(t->index > 0))
1057                 return -EINVAL;
1058
1059         strscpy(t->name, "Radio", sizeof(t->name));
1060
1061         call_all(core, tuner, g_tuner, t);
1062         return 0;
1063 }
1064
1065 static int radio_s_tuner(struct file *file, void *priv,
1066                          const struct v4l2_tuner *t)
1067 {
1068         struct cx8800_dev *dev = video_drvdata(file);
1069         struct cx88_core *core = dev->core;
1070
1071         if (t->index != 0)
1072                 return -EINVAL;
1073
1074         call_all(core, tuner, s_tuner, t);
1075         return 0;
1076 }
1077
1078 /* ----------------------------------------------------------- */
1079
1080 static const char *cx88_vid_irqs[32] = {
1081         "y_risci1", "u_risci1", "v_risci1", "vbi_risc1",
1082         "y_risci2", "u_risci2", "v_risci2", "vbi_risc2",
1083         "y_oflow",  "u_oflow",  "v_oflow",  "vbi_oflow",
1084         "y_sync",   "u_sync",   "v_sync",   "vbi_sync",
1085         "opc_err",  "par_err",  "rip_err",  "pci_abort",
1086 };
1087
1088 static void cx8800_vid_irq(struct cx8800_dev *dev)
1089 {
1090         struct cx88_core *core = dev->core;
1091         u32 status, mask, count;
1092
1093         status = cx_read(MO_VID_INTSTAT);
1094         mask   = cx_read(MO_VID_INTMSK);
1095         if (0 == (status & mask))
1096                 return;
1097         cx_write(MO_VID_INTSTAT, status);
1098         if (irq_debug  ||  (status & mask & ~0xff))
1099                 cx88_print_irqbits("irq vid",
1100                                    cx88_vid_irqs, ARRAY_SIZE(cx88_vid_irqs),
1101                                    status, mask);
1102
1103         /* risc op code error */
1104         if (status & (1 << 16)) {
1105                 pr_warn("video risc op code error\n");
1106                 cx_clear(MO_VID_DMACNTRL, 0x11);
1107                 cx_clear(VID_CAPTURE_CONTROL, 0x06);
1108                 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
1109         }
1110
1111         /* risc1 y */
1112         if (status & 0x01) {
1113                 spin_lock(&dev->slock);
1114                 count = cx_read(MO_VIDY_GPCNT);
1115                 cx88_wakeup(core, &dev->vidq, count);
1116                 spin_unlock(&dev->slock);
1117         }
1118
1119         /* risc1 vbi */
1120         if (status & 0x08) {
1121                 spin_lock(&dev->slock);
1122                 count = cx_read(MO_VBI_GPCNT);
1123                 cx88_wakeup(core, &dev->vbiq, count);
1124                 spin_unlock(&dev->slock);
1125         }
1126 }
1127
1128 static irqreturn_t cx8800_irq(int irq, void *dev_id)
1129 {
1130         struct cx8800_dev *dev = dev_id;
1131         struct cx88_core *core = dev->core;
1132         u32 status;
1133         int loop, handled = 0;
1134
1135         for (loop = 0; loop < 10; loop++) {
1136                 status = cx_read(MO_PCI_INTSTAT) &
1137                         (core->pci_irqmask | PCI_INT_VIDINT);
1138                 if (status == 0)
1139                         goto out;
1140                 cx_write(MO_PCI_INTSTAT, status);
1141                 handled = 1;
1142
1143                 if (status & core->pci_irqmask)
1144                         cx88_core_irq(core, status);
1145                 if (status & PCI_INT_VIDINT)
1146                         cx8800_vid_irq(dev);
1147         }
1148         if (loop == 10) {
1149                 pr_warn("irq loop -- clearing mask\n");
1150                 cx_write(MO_PCI_INTMSK, 0);
1151         }
1152
1153  out:
1154         return IRQ_RETVAL(handled);
1155 }
1156
1157 /* ----------------------------------------------------------- */
1158 /* exported stuff                                              */
1159
1160 static const struct v4l2_file_operations video_fops = {
1161         .owner         = THIS_MODULE,
1162         .open          = v4l2_fh_open,
1163         .release       = vb2_fop_release,
1164         .read          = vb2_fop_read,
1165         .poll          = vb2_fop_poll,
1166         .mmap          = vb2_fop_mmap,
1167         .unlocked_ioctl = video_ioctl2,
1168 };
1169
1170 static const struct v4l2_ioctl_ops video_ioctl_ops = {
1171         .vidioc_querycap      = vidioc_querycap,
1172         .vidioc_enum_fmt_vid_cap  = vidioc_enum_fmt_vid_cap,
1173         .vidioc_g_fmt_vid_cap     = vidioc_g_fmt_vid_cap,
1174         .vidioc_try_fmt_vid_cap   = vidioc_try_fmt_vid_cap,
1175         .vidioc_s_fmt_vid_cap     = vidioc_s_fmt_vid_cap,
1176         .vidioc_reqbufs       = vb2_ioctl_reqbufs,
1177         .vidioc_querybuf      = vb2_ioctl_querybuf,
1178         .vidioc_qbuf          = vb2_ioctl_qbuf,
1179         .vidioc_dqbuf         = vb2_ioctl_dqbuf,
1180         .vidioc_g_std         = vidioc_g_std,
1181         .vidioc_s_std         = vidioc_s_std,
1182         .vidioc_enum_input    = vidioc_enum_input,
1183         .vidioc_g_input       = vidioc_g_input,
1184         .vidioc_s_input       = vidioc_s_input,
1185         .vidioc_streamon      = vb2_ioctl_streamon,
1186         .vidioc_streamoff     = vb2_ioctl_streamoff,
1187         .vidioc_g_tuner       = vidioc_g_tuner,
1188         .vidioc_s_tuner       = vidioc_s_tuner,
1189         .vidioc_g_frequency   = vidioc_g_frequency,
1190         .vidioc_s_frequency   = vidioc_s_frequency,
1191         .vidioc_subscribe_event      = v4l2_ctrl_subscribe_event,
1192         .vidioc_unsubscribe_event    = v4l2_event_unsubscribe,
1193 #ifdef CONFIG_VIDEO_ADV_DEBUG
1194         .vidioc_g_register    = vidioc_g_register,
1195         .vidioc_s_register    = vidioc_s_register,
1196 #endif
1197 };
1198
1199 static const struct video_device cx8800_video_template = {
1200         .name                 = "cx8800-video",
1201         .fops                 = &video_fops,
1202         .ioctl_ops            = &video_ioctl_ops,
1203         .tvnorms              = CX88_NORMS,
1204 };
1205
1206 static const struct v4l2_ioctl_ops vbi_ioctl_ops = {
1207         .vidioc_querycap      = vidioc_querycap,
1208         .vidioc_g_fmt_vbi_cap     = cx8800_vbi_fmt,
1209         .vidioc_try_fmt_vbi_cap   = cx8800_vbi_fmt,
1210         .vidioc_s_fmt_vbi_cap     = cx8800_vbi_fmt,
1211         .vidioc_reqbufs       = vb2_ioctl_reqbufs,
1212         .vidioc_querybuf      = vb2_ioctl_querybuf,
1213         .vidioc_qbuf          = vb2_ioctl_qbuf,
1214         .vidioc_dqbuf         = vb2_ioctl_dqbuf,
1215         .vidioc_g_std         = vidioc_g_std,
1216         .vidioc_s_std         = vidioc_s_std,
1217         .vidioc_enum_input    = vidioc_enum_input,
1218         .vidioc_g_input       = vidioc_g_input,
1219         .vidioc_s_input       = vidioc_s_input,
1220         .vidioc_streamon      = vb2_ioctl_streamon,
1221         .vidioc_streamoff     = vb2_ioctl_streamoff,
1222         .vidioc_g_tuner       = vidioc_g_tuner,
1223         .vidioc_s_tuner       = vidioc_s_tuner,
1224         .vidioc_g_frequency   = vidioc_g_frequency,
1225         .vidioc_s_frequency   = vidioc_s_frequency,
1226 #ifdef CONFIG_VIDEO_ADV_DEBUG
1227         .vidioc_g_register    = vidioc_g_register,
1228         .vidioc_s_register    = vidioc_s_register,
1229 #endif
1230 };
1231
1232 static const struct video_device cx8800_vbi_template = {
1233         .name                 = "cx8800-vbi",
1234         .fops                 = &video_fops,
1235         .ioctl_ops            = &vbi_ioctl_ops,
1236         .tvnorms              = CX88_NORMS,
1237 };
1238
1239 static const struct v4l2_file_operations radio_fops = {
1240         .owner         = THIS_MODULE,
1241         .open          = radio_open,
1242         .poll          = v4l2_ctrl_poll,
1243         .release       = v4l2_fh_release,
1244         .unlocked_ioctl = video_ioctl2,
1245 };
1246
1247 static const struct v4l2_ioctl_ops radio_ioctl_ops = {
1248         .vidioc_querycap      = vidioc_querycap,
1249         .vidioc_g_tuner       = radio_g_tuner,
1250         .vidioc_s_tuner       = radio_s_tuner,
1251         .vidioc_g_frequency   = vidioc_g_frequency,
1252         .vidioc_s_frequency   = vidioc_s_frequency,
1253         .vidioc_subscribe_event      = v4l2_ctrl_subscribe_event,
1254         .vidioc_unsubscribe_event    = v4l2_event_unsubscribe,
1255 #ifdef CONFIG_VIDEO_ADV_DEBUG
1256         .vidioc_g_register    = vidioc_g_register,
1257         .vidioc_s_register    = vidioc_s_register,
1258 #endif
1259 };
1260
1261 static const struct video_device cx8800_radio_template = {
1262         .name                 = "cx8800-radio",
1263         .fops                 = &radio_fops,
1264         .ioctl_ops            = &radio_ioctl_ops,
1265 };
1266
1267 static const struct v4l2_ctrl_ops cx8800_ctrl_vid_ops = {
1268         .s_ctrl = cx8800_s_vid_ctrl,
1269 };
1270
1271 static const struct v4l2_ctrl_ops cx8800_ctrl_aud_ops = {
1272         .s_ctrl = cx8800_s_aud_ctrl,
1273 };
1274
1275 /* ----------------------------------------------------------- */
1276
1277 static void cx8800_unregister_video(struct cx8800_dev *dev)
1278 {
1279         video_unregister_device(&dev->radio_dev);
1280         video_unregister_device(&dev->vbi_dev);
1281         video_unregister_device(&dev->video_dev);
1282 }
1283
1284 static int cx8800_initdev(struct pci_dev *pci_dev,
1285                           const struct pci_device_id *pci_id)
1286 {
1287         struct cx8800_dev *dev;
1288         struct cx88_core *core;
1289         struct vb2_queue *q;
1290         int err;
1291         int i;
1292
1293         dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1294         if (!dev)
1295                 return -ENOMEM;
1296
1297         /* pci init */
1298         dev->pci = pci_dev;
1299         if (pci_enable_device(pci_dev)) {
1300                 err = -EIO;
1301                 goto fail_free;
1302         }
1303         core = cx88_core_get(dev->pci);
1304         if (!core) {
1305                 err = -EINVAL;
1306                 goto fail_free;
1307         }
1308         dev->core = core;
1309
1310         /* print pci info */
1311         dev->pci_rev = pci_dev->revision;
1312         pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER,  &dev->pci_lat);
1313         pr_info("found at %s, rev: %d, irq: %d, latency: %d, mmio: 0x%llx\n",
1314                 pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
1315                 dev->pci_lat,
1316                 (unsigned long long)pci_resource_start(pci_dev, 0));
1317
1318         pci_set_master(pci_dev);
1319         err = pci_set_dma_mask(pci_dev, DMA_BIT_MASK(32));
1320         if (err) {
1321                 pr_err("Oops: no 32bit PCI DMA ???\n");
1322                 goto fail_core;
1323         }
1324
1325         /* initialize driver struct */
1326         spin_lock_init(&dev->slock);
1327
1328         /* init video dma queues */
1329         INIT_LIST_HEAD(&dev->vidq.active);
1330
1331         /* init vbi dma queues */
1332         INIT_LIST_HEAD(&dev->vbiq.active);
1333
1334         /* get irq */
1335         err = request_irq(pci_dev->irq, cx8800_irq,
1336                           IRQF_SHARED, core->name, dev);
1337         if (err < 0) {
1338                 pr_err("can't get IRQ %d\n", pci_dev->irq);
1339                 goto fail_core;
1340         }
1341         cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1342
1343         for (i = 0; i < CX8800_AUD_CTLS; i++) {
1344                 const struct cx88_ctrl *cc = &cx8800_aud_ctls[i];
1345                 struct v4l2_ctrl *vc;
1346
1347                 vc = v4l2_ctrl_new_std(&core->audio_hdl, &cx8800_ctrl_aud_ops,
1348                                        cc->id, cc->minimum, cc->maximum,
1349                                        cc->step, cc->default_value);
1350                 if (!vc) {
1351                         err = core->audio_hdl.error;
1352                         goto fail_core;
1353                 }
1354                 vc->priv = (void *)cc;
1355         }
1356
1357         for (i = 0; i < CX8800_VID_CTLS; i++) {
1358                 const struct cx88_ctrl *cc = &cx8800_vid_ctls[i];
1359                 struct v4l2_ctrl *vc;
1360
1361                 vc = v4l2_ctrl_new_std(&core->video_hdl, &cx8800_ctrl_vid_ops,
1362                                        cc->id, cc->minimum, cc->maximum,
1363                                        cc->step, cc->default_value);
1364                 if (!vc) {
1365                         err = core->video_hdl.error;
1366                         goto fail_core;
1367                 }
1368                 vc->priv = (void *)cc;
1369                 if (vc->id == V4L2_CID_CHROMA_AGC)
1370                         core->chroma_agc = vc;
1371         }
1372         v4l2_ctrl_add_handler(&core->video_hdl, &core->audio_hdl, NULL, false);
1373
1374         /* load and configure helper modules */
1375
1376         if (core->board.audio_chip == CX88_AUDIO_WM8775) {
1377                 struct i2c_board_info wm8775_info = {
1378                         .type = "wm8775",
1379                         .addr = 0x36 >> 1,
1380                         .platform_data = &core->wm8775_data,
1381                 };
1382                 struct v4l2_subdev *sd;
1383
1384                 if (core->boardnr == CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1)
1385                         core->wm8775_data.is_nova_s = true;
1386                 else
1387                         core->wm8775_data.is_nova_s = false;
1388
1389                 sd = v4l2_i2c_new_subdev_board(&core->v4l2_dev, &core->i2c_adap,
1390                                                &wm8775_info, NULL);
1391                 if (sd) {
1392                         core->sd_wm8775 = sd;
1393                         sd->grp_id = WM8775_GID;
1394                 }
1395         }
1396
1397         if (core->board.audio_chip == CX88_AUDIO_TVAUDIO) {
1398                 /*
1399                  * This probes for a tda9874 as is used on some
1400                  * Pixelview Ultra boards.
1401                  */
1402                 v4l2_i2c_new_subdev(&core->v4l2_dev, &core->i2c_adap,
1403                                     "tvaudio", 0, I2C_ADDRS(0xb0 >> 1));
1404         }
1405
1406         switch (core->boardnr) {
1407         case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
1408         case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD: {
1409                 static const struct i2c_board_info rtc_info = {
1410                         I2C_BOARD_INFO("isl1208", 0x6f)
1411                 };
1412
1413                 request_module("rtc-isl1208");
1414                 core->i2c_rtc = i2c_new_device(&core->i2c_adap, &rtc_info);
1415         }
1416                 /* fall-through */
1417         case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
1418                 request_module("ir-kbd-i2c");
1419         }
1420
1421         /* Sets device info at pci_dev */
1422         pci_set_drvdata(pci_dev, dev);
1423
1424         dev->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24);
1425
1426         /* Maintain a reference so cx88-blackbird can query the 8800 device. */
1427         core->v4ldev = dev;
1428
1429         /* initial device configuration */
1430         mutex_lock(&core->lock);
1431         cx88_set_tvnorm(core, V4L2_STD_NTSC_M);
1432         v4l2_ctrl_handler_setup(&core->video_hdl);
1433         v4l2_ctrl_handler_setup(&core->audio_hdl);
1434         cx88_video_mux(core, 0);
1435
1436         q = &dev->vb2_vidq;
1437         q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1438         q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
1439         q->gfp_flags = GFP_DMA32;
1440         q->min_buffers_needed = 2;
1441         q->drv_priv = dev;
1442         q->buf_struct_size = sizeof(struct cx88_buffer);
1443         q->ops = &cx8800_video_qops;
1444         q->mem_ops = &vb2_dma_sg_memops;
1445         q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1446         q->lock = &core->lock;
1447         q->dev = &dev->pci->dev;
1448
1449         err = vb2_queue_init(q);
1450         if (err < 0)
1451                 goto fail_unreg;
1452
1453         q = &dev->vb2_vbiq;
1454         q->type = V4L2_BUF_TYPE_VBI_CAPTURE;
1455         q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
1456         q->gfp_flags = GFP_DMA32;
1457         q->min_buffers_needed = 2;
1458         q->drv_priv = dev;
1459         q->buf_struct_size = sizeof(struct cx88_buffer);
1460         q->ops = &cx8800_vbi_qops;
1461         q->mem_ops = &vb2_dma_sg_memops;
1462         q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1463         q->lock = &core->lock;
1464         q->dev = &dev->pci->dev;
1465
1466         err = vb2_queue_init(q);
1467         if (err < 0)
1468                 goto fail_unreg;
1469
1470         /* register v4l devices */
1471         cx88_vdev_init(core, dev->pci, &dev->video_dev,
1472                        &cx8800_video_template, "video");
1473         video_set_drvdata(&dev->video_dev, dev);
1474         dev->video_dev.ctrl_handler = &core->video_hdl;
1475         dev->video_dev.queue = &dev->vb2_vidq;
1476         err = video_register_device(&dev->video_dev, VFL_TYPE_GRABBER,
1477                                     video_nr[core->nr]);
1478         if (err < 0) {
1479                 pr_err("can't register video device\n");
1480                 goto fail_unreg;
1481         }
1482         pr_info("registered device %s [v4l2]\n",
1483                 video_device_node_name(&dev->video_dev));
1484
1485         cx88_vdev_init(core, dev->pci, &dev->vbi_dev,
1486                        &cx8800_vbi_template, "vbi");
1487         video_set_drvdata(&dev->vbi_dev, dev);
1488         dev->vbi_dev.queue = &dev->vb2_vbiq;
1489         err = video_register_device(&dev->vbi_dev, VFL_TYPE_VBI,
1490                                     vbi_nr[core->nr]);
1491         if (err < 0) {
1492                 pr_err("can't register vbi device\n");
1493                 goto fail_unreg;
1494         }
1495         pr_info("registered device %s\n",
1496                 video_device_node_name(&dev->vbi_dev));
1497
1498         if (core->board.radio.type == CX88_RADIO) {
1499                 cx88_vdev_init(core, dev->pci, &dev->radio_dev,
1500                                &cx8800_radio_template, "radio");
1501                 video_set_drvdata(&dev->radio_dev, dev);
1502                 dev->radio_dev.ctrl_handler = &core->audio_hdl;
1503                 err = video_register_device(&dev->radio_dev, VFL_TYPE_RADIO,
1504                                             radio_nr[core->nr]);
1505                 if (err < 0) {
1506                         pr_err("can't register radio device\n");
1507                         goto fail_unreg;
1508                 }
1509                 pr_info("registered device %s\n",
1510                         video_device_node_name(&dev->radio_dev));
1511         }
1512
1513         /* start tvaudio thread */
1514         if (core->board.tuner_type != UNSET) {
1515                 core->kthread = kthread_run(cx88_audio_thread,
1516                                             core, "cx88 tvaudio");
1517                 if (IS_ERR(core->kthread)) {
1518                         err = PTR_ERR(core->kthread);
1519                         pr_err("failed to create cx88 audio thread, err=%d\n",
1520                                err);
1521                 }
1522         }
1523         mutex_unlock(&core->lock);
1524
1525         return 0;
1526
1527 fail_unreg:
1528         cx8800_unregister_video(dev);
1529         free_irq(pci_dev->irq, dev);
1530         mutex_unlock(&core->lock);
1531 fail_core:
1532         core->v4ldev = NULL;
1533         cx88_core_put(core, dev->pci);
1534 fail_free:
1535         kfree(dev);
1536         return err;
1537 }
1538
1539 static void cx8800_finidev(struct pci_dev *pci_dev)
1540 {
1541         struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1542         struct cx88_core *core = dev->core;
1543
1544         /* stop thread */
1545         if (core->kthread) {
1546                 kthread_stop(core->kthread);
1547                 core->kthread = NULL;
1548         }
1549
1550         if (core->ir)
1551                 cx88_ir_stop(core);
1552
1553         cx88_shutdown(core); /* FIXME */
1554
1555         /* unregister stuff */
1556
1557         free_irq(pci_dev->irq, dev);
1558         cx8800_unregister_video(dev);
1559         pci_disable_device(pci_dev);
1560
1561         core->v4ldev = NULL;
1562
1563         /* free memory */
1564         cx88_core_put(core, dev->pci);
1565         kfree(dev);
1566 }
1567
1568 #ifdef CONFIG_PM
1569 static int cx8800_suspend(struct pci_dev *pci_dev, pm_message_t state)
1570 {
1571         struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1572         struct cx88_core *core = dev->core;
1573         unsigned long flags;
1574
1575         /* stop video+vbi capture */
1576         spin_lock_irqsave(&dev->slock, flags);
1577         if (!list_empty(&dev->vidq.active)) {
1578                 pr_info("suspend video\n");
1579                 stop_video_dma(dev);
1580         }
1581         if (!list_empty(&dev->vbiq.active)) {
1582                 pr_info("suspend vbi\n");
1583                 cx8800_stop_vbi_dma(dev);
1584         }
1585         spin_unlock_irqrestore(&dev->slock, flags);
1586
1587         if (core->ir)
1588                 cx88_ir_stop(core);
1589         /* FIXME -- shutdown device */
1590         cx88_shutdown(core);
1591
1592         pci_save_state(pci_dev);
1593         if (pci_set_power_state(pci_dev,
1594                                 pci_choose_state(pci_dev, state)) != 0) {
1595                 pci_disable_device(pci_dev);
1596                 dev->state.disabled = 1;
1597         }
1598         return 0;
1599 }
1600
1601 static int cx8800_resume(struct pci_dev *pci_dev)
1602 {
1603         struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1604         struct cx88_core *core = dev->core;
1605         unsigned long flags;
1606         int err;
1607
1608         if (dev->state.disabled) {
1609                 err = pci_enable_device(pci_dev);
1610                 if (err) {
1611                         pr_err("can't enable device\n");
1612                         return err;
1613                 }
1614
1615                 dev->state.disabled = 0;
1616         }
1617         err = pci_set_power_state(pci_dev, PCI_D0);
1618         if (err) {
1619                 pr_err("can't set power state\n");
1620                 pci_disable_device(pci_dev);
1621                 dev->state.disabled = 1;
1622
1623                 return err;
1624         }
1625         pci_restore_state(pci_dev);
1626
1627         /* FIXME: re-initialize hardware */
1628         cx88_reset(core);
1629         if (core->ir)
1630                 cx88_ir_start(core);
1631
1632         cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1633
1634         /* restart video+vbi capture */
1635         spin_lock_irqsave(&dev->slock, flags);
1636         if (!list_empty(&dev->vidq.active)) {
1637                 pr_info("resume video\n");
1638                 restart_video_queue(dev, &dev->vidq);
1639         }
1640         if (!list_empty(&dev->vbiq.active)) {
1641                 pr_info("resume vbi\n");
1642                 cx8800_restart_vbi_queue(dev, &dev->vbiq);
1643         }
1644         spin_unlock_irqrestore(&dev->slock, flags);
1645
1646         return 0;
1647 }
1648 #endif
1649
1650 /* ----------------------------------------------------------- */
1651
1652 static const struct pci_device_id cx8800_pci_tbl[] = {
1653         {
1654                 .vendor       = 0x14f1,
1655                 .device       = 0x8800,
1656                 .subvendor    = PCI_ANY_ID,
1657                 .subdevice    = PCI_ANY_ID,
1658         }, {
1659                 /* --- end of list --- */
1660         }
1661 };
1662 MODULE_DEVICE_TABLE(pci, cx8800_pci_tbl);
1663
1664 static struct pci_driver cx8800_pci_driver = {
1665         .name     = "cx8800",
1666         .id_table = cx8800_pci_tbl,
1667         .probe    = cx8800_initdev,
1668         .remove   = cx8800_finidev,
1669 #ifdef CONFIG_PM
1670         .suspend  = cx8800_suspend,
1671         .resume   = cx8800_resume,
1672 #endif
1673 };
1674
1675 module_pci_driver(cx8800_pci_driver);