drivers/media/pci/cx18/cx18-streams.c

   1 /*
   2  *  cx18 init/start/stop/exit stream functions
   3  *
   4  *  Derived from ivtv-streams.c
   5  *
   6  *  Copyright (C) 2007  Hans Verkuil <hverkuil@xs4all.nl>
   7  *  Copyright (C) 2008  Andy Walls <awalls@md.metrocast.net>
   8  *
   9  *  This program is free software; you can redistribute it and/or modify
  10  *  it under the terms of the GNU General Public License as published by
  11  *  the Free Software Foundation; either version 2 of the License, or
  12  *  (at your option) any later version.
  13  *
  14  *  This program is distributed in the hope that it will be useful,
  15  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *  GNU General Public License for more details.
  18  */
  19
  20 #include "cx18-driver.h"
  21 #include "cx18-io.h"
  22 #include "cx18-fileops.h"
  23 #include "cx18-mailbox.h"
  24 #include "cx18-i2c.h"
  25 #include "cx18-queue.h"
  26 #include "cx18-ioctl.h"
  27 #include "cx18-streams.h"
  28 #include "cx18-cards.h"
  29 #include "cx18-scb.h"
  30 #include "cx18-dvb.h"
  31
  32 #define CX18_DSP0_INTERRUPT_MASK        0xd0004C
  33
  34 static const struct v4l2_file_operations cx18_v4l2_enc_fops = {
  35         .owner = THIS_MODULE,
  36         .read = cx18_v4l2_read,
  37         .open = cx18_v4l2_open,
  38         .unlocked_ioctl = video_ioctl2,
  39         .release = cx18_v4l2_close,
  40         .poll = cx18_v4l2_enc_poll,
  41         .mmap = cx18_v4l2_mmap,
  42 };
  43
  44 /* offset from 0 to register ts v4l2 minors on */
  45 #define CX18_V4L2_ENC_TS_OFFSET   16
  46 /* offset from 0 to register pcm v4l2 minors on */
  47 #define CX18_V4L2_ENC_PCM_OFFSET  24
  48 /* offset from 0 to register yuv v4l2 minors on */
  49 #define CX18_V4L2_ENC_YUV_OFFSET  32
  50
  51 static struct {
  52         const char *name;
  53         int vfl_type;
  54         int num_offset;
  55         int dma;
  56         u32 caps;
  57 } cx18_stream_info[] = {
  58         {       /* CX18_ENC_STREAM_TYPE_MPG */
  59                 "encoder MPEG",
  60                 VFL_TYPE_GRABBER, 0,
  61                 PCI_DMA_FROMDEVICE,
  62                 V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE |
  63                 V4L2_CAP_AUDIO | V4L2_CAP_TUNER
  64         },
  65         {       /* CX18_ENC_STREAM_TYPE_TS */
  66                 "TS",
  67                 VFL_TYPE_GRABBER, -1,
  68                 PCI_DMA_FROMDEVICE,
  69         },
  70         {       /* CX18_ENC_STREAM_TYPE_YUV */
  71                 "encoder YUV",
  72                 VFL_TYPE_GRABBER, CX18_V4L2_ENC_YUV_OFFSET,
  73                 PCI_DMA_FROMDEVICE,
  74                 V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE |
  75                 V4L2_CAP_STREAMING | V4L2_CAP_AUDIO | V4L2_CAP_TUNER
  76         },
  77         {       /* CX18_ENC_STREAM_TYPE_VBI */
  78                 "encoder VBI",
  79                 VFL_TYPE_VBI, 0,
  80                 PCI_DMA_FROMDEVICE,
  81                 V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE |
  82                 V4L2_CAP_READWRITE | V4L2_CAP_TUNER
  83         },
  84         {       /* CX18_ENC_STREAM_TYPE_PCM */
  85                 "encoder PCM audio",
  86                 VFL_TYPE_GRABBER, CX18_V4L2_ENC_PCM_OFFSET,
  87                 PCI_DMA_FROMDEVICE,
  88                 V4L2_CAP_TUNER | V4L2_CAP_AUDIO | V4L2_CAP_READWRITE,
  89         },
  90         {       /* CX18_ENC_STREAM_TYPE_IDX */
  91                 "encoder IDX",
  92                 VFL_TYPE_GRABBER, -1,
  93                 PCI_DMA_FROMDEVICE,
  94         },
  95         {       /* CX18_ENC_STREAM_TYPE_RAD */
  96                 "encoder radio",
  97                 VFL_TYPE_RADIO, 0,
  98                 PCI_DMA_NONE,
  99                 V4L2_CAP_RADIO | V4L2_CAP_TUNER
 100         },
 101 };
 102
 103
 104 static void cx18_dma_free(struct videobuf_queue *q,
 105         struct cx18_stream *s, struct cx18_videobuf_buffer *buf)
 106 {
 107         videobuf_waiton(q, &buf->vb, 0, 0);
 108         videobuf_vmalloc_free(&buf->vb);
 109         buf->vb.state = VIDEOBUF_NEEDS_INIT;
 110 }
 111
 112 static int cx18_prepare_buffer(struct videobuf_queue *q,
 113         struct cx18_stream *s,
 114         struct cx18_videobuf_buffer *buf,
 115         u32 pixelformat,
 116         unsigned int width, unsigned int height,
 117         enum v4l2_field field)
 118 {
 119         struct cx18 *cx = s->cx;
 120         int rc = 0;
 121
 122         /* check settings */
 123         buf->bytes_used = 0;
 124
 125         if ((width  < 48) || (height < 32))
 126                 return -EINVAL;
 127
 128         buf->vb.size = (width * height * 2);
 129         if ((buf->vb.baddr != 0) && (buf->vb.bsize < buf->vb.size))
 130                 return -EINVAL;
 131
 132         /* alloc + fill struct (if changed) */
 133         if (buf->vb.width != width || buf->vb.height != height ||
 134             buf->vb.field != field || s->pixelformat != pixelformat ||
 135             buf->tvnorm != cx->std) {
 136
 137                 buf->vb.width  = width;
 138                 buf->vb.height = height;
 139                 buf->vb.field  = field;
 140                 buf->tvnorm    = cx->std;
 141                 s->pixelformat = pixelformat;
 142
 143                 /* HM12 YUV size is (Y=(h*720) + UV=(h*(720/2)))
 144                    UYUV YUV size is (Y=(h*720) + UV=(h*(720))) */
 145                 if (s->pixelformat == V4L2_PIX_FMT_HM12)
 146                         s->vb_bytes_per_frame = height * 720 * 3 / 2;
 147                 else
 148                         s->vb_bytes_per_frame = height * 720 * 2;
 149                 cx18_dma_free(q, s, buf);
 150         }
 151
 152         if ((buf->vb.baddr != 0) && (buf->vb.bsize < buf->vb.size))
 153                 return -EINVAL;
 154
 155         if (buf->vb.field == 0)
 156                 buf->vb.field = V4L2_FIELD_INTERLACED;
 157
 158         if (VIDEOBUF_NEEDS_INIT == buf->vb.state) {
 159                 buf->vb.width  = width;
 160                 buf->vb.height = height;
 161                 buf->vb.field  = field;
 162                 buf->tvnorm    = cx->std;
 163                 s->pixelformat = pixelformat;
 164
 165                 /* HM12 YUV size is (Y=(h*720) + UV=(h*(720/2)))
 166                    UYUV YUV size is (Y=(h*720) + UV=(h*(720))) */
 167                 if (s->pixelformat == V4L2_PIX_FMT_HM12)
 168                         s->vb_bytes_per_frame = height * 720 * 3 / 2;
 169                 else
 170                         s->vb_bytes_per_frame = height * 720 * 2;
 171                 rc = videobuf_iolock(q, &buf->vb, NULL);
 172                 if (rc != 0)
 173                         goto fail;
 174         }
 175         buf->vb.state = VIDEOBUF_PREPARED;
 176         return 0;
 177
 178 fail:
 179         cx18_dma_free(q, s, buf);
 180         return rc;
 181
 182 }
 183
 184 /* VB_MIN_BUFSIZE is lcm(1440 * 480, 1440 * 576)
 185    1440 is a single line of 4:2:2 YUV at 720 luma samples wide
 186 */
 187 #define VB_MIN_BUFFERS 32
 188 #define VB_MIN_BUFSIZE 4147200
 189
 190 static int buffer_setup(struct videobuf_queue *q,
 191         unsigned int *count, unsigned int *size)
 192 {
 193         struct cx18_stream *s = q->priv_data;
 194         struct cx18 *cx = s->cx;
 195
 196         *size = 2 * cx->cxhdl.width * cx->cxhdl.height;
 197         if (*count == 0)
 198                 *count = VB_MIN_BUFFERS;
 199
 200         while (*size * *count > VB_MIN_BUFFERS * VB_MIN_BUFSIZE)
 201                 (*count)--;
 202
 203         q->field = V4L2_FIELD_INTERLACED;
 204         q->last = V4L2_FIELD_INTERLACED;
 205
 206         return 0;
 207 }
 208
 209 static int buffer_prepare(struct videobuf_queue *q,
 210         struct videobuf_buffer *vb,
 211         enum v4l2_field field)
 212 {
 213         struct cx18_videobuf_buffer *buf =
 214                 container_of(vb, struct cx18_videobuf_buffer, vb);
 215         struct cx18_stream *s = q->priv_data;
 216         struct cx18 *cx = s->cx;
 217
 218         return cx18_prepare_buffer(q, s, buf, s->pixelformat,
 219                 cx->cxhdl.width, cx->cxhdl.height, field);
 220 }
 221
 222 static void buffer_release(struct videobuf_queue *q,
 223         struct videobuf_buffer *vb)
 224 {
 225         struct cx18_videobuf_buffer *buf =
 226                 container_of(vb, struct cx18_videobuf_buffer, vb);
 227         struct cx18_stream *s = q->priv_data;
 228
 229         cx18_dma_free(q, s, buf);
 230 }
 231
 232 static void buffer_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
 233 {
 234         struct cx18_videobuf_buffer *buf =
 235                 container_of(vb, struct cx18_videobuf_buffer, vb);
 236         struct cx18_stream *s = q->priv_data;
 237
 238         buf->vb.state = VIDEOBUF_QUEUED;
 239
 240         list_add_tail(&buf->vb.queue, &s->vb_capture);
 241 }
 242
 243 static const struct videobuf_queue_ops cx18_videobuf_qops = {
 244         .buf_setup    = buffer_setup,
 245         .buf_prepare  = buffer_prepare,
 246         .buf_queue    = buffer_queue,
 247         .buf_release  = buffer_release,
 248 };
 249
 250 static void cx18_stream_init(struct cx18 *cx, int type)
 251 {
 252         struct cx18_stream *s = &cx->streams[type];
 253
 254         memset(s, 0, sizeof(*s));
 255
 256         /* initialize cx18_stream fields */
 257         s->dvb = NULL;
 258         s->cx = cx;
 259         s->type = type;
 260         s->name = cx18_stream_info[type].name;
 261         s->handle = CX18_INVALID_TASK_HANDLE;
 262
 263         s->dma = cx18_stream_info[type].dma;
 264         s->v4l2_dev_caps = cx18_stream_info[type].caps;
 265         s->buffers = cx->stream_buffers[type];
 266         s->buf_size = cx->stream_buf_size[type];
 267         INIT_LIST_HEAD(&s->buf_pool);
 268         s->bufs_per_mdl = 1;
 269         s->mdl_size = s->buf_size * s->bufs_per_mdl;
 270
 271         init_waitqueue_head(&s->waitq);
 272         s->id = -1;
 273         spin_lock_init(&s->q_free.lock);
 274         cx18_queue_init(&s->q_free);
 275         spin_lock_init(&s->q_busy.lock);
 276         cx18_queue_init(&s->q_busy);
 277         spin_lock_init(&s->q_full.lock);
 278         cx18_queue_init(&s->q_full);
 279         spin_lock_init(&s->q_idle.lock);
 280         cx18_queue_init(&s->q_idle);
 281
 282         INIT_WORK(&s->out_work_order, cx18_out_work_handler);
 283
 284         INIT_LIST_HEAD(&s->vb_capture);
 285         timer_setup(&s->vb_timeout, cx18_vb_timeout, 0);
 286         spin_lock_init(&s->vb_lock);
 287         if (type == CX18_ENC_STREAM_TYPE_YUV) {
 288                 spin_lock_init(&s->vbuf_q_lock);
 289
 290                 s->vb_type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
 291                 videobuf_queue_vmalloc_init(&s->vbuf_q, &cx18_videobuf_qops,
 292                         &cx->pci_dev->dev, &s->vbuf_q_lock,
 293                         V4L2_BUF_TYPE_VIDEO_CAPTURE,
 294                         V4L2_FIELD_INTERLACED,
 295                         sizeof(struct cx18_videobuf_buffer),
 296                         s, &cx->serialize_lock);
 297
 298                 /* Assume the previous pixel default */
 299                 s->pixelformat = V4L2_PIX_FMT_HM12;
 300                 s->vb_bytes_per_frame = cx->cxhdl.height * 720 * 3 / 2;
 301                 s->vb_bytes_per_line = 720;
 302         }
 303 }
 304
 305 static int cx18_prep_dev(struct cx18 *cx, int type)
 306 {
 307         struct cx18_stream *s = &cx->streams[type];
 308         u32 cap = cx->v4l2_cap;
 309         int num_offset = cx18_stream_info[type].num_offset;
 310         int num = cx->instance + cx18_first_minor + num_offset;
 311
 312         /*
 313          * These five fields are always initialized.
 314          * For analog capture related streams, if video_dev.v4l2_dev == NULL then the
 315          * stream is not in use.
 316          * For the TS stream, if dvb == NULL then the stream is not in use.
 317          * In those cases no other fields but these four can be used.
 318          */
 319         s->video_dev.v4l2_dev = NULL;
 320         s->dvb = NULL;
 321         s->cx = cx;
 322         s->type = type;
 323         s->name = cx18_stream_info[type].name;
 324
 325         /* Check whether the radio is supported */
 326         if (type == CX18_ENC_STREAM_TYPE_RAD && !(cap & V4L2_CAP_RADIO))
 327                 return 0;
 328
 329         /* Check whether VBI is supported */
 330         if (type == CX18_ENC_STREAM_TYPE_VBI &&
 331             !(cap & (V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE)))
 332                 return 0;
 333
 334         /* User explicitly selected 0 buffers for these streams, so don't
 335            create them. */
 336         if (cx18_stream_info[type].dma != PCI_DMA_NONE &&
 337             cx->stream_buffers[type] == 0) {
 338                 CX18_INFO("Disabled %s device\n", cx18_stream_info[type].name);
 339                 return 0;
 340         }
 341
 342         cx18_stream_init(cx, type);
 343
 344         /* Allocate the cx18_dvb struct only for the TS on cards with DTV */
 345         if (type == CX18_ENC_STREAM_TYPE_TS) {
 346                 if (cx->card->hw_all & CX18_HW_DVB) {
 347                         s->dvb = kzalloc(sizeof(struct cx18_dvb), GFP_KERNEL);
 348                         if (s->dvb == NULL) {
 349                                 CX18_ERR("Couldn't allocate cx18_dvb structure for %s\n",
 350                                          s->name);
 351                                 return -ENOMEM;
 352                         }
 353                 } else {
 354                         /* Don't need buffers for the TS, if there is no DVB */
 355                         s->buffers = 0;
 356                 }
 357         }
 358
 359         if (num_offset == -1)
 360                 return 0;
 361
 362         /* initialize the v4l2 video device structure */
 363         snprintf(s->video_dev.name, sizeof(s->video_dev.name), "%s %s",
 364                  cx->v4l2_dev.name, s->name);
 365
 366         s->video_dev.num = num;
 367         s->video_dev.v4l2_dev = &cx->v4l2_dev;
 368         s->video_dev.fops = &cx18_v4l2_enc_fops;
 369         s->video_dev.release = video_device_release_empty;
 370         if (cx->card->video_inputs->video_type == CX18_CARD_INPUT_VID_TUNER)
 371                 s->video_dev.tvnorms = cx->tuner_std;
 372         else
 373                 s->video_dev.tvnorms = V4L2_STD_ALL;
 374         s->video_dev.lock = &cx->serialize_lock;
 375         cx18_set_funcs(&s->video_dev);
 376         return 0;
 377 }
 378
 379 /* Initialize v4l2 variables and register v4l2 devices */
 380 int cx18_streams_setup(struct cx18 *cx)
 381 {
 382         int type, ret;
 383
 384         /* Setup V4L2 Devices */
 385         for (type = 0; type < CX18_MAX_STREAMS; type++) {
 386                 /* Prepare device */
 387                 ret = cx18_prep_dev(cx, type);
 388                 if (ret < 0)
 389                         break;
 390
 391                 /* Allocate Stream */
 392                 ret = cx18_stream_alloc(&cx->streams[type]);
 393                 if (ret < 0)
 394                         break;
 395         }
 396         if (type == CX18_MAX_STREAMS)
 397                 return 0;
 398
 399         /* One or more streams could not be initialized. Clean 'em all up. */
 400         cx18_streams_cleanup(cx, 0);
 401         return ret;
 402 }
 403
 404 static int cx18_reg_dev(struct cx18 *cx, int type)
 405 {
 406         struct cx18_stream *s = &cx->streams[type];
 407         int vfl_type = cx18_stream_info[type].vfl_type;
 408         const char *name;
 409         int num, ret;
 410
 411         if (type == CX18_ENC_STREAM_TYPE_TS && s->dvb != NULL) {
 412                 ret = cx18_dvb_register(s);
 413                 if (ret < 0) {
 414                         CX18_ERR("DVB failed to register\n");
 415                         return ret;
 416                 }
 417         }
 418
 419         if (s->video_dev.v4l2_dev == NULL)
 420                 return 0;
 421
 422         num = s->video_dev.num;
 423         /* card number + user defined offset + device offset */
 424         if (type != CX18_ENC_STREAM_TYPE_MPG) {
 425                 struct cx18_stream *s_mpg = &cx->streams[CX18_ENC_STREAM_TYPE_MPG];
 426
 427                 if (s_mpg->video_dev.v4l2_dev)
 428                         num = s_mpg->video_dev.num
 429                             + cx18_stream_info[type].num_offset;
 430         }
 431         video_set_drvdata(&s->video_dev, s);
 432
 433         /* Register device. First try the desired minor, then any free one. */
 434         ret = video_register_device_no_warn(&s->video_dev, vfl_type, num);
 435         if (ret < 0) {
 436                 CX18_ERR("Couldn't register v4l2 device for %s (device node number %d)\n",
 437                         s->name, num);
 438                 s->video_dev.v4l2_dev = NULL;
 439                 return ret;
 440         }
 441
 442         name = video_device_node_name(&s->video_dev);
 443
 444         switch (vfl_type) {
 445         case VFL_TYPE_GRABBER:
 446                 CX18_INFO("Registered device %s for %s (%d x %d.%02d kB)\n",
 447                           name, s->name, cx->stream_buffers[type],
 448                           cx->stream_buf_size[type] / 1024,
 449                           (cx->stream_buf_size[type] * 100 / 1024) % 100);
 450                 break;
 451
 452         case VFL_TYPE_RADIO:
 453                 CX18_INFO("Registered device %s for %s\n", name, s->name);
 454                 break;
 455
 456         case VFL_TYPE_VBI:
 457                 if (cx->stream_buffers[type])
 458                         CX18_INFO("Registered device %s for %s (%d x %d bytes)\n",
 459                                   name, s->name, cx->stream_buffers[type],
 460                                   cx->stream_buf_size[type]);
 461                 else
 462                         CX18_INFO("Registered device %s for %s\n",
 463                                 name, s->name);
 464                 break;
 465         }
 466
 467         return 0;
 468 }
 469
 470 /* Register v4l2 devices */
 471 int cx18_streams_register(struct cx18 *cx)
 472 {
 473         int type;
 474         int err;
 475         int ret = 0;
 476
 477         /* Register V4L2 devices */
 478         for (type = 0; type < CX18_MAX_STREAMS; type++) {
 479                 err = cx18_reg_dev(cx, type);
 480                 if (err && ret == 0)
 481                         ret = err;
 482         }
 483
 484         if (ret == 0)
 485                 return 0;
 486
 487         /* One or more streams could not be initialized. Clean 'em all up. */
 488         cx18_streams_cleanup(cx, 1);
 489         return ret;
 490 }
 491
 492 /* Unregister v4l2 devices */
 493 void cx18_streams_cleanup(struct cx18 *cx, int unregister)
 494 {
 495         struct video_device *vdev;
 496         int type;
 497
 498         /* Teardown all streams */
 499         for (type = 0; type < CX18_MAX_STREAMS; type++) {
 500
 501                 /* The TS has a cx18_dvb structure, not a video_device */
 502                 if (type == CX18_ENC_STREAM_TYPE_TS) {
 503                         if (cx->streams[type].dvb != NULL) {
 504                                 if (unregister)
 505                                         cx18_dvb_unregister(&cx->streams[type]);
 506                                 kfree(cx->streams[type].dvb);
 507                                 cx->streams[type].dvb = NULL;
 508                                 cx18_stream_free(&cx->streams[type]);
 509                         }
 510                         continue;
 511                 }
 512
 513                 /* No struct video_device, but can have buffers allocated */
 514                 if (type == CX18_ENC_STREAM_TYPE_IDX) {
 515                         /* If the module params didn't inhibit IDX ... */
 516                         if (cx->stream_buffers[type] != 0) {
 517                                 cx->stream_buffers[type] = 0;
 518                                 /*
 519                                  * Before calling cx18_stream_free(),
 520                                  * check if the IDX stream was actually set up.
 521                                  * Needed, since the cx18_probe() error path
 522                                  * exits through here as well as normal clean up
 523                                  */
 524                                 if (cx->streams[type].buffers != 0)
 525                                         cx18_stream_free(&cx->streams[type]);
 526                         }
 527                         continue;
 528                 }
 529
 530                 /* If struct video_device exists, can have buffers allocated */
 531                 vdev = &cx->streams[type].video_dev;
 532
 533                 if (vdev->v4l2_dev == NULL)
 534                         continue;
 535
 536                 if (type == CX18_ENC_STREAM_TYPE_YUV)
 537                         videobuf_mmap_free(&cx->streams[type].vbuf_q);
 538
 539                 cx18_stream_free(&cx->streams[type]);
 540
 541                 video_unregister_device(vdev);
 542         }
 543 }
 544
 545 static void cx18_vbi_setup(struct cx18_stream *s)
 546 {
 547         struct cx18 *cx = s->cx;
 548         int raw = cx18_raw_vbi(cx);
 549         u32 data[CX2341X_MBOX_MAX_DATA];
 550         int lines;
 551
 552         if (cx->is_60hz) {
 553                 cx->vbi.count = 12;
 554                 cx->vbi.start[0] = 10;
 555                 cx->vbi.start[1] = 273;
 556         } else {        /* PAL/SECAM */
 557                 cx->vbi.count = 18;
 558                 cx->vbi.start[0] = 6;
 559                 cx->vbi.start[1] = 318;
 560         }
 561
 562         /* setup VBI registers */
 563         if (raw)
 564                 v4l2_subdev_call(cx->sd_av, vbi, s_raw_fmt, &cx->vbi.in.fmt.vbi);
 565         else
 566                 v4l2_subdev_call(cx->sd_av, vbi, s_sliced_fmt, &cx->vbi.in.fmt.sliced);
 567
 568         /*
 569          * Send the CX18_CPU_SET_RAW_VBI_PARAM API command to setup Encoder Raw
 570          * VBI when the first analog capture channel starts, as once it starts
 571          * (e.g. MPEG), we can't effect any change in the Encoder Raw VBI setup
 572          * (i.e. for the VBI capture channels).  We also send it for each
 573          * analog capture channel anyway just to make sure we get the proper
 574          * behavior
 575          */
 576         if (raw) {
 577                 lines = cx->vbi.count * 2;
 578         } else {
 579                 /*
 580                  * For 525/60 systems, according to the VIP 2 & BT.656 std:
 581                  * The EAV RP code's Field bit toggles on line 4, a few lines
 582                  * after the Vertcal Blank bit has already toggled.
 583                  * Tell the encoder to capture 21-4+1=18 lines per field,
 584                  * since we want lines 10 through 21.
 585                  *
 586                  * For 625/50 systems, according to the VIP 2 & BT.656 std:
 587                  * The EAV RP code's Field bit toggles on line 1, a few lines
 588                  * after the Vertcal Blank bit has already toggled.
 589                  * (We've actually set the digitizer so that the Field bit
 590                  * toggles on line 2.) Tell the encoder to capture 23-2+1=22
 591                  * lines per field, since we want lines 6 through 23.
 592                  */
 593                 lines = cx->is_60hz ? (21 - 4 + 1) * 2 : (23 - 2 + 1) * 2;
 594         }
 595
 596         data[0] = s->handle;
 597         /* Lines per field */
 598         data[1] = (lines / 2) | ((lines / 2) << 16);
 599         /* bytes per line */
 600         data[2] = (raw ? VBI_ACTIVE_SAMPLES
 601                        : (cx->is_60hz ? VBI_HBLANK_SAMPLES_60HZ
 602                                       : VBI_HBLANK_SAMPLES_50HZ));
 603         /* Every X number of frames a VBI interrupt arrives
 604            (frames as in 25 or 30 fps) */
 605         data[3] = 1;
 606         /*
 607          * Set the SAV/EAV RP codes to look for as start/stop points
 608          * when in VIP-1.1 mode
 609          */
 610         if (raw) {
 611                 /*
 612                  * Start codes for beginning of "active" line in vertical blank
 613                  * 0x20 (               VerticalBlank                )
 614                  * 0x60 (     EvenField VerticalBlank                )
 615                  */
 616                 data[4] = 0x20602060;
 617                 /*
 618                  * End codes for end of "active" raw lines and regular lines
 619                  * 0x30 (               VerticalBlank HorizontalBlank)
 620                  * 0x70 (     EvenField VerticalBlank HorizontalBlank)
 621                  * 0x90 (Task                         HorizontalBlank)
 622                  * 0xd0 (Task EvenField               HorizontalBlank)
 623                  */
 624                 data[5] = 0x307090d0;
 625         } else {
 626                 /*
 627                  * End codes for active video, we want data in the hblank region
 628                  * 0xb0 (Task         0 VerticalBlank HorizontalBlank)
 629                  * 0xf0 (Task EvenField VerticalBlank HorizontalBlank)
 630                  *
 631                  * Since the V bit is only allowed to toggle in the EAV RP code,
 632                  * just before the first active region line, these two
 633                  * are problematic:
 634                  * 0x90 (Task                         HorizontalBlank)
 635                  * 0xd0 (Task EvenField               HorizontalBlank)
 636                  *
 637                  * We have set the digitzer such that we don't have to worry
 638                  * about these problem codes.
 639                  */
 640                 data[4] = 0xB0F0B0F0;
 641                 /*
 642                  * Start codes for beginning of active line in vertical blank
 643                  * 0xa0 (Task           VerticalBlank                )
 644                  * 0xe0 (Task EvenField VerticalBlank                )
 645                  */
 646                 data[5] = 0xA0E0A0E0;
 647         }
 648
 649         CX18_DEBUG_INFO("Setup VBI h: %d lines %x bpl %d fr %d %x %x\n",
 650                         data[0], data[1], data[2], data[3], data[4], data[5]);
 651
 652         cx18_api(cx, CX18_CPU_SET_RAW_VBI_PARAM, 6, data);
 653 }
 654
 655 void cx18_stream_rotate_idx_mdls(struct cx18 *cx)
 656 {
 657         struct cx18_stream *s = &cx->streams[CX18_ENC_STREAM_TYPE_IDX];
 658         struct cx18_mdl *mdl;
 659
 660         if (!cx18_stream_enabled(s))
 661                 return;
 662
 663         /* Return if the firmware is not running low on MDLs */
 664         if ((atomic_read(&s->q_free.depth) + atomic_read(&s->q_busy.depth)) >=
 665                                             CX18_ENC_STREAM_TYPE_IDX_FW_MDL_MIN)
 666                 return;
 667
 668         /* Return if there are no MDLs to rotate back to the firmware */
 669         if (atomic_read(&s->q_full.depth) < 2)
 670                 return;
 671
 672         /*
 673          * Take the oldest IDX MDL still holding data, and discard its index
 674          * entries by scheduling the MDL to go back to the firmware
 675          */
 676         mdl = cx18_dequeue(s, &s->q_full);
 677         if (mdl != NULL)
 678                 cx18_enqueue(s, mdl, &s->q_free);
 679 }
 680
 681 static
 682 struct cx18_queue *_cx18_stream_put_mdl_fw(struct cx18_stream *s,
 683                                            struct cx18_mdl *mdl)
 684 {
 685         struct cx18 *cx = s->cx;
 686         struct cx18_queue *q;
 687
 688         /* Don't give it to the firmware, if we're not running a capture */
 689         if (s->handle == CX18_INVALID_TASK_HANDLE ||
 690             test_bit(CX18_F_S_STOPPING, &s->s_flags) ||
 691             !test_bit(CX18_F_S_STREAMING, &s->s_flags))
 692                 return cx18_enqueue(s, mdl, &s->q_free);
 693
 694         q = cx18_enqueue(s, mdl, &s->q_busy);
 695         if (q != &s->q_busy)
 696                 return q; /* The firmware has the max MDLs it can handle */
 697
 698         cx18_mdl_sync_for_device(s, mdl);
 699         cx18_vapi(cx, CX18_CPU_DE_SET_MDL, 5, s->handle,
 700                   (void __iomem *) &cx->scb->cpu_mdl[mdl->id] - cx->enc_mem,
 701                   s->bufs_per_mdl, mdl->id, s->mdl_size);
 702         return q;
 703 }
 704
 705 static
 706 void _cx18_stream_load_fw_queue(struct cx18_stream *s)
 707 {
 708         struct cx18_queue *q;
 709         struct cx18_mdl *mdl;
 710
 711         if (atomic_read(&s->q_free.depth) == 0 ||
 712             atomic_read(&s->q_busy.depth) >= CX18_MAX_FW_MDLS_PER_STREAM)
 713                 return;
 714
 715         /* Move from q_free to q_busy notifying the firmware, until the limit */
 716         do {
 717                 mdl = cx18_dequeue(s, &s->q_free);
 718                 if (mdl == NULL)
 719                         break;
 720                 q = _cx18_stream_put_mdl_fw(s, mdl);
 721         } while (atomic_read(&s->q_busy.depth) < CX18_MAX_FW_MDLS_PER_STREAM
 722                  && q == &s->q_busy);
 723 }
 724
 725 void cx18_out_work_handler(struct work_struct *work)
 726 {
 727         struct cx18_stream *s =
 728                          container_of(work, struct cx18_stream, out_work_order);
 729
 730         _cx18_stream_load_fw_queue(s);
 731 }
 732
 733 static void cx18_stream_configure_mdls(struct cx18_stream *s)
 734 {
 735         cx18_unload_queues(s);
 736
 737         switch (s->type) {
 738         case CX18_ENC_STREAM_TYPE_YUV:
 739                 /*
 740                  * Height should be a multiple of 32 lines.
 741                  * Set the MDL size to the exact size needed for one frame.
 742                  * Use enough buffers per MDL to cover the MDL size
 743                  */
 744                 if (s->pixelformat == V4L2_PIX_FMT_HM12)
 745                         s->mdl_size = 720 * s->cx->cxhdl.height * 3 / 2;
 746                 else
 747                         s->mdl_size = 720 * s->cx->cxhdl.height * 2;
 748                 s->bufs_per_mdl = s->mdl_size / s->buf_size;
 749                 if (s->mdl_size % s->buf_size)
 750                         s->bufs_per_mdl++;
 751                 break;
 752         case CX18_ENC_STREAM_TYPE_VBI:
 753                 s->bufs_per_mdl = 1;
 754                 if  (cx18_raw_vbi(s->cx)) {
 755                         s->mdl_size = (s->cx->is_60hz ? 12 : 18)
 756                                                        * 2 * VBI_ACTIVE_SAMPLES;
 757                 } else {
 758                         /*
 759                          * See comment in cx18_vbi_setup() below about the
 760                          * extra lines we capture in sliced VBI mode due to
 761                          * the lines on which EAV RP codes toggle.
 762                         */
 763                         s->mdl_size = s->cx->is_60hz
 764                                    ? (21 - 4 + 1) * 2 * VBI_HBLANK_SAMPLES_60HZ
 765                                    : (23 - 2 + 1) * 2 * VBI_HBLANK_SAMPLES_50HZ;
 766                 }
 767                 break;
 768         default:
 769                 s->bufs_per_mdl = 1;
 770                 s->mdl_size = s->buf_size * s->bufs_per_mdl;
 771                 break;
 772         }
 773
 774         cx18_load_queues(s);
 775 }
 776
 777 int cx18_start_v4l2_encode_stream(struct cx18_stream *s)
 778 {
 779         u32 data[MAX_MB_ARGUMENTS];
 780         struct cx18 *cx = s->cx;
 781         int captype = 0;
 782         struct cx18_stream *s_idx;
 783
 784         if (!cx18_stream_enabled(s))
 785                 return -EINVAL;
 786
 787         CX18_DEBUG_INFO("Start encoder stream %s\n", s->name);
 788
 789         switch (s->type) {
 790         case CX18_ENC_STREAM_TYPE_MPG:
 791                 captype = CAPTURE_CHANNEL_TYPE_MPEG;
 792                 cx->mpg_data_received = cx->vbi_data_inserted = 0;
 793                 cx->dualwatch_jiffies = jiffies;
 794                 cx->dualwatch_stereo_mode = v4l2_ctrl_g_ctrl(cx->cxhdl.audio_mode);
 795                 cx->search_pack_header = 0;
 796                 break;
 797
 798         case CX18_ENC_STREAM_TYPE_IDX:
 799                 captype = CAPTURE_CHANNEL_TYPE_INDEX;
 800                 break;
 801         case CX18_ENC_STREAM_TYPE_TS:
 802                 captype = CAPTURE_CHANNEL_TYPE_TS;
 803                 break;
 804         case CX18_ENC_STREAM_TYPE_YUV:
 805                 captype = CAPTURE_CHANNEL_TYPE_YUV;
 806                 break;
 807         case CX18_ENC_STREAM_TYPE_PCM:
 808                 captype = CAPTURE_CHANNEL_TYPE_PCM;
 809                 break;
 810         case CX18_ENC_STREAM_TYPE_VBI:
 811 #ifdef CX18_ENCODER_PARSES_SLICED
 812                 captype = cx18_raw_vbi(cx) ?
 813                      CAPTURE_CHANNEL_TYPE_VBI : CAPTURE_CHANNEL_TYPE_SLICED_VBI;
 814 #else
 815                 /*
 816                  * Currently we set things up so that Sliced VBI from the
 817                  * digitizer is handled as Raw VBI by the encoder
 818                  */
 819                 captype = CAPTURE_CHANNEL_TYPE_VBI;
 820 #endif
 821                 cx->vbi.frame = 0;
 822                 cx->vbi.inserted_frame = 0;
 823                 memset(cx->vbi.sliced_mpeg_size,
 824                         0, sizeof(cx->vbi.sliced_mpeg_size));
 825                 break;
 826         default:
 827                 return -EINVAL;
 828         }
 829
 830         /* Clear Streamoff flags in case left from last capture */
 831         clear_bit(CX18_F_S_STREAMOFF, &s->s_flags);
 832
 833         cx18_vapi_result(cx, data, CX18_CREATE_TASK, 1, CPU_CMD_MASK_CAPTURE);
 834         s->handle = data[0];
 835         cx18_vapi(cx, CX18_CPU_SET_CHANNEL_TYPE, 2, s->handle, captype);
 836
 837         /*
 838          * For everything but CAPTURE_CHANNEL_TYPE_TS, play it safe and
 839          * set up all the parameters, as it is not obvious which parameters the
 840          * firmware shares across capture channel types and which it does not.
 841          *
 842          * Some of the cx18_vapi() calls below apply to only certain capture
 843          * channel types.  We're hoping there's no harm in calling most of them
 844          * anyway, as long as the values are all consistent.  Setting some
 845          * shared parameters will have no effect once an analog capture channel
 846          * has started streaming.
 847          */
 848         if (captype != CAPTURE_CHANNEL_TYPE_TS) {
 849                 cx18_vapi(cx, CX18_CPU_SET_VER_CROP_LINE, 2, s->handle, 0);
 850                 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 3, 1);
 851                 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 8, 0);
 852                 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 4, 1);
 853
 854                 /*
 855                  * Audio related reset according to
 856                  * Documentation/video4linux/cx2341x/fw-encoder-api.txt
 857                  */
 858                 if (atomic_read(&cx->ana_capturing) == 0)
 859                         cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 2,
 860                                   s->handle, 12);
 861
 862                 /*
 863                  * Number of lines for Field 1 & Field 2 according to
 864                  * Documentation/video4linux/cx2341x/fw-encoder-api.txt
 865                  * Field 1 is 312 for 625 line systems in BT.656
 866                  * Field 2 is 313 for 625 line systems in BT.656
 867                  */
 868                 cx18_vapi(cx, CX18_CPU_SET_CAPTURE_LINE_NO, 3,
 869                           s->handle, 312, 313);
 870
 871                 if (cx->v4l2_cap & V4L2_CAP_VBI_CAPTURE)
 872                         cx18_vbi_setup(s);
 873
 874                 /*
 875                  * Select to receive I, P, and B frame index entries, if the
 876                  * index stream is enabled.  Otherwise disable index entry
 877                  * generation.
 878                  */
 879                 s_idx = &cx->streams[CX18_ENC_STREAM_TYPE_IDX];
 880                 cx18_vapi_result(cx, data, CX18_CPU_SET_INDEXTABLE, 2,
 881                                  s->handle, cx18_stream_enabled(s_idx) ? 7 : 0);
 882
 883                 /* Call out to the common CX2341x API setup for user controls */
 884                 cx->cxhdl.priv = s;
 885                 cx2341x_handler_setup(&cx->cxhdl);
 886
 887                 /*
 888                  * When starting a capture and we're set for radio,
 889                  * ensure the video is muted, despite the user control.
 890                  */
 891                 if (!cx->cxhdl.video_mute &&
 892                     test_bit(CX18_F_I_RADIO_USER, &cx->i_flags))
 893                         cx18_vapi(cx, CX18_CPU_SET_VIDEO_MUTE, 2, s->handle,
 894                           (v4l2_ctrl_g_ctrl(cx->cxhdl.video_mute_yuv) << 8) | 1);
 895
 896                 /* Enable the Video Format Converter for UYVY 4:2:2 support,
 897                  * rather than the default HM12 Macroblovk 4:2:0 support.
 898                  */
 899                 if (captype == CAPTURE_CHANNEL_TYPE_YUV) {
 900                         if (s->pixelformat == V4L2_PIX_FMT_UYVY)
 901                                 cx18_vapi(cx, CX18_CPU_SET_VFC_PARAM, 2,
 902                                         s->handle, 1);
 903                         else
 904                                 /* If in doubt, default to HM12 */
 905                                 cx18_vapi(cx, CX18_CPU_SET_VFC_PARAM, 2,
 906                                         s->handle, 0);
 907                 }
 908         }
 909
 910         if (atomic_read(&cx->tot_capturing) == 0) {
 911                 cx2341x_handler_set_busy(&cx->cxhdl, 1);
 912                 clear_bit(CX18_F_I_EOS, &cx->i_flags);
 913                 cx18_write_reg(cx, 7, CX18_DSP0_INTERRUPT_MASK);
 914         }
 915
 916         cx18_vapi(cx, CX18_CPU_DE_SET_MDL_ACK, 3, s->handle,
 917                 (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][0] - cx->enc_mem,
 918                 (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][1] - cx->enc_mem);
 919
 920         /* Init all the cpu_mdls for this stream */
 921         cx18_stream_configure_mdls(s);
 922         _cx18_stream_load_fw_queue(s);
 923
 924         /* begin_capture */
 925         if (cx18_vapi(cx, CX18_CPU_CAPTURE_START, 1, s->handle)) {
 926                 CX18_DEBUG_WARN("Error starting capture!\n");
 927                 /* Ensure we're really not capturing before releasing MDLs */
 928                 set_bit(CX18_F_S_STOPPING, &s->s_flags);
 929                 if (s->type == CX18_ENC_STREAM_TYPE_MPG)
 930                         cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, 1);
 931                 else
 932                         cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
 933                 clear_bit(CX18_F_S_STREAMING, &s->s_flags);
 934                 /* FIXME - CX18_F_S_STREAMOFF as well? */
 935                 cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
 936                 cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
 937                 s->handle = CX18_INVALID_TASK_HANDLE;
 938                 clear_bit(CX18_F_S_STOPPING, &s->s_flags);
 939                 if (atomic_read(&cx->tot_capturing) == 0) {
 940                         set_bit(CX18_F_I_EOS, &cx->i_flags);
 941                         cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
 942                 }
 943                 return -EINVAL;
 944         }
 945
 946         /* you're live! sit back and await interrupts :) */
 947         if (captype != CAPTURE_CHANNEL_TYPE_TS)
 948                 atomic_inc(&cx->ana_capturing);
 949         atomic_inc(&cx->tot_capturing);
 950         return 0;
 951 }
 952 EXPORT_SYMBOL(cx18_start_v4l2_encode_stream);
 953
 954 void cx18_stop_all_captures(struct cx18 *cx)
 955 {
 956         int i;
 957
 958         for (i = CX18_MAX_STREAMS - 1; i >= 0; i--) {
 959                 struct cx18_stream *s = &cx->streams[i];
 960
 961                 if (!cx18_stream_enabled(s))
 962                         continue;
 963                 if (test_bit(CX18_F_S_STREAMING, &s->s_flags))
 964                         cx18_stop_v4l2_encode_stream(s, 0);
 965         }
 966 }
 967
 968 int cx18_stop_v4l2_encode_stream(struct cx18_stream *s, int gop_end)
 969 {
 970         struct cx18 *cx = s->cx;
 971
 972         if (!cx18_stream_enabled(s))
 973                 return -EINVAL;
 974
 975         /* This function assumes that you are allowed to stop the capture
 976            and that we are actually capturing */
 977
 978         CX18_DEBUG_INFO("Stop Capture\n");
 979
 980         if (atomic_read(&cx->tot_capturing) == 0)
 981                 return 0;
 982
 983         set_bit(CX18_F_S_STOPPING, &s->s_flags);
 984         if (s->type == CX18_ENC_STREAM_TYPE_MPG)
 985                 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, !gop_end);
 986         else
 987                 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
 988
 989         if (s->type == CX18_ENC_STREAM_TYPE_MPG && gop_end) {
 990                 CX18_INFO("ignoring gop_end: not (yet?) supported by the firmware\n");
 991         }
 992
 993         if (s->type != CX18_ENC_STREAM_TYPE_TS)
 994                 atomic_dec(&cx->ana_capturing);
 995         atomic_dec(&cx->tot_capturing);
 996
 997         /* Clear capture and no-read bits */
 998         clear_bit(CX18_F_S_STREAMING, &s->s_flags);
 999
1000         /* Tell the CX23418 it can't use our buffers anymore */
1001         cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
1002
1003         cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
1004         s->handle = CX18_INVALID_TASK_HANDLE;
1005         clear_bit(CX18_F_S_STOPPING, &s->s_flags);
1006
1007         if (atomic_read(&cx->tot_capturing) > 0)
1008                 return 0;
1009
1010         cx2341x_handler_set_busy(&cx->cxhdl, 0);
1011         cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
1012         wake_up(&s->waitq);
1013
1014         return 0;
1015 }
1016 EXPORT_SYMBOL(cx18_stop_v4l2_encode_stream);
1017
1018 u32 cx18_find_handle(struct cx18 *cx)
1019 {
1020         int i;
1021
1022         /* find first available handle to be used for global settings */
1023         for (i = 0; i < CX18_MAX_STREAMS; i++) {
1024                 struct cx18_stream *s = &cx->streams[i];
1025
1026                 if (s->video_dev.v4l2_dev && (s->handle != CX18_INVALID_TASK_HANDLE))
1027                         return s->handle;
1028         }
1029         return CX18_INVALID_TASK_HANDLE;
1030 }
1031
1032 struct cx18_stream *cx18_handle_to_stream(struct cx18 *cx, u32 handle)
1033 {
1034         int i;
1035         struct cx18_stream *s;
1036
1037         if (handle == CX18_INVALID_TASK_HANDLE)
1038                 return NULL;
1039
1040         for (i = 0; i < CX18_MAX_STREAMS; i++) {
1041                 s = &cx->streams[i];
1042                 if (s->handle != handle)
1043                         continue;
1044                 if (cx18_stream_enabled(s))
1045                         return s;
1046         }
1047         return NULL;
1048 }