treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157
[sfrench/cifs-2.6.git] / drivers / media / i2c / tvp7002.c
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* Texas Instruments Triple 8-/10-BIT 165-/110-MSPS Video and Graphics
3  * Digitizer with Horizontal PLL registers
4  *
5  * Copyright (C) 2009 Texas Instruments Inc
6  * Author: Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>
7  *
8  * This code is partially based upon the TVP5150 driver
9  * written by Mauro Carvalho Chehab <mchehab@kernel.org>,
10  * the TVP514x driver written by Vaibhav Hiremath <hvaibhav@ti.com>
11  * and the TVP7002 driver in the TI LSP 2.10.00.14. Revisions by
12  * Muralidharan Karicheri and Snehaprabha Narnakaje (TI).
13  */
14 #include <linux/delay.h>
15 #include <linux/i2c.h>
16 #include <linux/slab.h>
17 #include <linux/videodev2.h>
18 #include <linux/module.h>
19 #include <linux/of.h>
20 #include <linux/of_graph.h>
21 #include <linux/v4l2-dv-timings.h>
22 #include <media/i2c/tvp7002.h>
23 #include <media/v4l2-async.h>
24 #include <media/v4l2-device.h>
25 #include <media/v4l2-common.h>
26 #include <media/v4l2-ctrls.h>
27 #include <media/v4l2-fwnode.h>
28
29 #include "tvp7002_reg.h"
30
31 MODULE_DESCRIPTION("TI TVP7002 Video and Graphics Digitizer driver");
32 MODULE_AUTHOR("Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>");
33 MODULE_LICENSE("GPL");
34
35 /* I2C retry attempts */
36 #define I2C_RETRY_COUNT         (5)
37
38 /* End of registers */
39 #define TVP7002_EOR             0x5c
40
41 /* Read write definition for registers */
42 #define TVP7002_READ            0
43 #define TVP7002_WRITE           1
44 #define TVP7002_RESERVED        2
45
46 /* Interlaced vs progressive mask and shift */
47 #define TVP7002_IP_SHIFT        5
48 #define TVP7002_INPR_MASK       (0x01 << TVP7002_IP_SHIFT)
49
50 /* Shift for CPL and LPF registers */
51 #define TVP7002_CL_SHIFT        8
52 #define TVP7002_CL_MASK         0x0f
53
54 /* Debug functions */
55 static bool debug;
56 module_param(debug, bool, 0644);
57 MODULE_PARM_DESC(debug, "Debug level (0-2)");
58
59 /* Structure for register values */
60 struct i2c_reg_value {
61         u8 reg;
62         u8 value;
63         u8 type;
64 };
65
66 /*
67  * Register default values (according to tvp7002 datasheet)
68  * In the case of read-only registers, the value (0xff) is
69  * never written. R/W functionality is controlled by the
70  * writable bit in the register struct definition.
71  */
72 static const struct i2c_reg_value tvp7002_init_default[] = {
73         { TVP7002_CHIP_REV, 0xff, TVP7002_READ },
74         { TVP7002_HPLL_FDBK_DIV_MSBS, 0x67, TVP7002_WRITE },
75         { TVP7002_HPLL_FDBK_DIV_LSBS, 0x20, TVP7002_WRITE },
76         { TVP7002_HPLL_CRTL, 0xa0, TVP7002_WRITE },
77         { TVP7002_HPLL_PHASE_SEL, 0x80, TVP7002_WRITE },
78         { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
79         { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
80         { TVP7002_HSYNC_OUT_W, 0x60, TVP7002_WRITE },
81         { TVP7002_B_FINE_GAIN, 0x00, TVP7002_WRITE },
82         { TVP7002_G_FINE_GAIN, 0x00, TVP7002_WRITE },
83         { TVP7002_R_FINE_GAIN, 0x00, TVP7002_WRITE },
84         { TVP7002_B_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
85         { TVP7002_G_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
86         { TVP7002_R_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
87         { TVP7002_SYNC_CTL_1, 0x20, TVP7002_WRITE },
88         { TVP7002_HPLL_AND_CLAMP_CTL, 0x2e, TVP7002_WRITE },
89         { TVP7002_SYNC_ON_G_THRS, 0x5d, TVP7002_WRITE },
90         { TVP7002_SYNC_SEPARATOR_THRS, 0x47, TVP7002_WRITE },
91         { TVP7002_HPLL_PRE_COAST, 0x00, TVP7002_WRITE },
92         { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
93         { TVP7002_SYNC_DETECT_STAT, 0xff, TVP7002_READ },
94         { TVP7002_OUT_FORMATTER, 0x47, TVP7002_WRITE },
95         { TVP7002_MISC_CTL_1, 0x01, TVP7002_WRITE },
96         { TVP7002_MISC_CTL_2, 0x00, TVP7002_WRITE },
97         { TVP7002_MISC_CTL_3, 0x01, TVP7002_WRITE },
98         { TVP7002_IN_MUX_SEL_1, 0x00, TVP7002_WRITE },
99         { TVP7002_IN_MUX_SEL_2, 0x67, TVP7002_WRITE },
100         { TVP7002_B_AND_G_COARSE_GAIN, 0x77, TVP7002_WRITE },
101         { TVP7002_R_COARSE_GAIN, 0x07, TVP7002_WRITE },
102         { TVP7002_FINE_OFF_LSBS, 0x00, TVP7002_WRITE },
103         { TVP7002_B_COARSE_OFF, 0x10, TVP7002_WRITE },
104         { TVP7002_G_COARSE_OFF, 0x10, TVP7002_WRITE },
105         { TVP7002_R_COARSE_OFF, 0x10, TVP7002_WRITE },
106         { TVP7002_HSOUT_OUT_START, 0x08, TVP7002_WRITE },
107         { TVP7002_MISC_CTL_4, 0x00, TVP7002_WRITE },
108         { TVP7002_B_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
109         { TVP7002_G_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
110         { TVP7002_R_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
111         { TVP7002_AUTO_LVL_CTL_ENABLE, 0x80, TVP7002_WRITE },
112         { TVP7002_DGTL_ALC_OUT_MSBS, 0xff, TVP7002_READ },
113         { TVP7002_AUTO_LVL_CTL_FILTER, 0x53, TVP7002_WRITE },
114         { 0x29, 0x08, TVP7002_RESERVED },
115         { TVP7002_FINE_CLAMP_CTL, 0x07, TVP7002_WRITE },
116         /* PWR_CTL is controlled only by the probe and reset functions */
117         { TVP7002_PWR_CTL, 0x00, TVP7002_RESERVED },
118         { TVP7002_ADC_SETUP, 0x50, TVP7002_WRITE },
119         { TVP7002_COARSE_CLAMP_CTL, 0x00, TVP7002_WRITE },
120         { TVP7002_SOG_CLAMP, 0x80, TVP7002_WRITE },
121         { TVP7002_RGB_COARSE_CLAMP_CTL, 0x8c, TVP7002_WRITE },
122         { TVP7002_SOG_COARSE_CLAMP_CTL, 0x04, TVP7002_WRITE },
123         { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
124         { 0x32, 0x18, TVP7002_RESERVED },
125         { 0x33, 0x60, TVP7002_RESERVED },
126         { TVP7002_MVIS_STRIPPER_W, 0xff, TVP7002_RESERVED },
127         { TVP7002_VSYNC_ALGN, 0x10, TVP7002_WRITE },
128         { TVP7002_SYNC_BYPASS, 0x00, TVP7002_WRITE },
129         { TVP7002_L_FRAME_STAT_LSBS, 0xff, TVP7002_READ },
130         { TVP7002_L_FRAME_STAT_MSBS, 0xff, TVP7002_READ },
131         { TVP7002_CLK_L_STAT_LSBS, 0xff, TVP7002_READ },
132         { TVP7002_CLK_L_STAT_MSBS, 0xff, TVP7002_READ },
133         { TVP7002_HSYNC_W, 0xff, TVP7002_READ },
134         { TVP7002_VSYNC_W, 0xff, TVP7002_READ },
135         { TVP7002_L_LENGTH_TOL, 0x03, TVP7002_WRITE },
136         { 0x3e, 0x60, TVP7002_RESERVED },
137         { TVP7002_VIDEO_BWTH_CTL, 0x01, TVP7002_WRITE },
138         { TVP7002_AVID_START_PIXEL_LSBS, 0x01, TVP7002_WRITE },
139         { TVP7002_AVID_START_PIXEL_MSBS, 0x2c, TVP7002_WRITE },
140         { TVP7002_AVID_STOP_PIXEL_LSBS, 0x06, TVP7002_WRITE },
141         { TVP7002_AVID_STOP_PIXEL_MSBS, 0x2c, TVP7002_WRITE },
142         { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
143         { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
144         { TVP7002_VBLK_F_0_DURATION, 0x1e, TVP7002_WRITE },
145         { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
146         { TVP7002_FBIT_F_0_START_L_OFF, 0x00, TVP7002_WRITE },
147         { TVP7002_FBIT_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
148         { TVP7002_YUV_Y_G_COEF_LSBS, 0xe3, TVP7002_WRITE },
149         { TVP7002_YUV_Y_G_COEF_MSBS, 0x16, TVP7002_WRITE },
150         { TVP7002_YUV_Y_B_COEF_LSBS, 0x4f, TVP7002_WRITE },
151         { TVP7002_YUV_Y_B_COEF_MSBS, 0x02, TVP7002_WRITE },
152         { TVP7002_YUV_Y_R_COEF_LSBS, 0xce, TVP7002_WRITE },
153         { TVP7002_YUV_Y_R_COEF_MSBS, 0x06, TVP7002_WRITE },
154         { TVP7002_YUV_U_G_COEF_LSBS, 0xab, TVP7002_WRITE },
155         { TVP7002_YUV_U_G_COEF_MSBS, 0xf3, TVP7002_WRITE },
156         { TVP7002_YUV_U_B_COEF_LSBS, 0x00, TVP7002_WRITE },
157         { TVP7002_YUV_U_B_COEF_MSBS, 0x10, TVP7002_WRITE },
158         { TVP7002_YUV_U_R_COEF_LSBS, 0x55, TVP7002_WRITE },
159         { TVP7002_YUV_U_R_COEF_MSBS, 0xfc, TVP7002_WRITE },
160         { TVP7002_YUV_V_G_COEF_LSBS, 0x78, TVP7002_WRITE },
161         { TVP7002_YUV_V_G_COEF_MSBS, 0xf1, TVP7002_WRITE },
162         { TVP7002_YUV_V_B_COEF_LSBS, 0x88, TVP7002_WRITE },
163         { TVP7002_YUV_V_B_COEF_MSBS, 0xfe, TVP7002_WRITE },
164         { TVP7002_YUV_V_R_COEF_LSBS, 0x00, TVP7002_WRITE },
165         { TVP7002_YUV_V_R_COEF_MSBS, 0x10, TVP7002_WRITE },
166         /* This signals end of register values */
167         { TVP7002_EOR, 0xff, TVP7002_RESERVED }
168 };
169
170 /* Register parameters for 480P */
171 static const struct i2c_reg_value tvp7002_parms_480P[] = {
172         { TVP7002_HPLL_FDBK_DIV_MSBS, 0x35, TVP7002_WRITE },
173         { TVP7002_HPLL_FDBK_DIV_LSBS, 0xa0, TVP7002_WRITE },
174         { TVP7002_HPLL_CRTL, 0x02, TVP7002_WRITE },
175         { TVP7002_AVID_START_PIXEL_LSBS, 0x91, TVP7002_WRITE },
176         { TVP7002_AVID_START_PIXEL_MSBS, 0x00, TVP7002_WRITE },
177         { TVP7002_AVID_STOP_PIXEL_LSBS, 0x0B, TVP7002_WRITE },
178         { TVP7002_AVID_STOP_PIXEL_MSBS, 0x00, TVP7002_WRITE },
179         { TVP7002_VBLK_F_0_START_L_OFF, 0x03, TVP7002_WRITE },
180         { TVP7002_VBLK_F_1_START_L_OFF, 0x01, TVP7002_WRITE },
181         { TVP7002_VBLK_F_0_DURATION, 0x13, TVP7002_WRITE },
182         { TVP7002_VBLK_F_1_DURATION, 0x13, TVP7002_WRITE },
183         { TVP7002_ALC_PLACEMENT, 0x18, TVP7002_WRITE },
184         { TVP7002_CLAMP_START, 0x06, TVP7002_WRITE },
185         { TVP7002_CLAMP_W, 0x10, TVP7002_WRITE },
186         { TVP7002_HPLL_PRE_COAST, 0x03, TVP7002_WRITE },
187         { TVP7002_HPLL_POST_COAST, 0x03, TVP7002_WRITE },
188         { TVP7002_EOR, 0xff, TVP7002_RESERVED }
189 };
190
191 /* Register parameters for 576P */
192 static const struct i2c_reg_value tvp7002_parms_576P[] = {
193         { TVP7002_HPLL_FDBK_DIV_MSBS, 0x36, TVP7002_WRITE },
194         { TVP7002_HPLL_FDBK_DIV_LSBS, 0x00, TVP7002_WRITE },
195         { TVP7002_HPLL_CRTL, 0x18, TVP7002_WRITE },
196         { TVP7002_AVID_START_PIXEL_LSBS, 0x9B, TVP7002_WRITE },
197         { TVP7002_AVID_START_PIXEL_MSBS, 0x00, TVP7002_WRITE },
198         { TVP7002_AVID_STOP_PIXEL_LSBS, 0x0F, TVP7002_WRITE },
199         { TVP7002_AVID_STOP_PIXEL_MSBS, 0x00, TVP7002_WRITE },
200         { TVP7002_VBLK_F_0_START_L_OFF, 0x00, TVP7002_WRITE },
201         { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
202         { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
203         { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
204         { TVP7002_ALC_PLACEMENT, 0x18, TVP7002_WRITE },
205         { TVP7002_CLAMP_START, 0x06, TVP7002_WRITE },
206         { TVP7002_CLAMP_W, 0x10, TVP7002_WRITE },
207         { TVP7002_HPLL_PRE_COAST, 0x03, TVP7002_WRITE },
208         { TVP7002_HPLL_POST_COAST, 0x03, TVP7002_WRITE },
209         { TVP7002_EOR, 0xff, TVP7002_RESERVED }
210 };
211
212 /* Register parameters for 1080I60 */
213 static const struct i2c_reg_value tvp7002_parms_1080I60[] = {
214         { TVP7002_HPLL_FDBK_DIV_MSBS, 0x89, TVP7002_WRITE },
215         { TVP7002_HPLL_FDBK_DIV_LSBS, 0x80, TVP7002_WRITE },
216         { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
217         { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
218         { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
219         { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
220         { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
221         { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
222         { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
223         { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
224         { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
225         { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
226         { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
227         { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
228         { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
229         { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
230         { TVP7002_EOR, 0xff, TVP7002_RESERVED }
231 };
232
233 /* Register parameters for 1080P60 */
234 static const struct i2c_reg_value tvp7002_parms_1080P60[] = {
235         { TVP7002_HPLL_FDBK_DIV_MSBS, 0x89, TVP7002_WRITE },
236         { TVP7002_HPLL_FDBK_DIV_LSBS, 0x80, TVP7002_WRITE },
237         { TVP7002_HPLL_CRTL, 0xE0, TVP7002_WRITE },
238         { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
239         { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
240         { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
241         { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
242         { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
243         { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
244         { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
245         { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
246         { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
247         { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
248         { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
249         { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
250         { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
251         { TVP7002_EOR, 0xff, TVP7002_RESERVED }
252 };
253
254 /* Register parameters for 1080I50 */
255 static const struct i2c_reg_value tvp7002_parms_1080I50[] = {
256         { TVP7002_HPLL_FDBK_DIV_MSBS, 0xa5, TVP7002_WRITE },
257         { TVP7002_HPLL_FDBK_DIV_LSBS, 0x00, TVP7002_WRITE },
258         { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
259         { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
260         { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
261         { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
262         { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
263         { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
264         { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
265         { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
266         { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
267         { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
268         { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
269         { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
270         { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
271         { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
272         { TVP7002_EOR, 0xff, TVP7002_RESERVED }
273 };
274
275 /* Register parameters for 720P60 */
276 static const struct i2c_reg_value tvp7002_parms_720P60[] = {
277         { TVP7002_HPLL_FDBK_DIV_MSBS, 0x67, TVP7002_WRITE },
278         { TVP7002_HPLL_FDBK_DIV_LSBS, 0x20, TVP7002_WRITE },
279         { TVP7002_HPLL_CRTL, 0xa0, TVP7002_WRITE },
280         { TVP7002_AVID_START_PIXEL_LSBS, 0x47, TVP7002_WRITE },
281         { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
282         { TVP7002_AVID_STOP_PIXEL_LSBS, 0x4B, TVP7002_WRITE },
283         { TVP7002_AVID_STOP_PIXEL_MSBS, 0x06, TVP7002_WRITE },
284         { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
285         { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
286         { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
287         { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
288         { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
289         { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
290         { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
291         { TVP7002_HPLL_PRE_COAST, 0x00, TVP7002_WRITE },
292         { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
293         { TVP7002_EOR, 0xff, TVP7002_RESERVED }
294 };
295
296 /* Register parameters for 720P50 */
297 static const struct i2c_reg_value tvp7002_parms_720P50[] = {
298         { TVP7002_HPLL_FDBK_DIV_MSBS, 0x7b, TVP7002_WRITE },
299         { TVP7002_HPLL_FDBK_DIV_LSBS, 0xc0, TVP7002_WRITE },
300         { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
301         { TVP7002_AVID_START_PIXEL_LSBS, 0x47, TVP7002_WRITE },
302         { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
303         { TVP7002_AVID_STOP_PIXEL_LSBS, 0x4B, TVP7002_WRITE },
304         { TVP7002_AVID_STOP_PIXEL_MSBS, 0x06, TVP7002_WRITE },
305         { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
306         { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
307         { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
308         { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
309         { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
310         { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
311         { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
312         { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
313         { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
314         { TVP7002_EOR, 0xff, TVP7002_RESERVED }
315 };
316
317 /* Timings definition for handling device operation */
318 struct tvp7002_timings_definition {
319         struct v4l2_dv_timings timings;
320         const struct i2c_reg_value *p_settings;
321         enum v4l2_colorspace color_space;
322         enum v4l2_field scanmode;
323         u16 progressive;
324         u16 lines_per_frame;
325         u16 cpl_min;
326         u16 cpl_max;
327 };
328
329 /* Struct list for digital video timings */
330 static const struct tvp7002_timings_definition tvp7002_timings[] = {
331         {
332                 V4L2_DV_BT_CEA_1280X720P60,
333                 tvp7002_parms_720P60,
334                 V4L2_COLORSPACE_REC709,
335                 V4L2_FIELD_NONE,
336                 1,
337                 0x2EE,
338                 135,
339                 153
340         },
341         {
342                 V4L2_DV_BT_CEA_1920X1080I60,
343                 tvp7002_parms_1080I60,
344                 V4L2_COLORSPACE_REC709,
345                 V4L2_FIELD_INTERLACED,
346                 0,
347                 0x465,
348                 181,
349                 205
350         },
351         {
352                 V4L2_DV_BT_CEA_1920X1080I50,
353                 tvp7002_parms_1080I50,
354                 V4L2_COLORSPACE_REC709,
355                 V4L2_FIELD_INTERLACED,
356                 0,
357                 0x465,
358                 217,
359                 245
360         },
361         {
362                 V4L2_DV_BT_CEA_1280X720P50,
363                 tvp7002_parms_720P50,
364                 V4L2_COLORSPACE_REC709,
365                 V4L2_FIELD_NONE,
366                 1,
367                 0x2EE,
368                 163,
369                 183
370         },
371         {
372                 V4L2_DV_BT_CEA_1920X1080P60,
373                 tvp7002_parms_1080P60,
374                 V4L2_COLORSPACE_REC709,
375                 V4L2_FIELD_NONE,
376                 1,
377                 0x465,
378                 90,
379                 102
380         },
381         {
382                 V4L2_DV_BT_CEA_720X480P59_94,
383                 tvp7002_parms_480P,
384                 V4L2_COLORSPACE_SMPTE170M,
385                 V4L2_FIELD_NONE,
386                 1,
387                 0x20D,
388                 0xffff,
389                 0xffff
390         },
391         {
392                 V4L2_DV_BT_CEA_720X576P50,
393                 tvp7002_parms_576P,
394                 V4L2_COLORSPACE_SMPTE170M,
395                 V4L2_FIELD_NONE,
396                 1,
397                 0x271,
398                 0xffff,
399                 0xffff
400         }
401 };
402
403 #define NUM_TIMINGS ARRAY_SIZE(tvp7002_timings)
404
405 /* Device definition */
406 struct tvp7002 {
407         struct v4l2_subdev sd;
408         struct v4l2_ctrl_handler hdl;
409         const struct tvp7002_config *pdata;
410
411         int ver;
412         int streaming;
413
414         const struct tvp7002_timings_definition *current_timings;
415         struct media_pad pad;
416 };
417
418 /*
419  * to_tvp7002 - Obtain device handler TVP7002
420  * @sd: ptr to v4l2_subdev struct
421  *
422  * Returns device handler tvp7002.
423  */
424 static inline struct tvp7002 *to_tvp7002(struct v4l2_subdev *sd)
425 {
426         return container_of(sd, struct tvp7002, sd);
427 }
428
429 static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
430 {
431         return &container_of(ctrl->handler, struct tvp7002, hdl)->sd;
432 }
433
434 /*
435  * tvp7002_read - Read a value from a register in an TVP7002
436  * @sd: ptr to v4l2_subdev struct
437  * @addr: TVP7002 register address
438  * @dst: pointer to 8-bit destination
439  *
440  * Returns value read if successful, or non-zero (-1) otherwise.
441  */
442 static int tvp7002_read(struct v4l2_subdev *sd, u8 addr, u8 *dst)
443 {
444         struct i2c_client *c = v4l2_get_subdevdata(sd);
445         int retry;
446         int error;
447
448         for (retry = 0; retry < I2C_RETRY_COUNT; retry++) {
449                 error = i2c_smbus_read_byte_data(c, addr);
450
451                 if (error >= 0) {
452                         *dst = (u8)error;
453                         return 0;
454                 }
455
456                 msleep_interruptible(10);
457         }
458         v4l2_err(sd, "TVP7002 read error %d\n", error);
459         return error;
460 }
461
462 /*
463  * tvp7002_read_err() - Read a register value with error code
464  * @sd: pointer to standard V4L2 sub-device structure
465  * @reg: destination register
466  * @val: value to be read
467  * @err: pointer to error value
468  *
469  * Read a value in a register and save error value in pointer.
470  * Also update the register table if successful
471  */
472 static inline void tvp7002_read_err(struct v4l2_subdev *sd, u8 reg,
473                                                         u8 *dst, int *err)
474 {
475         if (!*err)
476                 *err = tvp7002_read(sd, reg, dst);
477 }
478
479 /*
480  * tvp7002_write() - Write a value to a register in TVP7002
481  * @sd: ptr to v4l2_subdev struct
482  * @addr: TVP7002 register address
483  * @value: value to be written to the register
484  *
485  * Write a value to a register in an TVP7002 decoder device.
486  * Returns zero if successful, or non-zero otherwise.
487  */
488 static int tvp7002_write(struct v4l2_subdev *sd, u8 addr, u8 value)
489 {
490         struct i2c_client *c;
491         int retry;
492         int error;
493
494         c = v4l2_get_subdevdata(sd);
495
496         for (retry = 0; retry < I2C_RETRY_COUNT; retry++) {
497                 error = i2c_smbus_write_byte_data(c, addr, value);
498
499                 if (error >= 0)
500                         return 0;
501
502                 v4l2_warn(sd, "Write: retry ... %d\n", retry);
503                 msleep_interruptible(10);
504         }
505         v4l2_err(sd, "TVP7002 write error %d\n", error);
506         return error;
507 }
508
509 /*
510  * tvp7002_write_err() - Write a register value with error code
511  * @sd: pointer to standard V4L2 sub-device structure
512  * @reg: destination register
513  * @val: value to be written
514  * @err: pointer to error value
515  *
516  * Write a value in a register and save error value in pointer.
517  * Also update the register table if successful
518  */
519 static inline void tvp7002_write_err(struct v4l2_subdev *sd, u8 reg,
520                                                         u8 val, int *err)
521 {
522         if (!*err)
523                 *err = tvp7002_write(sd, reg, val);
524 }
525
526 /*
527  * tvp7002_write_inittab() - Write initialization values
528  * @sd: ptr to v4l2_subdev struct
529  * @regs: ptr to i2c_reg_value struct
530  *
531  * Write initialization values.
532  * Returns zero or -EINVAL if read operation fails.
533  */
534 static int tvp7002_write_inittab(struct v4l2_subdev *sd,
535                                         const struct i2c_reg_value *regs)
536 {
537         int error = 0;
538
539         /* Initialize the first (defined) registers */
540         while (TVP7002_EOR != regs->reg) {
541                 if (TVP7002_WRITE == regs->type)
542                         tvp7002_write_err(sd, regs->reg, regs->value, &error);
543                 regs++;
544         }
545
546         return error;
547 }
548
549 static int tvp7002_s_dv_timings(struct v4l2_subdev *sd,
550                                         struct v4l2_dv_timings *dv_timings)
551 {
552         struct tvp7002 *device = to_tvp7002(sd);
553         const struct v4l2_bt_timings *bt = &dv_timings->bt;
554         int i;
555
556         if (dv_timings->type != V4L2_DV_BT_656_1120)
557                 return -EINVAL;
558         for (i = 0; i < NUM_TIMINGS; i++) {
559                 const struct v4l2_bt_timings *t = &tvp7002_timings[i].timings.bt;
560
561                 if (!memcmp(bt, t, &bt->standards - &bt->width)) {
562                         device->current_timings = &tvp7002_timings[i];
563                         return tvp7002_write_inittab(sd, tvp7002_timings[i].p_settings);
564                 }
565         }
566         return -EINVAL;
567 }
568
569 static int tvp7002_g_dv_timings(struct v4l2_subdev *sd,
570                                         struct v4l2_dv_timings *dv_timings)
571 {
572         struct tvp7002 *device = to_tvp7002(sd);
573
574         *dv_timings = device->current_timings->timings;
575         return 0;
576 }
577
578 /*
579  * tvp7002_s_ctrl() - Set a control
580  * @ctrl: ptr to v4l2_ctrl struct
581  *
582  * Set a control in TVP7002 decoder device.
583  * Returns zero when successful or -EINVAL if register access fails.
584  */
585 static int tvp7002_s_ctrl(struct v4l2_ctrl *ctrl)
586 {
587         struct v4l2_subdev *sd = to_sd(ctrl);
588         int error = 0;
589
590         switch (ctrl->id) {
591         case V4L2_CID_GAIN:
592                 tvp7002_write_err(sd, TVP7002_R_FINE_GAIN, ctrl->val, &error);
593                 tvp7002_write_err(sd, TVP7002_G_FINE_GAIN, ctrl->val, &error);
594                 tvp7002_write_err(sd, TVP7002_B_FINE_GAIN, ctrl->val, &error);
595                 return error;
596         }
597         return -EINVAL;
598 }
599
600 /*
601  * tvp7002_query_dv() - query DV timings
602  * @sd: pointer to standard V4L2 sub-device structure
603  * @index: index into the tvp7002_timings array
604  *
605  * Returns the current DV timings detected by TVP7002. If no active input is
606  * detected, returns -EINVAL
607  */
608 static int tvp7002_query_dv(struct v4l2_subdev *sd, int *index)
609 {
610         const struct tvp7002_timings_definition *timings = tvp7002_timings;
611         u8 progressive;
612         u32 lpfr;
613         u32 cpln;
614         int error = 0;
615         u8 lpf_lsb;
616         u8 lpf_msb;
617         u8 cpl_lsb;
618         u8 cpl_msb;
619
620         /* Return invalid index if no active input is detected */
621         *index = NUM_TIMINGS;
622
623         /* Read standards from device registers */
624         tvp7002_read_err(sd, TVP7002_L_FRAME_STAT_LSBS, &lpf_lsb, &error);
625         tvp7002_read_err(sd, TVP7002_L_FRAME_STAT_MSBS, &lpf_msb, &error);
626
627         if (error < 0)
628                 return error;
629
630         tvp7002_read_err(sd, TVP7002_CLK_L_STAT_LSBS, &cpl_lsb, &error);
631         tvp7002_read_err(sd, TVP7002_CLK_L_STAT_MSBS, &cpl_msb, &error);
632
633         if (error < 0)
634                 return error;
635
636         /* Get lines per frame, clocks per line and interlaced/progresive */
637         lpfr = lpf_lsb | ((TVP7002_CL_MASK & lpf_msb) << TVP7002_CL_SHIFT);
638         cpln = cpl_lsb | ((TVP7002_CL_MASK & cpl_msb) << TVP7002_CL_SHIFT);
639         progressive = (lpf_msb & TVP7002_INPR_MASK) >> TVP7002_IP_SHIFT;
640
641         /* Do checking of video modes */
642         for (*index = 0; *index < NUM_TIMINGS; (*index)++, timings++)
643                 if (lpfr == timings->lines_per_frame &&
644                         progressive == timings->progressive) {
645                         if (timings->cpl_min == 0xffff)
646                                 break;
647                         if (cpln >= timings->cpl_min && cpln <= timings->cpl_max)
648                                 break;
649                 }
650
651         if (*index == NUM_TIMINGS) {
652                 v4l2_dbg(1, debug, sd, "detection failed: lpf = %x, cpl = %x\n",
653                                                                 lpfr, cpln);
654                 return -ENOLINK;
655         }
656
657         /* Update lines per frame and clocks per line info */
658         v4l2_dbg(1, debug, sd, "detected timings: %d\n", *index);
659         return 0;
660 }
661
662 static int tvp7002_query_dv_timings(struct v4l2_subdev *sd,
663                                         struct v4l2_dv_timings *timings)
664 {
665         int index;
666         int err = tvp7002_query_dv(sd, &index);
667
668         if (err)
669                 return err;
670         *timings = tvp7002_timings[index].timings;
671         return 0;
672 }
673
674 #ifdef CONFIG_VIDEO_ADV_DEBUG
675 /*
676  * tvp7002_g_register() - Get the value of a register
677  * @sd: ptr to v4l2_subdev struct
678  * @reg: ptr to v4l2_dbg_register struct
679  *
680  * Get the value of a TVP7002 decoder device register.
681  * Returns zero when successful, -EINVAL if register read fails or
682  * access to I2C client fails.
683  */
684 static int tvp7002_g_register(struct v4l2_subdev *sd,
685                                                 struct v4l2_dbg_register *reg)
686 {
687         u8 val;
688         int ret;
689
690         ret = tvp7002_read(sd, reg->reg & 0xff, &val);
691         reg->val = val;
692         reg->size = 1;
693         return ret;
694 }
695
696 /*
697  * tvp7002_s_register() - set a control
698  * @sd: ptr to v4l2_subdev struct
699  * @reg: ptr to v4l2_dbg_register struct
700  *
701  * Get the value of a TVP7002 decoder device register.
702  * Returns zero when successful, -EINVAL if register read fails.
703  */
704 static int tvp7002_s_register(struct v4l2_subdev *sd,
705                                                 const struct v4l2_dbg_register *reg)
706 {
707         return tvp7002_write(sd, reg->reg & 0xff, reg->val & 0xff);
708 }
709 #endif
710
711 /*
712  * tvp7002_s_stream() - V4L2 decoder i/f handler for s_stream
713  * @sd: pointer to standard V4L2 sub-device structure
714  * @enable: streaming enable or disable
715  *
716  * Sets streaming to enable or disable, if possible.
717  */
718 static int tvp7002_s_stream(struct v4l2_subdev *sd, int enable)
719 {
720         struct tvp7002 *device = to_tvp7002(sd);
721         int error;
722
723         if (device->streaming == enable)
724                 return 0;
725
726         /* low impedance: on, high impedance: off */
727         error = tvp7002_write(sd, TVP7002_MISC_CTL_2, enable ? 0x00 : 0x03);
728         if (error) {
729                 v4l2_dbg(1, debug, sd, "Fail to set streaming\n");
730                 return error;
731         }
732
733         device->streaming = enable;
734         return 0;
735 }
736
737 /*
738  * tvp7002_log_status() - Print information about register settings
739  * @sd: ptr to v4l2_subdev struct
740  *
741  * Log register values of a TVP7002 decoder device.
742  * Returns zero or -EINVAL if read operation fails.
743  */
744 static int tvp7002_log_status(struct v4l2_subdev *sd)
745 {
746         struct tvp7002 *device = to_tvp7002(sd);
747         const struct v4l2_bt_timings *bt;
748         int detected;
749
750         /* Find my current timings */
751         tvp7002_query_dv(sd, &detected);
752
753         bt = &device->current_timings->timings.bt;
754         v4l2_info(sd, "Selected DV Timings: %ux%u\n", bt->width, bt->height);
755         if (detected == NUM_TIMINGS) {
756                 v4l2_info(sd, "Detected DV Timings: None\n");
757         } else {
758                 bt = &tvp7002_timings[detected].timings.bt;
759                 v4l2_info(sd, "Detected DV Timings: %ux%u\n",
760                                 bt->width, bt->height);
761         }
762         v4l2_info(sd, "Streaming enabled: %s\n",
763                                         device->streaming ? "yes" : "no");
764
765         /* Print the current value of the gain control */
766         v4l2_ctrl_handler_log_status(&device->hdl, sd->name);
767
768         return 0;
769 }
770
771 static int tvp7002_enum_dv_timings(struct v4l2_subdev *sd,
772                 struct v4l2_enum_dv_timings *timings)
773 {
774         if (timings->pad != 0)
775                 return -EINVAL;
776
777         /* Check requested format index is within range */
778         if (timings->index >= NUM_TIMINGS)
779                 return -EINVAL;
780
781         timings->timings = tvp7002_timings[timings->index].timings;
782         return 0;
783 }
784
785 static const struct v4l2_ctrl_ops tvp7002_ctrl_ops = {
786         .s_ctrl = tvp7002_s_ctrl,
787 };
788
789 /*
790  * tvp7002_enum_mbus_code() - Enum supported digital video format on pad
791  * @sd: pointer to standard V4L2 sub-device structure
792  * @cfg: pad configuration
793  * @code: pointer to subdev enum mbus code struct
794  *
795  * Enumerate supported digital video formats for pad.
796  */
797 static int
798 tvp7002_enum_mbus_code(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
799                        struct v4l2_subdev_mbus_code_enum *code)
800 {
801         /* Check requested format index is within range */
802         if (code->index != 0)
803                 return -EINVAL;
804
805         code->code = MEDIA_BUS_FMT_YUYV10_1X20;
806
807         return 0;
808 }
809
810 /*
811  * tvp7002_get_pad_format() - get video format on pad
812  * @sd: pointer to standard V4L2 sub-device structure
813  * @cfg: pad configuration
814  * @fmt: pointer to subdev format struct
815  *
816  * get video format for pad.
817  */
818 static int
819 tvp7002_get_pad_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
820                        struct v4l2_subdev_format *fmt)
821 {
822         struct tvp7002 *tvp7002 = to_tvp7002(sd);
823
824         fmt->format.code = MEDIA_BUS_FMT_YUYV10_1X20;
825         fmt->format.width = tvp7002->current_timings->timings.bt.width;
826         fmt->format.height = tvp7002->current_timings->timings.bt.height;
827         fmt->format.field = tvp7002->current_timings->scanmode;
828         fmt->format.colorspace = tvp7002->current_timings->color_space;
829
830         return 0;
831 }
832
833 /*
834  * tvp7002_set_pad_format() - set video format on pad
835  * @sd: pointer to standard V4L2 sub-device structure
836  * @cfg: pad configuration
837  * @fmt: pointer to subdev format struct
838  *
839  * set video format for pad.
840  */
841 static int
842 tvp7002_set_pad_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
843                        struct v4l2_subdev_format *fmt)
844 {
845         return tvp7002_get_pad_format(sd, cfg, fmt);
846 }
847
848 /* V4L2 core operation handlers */
849 static const struct v4l2_subdev_core_ops tvp7002_core_ops = {
850         .log_status = tvp7002_log_status,
851 #ifdef CONFIG_VIDEO_ADV_DEBUG
852         .g_register = tvp7002_g_register,
853         .s_register = tvp7002_s_register,
854 #endif
855 };
856
857 /* Specific video subsystem operation handlers */
858 static const struct v4l2_subdev_video_ops tvp7002_video_ops = {
859         .g_dv_timings = tvp7002_g_dv_timings,
860         .s_dv_timings = tvp7002_s_dv_timings,
861         .query_dv_timings = tvp7002_query_dv_timings,
862         .s_stream = tvp7002_s_stream,
863 };
864
865 /* media pad related operation handlers */
866 static const struct v4l2_subdev_pad_ops tvp7002_pad_ops = {
867         .enum_mbus_code = tvp7002_enum_mbus_code,
868         .get_fmt = tvp7002_get_pad_format,
869         .set_fmt = tvp7002_set_pad_format,
870         .enum_dv_timings = tvp7002_enum_dv_timings,
871 };
872
873 /* V4L2 top level operation handlers */
874 static const struct v4l2_subdev_ops tvp7002_ops = {
875         .core = &tvp7002_core_ops,
876         .video = &tvp7002_video_ops,
877         .pad = &tvp7002_pad_ops,
878 };
879
880 static struct tvp7002_config *
881 tvp7002_get_pdata(struct i2c_client *client)
882 {
883         struct v4l2_fwnode_endpoint bus_cfg = { .bus_type = 0 };
884         struct tvp7002_config *pdata = NULL;
885         struct device_node *endpoint;
886         unsigned int flags;
887
888         if (!IS_ENABLED(CONFIG_OF) || !client->dev.of_node)
889                 return client->dev.platform_data;
890
891         endpoint = of_graph_get_next_endpoint(client->dev.of_node, NULL);
892         if (!endpoint)
893                 return NULL;
894
895         if (v4l2_fwnode_endpoint_parse(of_fwnode_handle(endpoint), &bus_cfg))
896                 goto done;
897
898         pdata = devm_kzalloc(&client->dev, sizeof(*pdata), GFP_KERNEL);
899         if (!pdata)
900                 goto done;
901
902         flags = bus_cfg.bus.parallel.flags;
903
904         if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
905                 pdata->hs_polarity = 1;
906
907         if (flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH)
908                 pdata->vs_polarity = 1;
909
910         if (flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
911                 pdata->clk_polarity = 1;
912
913         if (flags & V4L2_MBUS_FIELD_EVEN_HIGH)
914                 pdata->fid_polarity = 1;
915
916         if (flags & V4L2_MBUS_VIDEO_SOG_ACTIVE_HIGH)
917                 pdata->sog_polarity = 1;
918
919 done:
920         of_node_put(endpoint);
921         return pdata;
922 }
923
924 /*
925  * tvp7002_probe - Probe a TVP7002 device
926  * @c: ptr to i2c_client struct
927  * @id: ptr to i2c_device_id struct
928  *
929  * Initialize the TVP7002 device
930  * Returns zero when successful, -EINVAL if register read fails or
931  * -EIO if i2c access is not available.
932  */
933 static int tvp7002_probe(struct i2c_client *c, const struct i2c_device_id *id)
934 {
935         struct tvp7002_config *pdata = tvp7002_get_pdata(c);
936         struct v4l2_subdev *sd;
937         struct tvp7002 *device;
938         struct v4l2_dv_timings timings;
939         int polarity_a;
940         int polarity_b;
941         u8 revision;
942         int error;
943
944         if (pdata == NULL) {
945                 dev_err(&c->dev, "No platform data\n");
946                 return -EINVAL;
947         }
948
949         /* Check if the adapter supports the needed features */
950         if (!i2c_check_functionality(c->adapter,
951                 I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
952                 return -EIO;
953
954         device = devm_kzalloc(&c->dev, sizeof(struct tvp7002), GFP_KERNEL);
955
956         if (!device)
957                 return -ENOMEM;
958
959         sd = &device->sd;
960         device->pdata = pdata;
961         device->current_timings = tvp7002_timings;
962
963         /* Tell v4l2 the device is ready */
964         v4l2_i2c_subdev_init(sd, c, &tvp7002_ops);
965         v4l_info(c, "tvp7002 found @ 0x%02x (%s)\n",
966                                         c->addr, c->adapter->name);
967
968         error = tvp7002_read(sd, TVP7002_CHIP_REV, &revision);
969         if (error < 0)
970                 return error;
971
972         /* Get revision number */
973         v4l2_info(sd, "Rev. %02x detected.\n", revision);
974         if (revision != 0x02)
975                 v4l2_info(sd, "Unknown revision detected.\n");
976
977         /* Initializes TVP7002 to its default values */
978         error = tvp7002_write_inittab(sd, tvp7002_init_default);
979
980         if (error < 0)
981                 return error;
982
983         /* Set polarity information after registers have been set */
984         polarity_a = 0x20 | device->pdata->hs_polarity << 5
985                         | device->pdata->vs_polarity << 2;
986         error = tvp7002_write(sd, TVP7002_SYNC_CTL_1, polarity_a);
987         if (error < 0)
988                 return error;
989
990         polarity_b = 0x01  | device->pdata->fid_polarity << 2
991                         | device->pdata->sog_polarity << 1
992                         | device->pdata->clk_polarity;
993         error = tvp7002_write(sd, TVP7002_MISC_CTL_3, polarity_b);
994         if (error < 0)
995                 return error;
996
997         /* Set registers according to default video mode */
998         timings = device->current_timings->timings;
999         error = tvp7002_s_dv_timings(sd, &timings);
1000
1001 #if defined(CONFIG_MEDIA_CONTROLLER)
1002         device->pad.flags = MEDIA_PAD_FL_SOURCE;
1003         device->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1004         device->sd.entity.function = MEDIA_ENT_F_ATV_DECODER;
1005
1006         error = media_entity_pads_init(&device->sd.entity, 1, &device->pad);
1007         if (error < 0)
1008                 return error;
1009 #endif
1010
1011         v4l2_ctrl_handler_init(&device->hdl, 1);
1012         v4l2_ctrl_new_std(&device->hdl, &tvp7002_ctrl_ops,
1013                         V4L2_CID_GAIN, 0, 255, 1, 0);
1014         sd->ctrl_handler = &device->hdl;
1015         if (device->hdl.error) {
1016                 error = device->hdl.error;
1017                 goto error;
1018         }
1019         v4l2_ctrl_handler_setup(&device->hdl);
1020
1021         error = v4l2_async_register_subdev(&device->sd);
1022         if (error)
1023                 goto error;
1024
1025         return 0;
1026
1027 error:
1028         v4l2_ctrl_handler_free(&device->hdl);
1029 #if defined(CONFIG_MEDIA_CONTROLLER)
1030         media_entity_cleanup(&device->sd.entity);
1031 #endif
1032         return error;
1033 }
1034
1035 /*
1036  * tvp7002_remove - Remove TVP7002 device support
1037  * @c: ptr to i2c_client struct
1038  *
1039  * Reset the TVP7002 device
1040  * Returns zero.
1041  */
1042 static int tvp7002_remove(struct i2c_client *c)
1043 {
1044         struct v4l2_subdev *sd = i2c_get_clientdata(c);
1045         struct tvp7002 *device = to_tvp7002(sd);
1046
1047         v4l2_dbg(1, debug, sd, "Removing tvp7002 adapter"
1048                                 "on address 0x%x\n", c->addr);
1049         v4l2_async_unregister_subdev(&device->sd);
1050 #if defined(CONFIG_MEDIA_CONTROLLER)
1051         media_entity_cleanup(&device->sd.entity);
1052 #endif
1053         v4l2_ctrl_handler_free(&device->hdl);
1054         return 0;
1055 }
1056
1057 /* I2C Device ID table */
1058 static const struct i2c_device_id tvp7002_id[] = {
1059         { "tvp7002", 0 },
1060         { }
1061 };
1062 MODULE_DEVICE_TABLE(i2c, tvp7002_id);
1063
1064 #if IS_ENABLED(CONFIG_OF)
1065 static const struct of_device_id tvp7002_of_match[] = {
1066         { .compatible = "ti,tvp7002", },
1067         { /* sentinel */ },
1068 };
1069 MODULE_DEVICE_TABLE(of, tvp7002_of_match);
1070 #endif
1071
1072 /* I2C driver data */
1073 static struct i2c_driver tvp7002_driver = {
1074         .driver = {
1075                 .of_match_table = of_match_ptr(tvp7002_of_match),
1076                 .name = TVP7002_MODULE_NAME,
1077         },
1078         .probe = tvp7002_probe,
1079         .remove = tvp7002_remove,
1080         .id_table = tvp7002_id,
1081 };
1082
1083 module_i2c_driver(tvp7002_driver);