drivers/media/dvb-frontends/m88ds3103.c

   1 /*
   2  * Montage Technology M88DS3103/M88RS6000 demodulator driver
   3  *
   4  * Copyright (C) 2013 Antti Palosaari <crope@iki.fi>
   5  *
   6  *    This program is free software; you can redistribute it and/or modify
   7  *    it under the terms of the GNU General Public License as published by
   8  *    the Free Software Foundation; either version 2 of the License, or
   9  *    (at your option) any later version.
  10  *
  11  *    This program is distributed in the hope that it will be useful,
  12  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *    GNU General Public License for more details.
  15  */
  16
  17 #include "m88ds3103_priv.h"
  18
  19 static const struct dvb_frontend_ops m88ds3103_ops;
  20
  21 /* write single register with mask */
  22 static int m88ds3103_update_bits(struct m88ds3103_dev *dev,
  23                                 u8 reg, u8 mask, u8 val)
  24 {
  25         int ret;
  26         u8 tmp;
  27
  28         /* no need for read if whole reg is written */
  29         if (mask != 0xff) {
  30                 ret = regmap_bulk_read(dev->regmap, reg, &tmp, 1);
  31                 if (ret)
  32                         return ret;
  33
  34                 val &= mask;
  35                 tmp &= ~mask;
  36                 val |= tmp;
  37         }
  38
  39         return regmap_bulk_write(dev->regmap, reg, &val, 1);
  40 }
  41
  42 /* write reg val table using reg addr auto increment */
  43 static int m88ds3103_wr_reg_val_tab(struct m88ds3103_dev *dev,
  44                 const struct m88ds3103_reg_val *tab, int tab_len)
  45 {
  46         struct i2c_client *client = dev->client;
  47         int ret, i, j;
  48         u8 buf[83];
  49
  50         dev_dbg(&client->dev, "tab_len=%d\n", tab_len);
  51
  52         if (tab_len > 86) {
  53                 ret = -EINVAL;
  54                 goto err;
  55         }
  56
  57         for (i = 0, j = 0; i < tab_len; i++, j++) {
  58                 buf[j] = tab[i].val;
  59
  60                 if (i == tab_len - 1 || tab[i].reg != tab[i + 1].reg - 1 ||
  61                                 !((j + 1) % (dev->cfg->i2c_wr_max - 1))) {
  62                         ret = regmap_bulk_write(dev->regmap, tab[i].reg - j, buf, j + 1);
  63                         if (ret)
  64                                 goto err;
  65
  66                         j = -1;
  67                 }
  68         }
  69
  70         return 0;
  71 err:
  72         dev_dbg(&client->dev, "failed=%d\n", ret);
  73         return ret;
  74 }
  75
  76 /*
  77  * Get the demodulator AGC PWM voltage setting supplied to the tuner.
  78  */
  79 int m88ds3103_get_agc_pwm(struct dvb_frontend *fe, u8 *_agc_pwm)
  80 {
  81         struct m88ds3103_dev *dev = fe->demodulator_priv;
  82         unsigned tmp;
  83         int ret;
  84
  85         ret = regmap_read(dev->regmap, 0x3f, &tmp);
  86         if (ret == 0)
  87                 *_agc_pwm = tmp;
  88         return ret;
  89 }
  90 EXPORT_SYMBOL(m88ds3103_get_agc_pwm);
  91
  92 static int m88ds3103_read_status(struct dvb_frontend *fe,
  93                                  enum fe_status *status)
  94 {
  95         struct m88ds3103_dev *dev = fe->demodulator_priv;
  96         struct i2c_client *client = dev->client;
  97         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  98         int ret, i, itmp;
  99         unsigned int utmp;
 100         u8 buf[3];
 101
 102         *status = 0;
 103
 104         if (!dev->warm) {
 105                 ret = -EAGAIN;
 106                 goto err;
 107         }
 108
 109         switch (c->delivery_system) {
 110         case SYS_DVBS:
 111                 ret = regmap_read(dev->regmap, 0xd1, &utmp);
 112                 if (ret)
 113                         goto err;
 114
 115                 if ((utmp & 0x07) == 0x07)
 116                         *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
 117                                         FE_HAS_VITERBI | FE_HAS_SYNC |
 118                                         FE_HAS_LOCK;
 119                 break;
 120         case SYS_DVBS2:
 121                 ret = regmap_read(dev->regmap, 0x0d, &utmp);
 122                 if (ret)
 123                         goto err;
 124
 125                 if ((utmp & 0x8f) == 0x8f)
 126                         *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
 127                                         FE_HAS_VITERBI | FE_HAS_SYNC |
 128                                         FE_HAS_LOCK;
 129                 break;
 130         default:
 131                 dev_dbg(&client->dev, "invalid delivery_system\n");
 132                 ret = -EINVAL;
 133                 goto err;
 134         }
 135
 136         dev->fe_status = *status;
 137         dev_dbg(&client->dev, "lock=%02x status=%02x\n", utmp, *status);
 138
 139         /* CNR */
 140         if (dev->fe_status & FE_HAS_VITERBI) {
 141                 unsigned int cnr, noise, signal, noise_tot, signal_tot;
 142
 143                 cnr = 0;
 144                 /* more iterations for more accurate estimation */
 145                 #define M88DS3103_SNR_ITERATIONS 3
 146
 147                 switch (c->delivery_system) {
 148                 case SYS_DVBS:
 149                         itmp = 0;
 150
 151                         for (i = 0; i < M88DS3103_SNR_ITERATIONS; i++) {
 152                                 ret = regmap_read(dev->regmap, 0xff, &utmp);
 153                                 if (ret)
 154                                         goto err;
 155
 156                                 itmp += utmp;
 157                         }
 158
 159                         /* use of single register limits max value to 15 dB */
 160                         /* SNR(X) dB = 10 * ln(X) / ln(10) dB */
 161                         itmp = DIV_ROUND_CLOSEST(itmp, 8 * M88DS3103_SNR_ITERATIONS);
 162                         if (itmp)
 163                                 cnr = div_u64((u64) 10000 * intlog2(itmp), intlog2(10));
 164                         break;
 165                 case SYS_DVBS2:
 166                         noise_tot = 0;
 167                         signal_tot = 0;
 168
 169                         for (i = 0; i < M88DS3103_SNR_ITERATIONS; i++) {
 170                                 ret = regmap_bulk_read(dev->regmap, 0x8c, buf, 3);
 171                                 if (ret)
 172                                         goto err;
 173
 174                                 noise = buf[1] << 6;    /* [13:6] */
 175                                 noise |= buf[0] & 0x3f; /*  [5:0] */
 176                                 noise >>= 2;
 177                                 signal = buf[2] * buf[2];
 178                                 signal >>= 1;
 179
 180                                 noise_tot += noise;
 181                                 signal_tot += signal;
 182                         }
 183
 184                         noise = noise_tot / M88DS3103_SNR_ITERATIONS;
 185                         signal = signal_tot / M88DS3103_SNR_ITERATIONS;
 186
 187                         /* SNR(X) dB = 10 * log10(X) dB */
 188                         if (signal > noise) {
 189                                 itmp = signal / noise;
 190                                 cnr = div_u64((u64) 10000 * intlog10(itmp), (1 << 24));
 191                         }
 192                         break;
 193                 default:
 194                         dev_dbg(&client->dev, "invalid delivery_system\n");
 195                         ret = -EINVAL;
 196                         goto err;
 197                 }
 198
 199                 if (cnr) {
 200                         c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
 201                         c->cnr.stat[0].svalue = cnr;
 202                 } else {
 203                         c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 204                 }
 205         } else {
 206                 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 207         }
 208
 209         /* BER */
 210         if (dev->fe_status & FE_HAS_LOCK) {
 211                 unsigned int utmp, post_bit_error, post_bit_count;
 212
 213                 switch (c->delivery_system) {
 214                 case SYS_DVBS:
 215                         ret = regmap_write(dev->regmap, 0xf9, 0x04);
 216                         if (ret)
 217                                 goto err;
 218
 219                         ret = regmap_read(dev->regmap, 0xf8, &utmp);
 220                         if (ret)
 221                                 goto err;
 222
 223                         /* measurement ready? */
 224                         if (!(utmp & 0x10)) {
 225                                 ret = regmap_bulk_read(dev->regmap, 0xf6, buf, 2);
 226                                 if (ret)
 227                                         goto err;
 228
 229                                 post_bit_error = buf[1] << 8 | buf[0] << 0;
 230                                 post_bit_count = 0x800000;
 231                                 dev->post_bit_error += post_bit_error;
 232                                 dev->post_bit_count += post_bit_count;
 233                                 dev->dvbv3_ber = post_bit_error;
 234
 235                                 /* restart measurement */
 236                                 utmp |= 0x10;
 237                                 ret = regmap_write(dev->regmap, 0xf8, utmp);
 238                                 if (ret)
 239                                         goto err;
 240                         }
 241                         break;
 242                 case SYS_DVBS2:
 243                         ret = regmap_bulk_read(dev->regmap, 0xd5, buf, 3);
 244                         if (ret)
 245                                 goto err;
 246
 247                         utmp = buf[2] << 16 | buf[1] << 8 | buf[0] << 0;
 248
 249                         /* enough data? */
 250                         if (utmp > 4000) {
 251                                 ret = regmap_bulk_read(dev->regmap, 0xf7, buf, 2);
 252                                 if (ret)
 253                                         goto err;
 254
 255                                 post_bit_error = buf[1] << 8 | buf[0] << 0;
 256                                 post_bit_count = 32 * utmp; /* TODO: FEC */
 257                                 dev->post_bit_error += post_bit_error;
 258                                 dev->post_bit_count += post_bit_count;
 259                                 dev->dvbv3_ber = post_bit_error;
 260
 261                                 /* restart measurement */
 262                                 ret = regmap_write(dev->regmap, 0xd1, 0x01);
 263                                 if (ret)
 264                                         goto err;
 265
 266                                 ret = regmap_write(dev->regmap, 0xf9, 0x01);
 267                                 if (ret)
 268                                         goto err;
 269
 270                                 ret = regmap_write(dev->regmap, 0xf9, 0x00);
 271                                 if (ret)
 272                                         goto err;
 273
 274                                 ret = regmap_write(dev->regmap, 0xd1, 0x00);
 275                                 if (ret)
 276                                         goto err;
 277                         }
 278                         break;
 279                 default:
 280                         dev_dbg(&client->dev, "invalid delivery_system\n");
 281                         ret = -EINVAL;
 282                         goto err;
 283                 }
 284
 285                 c->post_bit_error.stat[0].scale = FE_SCALE_COUNTER;
 286                 c->post_bit_error.stat[0].uvalue = dev->post_bit_error;
 287                 c->post_bit_count.stat[0].scale = FE_SCALE_COUNTER;
 288                 c->post_bit_count.stat[0].uvalue = dev->post_bit_count;
 289         } else {
 290                 c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 291                 c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 292         }
 293
 294         return 0;
 295 err:
 296         dev_dbg(&client->dev, "failed=%d\n", ret);
 297         return ret;
 298 }
 299
 300 static int m88ds3103_set_frontend(struct dvb_frontend *fe)
 301 {
 302         struct m88ds3103_dev *dev = fe->demodulator_priv;
 303         struct i2c_client *client = dev->client;
 304         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 305         int ret, len;
 306         const struct m88ds3103_reg_val *init;
 307         u8 u8tmp, u8tmp1 = 0, u8tmp2 = 0; /* silence compiler warning */
 308         u8 buf[3];
 309         u16 u16tmp;
 310         u32 tuner_frequency_khz, target_mclk;
 311         s32 s32tmp;
 312         static const struct reg_sequence reset_buf[] = {
 313                 {0x07, 0x80}, {0x07, 0x00}
 314         };
 315
 316         dev_dbg(&client->dev,
 317                 "delivery_system=%d modulation=%d frequency=%u symbol_rate=%d inversion=%d pilot=%d rolloff=%d\n",
 318                 c->delivery_system, c->modulation, c->frequency, c->symbol_rate,
 319                 c->inversion, c->pilot, c->rolloff);
 320
 321         if (!dev->warm) {
 322                 ret = -EAGAIN;
 323                 goto err;
 324         }
 325
 326         /* reset */
 327         ret = regmap_multi_reg_write(dev->regmap, reset_buf, 2);
 328         if (ret)
 329                 goto err;
 330
 331         /* Disable demod clock path */
 332         if (dev->chip_id == M88RS6000_CHIP_ID) {
 333                 ret = regmap_write(dev->regmap, 0x06, 0xe0);
 334                 if (ret)
 335                         goto err;
 336         }
 337
 338         /* program tuner */
 339         if (fe->ops.tuner_ops.set_params) {
 340                 ret = fe->ops.tuner_ops.set_params(fe);
 341                 if (ret)
 342                         goto err;
 343         }
 344
 345         if (fe->ops.tuner_ops.get_frequency) {
 346                 ret = fe->ops.tuner_ops.get_frequency(fe, &tuner_frequency_khz);
 347                 if (ret)
 348                         goto err;
 349         } else {
 350                 /*
 351                  * Use nominal target frequency as tuner driver does not provide
 352                  * actual frequency used. Carrier offset calculation is not
 353                  * valid.
 354                  */
 355                 tuner_frequency_khz = c->frequency;
 356         }
 357
 358         /* select M88RS6000 demod main mclk and ts mclk from tuner die. */
 359         if (dev->chip_id == M88RS6000_CHIP_ID) {
 360                 if (c->symbol_rate > 45010000)
 361                         dev->mclk = 110250000;
 362                 else
 363                         dev->mclk = 96000000;
 364
 365                 if (c->delivery_system == SYS_DVBS)
 366                         target_mclk = 96000000;
 367                 else
 368                         target_mclk = 144000000;
 369
 370                 /* Enable demod clock path */
 371                 ret = regmap_write(dev->regmap, 0x06, 0x00);
 372                 if (ret)
 373                         goto err;
 374                 usleep_range(10000, 20000);
 375         } else {
 376         /* set M88DS3103 mclk and ts mclk. */
 377                 dev->mclk = 96000000;
 378
 379                 switch (dev->cfg->ts_mode) {
 380                 case M88DS3103_TS_SERIAL:
 381                 case M88DS3103_TS_SERIAL_D7:
 382                         target_mclk = dev->cfg->ts_clk;
 383                         break;
 384                 case M88DS3103_TS_PARALLEL:
 385                 case M88DS3103_TS_CI:
 386                         if (c->delivery_system == SYS_DVBS)
 387                                 target_mclk = 96000000;
 388                         else {
 389                                 if (c->symbol_rate < 18000000)
 390                                         target_mclk = 96000000;
 391                                 else if (c->symbol_rate < 28000000)
 392                                         target_mclk = 144000000;
 393                                 else
 394                                         target_mclk = 192000000;
 395                         }
 396                         break;
 397                 default:
 398                         dev_dbg(&client->dev, "invalid ts_mode\n");
 399                         ret = -EINVAL;
 400                         goto err;
 401                 }
 402
 403                 switch (target_mclk) {
 404                 case 96000000:
 405                         u8tmp1 = 0x02; /* 0b10 */
 406                         u8tmp2 = 0x01; /* 0b01 */
 407                         break;
 408                 case 144000000:
 409                         u8tmp1 = 0x00; /* 0b00 */
 410                         u8tmp2 = 0x01; /* 0b01 */
 411                         break;
 412                 case 192000000:
 413                         u8tmp1 = 0x03; /* 0b11 */
 414                         u8tmp2 = 0x00; /* 0b00 */
 415                         break;
 416                 }
 417                 ret = m88ds3103_update_bits(dev, 0x22, 0xc0, u8tmp1 << 6);
 418                 if (ret)
 419                         goto err;
 420                 ret = m88ds3103_update_bits(dev, 0x24, 0xc0, u8tmp2 << 6);
 421                 if (ret)
 422                         goto err;
 423         }
 424
 425         ret = regmap_write(dev->regmap, 0xb2, 0x01);
 426         if (ret)
 427                 goto err;
 428
 429         ret = regmap_write(dev->regmap, 0x00, 0x01);
 430         if (ret)
 431                 goto err;
 432
 433         switch (c->delivery_system) {
 434         case SYS_DVBS:
 435                 if (dev->chip_id == M88RS6000_CHIP_ID) {
 436                         len = ARRAY_SIZE(m88rs6000_dvbs_init_reg_vals);
 437                         init = m88rs6000_dvbs_init_reg_vals;
 438                 } else {
 439                         len = ARRAY_SIZE(m88ds3103_dvbs_init_reg_vals);
 440                         init = m88ds3103_dvbs_init_reg_vals;
 441                 }
 442                 break;
 443         case SYS_DVBS2:
 444                 if (dev->chip_id == M88RS6000_CHIP_ID) {
 445                         len = ARRAY_SIZE(m88rs6000_dvbs2_init_reg_vals);
 446                         init = m88rs6000_dvbs2_init_reg_vals;
 447                 } else {
 448                         len = ARRAY_SIZE(m88ds3103_dvbs2_init_reg_vals);
 449                         init = m88ds3103_dvbs2_init_reg_vals;
 450                 }
 451                 break;
 452         default:
 453                 dev_dbg(&client->dev, "invalid delivery_system\n");
 454                 ret = -EINVAL;
 455                 goto err;
 456         }
 457
 458         /* program init table */
 459         if (c->delivery_system != dev->delivery_system) {
 460                 ret = m88ds3103_wr_reg_val_tab(dev, init, len);
 461                 if (ret)
 462                         goto err;
 463         }
 464
 465         if (dev->chip_id == M88RS6000_CHIP_ID) {
 466                 if (c->delivery_system == SYS_DVBS2 &&
 467                     c->symbol_rate <= 5000000) {
 468                         ret = regmap_write(dev->regmap, 0xc0, 0x04);
 469                         if (ret)
 470                                 goto err;
 471                         buf[0] = 0x09;
 472                         buf[1] = 0x22;
 473                         buf[2] = 0x88;
 474                         ret = regmap_bulk_write(dev->regmap, 0x8a, buf, 3);
 475                         if (ret)
 476                                 goto err;
 477                 }
 478                 ret = m88ds3103_update_bits(dev, 0x9d, 0x08, 0x08);
 479                 if (ret)
 480                         goto err;
 481                 ret = regmap_write(dev->regmap, 0xf1, 0x01);
 482                 if (ret)
 483                         goto err;
 484                 ret = m88ds3103_update_bits(dev, 0x30, 0x80, 0x80);
 485                 if (ret)
 486                         goto err;
 487         }
 488
 489         switch (dev->cfg->ts_mode) {
 490         case M88DS3103_TS_SERIAL:
 491                 u8tmp1 = 0x00;
 492                 u8tmp = 0x06;
 493                 break;
 494         case M88DS3103_TS_SERIAL_D7:
 495                 u8tmp1 = 0x20;
 496                 u8tmp = 0x06;
 497                 break;
 498         case M88DS3103_TS_PARALLEL:
 499                 u8tmp = 0x02;
 500                 break;
 501         case M88DS3103_TS_CI:
 502                 u8tmp = 0x03;
 503                 break;
 504         default:
 505                 dev_dbg(&client->dev, "invalid ts_mode\n");
 506                 ret = -EINVAL;
 507                 goto err;
 508         }
 509
 510         if (dev->cfg->ts_clk_pol)
 511                 u8tmp |= 0x40;
 512
 513         /* TS mode */
 514         ret = regmap_write(dev->regmap, 0xfd, u8tmp);
 515         if (ret)
 516                 goto err;
 517
 518         switch (dev->cfg->ts_mode) {
 519         case M88DS3103_TS_SERIAL:
 520         case M88DS3103_TS_SERIAL_D7:
 521                 ret = m88ds3103_update_bits(dev, 0x29, 0x20, u8tmp1);
 522                 if (ret)
 523                         goto err;
 524                 u16tmp = 0;
 525                 u8tmp1 = 0x3f;
 526                 u8tmp2 = 0x3f;
 527                 break;
 528         default:
 529                 u16tmp = DIV_ROUND_UP(target_mclk, dev->cfg->ts_clk);
 530                 u8tmp1 = u16tmp / 2 - 1;
 531                 u8tmp2 = DIV_ROUND_UP(u16tmp, 2) - 1;
 532         }
 533
 534         dev_dbg(&client->dev, "target_mclk=%u ts_clk=%u ts_clk_divide_ratio=%u\n",
 535                 target_mclk, dev->cfg->ts_clk, u16tmp);
 536
 537         /* u8tmp1[5:2] => fe[3:0], u8tmp1[1:0] => ea[7:6] */
 538         /* u8tmp2[5:0] => ea[5:0] */
 539         u8tmp = (u8tmp1 >> 2) & 0x0f;
 540         ret = regmap_update_bits(dev->regmap, 0xfe, 0x0f, u8tmp);
 541         if (ret)
 542                 goto err;
 543         u8tmp = ((u8tmp1 & 0x03) << 6) | u8tmp2 >> 0;
 544         ret = regmap_write(dev->regmap, 0xea, u8tmp);
 545         if (ret)
 546                 goto err;
 547
 548         if (c->symbol_rate <= 3000000)
 549                 u8tmp = 0x20;
 550         else if (c->symbol_rate <= 10000000)
 551                 u8tmp = 0x10;
 552         else
 553                 u8tmp = 0x06;
 554
 555         ret = regmap_write(dev->regmap, 0xc3, 0x08);
 556         if (ret)
 557                 goto err;
 558
 559         ret = regmap_write(dev->regmap, 0xc8, u8tmp);
 560         if (ret)
 561                 goto err;
 562
 563         ret = regmap_write(dev->regmap, 0xc4, 0x08);
 564         if (ret)
 565                 goto err;
 566
 567         ret = regmap_write(dev->regmap, 0xc7, 0x00);
 568         if (ret)
 569                 goto err;
 570
 571         u16tmp = DIV_ROUND_CLOSEST_ULL((u64)c->symbol_rate * 0x10000, dev->mclk);
 572         buf[0] = (u16tmp >> 0) & 0xff;
 573         buf[1] = (u16tmp >> 8) & 0xff;
 574         ret = regmap_bulk_write(dev->regmap, 0x61, buf, 2);
 575         if (ret)
 576                 goto err;
 577
 578         ret = m88ds3103_update_bits(dev, 0x4d, 0x02, dev->cfg->spec_inv << 1);
 579         if (ret)
 580                 goto err;
 581
 582         ret = m88ds3103_update_bits(dev, 0x30, 0x10, dev->cfg->agc_inv << 4);
 583         if (ret)
 584                 goto err;
 585
 586         ret = regmap_write(dev->regmap, 0x33, dev->cfg->agc);
 587         if (ret)
 588                 goto err;
 589
 590         dev_dbg(&client->dev, "carrier offset=%d\n",
 591                 (tuner_frequency_khz - c->frequency));
 592
 593         /* Use 32-bit calc as there is no s64 version of DIV_ROUND_CLOSEST() */
 594         s32tmp = 0x10000 * (tuner_frequency_khz - c->frequency);
 595         s32tmp = DIV_ROUND_CLOSEST(s32tmp, dev->mclk / 1000);
 596         buf[0] = (s32tmp >> 0) & 0xff;
 597         buf[1] = (s32tmp >> 8) & 0xff;
 598         ret = regmap_bulk_write(dev->regmap, 0x5e, buf, 2);
 599         if (ret)
 600                 goto err;
 601
 602         ret = regmap_write(dev->regmap, 0x00, 0x00);
 603         if (ret)
 604                 goto err;
 605
 606         ret = regmap_write(dev->regmap, 0xb2, 0x00);
 607         if (ret)
 608                 goto err;
 609
 610         dev->delivery_system = c->delivery_system;
 611
 612         return 0;
 613 err:
 614         dev_dbg(&client->dev, "failed=%d\n", ret);
 615         return ret;
 616 }
 617
 618 static int m88ds3103_init(struct dvb_frontend *fe)
 619 {
 620         struct m88ds3103_dev *dev = fe->demodulator_priv;
 621         struct i2c_client *client = dev->client;
 622         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 623         int ret, len, rem;
 624         unsigned int utmp;
 625         const struct firmware *firmware;
 626         const char *name;
 627
 628         dev_dbg(&client->dev, "\n");
 629
 630         /* set cold state by default */
 631         dev->warm = false;
 632
 633         /* wake up device from sleep */
 634         ret = m88ds3103_update_bits(dev, 0x08, 0x01, 0x01);
 635         if (ret)
 636                 goto err;
 637         ret = m88ds3103_update_bits(dev, 0x04, 0x01, 0x00);
 638         if (ret)
 639                 goto err;
 640         ret = m88ds3103_update_bits(dev, 0x23, 0x10, 0x00);
 641         if (ret)
 642                 goto err;
 643
 644         /* firmware status */
 645         ret = regmap_read(dev->regmap, 0xb9, &utmp);
 646         if (ret)
 647                 goto err;
 648
 649         dev_dbg(&client->dev, "firmware=%02x\n", utmp);
 650
 651         if (utmp)
 652                 goto warm;
 653
 654         /* global reset, global diseqc reset, golbal fec reset */
 655         ret = regmap_write(dev->regmap, 0x07, 0xe0);
 656         if (ret)
 657                 goto err;
 658         ret = regmap_write(dev->regmap, 0x07, 0x00);
 659         if (ret)
 660                 goto err;
 661
 662         /* cold state - try to download firmware */
 663         dev_info(&client->dev, "found a '%s' in cold state\n",
 664                  m88ds3103_ops.info.name);
 665
 666         if (dev->chip_id == M88RS6000_CHIP_ID)
 667                 name = M88RS6000_FIRMWARE;
 668         else
 669                 name = M88DS3103_FIRMWARE;
 670         /* request the firmware, this will block and timeout */
 671         ret = request_firmware(&firmware, name, &client->dev);
 672         if (ret) {
 673                 dev_err(&client->dev, "firmware file '%s' not found\n", name);
 674                 goto err;
 675         }
 676
 677         dev_info(&client->dev, "downloading firmware from file '%s'\n", name);
 678
 679         ret = regmap_write(dev->regmap, 0xb2, 0x01);
 680         if (ret)
 681                 goto err_release_firmware;
 682
 683         for (rem = firmware->size; rem > 0; rem -= (dev->cfg->i2c_wr_max - 1)) {
 684                 len = min(dev->cfg->i2c_wr_max - 1, rem);
 685                 ret = regmap_bulk_write(dev->regmap, 0xb0,
 686                                         &firmware->data[firmware->size - rem],
 687                                         len);
 688                 if (ret) {
 689                         dev_err(&client->dev, "firmware download failed %d\n",
 690                                 ret);
 691                         goto err_release_firmware;
 692                 }
 693         }
 694
 695         ret = regmap_write(dev->regmap, 0xb2, 0x00);
 696         if (ret)
 697                 goto err_release_firmware;
 698
 699         release_firmware(firmware);
 700
 701         ret = regmap_read(dev->regmap, 0xb9, &utmp);
 702         if (ret)
 703                 goto err;
 704
 705         if (!utmp) {
 706                 ret = -EINVAL;
 707                 dev_info(&client->dev, "firmware did not run\n");
 708                 goto err;
 709         }
 710
 711         dev_info(&client->dev, "found a '%s' in warm state\n",
 712                  m88ds3103_ops.info.name);
 713         dev_info(&client->dev, "firmware version: %X.%X\n",
 714                  (utmp >> 4) & 0xf, (utmp >> 0 & 0xf));
 715
 716 warm:
 717         /* warm state */
 718         dev->warm = true;
 719
 720         /* init stats here in order signal app which stats are supported */
 721         c->cnr.len = 1;
 722         c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 723         c->post_bit_error.len = 1;
 724         c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 725         c->post_bit_count.len = 1;
 726         c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 727
 728         return 0;
 729 err_release_firmware:
 730         release_firmware(firmware);
 731 err:
 732         dev_dbg(&client->dev, "failed=%d\n", ret);
 733         return ret;
 734 }
 735
 736 static int m88ds3103_sleep(struct dvb_frontend *fe)
 737 {
 738         struct m88ds3103_dev *dev = fe->demodulator_priv;
 739         struct i2c_client *client = dev->client;
 740         int ret;
 741         unsigned int utmp;
 742
 743         dev_dbg(&client->dev, "\n");
 744
 745         dev->fe_status = 0;
 746         dev->delivery_system = SYS_UNDEFINED;
 747
 748         /* TS Hi-Z */
 749         if (dev->chip_id == M88RS6000_CHIP_ID)
 750                 utmp = 0x29;
 751         else
 752                 utmp = 0x27;
 753         ret = m88ds3103_update_bits(dev, utmp, 0x01, 0x00);
 754         if (ret)
 755                 goto err;
 756
 757         /* sleep */
 758         ret = m88ds3103_update_bits(dev, 0x08, 0x01, 0x00);
 759         if (ret)
 760                 goto err;
 761         ret = m88ds3103_update_bits(dev, 0x04, 0x01, 0x01);
 762         if (ret)
 763                 goto err;
 764         ret = m88ds3103_update_bits(dev, 0x23, 0x10, 0x10);
 765         if (ret)
 766                 goto err;
 767
 768         return 0;
 769 err:
 770         dev_dbg(&client->dev, "failed=%d\n", ret);
 771         return ret;
 772 }
 773
 774 static int m88ds3103_get_frontend(struct dvb_frontend *fe,
 775                                   struct dtv_frontend_properties *c)
 776 {
 777         struct m88ds3103_dev *dev = fe->demodulator_priv;
 778         struct i2c_client *client = dev->client;
 779         int ret;
 780         u8 buf[3];
 781
 782         dev_dbg(&client->dev, "\n");
 783
 784         if (!dev->warm || !(dev->fe_status & FE_HAS_LOCK)) {
 785                 ret = 0;
 786                 goto err;
 787         }
 788
 789         switch (c->delivery_system) {
 790         case SYS_DVBS:
 791                 ret = regmap_bulk_read(dev->regmap, 0xe0, &buf[0], 1);
 792                 if (ret)
 793                         goto err;
 794
 795                 ret = regmap_bulk_read(dev->regmap, 0xe6, &buf[1], 1);
 796                 if (ret)
 797                         goto err;
 798
 799                 switch ((buf[0] >> 2) & 0x01) {
 800                 case 0:
 801                         c->inversion = INVERSION_OFF;
 802                         break;
 803                 case 1:
 804                         c->inversion = INVERSION_ON;
 805                         break;
 806                 }
 807
 808                 switch ((buf[1] >> 5) & 0x07) {
 809                 case 0:
 810                         c->fec_inner = FEC_7_8;
 811                         break;
 812                 case 1:
 813                         c->fec_inner = FEC_5_6;
 814                         break;
 815                 case 2:
 816                         c->fec_inner = FEC_3_4;
 817                         break;
 818                 case 3:
 819                         c->fec_inner = FEC_2_3;
 820                         break;
 821                 case 4:
 822                         c->fec_inner = FEC_1_2;
 823                         break;
 824                 default:
 825                         dev_dbg(&client->dev, "invalid fec_inner\n");
 826                 }
 827
 828                 c->modulation = QPSK;
 829
 830                 break;
 831         case SYS_DVBS2:
 832                 ret = regmap_bulk_read(dev->regmap, 0x7e, &buf[0], 1);
 833                 if (ret)
 834                         goto err;
 835
 836                 ret = regmap_bulk_read(dev->regmap, 0x89, &buf[1], 1);
 837                 if (ret)
 838                         goto err;
 839
 840                 ret = regmap_bulk_read(dev->regmap, 0xf2, &buf[2], 1);
 841                 if (ret)
 842                         goto err;
 843
 844                 switch ((buf[0] >> 0) & 0x0f) {
 845                 case 2:
 846                         c->fec_inner = FEC_2_5;
 847                         break;
 848                 case 3:
 849                         c->fec_inner = FEC_1_2;
 850                         break;
 851                 case 4:
 852                         c->fec_inner = FEC_3_5;
 853                         break;
 854                 case 5:
 855                         c->fec_inner = FEC_2_3;
 856                         break;
 857                 case 6:
 858                         c->fec_inner = FEC_3_4;
 859                         break;
 860                 case 7:
 861                         c->fec_inner = FEC_4_5;
 862                         break;
 863                 case 8:
 864                         c->fec_inner = FEC_5_6;
 865                         break;
 866                 case 9:
 867                         c->fec_inner = FEC_8_9;
 868                         break;
 869                 case 10:
 870                         c->fec_inner = FEC_9_10;
 871                         break;
 872                 default:
 873                         dev_dbg(&client->dev, "invalid fec_inner\n");
 874                 }
 875
 876                 switch ((buf[0] >> 5) & 0x01) {
 877                 case 0:
 878                         c->pilot = PILOT_OFF;
 879                         break;
 880                 case 1:
 881                         c->pilot = PILOT_ON;
 882                         break;
 883                 }
 884
 885                 switch ((buf[0] >> 6) & 0x07) {
 886                 case 0:
 887                         c->modulation = QPSK;
 888                         break;
 889                 case 1:
 890                         c->modulation = PSK_8;
 891                         break;
 892                 case 2:
 893                         c->modulation = APSK_16;
 894                         break;
 895                 case 3:
 896                         c->modulation = APSK_32;
 897                         break;
 898                 default:
 899                         dev_dbg(&client->dev, "invalid modulation\n");
 900                 }
 901
 902                 switch ((buf[1] >> 7) & 0x01) {
 903                 case 0:
 904                         c->inversion = INVERSION_OFF;
 905                         break;
 906                 case 1:
 907                         c->inversion = INVERSION_ON;
 908                         break;
 909                 }
 910
 911                 switch ((buf[2] >> 0) & 0x03) {
 912                 case 0:
 913                         c->rolloff = ROLLOFF_35;
 914                         break;
 915                 case 1:
 916                         c->rolloff = ROLLOFF_25;
 917                         break;
 918                 case 2:
 919                         c->rolloff = ROLLOFF_20;
 920                         break;
 921                 default:
 922                         dev_dbg(&client->dev, "invalid rolloff\n");
 923                 }
 924                 break;
 925         default:
 926                 dev_dbg(&client->dev, "invalid delivery_system\n");
 927                 ret = -EINVAL;
 928                 goto err;
 929         }
 930
 931         ret = regmap_bulk_read(dev->regmap, 0x6d, buf, 2);
 932         if (ret)
 933                 goto err;
 934
 935         c->symbol_rate = DIV_ROUND_CLOSEST_ULL((u64)(buf[1] << 8 | buf[0] << 0) * dev->mclk, 0x10000);
 936
 937         return 0;
 938 err:
 939         dev_dbg(&client->dev, "failed=%d\n", ret);
 940         return ret;
 941 }
 942
 943 static int m88ds3103_read_snr(struct dvb_frontend *fe, u16 *snr)
 944 {
 945         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 946
 947         if (c->cnr.stat[0].scale == FE_SCALE_DECIBEL)
 948                 *snr = div_s64(c->cnr.stat[0].svalue, 100);
 949         else
 950                 *snr = 0;
 951
 952         return 0;
 953 }
 954
 955 static int m88ds3103_read_ber(struct dvb_frontend *fe, u32 *ber)
 956 {
 957         struct m88ds3103_dev *dev = fe->demodulator_priv;
 958
 959         *ber = dev->dvbv3_ber;
 960
 961         return 0;
 962 }
 963
 964 static int m88ds3103_set_tone(struct dvb_frontend *fe,
 965         enum fe_sec_tone_mode fe_sec_tone_mode)
 966 {
 967         struct m88ds3103_dev *dev = fe->demodulator_priv;
 968         struct i2c_client *client = dev->client;
 969         int ret;
 970         unsigned int utmp, tone, reg_a1_mask;
 971
 972         dev_dbg(&client->dev, "fe_sec_tone_mode=%d\n", fe_sec_tone_mode);
 973
 974         if (!dev->warm) {
 975                 ret = -EAGAIN;
 976                 goto err;
 977         }
 978
 979         switch (fe_sec_tone_mode) {
 980         case SEC_TONE_ON:
 981                 tone = 0;
 982                 reg_a1_mask = 0x47;
 983                 break;
 984         case SEC_TONE_OFF:
 985                 tone = 1;
 986                 reg_a1_mask = 0x00;
 987                 break;
 988         default:
 989                 dev_dbg(&client->dev, "invalid fe_sec_tone_mode\n");
 990                 ret = -EINVAL;
 991                 goto err;
 992         }
 993
 994         utmp = tone << 7 | dev->cfg->envelope_mode << 5;
 995         ret = m88ds3103_update_bits(dev, 0xa2, 0xe0, utmp);
 996         if (ret)
 997                 goto err;
 998
 999         utmp = 1 << 2;
1000         ret = m88ds3103_update_bits(dev, 0xa1, reg_a1_mask, utmp);
1001         if (ret)
1002                 goto err;
1003
1004         return 0;
1005 err:
1006         dev_dbg(&client->dev, "failed=%d\n", ret);
1007         return ret;
1008 }
1009
1010 static int m88ds3103_set_voltage(struct dvb_frontend *fe,
1011         enum fe_sec_voltage fe_sec_voltage)
1012 {
1013         struct m88ds3103_dev *dev = fe->demodulator_priv;
1014         struct i2c_client *client = dev->client;
1015         int ret;
1016         unsigned int utmp;
1017         bool voltage_sel, voltage_dis;
1018
1019         dev_dbg(&client->dev, "fe_sec_voltage=%d\n", fe_sec_voltage);
1020
1021         if (!dev->warm) {
1022                 ret = -EAGAIN;
1023                 goto err;
1024         }
1025
1026         switch (fe_sec_voltage) {
1027         case SEC_VOLTAGE_18:
1028                 voltage_sel = true;
1029                 voltage_dis = false;
1030                 break;
1031         case SEC_VOLTAGE_13:
1032                 voltage_sel = false;
1033                 voltage_dis = false;
1034                 break;
1035         case SEC_VOLTAGE_OFF:
1036                 voltage_sel = false;
1037                 voltage_dis = true;
1038                 break;
1039         default:
1040                 dev_dbg(&client->dev, "invalid fe_sec_voltage\n");
1041                 ret = -EINVAL;
1042                 goto err;
1043         }
1044
1045         /* output pin polarity */
1046         voltage_sel ^= dev->cfg->lnb_hv_pol;
1047         voltage_dis ^= dev->cfg->lnb_en_pol;
1048
1049         utmp = voltage_dis << 1 | voltage_sel << 0;
1050         ret = m88ds3103_update_bits(dev, 0xa2, 0x03, utmp);
1051         if (ret)
1052                 goto err;
1053
1054         return 0;
1055 err:
1056         dev_dbg(&client->dev, "failed=%d\n", ret);
1057         return ret;
1058 }
1059
1060 static int m88ds3103_diseqc_send_master_cmd(struct dvb_frontend *fe,
1061                 struct dvb_diseqc_master_cmd *diseqc_cmd)
1062 {
1063         struct m88ds3103_dev *dev = fe->demodulator_priv;
1064         struct i2c_client *client = dev->client;
1065         int ret;
1066         unsigned int utmp;
1067         unsigned long timeout;
1068
1069         dev_dbg(&client->dev, "msg=%*ph\n",
1070                 diseqc_cmd->msg_len, diseqc_cmd->msg);
1071
1072         if (!dev->warm) {
1073                 ret = -EAGAIN;
1074                 goto err;
1075         }
1076
1077         if (diseqc_cmd->msg_len < 3 || diseqc_cmd->msg_len > 6) {
1078                 ret = -EINVAL;
1079                 goto err;
1080         }
1081
1082         utmp = dev->cfg->envelope_mode << 5;
1083         ret = m88ds3103_update_bits(dev, 0xa2, 0xe0, utmp);
1084         if (ret)
1085                 goto err;
1086
1087         ret = regmap_bulk_write(dev->regmap, 0xa3, diseqc_cmd->msg,
1088                         diseqc_cmd->msg_len);
1089         if (ret)
1090                 goto err;
1091
1092         ret = regmap_write(dev->regmap, 0xa1,
1093                         (diseqc_cmd->msg_len - 1) << 3 | 0x07);
1094         if (ret)
1095                 goto err;
1096
1097         /* wait DiSEqC TX ready */
1098         #define SEND_MASTER_CMD_TIMEOUT 120
1099         timeout = jiffies + msecs_to_jiffies(SEND_MASTER_CMD_TIMEOUT);
1100
1101         /* DiSEqC message period is 13.5 ms per byte */
1102         utmp = diseqc_cmd->msg_len * 13500;
1103         usleep_range(utmp - 4000, utmp);
1104
1105         for (utmp = 1; !time_after(jiffies, timeout) && utmp;) {
1106                 ret = regmap_read(dev->regmap, 0xa1, &utmp);
1107                 if (ret)
1108                         goto err;
1109                 utmp = (utmp >> 6) & 0x1;
1110         }
1111
1112         if (utmp == 0) {
1113                 dev_dbg(&client->dev, "diseqc tx took %u ms\n",
1114                         jiffies_to_msecs(jiffies) -
1115                         (jiffies_to_msecs(timeout) - SEND_MASTER_CMD_TIMEOUT));
1116         } else {
1117                 dev_dbg(&client->dev, "diseqc tx timeout\n");
1118
1119                 ret = m88ds3103_update_bits(dev, 0xa1, 0xc0, 0x40);
1120                 if (ret)
1121                         goto err;
1122         }
1123
1124         ret = m88ds3103_update_bits(dev, 0xa2, 0xc0, 0x80);
1125         if (ret)
1126                 goto err;
1127
1128         if (utmp == 1) {
1129                 ret = -ETIMEDOUT;
1130                 goto err;
1131         }
1132
1133         return 0;
1134 err:
1135         dev_dbg(&client->dev, "failed=%d\n", ret);
1136         return ret;
1137 }
1138
1139 static int m88ds3103_diseqc_send_burst(struct dvb_frontend *fe,
1140         enum fe_sec_mini_cmd fe_sec_mini_cmd)
1141 {
1142         struct m88ds3103_dev *dev = fe->demodulator_priv;
1143         struct i2c_client *client = dev->client;
1144         int ret;
1145         unsigned int utmp, burst;
1146         unsigned long timeout;
1147
1148         dev_dbg(&client->dev, "fe_sec_mini_cmd=%d\n", fe_sec_mini_cmd);
1149
1150         if (!dev->warm) {
1151                 ret = -EAGAIN;
1152                 goto err;
1153         }
1154
1155         utmp = dev->cfg->envelope_mode << 5;
1156         ret = m88ds3103_update_bits(dev, 0xa2, 0xe0, utmp);
1157         if (ret)
1158                 goto err;
1159
1160         switch (fe_sec_mini_cmd) {
1161         case SEC_MINI_A:
1162                 burst = 0x02;
1163                 break;
1164         case SEC_MINI_B:
1165                 burst = 0x01;
1166                 break;
1167         default:
1168                 dev_dbg(&client->dev, "invalid fe_sec_mini_cmd\n");
1169                 ret = -EINVAL;
1170                 goto err;
1171         }
1172
1173         ret = regmap_write(dev->regmap, 0xa1, burst);
1174         if (ret)
1175                 goto err;
1176
1177         /* wait DiSEqC TX ready */
1178         #define SEND_BURST_TIMEOUT 40
1179         timeout = jiffies + msecs_to_jiffies(SEND_BURST_TIMEOUT);
1180
1181         /* DiSEqC ToneBurst period is 12.5 ms */
1182         usleep_range(8500, 12500);
1183
1184         for (utmp = 1; !time_after(jiffies, timeout) && utmp;) {
1185                 ret = regmap_read(dev->regmap, 0xa1, &utmp);
1186                 if (ret)
1187                         goto err;
1188                 utmp = (utmp >> 6) & 0x1;
1189         }
1190
1191         if (utmp == 0) {
1192                 dev_dbg(&client->dev, "diseqc tx took %u ms\n",
1193                         jiffies_to_msecs(jiffies) -
1194                         (jiffies_to_msecs(timeout) - SEND_BURST_TIMEOUT));
1195         } else {
1196                 dev_dbg(&client->dev, "diseqc tx timeout\n");
1197
1198                 ret = m88ds3103_update_bits(dev, 0xa1, 0xc0, 0x40);
1199                 if (ret)
1200                         goto err;
1201         }
1202
1203         ret = m88ds3103_update_bits(dev, 0xa2, 0xc0, 0x80);
1204         if (ret)
1205                 goto err;
1206
1207         if (utmp == 1) {
1208                 ret = -ETIMEDOUT;
1209                 goto err;
1210         }
1211
1212         return 0;
1213 err:
1214         dev_dbg(&client->dev, "failed=%d\n", ret);
1215         return ret;
1216 }
1217
1218 static int m88ds3103_get_tune_settings(struct dvb_frontend *fe,
1219         struct dvb_frontend_tune_settings *s)
1220 {
1221         s->min_delay_ms = 3000;
1222
1223         return 0;
1224 }
1225
1226 static void m88ds3103_release(struct dvb_frontend *fe)
1227 {
1228         struct m88ds3103_dev *dev = fe->demodulator_priv;
1229         struct i2c_client *client = dev->client;
1230
1231         i2c_unregister_device(client);
1232 }
1233
1234 static int m88ds3103_select(struct i2c_mux_core *muxc, u32 chan)
1235 {
1236         struct m88ds3103_dev *dev = i2c_mux_priv(muxc);
1237         struct i2c_client *client = dev->client;
1238         int ret;
1239         struct i2c_msg msg = {
1240                 .addr = client->addr,
1241                 .flags = 0,
1242                 .len = 2,
1243                 .buf = "\x03\x11",
1244         };
1245
1246         /* Open tuner I2C repeater for 1 xfer, closes automatically */
1247         ret = __i2c_transfer(client->adapter, &msg, 1);
1248         if (ret != 1) {
1249                 dev_warn(&client->dev, "i2c wr failed=%d\n", ret);
1250                 if (ret >= 0)
1251                         ret = -EREMOTEIO;
1252                 return ret;
1253         }
1254
1255         return 0;
1256 }
1257
1258 /*
1259  * XXX: That is wrapper to m88ds3103_probe() via driver core in order to provide
1260  * proper I2C client for legacy media attach binding.
1261  * New users must use I2C client binding directly!
1262  */
1263 struct dvb_frontend *m88ds3103_attach(const struct m88ds3103_config *cfg,
1264                                       struct i2c_adapter *i2c,
1265                                       struct i2c_adapter **tuner_i2c_adapter)
1266 {
1267         struct i2c_client *client;
1268         struct i2c_board_info board_info;
1269         struct m88ds3103_platform_data pdata = {};
1270
1271         pdata.clk = cfg->clock;
1272         pdata.i2c_wr_max = cfg->i2c_wr_max;
1273         pdata.ts_mode = cfg->ts_mode;
1274         pdata.ts_clk = cfg->ts_clk;
1275         pdata.ts_clk_pol = cfg->ts_clk_pol;
1276         pdata.spec_inv = cfg->spec_inv;
1277         pdata.agc = cfg->agc;
1278         pdata.agc_inv = cfg->agc_inv;
1279         pdata.clk_out = cfg->clock_out;
1280         pdata.envelope_mode = cfg->envelope_mode;
1281         pdata.lnb_hv_pol = cfg->lnb_hv_pol;
1282         pdata.lnb_en_pol = cfg->lnb_en_pol;
1283         pdata.attach_in_use = true;
1284
1285         memset(&board_info, 0, sizeof(board_info));
1286         strscpy(board_info.type, "m88ds3103", I2C_NAME_SIZE);
1287         board_info.addr = cfg->i2c_addr;
1288         board_info.platform_data = &pdata;
1289         client = i2c_new_device(i2c, &board_info);
1290         if (!client || !client->dev.driver)
1291                 return NULL;
1292
1293         *tuner_i2c_adapter = pdata.get_i2c_adapter(client);
1294         return pdata.get_dvb_frontend(client);
1295 }
1296 EXPORT_SYMBOL(m88ds3103_attach);
1297
1298 static const struct dvb_frontend_ops m88ds3103_ops = {
1299         .delsys = {SYS_DVBS, SYS_DVBS2},
1300         .info = {
1301                 .name = "Montage Technology M88DS3103",
1302                 .frequency_min_hz =  950 * MHz,
1303                 .frequency_max_hz = 2150 * MHz,
1304                 .frequency_tolerance_hz = 5 * MHz,
1305                 .symbol_rate_min =  1000000,
1306                 .symbol_rate_max = 45000000,
1307                 .caps = FE_CAN_INVERSION_AUTO |
1308                         FE_CAN_FEC_1_2 |
1309                         FE_CAN_FEC_2_3 |
1310                         FE_CAN_FEC_3_4 |
1311                         FE_CAN_FEC_4_5 |
1312                         FE_CAN_FEC_5_6 |
1313                         FE_CAN_FEC_6_7 |
1314                         FE_CAN_FEC_7_8 |
1315                         FE_CAN_FEC_8_9 |
1316                         FE_CAN_FEC_AUTO |
1317                         FE_CAN_QPSK |
1318                         FE_CAN_RECOVER |
1319                         FE_CAN_2G_MODULATION
1320         },
1321
1322         .release = m88ds3103_release,
1323
1324         .get_tune_settings = m88ds3103_get_tune_settings,
1325
1326         .init = m88ds3103_init,
1327         .sleep = m88ds3103_sleep,
1328
1329         .set_frontend = m88ds3103_set_frontend,
1330         .get_frontend = m88ds3103_get_frontend,
1331
1332         .read_status = m88ds3103_read_status,
1333         .read_snr = m88ds3103_read_snr,
1334         .read_ber = m88ds3103_read_ber,
1335
1336         .diseqc_send_master_cmd = m88ds3103_diseqc_send_master_cmd,
1337         .diseqc_send_burst = m88ds3103_diseqc_send_burst,
1338
1339         .set_tone = m88ds3103_set_tone,
1340         .set_voltage = m88ds3103_set_voltage,
1341 };
1342
1343 static struct dvb_frontend *m88ds3103_get_dvb_frontend(struct i2c_client *client)
1344 {
1345         struct m88ds3103_dev *dev = i2c_get_clientdata(client);
1346
1347         dev_dbg(&client->dev, "\n");
1348
1349         return &dev->fe;
1350 }
1351
1352 static struct i2c_adapter *m88ds3103_get_i2c_adapter(struct i2c_client *client)
1353 {
1354         struct m88ds3103_dev *dev = i2c_get_clientdata(client);
1355
1356         dev_dbg(&client->dev, "\n");
1357
1358         return dev->muxc->adapter[0];
1359 }
1360
1361 static int m88ds3103_probe(struct i2c_client *client,
1362                         const struct i2c_device_id *id)
1363 {
1364         struct m88ds3103_dev *dev;
1365         struct m88ds3103_platform_data *pdata = client->dev.platform_data;
1366         int ret;
1367         unsigned int utmp;
1368
1369         dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1370         if (!dev) {
1371                 ret = -ENOMEM;
1372                 goto err;
1373         }
1374
1375         dev->client = client;
1376         dev->config.clock = pdata->clk;
1377         dev->config.i2c_wr_max = pdata->i2c_wr_max;
1378         dev->config.ts_mode = pdata->ts_mode;
1379         dev->config.ts_clk = pdata->ts_clk * 1000;
1380         dev->config.ts_clk_pol = pdata->ts_clk_pol;
1381         dev->config.spec_inv = pdata->spec_inv;
1382         dev->config.agc_inv = pdata->agc_inv;
1383         dev->config.clock_out = pdata->clk_out;
1384         dev->config.envelope_mode = pdata->envelope_mode;
1385         dev->config.agc = pdata->agc;
1386         dev->config.lnb_hv_pol = pdata->lnb_hv_pol;
1387         dev->config.lnb_en_pol = pdata->lnb_en_pol;
1388         dev->cfg = &dev->config;
1389         /* create regmap */
1390         dev->regmap_config.reg_bits = 8,
1391         dev->regmap_config.val_bits = 8,
1392         dev->regmap_config.lock_arg = dev,
1393         dev->regmap = devm_regmap_init_i2c(client, &dev->regmap_config);
1394         if (IS_ERR(dev->regmap)) {
1395                 ret = PTR_ERR(dev->regmap);
1396                 goto err_kfree;
1397         }
1398
1399         /* 0x00: chip id[6:0], 0x01: chip ver[7:0], 0x02: chip ver[15:8] */
1400         ret = regmap_read(dev->regmap, 0x00, &utmp);
1401         if (ret)
1402                 goto err_kfree;
1403
1404         dev->chip_id = utmp >> 1;
1405         dev_dbg(&client->dev, "chip_id=%02x\n", dev->chip_id);
1406
1407         switch (dev->chip_id) {
1408         case M88RS6000_CHIP_ID:
1409         case M88DS3103_CHIP_ID:
1410                 break;
1411         default:
1412                 ret = -ENODEV;
1413                 dev_err(&client->dev, "Unknown device. Chip_id=%02x\n", dev->chip_id);
1414                 goto err_kfree;
1415         }
1416
1417         switch (dev->cfg->clock_out) {
1418         case M88DS3103_CLOCK_OUT_DISABLED:
1419                 utmp = 0x80;
1420                 break;
1421         case M88DS3103_CLOCK_OUT_ENABLED:
1422                 utmp = 0x00;
1423                 break;
1424         case M88DS3103_CLOCK_OUT_ENABLED_DIV2:
1425                 utmp = 0x10;
1426                 break;
1427         default:
1428                 ret = -EINVAL;
1429                 goto err_kfree;
1430         }
1431
1432         if (!pdata->ts_clk) {
1433                 ret = -EINVAL;
1434                 goto err_kfree;
1435         }
1436
1437         /* 0x29 register is defined differently for m88rs6000. */
1438         /* set internal tuner address to 0x21 */
1439         if (dev->chip_id == M88RS6000_CHIP_ID)
1440                 utmp = 0x00;
1441
1442         ret = regmap_write(dev->regmap, 0x29, utmp);
1443         if (ret)
1444                 goto err_kfree;
1445
1446         /* sleep */
1447         ret = m88ds3103_update_bits(dev, 0x08, 0x01, 0x00);
1448         if (ret)
1449                 goto err_kfree;
1450         ret = m88ds3103_update_bits(dev, 0x04, 0x01, 0x01);
1451         if (ret)
1452                 goto err_kfree;
1453         ret = m88ds3103_update_bits(dev, 0x23, 0x10, 0x10);
1454         if (ret)
1455                 goto err_kfree;
1456
1457         /* create mux i2c adapter for tuner */
1458         dev->muxc = i2c_mux_alloc(client->adapter, &client->dev, 1, 0, 0,
1459                                   m88ds3103_select, NULL);
1460         if (!dev->muxc) {
1461                 ret = -ENOMEM;
1462                 goto err_kfree;
1463         }
1464         dev->muxc->priv = dev;
1465         ret = i2c_mux_add_adapter(dev->muxc, 0, 0, 0);
1466         if (ret)
1467                 goto err_kfree;
1468
1469         /* create dvb_frontend */
1470         memcpy(&dev->fe.ops, &m88ds3103_ops, sizeof(struct dvb_frontend_ops));
1471         if (dev->chip_id == M88RS6000_CHIP_ID)
1472                 strscpy(dev->fe.ops.info.name, "Montage Technology M88RS6000",
1473                         sizeof(dev->fe.ops.info.name));
1474         if (!pdata->attach_in_use)
1475                 dev->fe.ops.release = NULL;
1476         dev->fe.demodulator_priv = dev;
1477         i2c_set_clientdata(client, dev);
1478
1479         /* setup callbacks */
1480         pdata->get_dvb_frontend = m88ds3103_get_dvb_frontend;
1481         pdata->get_i2c_adapter = m88ds3103_get_i2c_adapter;
1482         return 0;
1483 err_kfree:
1484         kfree(dev);
1485 err:
1486         dev_dbg(&client->dev, "failed=%d\n", ret);
1487         return ret;
1488 }
1489
1490 static int m88ds3103_remove(struct i2c_client *client)
1491 {
1492         struct m88ds3103_dev *dev = i2c_get_clientdata(client);
1493
1494         dev_dbg(&client->dev, "\n");
1495
1496         i2c_mux_del_adapters(dev->muxc);
1497
1498         kfree(dev);
1499         return 0;
1500 }
1501
1502 static const struct i2c_device_id m88ds3103_id_table[] = {
1503         {"m88ds3103", 0},
1504         {}
1505 };
1506 MODULE_DEVICE_TABLE(i2c, m88ds3103_id_table);
1507
1508 static struct i2c_driver m88ds3103_driver = {
1509         .driver = {
1510                 .name   = "m88ds3103",
1511                 .suppress_bind_attrs = true,
1512         },
1513         .probe          = m88ds3103_probe,
1514         .remove         = m88ds3103_remove,
1515         .id_table       = m88ds3103_id_table,
1516 };
1517
1518 module_i2c_driver(m88ds3103_driver);
1519
1520 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
1521 MODULE_DESCRIPTION("Montage Technology M88DS3103 DVB-S/S2 demodulator driver");
1522 MODULE_LICENSE("GPL");
1523 MODULE_FIRMWARE(M88DS3103_FIRMWARE);
1524 MODULE_FIRMWARE(M88RS6000_FIRMWARE);