drivers/media/dvb-frontends/af9033.c

   1 /*
   2  * Afatech AF9033 demodulator driver
   3  *
   4  * Copyright (C) 2009 Antti Palosaari <crope@iki.fi>
   5  * Copyright (C) 2012 Antti Palosaari <crope@iki.fi>
   6  *
   7  *    This program is free software; you can redistribute it and/or modify
   8  *    it under the terms of the GNU General Public License as published by
   9  *    the Free Software Foundation; either version 2 of the License, or
  10  *    (at your option) any later version.
  11  *
  12  *    This program is distributed in the hope that it will be useful,
  13  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  *    GNU General Public License for more details.
  16  */
  17
  18 #include "af9033_priv.h"
  19
  20 struct af9033_dev {
  21         struct i2c_client *client;
  22         struct regmap *regmap;
  23         struct dvb_frontend fe;
  24         struct af9033_config cfg;
  25         bool is_af9035;
  26         bool is_it9135;
  27
  28         u32 bandwidth_hz;
  29         bool ts_mode_parallel;
  30         bool ts_mode_serial;
  31
  32         enum fe_status fe_status;
  33         u64 post_bit_error_prev; /* for old read_ber we return (curr - prev) */
  34         u64 post_bit_error;
  35         u64 post_bit_count;
  36         u64 error_block_count;
  37         u64 total_block_count;
  38 };
  39
  40 /* Write reg val table using reg addr auto increment */
  41 static int af9033_wr_reg_val_tab(struct af9033_dev *dev,
  42                                  const struct reg_val *tab, int tab_len)
  43 {
  44         struct i2c_client *client = dev->client;
  45 #define MAX_TAB_LEN 212
  46         int ret, i, j;
  47         u8 buf[1 + MAX_TAB_LEN];
  48
  49         dev_dbg(&client->dev, "tab_len=%d\n", tab_len);
  50
  51         if (tab_len > sizeof(buf)) {
  52                 dev_warn(&client->dev, "tab len %d is too big\n", tab_len);
  53                 return -EINVAL;
  54         }
  55
  56         for (i = 0, j = 0; i < tab_len; i++) {
  57                 buf[j] = tab[i].val;
  58
  59                 if (i == tab_len - 1 || tab[i].reg != tab[i + 1].reg - 1) {
  60                         ret = regmap_bulk_write(dev->regmap, tab[i].reg - j,
  61                                                 buf, j + 1);
  62                         if (ret)
  63                                 goto err;
  64
  65                         j = 0;
  66                 } else {
  67                         j++;
  68                 }
  69         }
  70
  71         return 0;
  72 err:
  73         dev_dbg(&client->dev, "failed=%d\n", ret);
  74         return ret;
  75 }
  76
  77 static int af9033_init(struct dvb_frontend *fe)
  78 {
  79         struct af9033_dev *dev = fe->demodulator_priv;
  80         struct i2c_client *client = dev->client;
  81         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  82         int ret, i, len;
  83         unsigned int utmp;
  84         const struct reg_val *init;
  85         u8 buf[4];
  86         struct reg_val_mask tab[] = {
  87                 { 0x80fb24, 0x00, 0x08 },
  88                 { 0x80004c, 0x00, 0xff },
  89                 { 0x00f641, dev->cfg.tuner, 0xff },
  90                 { 0x80f5ca, 0x01, 0x01 },
  91                 { 0x80f715, 0x01, 0x01 },
  92                 { 0x00f41f, 0x04, 0x04 },
  93                 { 0x00f41a, 0x01, 0x01 },
  94                 { 0x80f731, 0x00, 0x01 },
  95                 { 0x00d91e, 0x00, 0x01 },
  96                 { 0x00d919, 0x00, 0x01 },
  97                 { 0x80f732, 0x00, 0x01 },
  98                 { 0x00d91f, 0x00, 0x01 },
  99                 { 0x00d91a, 0x00, 0x01 },
 100                 { 0x80f730, 0x00, 0x01 },
 101                 { 0x80f778, 0x00, 0xff },
 102                 { 0x80f73c, 0x01, 0x01 },
 103                 { 0x80f776, 0x00, 0x01 },
 104                 { 0x00d8fd, 0x01, 0xff },
 105                 { 0x00d830, 0x01, 0xff },
 106                 { 0x00d831, 0x00, 0xff },
 107                 { 0x00d832, 0x00, 0xff },
 108                 { 0x80f985, dev->ts_mode_serial, 0x01 },
 109                 { 0x80f986, dev->ts_mode_parallel, 0x01 },
 110                 { 0x00d827, 0x00, 0xff },
 111                 { 0x00d829, 0x00, 0xff },
 112                 { 0x800045, dev->cfg.adc_multiplier, 0xff },
 113         };
 114
 115         dev_dbg(&client->dev, "\n");
 116
 117         /* Main clk control */
 118         utmp = div_u64((u64)dev->cfg.clock * 0x80000, 1000000);
 119         buf[0] = (utmp >>  0) & 0xff;
 120         buf[1] = (utmp >>  8) & 0xff;
 121         buf[2] = (utmp >> 16) & 0xff;
 122         buf[3] = (utmp >> 24) & 0xff;
 123         ret = regmap_bulk_write(dev->regmap, 0x800025, buf, 4);
 124         if (ret)
 125                 goto err;
 126
 127         dev_dbg(&client->dev, "clk=%u clk_cw=%08x\n", dev->cfg.clock, utmp);
 128
 129         /* ADC clk control */
 130         for (i = 0; i < ARRAY_SIZE(clock_adc_lut); i++) {
 131                 if (clock_adc_lut[i].clock == dev->cfg.clock)
 132                         break;
 133         }
 134         if (i == ARRAY_SIZE(clock_adc_lut)) {
 135                 dev_err(&client->dev, "Couldn't find ADC config for clock %d\n",
 136                         dev->cfg.clock);
 137                 goto err;
 138         }
 139
 140         utmp = div_u64((u64)clock_adc_lut[i].adc * 0x80000, 1000000);
 141         buf[0] = (utmp >>  0) & 0xff;
 142         buf[1] = (utmp >>  8) & 0xff;
 143         buf[2] = (utmp >> 16) & 0xff;
 144         ret = regmap_bulk_write(dev->regmap, 0x80f1cd, buf, 3);
 145         if (ret)
 146                 goto err;
 147
 148         dev_dbg(&client->dev, "adc=%u adc_cw=%06x\n",
 149                 clock_adc_lut[i].adc, utmp);
 150
 151         /* Config register table */
 152         for (i = 0; i < ARRAY_SIZE(tab); i++) {
 153                 ret = regmap_update_bits(dev->regmap, tab[i].reg, tab[i].mask,
 154                                          tab[i].val);
 155                 if (ret)
 156                         goto err;
 157         }
 158
 159         /* Demod clk output */
 160         if (dev->cfg.dyn0_clk) {
 161                 ret = regmap_write(dev->regmap, 0x80fba8, 0x00);
 162                 if (ret)
 163                         goto err;
 164         }
 165
 166         /* TS interface */
 167         if (dev->cfg.ts_mode == AF9033_TS_MODE_USB) {
 168                 ret = regmap_update_bits(dev->regmap, 0x80f9a5, 0x01, 0x00);
 169                 if (ret)
 170                         goto err;
 171                 ret = regmap_update_bits(dev->regmap, 0x80f9b5, 0x01, 0x01);
 172                 if (ret)
 173                         goto err;
 174         } else {
 175                 ret = regmap_update_bits(dev->regmap, 0x80f990, 0x01, 0x00);
 176                 if (ret)
 177                         goto err;
 178                 ret = regmap_update_bits(dev->regmap, 0x80f9b5, 0x01, 0x00);
 179                 if (ret)
 180                         goto err;
 181         }
 182
 183         /* Demod core settings */
 184         dev_dbg(&client->dev, "load ofsm settings\n");
 185         switch (dev->cfg.tuner) {
 186         case AF9033_TUNER_IT9135_38:
 187         case AF9033_TUNER_IT9135_51:
 188         case AF9033_TUNER_IT9135_52:
 189                 len = ARRAY_SIZE(ofsm_init_it9135_v1);
 190                 init = ofsm_init_it9135_v1;
 191                 break;
 192         case AF9033_TUNER_IT9135_60:
 193         case AF9033_TUNER_IT9135_61:
 194         case AF9033_TUNER_IT9135_62:
 195                 len = ARRAY_SIZE(ofsm_init_it9135_v2);
 196                 init = ofsm_init_it9135_v2;
 197                 break;
 198         default:
 199                 len = ARRAY_SIZE(ofsm_init);
 200                 init = ofsm_init;
 201                 break;
 202         }
 203
 204         ret = af9033_wr_reg_val_tab(dev, init, len);
 205         if (ret)
 206                 goto err;
 207
 208         /* Demod tuner specific settings */
 209         dev_dbg(&client->dev, "load tuner specific settings\n");
 210         switch (dev->cfg.tuner) {
 211         case AF9033_TUNER_TUA9001:
 212                 len = ARRAY_SIZE(tuner_init_tua9001);
 213                 init = tuner_init_tua9001;
 214                 break;
 215         case AF9033_TUNER_FC0011:
 216                 len = ARRAY_SIZE(tuner_init_fc0011);
 217                 init = tuner_init_fc0011;
 218                 break;
 219         case AF9033_TUNER_MXL5007T:
 220                 len = ARRAY_SIZE(tuner_init_mxl5007t);
 221                 init = tuner_init_mxl5007t;
 222                 break;
 223         case AF9033_TUNER_TDA18218:
 224                 len = ARRAY_SIZE(tuner_init_tda18218);
 225                 init = tuner_init_tda18218;
 226                 break;
 227         case AF9033_TUNER_FC2580:
 228                 len = ARRAY_SIZE(tuner_init_fc2580);
 229                 init = tuner_init_fc2580;
 230                 break;
 231         case AF9033_TUNER_FC0012:
 232                 len = ARRAY_SIZE(tuner_init_fc0012);
 233                 init = tuner_init_fc0012;
 234                 break;
 235         case AF9033_TUNER_IT9135_38:
 236                 len = ARRAY_SIZE(tuner_init_it9135_38);
 237                 init = tuner_init_it9135_38;
 238                 break;
 239         case AF9033_TUNER_IT9135_51:
 240                 len = ARRAY_SIZE(tuner_init_it9135_51);
 241                 init = tuner_init_it9135_51;
 242                 break;
 243         case AF9033_TUNER_IT9135_52:
 244                 len = ARRAY_SIZE(tuner_init_it9135_52);
 245                 init = tuner_init_it9135_52;
 246                 break;
 247         case AF9033_TUNER_IT9135_60:
 248                 len = ARRAY_SIZE(tuner_init_it9135_60);
 249                 init = tuner_init_it9135_60;
 250                 break;
 251         case AF9033_TUNER_IT9135_61:
 252                 len = ARRAY_SIZE(tuner_init_it9135_61);
 253                 init = tuner_init_it9135_61;
 254                 break;
 255         case AF9033_TUNER_IT9135_62:
 256                 len = ARRAY_SIZE(tuner_init_it9135_62);
 257                 init = tuner_init_it9135_62;
 258                 break;
 259         default:
 260                 dev_dbg(&client->dev, "unsupported tuner ID=%d\n",
 261                         dev->cfg.tuner);
 262                 ret = -ENODEV;
 263                 goto err;
 264         }
 265
 266         ret = af9033_wr_reg_val_tab(dev, init, len);
 267         if (ret)
 268                 goto err;
 269
 270         if (dev->cfg.ts_mode == AF9033_TS_MODE_SERIAL) {
 271                 ret = regmap_update_bits(dev->regmap, 0x00d91c, 0x01, 0x01);
 272                 if (ret)
 273                         goto err;
 274                 ret = regmap_update_bits(dev->regmap, 0x00d917, 0x01, 0x00);
 275                 if (ret)
 276                         goto err;
 277                 ret = regmap_update_bits(dev->regmap, 0x00d916, 0x01, 0x00);
 278                 if (ret)
 279                         goto err;
 280         }
 281
 282         switch (dev->cfg.tuner) {
 283         case AF9033_TUNER_IT9135_60:
 284         case AF9033_TUNER_IT9135_61:
 285         case AF9033_TUNER_IT9135_62:
 286                 ret = regmap_write(dev->regmap, 0x800000, 0x01);
 287                 if (ret)
 288                         goto err;
 289         }
 290
 291         dev->bandwidth_hz = 0; /* Force to program all parameters */
 292         /* Init stats here in order signal app which stats are supported */
 293         c->strength.len = 1;
 294         c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 295         c->cnr.len = 1;
 296         c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 297         c->block_count.len = 1;
 298         c->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 299         c->block_error.len = 1;
 300         c->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 301         c->post_bit_count.len = 1;
 302         c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 303         c->post_bit_error.len = 1;
 304         c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 305
 306         return 0;
 307 err:
 308         dev_dbg(&client->dev, "failed=%d\n", ret);
 309         return ret;
 310 }
 311
 312 static int af9033_sleep(struct dvb_frontend *fe)
 313 {
 314         struct af9033_dev *dev = fe->demodulator_priv;
 315         struct i2c_client *client = dev->client;
 316         int ret;
 317         unsigned int utmp;
 318
 319         dev_dbg(&client->dev, "\n");
 320
 321         ret = regmap_write(dev->regmap, 0x80004c, 0x01);
 322         if (ret)
 323                 goto err;
 324         ret = regmap_write(dev->regmap, 0x800000, 0x00);
 325         if (ret)
 326                 goto err;
 327         ret = regmap_read_poll_timeout(dev->regmap, 0x80004c, utmp, utmp == 0,
 328                                        5000, 1000000);
 329         if (ret)
 330                 goto err;
 331         ret = regmap_update_bits(dev->regmap, 0x80fb24, 0x08, 0x08);
 332         if (ret)
 333                 goto err;
 334
 335         /* Prevent current leak by setting TS interface to parallel mode */
 336         if (dev->cfg.ts_mode == AF9033_TS_MODE_SERIAL) {
 337                 /* Enable parallel TS */
 338                 ret = regmap_update_bits(dev->regmap, 0x00d917, 0x01, 0x00);
 339                 if (ret)
 340                         goto err;
 341                 ret = regmap_update_bits(dev->regmap, 0x00d916, 0x01, 0x01);
 342                 if (ret)
 343                         goto err;
 344         }
 345
 346         return 0;
 347 err:
 348         dev_dbg(&client->dev, "failed=%d\n", ret);
 349         return ret;
 350 }
 351
 352 static int af9033_get_tune_settings(struct dvb_frontend *fe,
 353                                     struct dvb_frontend_tune_settings *fesettings)
 354 {
 355         /* 800 => 2000 because IT9135 v2 is slow to gain lock */
 356         fesettings->min_delay_ms = 2000;
 357         fesettings->step_size = 0;
 358         fesettings->max_drift = 0;
 359
 360         return 0;
 361 }
 362
 363 static int af9033_set_frontend(struct dvb_frontend *fe)
 364 {
 365         struct af9033_dev *dev = fe->demodulator_priv;
 366         struct i2c_client *client = dev->client;
 367         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 368         int ret, i;
 369         unsigned int utmp, adc_freq;
 370         u8 tmp, buf[3], bandwidth_reg_val;
 371         u32 if_frequency;
 372
 373         dev_dbg(&client->dev, "frequency=%u bandwidth_hz=%u\n",
 374                 c->frequency, c->bandwidth_hz);
 375
 376         /* Check bandwidth */
 377         switch (c->bandwidth_hz) {
 378         case 6000000:
 379                 bandwidth_reg_val = 0x00;
 380                 break;
 381         case 7000000:
 382                 bandwidth_reg_val = 0x01;
 383                 break;
 384         case 8000000:
 385                 bandwidth_reg_val = 0x02;
 386                 break;
 387         default:
 388                 dev_dbg(&client->dev, "invalid bandwidth_hz\n");
 389                 ret = -EINVAL;
 390                 goto err;
 391         }
 392
 393         /* Program tuner */
 394         if (fe->ops.tuner_ops.set_params)
 395                 fe->ops.tuner_ops.set_params(fe);
 396
 397         /* Coefficients */
 398         if (c->bandwidth_hz != dev->bandwidth_hz) {
 399                 for (i = 0; i < ARRAY_SIZE(coeff_lut); i++) {
 400                         if (coeff_lut[i].clock == dev->cfg.clock &&
 401                             coeff_lut[i].bandwidth_hz == c->bandwidth_hz) {
 402                                 break;
 403                         }
 404                 }
 405                 if (i == ARRAY_SIZE(coeff_lut)) {
 406                         dev_err(&client->dev,
 407                                 "Couldn't find config for clock %u\n",
 408                                 dev->cfg.clock);
 409                         ret = -EINVAL;
 410                         goto err;
 411                 }
 412
 413                 ret = regmap_bulk_write(dev->regmap, 0x800001, coeff_lut[i].val,
 414                                         sizeof(coeff_lut[i].val));
 415                 if (ret)
 416                         goto err;
 417         }
 418
 419         /* IF frequency control */
 420         if (c->bandwidth_hz != dev->bandwidth_hz) {
 421                 for (i = 0; i < ARRAY_SIZE(clock_adc_lut); i++) {
 422                         if (clock_adc_lut[i].clock == dev->cfg.clock)
 423                                 break;
 424                 }
 425                 if (i == ARRAY_SIZE(clock_adc_lut)) {
 426                         dev_err(&client->dev,
 427                                 "Couldn't find ADC clock for clock %u\n",
 428                                 dev->cfg.clock);
 429                         ret = -EINVAL;
 430                         goto err;
 431                 }
 432                 adc_freq = clock_adc_lut[i].adc;
 433
 434                 if (dev->cfg.adc_multiplier == AF9033_ADC_MULTIPLIER_2X)
 435                         adc_freq = 2 * adc_freq;
 436
 437                 /* Get used IF frequency */
 438                 if (fe->ops.tuner_ops.get_if_frequency)
 439                         fe->ops.tuner_ops.get_if_frequency(fe, &if_frequency);
 440                 else
 441                         if_frequency = 0;
 442
 443                 utmp = DIV_ROUND_CLOSEST_ULL((u64)if_frequency * 0x800000,
 444                                              adc_freq);
 445
 446                 if (!dev->cfg.spec_inv && if_frequency)
 447                         utmp = 0x800000 - utmp;
 448
 449                 buf[0] = (utmp >>  0) & 0xff;
 450                 buf[1] = (utmp >>  8) & 0xff;
 451                 buf[2] = (utmp >> 16) & 0xff;
 452                 ret = regmap_bulk_write(dev->regmap, 0x800029, buf, 3);
 453                 if (ret)
 454                         goto err;
 455
 456                 dev_dbg(&client->dev, "if_frequency_cw=%06x\n", utmp);
 457
 458                 dev->bandwidth_hz = c->bandwidth_hz;
 459         }
 460
 461         ret = regmap_update_bits(dev->regmap, 0x80f904, 0x03,
 462                                  bandwidth_reg_val);
 463         if (ret)
 464                 goto err;
 465         ret = regmap_write(dev->regmap, 0x800040, 0x00);
 466         if (ret)
 467                 goto err;
 468         ret = regmap_write(dev->regmap, 0x800047, 0x00);
 469         if (ret)
 470                 goto err;
 471         ret = regmap_update_bits(dev->regmap, 0x80f999, 0x01, 0x00);
 472         if (ret)
 473                 goto err;
 474
 475         if (c->frequency <= 230000000)
 476                 tmp = 0x00; /* VHF */
 477         else
 478                 tmp = 0x01; /* UHF */
 479
 480         ret = regmap_write(dev->regmap, 0x80004b, tmp);
 481         if (ret)
 482                 goto err;
 483         /* Reset FSM */
 484         ret = regmap_write(dev->regmap, 0x800000, 0x00);
 485         if (ret)
 486                 goto err;
 487
 488         return 0;
 489 err:
 490         dev_dbg(&client->dev, "failed=%d\n", ret);
 491         return ret;
 492 }
 493
 494 static int af9033_get_frontend(struct dvb_frontend *fe,
 495                                struct dtv_frontend_properties *c)
 496 {
 497         struct af9033_dev *dev = fe->demodulator_priv;
 498         struct i2c_client *client = dev->client;
 499         int ret;
 500         u8 buf[8];
 501
 502         dev_dbg(&client->dev, "\n");
 503
 504         /* Read all needed TPS registers */
 505         ret = regmap_bulk_read(dev->regmap, 0x80f900, buf, 8);
 506         if (ret)
 507                 goto err;
 508
 509         switch ((buf[0] >> 0) & 3) {
 510         case 0:
 511                 c->transmission_mode = TRANSMISSION_MODE_2K;
 512                 break;
 513         case 1:
 514                 c->transmission_mode = TRANSMISSION_MODE_8K;
 515                 break;
 516         }
 517
 518         switch ((buf[1] >> 0) & 3) {
 519         case 0:
 520                 c->guard_interval = GUARD_INTERVAL_1_32;
 521                 break;
 522         case 1:
 523                 c->guard_interval = GUARD_INTERVAL_1_16;
 524                 break;
 525         case 2:
 526                 c->guard_interval = GUARD_INTERVAL_1_8;
 527                 break;
 528         case 3:
 529                 c->guard_interval = GUARD_INTERVAL_1_4;
 530                 break;
 531         }
 532
 533         switch ((buf[2] >> 0) & 7) {
 534         case 0:
 535                 c->hierarchy = HIERARCHY_NONE;
 536                 break;
 537         case 1:
 538                 c->hierarchy = HIERARCHY_1;
 539                 break;
 540         case 2:
 541                 c->hierarchy = HIERARCHY_2;
 542                 break;
 543         case 3:
 544                 c->hierarchy = HIERARCHY_4;
 545                 break;
 546         }
 547
 548         switch ((buf[3] >> 0) & 3) {
 549         case 0:
 550                 c->modulation = QPSK;
 551                 break;
 552         case 1:
 553                 c->modulation = QAM_16;
 554                 break;
 555         case 2:
 556                 c->modulation = QAM_64;
 557                 break;
 558         }
 559
 560         switch ((buf[4] >> 0) & 3) {
 561         case 0:
 562                 c->bandwidth_hz = 6000000;
 563                 break;
 564         case 1:
 565                 c->bandwidth_hz = 7000000;
 566                 break;
 567         case 2:
 568                 c->bandwidth_hz = 8000000;
 569                 break;
 570         }
 571
 572         switch ((buf[6] >> 0) & 7) {
 573         case 0:
 574                 c->code_rate_HP = FEC_1_2;
 575                 break;
 576         case 1:
 577                 c->code_rate_HP = FEC_2_3;
 578                 break;
 579         case 2:
 580                 c->code_rate_HP = FEC_3_4;
 581                 break;
 582         case 3:
 583                 c->code_rate_HP = FEC_5_6;
 584                 break;
 585         case 4:
 586                 c->code_rate_HP = FEC_7_8;
 587                 break;
 588         case 5:
 589                 c->code_rate_HP = FEC_NONE;
 590                 break;
 591         }
 592
 593         switch ((buf[7] >> 0) & 7) {
 594         case 0:
 595                 c->code_rate_LP = FEC_1_2;
 596                 break;
 597         case 1:
 598                 c->code_rate_LP = FEC_2_3;
 599                 break;
 600         case 2:
 601                 c->code_rate_LP = FEC_3_4;
 602                 break;
 603         case 3:
 604                 c->code_rate_LP = FEC_5_6;
 605                 break;
 606         case 4:
 607                 c->code_rate_LP = FEC_7_8;
 608                 break;
 609         case 5:
 610                 c->code_rate_LP = FEC_NONE;
 611                 break;
 612         }
 613
 614         return 0;
 615 err:
 616         dev_dbg(&client->dev, "failed=%d\n", ret);
 617         return ret;
 618 }
 619
 620 static int af9033_read_status(struct dvb_frontend *fe, enum fe_status *status)
 621 {
 622         struct af9033_dev *dev = fe->demodulator_priv;
 623         struct i2c_client *client = dev->client;
 624         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 625         int ret, tmp = 0;
 626         u8 buf[7];
 627         unsigned int utmp, utmp1;
 628
 629         dev_dbg(&client->dev, "\n");
 630
 631         *status = 0;
 632
 633         /* Radio channel status: 0=no result, 1=has signal, 2=no signal */
 634         ret = regmap_read(dev->regmap, 0x800047, &utmp);
 635         if (ret)
 636                 goto err;
 637
 638         /* Has signal */
 639         if (utmp == 0x01)
 640                 *status |= FE_HAS_SIGNAL;
 641
 642         if (utmp != 0x02) {
 643                 /* TPS lock */
 644                 ret = regmap_read(dev->regmap, 0x80f5a9, &utmp);
 645                 if (ret)
 646                         goto err;
 647
 648                 if ((utmp >> 0) & 0x01)
 649                         *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
 650                                         FE_HAS_VITERBI;
 651
 652                 /* Full lock */
 653                 ret = regmap_read(dev->regmap, 0x80f999, &utmp);
 654                 if (ret)
 655                         goto err;
 656
 657                 if ((utmp >> 0) & 0x01)
 658                         *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
 659                                         FE_HAS_VITERBI | FE_HAS_SYNC |
 660                                         FE_HAS_LOCK;
 661         }
 662
 663         dev->fe_status = *status;
 664
 665         /* Signal strength */
 666         if (dev->fe_status & FE_HAS_SIGNAL) {
 667                 if (dev->is_af9035) {
 668                         ret = regmap_read(dev->regmap, 0x80004a, &utmp);
 669                         if (ret)
 670                                 goto err;
 671                         tmp = -utmp * 1000;
 672                 } else {
 673                         ret = regmap_read(dev->regmap, 0x8000f7, &utmp);
 674                         if (ret)
 675                                 goto err;
 676                         tmp = (utmp - 100) * 1000;
 677                 }
 678
 679                 c->strength.len = 1;
 680                 c->strength.stat[0].scale = FE_SCALE_DECIBEL;
 681                 c->strength.stat[0].svalue = tmp;
 682         } else {
 683                 c->strength.len = 1;
 684                 c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 685         }
 686
 687         /* CNR */
 688         if (dev->fe_status & FE_HAS_VITERBI) {
 689                 /* Read raw SNR value */
 690                 ret = regmap_bulk_read(dev->regmap, 0x80002c, buf, 3);
 691                 if (ret)
 692                         goto err;
 693
 694                 utmp1 = buf[2] << 16 | buf[1] << 8 | buf[0] << 0;
 695
 696                 /* Read superframe number */
 697                 ret = regmap_read(dev->regmap, 0x80f78b, &utmp);
 698                 if (ret)
 699                         goto err;
 700
 701                 if (utmp)
 702                         utmp1 /= utmp;
 703
 704                 /* Read current transmission mode */
 705                 ret = regmap_read(dev->regmap, 0x80f900, &utmp);
 706                 if (ret)
 707                         goto err;
 708
 709                 switch ((utmp >> 0) & 3) {
 710                 case 0:
 711                         /* 2k */
 712                         utmp1 *= 4;
 713                         break;
 714                 case 1:
 715                         /* 8k */
 716                         utmp1 *= 1;
 717                         break;
 718                 case 2:
 719                         /* 4k */
 720                         utmp1 *= 2;
 721                         break;
 722                 default:
 723                         utmp1 *= 0;
 724                         break;
 725                 }
 726
 727                 /* Read current modulation */
 728                 ret = regmap_read(dev->regmap, 0x80f903, &utmp);
 729                 if (ret)
 730                         goto err;
 731
 732                 switch ((utmp >> 0) & 3) {
 733                 case 0:
 734                         /*
 735                          * QPSK
 736                          * CNR[dB] 13 * -log10((1690000 - value) / value) + 2.6
 737                          * value [653799, 1689999], 2.6 / 13 = 3355443
 738                          */
 739                         utmp1 = clamp(utmp1, 653799U, 1689999U);
 740                         utmp1 = ((u64)(intlog10(utmp1)
 741                                  - intlog10(1690000 - utmp1)
 742                                  + 3355443) * 13 * 1000) >> 24;
 743                         break;
 744                 case 1:
 745                         /*
 746                          * QAM-16
 747                          * CNR[dB] 6 * log10((value - 370000) / (828000 - value)) + 15.7
 748                          * value [371105, 827999], 15.7 / 6 = 43900382
 749                          */
 750                         utmp1 = clamp(utmp1, 371105U, 827999U);
 751                         utmp1 = ((u64)(intlog10(utmp1 - 370000)
 752                                  - intlog10(828000 - utmp1)
 753                                  + 43900382) * 6 * 1000) >> 24;
 754                         break;
 755                 case 2:
 756                         /*
 757                          * QAM-64
 758                          * CNR[dB] 8 * log10((value - 193000) / (425000 - value)) + 23.8
 759                          * value [193246, 424999], 23.8 / 8 = 49912218
 760                          */
 761                         utmp1 = clamp(utmp1, 193246U, 424999U);
 762                         utmp1 = ((u64)(intlog10(utmp1 - 193000)
 763                                  - intlog10(425000 - utmp1)
 764                                  + 49912218) * 8 * 1000) >> 24;
 765                         break;
 766                 default:
 767                         utmp1 = 0;
 768                         break;
 769                 }
 770
 771                 dev_dbg(&client->dev, "cnr=%u\n", utmp1);
 772
 773                 c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
 774                 c->cnr.stat[0].svalue = utmp1;
 775         } else {
 776                 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 777         }
 778
 779         /* UCB/PER/BER */
 780         if (dev->fe_status & FE_HAS_LOCK) {
 781                 /* Outer FEC, 204 byte packets */
 782                 u16 abort_packet_count, rsd_packet_count;
 783                 /* Inner FEC, bits */
 784                 u32 rsd_bit_err_count;
 785
 786                 /*
 787                  * Packet count used for measurement is 10000
 788                  * (rsd_packet_count). Maybe it should be increased?
 789                  */
 790
 791                 ret = regmap_bulk_read(dev->regmap, 0x800032, buf, 7);
 792                 if (ret)
 793                         goto err;
 794
 795                 abort_packet_count = (buf[1] << 8) | (buf[0] << 0);
 796                 rsd_bit_err_count = (buf[4] << 16) | (buf[3] << 8) | buf[2];
 797                 rsd_packet_count = (buf[6] << 8) | (buf[5] << 0);
 798
 799                 dev->error_block_count += abort_packet_count;
 800                 dev->total_block_count += rsd_packet_count;
 801                 dev->post_bit_error += rsd_bit_err_count;
 802                 dev->post_bit_count += rsd_packet_count * 204 * 8;
 803
 804                 c->block_count.len = 1;
 805                 c->block_count.stat[0].scale = FE_SCALE_COUNTER;
 806                 c->block_count.stat[0].uvalue = dev->total_block_count;
 807
 808                 c->block_error.len = 1;
 809                 c->block_error.stat[0].scale = FE_SCALE_COUNTER;
 810                 c->block_error.stat[0].uvalue = dev->error_block_count;
 811
 812                 c->post_bit_count.len = 1;
 813                 c->post_bit_count.stat[0].scale = FE_SCALE_COUNTER;
 814                 c->post_bit_count.stat[0].uvalue = dev->post_bit_count;
 815
 816                 c->post_bit_error.len = 1;
 817                 c->post_bit_error.stat[0].scale = FE_SCALE_COUNTER;
 818                 c->post_bit_error.stat[0].uvalue = dev->post_bit_error;
 819         }
 820
 821         return 0;
 822 err:
 823         dev_dbg(&client->dev, "failed=%d\n", ret);
 824         return ret;
 825 }
 826
 827 static int af9033_read_snr(struct dvb_frontend *fe, u16 *snr)
 828 {
 829         struct af9033_dev *dev = fe->demodulator_priv;
 830         struct i2c_client *client = dev->client;
 831         struct dtv_frontend_properties *c = &dev->fe.dtv_property_cache;
 832         int ret;
 833         unsigned int utmp;
 834
 835         dev_dbg(&client->dev, "\n");
 836
 837         /* Use DVBv5 CNR */
 838         if (c->cnr.stat[0].scale == FE_SCALE_DECIBEL) {
 839                 /* Return 0.1 dB for AF9030 and 0-0xffff for IT9130. */
 840                 if (dev->is_af9035) {
 841                         /* 1000x => 10x (0.1 dB) */
 842                         *snr = div_s64(c->cnr.stat[0].svalue, 100);
 843                 } else {
 844                         /* 1000x => 1x (1 dB) */
 845                         *snr = div_s64(c->cnr.stat[0].svalue, 1000);
 846
 847                         /* Read current modulation */
 848                         ret = regmap_read(dev->regmap, 0x80f903, &utmp);
 849                         if (ret)
 850                                 goto err;
 851
 852                         /* scale value to 0x0000-0xffff */
 853                         switch ((utmp >> 0) & 3) {
 854                         case 0:
 855                                 *snr = *snr * 0xffff / 23;
 856                                 break;
 857                         case 1:
 858                                 *snr = *snr * 0xffff / 26;
 859                                 break;
 860                         case 2:
 861                                 *snr = *snr * 0xffff / 32;
 862                                 break;
 863                         default:
 864                                 goto err;
 865                         }
 866                 }
 867         } else {
 868                 *snr = 0;
 869         }
 870
 871         return 0;
 872 err:
 873         dev_dbg(&client->dev, "failed=%d\n", ret);
 874         return ret;
 875 }
 876
 877 static int af9033_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
 878 {
 879         struct af9033_dev *dev = fe->demodulator_priv;
 880         struct i2c_client *client = dev->client;
 881         struct dtv_frontend_properties *c = &dev->fe.dtv_property_cache;
 882         int ret, tmp, power_real;
 883         unsigned int utmp;
 884         u8 gain_offset, buf[7];
 885
 886         dev_dbg(&client->dev, "\n");
 887
 888         if (dev->is_af9035) {
 889                 /* Read signal strength of 0-100 scale */
 890                 ret = regmap_read(dev->regmap, 0x800048, &utmp);
 891                 if (ret)
 892                         goto err;
 893
 894                 /* Scale value to 0x0000-0xffff */
 895                 *strength = utmp * 0xffff / 100;
 896         } else {
 897                 ret = regmap_read(dev->regmap, 0x8000f7, &utmp);
 898                 if (ret)
 899                         goto err;
 900
 901                 ret = regmap_bulk_read(dev->regmap, 0x80f900, buf, 7);
 902                 if (ret)
 903                         goto err;
 904
 905                 if (c->frequency <= 300000000)
 906                         gain_offset = 7; /* VHF */
 907                 else
 908                         gain_offset = 4; /* UHF */
 909
 910                 power_real = (utmp - 100 - gain_offset) -
 911                         power_reference[((buf[3] >> 0) & 3)][((buf[6] >> 0) & 7)];
 912
 913                 if (power_real < -15)
 914                         tmp = 0;
 915                 else if ((power_real >= -15) && (power_real < 0))
 916                         tmp = (2 * (power_real + 15)) / 3;
 917                 else if ((power_real >= 0) && (power_real < 20))
 918                         tmp = 4 * power_real + 10;
 919                 else if ((power_real >= 20) && (power_real < 35))
 920                         tmp = (2 * (power_real - 20)) / 3 + 90;
 921                 else
 922                         tmp = 100;
 923
 924                 /* Scale value to 0x0000-0xffff */
 925                 *strength = tmp * 0xffff / 100;
 926         }
 927
 928         return 0;
 929 err:
 930         dev_dbg(&client->dev, "failed=%d\n", ret);
 931         return ret;
 932 }
 933
 934 static int af9033_read_ber(struct dvb_frontend *fe, u32 *ber)
 935 {
 936         struct af9033_dev *dev = fe->demodulator_priv;
 937
 938         *ber = (dev->post_bit_error - dev->post_bit_error_prev);
 939         dev->post_bit_error_prev = dev->post_bit_error;
 940
 941         return 0;
 942 }
 943
 944 static int af9033_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
 945 {
 946         struct af9033_dev *dev = fe->demodulator_priv;
 947
 948         *ucblocks = dev->error_block_count;
 949
 950         return 0;
 951 }
 952
 953 static int af9033_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
 954 {
 955         struct af9033_dev *dev = fe->demodulator_priv;
 956         struct i2c_client *client = dev->client;
 957         int ret;
 958
 959         dev_dbg(&client->dev, "enable=%d\n", enable);
 960
 961         ret = regmap_update_bits(dev->regmap, 0x00fa04, 0x01, enable);
 962         if (ret)
 963                 goto err;
 964
 965         return 0;
 966 err:
 967         dev_dbg(&client->dev, "failed=%d\n", ret);
 968         return ret;
 969 }
 970
 971 static int af9033_pid_filter_ctrl(struct dvb_frontend *fe, int onoff)
 972 {
 973         struct af9033_dev *dev = fe->demodulator_priv;
 974         struct i2c_client *client = dev->client;
 975         int ret;
 976
 977         dev_dbg(&client->dev, "onoff=%d\n", onoff);
 978
 979         ret = regmap_update_bits(dev->regmap, 0x80f993, 0x01, onoff);
 980         if (ret)
 981                 goto err;
 982
 983         return 0;
 984 err:
 985         dev_dbg(&client->dev, "failed=%d\n", ret);
 986         return ret;
 987 }
 988
 989 static int af9033_pid_filter(struct dvb_frontend *fe, int index, u16 pid,
 990                              int onoff)
 991 {
 992         struct af9033_dev *dev = fe->demodulator_priv;
 993         struct i2c_client *client = dev->client;
 994         int ret;
 995         u8 wbuf[2] = {(pid >> 0) & 0xff, (pid >> 8) & 0xff};
 996
 997         dev_dbg(&client->dev, "index=%d pid=%04x onoff=%d\n",
 998                 index, pid, onoff);
 999
1000         if (pid > 0x1fff)
1001                 return 0;
1002
1003         ret = regmap_bulk_write(dev->regmap, 0x80f996, wbuf, 2);
1004         if (ret)
1005                 goto err;
1006         ret = regmap_write(dev->regmap, 0x80f994, onoff);
1007         if (ret)
1008                 goto err;
1009         ret = regmap_write(dev->regmap, 0x80f995, index);
1010         if (ret)
1011                 goto err;
1012
1013         return 0;
1014 err:
1015         dev_dbg(&client->dev, "failed=%d\n", ret);
1016         return ret;
1017 }
1018
1019 static const struct dvb_frontend_ops af9033_ops = {
1020         .delsys = {SYS_DVBT},
1021         .info = {
1022                 .name = "Afatech AF9033 (DVB-T)",
1023                 .frequency_min_hz = 174 * MHz,
1024                 .frequency_max_hz = 862 * MHz,
1025                 .frequency_stepsize_hz = 250 * kHz,
1026                 .caps = FE_CAN_FEC_1_2 |
1027                         FE_CAN_FEC_2_3 |
1028                         FE_CAN_FEC_3_4 |
1029                         FE_CAN_FEC_5_6 |
1030                         FE_CAN_FEC_7_8 |
1031                         FE_CAN_FEC_AUTO |
1032                         FE_CAN_QPSK |
1033                         FE_CAN_QAM_16 |
1034                         FE_CAN_QAM_64 |
1035                         FE_CAN_QAM_AUTO |
1036                         FE_CAN_TRANSMISSION_MODE_AUTO |
1037                         FE_CAN_GUARD_INTERVAL_AUTO |
1038                         FE_CAN_HIERARCHY_AUTO |
1039                         FE_CAN_RECOVER |
1040                         FE_CAN_MUTE_TS
1041         },
1042
1043         .init = af9033_init,
1044         .sleep = af9033_sleep,
1045
1046         .get_tune_settings = af9033_get_tune_settings,
1047         .set_frontend = af9033_set_frontend,
1048         .get_frontend = af9033_get_frontend,
1049
1050         .read_status = af9033_read_status,
1051         .read_snr = af9033_read_snr,
1052         .read_signal_strength = af9033_read_signal_strength,
1053         .read_ber = af9033_read_ber,
1054         .read_ucblocks = af9033_read_ucblocks,
1055
1056         .i2c_gate_ctrl = af9033_i2c_gate_ctrl,
1057 };
1058
1059 static int af9033_probe(struct i2c_client *client,
1060                         const struct i2c_device_id *id)
1061 {
1062         struct af9033_config *cfg = client->dev.platform_data;
1063         struct af9033_dev *dev;
1064         int ret;
1065         u8 buf[8];
1066         u32 reg;
1067         static const struct regmap_config regmap_config = {
1068                 .reg_bits    =  24,
1069                 .val_bits    =  8,
1070         };
1071
1072         /* Allocate memory for the internal state */
1073         dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1074         if (!dev) {
1075                 ret = -ENOMEM;
1076                 goto err;
1077         }
1078
1079         /* Setup the state */
1080         dev->client = client;
1081         memcpy(&dev->cfg, cfg, sizeof(dev->cfg));
1082         switch (dev->cfg.ts_mode) {
1083         case AF9033_TS_MODE_PARALLEL:
1084                 dev->ts_mode_parallel = true;
1085                 break;
1086         case AF9033_TS_MODE_SERIAL:
1087                 dev->ts_mode_serial = true;
1088                 break;
1089         case AF9033_TS_MODE_USB:
1090                 /* USB mode for AF9035 */
1091         default:
1092                 break;
1093         }
1094
1095         if (dev->cfg.clock != 12000000) {
1096                 ret = -ENODEV;
1097                 dev_err(&client->dev,
1098                         "Unsupported clock %u Hz. Only 12000000 Hz is supported currently\n",
1099                         dev->cfg.clock);
1100                 goto err_kfree;
1101         }
1102
1103         /* Create regmap */
1104         dev->regmap = regmap_init_i2c(client, &regmap_config);
1105         if (IS_ERR(dev->regmap)) {
1106                 ret = PTR_ERR(dev->regmap);
1107                 goto err_kfree;
1108         }
1109
1110         /* Firmware version */
1111         switch (dev->cfg.tuner) {
1112         case AF9033_TUNER_IT9135_38:
1113         case AF9033_TUNER_IT9135_51:
1114         case AF9033_TUNER_IT9135_52:
1115         case AF9033_TUNER_IT9135_60:
1116         case AF9033_TUNER_IT9135_61:
1117         case AF9033_TUNER_IT9135_62:
1118                 dev->is_it9135 = true;
1119                 reg = 0x004bfc;
1120                 break;
1121         default:
1122                 dev->is_af9035 = true;
1123                 reg = 0x0083e9;
1124                 break;
1125         }
1126
1127         ret = regmap_bulk_read(dev->regmap, reg, &buf[0], 4);
1128         if (ret)
1129                 goto err_regmap_exit;
1130         ret = regmap_bulk_read(dev->regmap, 0x804191, &buf[4], 4);
1131         if (ret)
1132                 goto err_regmap_exit;
1133
1134         dev_info(&client->dev,
1135                  "firmware version: LINK %d.%d.%d.%d - OFDM %d.%d.%d.%d\n",
1136                  buf[0], buf[1], buf[2], buf[3],
1137                  buf[4], buf[5], buf[6], buf[7]);
1138
1139         /* Sleep as chip seems to be partly active by default */
1140         /* IT9135 did not like to sleep at that early */
1141         if (dev->is_af9035) {
1142                 ret = regmap_write(dev->regmap, 0x80004c, 0x01);
1143                 if (ret)
1144                         goto err_regmap_exit;
1145                 ret = regmap_write(dev->regmap, 0x800000, 0x00);
1146                 if (ret)
1147                         goto err_regmap_exit;
1148         }
1149
1150         /* Create dvb frontend */
1151         memcpy(&dev->fe.ops, &af9033_ops, sizeof(dev->fe.ops));
1152         dev->fe.demodulator_priv = dev;
1153         *cfg->fe = &dev->fe;
1154         if (cfg->ops) {
1155                 cfg->ops->pid_filter = af9033_pid_filter;
1156                 cfg->ops->pid_filter_ctrl = af9033_pid_filter_ctrl;
1157         }
1158         cfg->regmap = dev->regmap;
1159         i2c_set_clientdata(client, dev);
1160
1161         dev_info(&client->dev, "Afatech AF9033 successfully attached\n");
1162
1163         return 0;
1164 err_regmap_exit:
1165         regmap_exit(dev->regmap);
1166 err_kfree:
1167         kfree(dev);
1168 err:
1169         dev_dbg(&client->dev, "failed=%d\n", ret);
1170         return ret;
1171 }
1172
1173 static int af9033_remove(struct i2c_client *client)
1174 {
1175         struct af9033_dev *dev = i2c_get_clientdata(client);
1176
1177         dev_dbg(&client->dev, "\n");
1178
1179         regmap_exit(dev->regmap);
1180         kfree(dev);
1181
1182         return 0;
1183 }
1184
1185 static const struct i2c_device_id af9033_id_table[] = {
1186         {"af9033", 0},
1187         {}
1188 };
1189 MODULE_DEVICE_TABLE(i2c, af9033_id_table);
1190
1191 static struct i2c_driver af9033_driver = {
1192         .driver = {
1193                 .name   = "af9033",
1194                 .suppress_bind_attrs    = true,
1195         },
1196         .probe          = af9033_probe,
1197         .remove         = af9033_remove,
1198         .id_table       = af9033_id_table,
1199 };
1200
1201 module_i2c_driver(af9033_driver);
1202
1203 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
1204 MODULE_DESCRIPTION("Afatech AF9033 DVB-T demodulator driver");
1205 MODULE_LICENSE("GPL");