drivers/kvm/vmx.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * This module enables machines with Intel VT-x extensions to run virtual
   5  * machines without emulation or binary translation.
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  *
   9  * Authors:
  10  *   Avi Kivity   <avi@qumranet.com>
  11  *   Yaniv Kamay  <yaniv@qumranet.com>
  12  *
  13  * This work is licensed under the terms of the GNU GPL, version 2.  See
  14  * the COPYING file in the top-level directory.
  15  *
  16  */
  17
  18 #include "kvm.h"
  19 #include "vmx.h"
  20 #include "kvm_vmx.h"
  21 #include <linux/module.h>
  22 #include <linux/mm.h>
  23 #include <linux/highmem.h>
  24 #include <asm/io.h>
  25 #include <asm/desc.h>
  26
  27 #include "segment_descriptor.h"
  28
  29 #define MSR_IA32_FEATURE_CONTROL                0x03a
  30
  31 MODULE_AUTHOR("Qumranet");
  32 MODULE_LICENSE("GPL");
  33
  34 static DEFINE_PER_CPU(struct vmcs *, vmxarea);
  35 static DEFINE_PER_CPU(struct vmcs *, current_vmcs);
  36
  37 #ifdef CONFIG_X86_64
  38 #define HOST_IS_64 1
  39 #else
  40 #define HOST_IS_64 0
  41 #endif
  42
  43 static struct vmcs_descriptor {
  44         int size;
  45         int order;
  46         u32 revision_id;
  47 } vmcs_descriptor;
  48
  49 #define VMX_SEGMENT_FIELD(seg)                                  \
  50         [VCPU_SREG_##seg] = {                                   \
  51                 .selector = GUEST_##seg##_SELECTOR,             \
  52                 .base = GUEST_##seg##_BASE,                     \
  53                 .limit = GUEST_##seg##_LIMIT,                   \
  54                 .ar_bytes = GUEST_##seg##_AR_BYTES,             \
  55         }
  56
  57 static struct kvm_vmx_segment_field {
  58         unsigned selector;
  59         unsigned base;
  60         unsigned limit;
  61         unsigned ar_bytes;
  62 } kvm_vmx_segment_fields[] = {
  63         VMX_SEGMENT_FIELD(CS),
  64         VMX_SEGMENT_FIELD(DS),
  65         VMX_SEGMENT_FIELD(ES),
  66         VMX_SEGMENT_FIELD(FS),
  67         VMX_SEGMENT_FIELD(GS),
  68         VMX_SEGMENT_FIELD(SS),
  69         VMX_SEGMENT_FIELD(TR),
  70         VMX_SEGMENT_FIELD(LDTR),
  71 };
  72
  73 static const u32 vmx_msr_index[] = {
  74 #ifdef CONFIG_X86_64
  75         MSR_SYSCALL_MASK, MSR_LSTAR, MSR_CSTAR, MSR_KERNEL_GS_BASE,
  76 #endif
  77         MSR_EFER, MSR_K6_STAR,
  78 };
  79 #define NR_VMX_MSR (sizeof(vmx_msr_index) / sizeof(*vmx_msr_index))
  80
  81 static inline int is_page_fault(u32 intr_info)
  82 {
  83         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
  84                              INTR_INFO_VALID_MASK)) ==
  85                 (INTR_TYPE_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK);
  86 }
  87
  88 static inline int is_external_interrupt(u32 intr_info)
  89 {
  90         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
  91                 == (INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
  92 }
  93
  94 static struct vmx_msr_entry *find_msr_entry(struct kvm_vcpu *vcpu, u32 msr)
  95 {
  96         int i;
  97
  98         for (i = 0; i < vcpu->nmsrs; ++i)
  99                 if (vcpu->guest_msrs[i].index == msr)
 100                         return &vcpu->guest_msrs[i];
 101         return 0;
 102 }
 103
 104 static void vmcs_clear(struct vmcs *vmcs)
 105 {
 106         u64 phys_addr = __pa(vmcs);
 107         u8 error;
 108
 109         asm volatile (ASM_VMX_VMCLEAR_RAX "; setna %0"
 110                       : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
 111                       : "cc", "memory");
 112         if (error)
 113                 printk(KERN_ERR "kvm: vmclear fail: %p/%llx\n",
 114                        vmcs, phys_addr);
 115 }
 116
 117 static void __vcpu_clear(void *arg)
 118 {
 119         struct kvm_vcpu *vcpu = arg;
 120         int cpu = smp_processor_id();
 121
 122         if (vcpu->cpu == cpu)
 123                 vmcs_clear(vcpu->vmcs);
 124         if (per_cpu(current_vmcs, cpu) == vcpu->vmcs)
 125                 per_cpu(current_vmcs, cpu) = NULL;
 126 }
 127
 128 static unsigned long vmcs_readl(unsigned long field)
 129 {
 130         unsigned long value;
 131
 132         asm volatile (ASM_VMX_VMREAD_RDX_RAX
 133                       : "=a"(value) : "d"(field) : "cc");
 134         return value;
 135 }
 136
 137 static u16 vmcs_read16(unsigned long field)
 138 {
 139         return vmcs_readl(field);
 140 }
 141
 142 static u32 vmcs_read32(unsigned long field)
 143 {
 144         return vmcs_readl(field);
 145 }
 146
 147 static u64 vmcs_read64(unsigned long field)
 148 {
 149 #ifdef CONFIG_X86_64
 150         return vmcs_readl(field);
 151 #else
 152         return vmcs_readl(field) | ((u64)vmcs_readl(field+1) << 32);
 153 #endif
 154 }
 155
 156 static void vmcs_writel(unsigned long field, unsigned long value)
 157 {
 158         u8 error;
 159
 160         asm volatile (ASM_VMX_VMWRITE_RAX_RDX "; setna %0"
 161                        : "=q"(error) : "a"(value), "d"(field) : "cc" );
 162         if (error)
 163                 printk(KERN_ERR "vmwrite error: reg %lx value %lx (err %d)\n",
 164                        field, value, vmcs_read32(VM_INSTRUCTION_ERROR));
 165 }
 166
 167 static void vmcs_write16(unsigned long field, u16 value)
 168 {
 169         vmcs_writel(field, value);
 170 }
 171
 172 static void vmcs_write32(unsigned long field, u32 value)
 173 {
 174         vmcs_writel(field, value);
 175 }
 176
 177 static void vmcs_write64(unsigned long field, u64 value)
 178 {
 179 #ifdef CONFIG_X86_64
 180         vmcs_writel(field, value);
 181 #else
 182         vmcs_writel(field, value);
 183         asm volatile ("");
 184         vmcs_writel(field+1, value >> 32);
 185 #endif
 186 }
 187
 188 /*
 189  * Switches to specified vcpu, until a matching vcpu_put(), but assumes
 190  * vcpu mutex is already taken.
 191  */
 192 static struct kvm_vcpu *vmx_vcpu_load(struct kvm_vcpu *vcpu)
 193 {
 194         u64 phys_addr = __pa(vcpu->vmcs);
 195         int cpu;
 196
 197         cpu = get_cpu();
 198
 199         if (vcpu->cpu != cpu) {
 200                 smp_call_function(__vcpu_clear, vcpu, 0, 1);
 201                 vcpu->launched = 0;
 202         }
 203
 204         if (per_cpu(current_vmcs, cpu) != vcpu->vmcs) {
 205                 u8 error;
 206
 207                 per_cpu(current_vmcs, cpu) = vcpu->vmcs;
 208                 asm volatile (ASM_VMX_VMPTRLD_RAX "; setna %0"
 209                               : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
 210                               : "cc");
 211                 if (error)
 212                         printk(KERN_ERR "kvm: vmptrld %p/%llx fail\n",
 213                                vcpu->vmcs, phys_addr);
 214         }
 215
 216         if (vcpu->cpu != cpu) {
 217                 struct descriptor_table dt;
 218                 unsigned long sysenter_esp;
 219
 220                 vcpu->cpu = cpu;
 221                 /*
 222                  * Linux uses per-cpu TSS and GDT, so set these when switching
 223                  * processors.
 224                  */
 225                 vmcs_writel(HOST_TR_BASE, read_tr_base()); /* 22.2.4 */
 226                 get_gdt(&dt);
 227                 vmcs_writel(HOST_GDTR_BASE, dt.base);   /* 22.2.4 */
 228
 229                 rdmsrl(MSR_IA32_SYSENTER_ESP, sysenter_esp);
 230                 vmcs_writel(HOST_IA32_SYSENTER_ESP, sysenter_esp); /* 22.2.3 */
 231         }
 232         return vcpu;
 233 }
 234
 235 static void vmx_vcpu_put(struct kvm_vcpu *vcpu)
 236 {
 237         put_cpu();
 238 }
 239
 240 static unsigned long vmx_get_rflags(struct kvm_vcpu *vcpu)
 241 {
 242         return vmcs_readl(GUEST_RFLAGS);
 243 }
 244
 245 static void vmx_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
 246 {
 247         vmcs_writel(GUEST_RFLAGS, rflags);
 248 }
 249
 250 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
 251 {
 252         unsigned long rip;
 253         u32 interruptibility;
 254
 255         rip = vmcs_readl(GUEST_RIP);
 256         rip += vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
 257         vmcs_writel(GUEST_RIP, rip);
 258
 259         /*
 260          * We emulated an instruction, so temporary interrupt blocking
 261          * should be removed, if set.
 262          */
 263         interruptibility = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
 264         if (interruptibility & 3)
 265                 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO,
 266                              interruptibility & ~3);
 267 }
 268
 269 static void vmx_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
 270 {
 271         printk(KERN_DEBUG "inject_general_protection: rip 0x%lx\n",
 272                vmcs_readl(GUEST_RIP));
 273         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
 274         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
 275                      GP_VECTOR |
 276                      INTR_TYPE_EXCEPTION |
 277                      INTR_INFO_DELIEVER_CODE_MASK |
 278                      INTR_INFO_VALID_MASK);
 279 }
 280
 281 /*
 282  * reads and returns guest's timestamp counter "register"
 283  * guest_tsc = host_tsc + tsc_offset    -- 21.3
 284  */
 285 static u64 guest_read_tsc(void)
 286 {
 287         u64 host_tsc, tsc_offset;
 288
 289         rdtscll(host_tsc);
 290         tsc_offset = vmcs_read64(TSC_OFFSET);
 291         return host_tsc + tsc_offset;
 292 }
 293
 294 /*
 295  * writes 'guest_tsc' into guest's timestamp counter "register"
 296  * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
 297  */
 298 static void guest_write_tsc(u64 guest_tsc)
 299 {
 300         u64 host_tsc;
 301
 302         rdtscll(host_tsc);
 303         vmcs_write64(TSC_OFFSET, guest_tsc - host_tsc);
 304 }
 305
 306 static void reload_tss(void)
 307 {
 308 #ifndef CONFIG_X86_64
 309
 310         /*
 311          * VT restores TR but not its size.  Useless.
 312          */
 313         struct descriptor_table gdt;
 314         struct segment_descriptor *descs;
 315
 316         get_gdt(&gdt);
 317         descs = (void *)gdt.base;
 318         descs[GDT_ENTRY_TSS].type = 9; /* available TSS */
 319         load_TR_desc();
 320 #endif
 321 }
 322
 323 /*
 324  * Reads an msr value (of 'msr_index') into 'pdata'.
 325  * Returns 0 on success, non-0 otherwise.
 326  * Assumes vcpu_load() was already called.
 327  */
 328 static int vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
 329 {
 330         u64 data;
 331         struct vmx_msr_entry *msr;
 332
 333         if (!pdata) {
 334                 printk(KERN_ERR "BUG: get_msr called with NULL pdata\n");
 335                 return -EINVAL;
 336         }
 337
 338         switch (msr_index) {
 339 #ifdef CONFIG_X86_64
 340         case MSR_FS_BASE:
 341                 data = vmcs_readl(GUEST_FS_BASE);
 342                 break;
 343         case MSR_GS_BASE:
 344                 data = vmcs_readl(GUEST_GS_BASE);
 345                 break;
 346         case MSR_EFER:
 347                 data = vcpu->shadow_efer;
 348                 break;
 349 #endif
 350         case MSR_IA32_TIME_STAMP_COUNTER:
 351                 data = guest_read_tsc();
 352                 break;
 353         case MSR_IA32_SYSENTER_CS:
 354                 data = vmcs_read32(GUEST_SYSENTER_CS);
 355                 break;
 356         case MSR_IA32_SYSENTER_EIP:
 357                 data = vmcs_read32(GUEST_SYSENTER_EIP);
 358                 break;
 359         case MSR_IA32_SYSENTER_ESP:
 360                 data = vmcs_read32(GUEST_SYSENTER_ESP);
 361                 break;
 362         case MSR_IA32_MC0_CTL:
 363         case MSR_IA32_MCG_STATUS:
 364         case MSR_IA32_MCG_CAP:
 365         case MSR_IA32_MC0_MISC:
 366         case MSR_IA32_MC0_MISC+4:
 367         case MSR_IA32_MC0_MISC+8:
 368         case MSR_IA32_MC0_MISC+12:
 369         case MSR_IA32_MC0_MISC+16:
 370         case MSR_IA32_UCODE_REV:
 371                 /* MTRR registers */
 372         case 0xfe:
 373         case 0x200 ... 0x2ff:
 374                 data = 0;
 375                 break;
 376         case MSR_IA32_APICBASE:
 377                 data = vcpu->apic_base;
 378                 break;
 379         default:
 380                 msr = find_msr_entry(vcpu, msr_index);
 381                 if (!msr) {
 382                         printk(KERN_ERR "kvm: unhandled rdmsr: %x\n", msr_index);
 383                         return 1;
 384                 }
 385                 data = msr->data;
 386                 break;
 387         }
 388
 389         *pdata = data;
 390         return 0;
 391 }
 392
 393 /*
 394  * Writes msr value into into the appropriate "register".
 395  * Returns 0 on success, non-0 otherwise.
 396  * Assumes vcpu_load() was already called.
 397  */
 398 static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 399 {
 400         struct vmx_msr_entry *msr;
 401         switch (msr_index) {
 402 #ifdef CONFIG_X86_64
 403         case MSR_FS_BASE:
 404                 vmcs_writel(GUEST_FS_BASE, data);
 405                 break;
 406         case MSR_GS_BASE:
 407                 vmcs_writel(GUEST_GS_BASE, data);
 408                 break;
 409 #endif
 410         case MSR_IA32_SYSENTER_CS:
 411                 vmcs_write32(GUEST_SYSENTER_CS, data);
 412                 break;
 413         case MSR_IA32_SYSENTER_EIP:
 414                 vmcs_write32(GUEST_SYSENTER_EIP, data);
 415                 break;
 416         case MSR_IA32_SYSENTER_ESP:
 417                 vmcs_write32(GUEST_SYSENTER_ESP, data);
 418                 break;
 419 #ifdef __x86_64
 420         case MSR_EFER:
 421                 set_efer(vcpu, data);
 422                 break;
 423         case MSR_IA32_MC0_STATUS:
 424                 printk(KERN_WARNING "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n"
 425                             , __FUNCTION__, data);
 426                 break;
 427 #endif
 428         case MSR_IA32_TIME_STAMP_COUNTER: {
 429                 guest_write_tsc(data);
 430                 break;
 431         }
 432         case MSR_IA32_UCODE_REV:
 433         case MSR_IA32_UCODE_WRITE:
 434         case 0x200 ... 0x2ff: /* MTRRs */
 435                 break;
 436         case MSR_IA32_APICBASE:
 437                 vcpu->apic_base = data;
 438                 break;
 439         default:
 440                 msr = find_msr_entry(vcpu, msr_index);
 441                 if (!msr) {
 442                         printk(KERN_ERR "kvm: unhandled wrmsr: 0x%x\n", msr_index);
 443                         return 1;
 444                 }
 445                 msr->data = data;
 446                 break;
 447         }
 448
 449         return 0;
 450 }
 451
 452 /*
 453  * Sync the rsp and rip registers into the vcpu structure.  This allows
 454  * registers to be accessed by indexing vcpu->regs.
 455  */
 456 static void vcpu_load_rsp_rip(struct kvm_vcpu *vcpu)
 457 {
 458         vcpu->regs[VCPU_REGS_RSP] = vmcs_readl(GUEST_RSP);
 459         vcpu->rip = vmcs_readl(GUEST_RIP);
 460 }
 461
 462 /*
 463  * Syncs rsp and rip back into the vmcs.  Should be called after possible
 464  * modification.
 465  */
 466 static void vcpu_put_rsp_rip(struct kvm_vcpu *vcpu)
 467 {
 468         vmcs_writel(GUEST_RSP, vcpu->regs[VCPU_REGS_RSP]);
 469         vmcs_writel(GUEST_RIP, vcpu->rip);
 470 }
 471
 472 static int set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
 473 {
 474         unsigned long dr7 = 0x400;
 475         u32 exception_bitmap;
 476         int old_singlestep;
 477
 478         exception_bitmap = vmcs_read32(EXCEPTION_BITMAP);
 479         old_singlestep = vcpu->guest_debug.singlestep;
 480
 481         vcpu->guest_debug.enabled = dbg->enabled;
 482         if (vcpu->guest_debug.enabled) {
 483                 int i;
 484
 485                 dr7 |= 0x200;  /* exact */
 486                 for (i = 0; i < 4; ++i) {
 487                         if (!dbg->breakpoints[i].enabled)
 488                                 continue;
 489                         vcpu->guest_debug.bp[i] = dbg->breakpoints[i].address;
 490                         dr7 |= 2 << (i*2);    /* global enable */
 491                         dr7 |= 0 << (i*4+16); /* execution breakpoint */
 492                 }
 493
 494                 exception_bitmap |= (1u << 1);  /* Trap debug exceptions */
 495
 496                 vcpu->guest_debug.singlestep = dbg->singlestep;
 497         } else {
 498                 exception_bitmap &= ~(1u << 1); /* Ignore debug exceptions */
 499                 vcpu->guest_debug.singlestep = 0;
 500         }
 501
 502         if (old_singlestep && !vcpu->guest_debug.singlestep) {
 503                 unsigned long flags;
 504
 505                 flags = vmcs_readl(GUEST_RFLAGS);
 506                 flags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
 507                 vmcs_writel(GUEST_RFLAGS, flags);
 508         }
 509
 510         vmcs_write32(EXCEPTION_BITMAP, exception_bitmap);
 511         vmcs_writel(GUEST_DR7, dr7);
 512
 513         return 0;
 514 }
 515
 516 static __init int cpu_has_kvm_support(void)
 517 {
 518         unsigned long ecx = cpuid_ecx(1);
 519         return test_bit(5, &ecx); /* CPUID.1:ECX.VMX[bit 5] -> VT */
 520 }
 521
 522 static __init int vmx_disabled_by_bios(void)
 523 {
 524         u64 msr;
 525
 526         rdmsrl(MSR_IA32_FEATURE_CONTROL, msr);
 527         return (msr & 5) == 1; /* locked but not enabled */
 528 }
 529
 530 static __init void hardware_enable(void *garbage)
 531 {
 532         int cpu = raw_smp_processor_id();
 533         u64 phys_addr = __pa(per_cpu(vmxarea, cpu));
 534         u64 old;
 535
 536         rdmsrl(MSR_IA32_FEATURE_CONTROL, old);
 537         if ((old & 5) != 5)
 538                 /* enable and lock */
 539                 wrmsrl(MSR_IA32_FEATURE_CONTROL, old | 5);
 540         write_cr4(read_cr4() | CR4_VMXE); /* FIXME: not cpu hotplug safe */
 541         asm volatile (ASM_VMX_VMXON_RAX : : "a"(&phys_addr), "m"(phys_addr)
 542                       : "memory", "cc");
 543 }
 544
 545 static void hardware_disable(void *garbage)
 546 {
 547         asm volatile (ASM_VMX_VMXOFF : : : "cc");
 548 }
 549
 550 static __init void setup_vmcs_descriptor(void)
 551 {
 552         u32 vmx_msr_low, vmx_msr_high;
 553
 554         rdmsr(MSR_IA32_VMX_BASIC_MSR, vmx_msr_low, vmx_msr_high);
 555         vmcs_descriptor.size = vmx_msr_high & 0x1fff;
 556         vmcs_descriptor.order = get_order(vmcs_descriptor.size);
 557         vmcs_descriptor.revision_id = vmx_msr_low;
 558 };
 559
 560 static struct vmcs *alloc_vmcs_cpu(int cpu)
 561 {
 562         int node = cpu_to_node(cpu);
 563         struct page *pages;
 564         struct vmcs *vmcs;
 565
 566         pages = alloc_pages_node(node, GFP_KERNEL, vmcs_descriptor.order);
 567         if (!pages)
 568                 return NULL;
 569         vmcs = page_address(pages);
 570         memset(vmcs, 0, vmcs_descriptor.size);
 571         vmcs->revision_id = vmcs_descriptor.revision_id; /* vmcs revision id */
 572         return vmcs;
 573 }
 574
 575 static struct vmcs *alloc_vmcs(void)
 576 {
 577         return alloc_vmcs_cpu(smp_processor_id());
 578 }
 579
 580 static void free_vmcs(struct vmcs *vmcs)
 581 {
 582         free_pages((unsigned long)vmcs, vmcs_descriptor.order);
 583 }
 584
 585 static __exit void free_kvm_area(void)
 586 {
 587         int cpu;
 588
 589         for_each_online_cpu(cpu)
 590                 free_vmcs(per_cpu(vmxarea, cpu));
 591 }
 592
 593 extern struct vmcs *alloc_vmcs_cpu(int cpu);
 594
 595 static __init int alloc_kvm_area(void)
 596 {
 597         int cpu;
 598
 599         for_each_online_cpu(cpu) {
 600                 struct vmcs *vmcs;
 601
 602                 vmcs = alloc_vmcs_cpu(cpu);
 603                 if (!vmcs) {
 604                         free_kvm_area();
 605                         return -ENOMEM;
 606                 }
 607
 608                 per_cpu(vmxarea, cpu) = vmcs;
 609         }
 610         return 0;
 611 }
 612
 613 static __init int hardware_setup(void)
 614 {
 615         setup_vmcs_descriptor();
 616         return alloc_kvm_area();
 617 }
 618
 619 static __exit void hardware_unsetup(void)
 620 {
 621         free_kvm_area();
 622 }
 623
 624 static void update_exception_bitmap(struct kvm_vcpu *vcpu)
 625 {
 626         if (vcpu->rmode.active)
 627                 vmcs_write32(EXCEPTION_BITMAP, ~0);
 628         else
 629                 vmcs_write32(EXCEPTION_BITMAP, 1 << PF_VECTOR);
 630 }
 631
 632 static void fix_pmode_dataseg(int seg, struct kvm_save_segment *save)
 633 {
 634         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 635
 636         if (vmcs_readl(sf->base) == save->base) {
 637                 vmcs_write16(sf->selector, save->selector);
 638                 vmcs_writel(sf->base, save->base);
 639                 vmcs_write32(sf->limit, save->limit);
 640                 vmcs_write32(sf->ar_bytes, save->ar);
 641         } else {
 642                 u32 dpl = (vmcs_read16(sf->selector) & SELECTOR_RPL_MASK)
 643                         << AR_DPL_SHIFT;
 644                 vmcs_write32(sf->ar_bytes, 0x93 | dpl);
 645         }
 646 }
 647
 648 static void enter_pmode(struct kvm_vcpu *vcpu)
 649 {
 650         unsigned long flags;
 651
 652         vcpu->rmode.active = 0;
 653
 654         vmcs_writel(GUEST_TR_BASE, vcpu->rmode.tr.base);
 655         vmcs_write32(GUEST_TR_LIMIT, vcpu->rmode.tr.limit);
 656         vmcs_write32(GUEST_TR_AR_BYTES, vcpu->rmode.tr.ar);
 657
 658         flags = vmcs_readl(GUEST_RFLAGS);
 659         flags &= ~(IOPL_MASK | X86_EFLAGS_VM);
 660         flags |= (vcpu->rmode.save_iopl << IOPL_SHIFT);
 661         vmcs_writel(GUEST_RFLAGS, flags);
 662
 663         vmcs_writel(GUEST_CR4, (vmcs_readl(GUEST_CR4) & ~CR4_VME_MASK) |
 664                         (vmcs_readl(CR4_READ_SHADOW) & CR4_VME_MASK));
 665
 666         update_exception_bitmap(vcpu);
 667
 668         fix_pmode_dataseg(VCPU_SREG_ES, &vcpu->rmode.es);
 669         fix_pmode_dataseg(VCPU_SREG_DS, &vcpu->rmode.ds);
 670         fix_pmode_dataseg(VCPU_SREG_GS, &vcpu->rmode.gs);
 671         fix_pmode_dataseg(VCPU_SREG_FS, &vcpu->rmode.fs);
 672
 673         vmcs_write16(GUEST_SS_SELECTOR, 0);
 674         vmcs_write32(GUEST_SS_AR_BYTES, 0x93);
 675
 676         vmcs_write16(GUEST_CS_SELECTOR,
 677                      vmcs_read16(GUEST_CS_SELECTOR) & ~SELECTOR_RPL_MASK);
 678         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
 679 }
 680
 681 static int rmode_tss_base(struct kvm* kvm)
 682 {
 683         gfn_t base_gfn = kvm->memslots[0].base_gfn + kvm->memslots[0].npages - 3;
 684         return base_gfn << PAGE_SHIFT;
 685 }
 686
 687 static void fix_rmode_seg(int seg, struct kvm_save_segment *save)
 688 {
 689         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 690
 691         save->selector = vmcs_read16(sf->selector);
 692         save->base = vmcs_readl(sf->base);
 693         save->limit = vmcs_read32(sf->limit);
 694         save->ar = vmcs_read32(sf->ar_bytes);
 695         vmcs_write16(sf->selector, vmcs_readl(sf->base) >> 4);
 696         vmcs_write32(sf->limit, 0xffff);
 697         vmcs_write32(sf->ar_bytes, 0xf3);
 698 }
 699
 700 static void enter_rmode(struct kvm_vcpu *vcpu)
 701 {
 702         unsigned long flags;
 703
 704         vcpu->rmode.active = 1;
 705
 706         vcpu->rmode.tr.base = vmcs_readl(GUEST_TR_BASE);
 707         vmcs_writel(GUEST_TR_BASE, rmode_tss_base(vcpu->kvm));
 708
 709         vcpu->rmode.tr.limit = vmcs_read32(GUEST_TR_LIMIT);
 710         vmcs_write32(GUEST_TR_LIMIT, RMODE_TSS_SIZE - 1);
 711
 712         vcpu->rmode.tr.ar = vmcs_read32(GUEST_TR_AR_BYTES);
 713         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
 714
 715         flags = vmcs_readl(GUEST_RFLAGS);
 716         vcpu->rmode.save_iopl = (flags & IOPL_MASK) >> IOPL_SHIFT;
 717
 718         flags |= IOPL_MASK | X86_EFLAGS_VM;
 719
 720         vmcs_writel(GUEST_RFLAGS, flags);
 721         vmcs_writel(GUEST_CR4, vmcs_readl(GUEST_CR4) | CR4_VME_MASK);
 722         update_exception_bitmap(vcpu);
 723
 724         vmcs_write16(GUEST_SS_SELECTOR, vmcs_readl(GUEST_SS_BASE) >> 4);
 725         vmcs_write32(GUEST_SS_LIMIT, 0xffff);
 726         vmcs_write32(GUEST_SS_AR_BYTES, 0xf3);
 727
 728         vmcs_write32(GUEST_CS_AR_BYTES, 0xf3);
 729         vmcs_write16(GUEST_CS_SELECTOR, vmcs_readl(GUEST_CS_BASE) >> 4);
 730
 731         fix_rmode_seg(VCPU_SREG_ES, &vcpu->rmode.es);
 732         fix_rmode_seg(VCPU_SREG_DS, &vcpu->rmode.ds);
 733         fix_rmode_seg(VCPU_SREG_GS, &vcpu->rmode.gs);
 734         fix_rmode_seg(VCPU_SREG_FS, &vcpu->rmode.fs);
 735 }
 736
 737 #ifdef CONFIG_X86_64
 738
 739 static void enter_lmode(struct kvm_vcpu *vcpu)
 740 {
 741         u32 guest_tr_ar;
 742
 743         guest_tr_ar = vmcs_read32(GUEST_TR_AR_BYTES);
 744         if ((guest_tr_ar & AR_TYPE_MASK) != AR_TYPE_BUSY_64_TSS) {
 745                 printk(KERN_DEBUG "%s: tss fixup for long mode. \n",
 746                        __FUNCTION__);
 747                 vmcs_write32(GUEST_TR_AR_BYTES,
 748                              (guest_tr_ar & ~AR_TYPE_MASK)
 749                              | AR_TYPE_BUSY_64_TSS);
 750         }
 751
 752         vcpu->shadow_efer |= EFER_LMA;
 753
 754         find_msr_entry(vcpu, MSR_EFER)->data |= EFER_LMA | EFER_LME;
 755         vmcs_write32(VM_ENTRY_CONTROLS,
 756                      vmcs_read32(VM_ENTRY_CONTROLS)
 757                      | VM_ENTRY_CONTROLS_IA32E_MASK);
 758 }
 759
 760 static void exit_lmode(struct kvm_vcpu *vcpu)
 761 {
 762         vcpu->shadow_efer &= ~EFER_LMA;
 763
 764         vmcs_write32(VM_ENTRY_CONTROLS,
 765                      vmcs_read32(VM_ENTRY_CONTROLS)
 766                      & ~VM_ENTRY_CONTROLS_IA32E_MASK);
 767 }
 768
 769 #endif
 770
 771 static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 772 {
 773         if (vcpu->rmode.active && (cr0 & CR0_PE_MASK))
 774                 enter_pmode(vcpu);
 775
 776         if (!vcpu->rmode.active && !(cr0 & CR0_PE_MASK))
 777                 enter_rmode(vcpu);
 778
 779 #ifdef CONFIG_X86_64
 780         if (vcpu->shadow_efer & EFER_LME) {
 781                 if (!is_paging(vcpu) && (cr0 & CR0_PG_MASK))
 782                         enter_lmode(vcpu);
 783                 if (is_paging(vcpu) && !(cr0 & CR0_PG_MASK))
 784                         exit_lmode(vcpu);
 785         }
 786 #endif
 787
 788         vmcs_writel(CR0_READ_SHADOW, cr0);
 789         vmcs_writel(GUEST_CR0,
 790                     (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON);
 791         vcpu->cr0 = cr0;
 792 }
 793
 794 /*
 795  * Used when restoring the VM to avoid corrupting segment registers
 796  */
 797 static void vmx_set_cr0_no_modeswitch(struct kvm_vcpu *vcpu, unsigned long cr0)
 798 {
 799         vcpu->rmode.active = ((cr0 & CR0_PE_MASK) == 0);
 800         update_exception_bitmap(vcpu);
 801         vmcs_writel(CR0_READ_SHADOW, cr0);
 802         vmcs_writel(GUEST_CR0,
 803                     (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON);
 804         vcpu->cr0 = cr0;
 805 }
 806
 807 static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 808 {
 809         vmcs_writel(GUEST_CR3, cr3);
 810 }
 811
 812 static void vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 813 {
 814         vmcs_writel(CR4_READ_SHADOW, cr4);
 815         vmcs_writel(GUEST_CR4, cr4 | (vcpu->rmode.active ?
 816                     KVM_RMODE_VM_CR4_ALWAYS_ON : KVM_PMODE_VM_CR4_ALWAYS_ON));
 817         vcpu->cr4 = cr4;
 818 }
 819
 820 #ifdef CONFIG_X86_64
 821
 822 static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer)
 823 {
 824         struct vmx_msr_entry *msr = find_msr_entry(vcpu, MSR_EFER);
 825
 826         vcpu->shadow_efer = efer;
 827         if (efer & EFER_LMA) {
 828                 vmcs_write32(VM_ENTRY_CONTROLS,
 829                                      vmcs_read32(VM_ENTRY_CONTROLS) |
 830                                      VM_ENTRY_CONTROLS_IA32E_MASK);
 831                 msr->data = efer;
 832
 833         } else {
 834                 vmcs_write32(VM_ENTRY_CONTROLS,
 835                                      vmcs_read32(VM_ENTRY_CONTROLS) &
 836                                      ~VM_ENTRY_CONTROLS_IA32E_MASK);
 837
 838                 msr->data = efer & ~EFER_LME;
 839         }
 840 }
 841
 842 #endif
 843
 844 static u64 vmx_get_segment_base(struct kvm_vcpu *vcpu, int seg)
 845 {
 846         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 847
 848         return vmcs_readl(sf->base);
 849 }
 850
 851 static void vmx_get_segment(struct kvm_vcpu *vcpu,
 852                             struct kvm_segment *var, int seg)
 853 {
 854         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 855         u32 ar;
 856
 857         var->base = vmcs_readl(sf->base);
 858         var->limit = vmcs_read32(sf->limit);
 859         var->selector = vmcs_read16(sf->selector);
 860         ar = vmcs_read32(sf->ar_bytes);
 861         if (ar & AR_UNUSABLE_MASK)
 862                 ar = 0;
 863         var->type = ar & 15;
 864         var->s = (ar >> 4) & 1;
 865         var->dpl = (ar >> 5) & 3;
 866         var->present = (ar >> 7) & 1;
 867         var->avl = (ar >> 12) & 1;
 868         var->l = (ar >> 13) & 1;
 869         var->db = (ar >> 14) & 1;
 870         var->g = (ar >> 15) & 1;
 871         var->unusable = (ar >> 16) & 1;
 872 }
 873
 874 static void vmx_set_segment(struct kvm_vcpu *vcpu,
 875                             struct kvm_segment *var, int seg)
 876 {
 877         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 878         u32 ar;
 879
 880         vmcs_writel(sf->base, var->base);
 881         vmcs_write32(sf->limit, var->limit);
 882         vmcs_write16(sf->selector, var->selector);
 883         if (var->unusable)
 884                 ar = 1 << 16;
 885         else {
 886                 ar = var->type & 15;
 887                 ar |= (var->s & 1) << 4;
 888                 ar |= (var->dpl & 3) << 5;
 889                 ar |= (var->present & 1) << 7;
 890                 ar |= (var->avl & 1) << 12;
 891                 ar |= (var->l & 1) << 13;
 892                 ar |= (var->db & 1) << 14;
 893                 ar |= (var->g & 1) << 15;
 894         }
 895         if (ar == 0) /* a 0 value means unusable */
 896                 ar = AR_UNUSABLE_MASK;
 897         vmcs_write32(sf->ar_bytes, ar);
 898 }
 899
 900 static int vmx_is_long_mode(struct kvm_vcpu *vcpu)
 901 {
 902         return vmcs_read32(VM_ENTRY_CONTROLS) & VM_ENTRY_CONTROLS_IA32E_MASK;
 903 }
 904
 905 static void vmx_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
 906 {
 907         u32 ar = vmcs_read32(GUEST_CS_AR_BYTES);
 908
 909         *db = (ar >> 14) & 1;
 910         *l = (ar >> 13) & 1;
 911 }
 912
 913 static void vmx_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 914 {
 915         dt->limit = vmcs_read32(GUEST_IDTR_LIMIT);
 916         dt->base = vmcs_readl(GUEST_IDTR_BASE);
 917 }
 918
 919 static void vmx_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 920 {
 921         vmcs_write32(GUEST_IDTR_LIMIT, dt->limit);
 922         vmcs_writel(GUEST_IDTR_BASE, dt->base);
 923 }
 924
 925 static void vmx_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 926 {
 927         dt->limit = vmcs_read32(GUEST_GDTR_LIMIT);
 928         dt->base = vmcs_readl(GUEST_GDTR_BASE);
 929 }
 930
 931 static void vmx_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 932 {
 933         vmcs_write32(GUEST_GDTR_LIMIT, dt->limit);
 934         vmcs_writel(GUEST_GDTR_BASE, dt->base);
 935 }
 936
 937 static int init_rmode_tss(struct kvm* kvm)
 938 {
 939         struct page *p1, *p2, *p3;
 940         gfn_t fn = rmode_tss_base(kvm) >> PAGE_SHIFT;
 941         char *page;
 942
 943         p1 = _gfn_to_page(kvm, fn++);
 944         p2 = _gfn_to_page(kvm, fn++);
 945         p3 = _gfn_to_page(kvm, fn);
 946
 947         if (!p1 || !p2 || !p3) {
 948                 kvm_printf(kvm,"%s: gfn_to_page failed\n", __FUNCTION__);
 949                 return 0;
 950         }
 951
 952         page = kmap_atomic(p1, KM_USER0);
 953         memset(page, 0, PAGE_SIZE);
 954         *(u16*)(page + 0x66) = TSS_BASE_SIZE + TSS_REDIRECTION_SIZE;
 955         kunmap_atomic(page, KM_USER0);
 956
 957         page = kmap_atomic(p2, KM_USER0);
 958         memset(page, 0, PAGE_SIZE);
 959         kunmap_atomic(page, KM_USER0);
 960
 961         page = kmap_atomic(p3, KM_USER0);
 962         memset(page, 0, PAGE_SIZE);
 963         *(page + RMODE_TSS_SIZE - 2 * PAGE_SIZE - 1) = ~0;
 964         kunmap_atomic(page, KM_USER0);
 965
 966         return 1;
 967 }
 968
 969 static void vmcs_write32_fixedbits(u32 msr, u32 vmcs_field, u32 val)
 970 {
 971         u32 msr_high, msr_low;
 972
 973         rdmsr(msr, msr_low, msr_high);
 974
 975         val &= msr_high;
 976         val |= msr_low;
 977         vmcs_write32(vmcs_field, val);
 978 }
 979
 980 static void seg_setup(int seg)
 981 {
 982         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 983
 984         vmcs_write16(sf->selector, 0);
 985         vmcs_writel(sf->base, 0);
 986         vmcs_write32(sf->limit, 0xffff);
 987         vmcs_write32(sf->ar_bytes, 0x93);
 988 }
 989
 990 /*
 991  * Sets up the vmcs for emulated real mode.
 992  */
 993 static int vmx_vcpu_setup(struct kvm_vcpu *vcpu)
 994 {
 995         u32 host_sysenter_cs;
 996         u32 junk;
 997         unsigned long a;
 998         struct descriptor_table dt;
 999         int i;
1000         int ret = 0;
1001         int nr_good_msrs;
1002         extern asmlinkage void kvm_vmx_return(void);
1003
1004         if (!init_rmode_tss(vcpu->kvm)) {
1005                 ret = -ENOMEM;
1006                 goto out;
1007         }
1008
1009         memset(vcpu->regs, 0, sizeof(vcpu->regs));
1010         vcpu->regs[VCPU_REGS_RDX] = get_rdx_init_val();
1011         vcpu->cr8 = 0;
1012         vcpu->apic_base = 0xfee00000 |
1013                         /*for vcpu 0*/ MSR_IA32_APICBASE_BSP |
1014                         MSR_IA32_APICBASE_ENABLE;
1015
1016         fx_init(vcpu);
1017
1018         /*
1019          * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
1020          * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4.  Sigh.
1021          */
1022         vmcs_write16(GUEST_CS_SELECTOR, 0xf000);
1023         vmcs_writel(GUEST_CS_BASE, 0x000f0000);
1024         vmcs_write32(GUEST_CS_LIMIT, 0xffff);
1025         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
1026
1027         seg_setup(VCPU_SREG_DS);
1028         seg_setup(VCPU_SREG_ES);
1029         seg_setup(VCPU_SREG_FS);
1030         seg_setup(VCPU_SREG_GS);
1031         seg_setup(VCPU_SREG_SS);
1032
1033         vmcs_write16(GUEST_TR_SELECTOR, 0);
1034         vmcs_writel(GUEST_TR_BASE, 0);
1035         vmcs_write32(GUEST_TR_LIMIT, 0xffff);
1036         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
1037
1038         vmcs_write16(GUEST_LDTR_SELECTOR, 0);
1039         vmcs_writel(GUEST_LDTR_BASE, 0);
1040         vmcs_write32(GUEST_LDTR_LIMIT, 0xffff);
1041         vmcs_write32(GUEST_LDTR_AR_BYTES, 0x00082);
1042
1043         vmcs_write32(GUEST_SYSENTER_CS, 0);
1044         vmcs_writel(GUEST_SYSENTER_ESP, 0);
1045         vmcs_writel(GUEST_SYSENTER_EIP, 0);
1046
1047         vmcs_writel(GUEST_RFLAGS, 0x02);
1048         vmcs_writel(GUEST_RIP, 0xfff0);
1049         vmcs_writel(GUEST_RSP, 0);
1050
1051         vmcs_writel(GUEST_CR3, 0);
1052
1053         //todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0
1054         vmcs_writel(GUEST_DR7, 0x400);
1055
1056         vmcs_writel(GUEST_GDTR_BASE, 0);
1057         vmcs_write32(GUEST_GDTR_LIMIT, 0xffff);
1058
1059         vmcs_writel(GUEST_IDTR_BASE, 0);
1060         vmcs_write32(GUEST_IDTR_LIMIT, 0xffff);
1061
1062         vmcs_write32(GUEST_ACTIVITY_STATE, 0);
1063         vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, 0);
1064         vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS, 0);
1065
1066         /* I/O */
1067         vmcs_write64(IO_BITMAP_A, 0);
1068         vmcs_write64(IO_BITMAP_B, 0);
1069
1070         guest_write_tsc(0);
1071
1072         vmcs_write64(VMCS_LINK_POINTER, -1ull); /* 22.3.1.5 */
1073
1074         /* Special registers */
1075         vmcs_write64(GUEST_IA32_DEBUGCTL, 0);
1076
1077         /* Control */
1078         vmcs_write32_fixedbits(MSR_IA32_VMX_PINBASED_CTLS_MSR,
1079                                PIN_BASED_VM_EXEC_CONTROL,
1080                                PIN_BASED_EXT_INTR_MASK   /* 20.6.1 */
1081                                | PIN_BASED_NMI_EXITING   /* 20.6.1 */
1082                         );
1083         vmcs_write32_fixedbits(MSR_IA32_VMX_PROCBASED_CTLS_MSR,
1084                                CPU_BASED_VM_EXEC_CONTROL,
1085                                CPU_BASED_HLT_EXITING         /* 20.6.2 */
1086                                | CPU_BASED_CR8_LOAD_EXITING    /* 20.6.2 */
1087                                | CPU_BASED_CR8_STORE_EXITING   /* 20.6.2 */
1088                                | CPU_BASED_UNCOND_IO_EXITING   /* 20.6.2 */
1089                                | CPU_BASED_INVDPG_EXITING
1090                                | CPU_BASED_MOV_DR_EXITING
1091                                | CPU_BASED_USE_TSC_OFFSETING   /* 21.3 */
1092                         );
1093
1094         vmcs_write32(EXCEPTION_BITMAP, 1 << PF_VECTOR);
1095         vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK, 0);
1096         vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH, 0);
1097         vmcs_write32(CR3_TARGET_COUNT, 0);           /* 22.2.1 */
1098
1099         vmcs_writel(HOST_CR0, read_cr0());  /* 22.2.3 */
1100         vmcs_writel(HOST_CR4, read_cr4());  /* 22.2.3, 22.2.5 */
1101         vmcs_writel(HOST_CR3, read_cr3());  /* 22.2.3  FIXME: shadow tables */
1102
1103         vmcs_write16(HOST_CS_SELECTOR, __KERNEL_CS);  /* 22.2.4 */
1104         vmcs_write16(HOST_DS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1105         vmcs_write16(HOST_ES_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1106         vmcs_write16(HOST_FS_SELECTOR, read_fs());    /* 22.2.4 */
1107         vmcs_write16(HOST_GS_SELECTOR, read_gs());    /* 22.2.4 */
1108         vmcs_write16(HOST_SS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1109 #ifdef CONFIG_X86_64
1110         rdmsrl(MSR_FS_BASE, a);
1111         vmcs_writel(HOST_FS_BASE, a); /* 22.2.4 */
1112         rdmsrl(MSR_GS_BASE, a);
1113         vmcs_writel(HOST_GS_BASE, a); /* 22.2.4 */
1114 #else
1115         vmcs_writel(HOST_FS_BASE, 0); /* 22.2.4 */
1116         vmcs_writel(HOST_GS_BASE, 0); /* 22.2.4 */
1117 #endif
1118
1119         vmcs_write16(HOST_TR_SELECTOR, GDT_ENTRY_TSS*8);  /* 22.2.4 */
1120
1121         get_idt(&dt);
1122         vmcs_writel(HOST_IDTR_BASE, dt.base);   /* 22.2.4 */
1123
1124
1125         vmcs_writel(HOST_RIP, (unsigned long)kvm_vmx_return); /* 22.2.5 */
1126
1127         rdmsr(MSR_IA32_SYSENTER_CS, host_sysenter_cs, junk);
1128         vmcs_write32(HOST_IA32_SYSENTER_CS, host_sysenter_cs);
1129         rdmsrl(MSR_IA32_SYSENTER_ESP, a);
1130         vmcs_writel(HOST_IA32_SYSENTER_ESP, a);   /* 22.2.3 */
1131         rdmsrl(MSR_IA32_SYSENTER_EIP, a);
1132         vmcs_writel(HOST_IA32_SYSENTER_EIP, a);   /* 22.2.3 */
1133
1134         ret = -ENOMEM;
1135         vcpu->guest_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
1136         if (!vcpu->guest_msrs)
1137                 goto out;
1138         vcpu->host_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
1139         if (!vcpu->host_msrs)
1140                 goto out_free_guest_msrs;
1141
1142         for (i = 0; i < NR_VMX_MSR; ++i) {
1143                 u32 index = vmx_msr_index[i];
1144                 u32 data_low, data_high;
1145                 u64 data;
1146                 int j = vcpu->nmsrs;
1147
1148                 if (rdmsr_safe(index, &data_low, &data_high) < 0)
1149                         continue;
1150                 data = data_low | ((u64)data_high << 32);
1151                 vcpu->host_msrs[j].index = index;
1152                 vcpu->host_msrs[j].reserved = 0;
1153                 vcpu->host_msrs[j].data = data;
1154                 vcpu->guest_msrs[j] = vcpu->host_msrs[j];
1155                 ++vcpu->nmsrs;
1156         }
1157         printk(KERN_DEBUG "kvm: msrs: %d\n", vcpu->nmsrs);
1158
1159         nr_good_msrs = vcpu->nmsrs - NR_BAD_MSRS;
1160         vmcs_writel(VM_ENTRY_MSR_LOAD_ADDR,
1161                     virt_to_phys(vcpu->guest_msrs + NR_BAD_MSRS));
1162         vmcs_writel(VM_EXIT_MSR_STORE_ADDR,
1163                     virt_to_phys(vcpu->guest_msrs + NR_BAD_MSRS));
1164         vmcs_writel(VM_EXIT_MSR_LOAD_ADDR,
1165                     virt_to_phys(vcpu->host_msrs + NR_BAD_MSRS));
1166         vmcs_write32_fixedbits(MSR_IA32_VMX_EXIT_CTLS_MSR, VM_EXIT_CONTROLS,
1167                                (HOST_IS_64 << 9));  /* 22.2,1, 20.7.1 */
1168         vmcs_write32(VM_EXIT_MSR_STORE_COUNT, nr_good_msrs); /* 22.2.2 */
1169         vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, nr_good_msrs);  /* 22.2.2 */
1170         vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, nr_good_msrs); /* 22.2.2 */
1171
1172
1173         /* 22.2.1, 20.8.1 */
1174         vmcs_write32_fixedbits(MSR_IA32_VMX_ENTRY_CTLS_MSR,
1175                                VM_ENTRY_CONTROLS, 0);
1176         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0);  /* 22.2.1 */
1177
1178 #ifdef CONFIG_X86_64
1179         vmcs_writel(VIRTUAL_APIC_PAGE_ADDR, 0);
1180         vmcs_writel(TPR_THRESHOLD, 0);
1181 #endif
1182
1183         vmcs_writel(CR0_GUEST_HOST_MASK, KVM_GUEST_CR0_MASK);
1184         vmcs_writel(CR4_GUEST_HOST_MASK, KVM_GUEST_CR4_MASK);
1185
1186         vcpu->cr0 = 0x60000010;
1187         vmx_set_cr0(vcpu, vcpu->cr0); // enter rmode
1188         vmx_set_cr4(vcpu, 0);
1189 #ifdef CONFIG_X86_64
1190         vmx_set_efer(vcpu, 0);
1191 #endif
1192
1193         return 0;
1194
1195 out_free_guest_msrs:
1196         kfree(vcpu->guest_msrs);
1197 out:
1198         return ret;
1199 }
1200
1201 static void inject_rmode_irq(struct kvm_vcpu *vcpu, int irq)
1202 {
1203         u16 ent[2];
1204         u16 cs;
1205         u16 ip;
1206         unsigned long flags;
1207         unsigned long ss_base = vmcs_readl(GUEST_SS_BASE);
1208         u16 sp =  vmcs_readl(GUEST_RSP);
1209         u32 ss_limit = vmcs_read32(GUEST_SS_LIMIT);
1210
1211         if (sp > ss_limit || sp - 6 > sp) {
1212                 vcpu_printf(vcpu, "%s: #SS, rsp 0x%lx ss 0x%lx limit 0x%x\n",
1213                             __FUNCTION__,
1214                             vmcs_readl(GUEST_RSP),
1215                             vmcs_readl(GUEST_SS_BASE),
1216                             vmcs_read32(GUEST_SS_LIMIT));
1217                 return;
1218         }
1219
1220         if (kvm_read_guest(vcpu, irq * sizeof(ent), sizeof(ent), &ent) !=
1221                                                                 sizeof(ent)) {
1222                 vcpu_printf(vcpu, "%s: read guest err\n", __FUNCTION__);
1223                 return;
1224         }
1225
1226         flags =  vmcs_readl(GUEST_RFLAGS);
1227         cs =  vmcs_readl(GUEST_CS_BASE) >> 4;
1228         ip =  vmcs_readl(GUEST_RIP);
1229
1230
1231         if (kvm_write_guest(vcpu, ss_base + sp - 2, 2, &flags) != 2 ||
1232             kvm_write_guest(vcpu, ss_base + sp - 4, 2, &cs) != 2 ||
1233             kvm_write_guest(vcpu, ss_base + sp - 6, 2, &ip) != 2) {
1234                 vcpu_printf(vcpu, "%s: write guest err\n", __FUNCTION__);
1235                 return;
1236         }
1237
1238         vmcs_writel(GUEST_RFLAGS, flags &
1239                     ~( X86_EFLAGS_IF | X86_EFLAGS_AC | X86_EFLAGS_TF));
1240         vmcs_write16(GUEST_CS_SELECTOR, ent[1]) ;
1241         vmcs_writel(GUEST_CS_BASE, ent[1] << 4);
1242         vmcs_writel(GUEST_RIP, ent[0]);
1243         vmcs_writel(GUEST_RSP, (vmcs_readl(GUEST_RSP) & ~0xffff) | (sp - 6));
1244 }
1245
1246 static void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
1247 {
1248         int word_index = __ffs(vcpu->irq_summary);
1249         int bit_index = __ffs(vcpu->irq_pending[word_index]);
1250         int irq = word_index * BITS_PER_LONG + bit_index;
1251
1252         clear_bit(bit_index, &vcpu->irq_pending[word_index]);
1253         if (!vcpu->irq_pending[word_index])
1254                 clear_bit(word_index, &vcpu->irq_summary);
1255
1256         if (vcpu->rmode.active) {
1257                 inject_rmode_irq(vcpu, irq);
1258                 return;
1259         }
1260         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1261                         irq | INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
1262 }
1263
1264 static void kvm_try_inject_irq(struct kvm_vcpu *vcpu)
1265 {
1266         if ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF)
1267             && (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0)
1268                 /*
1269                  * Interrupts enabled, and not blocked by sti or mov ss. Good.
1270                  */
1271                 kvm_do_inject_irq(vcpu);
1272         else
1273                 /*
1274                  * Interrupts blocked.  Wait for unblock.
1275                  */
1276                 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL,
1277                              vmcs_read32(CPU_BASED_VM_EXEC_CONTROL)
1278                              | CPU_BASED_VIRTUAL_INTR_PENDING);
1279 }
1280
1281 static void kvm_guest_debug_pre(struct kvm_vcpu *vcpu)
1282 {
1283         struct kvm_guest_debug *dbg = &vcpu->guest_debug;
1284
1285         set_debugreg(dbg->bp[0], 0);
1286         set_debugreg(dbg->bp[1], 1);
1287         set_debugreg(dbg->bp[2], 2);
1288         set_debugreg(dbg->bp[3], 3);
1289
1290         if (dbg->singlestep) {
1291                 unsigned long flags;
1292
1293                 flags = vmcs_readl(GUEST_RFLAGS);
1294                 flags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
1295                 vmcs_writel(GUEST_RFLAGS, flags);
1296         }
1297 }
1298
1299 static int handle_rmode_exception(struct kvm_vcpu *vcpu,
1300                                   int vec, u32 err_code)
1301 {
1302         if (!vcpu->rmode.active)
1303                 return 0;
1304
1305         if (vec == GP_VECTOR && err_code == 0)
1306                 if (emulate_instruction(vcpu, NULL, 0, 0) == EMULATE_DONE)
1307                         return 1;
1308         return 0;
1309 }
1310
1311 static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1312 {
1313         u32 intr_info, error_code;
1314         unsigned long cr2, rip;
1315         u32 vect_info;
1316         enum emulation_result er;
1317
1318         vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1319         intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
1320
1321         if ((vect_info & VECTORING_INFO_VALID_MASK) &&
1322                                                 !is_page_fault(intr_info)) {
1323                 printk(KERN_ERR "%s: unexpected, vectoring info 0x%x "
1324                        "intr info 0x%x\n", __FUNCTION__, vect_info, intr_info);
1325         }
1326
1327         if (is_external_interrupt(vect_info)) {
1328                 int irq = vect_info & VECTORING_INFO_VECTOR_MASK;
1329                 set_bit(irq, vcpu->irq_pending);
1330                 set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
1331         }
1332
1333         if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == 0x200) { /* nmi */
1334                 asm ("int $2");
1335                 return 1;
1336         }
1337         error_code = 0;
1338         rip = vmcs_readl(GUEST_RIP);
1339         if (intr_info & INTR_INFO_DELIEVER_CODE_MASK)
1340                 error_code = vmcs_read32(VM_EXIT_INTR_ERROR_CODE);
1341         if (is_page_fault(intr_info)) {
1342                 cr2 = vmcs_readl(EXIT_QUALIFICATION);
1343
1344                 spin_lock(&vcpu->kvm->lock);
1345                 if (!vcpu->mmu.page_fault(vcpu, cr2, error_code)) {
1346                         spin_unlock(&vcpu->kvm->lock);
1347                         return 1;
1348                 }
1349
1350                 er = emulate_instruction(vcpu, kvm_run, cr2, error_code);
1351                 spin_unlock(&vcpu->kvm->lock);
1352
1353                 switch (er) {
1354                 case EMULATE_DONE:
1355                         return 1;
1356                 case EMULATE_DO_MMIO:
1357                         ++kvm_stat.mmio_exits;
1358                         kvm_run->exit_reason = KVM_EXIT_MMIO;
1359                         return 0;
1360                  case EMULATE_FAIL:
1361                         vcpu_printf(vcpu, "%s: emulate fail\n", __FUNCTION__);
1362                         break;
1363                 default:
1364                         BUG();
1365                 }
1366         }
1367
1368         if (vcpu->rmode.active &&
1369             handle_rmode_exception(vcpu, intr_info & INTR_INFO_VECTOR_MASK,
1370                                                                 error_code))
1371                 return 1;
1372
1373         if ((intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK)) == (INTR_TYPE_EXCEPTION | 1)) {
1374                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
1375                 return 0;
1376         }
1377         kvm_run->exit_reason = KVM_EXIT_EXCEPTION;
1378         kvm_run->ex.exception = intr_info & INTR_INFO_VECTOR_MASK;
1379         kvm_run->ex.error_code = error_code;
1380         return 0;
1381 }
1382
1383 static int handle_external_interrupt(struct kvm_vcpu *vcpu,
1384                                      struct kvm_run *kvm_run)
1385 {
1386         ++kvm_stat.irq_exits;
1387         return 1;
1388 }
1389
1390
1391 static int get_io_count(struct kvm_vcpu *vcpu, u64 *count)
1392 {
1393         u64 inst;
1394         gva_t rip;
1395         int countr_size;
1396         int i, n;
1397
1398         if ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_VM)) {
1399                 countr_size = 2;
1400         } else {
1401                 u32 cs_ar = vmcs_read32(GUEST_CS_AR_BYTES);
1402
1403                 countr_size = (cs_ar & AR_L_MASK) ? 8:
1404                               (cs_ar & AR_DB_MASK) ? 4: 2;
1405         }
1406
1407         rip =  vmcs_readl(GUEST_RIP);
1408         if (countr_size != 8)
1409                 rip += vmcs_readl(GUEST_CS_BASE);
1410
1411         n = kvm_read_guest(vcpu, rip, sizeof(inst), &inst);
1412
1413         for (i = 0; i < n; i++) {
1414                 switch (((u8*)&inst)[i]) {
1415                 case 0xf0:
1416                 case 0xf2:
1417                 case 0xf3:
1418                 case 0x2e:
1419                 case 0x36:
1420                 case 0x3e:
1421                 case 0x26:
1422                 case 0x64:
1423                 case 0x65:
1424                 case 0x66:
1425                         break;
1426                 case 0x67:
1427                         countr_size = (countr_size == 2) ? 4: (countr_size >> 1);
1428                 default:
1429                         goto done;
1430                 }
1431         }
1432         return 0;
1433 done:
1434         countr_size *= 8;
1435         *count = vcpu->regs[VCPU_REGS_RCX] & (~0ULL >> (64 - countr_size));
1436         return 1;
1437 }
1438
1439 static int handle_io(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1440 {
1441         u64 exit_qualification;
1442
1443         ++kvm_stat.io_exits;
1444         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1445         kvm_run->exit_reason = KVM_EXIT_IO;
1446         if (exit_qualification & 8)
1447                 kvm_run->io.direction = KVM_EXIT_IO_IN;
1448         else
1449                 kvm_run->io.direction = KVM_EXIT_IO_OUT;
1450         kvm_run->io.size = (exit_qualification & 7) + 1;
1451         kvm_run->io.string = (exit_qualification & 16) != 0;
1452         kvm_run->io.string_down
1453                 = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_DF) != 0;
1454         kvm_run->io.rep = (exit_qualification & 32) != 0;
1455         kvm_run->io.port = exit_qualification >> 16;
1456         if (kvm_run->io.string) {
1457                 if (!get_io_count(vcpu, &kvm_run->io.count))
1458                         return 1;
1459                 kvm_run->io.address = vmcs_readl(GUEST_LINEAR_ADDRESS);
1460         } else
1461                 kvm_run->io.value = vcpu->regs[VCPU_REGS_RAX]; /* rax */
1462         return 0;
1463 }
1464
1465 static int handle_invlpg(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1466 {
1467         u64 address = vmcs_read64(EXIT_QUALIFICATION);
1468         int instruction_length = vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
1469         spin_lock(&vcpu->kvm->lock);
1470         vcpu->mmu.inval_page(vcpu, address);
1471         spin_unlock(&vcpu->kvm->lock);
1472         vmcs_writel(GUEST_RIP, vmcs_readl(GUEST_RIP) + instruction_length);
1473         return 1;
1474 }
1475
1476 static int handle_cr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1477 {
1478         u64 exit_qualification;
1479         int cr;
1480         int reg;
1481
1482         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1483         cr = exit_qualification & 15;
1484         reg = (exit_qualification >> 8) & 15;
1485         switch ((exit_qualification >> 4) & 3) {
1486         case 0: /* mov to cr */
1487                 switch (cr) {
1488                 case 0:
1489                         vcpu_load_rsp_rip(vcpu);
1490                         set_cr0(vcpu, vcpu->regs[reg]);
1491                         skip_emulated_instruction(vcpu);
1492                         return 1;
1493                 case 3:
1494                         vcpu_load_rsp_rip(vcpu);
1495                         set_cr3(vcpu, vcpu->regs[reg]);
1496                         skip_emulated_instruction(vcpu);
1497                         return 1;
1498                 case 4:
1499                         vcpu_load_rsp_rip(vcpu);
1500                         set_cr4(vcpu, vcpu->regs[reg]);
1501                         skip_emulated_instruction(vcpu);
1502                         return 1;
1503                 case 8:
1504                         vcpu_load_rsp_rip(vcpu);
1505                         set_cr8(vcpu, vcpu->regs[reg]);
1506                         skip_emulated_instruction(vcpu);
1507                         return 1;
1508                 };
1509                 break;
1510         case 1: /*mov from cr*/
1511                 switch (cr) {
1512                 case 3:
1513                         vcpu_load_rsp_rip(vcpu);
1514                         vcpu->regs[reg] = vcpu->cr3;
1515                         vcpu_put_rsp_rip(vcpu);
1516                         skip_emulated_instruction(vcpu);
1517                         return 1;
1518                 case 8:
1519                         printk(KERN_DEBUG "handle_cr: read CR8 "
1520                                "cpu erratum AA15\n");
1521                         vcpu_load_rsp_rip(vcpu);
1522                         vcpu->regs[reg] = vcpu->cr8;
1523                         vcpu_put_rsp_rip(vcpu);
1524                         skip_emulated_instruction(vcpu);
1525                         return 1;
1526                 }
1527                 break;
1528         case 3: /* lmsw */
1529                 lmsw(vcpu, (exit_qualification >> LMSW_SOURCE_DATA_SHIFT) & 0x0f);
1530
1531                 skip_emulated_instruction(vcpu);
1532                 return 1;
1533         default:
1534                 break;
1535         }
1536         kvm_run->exit_reason = 0;
1537         printk(KERN_ERR "kvm: unhandled control register: op %d cr %d\n",
1538                (int)(exit_qualification >> 4) & 3, cr);
1539         return 0;
1540 }
1541
1542 static int handle_dr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1543 {
1544         u64 exit_qualification;
1545         unsigned long val;
1546         int dr, reg;
1547
1548         /*
1549          * FIXME: this code assumes the host is debugging the guest.
1550          *        need to deal with guest debugging itself too.
1551          */
1552         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1553         dr = exit_qualification & 7;
1554         reg = (exit_qualification >> 8) & 15;
1555         vcpu_load_rsp_rip(vcpu);
1556         if (exit_qualification & 16) {
1557                 /* mov from dr */
1558                 switch (dr) {
1559                 case 6:
1560                         val = 0xffff0ff0;
1561                         break;
1562                 case 7:
1563                         val = 0x400;
1564                         break;
1565                 default:
1566                         val = 0;
1567                 }
1568                 vcpu->regs[reg] = val;
1569         } else {
1570                 /* mov to dr */
1571         }
1572         vcpu_put_rsp_rip(vcpu);
1573         skip_emulated_instruction(vcpu);
1574         return 1;
1575 }
1576
1577 static int handle_cpuid(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1578 {
1579         kvm_run->exit_reason = KVM_EXIT_CPUID;
1580         return 0;
1581 }
1582
1583 static int handle_rdmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1584 {
1585         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1586         u64 data;
1587
1588         if (vmx_get_msr(vcpu, ecx, &data)) {
1589                 vmx_inject_gp(vcpu, 0);
1590                 return 1;
1591         }
1592
1593         /* FIXME: handling of bits 32:63 of rax, rdx */
1594         vcpu->regs[VCPU_REGS_RAX] = data & -1u;
1595         vcpu->regs[VCPU_REGS_RDX] = (data >> 32) & -1u;
1596         skip_emulated_instruction(vcpu);
1597         return 1;
1598 }
1599
1600 static int handle_wrmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1601 {
1602         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1603         u64 data = (vcpu->regs[VCPU_REGS_RAX] & -1u)
1604                 | ((u64)(vcpu->regs[VCPU_REGS_RDX] & -1u) << 32);
1605
1606         if (vmx_set_msr(vcpu, ecx, data) != 0) {
1607                 vmx_inject_gp(vcpu, 0);
1608                 return 1;
1609         }
1610
1611         skip_emulated_instruction(vcpu);
1612         return 1;
1613 }
1614
1615 static int handle_interrupt_window(struct kvm_vcpu *vcpu,
1616                                    struct kvm_run *kvm_run)
1617 {
1618         /* Turn off interrupt window reporting. */
1619         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL,
1620                      vmcs_read32(CPU_BASED_VM_EXEC_CONTROL)
1621                      & ~CPU_BASED_VIRTUAL_INTR_PENDING);
1622         return 1;
1623 }
1624
1625 static int handle_halt(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1626 {
1627         skip_emulated_instruction(vcpu);
1628         if (vcpu->irq_summary && (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF))
1629                 return 1;
1630
1631         kvm_run->exit_reason = KVM_EXIT_HLT;
1632         return 0;
1633 }
1634
1635 /*
1636  * The exit handlers return 1 if the exit was handled fully and guest execution
1637  * may resume.  Otherwise they set the kvm_run parameter to indicate what needs
1638  * to be done to userspace and return 0.
1639  */
1640 static int (*kvm_vmx_exit_handlers[])(struct kvm_vcpu *vcpu,
1641                                       struct kvm_run *kvm_run) = {
1642         [EXIT_REASON_EXCEPTION_NMI]           = handle_exception,
1643         [EXIT_REASON_EXTERNAL_INTERRUPT]      = handle_external_interrupt,
1644         [EXIT_REASON_IO_INSTRUCTION]          = handle_io,
1645         [EXIT_REASON_INVLPG]                  = handle_invlpg,
1646         [EXIT_REASON_CR_ACCESS]               = handle_cr,
1647         [EXIT_REASON_DR_ACCESS]               = handle_dr,
1648         [EXIT_REASON_CPUID]                   = handle_cpuid,
1649         [EXIT_REASON_MSR_READ]                = handle_rdmsr,
1650         [EXIT_REASON_MSR_WRITE]               = handle_wrmsr,
1651         [EXIT_REASON_PENDING_INTERRUPT]       = handle_interrupt_window,
1652         [EXIT_REASON_HLT]                     = handle_halt,
1653 };
1654
1655 static const int kvm_vmx_max_exit_handlers =
1656         sizeof(kvm_vmx_exit_handlers) / sizeof(*kvm_vmx_exit_handlers);
1657
1658 /*
1659  * The guest has exited.  See if we can fix it or if we need userspace
1660  * assistance.
1661  */
1662 static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
1663 {
1664         u32 vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1665         u32 exit_reason = vmcs_read32(VM_EXIT_REASON);
1666
1667         if ( (vectoring_info & VECTORING_INFO_VALID_MASK) &&
1668                                 exit_reason != EXIT_REASON_EXCEPTION_NMI )
1669                 printk(KERN_WARNING "%s: unexpected, valid vectoring info and "
1670                        "exit reason is 0x%x\n", __FUNCTION__, exit_reason);
1671         kvm_run->instruction_length = vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
1672         if (exit_reason < kvm_vmx_max_exit_handlers
1673             && kvm_vmx_exit_handlers[exit_reason])
1674                 return kvm_vmx_exit_handlers[exit_reason](vcpu, kvm_run);
1675         else {
1676                 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1677                 kvm_run->hw.hardware_exit_reason = exit_reason;
1678         }
1679         return 0;
1680 }
1681
1682 static int vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1683 {
1684         u8 fail;
1685         u16 fs_sel, gs_sel, ldt_sel;
1686         int fs_gs_ldt_reload_needed;
1687
1688 again:
1689         /*
1690          * Set host fs and gs selectors.  Unfortunately, 22.2.3 does not
1691          * allow segment selectors with cpl > 0 or ti == 1.
1692          */
1693         fs_sel = read_fs();
1694         gs_sel = read_gs();
1695         ldt_sel = read_ldt();
1696         fs_gs_ldt_reload_needed = (fs_sel & 7) | (gs_sel & 7) | ldt_sel;
1697         if (!fs_gs_ldt_reload_needed) {
1698                 vmcs_write16(HOST_FS_SELECTOR, fs_sel);
1699                 vmcs_write16(HOST_GS_SELECTOR, gs_sel);
1700         } else {
1701                 vmcs_write16(HOST_FS_SELECTOR, 0);
1702                 vmcs_write16(HOST_GS_SELECTOR, 0);
1703         }
1704
1705 #ifdef CONFIG_X86_64
1706         vmcs_writel(HOST_FS_BASE, read_msr(MSR_FS_BASE));
1707         vmcs_writel(HOST_GS_BASE, read_msr(MSR_GS_BASE));
1708 #else
1709         vmcs_writel(HOST_FS_BASE, segment_base(fs_sel));
1710         vmcs_writel(HOST_GS_BASE, segment_base(gs_sel));
1711 #endif
1712
1713         if (vcpu->irq_summary &&
1714             !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD) & INTR_INFO_VALID_MASK))
1715                 kvm_try_inject_irq(vcpu);
1716
1717         if (vcpu->guest_debug.enabled)
1718                 kvm_guest_debug_pre(vcpu);
1719
1720         fx_save(vcpu->host_fx_image);
1721         fx_restore(vcpu->guest_fx_image);
1722
1723         save_msrs(vcpu->host_msrs, vcpu->nmsrs);
1724         load_msrs(vcpu->guest_msrs, NR_BAD_MSRS);
1725
1726         asm (
1727                 /* Store host registers */
1728                 "pushf \n\t"
1729 #ifdef CONFIG_X86_64
1730                 "push %%rax; push %%rbx; push %%rdx;"
1731                 "push %%rsi; push %%rdi; push %%rbp;"
1732                 "push %%r8;  push %%r9;  push %%r10; push %%r11;"
1733                 "push %%r12; push %%r13; push %%r14; push %%r15;"
1734                 "push %%rcx \n\t"
1735                 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
1736 #else
1737                 "pusha; push %%ecx \n\t"
1738                 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
1739 #endif
1740                 /* Check if vmlaunch of vmresume is needed */
1741                 "cmp $0, %1 \n\t"
1742                 /* Load guest registers.  Don't clobber flags. */
1743 #ifdef CONFIG_X86_64
1744                 "mov %c[cr2](%3), %%rax \n\t"
1745                 "mov %%rax, %%cr2 \n\t"
1746                 "mov %c[rax](%3), %%rax \n\t"
1747                 "mov %c[rbx](%3), %%rbx \n\t"
1748                 "mov %c[rdx](%3), %%rdx \n\t"
1749                 "mov %c[rsi](%3), %%rsi \n\t"
1750                 "mov %c[rdi](%3), %%rdi \n\t"
1751                 "mov %c[rbp](%3), %%rbp \n\t"
1752                 "mov %c[r8](%3),  %%r8  \n\t"
1753                 "mov %c[r9](%3),  %%r9  \n\t"
1754                 "mov %c[r10](%3), %%r10 \n\t"
1755                 "mov %c[r11](%3), %%r11 \n\t"
1756                 "mov %c[r12](%3), %%r12 \n\t"
1757                 "mov %c[r13](%3), %%r13 \n\t"
1758                 "mov %c[r14](%3), %%r14 \n\t"
1759                 "mov %c[r15](%3), %%r15 \n\t"
1760                 "mov %c[rcx](%3), %%rcx \n\t" /* kills %3 (rcx) */
1761 #else
1762                 "mov %c[cr2](%3), %%eax \n\t"
1763                 "mov %%eax,   %%cr2 \n\t"
1764                 "mov %c[rax](%3), %%eax \n\t"
1765                 "mov %c[rbx](%3), %%ebx \n\t"
1766                 "mov %c[rdx](%3), %%edx \n\t"
1767                 "mov %c[rsi](%3), %%esi \n\t"
1768                 "mov %c[rdi](%3), %%edi \n\t"
1769                 "mov %c[rbp](%3), %%ebp \n\t"
1770                 "mov %c[rcx](%3), %%ecx \n\t" /* kills %3 (ecx) */
1771 #endif
1772                 /* Enter guest mode */
1773                 "jne launched \n\t"
1774                 ASM_VMX_VMLAUNCH "\n\t"
1775                 "jmp kvm_vmx_return \n\t"
1776                 "launched: " ASM_VMX_VMRESUME "\n\t"
1777                 ".globl kvm_vmx_return \n\t"
1778                 "kvm_vmx_return: "
1779                 /* Save guest registers, load host registers, keep flags */
1780 #ifdef CONFIG_X86_64
1781                 "xchg %3,     0(%%rsp) \n\t"
1782                 "mov %%rax, %c[rax](%3) \n\t"
1783                 "mov %%rbx, %c[rbx](%3) \n\t"
1784                 "pushq 0(%%rsp); popq %c[rcx](%3) \n\t"
1785                 "mov %%rdx, %c[rdx](%3) \n\t"
1786                 "mov %%rsi, %c[rsi](%3) \n\t"
1787                 "mov %%rdi, %c[rdi](%3) \n\t"
1788                 "mov %%rbp, %c[rbp](%3) \n\t"
1789                 "mov %%r8,  %c[r8](%3) \n\t"
1790                 "mov %%r9,  %c[r9](%3) \n\t"
1791                 "mov %%r10, %c[r10](%3) \n\t"
1792                 "mov %%r11, %c[r11](%3) \n\t"
1793                 "mov %%r12, %c[r12](%3) \n\t"
1794                 "mov %%r13, %c[r13](%3) \n\t"
1795                 "mov %%r14, %c[r14](%3) \n\t"
1796                 "mov %%r15, %c[r15](%3) \n\t"
1797                 "mov %%cr2, %%rax   \n\t"
1798                 "mov %%rax, %c[cr2](%3) \n\t"
1799                 "mov 0(%%rsp), %3 \n\t"
1800
1801                 "pop  %%rcx; pop  %%r15; pop  %%r14; pop  %%r13; pop  %%r12;"
1802                 "pop  %%r11; pop  %%r10; pop  %%r9;  pop  %%r8;"
1803                 "pop  %%rbp; pop  %%rdi; pop  %%rsi;"
1804                 "pop  %%rdx; pop  %%rbx; pop  %%rax \n\t"
1805 #else
1806                 "xchg %3, 0(%%esp) \n\t"
1807                 "mov %%eax, %c[rax](%3) \n\t"
1808                 "mov %%ebx, %c[rbx](%3) \n\t"
1809                 "pushl 0(%%esp); popl %c[rcx](%3) \n\t"
1810                 "mov %%edx, %c[rdx](%3) \n\t"
1811                 "mov %%esi, %c[rsi](%3) \n\t"
1812                 "mov %%edi, %c[rdi](%3) \n\t"
1813                 "mov %%ebp, %c[rbp](%3) \n\t"
1814                 "mov %%cr2, %%eax  \n\t"
1815                 "mov %%eax, %c[cr2](%3) \n\t"
1816                 "mov 0(%%esp), %3 \n\t"
1817
1818                 "pop %%ecx; popa \n\t"
1819 #endif
1820                 "setbe %0 \n\t"
1821                 "popf \n\t"
1822               : "=g" (fail)
1823               : "r"(vcpu->launched), "d"((unsigned long)HOST_RSP),
1824                 "c"(vcpu),
1825                 [rax]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RAX])),
1826                 [rbx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBX])),
1827                 [rcx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RCX])),
1828                 [rdx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDX])),
1829                 [rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
1830                 [rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
1831                 [rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP])),
1832 #ifdef CONFIG_X86_64
1833                 [r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
1834                 [r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
1835                 [r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
1836                 [r11]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R11])),
1837                 [r12]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R12])),
1838                 [r13]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R13])),
1839                 [r14]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R14])),
1840                 [r15]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R15])),
1841 #endif
1842                 [cr2]"i"(offsetof(struct kvm_vcpu, cr2))
1843               : "cc", "memory" );
1844
1845         ++kvm_stat.exits;
1846
1847         save_msrs(vcpu->guest_msrs, NR_BAD_MSRS);
1848         load_msrs(vcpu->host_msrs, NR_BAD_MSRS);
1849
1850         fx_save(vcpu->guest_fx_image);
1851         fx_restore(vcpu->host_fx_image);
1852
1853 #ifndef CONFIG_X86_64
1854         asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS));
1855 #endif
1856
1857         kvm_run->exit_type = 0;
1858         if (fail) {
1859                 kvm_run->exit_type = KVM_EXIT_TYPE_FAIL_ENTRY;
1860                 kvm_run->exit_reason = vmcs_read32(VM_INSTRUCTION_ERROR);
1861         } else {
1862                 if (fs_gs_ldt_reload_needed) {
1863                         load_ldt(ldt_sel);
1864                         load_fs(fs_sel);
1865                         /*
1866                          * If we have to reload gs, we must take care to
1867                          * preserve our gs base.
1868                          */
1869                         local_irq_disable();
1870                         load_gs(gs_sel);
1871 #ifdef CONFIG_X86_64
1872                         wrmsrl(MSR_GS_BASE, vmcs_readl(HOST_GS_BASE));
1873 #endif
1874                         local_irq_enable();
1875
1876                         reload_tss();
1877                 }
1878                 vcpu->launched = 1;
1879                 kvm_run->exit_type = KVM_EXIT_TYPE_VM_EXIT;
1880                 if (kvm_handle_exit(kvm_run, vcpu)) {
1881                         /* Give scheduler a change to reschedule. */
1882                         if (signal_pending(current)) {
1883                                 ++kvm_stat.signal_exits;
1884                                 return -EINTR;
1885                         }
1886                         kvm_resched(vcpu);
1887                         goto again;
1888                 }
1889         }
1890         return 0;
1891 }
1892
1893 static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
1894 {
1895         vmcs_writel(GUEST_CR3, vmcs_readl(GUEST_CR3));
1896 }
1897
1898 static void vmx_inject_page_fault(struct kvm_vcpu *vcpu,
1899                                   unsigned long addr,
1900                                   u32 err_code)
1901 {
1902         u32 vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1903
1904         ++kvm_stat.pf_guest;
1905
1906         if (is_page_fault(vect_info)) {
1907                 printk(KERN_DEBUG "inject_page_fault: "
1908                        "double fault 0x%lx @ 0x%lx\n",
1909                        addr, vmcs_readl(GUEST_RIP));
1910                 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, 0);
1911                 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1912                              DF_VECTOR |
1913                              INTR_TYPE_EXCEPTION |
1914                              INTR_INFO_DELIEVER_CODE_MASK |
1915                              INTR_INFO_VALID_MASK);
1916                 return;
1917         }
1918         vcpu->cr2 = addr;
1919         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, err_code);
1920         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1921                      PF_VECTOR |
1922                      INTR_TYPE_EXCEPTION |
1923                      INTR_INFO_DELIEVER_CODE_MASK |
1924                      INTR_INFO_VALID_MASK);
1925
1926 }
1927
1928 static void vmx_free_vmcs(struct kvm_vcpu *vcpu)
1929 {
1930         if (vcpu->vmcs) {
1931                 on_each_cpu(__vcpu_clear, vcpu, 0, 1);
1932                 free_vmcs(vcpu->vmcs);
1933                 vcpu->vmcs = NULL;
1934         }
1935 }
1936
1937 static void vmx_free_vcpu(struct kvm_vcpu *vcpu)
1938 {
1939         vmx_free_vmcs(vcpu);
1940 }
1941
1942 static int vmx_create_vcpu(struct kvm_vcpu *vcpu)
1943 {
1944         struct vmcs *vmcs;
1945
1946         vmcs = alloc_vmcs();
1947         if (!vmcs)
1948                 return -ENOMEM;
1949         vmcs_clear(vmcs);
1950         vcpu->vmcs = vmcs;
1951         vcpu->launched = 0;
1952         return 0;
1953 }
1954
1955 static struct kvm_arch_ops vmx_arch_ops = {
1956         .cpu_has_kvm_support = cpu_has_kvm_support,
1957         .disabled_by_bios = vmx_disabled_by_bios,
1958         .hardware_setup = hardware_setup,
1959         .hardware_unsetup = hardware_unsetup,
1960         .hardware_enable = hardware_enable,
1961         .hardware_disable = hardware_disable,
1962
1963         .vcpu_create = vmx_create_vcpu,
1964         .vcpu_free = vmx_free_vcpu,
1965
1966         .vcpu_load = vmx_vcpu_load,
1967         .vcpu_put = vmx_vcpu_put,
1968
1969         .set_guest_debug = set_guest_debug,
1970         .get_msr = vmx_get_msr,
1971         .set_msr = vmx_set_msr,
1972         .get_segment_base = vmx_get_segment_base,
1973         .get_segment = vmx_get_segment,
1974         .set_segment = vmx_set_segment,
1975         .is_long_mode = vmx_is_long_mode,
1976         .get_cs_db_l_bits = vmx_get_cs_db_l_bits,
1977         .set_cr0 = vmx_set_cr0,
1978         .set_cr0_no_modeswitch = vmx_set_cr0_no_modeswitch,
1979         .set_cr3 = vmx_set_cr3,
1980         .set_cr4 = vmx_set_cr4,
1981 #ifdef CONFIG_X86_64
1982         .set_efer = vmx_set_efer,
1983 #endif
1984         .get_idt = vmx_get_idt,
1985         .set_idt = vmx_set_idt,
1986         .get_gdt = vmx_get_gdt,
1987         .set_gdt = vmx_set_gdt,
1988         .cache_regs = vcpu_load_rsp_rip,
1989         .decache_regs = vcpu_put_rsp_rip,
1990         .get_rflags = vmx_get_rflags,
1991         .set_rflags = vmx_set_rflags,
1992
1993         .tlb_flush = vmx_flush_tlb,
1994         .inject_page_fault = vmx_inject_page_fault,
1995
1996         .inject_gp = vmx_inject_gp,
1997
1998         .run = vmx_vcpu_run,
1999         .skip_emulated_instruction = skip_emulated_instruction,
2000         .vcpu_setup = vmx_vcpu_setup,
2001 };
2002
2003 static int __init vmx_init(void)
2004 {
2005         return kvm_init_arch(&vmx_arch_ops, THIS_MODULE);
2006 }
2007
2008 static void __exit vmx_exit(void)
2009 {
2010         kvm_exit_arch();
2011 }
2012
2013 module_init(vmx_init)
2014 module_exit(vmx_exit)