Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/teigland/dlm
[sfrench/cifs-2.6.git] / drivers / kvm / paging_tmpl.h
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * This module enables machines with Intel VT-x extensions to run virtual
5  * machines without emulation or binary translation.
6  *
7  * MMU support
8  *
9  * Copyright (C) 2006 Qumranet, Inc.
10  *
11  * Authors:
12  *   Yaniv Kamay  <yaniv@qumranet.com>
13  *   Avi Kivity   <avi@qumranet.com>
14  *
15  * This work is licensed under the terms of the GNU GPL, version 2.  See
16  * the COPYING file in the top-level directory.
17  *
18  */
19
20 /*
21  * We need the mmu code to access both 32-bit and 64-bit guest ptes,
22  * so the code in this file is compiled twice, once per pte size.
23  */
24
25 #if PTTYPE == 64
26         #define pt_element_t u64
27         #define guest_walker guest_walker64
28         #define FNAME(name) paging##64_##name
29         #define PT_BASE_ADDR_MASK PT64_BASE_ADDR_MASK
30         #define PT_DIR_BASE_ADDR_MASK PT64_DIR_BASE_ADDR_MASK
31         #define PT_INDEX(addr, level) PT64_INDEX(addr, level)
32         #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
33         #define PT_LEVEL_MASK(level) PT64_LEVEL_MASK(level)
34         #ifdef CONFIG_X86_64
35         #define PT_MAX_FULL_LEVELS 4
36         #else
37         #define PT_MAX_FULL_LEVELS 2
38         #endif
39 #elif PTTYPE == 32
40         #define pt_element_t u32
41         #define guest_walker guest_walker32
42         #define FNAME(name) paging##32_##name
43         #define PT_BASE_ADDR_MASK PT32_BASE_ADDR_MASK
44         #define PT_DIR_BASE_ADDR_MASK PT32_DIR_BASE_ADDR_MASK
45         #define PT_INDEX(addr, level) PT32_INDEX(addr, level)
46         #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
47         #define PT_LEVEL_MASK(level) PT32_LEVEL_MASK(level)
48         #define PT_MAX_FULL_LEVELS 2
49 #else
50         #error Invalid PTTYPE value
51 #endif
52
53 /*
54  * The guest_walker structure emulates the behavior of the hardware page
55  * table walker.
56  */
57 struct guest_walker {
58         int level;
59         gfn_t table_gfn[PT_MAX_FULL_LEVELS];
60         pt_element_t *table;
61         pt_element_t pte;
62         pt_element_t *ptep;
63         struct page *page;
64         int index;
65         pt_element_t inherited_ar;
66         gfn_t gfn;
67         u32 error_code;
68 };
69
70 /*
71  * Fetch a guest pte for a guest virtual address
72  */
73 static int FNAME(walk_addr)(struct guest_walker *walker,
74                             struct kvm_vcpu *vcpu, gva_t addr,
75                             int write_fault, int user_fault, int fetch_fault)
76 {
77         hpa_t hpa;
78         struct kvm_memory_slot *slot;
79         pt_element_t *ptep;
80         pt_element_t root;
81         gfn_t table_gfn;
82
83         pgprintk("%s: addr %lx\n", __FUNCTION__, addr);
84         walker->level = vcpu->mmu.root_level;
85         walker->table = NULL;
86         walker->page = NULL;
87         walker->ptep = NULL;
88         root = vcpu->cr3;
89 #if PTTYPE == 64
90         if (!is_long_mode(vcpu)) {
91                 walker->ptep = &vcpu->pdptrs[(addr >> 30) & 3];
92                 root = *walker->ptep;
93                 walker->pte = root;
94                 if (!(root & PT_PRESENT_MASK))
95                         goto not_present;
96                 --walker->level;
97         }
98 #endif
99         table_gfn = (root & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
100         walker->table_gfn[walker->level - 1] = table_gfn;
101         pgprintk("%s: table_gfn[%d] %lx\n", __FUNCTION__,
102                  walker->level - 1, table_gfn);
103         slot = gfn_to_memslot(vcpu->kvm, table_gfn);
104         hpa = safe_gpa_to_hpa(vcpu, root & PT64_BASE_ADDR_MASK);
105         walker->page = pfn_to_page(hpa >> PAGE_SHIFT);
106         walker->table = kmap_atomic(walker->page, KM_USER0);
107
108         ASSERT((!is_long_mode(vcpu) && is_pae(vcpu)) ||
109                (vcpu->cr3 & CR3_NONPAE_RESERVED_BITS) == 0);
110
111         walker->inherited_ar = PT_USER_MASK | PT_WRITABLE_MASK;
112
113         for (;;) {
114                 int index = PT_INDEX(addr, walker->level);
115                 hpa_t paddr;
116
117                 ptep = &walker->table[index];
118                 walker->index = index;
119                 ASSERT(((unsigned long)walker->table & PAGE_MASK) ==
120                        ((unsigned long)ptep & PAGE_MASK));
121
122                 if (!is_present_pte(*ptep))
123                         goto not_present;
124
125                 if (write_fault && !is_writeble_pte(*ptep))
126                         if (user_fault || is_write_protection(vcpu))
127                                 goto access_error;
128
129                 if (user_fault && !(*ptep & PT_USER_MASK))
130                         goto access_error;
131
132 #if PTTYPE == 64
133                 if (fetch_fault && is_nx(vcpu) && (*ptep & PT64_NX_MASK))
134                         goto access_error;
135 #endif
136
137                 if (!(*ptep & PT_ACCESSED_MASK)) {
138                         mark_page_dirty(vcpu->kvm, table_gfn);
139                         *ptep |= PT_ACCESSED_MASK;
140                 }
141
142                 if (walker->level == PT_PAGE_TABLE_LEVEL) {
143                         walker->gfn = (*ptep & PT_BASE_ADDR_MASK)
144                                 >> PAGE_SHIFT;
145                         break;
146                 }
147
148                 if (walker->level == PT_DIRECTORY_LEVEL
149                     && (*ptep & PT_PAGE_SIZE_MASK)
150                     && (PTTYPE == 64 || is_pse(vcpu))) {
151                         walker->gfn = (*ptep & PT_DIR_BASE_ADDR_MASK)
152                                 >> PAGE_SHIFT;
153                         walker->gfn += PT_INDEX(addr, PT_PAGE_TABLE_LEVEL);
154                         break;
155                 }
156
157                 walker->inherited_ar &= walker->table[index];
158                 table_gfn = (*ptep & PT_BASE_ADDR_MASK) >> PAGE_SHIFT;
159                 kunmap_atomic(walker->table, KM_USER0);
160                 paddr = safe_gpa_to_hpa(vcpu, table_gfn << PAGE_SHIFT);
161                 walker->page = pfn_to_page(paddr >> PAGE_SHIFT);
162                 walker->table = kmap_atomic(walker->page, KM_USER0);
163                 --walker->level;
164                 walker->table_gfn[walker->level - 1 ] = table_gfn;
165                 pgprintk("%s: table_gfn[%d] %lx\n", __FUNCTION__,
166                          walker->level - 1, table_gfn);
167         }
168         walker->pte = *ptep;
169         if (walker->page)
170                 walker->ptep = NULL;
171         if (walker->table)
172                 kunmap_atomic(walker->table, KM_USER0);
173         pgprintk("%s: pte %llx\n", __FUNCTION__, (u64)*ptep);
174         return 1;
175
176 not_present:
177         walker->error_code = 0;
178         goto err;
179
180 access_error:
181         walker->error_code = PFERR_PRESENT_MASK;
182
183 err:
184         if (write_fault)
185                 walker->error_code |= PFERR_WRITE_MASK;
186         if (user_fault)
187                 walker->error_code |= PFERR_USER_MASK;
188         if (fetch_fault)
189                 walker->error_code |= PFERR_FETCH_MASK;
190         if (walker->table)
191                 kunmap_atomic(walker->table, KM_USER0);
192         return 0;
193 }
194
195 static void FNAME(mark_pagetable_dirty)(struct kvm *kvm,
196                                         struct guest_walker *walker)
197 {
198         mark_page_dirty(kvm, walker->table_gfn[walker->level - 1]);
199 }
200
201 static void FNAME(set_pte_common)(struct kvm_vcpu *vcpu,
202                                   u64 *shadow_pte,
203                                   gpa_t gaddr,
204                                   pt_element_t gpte,
205                                   u64 access_bits,
206                                   int user_fault,
207                                   int write_fault,
208                                   int *ptwrite,
209                                   struct guest_walker *walker,
210                                   gfn_t gfn)
211 {
212         hpa_t paddr;
213         int dirty = gpte & PT_DIRTY_MASK;
214         u64 spte = *shadow_pte;
215         int was_rmapped = is_rmap_pte(spte);
216
217         pgprintk("%s: spte %llx gpte %llx access %llx write_fault %d"
218                  " user_fault %d gfn %lx\n",
219                  __FUNCTION__, spte, (u64)gpte, access_bits,
220                  write_fault, user_fault, gfn);
221
222         if (write_fault && !dirty) {
223                 pt_element_t *guest_ent, *tmp = NULL;
224
225                 if (walker->ptep)
226                         guest_ent = walker->ptep;
227                 else {
228                         tmp = kmap_atomic(walker->page, KM_USER0);
229                         guest_ent = &tmp[walker->index];
230                 }
231
232                 *guest_ent |= PT_DIRTY_MASK;
233                 if (!walker->ptep)
234                         kunmap_atomic(tmp, KM_USER0);
235                 dirty = 1;
236                 FNAME(mark_pagetable_dirty)(vcpu->kvm, walker);
237         }
238
239         spte |= PT_PRESENT_MASK | PT_ACCESSED_MASK | PT_DIRTY_MASK;
240         spte |= gpte & PT64_NX_MASK;
241         if (!dirty)
242                 access_bits &= ~PT_WRITABLE_MASK;
243
244         paddr = gpa_to_hpa(vcpu, gaddr & PT64_BASE_ADDR_MASK);
245
246         spte |= PT_PRESENT_MASK;
247         if (access_bits & PT_USER_MASK)
248                 spte |= PT_USER_MASK;
249
250         if (is_error_hpa(paddr)) {
251                 spte |= gaddr;
252                 spte |= PT_SHADOW_IO_MARK;
253                 spte &= ~PT_PRESENT_MASK;
254                 set_shadow_pte(shadow_pte, spte);
255                 return;
256         }
257
258         spte |= paddr;
259
260         if ((access_bits & PT_WRITABLE_MASK)
261             || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
262                 struct kvm_mmu_page *shadow;
263
264                 spte |= PT_WRITABLE_MASK;
265                 if (user_fault) {
266                         mmu_unshadow(vcpu, gfn);
267                         goto unshadowed;
268                 }
269
270                 shadow = kvm_mmu_lookup_page(vcpu, gfn);
271                 if (shadow) {
272                         pgprintk("%s: found shadow page for %lx, marking ro\n",
273                                  __FUNCTION__, gfn);
274                         access_bits &= ~PT_WRITABLE_MASK;
275                         if (is_writeble_pte(spte)) {
276                                 spte &= ~PT_WRITABLE_MASK;
277                                 kvm_x86_ops->tlb_flush(vcpu);
278                         }
279                         if (write_fault)
280                                 *ptwrite = 1;
281                 }
282         }
283
284 unshadowed:
285
286         if (access_bits & PT_WRITABLE_MASK)
287                 mark_page_dirty(vcpu->kvm, gaddr >> PAGE_SHIFT);
288
289         set_shadow_pte(shadow_pte, spte);
290         page_header_update_slot(vcpu->kvm, shadow_pte, gaddr);
291         if (!was_rmapped)
292                 rmap_add(vcpu, shadow_pte);
293 }
294
295 static void FNAME(set_pte)(struct kvm_vcpu *vcpu, pt_element_t gpte,
296                            u64 *shadow_pte, u64 access_bits,
297                            int user_fault, int write_fault, int *ptwrite,
298                            struct guest_walker *walker, gfn_t gfn)
299 {
300         access_bits &= gpte;
301         FNAME(set_pte_common)(vcpu, shadow_pte, gpte & PT_BASE_ADDR_MASK,
302                               gpte, access_bits, user_fault, write_fault,
303                               ptwrite, walker, gfn);
304 }
305
306 static void FNAME(update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *page,
307                               u64 *spte, const void *pte, int bytes)
308 {
309         pt_element_t gpte;
310
311         if (bytes < sizeof(pt_element_t))
312                 return;
313         gpte = *(const pt_element_t *)pte;
314         if (~gpte & (PT_PRESENT_MASK | PT_ACCESSED_MASK))
315                 return;
316         pgprintk("%s: gpte %llx spte %p\n", __FUNCTION__, (u64)gpte, spte);
317         FNAME(set_pte)(vcpu, gpte, spte, PT_USER_MASK | PT_WRITABLE_MASK, 0,
318                        0, NULL, NULL,
319                        (gpte & PT_BASE_ADDR_MASK) >> PAGE_SHIFT);
320 }
321
322 static void FNAME(set_pde)(struct kvm_vcpu *vcpu, pt_element_t gpde,
323                            u64 *shadow_pte, u64 access_bits,
324                            int user_fault, int write_fault, int *ptwrite,
325                            struct guest_walker *walker, gfn_t gfn)
326 {
327         gpa_t gaddr;
328
329         access_bits &= gpde;
330         gaddr = (gpa_t)gfn << PAGE_SHIFT;
331         if (PTTYPE == 32 && is_cpuid_PSE36())
332                 gaddr |= (gpde & PT32_DIR_PSE36_MASK) <<
333                         (32 - PT32_DIR_PSE36_SHIFT);
334         FNAME(set_pte_common)(vcpu, shadow_pte, gaddr,
335                               gpde, access_bits, user_fault, write_fault,
336                               ptwrite, walker, gfn);
337 }
338
339 /*
340  * Fetch a shadow pte for a specific level in the paging hierarchy.
341  */
342 static u64 *FNAME(fetch)(struct kvm_vcpu *vcpu, gva_t addr,
343                          struct guest_walker *walker,
344                          int user_fault, int write_fault, int *ptwrite)
345 {
346         hpa_t shadow_addr;
347         int level;
348         u64 *shadow_ent;
349         u64 *prev_shadow_ent = NULL;
350
351         if (!is_present_pte(walker->pte))
352                 return NULL;
353
354         shadow_addr = vcpu->mmu.root_hpa;
355         level = vcpu->mmu.shadow_root_level;
356         if (level == PT32E_ROOT_LEVEL) {
357                 shadow_addr = vcpu->mmu.pae_root[(addr >> 30) & 3];
358                 shadow_addr &= PT64_BASE_ADDR_MASK;
359                 --level;
360         }
361
362         for (; ; level--) {
363                 u32 index = SHADOW_PT_INDEX(addr, level);
364                 struct kvm_mmu_page *shadow_page;
365                 u64 shadow_pte;
366                 int metaphysical;
367                 gfn_t table_gfn;
368                 unsigned hugepage_access = 0;
369
370                 shadow_ent = ((u64 *)__va(shadow_addr)) + index;
371                 if (is_present_pte(*shadow_ent) || is_io_pte(*shadow_ent)) {
372                         if (level == PT_PAGE_TABLE_LEVEL)
373                                 break;
374                         shadow_addr = *shadow_ent & PT64_BASE_ADDR_MASK;
375                         prev_shadow_ent = shadow_ent;
376                         continue;
377                 }
378
379                 if (level == PT_PAGE_TABLE_LEVEL)
380                         break;
381
382                 if (level - 1 == PT_PAGE_TABLE_LEVEL
383                     && walker->level == PT_DIRECTORY_LEVEL) {
384                         metaphysical = 1;
385                         hugepage_access = walker->pte;
386                         hugepage_access &= PT_USER_MASK | PT_WRITABLE_MASK;
387                         if (walker->pte & PT64_NX_MASK)
388                                 hugepage_access |= (1 << 2);
389                         hugepage_access >>= PT_WRITABLE_SHIFT;
390                         table_gfn = (walker->pte & PT_BASE_ADDR_MASK)
391                                 >> PAGE_SHIFT;
392                 } else {
393                         metaphysical = 0;
394                         table_gfn = walker->table_gfn[level - 2];
395                 }
396                 shadow_page = kvm_mmu_get_page(vcpu, table_gfn, addr, level-1,
397                                                metaphysical, hugepage_access,
398                                                shadow_ent);
399                 shadow_addr = __pa(shadow_page->spt);
400                 shadow_pte = shadow_addr | PT_PRESENT_MASK | PT_ACCESSED_MASK
401                         | PT_WRITABLE_MASK | PT_USER_MASK;
402                 *shadow_ent = shadow_pte;
403                 prev_shadow_ent = shadow_ent;
404         }
405
406         if (walker->level == PT_DIRECTORY_LEVEL) {
407                 FNAME(set_pde)(vcpu, walker->pte, shadow_ent,
408                                walker->inherited_ar, user_fault, write_fault,
409                                ptwrite, walker, walker->gfn);
410         } else {
411                 ASSERT(walker->level == PT_PAGE_TABLE_LEVEL);
412                 FNAME(set_pte)(vcpu, walker->pte, shadow_ent,
413                                walker->inherited_ar, user_fault, write_fault,
414                                ptwrite, walker, walker->gfn);
415         }
416         return shadow_ent;
417 }
418
419 /*
420  * Page fault handler.  There are several causes for a page fault:
421  *   - there is no shadow pte for the guest pte
422  *   - write access through a shadow pte marked read only so that we can set
423  *     the dirty bit
424  *   - write access to a shadow pte marked read only so we can update the page
425  *     dirty bitmap, when userspace requests it
426  *   - mmio access; in this case we will never install a present shadow pte
427  *   - normal guest page fault due to the guest pte marked not present, not
428  *     writable, or not executable
429  *
430  *  Returns: 1 if we need to emulate the instruction, 0 otherwise, or
431  *           a negative value on error.
432  */
433 static int FNAME(page_fault)(struct kvm_vcpu *vcpu, gva_t addr,
434                                u32 error_code)
435 {
436         int write_fault = error_code & PFERR_WRITE_MASK;
437         int user_fault = error_code & PFERR_USER_MASK;
438         int fetch_fault = error_code & PFERR_FETCH_MASK;
439         struct guest_walker walker;
440         u64 *shadow_pte;
441         int write_pt = 0;
442         int r;
443
444         pgprintk("%s: addr %lx err %x\n", __FUNCTION__, addr, error_code);
445         kvm_mmu_audit(vcpu, "pre page fault");
446
447         r = mmu_topup_memory_caches(vcpu);
448         if (r)
449                 return r;
450
451         /*
452          * Look up the shadow pte for the faulting address.
453          */
454         r = FNAME(walk_addr)(&walker, vcpu, addr, write_fault, user_fault,
455                              fetch_fault);
456
457         /*
458          * The page is not mapped by the guest.  Let the guest handle it.
459          */
460         if (!r) {
461                 pgprintk("%s: guest page fault\n", __FUNCTION__);
462                 inject_page_fault(vcpu, addr, walker.error_code);
463                 vcpu->last_pt_write_count = 0; /* reset fork detector */
464                 return 0;
465         }
466
467         shadow_pte = FNAME(fetch)(vcpu, addr, &walker, user_fault, write_fault,
468                                   &write_pt);
469         pgprintk("%s: shadow pte %p %llx ptwrite %d\n", __FUNCTION__,
470                  shadow_pte, *shadow_pte, write_pt);
471
472         if (!write_pt)
473                 vcpu->last_pt_write_count = 0; /* reset fork detector */
474
475         /*
476          * mmio: emulate if accessible, otherwise its a guest fault.
477          */
478         if (is_io_pte(*shadow_pte))
479                 return 1;
480
481         ++vcpu->stat.pf_fixed;
482         kvm_mmu_audit(vcpu, "post page fault (fixed)");
483
484         return write_pt;
485 }
486
487 static gpa_t FNAME(gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t vaddr)
488 {
489         struct guest_walker walker;
490         gpa_t gpa = UNMAPPED_GVA;
491         int r;
492
493         r = FNAME(walk_addr)(&walker, vcpu, vaddr, 0, 0, 0);
494
495         if (r) {
496                 gpa = (gpa_t)walker.gfn << PAGE_SHIFT;
497                 gpa |= vaddr & ~PAGE_MASK;
498         }
499
500         return gpa;
501 }
502
503 #undef pt_element_t
504 #undef guest_walker
505 #undef FNAME
506 #undef PT_BASE_ADDR_MASK
507 #undef PT_INDEX
508 #undef SHADOW_PT_INDEX
509 #undef PT_LEVEL_MASK
510 #undef PT_DIR_BASE_ADDR_MASK
511 #undef PT_MAX_FULL_LEVELS