Merge branches 'for-4.8/alps', 'for-4.8/apple', 'for-4.8/i2c-hid', 'for-4.8/uhid...
[sfrench/cifs-2.6.git] / drivers / infiniband / hw / mlx4 / mad.c
1 /*
2  * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  */
32
33 #include <rdma/ib_mad.h>
34 #include <rdma/ib_smi.h>
35 #include <rdma/ib_sa.h>
36 #include <rdma/ib_cache.h>
37
38 #include <linux/random.h>
39 #include <linux/mlx4/cmd.h>
40 #include <linux/gfp.h>
41 #include <rdma/ib_pma.h>
42
43 #include <linux/mlx4/driver.h>
44 #include "mlx4_ib.h"
45
46 enum {
47         MLX4_IB_VENDOR_CLASS1 = 0x9,
48         MLX4_IB_VENDOR_CLASS2 = 0xa
49 };
50
51 #define MLX4_TUN_SEND_WRID_SHIFT 34
52 #define MLX4_TUN_QPN_SHIFT 32
53 #define MLX4_TUN_WRID_RECV (((u64) 1) << MLX4_TUN_SEND_WRID_SHIFT)
54 #define MLX4_TUN_SET_WRID_QPN(a) (((u64) ((a) & 0x3)) << MLX4_TUN_QPN_SHIFT)
55
56 #define MLX4_TUN_IS_RECV(a)  (((a) >>  MLX4_TUN_SEND_WRID_SHIFT) & 0x1)
57 #define MLX4_TUN_WRID_QPN(a) (((a) >> MLX4_TUN_QPN_SHIFT) & 0x3)
58
59  /* Port mgmt change event handling */
60
61 #define GET_BLK_PTR_FROM_EQE(eqe) be32_to_cpu(eqe->event.port_mgmt_change.params.tbl_change_info.block_ptr)
62 #define GET_MASK_FROM_EQE(eqe) be32_to_cpu(eqe->event.port_mgmt_change.params.tbl_change_info.tbl_entries_mask)
63 #define NUM_IDX_IN_PKEY_TBL_BLK 32
64 #define GUID_TBL_ENTRY_SIZE 8      /* size in bytes */
65 #define GUID_TBL_BLK_NUM_ENTRIES 8
66 #define GUID_TBL_BLK_SIZE (GUID_TBL_ENTRY_SIZE * GUID_TBL_BLK_NUM_ENTRIES)
67
68 struct mlx4_mad_rcv_buf {
69         struct ib_grh grh;
70         u8 payload[256];
71 } __packed;
72
73 struct mlx4_mad_snd_buf {
74         u8 payload[256];
75 } __packed;
76
77 struct mlx4_tunnel_mad {
78         struct ib_grh grh;
79         struct mlx4_ib_tunnel_header hdr;
80         struct ib_mad mad;
81 } __packed;
82
83 struct mlx4_rcv_tunnel_mad {
84         struct mlx4_rcv_tunnel_hdr hdr;
85         struct ib_grh grh;
86         struct ib_mad mad;
87 } __packed;
88
89 static void handle_client_rereg_event(struct mlx4_ib_dev *dev, u8 port_num);
90 static void handle_lid_change_event(struct mlx4_ib_dev *dev, u8 port_num);
91 static void __propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
92                                 int block, u32 change_bitmap);
93
94 __be64 mlx4_ib_gen_node_guid(void)
95 {
96 #define NODE_GUID_HI    ((u64) (((u64)IB_OPENIB_OUI) << 40))
97         return cpu_to_be64(NODE_GUID_HI | prandom_u32());
98 }
99
100 __be64 mlx4_ib_get_new_demux_tid(struct mlx4_ib_demux_ctx *ctx)
101 {
102         return cpu_to_be64(atomic_inc_return(&ctx->tid)) |
103                 cpu_to_be64(0xff00000000000000LL);
104 }
105
106 int mlx4_MAD_IFC(struct mlx4_ib_dev *dev, int mad_ifc_flags,
107                  int port, const struct ib_wc *in_wc,
108                  const struct ib_grh *in_grh,
109                  const void *in_mad, void *response_mad)
110 {
111         struct mlx4_cmd_mailbox *inmailbox, *outmailbox;
112         void *inbox;
113         int err;
114         u32 in_modifier = port;
115         u8 op_modifier = 0;
116
117         inmailbox = mlx4_alloc_cmd_mailbox(dev->dev);
118         if (IS_ERR(inmailbox))
119                 return PTR_ERR(inmailbox);
120         inbox = inmailbox->buf;
121
122         outmailbox = mlx4_alloc_cmd_mailbox(dev->dev);
123         if (IS_ERR(outmailbox)) {
124                 mlx4_free_cmd_mailbox(dev->dev, inmailbox);
125                 return PTR_ERR(outmailbox);
126         }
127
128         memcpy(inbox, in_mad, 256);
129
130         /*
131          * Key check traps can't be generated unless we have in_wc to
132          * tell us where to send the trap.
133          */
134         if ((mad_ifc_flags & MLX4_MAD_IFC_IGNORE_MKEY) || !in_wc)
135                 op_modifier |= 0x1;
136         if ((mad_ifc_flags & MLX4_MAD_IFC_IGNORE_BKEY) || !in_wc)
137                 op_modifier |= 0x2;
138         if (mlx4_is_mfunc(dev->dev) &&
139             (mad_ifc_flags & MLX4_MAD_IFC_NET_VIEW || in_wc))
140                 op_modifier |= 0x8;
141
142         if (in_wc) {
143                 struct {
144                         __be32          my_qpn;
145                         u32             reserved1;
146                         __be32          rqpn;
147                         u8              sl;
148                         u8              g_path;
149                         u16             reserved2[2];
150                         __be16          pkey;
151                         u32             reserved3[11];
152                         u8              grh[40];
153                 } *ext_info;
154
155                 memset(inbox + 256, 0, 256);
156                 ext_info = inbox + 256;
157
158                 ext_info->my_qpn = cpu_to_be32(in_wc->qp->qp_num);
159                 ext_info->rqpn   = cpu_to_be32(in_wc->src_qp);
160                 ext_info->sl     = in_wc->sl << 4;
161                 ext_info->g_path = in_wc->dlid_path_bits |
162                         (in_wc->wc_flags & IB_WC_GRH ? 0x80 : 0);
163                 ext_info->pkey   = cpu_to_be16(in_wc->pkey_index);
164
165                 if (in_grh)
166                         memcpy(ext_info->grh, in_grh, 40);
167
168                 op_modifier |= 0x4;
169
170                 in_modifier |= in_wc->slid << 16;
171         }
172
173         err = mlx4_cmd_box(dev->dev, inmailbox->dma, outmailbox->dma, in_modifier,
174                            mlx4_is_master(dev->dev) ? (op_modifier & ~0x8) : op_modifier,
175                            MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C,
176                            (op_modifier & 0x8) ? MLX4_CMD_NATIVE : MLX4_CMD_WRAPPED);
177
178         if (!err)
179                 memcpy(response_mad, outmailbox->buf, 256);
180
181         mlx4_free_cmd_mailbox(dev->dev, inmailbox);
182         mlx4_free_cmd_mailbox(dev->dev, outmailbox);
183
184         return err;
185 }
186
187 static void update_sm_ah(struct mlx4_ib_dev *dev, u8 port_num, u16 lid, u8 sl)
188 {
189         struct ib_ah *new_ah;
190         struct ib_ah_attr ah_attr;
191         unsigned long flags;
192
193         if (!dev->send_agent[port_num - 1][0])
194                 return;
195
196         memset(&ah_attr, 0, sizeof ah_attr);
197         ah_attr.dlid     = lid;
198         ah_attr.sl       = sl;
199         ah_attr.port_num = port_num;
200
201         new_ah = ib_create_ah(dev->send_agent[port_num - 1][0]->qp->pd,
202                               &ah_attr);
203         if (IS_ERR(new_ah))
204                 return;
205
206         spin_lock_irqsave(&dev->sm_lock, flags);
207         if (dev->sm_ah[port_num - 1])
208                 ib_destroy_ah(dev->sm_ah[port_num - 1]);
209         dev->sm_ah[port_num - 1] = new_ah;
210         spin_unlock_irqrestore(&dev->sm_lock, flags);
211 }
212
213 /*
214  * Snoop SM MADs for port info, GUID info, and  P_Key table sets, so we can
215  * synthesize LID change, Client-Rereg, GID change, and P_Key change events.
216  */
217 static void smp_snoop(struct ib_device *ibdev, u8 port_num, const struct ib_mad *mad,
218                       u16 prev_lid)
219 {
220         struct ib_port_info *pinfo;
221         u16 lid;
222         __be16 *base;
223         u32 bn, pkey_change_bitmap;
224         int i;
225
226
227         struct mlx4_ib_dev *dev = to_mdev(ibdev);
228         if ((mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
229              mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
230             mad->mad_hdr.method == IB_MGMT_METHOD_SET)
231                 switch (mad->mad_hdr.attr_id) {
232                 case IB_SMP_ATTR_PORT_INFO:
233                         pinfo = (struct ib_port_info *) ((struct ib_smp *) mad)->data;
234                         lid = be16_to_cpu(pinfo->lid);
235
236                         update_sm_ah(dev, port_num,
237                                      be16_to_cpu(pinfo->sm_lid),
238                                      pinfo->neighbormtu_mastersmsl & 0xf);
239
240                         if (pinfo->clientrereg_resv_subnetto & 0x80)
241                                 handle_client_rereg_event(dev, port_num);
242
243                         if (prev_lid != lid)
244                                 handle_lid_change_event(dev, port_num);
245                         break;
246
247                 case IB_SMP_ATTR_PKEY_TABLE:
248                         if (!mlx4_is_mfunc(dev->dev)) {
249                                 mlx4_ib_dispatch_event(dev, port_num,
250                                                        IB_EVENT_PKEY_CHANGE);
251                                 break;
252                         }
253
254                         /* at this point, we are running in the master.
255                          * Slaves do not receive SMPs.
256                          */
257                         bn  = be32_to_cpu(((struct ib_smp *)mad)->attr_mod) & 0xFFFF;
258                         base = (__be16 *) &(((struct ib_smp *)mad)->data[0]);
259                         pkey_change_bitmap = 0;
260                         for (i = 0; i < 32; i++) {
261                                 pr_debug("PKEY[%d] = x%x\n",
262                                          i + bn*32, be16_to_cpu(base[i]));
263                                 if (be16_to_cpu(base[i]) !=
264                                     dev->pkeys.phys_pkey_cache[port_num - 1][i + bn*32]) {
265                                         pkey_change_bitmap |= (1 << i);
266                                         dev->pkeys.phys_pkey_cache[port_num - 1][i + bn*32] =
267                                                 be16_to_cpu(base[i]);
268                                 }
269                         }
270                         pr_debug("PKEY Change event: port=%d, "
271                                  "block=0x%x, change_bitmap=0x%x\n",
272                                  port_num, bn, pkey_change_bitmap);
273
274                         if (pkey_change_bitmap) {
275                                 mlx4_ib_dispatch_event(dev, port_num,
276                                                        IB_EVENT_PKEY_CHANGE);
277                                 if (!dev->sriov.is_going_down)
278                                         __propagate_pkey_ev(dev, port_num, bn,
279                                                             pkey_change_bitmap);
280                         }
281                         break;
282
283                 case IB_SMP_ATTR_GUID_INFO:
284                         /* paravirtualized master's guid is guid 0 -- does not change */
285                         if (!mlx4_is_master(dev->dev))
286                                 mlx4_ib_dispatch_event(dev, port_num,
287                                                        IB_EVENT_GID_CHANGE);
288                         /*if master, notify relevant slaves*/
289                         if (mlx4_is_master(dev->dev) &&
290                             !dev->sriov.is_going_down) {
291                                 bn = be32_to_cpu(((struct ib_smp *)mad)->attr_mod);
292                                 mlx4_ib_update_cache_on_guid_change(dev, bn, port_num,
293                                                                     (u8 *)(&((struct ib_smp *)mad)->data));
294                                 mlx4_ib_notify_slaves_on_guid_change(dev, bn, port_num,
295                                                                      (u8 *)(&((struct ib_smp *)mad)->data));
296                         }
297                         break;
298
299                 default:
300                         break;
301                 }
302 }
303
304 static void __propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
305                                 int block, u32 change_bitmap)
306 {
307         int i, ix, slave, err;
308         int have_event = 0;
309
310         for (slave = 0; slave < dev->dev->caps.sqp_demux; slave++) {
311                 if (slave == mlx4_master_func_num(dev->dev))
312                         continue;
313                 if (!mlx4_is_slave_active(dev->dev, slave))
314                         continue;
315
316                 have_event = 0;
317                 for (i = 0; i < 32; i++) {
318                         if (!(change_bitmap & (1 << i)))
319                                 continue;
320                         for (ix = 0;
321                              ix < dev->dev->caps.pkey_table_len[port_num]; ix++) {
322                                 if (dev->pkeys.virt2phys_pkey[slave][port_num - 1]
323                                     [ix] == i + 32 * block) {
324                                         err = mlx4_gen_pkey_eqe(dev->dev, slave, port_num);
325                                         pr_debug("propagate_pkey_ev: slave %d,"
326                                                  " port %d, ix %d (%d)\n",
327                                                  slave, port_num, ix, err);
328                                         have_event = 1;
329                                         break;
330                                 }
331                         }
332                         if (have_event)
333                                 break;
334                 }
335         }
336 }
337
338 static void node_desc_override(struct ib_device *dev,
339                                struct ib_mad *mad)
340 {
341         unsigned long flags;
342
343         if ((mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
344              mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
345             mad->mad_hdr.method == IB_MGMT_METHOD_GET_RESP &&
346             mad->mad_hdr.attr_id == IB_SMP_ATTR_NODE_DESC) {
347                 spin_lock_irqsave(&to_mdev(dev)->sm_lock, flags);
348                 memcpy(((struct ib_smp *) mad)->data, dev->node_desc, 64);
349                 spin_unlock_irqrestore(&to_mdev(dev)->sm_lock, flags);
350         }
351 }
352
353 static void forward_trap(struct mlx4_ib_dev *dev, u8 port_num, const struct ib_mad *mad)
354 {
355         int qpn = mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_LID_ROUTED;
356         struct ib_mad_send_buf *send_buf;
357         struct ib_mad_agent *agent = dev->send_agent[port_num - 1][qpn];
358         int ret;
359         unsigned long flags;
360
361         if (agent) {
362                 send_buf = ib_create_send_mad(agent, qpn, 0, 0, IB_MGMT_MAD_HDR,
363                                               IB_MGMT_MAD_DATA, GFP_ATOMIC,
364                                               IB_MGMT_BASE_VERSION);
365                 if (IS_ERR(send_buf))
366                         return;
367                 /*
368                  * We rely here on the fact that MLX QPs don't use the
369                  * address handle after the send is posted (this is
370                  * wrong following the IB spec strictly, but we know
371                  * it's OK for our devices).
372                  */
373                 spin_lock_irqsave(&dev->sm_lock, flags);
374                 memcpy(send_buf->mad, mad, sizeof *mad);
375                 if ((send_buf->ah = dev->sm_ah[port_num - 1]))
376                         ret = ib_post_send_mad(send_buf, NULL);
377                 else
378                         ret = -EINVAL;
379                 spin_unlock_irqrestore(&dev->sm_lock, flags);
380
381                 if (ret)
382                         ib_free_send_mad(send_buf);
383         }
384 }
385
386 static int mlx4_ib_demux_sa_handler(struct ib_device *ibdev, int port, int slave,
387                                                              struct ib_sa_mad *sa_mad)
388 {
389         int ret = 0;
390
391         /* dispatch to different sa handlers */
392         switch (be16_to_cpu(sa_mad->mad_hdr.attr_id)) {
393         case IB_SA_ATTR_MC_MEMBER_REC:
394                 ret = mlx4_ib_mcg_demux_handler(ibdev, port, slave, sa_mad);
395                 break;
396         default:
397                 break;
398         }
399         return ret;
400 }
401
402 int mlx4_ib_find_real_gid(struct ib_device *ibdev, u8 port, __be64 guid)
403 {
404         struct mlx4_ib_dev *dev = to_mdev(ibdev);
405         int i;
406
407         for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
408                 if (dev->sriov.demux[port - 1].guid_cache[i] == guid)
409                         return i;
410         }
411         return -1;
412 }
413
414
415 static int find_slave_port_pkey_ix(struct mlx4_ib_dev *dev, int slave,
416                                    u8 port, u16 pkey, u16 *ix)
417 {
418         int i, ret;
419         u8 unassigned_pkey_ix, pkey_ix, partial_ix = 0xFF;
420         u16 slot_pkey;
421
422         if (slave == mlx4_master_func_num(dev->dev))
423                 return ib_find_cached_pkey(&dev->ib_dev, port, pkey, ix);
424
425         unassigned_pkey_ix = dev->dev->phys_caps.pkey_phys_table_len[port] - 1;
426
427         for (i = 0; i < dev->dev->caps.pkey_table_len[port]; i++) {
428                 if (dev->pkeys.virt2phys_pkey[slave][port - 1][i] == unassigned_pkey_ix)
429                         continue;
430
431                 pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][i];
432
433                 ret = ib_get_cached_pkey(&dev->ib_dev, port, pkey_ix, &slot_pkey);
434                 if (ret)
435                         continue;
436                 if ((slot_pkey & 0x7FFF) == (pkey & 0x7FFF)) {
437                         if (slot_pkey & 0x8000) {
438                                 *ix = (u16) pkey_ix;
439                                 return 0;
440                         } else {
441                                 /* take first partial pkey index found */
442                                 if (partial_ix == 0xFF)
443                                         partial_ix = pkey_ix;
444                         }
445                 }
446         }
447
448         if (partial_ix < 0xFF) {
449                 *ix = (u16) partial_ix;
450                 return 0;
451         }
452
453         return -EINVAL;
454 }
455
456 int mlx4_ib_send_to_slave(struct mlx4_ib_dev *dev, int slave, u8 port,
457                           enum ib_qp_type dest_qpt, struct ib_wc *wc,
458                           struct ib_grh *grh, struct ib_mad *mad)
459 {
460         struct ib_sge list;
461         struct ib_ud_wr wr;
462         struct ib_send_wr *bad_wr;
463         struct mlx4_ib_demux_pv_ctx *tun_ctx;
464         struct mlx4_ib_demux_pv_qp *tun_qp;
465         struct mlx4_rcv_tunnel_mad *tun_mad;
466         struct ib_ah_attr attr;
467         struct ib_ah *ah;
468         struct ib_qp *src_qp = NULL;
469         unsigned tun_tx_ix = 0;
470         int dqpn;
471         int ret = 0;
472         u16 tun_pkey_ix;
473         u16 cached_pkey;
474         u8 is_eth = dev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
475
476         if (dest_qpt > IB_QPT_GSI)
477                 return -EINVAL;
478
479         tun_ctx = dev->sriov.demux[port-1].tun[slave];
480
481         /* check if proxy qp created */
482         if (!tun_ctx || tun_ctx->state != DEMUX_PV_STATE_ACTIVE)
483                 return -EAGAIN;
484
485         if (!dest_qpt)
486                 tun_qp = &tun_ctx->qp[0];
487         else
488                 tun_qp = &tun_ctx->qp[1];
489
490         /* compute P_Key index to put in tunnel header for slave */
491         if (dest_qpt) {
492                 u16 pkey_ix;
493                 ret = ib_get_cached_pkey(&dev->ib_dev, port, wc->pkey_index, &cached_pkey);
494                 if (ret)
495                         return -EINVAL;
496
497                 ret = find_slave_port_pkey_ix(dev, slave, port, cached_pkey, &pkey_ix);
498                 if (ret)
499                         return -EINVAL;
500                 tun_pkey_ix = pkey_ix;
501         } else
502                 tun_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][0];
503
504         dqpn = dev->dev->phys_caps.base_proxy_sqpn + 8 * slave + port + (dest_qpt * 2) - 1;
505
506         /* get tunnel tx data buf for slave */
507         src_qp = tun_qp->qp;
508
509         /* create ah. Just need an empty one with the port num for the post send.
510          * The driver will set the force loopback bit in post_send */
511         memset(&attr, 0, sizeof attr);
512         attr.port_num = port;
513         if (is_eth) {
514                 memcpy(&attr.grh.dgid.raw[0], &grh->dgid.raw[0], 16);
515                 attr.ah_flags = IB_AH_GRH;
516         }
517         ah = ib_create_ah(tun_ctx->pd, &attr);
518         if (IS_ERR(ah))
519                 return -ENOMEM;
520
521         /* allocate tunnel tx buf after pass failure returns */
522         spin_lock(&tun_qp->tx_lock);
523         if (tun_qp->tx_ix_head - tun_qp->tx_ix_tail >=
524             (MLX4_NUM_TUNNEL_BUFS - 1))
525                 ret = -EAGAIN;
526         else
527                 tun_tx_ix = (++tun_qp->tx_ix_head) & (MLX4_NUM_TUNNEL_BUFS - 1);
528         spin_unlock(&tun_qp->tx_lock);
529         if (ret)
530                 goto end;
531
532         tun_mad = (struct mlx4_rcv_tunnel_mad *) (tun_qp->tx_ring[tun_tx_ix].buf.addr);
533         if (tun_qp->tx_ring[tun_tx_ix].ah)
534                 ib_destroy_ah(tun_qp->tx_ring[tun_tx_ix].ah);
535         tun_qp->tx_ring[tun_tx_ix].ah = ah;
536         ib_dma_sync_single_for_cpu(&dev->ib_dev,
537                                    tun_qp->tx_ring[tun_tx_ix].buf.map,
538                                    sizeof (struct mlx4_rcv_tunnel_mad),
539                                    DMA_TO_DEVICE);
540
541         /* copy over to tunnel buffer */
542         if (grh)
543                 memcpy(&tun_mad->grh, grh, sizeof *grh);
544         memcpy(&tun_mad->mad, mad, sizeof *mad);
545
546         /* adjust tunnel data */
547         tun_mad->hdr.pkey_index = cpu_to_be16(tun_pkey_ix);
548         tun_mad->hdr.flags_src_qp = cpu_to_be32(wc->src_qp & 0xFFFFFF);
549         tun_mad->hdr.g_ml_path = (grh && (wc->wc_flags & IB_WC_GRH)) ? 0x80 : 0;
550
551         if (is_eth) {
552                 u16 vlan = 0;
553                 if (mlx4_get_slave_default_vlan(dev->dev, port, slave, &vlan,
554                                                 NULL)) {
555                         /* VST mode */
556                         if (vlan != wc->vlan_id)
557                                 /* Packet vlan is not the VST-assigned vlan.
558                                  * Drop the packet.
559                                  */
560                                 goto out;
561                          else
562                                 /* Remove the vlan tag before forwarding
563                                  * the packet to the VF.
564                                  */
565                                 vlan = 0xffff;
566                 } else {
567                         vlan = wc->vlan_id;
568                 }
569
570                 tun_mad->hdr.sl_vid = cpu_to_be16(vlan);
571                 memcpy((char *)&tun_mad->hdr.mac_31_0, &(wc->smac[0]), 4);
572                 memcpy((char *)&tun_mad->hdr.slid_mac_47_32, &(wc->smac[4]), 2);
573         } else {
574                 tun_mad->hdr.sl_vid = cpu_to_be16(((u16)(wc->sl)) << 12);
575                 tun_mad->hdr.slid_mac_47_32 = cpu_to_be16(wc->slid);
576         }
577
578         ib_dma_sync_single_for_device(&dev->ib_dev,
579                                       tun_qp->tx_ring[tun_tx_ix].buf.map,
580                                       sizeof (struct mlx4_rcv_tunnel_mad),
581                                       DMA_TO_DEVICE);
582
583         list.addr = tun_qp->tx_ring[tun_tx_ix].buf.map;
584         list.length = sizeof (struct mlx4_rcv_tunnel_mad);
585         list.lkey = tun_ctx->pd->local_dma_lkey;
586
587         wr.ah = ah;
588         wr.port_num = port;
589         wr.remote_qkey = IB_QP_SET_QKEY;
590         wr.remote_qpn = dqpn;
591         wr.wr.next = NULL;
592         wr.wr.wr_id = ((u64) tun_tx_ix) | MLX4_TUN_SET_WRID_QPN(dest_qpt);
593         wr.wr.sg_list = &list;
594         wr.wr.num_sge = 1;
595         wr.wr.opcode = IB_WR_SEND;
596         wr.wr.send_flags = IB_SEND_SIGNALED;
597
598         ret = ib_post_send(src_qp, &wr.wr, &bad_wr);
599         if (!ret)
600                 return 0;
601  out:
602         spin_lock(&tun_qp->tx_lock);
603         tun_qp->tx_ix_tail++;
604         spin_unlock(&tun_qp->tx_lock);
605         tun_qp->tx_ring[tun_tx_ix].ah = NULL;
606 end:
607         ib_destroy_ah(ah);
608         return ret;
609 }
610
611 static int mlx4_ib_demux_mad(struct ib_device *ibdev, u8 port,
612                         struct ib_wc *wc, struct ib_grh *grh,
613                         struct ib_mad *mad)
614 {
615         struct mlx4_ib_dev *dev = to_mdev(ibdev);
616         int err, other_port;
617         int slave = -1;
618         u8 *slave_id;
619         int is_eth = 0;
620
621         if (rdma_port_get_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND)
622                 is_eth = 0;
623         else
624                 is_eth = 1;
625
626         if (is_eth) {
627                 if (!(wc->wc_flags & IB_WC_GRH)) {
628                         mlx4_ib_warn(ibdev, "RoCE grh not present.\n");
629                         return -EINVAL;
630                 }
631                 if (mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_CM) {
632                         mlx4_ib_warn(ibdev, "RoCE mgmt class is not CM\n");
633                         return -EINVAL;
634                 }
635                 err = mlx4_get_slave_from_roce_gid(dev->dev, port, grh->dgid.raw, &slave);
636                 if (err && mlx4_is_mf_bonded(dev->dev)) {
637                         other_port = (port == 1) ? 2 : 1;
638                         err = mlx4_get_slave_from_roce_gid(dev->dev, other_port, grh->dgid.raw, &slave);
639                         if (!err) {
640                                 port = other_port;
641                                 pr_debug("resolved slave %d from gid %pI6 wire port %d other %d\n",
642                                          slave, grh->dgid.raw, port, other_port);
643                         }
644                 }
645                 if (err) {
646                         mlx4_ib_warn(ibdev, "failed matching grh\n");
647                         return -ENOENT;
648                 }
649                 if (slave >= dev->dev->caps.sqp_demux) {
650                         mlx4_ib_warn(ibdev, "slave id: %d is bigger than allowed:%d\n",
651                                      slave, dev->dev->caps.sqp_demux);
652                         return -ENOENT;
653                 }
654
655                 if (mlx4_ib_demux_cm_handler(ibdev, port, NULL, mad))
656                         return 0;
657
658                 err = mlx4_ib_send_to_slave(dev, slave, port, wc->qp->qp_type, wc, grh, mad);
659                 if (err)
660                         pr_debug("failed sending to slave %d via tunnel qp (%d)\n",
661                                  slave, err);
662                 return 0;
663         }
664
665         /* Initially assume that this mad is for us */
666         slave = mlx4_master_func_num(dev->dev);
667
668         /* See if the slave id is encoded in a response mad */
669         if (mad->mad_hdr.method & 0x80) {
670                 slave_id = (u8 *) &mad->mad_hdr.tid;
671                 slave = *slave_id;
672                 if (slave != 255) /*255 indicates the dom0*/
673                         *slave_id = 0; /* remap tid */
674         }
675
676         /* If a grh is present, we demux according to it */
677         if (wc->wc_flags & IB_WC_GRH) {
678                 slave = mlx4_ib_find_real_gid(ibdev, port, grh->dgid.global.interface_id);
679                 if (slave < 0) {
680                         mlx4_ib_warn(ibdev, "failed matching grh\n");
681                         return -ENOENT;
682                 }
683         }
684         /* Class-specific handling */
685         switch (mad->mad_hdr.mgmt_class) {
686         case IB_MGMT_CLASS_SUBN_LID_ROUTED:
687         case IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE:
688                 /* 255 indicates the dom0 */
689                 if (slave != 255 && slave != mlx4_master_func_num(dev->dev)) {
690                         if (!mlx4_vf_smi_enabled(dev->dev, slave, port))
691                                 return -EPERM;
692                         /* for a VF. drop unsolicited MADs */
693                         if (!(mad->mad_hdr.method & IB_MGMT_METHOD_RESP)) {
694                                 mlx4_ib_warn(ibdev, "demux QP0. rejecting unsolicited mad for slave %d class 0x%x, method 0x%x\n",
695                                              slave, mad->mad_hdr.mgmt_class,
696                                              mad->mad_hdr.method);
697                                 return -EINVAL;
698                         }
699                 }
700                 break;
701         case IB_MGMT_CLASS_SUBN_ADM:
702                 if (mlx4_ib_demux_sa_handler(ibdev, port, slave,
703                                              (struct ib_sa_mad *) mad))
704                         return 0;
705                 break;
706         case IB_MGMT_CLASS_CM:
707                 if (mlx4_ib_demux_cm_handler(ibdev, port, &slave, mad))
708                         return 0;
709                 break;
710         case IB_MGMT_CLASS_DEVICE_MGMT:
711                 if (mad->mad_hdr.method != IB_MGMT_METHOD_GET_RESP)
712                         return 0;
713                 break;
714         default:
715                 /* Drop unsupported classes for slaves in tunnel mode */
716                 if (slave != mlx4_master_func_num(dev->dev)) {
717                         pr_debug("dropping unsupported ingress mad from class:%d "
718                                  "for slave:%d\n", mad->mad_hdr.mgmt_class, slave);
719                         return 0;
720                 }
721         }
722         /*make sure that no slave==255 was not handled yet.*/
723         if (slave >= dev->dev->caps.sqp_demux) {
724                 mlx4_ib_warn(ibdev, "slave id: %d is bigger than allowed:%d\n",
725                              slave, dev->dev->caps.sqp_demux);
726                 return -ENOENT;
727         }
728
729         err = mlx4_ib_send_to_slave(dev, slave, port, wc->qp->qp_type, wc, grh, mad);
730         if (err)
731                 pr_debug("failed sending to slave %d via tunnel qp (%d)\n",
732                          slave, err);
733         return 0;
734 }
735
736 static int ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
737                         const struct ib_wc *in_wc, const struct ib_grh *in_grh,
738                         const struct ib_mad *in_mad, struct ib_mad *out_mad)
739 {
740         u16 slid, prev_lid = 0;
741         int err;
742         struct ib_port_attr pattr;
743
744         if (in_wc && in_wc->qp->qp_num) {
745                 pr_debug("received MAD: slid:%d sqpn:%d "
746                         "dlid_bits:%d dqpn:%d wc_flags:0x%x, cls %x, mtd %x, atr %x\n",
747                         in_wc->slid, in_wc->src_qp,
748                         in_wc->dlid_path_bits,
749                         in_wc->qp->qp_num,
750                         in_wc->wc_flags,
751                         in_mad->mad_hdr.mgmt_class, in_mad->mad_hdr.method,
752                         be16_to_cpu(in_mad->mad_hdr.attr_id));
753                 if (in_wc->wc_flags & IB_WC_GRH) {
754                         pr_debug("sgid_hi:0x%016llx sgid_lo:0x%016llx\n",
755                                  be64_to_cpu(in_grh->sgid.global.subnet_prefix),
756                                  be64_to_cpu(in_grh->sgid.global.interface_id));
757                         pr_debug("dgid_hi:0x%016llx dgid_lo:0x%016llx\n",
758                                  be64_to_cpu(in_grh->dgid.global.subnet_prefix),
759                                  be64_to_cpu(in_grh->dgid.global.interface_id));
760                 }
761         }
762
763         slid = in_wc ? in_wc->slid : be16_to_cpu(IB_LID_PERMISSIVE);
764
765         if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP && slid == 0) {
766                 forward_trap(to_mdev(ibdev), port_num, in_mad);
767                 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
768         }
769
770         if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
771             in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) {
772                 if (in_mad->mad_hdr.method   != IB_MGMT_METHOD_GET &&
773                     in_mad->mad_hdr.method   != IB_MGMT_METHOD_SET &&
774                     in_mad->mad_hdr.method   != IB_MGMT_METHOD_TRAP_REPRESS)
775                         return IB_MAD_RESULT_SUCCESS;
776
777                 /*
778                  * Don't process SMInfo queries -- the SMA can't handle them.
779                  */
780                 if (in_mad->mad_hdr.attr_id == IB_SMP_ATTR_SM_INFO)
781                         return IB_MAD_RESULT_SUCCESS;
782         } else if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT ||
783                    in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS1   ||
784                    in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS2   ||
785                    in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_CONG_MGMT) {
786                 if (in_mad->mad_hdr.method  != IB_MGMT_METHOD_GET &&
787                     in_mad->mad_hdr.method  != IB_MGMT_METHOD_SET)
788                         return IB_MAD_RESULT_SUCCESS;
789         } else
790                 return IB_MAD_RESULT_SUCCESS;
791
792         if ((in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
793              in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
794             in_mad->mad_hdr.method == IB_MGMT_METHOD_SET &&
795             in_mad->mad_hdr.attr_id == IB_SMP_ATTR_PORT_INFO &&
796             !ib_query_port(ibdev, port_num, &pattr))
797                 prev_lid = pattr.lid;
798
799         err = mlx4_MAD_IFC(to_mdev(ibdev),
800                            (mad_flags & IB_MAD_IGNORE_MKEY ? MLX4_MAD_IFC_IGNORE_MKEY : 0) |
801                            (mad_flags & IB_MAD_IGNORE_BKEY ? MLX4_MAD_IFC_IGNORE_BKEY : 0) |
802                            MLX4_MAD_IFC_NET_VIEW,
803                            port_num, in_wc, in_grh, in_mad, out_mad);
804         if (err)
805                 return IB_MAD_RESULT_FAILURE;
806
807         if (!out_mad->mad_hdr.status) {
808                 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV))
809                         smp_snoop(ibdev, port_num, in_mad, prev_lid);
810                 /* slaves get node desc from FW */
811                 if (!mlx4_is_slave(to_mdev(ibdev)->dev))
812                         node_desc_override(ibdev, out_mad);
813         }
814
815         /* set return bit in status of directed route responses */
816         if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
817                 out_mad->mad_hdr.status |= cpu_to_be16(1 << 15);
818
819         if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP_REPRESS)
820                 /* no response for trap repress */
821                 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
822
823         return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
824 }
825
826 static void edit_counter(struct mlx4_counter *cnt, void *counters,
827                          __be16 attr_id)
828 {
829         switch (attr_id) {
830         case IB_PMA_PORT_COUNTERS:
831         {
832                 struct ib_pma_portcounters *pma_cnt =
833                         (struct ib_pma_portcounters *)counters;
834
835                 ASSIGN_32BIT_COUNTER(pma_cnt->port_xmit_data,
836                                      (be64_to_cpu(cnt->tx_bytes) >> 2));
837                 ASSIGN_32BIT_COUNTER(pma_cnt->port_rcv_data,
838                                      (be64_to_cpu(cnt->rx_bytes) >> 2));
839                 ASSIGN_32BIT_COUNTER(pma_cnt->port_xmit_packets,
840                                      be64_to_cpu(cnt->tx_frames));
841                 ASSIGN_32BIT_COUNTER(pma_cnt->port_rcv_packets,
842                                      be64_to_cpu(cnt->rx_frames));
843                 break;
844         }
845         case IB_PMA_PORT_COUNTERS_EXT:
846         {
847                 struct ib_pma_portcounters_ext *pma_cnt_ext =
848                         (struct ib_pma_portcounters_ext *)counters;
849
850                 pma_cnt_ext->port_xmit_data =
851                         cpu_to_be64(be64_to_cpu(cnt->tx_bytes) >> 2);
852                 pma_cnt_ext->port_rcv_data =
853                         cpu_to_be64(be64_to_cpu(cnt->rx_bytes) >> 2);
854                 pma_cnt_ext->port_xmit_packets = cnt->tx_frames;
855                 pma_cnt_ext->port_rcv_packets = cnt->rx_frames;
856                 break;
857         }
858         }
859 }
860
861 static int iboe_process_mad_port_info(void *out_mad)
862 {
863         struct ib_class_port_info cpi = {};
864
865         cpi.capability_mask = IB_PMA_CLASS_CAP_EXT_WIDTH;
866         memcpy(out_mad, &cpi, sizeof(cpi));
867         return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
868 }
869
870 static int iboe_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
871                         const struct ib_wc *in_wc, const struct ib_grh *in_grh,
872                         const struct ib_mad *in_mad, struct ib_mad *out_mad)
873 {
874         struct mlx4_counter counter_stats;
875         struct mlx4_ib_dev *dev = to_mdev(ibdev);
876         struct counter_index *tmp_counter;
877         int err = IB_MAD_RESULT_FAILURE, stats_avail = 0;
878
879         if (in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_PERF_MGMT)
880                 return -EINVAL;
881
882         if (in_mad->mad_hdr.attr_id == IB_PMA_CLASS_PORT_INFO)
883                 return iboe_process_mad_port_info((void *)(out_mad->data + 40));
884
885         memset(&counter_stats, 0, sizeof(counter_stats));
886         mutex_lock(&dev->counters_table[port_num - 1].mutex);
887         list_for_each_entry(tmp_counter,
888                             &dev->counters_table[port_num - 1].counters_list,
889                             list) {
890                 err = mlx4_get_counter_stats(dev->dev,
891                                              tmp_counter->index,
892                                              &counter_stats, 0);
893                 if (err) {
894                         err = IB_MAD_RESULT_FAILURE;
895                         stats_avail = 0;
896                         break;
897                 }
898                 stats_avail = 1;
899         }
900         mutex_unlock(&dev->counters_table[port_num - 1].mutex);
901         if (stats_avail) {
902                 memset(out_mad->data, 0, sizeof out_mad->data);
903                 switch (counter_stats.counter_mode & 0xf) {
904                 case 0:
905                         edit_counter(&counter_stats,
906                                      (void *)(out_mad->data + 40),
907                                      in_mad->mad_hdr.attr_id);
908                         err = IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
909                         break;
910                 default:
911                         err = IB_MAD_RESULT_FAILURE;
912                 }
913         }
914
915         return err;
916 }
917
918 int mlx4_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
919                         const struct ib_wc *in_wc, const struct ib_grh *in_grh,
920                         const struct ib_mad_hdr *in, size_t in_mad_size,
921                         struct ib_mad_hdr *out, size_t *out_mad_size,
922                         u16 *out_mad_pkey_index)
923 {
924         struct mlx4_ib_dev *dev = to_mdev(ibdev);
925         const struct ib_mad *in_mad = (const struct ib_mad *)in;
926         struct ib_mad *out_mad = (struct ib_mad *)out;
927         enum rdma_link_layer link = rdma_port_get_link_layer(ibdev, port_num);
928
929         if (WARN_ON_ONCE(in_mad_size != sizeof(*in_mad) ||
930                          *out_mad_size != sizeof(*out_mad)))
931                 return IB_MAD_RESULT_FAILURE;
932
933         /* iboe_process_mad() which uses the HCA flow-counters to implement IB PMA
934          * queries, should be called only by VFs and for that specific purpose
935          */
936         if (link == IB_LINK_LAYER_INFINIBAND) {
937                 if (mlx4_is_slave(dev->dev) &&
938                     (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT &&
939                      (in_mad->mad_hdr.attr_id == IB_PMA_PORT_COUNTERS ||
940                       in_mad->mad_hdr.attr_id == IB_PMA_PORT_COUNTERS_EXT ||
941                       in_mad->mad_hdr.attr_id == IB_PMA_CLASS_PORT_INFO)))
942                         return iboe_process_mad(ibdev, mad_flags, port_num, in_wc,
943                                                 in_grh, in_mad, out_mad);
944
945                 return ib_process_mad(ibdev, mad_flags, port_num, in_wc,
946                                       in_grh, in_mad, out_mad);
947         }
948
949         if (link == IB_LINK_LAYER_ETHERNET)
950                 return iboe_process_mad(ibdev, mad_flags, port_num, in_wc,
951                                         in_grh, in_mad, out_mad);
952
953         return -EINVAL;
954 }
955
956 static void send_handler(struct ib_mad_agent *agent,
957                          struct ib_mad_send_wc *mad_send_wc)
958 {
959         if (mad_send_wc->send_buf->context[0])
960                 ib_destroy_ah(mad_send_wc->send_buf->context[0]);
961         ib_free_send_mad(mad_send_wc->send_buf);
962 }
963
964 int mlx4_ib_mad_init(struct mlx4_ib_dev *dev)
965 {
966         struct ib_mad_agent *agent;
967         int p, q;
968         int ret;
969         enum rdma_link_layer ll;
970
971         for (p = 0; p < dev->num_ports; ++p) {
972                 ll = rdma_port_get_link_layer(&dev->ib_dev, p + 1);
973                 for (q = 0; q <= 1; ++q) {
974                         if (ll == IB_LINK_LAYER_INFINIBAND) {
975                                 agent = ib_register_mad_agent(&dev->ib_dev, p + 1,
976                                                               q ? IB_QPT_GSI : IB_QPT_SMI,
977                                                               NULL, 0, send_handler,
978                                                               NULL, NULL, 0);
979                                 if (IS_ERR(agent)) {
980                                         ret = PTR_ERR(agent);
981                                         goto err;
982                                 }
983                                 dev->send_agent[p][q] = agent;
984                         } else
985                                 dev->send_agent[p][q] = NULL;
986                 }
987         }
988
989         return 0;
990
991 err:
992         for (p = 0; p < dev->num_ports; ++p)
993                 for (q = 0; q <= 1; ++q)
994                         if (dev->send_agent[p][q])
995                                 ib_unregister_mad_agent(dev->send_agent[p][q]);
996
997         return ret;
998 }
999
1000 void mlx4_ib_mad_cleanup(struct mlx4_ib_dev *dev)
1001 {
1002         struct ib_mad_agent *agent;
1003         int p, q;
1004
1005         for (p = 0; p < dev->num_ports; ++p) {
1006                 for (q = 0; q <= 1; ++q) {
1007                         agent = dev->send_agent[p][q];
1008                         if (agent) {
1009                                 dev->send_agent[p][q] = NULL;
1010                                 ib_unregister_mad_agent(agent);
1011                         }
1012                 }
1013
1014                 if (dev->sm_ah[p])
1015                         ib_destroy_ah(dev->sm_ah[p]);
1016         }
1017 }
1018
1019 static void handle_lid_change_event(struct mlx4_ib_dev *dev, u8 port_num)
1020 {
1021         mlx4_ib_dispatch_event(dev, port_num, IB_EVENT_LID_CHANGE);
1022
1023         if (mlx4_is_master(dev->dev) && !dev->sriov.is_going_down)
1024                 mlx4_gen_slaves_port_mgt_ev(dev->dev, port_num,
1025                                             MLX4_EQ_PORT_INFO_LID_CHANGE_MASK);
1026 }
1027
1028 static void handle_client_rereg_event(struct mlx4_ib_dev *dev, u8 port_num)
1029 {
1030         /* re-configure the alias-guid and mcg's */
1031         if (mlx4_is_master(dev->dev)) {
1032                 mlx4_ib_invalidate_all_guid_record(dev, port_num);
1033
1034                 if (!dev->sriov.is_going_down) {
1035                         mlx4_ib_mcg_port_cleanup(&dev->sriov.demux[port_num - 1], 0);
1036                         mlx4_gen_slaves_port_mgt_ev(dev->dev, port_num,
1037                                                     MLX4_EQ_PORT_INFO_CLIENT_REREG_MASK);
1038                 }
1039         }
1040         mlx4_ib_dispatch_event(dev, port_num, IB_EVENT_CLIENT_REREGISTER);
1041 }
1042
1043 static void propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
1044                               struct mlx4_eqe *eqe)
1045 {
1046         __propagate_pkey_ev(dev, port_num, GET_BLK_PTR_FROM_EQE(eqe),
1047                             GET_MASK_FROM_EQE(eqe));
1048 }
1049
1050 static void handle_slaves_guid_change(struct mlx4_ib_dev *dev, u8 port_num,
1051                                       u32 guid_tbl_blk_num, u32 change_bitmap)
1052 {
1053         struct ib_smp *in_mad  = NULL;
1054         struct ib_smp *out_mad  = NULL;
1055         u16 i;
1056
1057         if (!mlx4_is_mfunc(dev->dev) || !mlx4_is_master(dev->dev))
1058                 return;
1059
1060         in_mad  = kmalloc(sizeof *in_mad, GFP_KERNEL);
1061         out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
1062         if (!in_mad || !out_mad) {
1063                 mlx4_ib_warn(&dev->ib_dev, "failed to allocate memory for guid info mads\n");
1064                 goto out;
1065         }
1066
1067         guid_tbl_blk_num  *= 4;
1068
1069         for (i = 0; i < 4; i++) {
1070                 if (change_bitmap && (!((change_bitmap >> (8 * i)) & 0xff)))
1071                         continue;
1072                 memset(in_mad, 0, sizeof *in_mad);
1073                 memset(out_mad, 0, sizeof *out_mad);
1074
1075                 in_mad->base_version  = 1;
1076                 in_mad->mgmt_class    = IB_MGMT_CLASS_SUBN_LID_ROUTED;
1077                 in_mad->class_version = 1;
1078                 in_mad->method        = IB_MGMT_METHOD_GET;
1079                 in_mad->attr_id       = IB_SMP_ATTR_GUID_INFO;
1080                 in_mad->attr_mod      = cpu_to_be32(guid_tbl_blk_num + i);
1081
1082                 if (mlx4_MAD_IFC(dev,
1083                                  MLX4_MAD_IFC_IGNORE_KEYS | MLX4_MAD_IFC_NET_VIEW,
1084                                  port_num, NULL, NULL, in_mad, out_mad)) {
1085                         mlx4_ib_warn(&dev->ib_dev, "Failed in get GUID INFO MAD_IFC\n");
1086                         goto out;
1087                 }
1088
1089                 mlx4_ib_update_cache_on_guid_change(dev, guid_tbl_blk_num + i,
1090                                                     port_num,
1091                                                     (u8 *)(&((struct ib_smp *)out_mad)->data));
1092                 mlx4_ib_notify_slaves_on_guid_change(dev, guid_tbl_blk_num + i,
1093                                                      port_num,
1094                                                      (u8 *)(&((struct ib_smp *)out_mad)->data));
1095         }
1096
1097 out:
1098         kfree(in_mad);
1099         kfree(out_mad);
1100         return;
1101 }
1102
1103 void handle_port_mgmt_change_event(struct work_struct *work)
1104 {
1105         struct ib_event_work *ew = container_of(work, struct ib_event_work, work);
1106         struct mlx4_ib_dev *dev = ew->ib_dev;
1107         struct mlx4_eqe *eqe = &(ew->ib_eqe);
1108         u8 port = eqe->event.port_mgmt_change.port;
1109         u32 changed_attr;
1110         u32 tbl_block;
1111         u32 change_bitmap;
1112
1113         switch (eqe->subtype) {
1114         case MLX4_DEV_PMC_SUBTYPE_PORT_INFO:
1115                 changed_attr = be32_to_cpu(eqe->event.port_mgmt_change.params.port_info.changed_attr);
1116
1117                 /* Update the SM ah - This should be done before handling
1118                    the other changed attributes so that MADs can be sent to the SM */
1119                 if (changed_attr & MSTR_SM_CHANGE_MASK) {
1120                         u16 lid = be16_to_cpu(eqe->event.port_mgmt_change.params.port_info.mstr_sm_lid);
1121                         u8 sl = eqe->event.port_mgmt_change.params.port_info.mstr_sm_sl & 0xf;
1122                         update_sm_ah(dev, port, lid, sl);
1123                 }
1124
1125                 /* Check if it is a lid change event */
1126                 if (changed_attr & MLX4_EQ_PORT_INFO_LID_CHANGE_MASK)
1127                         handle_lid_change_event(dev, port);
1128
1129                 /* Generate GUID changed event */
1130                 if (changed_attr & MLX4_EQ_PORT_INFO_GID_PFX_CHANGE_MASK) {
1131                         mlx4_ib_dispatch_event(dev, port, IB_EVENT_GID_CHANGE);
1132                         /*if master, notify all slaves*/
1133                         if (mlx4_is_master(dev->dev))
1134                                 mlx4_gen_slaves_port_mgt_ev(dev->dev, port,
1135                                                             MLX4_EQ_PORT_INFO_GID_PFX_CHANGE_MASK);
1136                 }
1137
1138                 if (changed_attr & MLX4_EQ_PORT_INFO_CLIENT_REREG_MASK)
1139                         handle_client_rereg_event(dev, port);
1140                 break;
1141
1142         case MLX4_DEV_PMC_SUBTYPE_PKEY_TABLE:
1143                 mlx4_ib_dispatch_event(dev, port, IB_EVENT_PKEY_CHANGE);
1144                 if (mlx4_is_master(dev->dev) && !dev->sriov.is_going_down)
1145                         propagate_pkey_ev(dev, port, eqe);
1146                 break;
1147         case MLX4_DEV_PMC_SUBTYPE_GUID_INFO:
1148                 /* paravirtualized master's guid is guid 0 -- does not change */
1149                 if (!mlx4_is_master(dev->dev))
1150                         mlx4_ib_dispatch_event(dev, port, IB_EVENT_GID_CHANGE);
1151                 /*if master, notify relevant slaves*/
1152                 else if (!dev->sriov.is_going_down) {
1153                         tbl_block = GET_BLK_PTR_FROM_EQE(eqe);
1154                         change_bitmap = GET_MASK_FROM_EQE(eqe);
1155                         handle_slaves_guid_change(dev, port, tbl_block, change_bitmap);
1156                 }
1157                 break;
1158         default:
1159                 pr_warn("Unsupported subtype 0x%x for "
1160                         "Port Management Change event\n", eqe->subtype);
1161         }
1162
1163         kfree(ew);
1164 }
1165
1166 void mlx4_ib_dispatch_event(struct mlx4_ib_dev *dev, u8 port_num,
1167                             enum ib_event_type type)
1168 {
1169         struct ib_event event;
1170
1171         event.device            = &dev->ib_dev;
1172         event.element.port_num  = port_num;
1173         event.event             = type;
1174
1175         ib_dispatch_event(&event);
1176 }
1177
1178 static void mlx4_ib_tunnel_comp_handler(struct ib_cq *cq, void *arg)
1179 {
1180         unsigned long flags;
1181         struct mlx4_ib_demux_pv_ctx *ctx = cq->cq_context;
1182         struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
1183         spin_lock_irqsave(&dev->sriov.going_down_lock, flags);
1184         if (!dev->sriov.is_going_down && ctx->state == DEMUX_PV_STATE_ACTIVE)
1185                 queue_work(ctx->wq, &ctx->work);
1186         spin_unlock_irqrestore(&dev->sriov.going_down_lock, flags);
1187 }
1188
1189 static int mlx4_ib_post_pv_qp_buf(struct mlx4_ib_demux_pv_ctx *ctx,
1190                                   struct mlx4_ib_demux_pv_qp *tun_qp,
1191                                   int index)
1192 {
1193         struct ib_sge sg_list;
1194         struct ib_recv_wr recv_wr, *bad_recv_wr;
1195         int size;
1196
1197         size = (tun_qp->qp->qp_type == IB_QPT_UD) ?
1198                 sizeof (struct mlx4_tunnel_mad) : sizeof (struct mlx4_mad_rcv_buf);
1199
1200         sg_list.addr = tun_qp->ring[index].map;
1201         sg_list.length = size;
1202         sg_list.lkey = ctx->pd->local_dma_lkey;
1203
1204         recv_wr.next = NULL;
1205         recv_wr.sg_list = &sg_list;
1206         recv_wr.num_sge = 1;
1207         recv_wr.wr_id = (u64) index | MLX4_TUN_WRID_RECV |
1208                 MLX4_TUN_SET_WRID_QPN(tun_qp->proxy_qpt);
1209         ib_dma_sync_single_for_device(ctx->ib_dev, tun_qp->ring[index].map,
1210                                       size, DMA_FROM_DEVICE);
1211         return ib_post_recv(tun_qp->qp, &recv_wr, &bad_recv_wr);
1212 }
1213
1214 static int mlx4_ib_multiplex_sa_handler(struct ib_device *ibdev, int port,
1215                 int slave, struct ib_sa_mad *sa_mad)
1216 {
1217         int ret = 0;
1218
1219         /* dispatch to different sa handlers */
1220         switch (be16_to_cpu(sa_mad->mad_hdr.attr_id)) {
1221         case IB_SA_ATTR_MC_MEMBER_REC:
1222                 ret = mlx4_ib_mcg_multiplex_handler(ibdev, port, slave, sa_mad);
1223                 break;
1224         default:
1225                 break;
1226         }
1227         return ret;
1228 }
1229
1230 static int is_proxy_qp0(struct mlx4_ib_dev *dev, int qpn, int slave)
1231 {
1232         int proxy_start = dev->dev->phys_caps.base_proxy_sqpn + 8 * slave;
1233
1234         return (qpn >= proxy_start && qpn <= proxy_start + 1);
1235 }
1236
1237
1238 int mlx4_ib_send_to_wire(struct mlx4_ib_dev *dev, int slave, u8 port,
1239                          enum ib_qp_type dest_qpt, u16 pkey_index,
1240                          u32 remote_qpn, u32 qkey, struct ib_ah_attr *attr,
1241                          u8 *s_mac, u16 vlan_id, struct ib_mad *mad)
1242 {
1243         struct ib_sge list;
1244         struct ib_ud_wr wr;
1245         struct ib_send_wr *bad_wr;
1246         struct mlx4_ib_demux_pv_ctx *sqp_ctx;
1247         struct mlx4_ib_demux_pv_qp *sqp;
1248         struct mlx4_mad_snd_buf *sqp_mad;
1249         struct ib_ah *ah;
1250         struct ib_qp *send_qp = NULL;
1251         unsigned wire_tx_ix = 0;
1252         int ret = 0;
1253         u16 wire_pkey_ix;
1254         int src_qpnum;
1255         u8 sgid_index;
1256
1257
1258         sqp_ctx = dev->sriov.sqps[port-1];
1259
1260         /* check if proxy qp created */
1261         if (!sqp_ctx || sqp_ctx->state != DEMUX_PV_STATE_ACTIVE)
1262                 return -EAGAIN;
1263
1264         if (dest_qpt == IB_QPT_SMI) {
1265                 src_qpnum = 0;
1266                 sqp = &sqp_ctx->qp[0];
1267                 wire_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][0];
1268         } else {
1269                 src_qpnum = 1;
1270                 sqp = &sqp_ctx->qp[1];
1271                 wire_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][pkey_index];
1272         }
1273
1274         send_qp = sqp->qp;
1275
1276         /* create ah */
1277         sgid_index = attr->grh.sgid_index;
1278         attr->grh.sgid_index = 0;
1279         ah = ib_create_ah(sqp_ctx->pd, attr);
1280         if (IS_ERR(ah))
1281                 return -ENOMEM;
1282         attr->grh.sgid_index = sgid_index;
1283         to_mah(ah)->av.ib.gid_index = sgid_index;
1284         /* get rid of force-loopback bit */
1285         to_mah(ah)->av.ib.port_pd &= cpu_to_be32(0x7FFFFFFF);
1286         spin_lock(&sqp->tx_lock);
1287         if (sqp->tx_ix_head - sqp->tx_ix_tail >=
1288             (MLX4_NUM_TUNNEL_BUFS - 1))
1289                 ret = -EAGAIN;
1290         else
1291                 wire_tx_ix = (++sqp->tx_ix_head) & (MLX4_NUM_TUNNEL_BUFS - 1);
1292         spin_unlock(&sqp->tx_lock);
1293         if (ret)
1294                 goto out;
1295
1296         sqp_mad = (struct mlx4_mad_snd_buf *) (sqp->tx_ring[wire_tx_ix].buf.addr);
1297         if (sqp->tx_ring[wire_tx_ix].ah)
1298                 ib_destroy_ah(sqp->tx_ring[wire_tx_ix].ah);
1299         sqp->tx_ring[wire_tx_ix].ah = ah;
1300         ib_dma_sync_single_for_cpu(&dev->ib_dev,
1301                                    sqp->tx_ring[wire_tx_ix].buf.map,
1302                                    sizeof (struct mlx4_mad_snd_buf),
1303                                    DMA_TO_DEVICE);
1304
1305         memcpy(&sqp_mad->payload, mad, sizeof *mad);
1306
1307         ib_dma_sync_single_for_device(&dev->ib_dev,
1308                                       sqp->tx_ring[wire_tx_ix].buf.map,
1309                                       sizeof (struct mlx4_mad_snd_buf),
1310                                       DMA_TO_DEVICE);
1311
1312         list.addr = sqp->tx_ring[wire_tx_ix].buf.map;
1313         list.length = sizeof (struct mlx4_mad_snd_buf);
1314         list.lkey = sqp_ctx->pd->local_dma_lkey;
1315
1316         wr.ah = ah;
1317         wr.port_num = port;
1318         wr.pkey_index = wire_pkey_ix;
1319         wr.remote_qkey = qkey;
1320         wr.remote_qpn = remote_qpn;
1321         wr.wr.next = NULL;
1322         wr.wr.wr_id = ((u64) wire_tx_ix) | MLX4_TUN_SET_WRID_QPN(src_qpnum);
1323         wr.wr.sg_list = &list;
1324         wr.wr.num_sge = 1;
1325         wr.wr.opcode = IB_WR_SEND;
1326         wr.wr.send_flags = IB_SEND_SIGNALED;
1327         if (s_mac)
1328                 memcpy(to_mah(ah)->av.eth.s_mac, s_mac, 6);
1329         if (vlan_id < 0x1000)
1330                 vlan_id |= (attr->sl & 7) << 13;
1331         to_mah(ah)->av.eth.vlan = cpu_to_be16(vlan_id);
1332
1333
1334         ret = ib_post_send(send_qp, &wr.wr, &bad_wr);
1335         if (!ret)
1336                 return 0;
1337
1338         spin_lock(&sqp->tx_lock);
1339         sqp->tx_ix_tail++;
1340         spin_unlock(&sqp->tx_lock);
1341         sqp->tx_ring[wire_tx_ix].ah = NULL;
1342 out:
1343         ib_destroy_ah(ah);
1344         return ret;
1345 }
1346
1347 static int get_slave_base_gid_ix(struct mlx4_ib_dev *dev, int slave, int port)
1348 {
1349         if (rdma_port_get_link_layer(&dev->ib_dev, port) == IB_LINK_LAYER_INFINIBAND)
1350                 return slave;
1351         return mlx4_get_base_gid_ix(dev->dev, slave, port);
1352 }
1353
1354 static void fill_in_real_sgid_index(struct mlx4_ib_dev *dev, int slave, int port,
1355                                     struct ib_ah_attr *ah_attr)
1356 {
1357         if (rdma_port_get_link_layer(&dev->ib_dev, port) == IB_LINK_LAYER_INFINIBAND)
1358                 ah_attr->grh.sgid_index = slave;
1359         else
1360                 ah_attr->grh.sgid_index += get_slave_base_gid_ix(dev, slave, port);
1361 }
1362
1363 static void mlx4_ib_multiplex_mad(struct mlx4_ib_demux_pv_ctx *ctx, struct ib_wc *wc)
1364 {
1365         struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
1366         struct mlx4_ib_demux_pv_qp *tun_qp = &ctx->qp[MLX4_TUN_WRID_QPN(wc->wr_id)];
1367         int wr_ix = wc->wr_id & (MLX4_NUM_TUNNEL_BUFS - 1);
1368         struct mlx4_tunnel_mad *tunnel = tun_qp->ring[wr_ix].addr;
1369         struct mlx4_ib_ah ah;
1370         struct ib_ah_attr ah_attr;
1371         u8 *slave_id;
1372         int slave;
1373         int port;
1374         u16 vlan_id;
1375
1376         /* Get slave that sent this packet */
1377         if (wc->src_qp < dev->dev->phys_caps.base_proxy_sqpn ||
1378             wc->src_qp >= dev->dev->phys_caps.base_proxy_sqpn + 8 * MLX4_MFUNC_MAX ||
1379             (wc->src_qp & 0x1) != ctx->port - 1 ||
1380             wc->src_qp & 0x4) {
1381                 mlx4_ib_warn(ctx->ib_dev, "can't multiplex bad sqp:%d\n", wc->src_qp);
1382                 return;
1383         }
1384         slave = ((wc->src_qp & ~0x7) - dev->dev->phys_caps.base_proxy_sqpn) / 8;
1385         if (slave != ctx->slave) {
1386                 mlx4_ib_warn(ctx->ib_dev, "can't multiplex bad sqp:%d: "
1387                              "belongs to another slave\n", wc->src_qp);
1388                 return;
1389         }
1390
1391         /* Map transaction ID */
1392         ib_dma_sync_single_for_cpu(ctx->ib_dev, tun_qp->ring[wr_ix].map,
1393                                    sizeof (struct mlx4_tunnel_mad),
1394                                    DMA_FROM_DEVICE);
1395         switch (tunnel->mad.mad_hdr.method) {
1396         case IB_MGMT_METHOD_SET:
1397         case IB_MGMT_METHOD_GET:
1398         case IB_MGMT_METHOD_REPORT:
1399         case IB_SA_METHOD_GET_TABLE:
1400         case IB_SA_METHOD_DELETE:
1401         case IB_SA_METHOD_GET_MULTI:
1402         case IB_SA_METHOD_GET_TRACE_TBL:
1403                 slave_id = (u8 *) &tunnel->mad.mad_hdr.tid;
1404                 if (*slave_id) {
1405                         mlx4_ib_warn(ctx->ib_dev, "egress mad has non-null tid msb:%d "
1406                                      "class:%d slave:%d\n", *slave_id,
1407                                      tunnel->mad.mad_hdr.mgmt_class, slave);
1408                         return;
1409                 } else
1410                         *slave_id = slave;
1411         default:
1412                 /* nothing */;
1413         }
1414
1415         /* Class-specific handling */
1416         switch (tunnel->mad.mad_hdr.mgmt_class) {
1417         case IB_MGMT_CLASS_SUBN_LID_ROUTED:
1418         case IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE:
1419                 if (slave != mlx4_master_func_num(dev->dev) &&
1420                     !mlx4_vf_smi_enabled(dev->dev, slave, ctx->port))
1421                         return;
1422                 break;
1423         case IB_MGMT_CLASS_SUBN_ADM:
1424                 if (mlx4_ib_multiplex_sa_handler(ctx->ib_dev, ctx->port, slave,
1425                               (struct ib_sa_mad *) &tunnel->mad))
1426                         return;
1427                 break;
1428         case IB_MGMT_CLASS_CM:
1429                 if (mlx4_ib_multiplex_cm_handler(ctx->ib_dev, ctx->port, slave,
1430                               (struct ib_mad *) &tunnel->mad))
1431                         return;
1432                 break;
1433         case IB_MGMT_CLASS_DEVICE_MGMT:
1434                 if (tunnel->mad.mad_hdr.method != IB_MGMT_METHOD_GET &&
1435                     tunnel->mad.mad_hdr.method != IB_MGMT_METHOD_SET)
1436                         return;
1437                 break;
1438         default:
1439                 /* Drop unsupported classes for slaves in tunnel mode */
1440                 if (slave != mlx4_master_func_num(dev->dev)) {
1441                         mlx4_ib_warn(ctx->ib_dev, "dropping unsupported egress mad from class:%d "
1442                                      "for slave:%d\n", tunnel->mad.mad_hdr.mgmt_class, slave);
1443                         return;
1444                 }
1445         }
1446
1447         /* We are using standard ib_core services to send the mad, so generate a
1448          * stadard address handle by decoding the tunnelled mlx4_ah fields */
1449         memcpy(&ah.av, &tunnel->hdr.av, sizeof (struct mlx4_av));
1450         ah.ibah.device = ctx->ib_dev;
1451
1452         port = be32_to_cpu(ah.av.ib.port_pd) >> 24;
1453         port = mlx4_slave_convert_port(dev->dev, slave, port);
1454         if (port < 0)
1455                 return;
1456         ah.av.ib.port_pd = cpu_to_be32(port << 24 | (be32_to_cpu(ah.av.ib.port_pd) & 0xffffff));
1457
1458         mlx4_ib_query_ah(&ah.ibah, &ah_attr);
1459         if (ah_attr.ah_flags & IB_AH_GRH)
1460                 fill_in_real_sgid_index(dev, slave, ctx->port, &ah_attr);
1461
1462         memcpy(ah_attr.dmac, tunnel->hdr.mac, 6);
1463         vlan_id = be16_to_cpu(tunnel->hdr.vlan);
1464         /* if slave have default vlan use it */
1465         mlx4_get_slave_default_vlan(dev->dev, ctx->port, slave,
1466                                     &vlan_id, &ah_attr.sl);
1467
1468         mlx4_ib_send_to_wire(dev, slave, ctx->port,
1469                              is_proxy_qp0(dev, wc->src_qp, slave) ?
1470                              IB_QPT_SMI : IB_QPT_GSI,
1471                              be16_to_cpu(tunnel->hdr.pkey_index),
1472                              be32_to_cpu(tunnel->hdr.remote_qpn),
1473                              be32_to_cpu(tunnel->hdr.qkey),
1474                              &ah_attr, wc->smac, vlan_id, &tunnel->mad);
1475 }
1476
1477 static int mlx4_ib_alloc_pv_bufs(struct mlx4_ib_demux_pv_ctx *ctx,
1478                                  enum ib_qp_type qp_type, int is_tun)
1479 {
1480         int i;
1481         struct mlx4_ib_demux_pv_qp *tun_qp;
1482         int rx_buf_size, tx_buf_size;
1483
1484         if (qp_type > IB_QPT_GSI)
1485                 return -EINVAL;
1486
1487         tun_qp = &ctx->qp[qp_type];
1488
1489         tun_qp->ring = kzalloc(sizeof (struct mlx4_ib_buf) * MLX4_NUM_TUNNEL_BUFS,
1490                                GFP_KERNEL);
1491         if (!tun_qp->ring)
1492                 return -ENOMEM;
1493
1494         tun_qp->tx_ring = kcalloc(MLX4_NUM_TUNNEL_BUFS,
1495                                   sizeof (struct mlx4_ib_tun_tx_buf),
1496                                   GFP_KERNEL);
1497         if (!tun_qp->tx_ring) {
1498                 kfree(tun_qp->ring);
1499                 tun_qp->ring = NULL;
1500                 return -ENOMEM;
1501         }
1502
1503         if (is_tun) {
1504                 rx_buf_size = sizeof (struct mlx4_tunnel_mad);
1505                 tx_buf_size = sizeof (struct mlx4_rcv_tunnel_mad);
1506         } else {
1507                 rx_buf_size = sizeof (struct mlx4_mad_rcv_buf);
1508                 tx_buf_size = sizeof (struct mlx4_mad_snd_buf);
1509         }
1510
1511         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1512                 tun_qp->ring[i].addr = kmalloc(rx_buf_size, GFP_KERNEL);
1513                 if (!tun_qp->ring[i].addr)
1514                         goto err;
1515                 tun_qp->ring[i].map = ib_dma_map_single(ctx->ib_dev,
1516                                                         tun_qp->ring[i].addr,
1517                                                         rx_buf_size,
1518                                                         DMA_FROM_DEVICE);
1519                 if (ib_dma_mapping_error(ctx->ib_dev, tun_qp->ring[i].map)) {
1520                         kfree(tun_qp->ring[i].addr);
1521                         goto err;
1522                 }
1523         }
1524
1525         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1526                 tun_qp->tx_ring[i].buf.addr =
1527                         kmalloc(tx_buf_size, GFP_KERNEL);
1528                 if (!tun_qp->tx_ring[i].buf.addr)
1529                         goto tx_err;
1530                 tun_qp->tx_ring[i].buf.map =
1531                         ib_dma_map_single(ctx->ib_dev,
1532                                           tun_qp->tx_ring[i].buf.addr,
1533                                           tx_buf_size,
1534                                           DMA_TO_DEVICE);
1535                 if (ib_dma_mapping_error(ctx->ib_dev,
1536                                          tun_qp->tx_ring[i].buf.map)) {
1537                         kfree(tun_qp->tx_ring[i].buf.addr);
1538                         goto tx_err;
1539                 }
1540                 tun_qp->tx_ring[i].ah = NULL;
1541         }
1542         spin_lock_init(&tun_qp->tx_lock);
1543         tun_qp->tx_ix_head = 0;
1544         tun_qp->tx_ix_tail = 0;
1545         tun_qp->proxy_qpt = qp_type;
1546
1547         return 0;
1548
1549 tx_err:
1550         while (i > 0) {
1551                 --i;
1552                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->tx_ring[i].buf.map,
1553                                     tx_buf_size, DMA_TO_DEVICE);
1554                 kfree(tun_qp->tx_ring[i].buf.addr);
1555         }
1556         kfree(tun_qp->tx_ring);
1557         tun_qp->tx_ring = NULL;
1558         i = MLX4_NUM_TUNNEL_BUFS;
1559 err:
1560         while (i > 0) {
1561                 --i;
1562                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->ring[i].map,
1563                                     rx_buf_size, DMA_FROM_DEVICE);
1564                 kfree(tun_qp->ring[i].addr);
1565         }
1566         kfree(tun_qp->ring);
1567         tun_qp->ring = NULL;
1568         return -ENOMEM;
1569 }
1570
1571 static void mlx4_ib_free_pv_qp_bufs(struct mlx4_ib_demux_pv_ctx *ctx,
1572                                      enum ib_qp_type qp_type, int is_tun)
1573 {
1574         int i;
1575         struct mlx4_ib_demux_pv_qp *tun_qp;
1576         int rx_buf_size, tx_buf_size;
1577
1578         if (qp_type > IB_QPT_GSI)
1579                 return;
1580
1581         tun_qp = &ctx->qp[qp_type];
1582         if (is_tun) {
1583                 rx_buf_size = sizeof (struct mlx4_tunnel_mad);
1584                 tx_buf_size = sizeof (struct mlx4_rcv_tunnel_mad);
1585         } else {
1586                 rx_buf_size = sizeof (struct mlx4_mad_rcv_buf);
1587                 tx_buf_size = sizeof (struct mlx4_mad_snd_buf);
1588         }
1589
1590
1591         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1592                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->ring[i].map,
1593                                     rx_buf_size, DMA_FROM_DEVICE);
1594                 kfree(tun_qp->ring[i].addr);
1595         }
1596
1597         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1598                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->tx_ring[i].buf.map,
1599                                     tx_buf_size, DMA_TO_DEVICE);
1600                 kfree(tun_qp->tx_ring[i].buf.addr);
1601                 if (tun_qp->tx_ring[i].ah)
1602                         ib_destroy_ah(tun_qp->tx_ring[i].ah);
1603         }
1604         kfree(tun_qp->tx_ring);
1605         kfree(tun_qp->ring);
1606 }
1607
1608 static void mlx4_ib_tunnel_comp_worker(struct work_struct *work)
1609 {
1610         struct mlx4_ib_demux_pv_ctx *ctx;
1611         struct mlx4_ib_demux_pv_qp *tun_qp;
1612         struct ib_wc wc;
1613         int ret;
1614         ctx = container_of(work, struct mlx4_ib_demux_pv_ctx, work);
1615         ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1616
1617         while (ib_poll_cq(ctx->cq, 1, &wc) == 1) {
1618                 tun_qp = &ctx->qp[MLX4_TUN_WRID_QPN(wc.wr_id)];
1619                 if (wc.status == IB_WC_SUCCESS) {
1620                         switch (wc.opcode) {
1621                         case IB_WC_RECV:
1622                                 mlx4_ib_multiplex_mad(ctx, &wc);
1623                                 ret = mlx4_ib_post_pv_qp_buf(ctx, tun_qp,
1624                                                              wc.wr_id &
1625                                                              (MLX4_NUM_TUNNEL_BUFS - 1));
1626                                 if (ret)
1627                                         pr_err("Failed reposting tunnel "
1628                                                "buf:%lld\n", wc.wr_id);
1629                                 break;
1630                         case IB_WC_SEND:
1631                                 pr_debug("received tunnel send completion:"
1632                                          "wrid=0x%llx, status=0x%x\n",
1633                                          wc.wr_id, wc.status);
1634                                 ib_destroy_ah(tun_qp->tx_ring[wc.wr_id &
1635                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1636                                 tun_qp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1637                                         = NULL;
1638                                 spin_lock(&tun_qp->tx_lock);
1639                                 tun_qp->tx_ix_tail++;
1640                                 spin_unlock(&tun_qp->tx_lock);
1641
1642                                 break;
1643                         default:
1644                                 break;
1645                         }
1646                 } else  {
1647                         pr_debug("mlx4_ib: completion error in tunnel: %d."
1648                                  " status = %d, wrid = 0x%llx\n",
1649                                  ctx->slave, wc.status, wc.wr_id);
1650                         if (!MLX4_TUN_IS_RECV(wc.wr_id)) {
1651                                 ib_destroy_ah(tun_qp->tx_ring[wc.wr_id &
1652                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1653                                 tun_qp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1654                                         = NULL;
1655                                 spin_lock(&tun_qp->tx_lock);
1656                                 tun_qp->tx_ix_tail++;
1657                                 spin_unlock(&tun_qp->tx_lock);
1658                         }
1659                 }
1660         }
1661 }
1662
1663 static void pv_qp_event_handler(struct ib_event *event, void *qp_context)
1664 {
1665         struct mlx4_ib_demux_pv_ctx *sqp = qp_context;
1666
1667         /* It's worse than that! He's dead, Jim! */
1668         pr_err("Fatal error (%d) on a MAD QP on port %d\n",
1669                event->event, sqp->port);
1670 }
1671
1672 static int create_pv_sqp(struct mlx4_ib_demux_pv_ctx *ctx,
1673                             enum ib_qp_type qp_type, int create_tun)
1674 {
1675         int i, ret;
1676         struct mlx4_ib_demux_pv_qp *tun_qp;
1677         struct mlx4_ib_qp_tunnel_init_attr qp_init_attr;
1678         struct ib_qp_attr attr;
1679         int qp_attr_mask_INIT;
1680
1681         if (qp_type > IB_QPT_GSI)
1682                 return -EINVAL;
1683
1684         tun_qp = &ctx->qp[qp_type];
1685
1686         memset(&qp_init_attr, 0, sizeof qp_init_attr);
1687         qp_init_attr.init_attr.send_cq = ctx->cq;
1688         qp_init_attr.init_attr.recv_cq = ctx->cq;
1689         qp_init_attr.init_attr.sq_sig_type = IB_SIGNAL_ALL_WR;
1690         qp_init_attr.init_attr.cap.max_send_wr = MLX4_NUM_TUNNEL_BUFS;
1691         qp_init_attr.init_attr.cap.max_recv_wr = MLX4_NUM_TUNNEL_BUFS;
1692         qp_init_attr.init_attr.cap.max_send_sge = 1;
1693         qp_init_attr.init_attr.cap.max_recv_sge = 1;
1694         if (create_tun) {
1695                 qp_init_attr.init_attr.qp_type = IB_QPT_UD;
1696                 qp_init_attr.init_attr.create_flags = MLX4_IB_SRIOV_TUNNEL_QP;
1697                 qp_init_attr.port = ctx->port;
1698                 qp_init_attr.slave = ctx->slave;
1699                 qp_init_attr.proxy_qp_type = qp_type;
1700                 qp_attr_mask_INIT = IB_QP_STATE | IB_QP_PKEY_INDEX |
1701                            IB_QP_QKEY | IB_QP_PORT;
1702         } else {
1703                 qp_init_attr.init_attr.qp_type = qp_type;
1704                 qp_init_attr.init_attr.create_flags = MLX4_IB_SRIOV_SQP;
1705                 qp_attr_mask_INIT = IB_QP_STATE | IB_QP_PKEY_INDEX | IB_QP_QKEY;
1706         }
1707         qp_init_attr.init_attr.port_num = ctx->port;
1708         qp_init_attr.init_attr.qp_context = ctx;
1709         qp_init_attr.init_attr.event_handler = pv_qp_event_handler;
1710         tun_qp->qp = ib_create_qp(ctx->pd, &qp_init_attr.init_attr);
1711         if (IS_ERR(tun_qp->qp)) {
1712                 ret = PTR_ERR(tun_qp->qp);
1713                 tun_qp->qp = NULL;
1714                 pr_err("Couldn't create %s QP (%d)\n",
1715                        create_tun ? "tunnel" : "special", ret);
1716                 return ret;
1717         }
1718
1719         memset(&attr, 0, sizeof attr);
1720         attr.qp_state = IB_QPS_INIT;
1721         ret = 0;
1722         if (create_tun)
1723                 ret = find_slave_port_pkey_ix(to_mdev(ctx->ib_dev), ctx->slave,
1724                                               ctx->port, IB_DEFAULT_PKEY_FULL,
1725                                               &attr.pkey_index);
1726         if (ret || !create_tun)
1727                 attr.pkey_index =
1728                         to_mdev(ctx->ib_dev)->pkeys.virt2phys_pkey[ctx->slave][ctx->port - 1][0];
1729         attr.qkey = IB_QP1_QKEY;
1730         attr.port_num = ctx->port;
1731         ret = ib_modify_qp(tun_qp->qp, &attr, qp_attr_mask_INIT);
1732         if (ret) {
1733                 pr_err("Couldn't change %s qp state to INIT (%d)\n",
1734                        create_tun ? "tunnel" : "special", ret);
1735                 goto err_qp;
1736         }
1737         attr.qp_state = IB_QPS_RTR;
1738         ret = ib_modify_qp(tun_qp->qp, &attr, IB_QP_STATE);
1739         if (ret) {
1740                 pr_err("Couldn't change %s qp state to RTR (%d)\n",
1741                        create_tun ? "tunnel" : "special", ret);
1742                 goto err_qp;
1743         }
1744         attr.qp_state = IB_QPS_RTS;
1745         attr.sq_psn = 0;
1746         ret = ib_modify_qp(tun_qp->qp, &attr, IB_QP_STATE | IB_QP_SQ_PSN);
1747         if (ret) {
1748                 pr_err("Couldn't change %s qp state to RTS (%d)\n",
1749                        create_tun ? "tunnel" : "special", ret);
1750                 goto err_qp;
1751         }
1752
1753         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1754                 ret = mlx4_ib_post_pv_qp_buf(ctx, tun_qp, i);
1755                 if (ret) {
1756                         pr_err(" mlx4_ib_post_pv_buf error"
1757                                " (err = %d, i = %d)\n", ret, i);
1758                         goto err_qp;
1759                 }
1760         }
1761         return 0;
1762
1763 err_qp:
1764         ib_destroy_qp(tun_qp->qp);
1765         tun_qp->qp = NULL;
1766         return ret;
1767 }
1768
1769 /*
1770  * IB MAD completion callback for real SQPs
1771  */
1772 static void mlx4_ib_sqp_comp_worker(struct work_struct *work)
1773 {
1774         struct mlx4_ib_demux_pv_ctx *ctx;
1775         struct mlx4_ib_demux_pv_qp *sqp;
1776         struct ib_wc wc;
1777         struct ib_grh *grh;
1778         struct ib_mad *mad;
1779
1780         ctx = container_of(work, struct mlx4_ib_demux_pv_ctx, work);
1781         ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1782
1783         while (mlx4_ib_poll_cq(ctx->cq, 1, &wc) == 1) {
1784                 sqp = &ctx->qp[MLX4_TUN_WRID_QPN(wc.wr_id)];
1785                 if (wc.status == IB_WC_SUCCESS) {
1786                         switch (wc.opcode) {
1787                         case IB_WC_SEND:
1788                                 ib_destroy_ah(sqp->tx_ring[wc.wr_id &
1789                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1790                                 sqp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1791                                         = NULL;
1792                                 spin_lock(&sqp->tx_lock);
1793                                 sqp->tx_ix_tail++;
1794                                 spin_unlock(&sqp->tx_lock);
1795                                 break;
1796                         case IB_WC_RECV:
1797                                 mad = (struct ib_mad *) &(((struct mlx4_mad_rcv_buf *)
1798                                                 (sqp->ring[wc.wr_id &
1799                                                 (MLX4_NUM_TUNNEL_BUFS - 1)].addr))->payload);
1800                                 grh = &(((struct mlx4_mad_rcv_buf *)
1801                                                 (sqp->ring[wc.wr_id &
1802                                                 (MLX4_NUM_TUNNEL_BUFS - 1)].addr))->grh);
1803                                 mlx4_ib_demux_mad(ctx->ib_dev, ctx->port, &wc, grh, mad);
1804                                 if (mlx4_ib_post_pv_qp_buf(ctx, sqp, wc.wr_id &
1805                                                            (MLX4_NUM_TUNNEL_BUFS - 1)))
1806                                         pr_err("Failed reposting SQP "
1807                                                "buf:%lld\n", wc.wr_id);
1808                                 break;
1809                         default:
1810                                 BUG_ON(1);
1811                                 break;
1812                         }
1813                 } else  {
1814                         pr_debug("mlx4_ib: completion error in tunnel: %d."
1815                                  " status = %d, wrid = 0x%llx\n",
1816                                  ctx->slave, wc.status, wc.wr_id);
1817                         if (!MLX4_TUN_IS_RECV(wc.wr_id)) {
1818                                 ib_destroy_ah(sqp->tx_ring[wc.wr_id &
1819                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1820                                 sqp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1821                                         = NULL;
1822                                 spin_lock(&sqp->tx_lock);
1823                                 sqp->tx_ix_tail++;
1824                                 spin_unlock(&sqp->tx_lock);
1825                         }
1826                 }
1827         }
1828 }
1829
1830 static int alloc_pv_object(struct mlx4_ib_dev *dev, int slave, int port,
1831                                struct mlx4_ib_demux_pv_ctx **ret_ctx)
1832 {
1833         struct mlx4_ib_demux_pv_ctx *ctx;
1834
1835         *ret_ctx = NULL;
1836         ctx = kzalloc(sizeof (struct mlx4_ib_demux_pv_ctx), GFP_KERNEL);
1837         if (!ctx) {
1838                 pr_err("failed allocating pv resource context "
1839                        "for port %d, slave %d\n", port, slave);
1840                 return -ENOMEM;
1841         }
1842
1843         ctx->ib_dev = &dev->ib_dev;
1844         ctx->port = port;
1845         ctx->slave = slave;
1846         *ret_ctx = ctx;
1847         return 0;
1848 }
1849
1850 static void free_pv_object(struct mlx4_ib_dev *dev, int slave, int port)
1851 {
1852         if (dev->sriov.demux[port - 1].tun[slave]) {
1853                 kfree(dev->sriov.demux[port - 1].tun[slave]);
1854                 dev->sriov.demux[port - 1].tun[slave] = NULL;
1855         }
1856 }
1857
1858 static int create_pv_resources(struct ib_device *ibdev, int slave, int port,
1859                                int create_tun, struct mlx4_ib_demux_pv_ctx *ctx)
1860 {
1861         int ret, cq_size;
1862         struct ib_cq_init_attr cq_attr = {};
1863
1864         if (ctx->state != DEMUX_PV_STATE_DOWN)
1865                 return -EEXIST;
1866
1867         ctx->state = DEMUX_PV_STATE_STARTING;
1868         /* have QP0 only if link layer is IB */
1869         if (rdma_port_get_link_layer(ibdev, ctx->port) ==
1870             IB_LINK_LAYER_INFINIBAND)
1871                 ctx->has_smi = 1;
1872
1873         if (ctx->has_smi) {
1874                 ret = mlx4_ib_alloc_pv_bufs(ctx, IB_QPT_SMI, create_tun);
1875                 if (ret) {
1876                         pr_err("Failed allocating qp0 tunnel bufs (%d)\n", ret);
1877                         goto err_out;
1878                 }
1879         }
1880
1881         ret = mlx4_ib_alloc_pv_bufs(ctx, IB_QPT_GSI, create_tun);
1882         if (ret) {
1883                 pr_err("Failed allocating qp1 tunnel bufs (%d)\n", ret);
1884                 goto err_out_qp0;
1885         }
1886
1887         cq_size = 2 * MLX4_NUM_TUNNEL_BUFS;
1888         if (ctx->has_smi)
1889                 cq_size *= 2;
1890
1891         cq_attr.cqe = cq_size;
1892         ctx->cq = ib_create_cq(ctx->ib_dev, mlx4_ib_tunnel_comp_handler,
1893                                NULL, ctx, &cq_attr);
1894         if (IS_ERR(ctx->cq)) {
1895                 ret = PTR_ERR(ctx->cq);
1896                 pr_err("Couldn't create tunnel CQ (%d)\n", ret);
1897                 goto err_buf;
1898         }
1899
1900         ctx->pd = ib_alloc_pd(ctx->ib_dev);
1901         if (IS_ERR(ctx->pd)) {
1902                 ret = PTR_ERR(ctx->pd);
1903                 pr_err("Couldn't create tunnel PD (%d)\n", ret);
1904                 goto err_cq;
1905         }
1906
1907         if (ctx->has_smi) {
1908                 ret = create_pv_sqp(ctx, IB_QPT_SMI, create_tun);
1909                 if (ret) {
1910                         pr_err("Couldn't create %s QP0 (%d)\n",
1911                                create_tun ? "tunnel for" : "",  ret);
1912                         goto err_pd;
1913                 }
1914         }
1915
1916         ret = create_pv_sqp(ctx, IB_QPT_GSI, create_tun);
1917         if (ret) {
1918                 pr_err("Couldn't create %s QP1 (%d)\n",
1919                        create_tun ? "tunnel for" : "",  ret);
1920                 goto err_qp0;
1921         }
1922
1923         if (create_tun)
1924                 INIT_WORK(&ctx->work, mlx4_ib_tunnel_comp_worker);
1925         else
1926                 INIT_WORK(&ctx->work, mlx4_ib_sqp_comp_worker);
1927
1928         ctx->wq = to_mdev(ibdev)->sriov.demux[port - 1].wq;
1929
1930         ret = ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1931         if (ret) {
1932                 pr_err("Couldn't arm tunnel cq (%d)\n", ret);
1933                 goto err_wq;
1934         }
1935         ctx->state = DEMUX_PV_STATE_ACTIVE;
1936         return 0;
1937
1938 err_wq:
1939         ctx->wq = NULL;
1940         ib_destroy_qp(ctx->qp[1].qp);
1941         ctx->qp[1].qp = NULL;
1942
1943
1944 err_qp0:
1945         if (ctx->has_smi)
1946                 ib_destroy_qp(ctx->qp[0].qp);
1947         ctx->qp[0].qp = NULL;
1948
1949 err_pd:
1950         ib_dealloc_pd(ctx->pd);
1951         ctx->pd = NULL;
1952
1953 err_cq:
1954         ib_destroy_cq(ctx->cq);
1955         ctx->cq = NULL;
1956
1957 err_buf:
1958         mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_GSI, create_tun);
1959
1960 err_out_qp0:
1961         if (ctx->has_smi)
1962                 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_SMI, create_tun);
1963 err_out:
1964         ctx->state = DEMUX_PV_STATE_DOWN;
1965         return ret;
1966 }
1967
1968 static void destroy_pv_resources(struct mlx4_ib_dev *dev, int slave, int port,
1969                                  struct mlx4_ib_demux_pv_ctx *ctx, int flush)
1970 {
1971         if (!ctx)
1972                 return;
1973         if (ctx->state > DEMUX_PV_STATE_DOWN) {
1974                 ctx->state = DEMUX_PV_STATE_DOWNING;
1975                 if (flush)
1976                         flush_workqueue(ctx->wq);
1977                 if (ctx->has_smi) {
1978                         ib_destroy_qp(ctx->qp[0].qp);
1979                         ctx->qp[0].qp = NULL;
1980                         mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_SMI, 1);
1981                 }
1982                 ib_destroy_qp(ctx->qp[1].qp);
1983                 ctx->qp[1].qp = NULL;
1984                 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_GSI, 1);
1985                 ib_dealloc_pd(ctx->pd);
1986                 ctx->pd = NULL;
1987                 ib_destroy_cq(ctx->cq);
1988                 ctx->cq = NULL;
1989                 ctx->state = DEMUX_PV_STATE_DOWN;
1990         }
1991 }
1992
1993 static int mlx4_ib_tunnels_update(struct mlx4_ib_dev *dev, int slave,
1994                                   int port, int do_init)
1995 {
1996         int ret = 0;
1997
1998         if (!do_init) {
1999                 clean_vf_mcast(&dev->sriov.demux[port - 1], slave);
2000                 /* for master, destroy real sqp resources */
2001                 if (slave == mlx4_master_func_num(dev->dev))
2002                         destroy_pv_resources(dev, slave, port,
2003                                              dev->sriov.sqps[port - 1], 1);
2004                 /* destroy the tunnel qp resources */
2005                 destroy_pv_resources(dev, slave, port,
2006                                      dev->sriov.demux[port - 1].tun[slave], 1);
2007                 return 0;
2008         }
2009
2010         /* create the tunnel qp resources */
2011         ret = create_pv_resources(&dev->ib_dev, slave, port, 1,
2012                                   dev->sriov.demux[port - 1].tun[slave]);
2013
2014         /* for master, create the real sqp resources */
2015         if (!ret && slave == mlx4_master_func_num(dev->dev))
2016                 ret = create_pv_resources(&dev->ib_dev, slave, port, 0,
2017                                           dev->sriov.sqps[port - 1]);
2018         return ret;
2019 }
2020
2021 void mlx4_ib_tunnels_update_work(struct work_struct *work)
2022 {
2023         struct mlx4_ib_demux_work *dmxw;
2024
2025         dmxw = container_of(work, struct mlx4_ib_demux_work, work);
2026         mlx4_ib_tunnels_update(dmxw->dev, dmxw->slave, (int) dmxw->port,
2027                                dmxw->do_init);
2028         kfree(dmxw);
2029         return;
2030 }
2031
2032 static int mlx4_ib_alloc_demux_ctx(struct mlx4_ib_dev *dev,
2033                                        struct mlx4_ib_demux_ctx *ctx,
2034                                        int port)
2035 {
2036         char name[12];
2037         int ret = 0;
2038         int i;
2039
2040         ctx->tun = kcalloc(dev->dev->caps.sqp_demux,
2041                            sizeof (struct mlx4_ib_demux_pv_ctx *), GFP_KERNEL);
2042         if (!ctx->tun)
2043                 return -ENOMEM;
2044
2045         ctx->dev = dev;
2046         ctx->port = port;
2047         ctx->ib_dev = &dev->ib_dev;
2048
2049         for (i = 0;
2050              i < min(dev->dev->caps.sqp_demux,
2051              (u16)(dev->dev->persist->num_vfs + 1));
2052              i++) {
2053                 struct mlx4_active_ports actv_ports =
2054                         mlx4_get_active_ports(dev->dev, i);
2055
2056                 if (!test_bit(port - 1, actv_ports.ports))
2057                         continue;
2058
2059                 ret = alloc_pv_object(dev, i, port, &ctx->tun[i]);
2060                 if (ret) {
2061                         ret = -ENOMEM;
2062                         goto err_mcg;
2063                 }
2064         }
2065
2066         ret = mlx4_ib_mcg_port_init(ctx);
2067         if (ret) {
2068                 pr_err("Failed initializing mcg para-virt (%d)\n", ret);
2069                 goto err_mcg;
2070         }
2071
2072         snprintf(name, sizeof name, "mlx4_ibt%d", port);
2073         ctx->wq = create_singlethread_workqueue(name);
2074         if (!ctx->wq) {
2075                 pr_err("Failed to create tunnelling WQ for port %d\n", port);
2076                 ret = -ENOMEM;
2077                 goto err_wq;
2078         }
2079
2080         snprintf(name, sizeof name, "mlx4_ibud%d", port);
2081         ctx->ud_wq = create_singlethread_workqueue(name);
2082         if (!ctx->ud_wq) {
2083                 pr_err("Failed to create up/down WQ for port %d\n", port);
2084                 ret = -ENOMEM;
2085                 goto err_udwq;
2086         }
2087
2088         return 0;
2089
2090 err_udwq:
2091         destroy_workqueue(ctx->wq);
2092         ctx->wq = NULL;
2093
2094 err_wq:
2095         mlx4_ib_mcg_port_cleanup(ctx, 1);
2096 err_mcg:
2097         for (i = 0; i < dev->dev->caps.sqp_demux; i++)
2098                 free_pv_object(dev, i, port);
2099         kfree(ctx->tun);
2100         ctx->tun = NULL;
2101         return ret;
2102 }
2103
2104 static void mlx4_ib_free_sqp_ctx(struct mlx4_ib_demux_pv_ctx *sqp_ctx)
2105 {
2106         if (sqp_ctx->state > DEMUX_PV_STATE_DOWN) {
2107                 sqp_ctx->state = DEMUX_PV_STATE_DOWNING;
2108                 flush_workqueue(sqp_ctx->wq);
2109                 if (sqp_ctx->has_smi) {
2110                         ib_destroy_qp(sqp_ctx->qp[0].qp);
2111                         sqp_ctx->qp[0].qp = NULL;
2112                         mlx4_ib_free_pv_qp_bufs(sqp_ctx, IB_QPT_SMI, 0);
2113                 }
2114                 ib_destroy_qp(sqp_ctx->qp[1].qp);
2115                 sqp_ctx->qp[1].qp = NULL;
2116                 mlx4_ib_free_pv_qp_bufs(sqp_ctx, IB_QPT_GSI, 0);
2117                 ib_dealloc_pd(sqp_ctx->pd);
2118                 sqp_ctx->pd = NULL;
2119                 ib_destroy_cq(sqp_ctx->cq);
2120                 sqp_ctx->cq = NULL;
2121                 sqp_ctx->state = DEMUX_PV_STATE_DOWN;
2122         }
2123 }
2124
2125 static void mlx4_ib_free_demux_ctx(struct mlx4_ib_demux_ctx *ctx)
2126 {
2127         int i;
2128         if (ctx) {
2129                 struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
2130                 mlx4_ib_mcg_port_cleanup(ctx, 1);
2131                 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2132                         if (!ctx->tun[i])
2133                                 continue;
2134                         if (ctx->tun[i]->state > DEMUX_PV_STATE_DOWN)
2135                                 ctx->tun[i]->state = DEMUX_PV_STATE_DOWNING;
2136                 }
2137                 flush_workqueue(ctx->wq);
2138                 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2139                         destroy_pv_resources(dev, i, ctx->port, ctx->tun[i], 0);
2140                         free_pv_object(dev, i, ctx->port);
2141                 }
2142                 kfree(ctx->tun);
2143                 destroy_workqueue(ctx->ud_wq);
2144                 destroy_workqueue(ctx->wq);
2145         }
2146 }
2147
2148 static void mlx4_ib_master_tunnels(struct mlx4_ib_dev *dev, int do_init)
2149 {
2150         int i;
2151
2152         if (!mlx4_is_master(dev->dev))
2153                 return;
2154         /* initialize or tear down tunnel QPs for the master */
2155         for (i = 0; i < dev->dev->caps.num_ports; i++)
2156                 mlx4_ib_tunnels_update(dev, mlx4_master_func_num(dev->dev), i + 1, do_init);
2157         return;
2158 }
2159
2160 int mlx4_ib_init_sriov(struct mlx4_ib_dev *dev)
2161 {
2162         int i = 0;
2163         int err;
2164
2165         if (!mlx4_is_mfunc(dev->dev))
2166                 return 0;
2167
2168         dev->sriov.is_going_down = 0;
2169         spin_lock_init(&dev->sriov.going_down_lock);
2170         mlx4_ib_cm_paravirt_init(dev);
2171
2172         mlx4_ib_warn(&dev->ib_dev, "multi-function enabled\n");
2173
2174         if (mlx4_is_slave(dev->dev)) {
2175                 mlx4_ib_warn(&dev->ib_dev, "operating in qp1 tunnel mode\n");
2176                 return 0;
2177         }
2178
2179         for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2180                 if (i == mlx4_master_func_num(dev->dev))
2181                         mlx4_put_slave_node_guid(dev->dev, i, dev->ib_dev.node_guid);
2182                 else
2183                         mlx4_put_slave_node_guid(dev->dev, i, mlx4_ib_gen_node_guid());
2184         }
2185
2186         err = mlx4_ib_init_alias_guid_service(dev);
2187         if (err) {
2188                 mlx4_ib_warn(&dev->ib_dev, "Failed init alias guid process.\n");
2189                 goto paravirt_err;
2190         }
2191         err = mlx4_ib_device_register_sysfs(dev);
2192         if (err) {
2193                 mlx4_ib_warn(&dev->ib_dev, "Failed to register sysfs\n");
2194                 goto sysfs_err;
2195         }
2196
2197         mlx4_ib_warn(&dev->ib_dev, "initializing demux service for %d qp1 clients\n",
2198                      dev->dev->caps.sqp_demux);
2199         for (i = 0; i < dev->num_ports; i++) {
2200                 union ib_gid gid;
2201                 err = __mlx4_ib_query_gid(&dev->ib_dev, i + 1, 0, &gid, 1);
2202                 if (err)
2203                         goto demux_err;
2204                 dev->sriov.demux[i].guid_cache[0] = gid.global.interface_id;
2205                 err = alloc_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1,
2206                                       &dev->sriov.sqps[i]);
2207                 if (err)
2208                         goto demux_err;
2209                 err = mlx4_ib_alloc_demux_ctx(dev, &dev->sriov.demux[i], i + 1);
2210                 if (err)
2211                         goto free_pv;
2212         }
2213         mlx4_ib_master_tunnels(dev, 1);
2214         return 0;
2215
2216 free_pv:
2217         free_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1);
2218 demux_err:
2219         while (--i >= 0) {
2220                 free_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1);
2221                 mlx4_ib_free_demux_ctx(&dev->sriov.demux[i]);
2222         }
2223         mlx4_ib_device_unregister_sysfs(dev);
2224
2225 sysfs_err:
2226         mlx4_ib_destroy_alias_guid_service(dev);
2227
2228 paravirt_err:
2229         mlx4_ib_cm_paravirt_clean(dev, -1);
2230
2231         return err;
2232 }
2233
2234 void mlx4_ib_close_sriov(struct mlx4_ib_dev *dev)
2235 {
2236         int i;
2237         unsigned long flags;
2238
2239         if (!mlx4_is_mfunc(dev->dev))
2240                 return;
2241
2242         spin_lock_irqsave(&dev->sriov.going_down_lock, flags);
2243         dev->sriov.is_going_down = 1;
2244         spin_unlock_irqrestore(&dev->sriov.going_down_lock, flags);
2245         if (mlx4_is_master(dev->dev)) {
2246                 for (i = 0; i < dev->num_ports; i++) {
2247                         flush_workqueue(dev->sriov.demux[i].ud_wq);
2248                         mlx4_ib_free_sqp_ctx(dev->sriov.sqps[i]);
2249                         kfree(dev->sriov.sqps[i]);
2250                         dev->sriov.sqps[i] = NULL;
2251                         mlx4_ib_free_demux_ctx(&dev->sriov.demux[i]);
2252                 }
2253
2254                 mlx4_ib_cm_paravirt_clean(dev, -1);
2255                 mlx4_ib_destroy_alias_guid_service(dev);
2256                 mlx4_ib_device_unregister_sysfs(dev);
2257         }
2258 }