drivers/infiniband/hw/ipath/ipath_driver.c

   1 /*
   2  * Copyright (c) 2006 QLogic, Inc. All rights reserved.
   3  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
   4  *
   5  * This software is available to you under a choice of one of two
   6  * licenses.  You may choose to be licensed under the terms of the GNU
   7  * General Public License (GPL) Version 2, available from the file
   8  * COPYING in the main directory of this source tree, or the
   9  * OpenIB.org BSD license below:
  10  *
  11  *     Redistribution and use in source and binary forms, with or
  12  *     without modification, are permitted provided that the following
  13  *     conditions are met:
  14  *
  15  *      - Redistributions of source code must retain the above
  16  *        copyright notice, this list of conditions and the following
  17  *        disclaimer.
  18  *
  19  *      - Redistributions in binary form must reproduce the above
  20  *        copyright notice, this list of conditions and the following
  21  *        disclaimer in the documentation and/or other materials
  22  *        provided with the distribution.
  23  *
  24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31  * SOFTWARE.
  32  */
  33
  34 #include <linux/spinlock.h>
  35 #include <linux/idr.h>
  36 #include <linux/pci.h>
  37 #include <linux/delay.h>
  38 #include <linux/netdevice.h>
  39 #include <linux/vmalloc.h>
  40
  41 #include "ipath_kernel.h"
  42 #include "ipath_verbs.h"
  43 #include "ipath_common.h"
  44
  45 static void ipath_update_pio_bufs(struct ipath_devdata *);
  46
  47 const char *ipath_get_unit_name(int unit)
  48 {
  49         static char iname[16];
  50         snprintf(iname, sizeof iname, "infinipath%u", unit);
  51         return iname;
  52 }
  53
  54 #define DRIVER_LOAD_MSG "QLogic " IPATH_DRV_NAME " loaded: "
  55 #define PFX IPATH_DRV_NAME ": "
  56
  57 /*
  58  * The size has to be longer than this string, so we can append
  59  * board/chip information to it in the init code.
  60  */
  61 const char ib_ipath_version[] = IPATH_IDSTR "\n";
  62
  63 static struct idr unit_table;
  64 DEFINE_SPINLOCK(ipath_devs_lock);
  65 LIST_HEAD(ipath_dev_list);
  66
  67 wait_queue_head_t ipath_state_wait;
  68
  69 unsigned ipath_debug = __IPATH_INFO;
  70
  71 module_param_named(debug, ipath_debug, uint, S_IWUSR | S_IRUGO);
  72 MODULE_PARM_DESC(debug, "mask for debug prints");
  73 EXPORT_SYMBOL_GPL(ipath_debug);
  74
  75 MODULE_LICENSE("GPL");
  76 MODULE_AUTHOR("QLogic <support@pathscale.com>");
  77 MODULE_DESCRIPTION("QLogic InfiniPath driver");
  78
  79 const char *ipath_ibcstatus_str[] = {
  80         "Disabled",
  81         "LinkUp",
  82         "PollActive",
  83         "PollQuiet",
  84         "SleepDelay",
  85         "SleepQuiet",
  86         "LState6",              /* unused */
  87         "LState7",              /* unused */
  88         "CfgDebounce",
  89         "CfgRcvfCfg",
  90         "CfgWaitRmt",
  91         "CfgIdle",
  92         "RecovRetrain",
  93         "LState0xD",            /* unused */
  94         "RecovWaitRmt",
  95         "RecovIdle",
  96 };
  97
  98 static void __devexit ipath_remove_one(struct pci_dev *);
  99 static int __devinit ipath_init_one(struct pci_dev *,
 100                                     const struct pci_device_id *);
 101
 102 /* Only needed for registration, nothing else needs this info */
 103 #define PCI_VENDOR_ID_PATHSCALE 0x1fc1
 104 #define PCI_DEVICE_ID_INFINIPATH_HT 0xd
 105 #define PCI_DEVICE_ID_INFINIPATH_PE800 0x10
 106
 107 static const struct pci_device_id ipath_pci_tbl[] = {
 108         { PCI_DEVICE(PCI_VENDOR_ID_PATHSCALE, PCI_DEVICE_ID_INFINIPATH_HT) },
 109         { PCI_DEVICE(PCI_VENDOR_ID_PATHSCALE, PCI_DEVICE_ID_INFINIPATH_PE800) },
 110         { 0, }
 111 };
 112
 113 MODULE_DEVICE_TABLE(pci, ipath_pci_tbl);
 114
 115 static struct pci_driver ipath_driver = {
 116         .name = IPATH_DRV_NAME,
 117         .probe = ipath_init_one,
 118         .remove = __devexit_p(ipath_remove_one),
 119         .id_table = ipath_pci_tbl,
 120 };
 121
 122
 123 static inline void read_bars(struct ipath_devdata *dd, struct pci_dev *dev,
 124                              u32 *bar0, u32 *bar1)
 125 {
 126         int ret;
 127
 128         ret = pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
 129         if (ret)
 130                 ipath_dev_err(dd, "failed to read bar0 before enable: "
 131                               "error %d\n", -ret);
 132
 133         ret = pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, bar1);
 134         if (ret)
 135                 ipath_dev_err(dd, "failed to read bar1 before enable: "
 136                               "error %d\n", -ret);
 137
 138         ipath_dbg("Read bar0 %x bar1 %x\n", *bar0, *bar1);
 139 }
 140
 141 static void ipath_free_devdata(struct pci_dev *pdev,
 142                                struct ipath_devdata *dd)
 143 {
 144         unsigned long flags;
 145
 146         pci_set_drvdata(pdev, NULL);
 147
 148         if (dd->ipath_unit != -1) {
 149                 spin_lock_irqsave(&ipath_devs_lock, flags);
 150                 idr_remove(&unit_table, dd->ipath_unit);
 151                 list_del(&dd->ipath_list);
 152                 spin_unlock_irqrestore(&ipath_devs_lock, flags);
 153         }
 154         vfree(dd);
 155 }
 156
 157 static struct ipath_devdata *ipath_alloc_devdata(struct pci_dev *pdev)
 158 {
 159         unsigned long flags;
 160         struct ipath_devdata *dd;
 161         int ret;
 162
 163         if (!idr_pre_get(&unit_table, GFP_KERNEL)) {
 164                 dd = ERR_PTR(-ENOMEM);
 165                 goto bail;
 166         }
 167
 168         dd = vmalloc(sizeof(*dd));
 169         if (!dd) {
 170                 dd = ERR_PTR(-ENOMEM);
 171                 goto bail;
 172         }
 173         memset(dd, 0, sizeof(*dd));
 174         dd->ipath_unit = -1;
 175
 176         spin_lock_irqsave(&ipath_devs_lock, flags);
 177
 178         ret = idr_get_new(&unit_table, dd, &dd->ipath_unit);
 179         if (ret < 0) {
 180                 printk(KERN_ERR IPATH_DRV_NAME
 181                        ": Could not allocate unit ID: error %d\n", -ret);
 182                 ipath_free_devdata(pdev, dd);
 183                 dd = ERR_PTR(ret);
 184                 goto bail_unlock;
 185         }
 186
 187         dd->pcidev = pdev;
 188         pci_set_drvdata(pdev, dd);
 189
 190         list_add(&dd->ipath_list, &ipath_dev_list);
 191
 192 bail_unlock:
 193         spin_unlock_irqrestore(&ipath_devs_lock, flags);
 194
 195 bail:
 196         return dd;
 197 }
 198
 199 static inline struct ipath_devdata *__ipath_lookup(int unit)
 200 {
 201         return idr_find(&unit_table, unit);
 202 }
 203
 204 struct ipath_devdata *ipath_lookup(int unit)
 205 {
 206         struct ipath_devdata *dd;
 207         unsigned long flags;
 208
 209         spin_lock_irqsave(&ipath_devs_lock, flags);
 210         dd = __ipath_lookup(unit);
 211         spin_unlock_irqrestore(&ipath_devs_lock, flags);
 212
 213         return dd;
 214 }
 215
 216 int ipath_count_units(int *npresentp, int *nupp, u32 *maxportsp)
 217 {
 218         int nunits, npresent, nup;
 219         struct ipath_devdata *dd;
 220         unsigned long flags;
 221         u32 maxports;
 222
 223         nunits = npresent = nup = maxports = 0;
 224
 225         spin_lock_irqsave(&ipath_devs_lock, flags);
 226
 227         list_for_each_entry(dd, &ipath_dev_list, ipath_list) {
 228                 nunits++;
 229                 if ((dd->ipath_flags & IPATH_PRESENT) && dd->ipath_kregbase)
 230                         npresent++;
 231                 if (dd->ipath_lid &&
 232                     !(dd->ipath_flags & (IPATH_DISABLED | IPATH_LINKDOWN
 233                                          | IPATH_LINKUNK)))
 234                         nup++;
 235                 if (dd->ipath_cfgports > maxports)
 236                         maxports = dd->ipath_cfgports;
 237         }
 238
 239         spin_unlock_irqrestore(&ipath_devs_lock, flags);
 240
 241         if (npresentp)
 242                 *npresentp = npresent;
 243         if (nupp)
 244                 *nupp = nup;
 245         if (maxportsp)
 246                 *maxportsp = maxports;
 247
 248         return nunits;
 249 }
 250
 251 /*
 252  * These next two routines are placeholders in case we don't have per-arch
 253  * code for controlling write combining.  If explicit control of write
 254  * combining is not available, performance will probably be awful.
 255  */
 256
 257 int __attribute__((weak)) ipath_enable_wc(struct ipath_devdata *dd)
 258 {
 259         return -EOPNOTSUPP;
 260 }
 261
 262 void __attribute__((weak)) ipath_disable_wc(struct ipath_devdata *dd)
 263 {
 264 }
 265
 266 static int __devinit ipath_init_one(struct pci_dev *pdev,
 267                                     const struct pci_device_id *ent)
 268 {
 269         int ret, len, j;
 270         struct ipath_devdata *dd;
 271         unsigned long long addr;
 272         u32 bar0 = 0, bar1 = 0;
 273         u8 rev;
 274
 275         dd = ipath_alloc_devdata(pdev);
 276         if (IS_ERR(dd)) {
 277                 ret = PTR_ERR(dd);
 278                 printk(KERN_ERR IPATH_DRV_NAME
 279                        ": Could not allocate devdata: error %d\n", -ret);
 280                 goto bail;
 281         }
 282
 283         ipath_cdbg(VERBOSE, "initializing unit #%u\n", dd->ipath_unit);
 284
 285         read_bars(dd, pdev, &bar0, &bar1);
 286
 287         ret = pci_enable_device(pdev);
 288         if (ret) {
 289                 /* This can happen iff:
 290                  *
 291                  * We did a chip reset, and then failed to reprogram the
 292                  * BAR, or the chip reset due to an internal error.  We then
 293                  * unloaded the driver and reloaded it.
 294                  *
 295                  * Both reset cases set the BAR back to initial state.  For
 296                  * the latter case, the AER sticky error bit at offset 0x718
 297                  * should be set, but the Linux kernel doesn't yet know
 298                  * about that, it appears.  If the original BAR was retained
 299                  * in the kernel data structures, this may be OK.
 300                  */
 301                 ipath_dev_err(dd, "enable unit %d failed: error %d\n",
 302                               dd->ipath_unit, -ret);
 303                 goto bail_devdata;
 304         }
 305         addr = pci_resource_start(pdev, 0);
 306         len = pci_resource_len(pdev, 0);
 307         ipath_cdbg(VERBOSE, "regbase (0) %llx len %d pdev->irq %d, vend %x/%x "
 308                    "driver_data %lx\n", addr, len, pdev->irq, ent->vendor,
 309                    ent->device, ent->driver_data);
 310
 311         read_bars(dd, pdev, &bar0, &bar1);
 312
 313         if (!bar1 && !(bar0 & ~0xf)) {
 314                 if (addr) {
 315                         dev_info(&pdev->dev, "BAR is 0 (probable RESET), "
 316                                  "rewriting as %llx\n", addr);
 317                         ret = pci_write_config_dword(
 318                                 pdev, PCI_BASE_ADDRESS_0, addr);
 319                         if (ret) {
 320                                 ipath_dev_err(dd, "rewrite of BAR0 "
 321                                               "failed: err %d\n", -ret);
 322                                 goto bail_disable;
 323                         }
 324                         ret = pci_write_config_dword(
 325                                 pdev, PCI_BASE_ADDRESS_1, addr >> 32);
 326                         if (ret) {
 327                                 ipath_dev_err(dd, "rewrite of BAR1 "
 328                                               "failed: err %d\n", -ret);
 329                                 goto bail_disable;
 330                         }
 331                 } else {
 332                         ipath_dev_err(dd, "BAR is 0 (probable RESET), "
 333                                       "not usable until reboot\n");
 334                         ret = -ENODEV;
 335                         goto bail_disable;
 336                 }
 337         }
 338
 339         ret = pci_request_regions(pdev, IPATH_DRV_NAME);
 340         if (ret) {
 341                 dev_info(&pdev->dev, "pci_request_regions unit %u fails: "
 342                          "err %d\n", dd->ipath_unit, -ret);
 343                 goto bail_disable;
 344         }
 345
 346         ret = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
 347         if (ret) {
 348                 /*
 349                  * if the 64 bit setup fails, try 32 bit.  Some systems
 350                  * do not setup 64 bit maps on systems with 2GB or less
 351                  * memory installed.
 352                  */
 353                 ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
 354                 if (ret) {
 355                         dev_info(&pdev->dev,
 356                                 "Unable to set DMA mask for unit %u: %d\n",
 357                                 dd->ipath_unit, ret);
 358                         goto bail_regions;
 359                 }
 360                 else {
 361                         ipath_dbg("No 64bit DMA mask, used 32 bit mask\n");
 362                         ret = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
 363                         if (ret)
 364                                 dev_info(&pdev->dev,
 365                                         "Unable to set DMA consistent mask "
 366                                         "for unit %u: %d\n",
 367                                         dd->ipath_unit, ret);
 368
 369                 }
 370         }
 371         else {
 372                 ret = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
 373                 if (ret)
 374                         dev_info(&pdev->dev,
 375                                 "Unable to set DMA consistent mask "
 376                                 "for unit %u: %d\n",
 377                                 dd->ipath_unit, ret);
 378         }
 379
 380         pci_set_master(pdev);
 381
 382         /*
 383          * Save BARs to rewrite after device reset.  Save all 64 bits of
 384          * BAR, just in case.
 385          */
 386         dd->ipath_pcibar0 = addr;
 387         dd->ipath_pcibar1 = addr >> 32;
 388         dd->ipath_deviceid = ent->device;       /* save for later use */
 389         dd->ipath_vendorid = ent->vendor;
 390
 391         /* setup the chip-specific functions, as early as possible. */
 392         switch (ent->device) {
 393         case PCI_DEVICE_ID_INFINIPATH_HT:
 394                 ipath_init_iba6110_funcs(dd);
 395                 break;
 396         case PCI_DEVICE_ID_INFINIPATH_PE800:
 397                 ipath_init_iba6120_funcs(dd);
 398                 break;
 399         default:
 400                 ipath_dev_err(dd, "Found unknown QLogic deviceid 0x%x, "
 401                               "failing\n", ent->device);
 402                 return -ENODEV;
 403         }
 404
 405         for (j = 0; j < 6; j++) {
 406                 if (!pdev->resource[j].start)
 407                         continue;
 408                 ipath_cdbg(VERBOSE, "BAR %d start %llx, end %llx, len %llx\n",
 409                            j, (unsigned long long)pdev->resource[j].start,
 410                            (unsigned long long)pdev->resource[j].end,
 411                            (unsigned long long)pci_resource_len(pdev, j));
 412         }
 413
 414         if (!addr) {
 415                 ipath_dev_err(dd, "No valid address in BAR 0!\n");
 416                 ret = -ENODEV;
 417                 goto bail_regions;
 418         }
 419
 420         dd->ipath_deviceid = ent->device;       /* save for later use */
 421         dd->ipath_vendorid = ent->vendor;
 422
 423         ret = pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
 424         if (ret) {
 425                 ipath_dev_err(dd, "Failed to read PCI revision ID unit "
 426                               "%u: err %d\n", dd->ipath_unit, -ret);
 427                 goto bail_regions;      /* shouldn't ever happen */
 428         }
 429         dd->ipath_pcirev = rev;
 430
 431 #if defined(__powerpc__)
 432         /* There isn't a generic way to specify writethrough mappings */
 433         dd->ipath_kregbase = __ioremap(addr, len,
 434                 (_PAGE_NO_CACHE|_PAGE_WRITETHRU));
 435 #else
 436         dd->ipath_kregbase = ioremap_nocache(addr, len);
 437 #endif
 438
 439         if (!dd->ipath_kregbase) {
 440                 ipath_dbg("Unable to map io addr %llx to kvirt, failing\n",
 441                           addr);
 442                 ret = -ENOMEM;
 443                 goto bail_iounmap;
 444         }
 445         dd->ipath_kregend = (u64 __iomem *)
 446                 ((void __iomem *)dd->ipath_kregbase + len);
 447         dd->ipath_physaddr = addr;      /* used for io_remap, etc. */
 448         /* for user mmap */
 449         ipath_cdbg(VERBOSE, "mapped io addr %llx to kregbase %p\n",
 450                    addr, dd->ipath_kregbase);
 451
 452         /*
 453          * clear ipath_flags here instead of in ipath_init_chip as it is set
 454          * by ipath_setup_htconfig.
 455          */
 456         dd->ipath_flags = 0;
 457         dd->ipath_lli_counter = 0;
 458         dd->ipath_lli_errors = 0;
 459
 460         if (dd->ipath_f_bus(dd, pdev))
 461                 ipath_dev_err(dd, "Failed to setup config space; "
 462                               "continuing anyway\n");
 463
 464         /*
 465          * set up our interrupt handler; IRQF_SHARED probably not needed,
 466          * since MSI interrupts shouldn't be shared but won't  hurt for now.
 467          * check 0 irq after we return from chip-specific bus setup, since
 468          * that can affect this due to setup
 469          */
 470         if (!dd->ipath_irq)
 471                 ipath_dev_err(dd, "irq is 0, BIOS error?  Interrupts won't "
 472                               "work\n");
 473         else {
 474                 ret = request_irq(dd->ipath_irq, ipath_intr, IRQF_SHARED,
 475                                   IPATH_DRV_NAME, dd);
 476                 if (ret) {
 477                         ipath_dev_err(dd, "Couldn't setup irq handler, "
 478                                       "irq=%d: %d\n", dd->ipath_irq, ret);
 479                         goto bail_iounmap;
 480                 }
 481         }
 482
 483         ret = ipath_init_chip(dd, 0);   /* do the chip-specific init */
 484         if (ret)
 485                 goto bail_iounmap;
 486
 487         ret = ipath_enable_wc(dd);
 488
 489         if (ret) {
 490                 ipath_dev_err(dd, "Write combining not enabled "
 491                               "(err %d): performance may be poor\n",
 492                               -ret);
 493                 ret = 0;
 494         }
 495
 496         ipath_device_create_group(&pdev->dev, dd);
 497         ipathfs_add_device(dd);
 498         ipath_user_add(dd);
 499         ipath_diag_add(dd);
 500         ipath_register_ib_device(dd);
 501
 502         goto bail;
 503
 504 bail_iounmap:
 505         iounmap((volatile void __iomem *) dd->ipath_kregbase);
 506
 507 bail_regions:
 508         pci_release_regions(pdev);
 509
 510 bail_disable:
 511         pci_disable_device(pdev);
 512
 513 bail_devdata:
 514         ipath_free_devdata(pdev, dd);
 515
 516 bail:
 517         return ret;
 518 }
 519
 520 static void __devexit cleanup_device(struct ipath_devdata *dd)
 521 {
 522         int port;
 523
 524         ipath_shutdown_device(dd);
 525
 526         if (*dd->ipath_statusp & IPATH_STATUS_CHIP_PRESENT) {
 527                 /* can't do anything more with chip; needs re-init */
 528                 *dd->ipath_statusp &= ~IPATH_STATUS_CHIP_PRESENT;
 529                 if (dd->ipath_kregbase) {
 530                         /*
 531                          * if we haven't already cleaned up before these are
 532                          * to ensure any register reads/writes "fail" until
 533                          * re-init
 534                          */
 535                         dd->ipath_kregbase = NULL;
 536                         dd->ipath_uregbase = 0;
 537                         dd->ipath_sregbase = 0;
 538                         dd->ipath_cregbase = 0;
 539                         dd->ipath_kregsize = 0;
 540                 }
 541                 ipath_disable_wc(dd);
 542         }
 543
 544         if (dd->ipath_pioavailregs_dma) {
 545                 dma_free_coherent(&dd->pcidev->dev, PAGE_SIZE,
 546                                   (void *) dd->ipath_pioavailregs_dma,
 547                                   dd->ipath_pioavailregs_phys);
 548                 dd->ipath_pioavailregs_dma = NULL;
 549         }
 550         if (dd->ipath_dummy_hdrq) {
 551                 dma_free_coherent(&dd->pcidev->dev,
 552                         dd->ipath_pd[0]->port_rcvhdrq_size,
 553                         dd->ipath_dummy_hdrq, dd->ipath_dummy_hdrq_phys);
 554                 dd->ipath_dummy_hdrq = NULL;
 555         }
 556
 557         if (dd->ipath_pageshadow) {
 558                 struct page **tmpp = dd->ipath_pageshadow;
 559                 dma_addr_t *tmpd = dd->ipath_physshadow;
 560                 int i, cnt = 0;
 561
 562                 ipath_cdbg(VERBOSE, "Unlocking any expTID pages still "
 563                            "locked\n");
 564                 for (port = 0; port < dd->ipath_cfgports; port++) {
 565                         int port_tidbase = port * dd->ipath_rcvtidcnt;
 566                         int maxtid = port_tidbase + dd->ipath_rcvtidcnt;
 567                         for (i = port_tidbase; i < maxtid; i++) {
 568                                 if (!tmpp[i])
 569                                         continue;
 570                                 pci_unmap_page(dd->pcidev, tmpd[i],
 571                                         PAGE_SIZE, PCI_DMA_FROMDEVICE);
 572                                 ipath_release_user_pages(&tmpp[i], 1);
 573                                 tmpp[i] = NULL;
 574                                 cnt++;
 575                         }
 576                 }
 577                 if (cnt) {
 578                         ipath_stats.sps_pageunlocks += cnt;
 579                         ipath_cdbg(VERBOSE, "There were still %u expTID "
 580                                    "entries locked\n", cnt);
 581                 }
 582                 if (ipath_stats.sps_pagelocks ||
 583                     ipath_stats.sps_pageunlocks)
 584                         ipath_cdbg(VERBOSE, "%llu pages locked, %llu "
 585                                    "unlocked via ipath_m{un}lock\n",
 586                                    (unsigned long long)
 587                                    ipath_stats.sps_pagelocks,
 588                                    (unsigned long long)
 589                                    ipath_stats.sps_pageunlocks);
 590
 591                 ipath_cdbg(VERBOSE, "Free shadow page tid array at %p\n",
 592                            dd->ipath_pageshadow);
 593                 vfree(dd->ipath_pageshadow);
 594                 dd->ipath_pageshadow = NULL;
 595         }
 596
 597         /*
 598          * free any resources still in use (usually just kernel ports)
 599          * at unload; we do for portcnt, not cfgports, because cfgports
 600          * could have changed while we were loaded.
 601          */
 602         for (port = 0; port < dd->ipath_portcnt; port++) {
 603                 struct ipath_portdata *pd = dd->ipath_pd[port];
 604                 dd->ipath_pd[port] = NULL;
 605                 ipath_free_pddata(dd, pd);
 606         }
 607         kfree(dd->ipath_pd);
 608         /*
 609          * debuggability, in case some cleanup path tries to use it
 610          * after this
 611          */
 612         dd->ipath_pd = NULL;
 613 }
 614
 615 static void __devexit ipath_remove_one(struct pci_dev *pdev)
 616 {
 617         struct ipath_devdata *dd = pci_get_drvdata(pdev);
 618
 619         ipath_cdbg(VERBOSE, "removing, pdev=%p, dd=%p\n", pdev, dd);
 620
 621         if (dd->verbs_dev)
 622                 ipath_unregister_ib_device(dd->verbs_dev);
 623
 624         ipath_diag_remove(dd);
 625         ipath_user_remove(dd);
 626         ipathfs_remove_device(dd);
 627         ipath_device_remove_group(&pdev->dev, dd);
 628
 629         ipath_cdbg(VERBOSE, "Releasing pci memory regions, dd %p, "
 630                    "unit %u\n", dd, (u32) dd->ipath_unit);
 631
 632         cleanup_device(dd);
 633
 634         /*
 635          * turn off rcv, send, and interrupts for all ports, all drivers
 636          * should also hard reset the chip here?
 637          * free up port 0 (kernel) rcvhdr, egr bufs, and eventually tid bufs
 638          * for all versions of the driver, if they were allocated
 639          */
 640         if (dd->ipath_irq) {
 641                 ipath_cdbg(VERBOSE, "unit %u free irq %d\n",
 642                            dd->ipath_unit, dd->ipath_irq);
 643                 dd->ipath_f_free_irq(dd);
 644         } else
 645                 ipath_dbg("irq is 0, not doing free_irq "
 646                           "for unit %u\n", dd->ipath_unit);
 647         /*
 648          * we check for NULL here, because it's outside
 649          * the kregbase check, and we need to call it
 650          * after the free_irq.  Thus it's possible that
 651          * the function pointers were never initialized.
 652          */
 653         if (dd->ipath_f_cleanup)
 654                 /* clean up chip-specific stuff */
 655                 dd->ipath_f_cleanup(dd);
 656
 657         ipath_cdbg(VERBOSE, "Unmapping kregbase %p\n", dd->ipath_kregbase);
 658         iounmap((volatile void __iomem *) dd->ipath_kregbase);
 659         pci_release_regions(pdev);
 660         ipath_cdbg(VERBOSE, "calling pci_disable_device\n");
 661         pci_disable_device(pdev);
 662
 663         ipath_free_devdata(pdev, dd);
 664 }
 665
 666 /* general driver use */
 667 DEFINE_MUTEX(ipath_mutex);
 668
 669 static DEFINE_SPINLOCK(ipath_pioavail_lock);
 670
 671 /**
 672  * ipath_disarm_piobufs - cancel a range of PIO buffers
 673  * @dd: the infinipath device
 674  * @first: the first PIO buffer to cancel
 675  * @cnt: the number of PIO buffers to cancel
 676  *
 677  * cancel a range of PIO buffers, used when they might be armed, but
 678  * not triggered.  Used at init to ensure buffer state, and also user
 679  * process close, in case it died while writing to a PIO buffer
 680  * Also after errors.
 681  */
 682 void ipath_disarm_piobufs(struct ipath_devdata *dd, unsigned first,
 683                           unsigned cnt)
 684 {
 685         unsigned i, last = first + cnt;
 686         u64 sendctrl, sendorig;
 687
 688         ipath_cdbg(PKT, "disarm %u PIObufs first=%u\n", cnt, first);
 689         sendorig = dd->ipath_sendctrl | INFINIPATH_S_DISARM;
 690         for (i = first; i < last; i++) {
 691                 sendctrl = sendorig |
 692                         (i << INFINIPATH_S_DISARMPIOBUF_SHIFT);
 693                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
 694                                  sendctrl);
 695         }
 696
 697         /*
 698          * Write it again with current value, in case ipath_sendctrl changed
 699          * while we were looping; no critical bits that would require
 700          * locking.
 701          *
 702          * Write a 0, and then the original value, reading scratch in
 703          * between.  This seems to avoid a chip timing race that causes
 704          * pioavail updates to memory to stop.
 705          */
 706         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
 707                          0);
 708         sendorig = ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
 709         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
 710                          dd->ipath_sendctrl);
 711 }
 712
 713 /**
 714  * ipath_wait_linkstate - wait for an IB link state change to occur
 715  * @dd: the infinipath device
 716  * @state: the state to wait for
 717  * @msecs: the number of milliseconds to wait
 718  *
 719  * wait up to msecs milliseconds for IB link state change to occur for
 720  * now, take the easy polling route.  Currently used only by
 721  * ipath_set_linkstate.  Returns 0 if state reached, otherwise
 722  * -ETIMEDOUT state can have multiple states set, for any of several
 723  * transitions.
 724  */
 725 static int ipath_wait_linkstate(struct ipath_devdata *dd, u32 state,
 726                                 int msecs)
 727 {
 728         dd->ipath_state_wanted = state;
 729         wait_event_interruptible_timeout(ipath_state_wait,
 730                                          (dd->ipath_flags & state),
 731                                          msecs_to_jiffies(msecs));
 732         dd->ipath_state_wanted = 0;
 733
 734         if (!(dd->ipath_flags & state)) {
 735                 u64 val;
 736                 ipath_cdbg(VERBOSE, "Didn't reach linkstate %s within %u"
 737                            " ms\n",
 738                            /* test INIT ahead of DOWN, both can be set */
 739                            (state & IPATH_LINKINIT) ? "INIT" :
 740                            ((state & IPATH_LINKDOWN) ? "DOWN" :
 741                             ((state & IPATH_LINKARMED) ? "ARM" : "ACTIVE")),
 742                            msecs);
 743                 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_ibcstatus);
 744                 ipath_cdbg(VERBOSE, "ibcc=%llx ibcstatus=%llx (%s)\n",
 745                            (unsigned long long) ipath_read_kreg64(
 746                                    dd, dd->ipath_kregs->kr_ibcctrl),
 747                            (unsigned long long) val,
 748                            ipath_ibcstatus_str[val & 0xf]);
 749         }
 750         return (dd->ipath_flags & state) ? 0 : -ETIMEDOUT;
 751 }
 752
 753 void ipath_decode_err(char *buf, size_t blen, ipath_err_t err)
 754 {
 755         *buf = '\0';
 756         if (err & INFINIPATH_E_RHDRLEN)
 757                 strlcat(buf, "rhdrlen ", blen);
 758         if (err & INFINIPATH_E_RBADTID)
 759                 strlcat(buf, "rbadtid ", blen);
 760         if (err & INFINIPATH_E_RBADVERSION)
 761                 strlcat(buf, "rbadversion ", blen);
 762         if (err & INFINIPATH_E_RHDR)
 763                 strlcat(buf, "rhdr ", blen);
 764         if (err & INFINIPATH_E_RLONGPKTLEN)
 765                 strlcat(buf, "rlongpktlen ", blen);
 766         if (err & INFINIPATH_E_RSHORTPKTLEN)
 767                 strlcat(buf, "rshortpktlen ", blen);
 768         if (err & INFINIPATH_E_RMAXPKTLEN)
 769                 strlcat(buf, "rmaxpktlen ", blen);
 770         if (err & INFINIPATH_E_RMINPKTLEN)
 771                 strlcat(buf, "rminpktlen ", blen);
 772         if (err & INFINIPATH_E_RFORMATERR)
 773                 strlcat(buf, "rformaterr ", blen);
 774         if (err & INFINIPATH_E_RUNSUPVL)
 775                 strlcat(buf, "runsupvl ", blen);
 776         if (err & INFINIPATH_E_RUNEXPCHAR)
 777                 strlcat(buf, "runexpchar ", blen);
 778         if (err & INFINIPATH_E_RIBFLOW)
 779                 strlcat(buf, "ribflow ", blen);
 780         if (err & INFINIPATH_E_REBP)
 781                 strlcat(buf, "EBP ", blen);
 782         if (err & INFINIPATH_E_SUNDERRUN)
 783                 strlcat(buf, "sunderrun ", blen);
 784         if (err & INFINIPATH_E_SPIOARMLAUNCH)
 785                 strlcat(buf, "spioarmlaunch ", blen);
 786         if (err & INFINIPATH_E_SUNEXPERRPKTNUM)
 787                 strlcat(buf, "sunexperrpktnum ", blen);
 788         if (err & INFINIPATH_E_SDROPPEDDATAPKT)
 789                 strlcat(buf, "sdroppeddatapkt ", blen);
 790         if (err & INFINIPATH_E_SDROPPEDSMPPKT)
 791                 strlcat(buf, "sdroppedsmppkt ", blen);
 792         if (err & INFINIPATH_E_SMAXPKTLEN)
 793                 strlcat(buf, "smaxpktlen ", blen);
 794         if (err & INFINIPATH_E_SMINPKTLEN)
 795                 strlcat(buf, "sminpktlen ", blen);
 796         if (err & INFINIPATH_E_SUNSUPVL)
 797                 strlcat(buf, "sunsupVL ", blen);
 798         if (err & INFINIPATH_E_SPKTLEN)
 799                 strlcat(buf, "spktlen ", blen);
 800         if (err & INFINIPATH_E_INVALIDADDR)
 801                 strlcat(buf, "invalidaddr ", blen);
 802         if (err & INFINIPATH_E_RICRC)
 803                 strlcat(buf, "CRC ", blen);
 804         if (err & INFINIPATH_E_RVCRC)
 805                 strlcat(buf, "VCRC ", blen);
 806         if (err & INFINIPATH_E_RRCVEGRFULL)
 807                 strlcat(buf, "rcvegrfull ", blen);
 808         if (err & INFINIPATH_E_RRCVHDRFULL)
 809                 strlcat(buf, "rcvhdrfull ", blen);
 810         if (err & INFINIPATH_E_IBSTATUSCHANGED)
 811                 strlcat(buf, "ibcstatuschg ", blen);
 812         if (err & INFINIPATH_E_RIBLOSTLINK)
 813                 strlcat(buf, "riblostlink ", blen);
 814         if (err & INFINIPATH_E_HARDWARE)
 815                 strlcat(buf, "hardware ", blen);
 816         if (err & INFINIPATH_E_RESET)
 817                 strlcat(buf, "reset ", blen);
 818 }
 819
 820 /**
 821  * get_rhf_errstring - decode RHF errors
 822  * @err: the err number
 823  * @msg: the output buffer
 824  * @len: the length of the output buffer
 825  *
 826  * only used one place now, may want more later
 827  */
 828 static void get_rhf_errstring(u32 err, char *msg, size_t len)
 829 {
 830         /* if no errors, and so don't need to check what's first */
 831         *msg = '\0';
 832
 833         if (err & INFINIPATH_RHF_H_ICRCERR)
 834                 strlcat(msg, "icrcerr ", len);
 835         if (err & INFINIPATH_RHF_H_VCRCERR)
 836                 strlcat(msg, "vcrcerr ", len);
 837         if (err & INFINIPATH_RHF_H_PARITYERR)
 838                 strlcat(msg, "parityerr ", len);
 839         if (err & INFINIPATH_RHF_H_LENERR)
 840                 strlcat(msg, "lenerr ", len);
 841         if (err & INFINIPATH_RHF_H_MTUERR)
 842                 strlcat(msg, "mtuerr ", len);
 843         if (err & INFINIPATH_RHF_H_IHDRERR)
 844                 /* infinipath hdr checksum error */
 845                 strlcat(msg, "ipathhdrerr ", len);
 846         if (err & INFINIPATH_RHF_H_TIDERR)
 847                 strlcat(msg, "tiderr ", len);
 848         if (err & INFINIPATH_RHF_H_MKERR)
 849                 /* bad port, offset, etc. */
 850                 strlcat(msg, "invalid ipathhdr ", len);
 851         if (err & INFINIPATH_RHF_H_IBERR)
 852                 strlcat(msg, "iberr ", len);
 853         if (err & INFINIPATH_RHF_L_SWA)
 854                 strlcat(msg, "swA ", len);
 855         if (err & INFINIPATH_RHF_L_SWB)
 856                 strlcat(msg, "swB ", len);
 857 }
 858
 859 /**
 860  * ipath_get_egrbuf - get an eager buffer
 861  * @dd: the infinipath device
 862  * @bufnum: the eager buffer to get
 863  * @err: unused
 864  *
 865  * must only be called if ipath_pd[port] is known to be allocated
 866  */
 867 static inline void *ipath_get_egrbuf(struct ipath_devdata *dd, u32 bufnum,
 868                                      int err)
 869 {
 870         return dd->ipath_port0_skbinfo ?
 871                 (void *) dd->ipath_port0_skbinfo[bufnum].skb->data : NULL;
 872 }
 873
 874 /**
 875  * ipath_alloc_skb - allocate an skb and buffer with possible constraints
 876  * @dd: the infinipath device
 877  * @gfp_mask: the sk_buff SFP mask
 878  */
 879 struct sk_buff *ipath_alloc_skb(struct ipath_devdata *dd,
 880                                 gfp_t gfp_mask)
 881 {
 882         struct sk_buff *skb;
 883         u32 len;
 884
 885         /*
 886          * Only fully supported way to handle this is to allocate lots
 887          * extra, align as needed, and then do skb_reserve().  That wastes
 888          * a lot of memory...  I'll have to hack this into infinipath_copy
 889          * also.
 890          */
 891
 892         /*
 893          * We need 2 extra bytes for ipath_ether data sent in the
 894          * key header.  In order to keep everything dword aligned,
 895          * we'll reserve 4 bytes.
 896          */
 897         len = dd->ipath_ibmaxlen + 4;
 898
 899         if (dd->ipath_flags & IPATH_4BYTE_TID) {
 900                 /* We need a 2KB multiple alignment, and there is no way
 901                  * to do it except to allocate extra and then skb_reserve
 902                  * enough to bring it up to the right alignment.
 903                  */
 904                 len += 2047;
 905         }
 906
 907         skb = __dev_alloc_skb(len, gfp_mask);
 908         if (!skb) {
 909                 ipath_dev_err(dd, "Failed to allocate skbuff, length %u\n",
 910                               len);
 911                 goto bail;
 912         }
 913
 914         skb_reserve(skb, 4);
 915
 916         if (dd->ipath_flags & IPATH_4BYTE_TID) {
 917                 u32 una = (unsigned long)skb->data & 2047;
 918                 if (una)
 919                         skb_reserve(skb, 2048 - una);
 920         }
 921
 922 bail:
 923         return skb;
 924 }
 925
 926 static void ipath_rcv_hdrerr(struct ipath_devdata *dd,
 927                              u32 eflags,
 928                              u32 l,
 929                              u32 etail,
 930                              u64 *rc)
 931 {
 932         char emsg[128];
 933         struct ipath_message_header *hdr;
 934
 935         get_rhf_errstring(eflags, emsg, sizeof emsg);
 936         hdr = (struct ipath_message_header *)&rc[1];
 937         ipath_cdbg(PKT, "RHFerrs %x hdrqtail=%x typ=%u "
 938                    "tlen=%x opcode=%x egridx=%x: %s\n",
 939                    eflags, l,
 940                    ipath_hdrget_rcv_type((__le32 *) rc),
 941                    ipath_hdrget_length_in_bytes((__le32 *) rc),
 942                    be32_to_cpu(hdr->bth[0]) >> 24,
 943                    etail, emsg);
 944
 945         /* Count local link integrity errors. */
 946         if (eflags & (INFINIPATH_RHF_H_ICRCERR | INFINIPATH_RHF_H_VCRCERR)) {
 947                 u8 n = (dd->ipath_ibcctrl >>
 948                         INFINIPATH_IBCC_PHYERRTHRESHOLD_SHIFT) &
 949                         INFINIPATH_IBCC_PHYERRTHRESHOLD_MASK;
 950
 951                 if (++dd->ipath_lli_counter > n) {
 952                         dd->ipath_lli_counter = 0;
 953                         dd->ipath_lli_errors++;
 954                 }
 955         }
 956 }
 957
 958 /*
 959  * ipath_kreceive - receive a packet
 960  * @dd: the infinipath device
 961  *
 962  * called from interrupt handler for errors or receive interrupt
 963  */
 964 void ipath_kreceive(struct ipath_devdata *dd)
 965 {
 966         u64 *rc;
 967         void *ebuf;
 968         const u32 rsize = dd->ipath_rcvhdrentsize;      /* words */
 969         const u32 maxcnt = dd->ipath_rcvhdrcnt * rsize; /* words */
 970         u32 etail = -1, l, hdrqtail;
 971         struct ipath_message_header *hdr;
 972         u32 eflags, i, etype, tlen, pkttot = 0, updegr=0, reloop=0;
 973         static u64 totcalls;    /* stats, may eventually remove */
 974
 975         if (!dd->ipath_hdrqtailptr) {
 976                 ipath_dev_err(dd,
 977                               "hdrqtailptr not set, can't do receives\n");
 978                 goto bail;
 979         }
 980
 981         /* There is already a thread processing this queue. */
 982         if (test_and_set_bit(0, &dd->ipath_rcv_pending))
 983                 goto bail;
 984
 985         l = dd->ipath_port0head;
 986         hdrqtail = (u32) le64_to_cpu(*dd->ipath_hdrqtailptr);
 987         if (l == hdrqtail)
 988                 goto done;
 989
 990 reloop:
 991         for (i = 0; l != hdrqtail; i++) {
 992                 u32 qp;
 993                 u8 *bthbytes;
 994
 995                 rc = (u64 *) (dd->ipath_pd[0]->port_rcvhdrq + (l << 2));
 996                 hdr = (struct ipath_message_header *)&rc[1];
 997                 /*
 998                  * could make a network order version of IPATH_KD_QP, and
 999                  * do the obvious shift before masking to speed this up.
1000                  */
1001                 qp = ntohl(hdr->bth[1]) & 0xffffff;
1002                 bthbytes = (u8 *) hdr->bth;
1003
1004                 eflags = ipath_hdrget_err_flags((__le32 *) rc);
1005                 etype = ipath_hdrget_rcv_type((__le32 *) rc);
1006                 /* total length */
1007                 tlen = ipath_hdrget_length_in_bytes((__le32 *) rc);
1008                 ebuf = NULL;
1009                 if (etype != RCVHQ_RCV_TYPE_EXPECTED) {
1010                         /*
1011                          * it turns out that the chips uses an eager buffer
1012                          * for all non-expected packets, whether it "needs"
1013                          * one or not.  So always get the index, but don't
1014                          * set ebuf (so we try to copy data) unless the
1015                          * length requires it.
1016                          */
1017                         etail = ipath_hdrget_index((__le32 *) rc);
1018                         if (tlen > sizeof(*hdr) ||
1019                             etype == RCVHQ_RCV_TYPE_NON_KD)
1020                                 ebuf = ipath_get_egrbuf(dd, etail, 0);
1021                 }
1022
1023                 /*
1024                  * both tiderr and ipathhdrerr are set for all plain IB
1025                  * packets; only ipathhdrerr should be set.
1026                  */
1027
1028                 if (etype != RCVHQ_RCV_TYPE_NON_KD && etype !=
1029                     RCVHQ_RCV_TYPE_ERROR && ipath_hdrget_ipath_ver(
1030                             hdr->iph.ver_port_tid_offset) !=
1031                     IPS_PROTO_VERSION) {
1032                         ipath_cdbg(PKT, "Bad InfiniPath protocol version "
1033                                    "%x\n", etype);
1034                 }
1035
1036                 if (unlikely(eflags))
1037                         ipath_rcv_hdrerr(dd, eflags, l, etail, rc);
1038                 else if (etype == RCVHQ_RCV_TYPE_NON_KD) {
1039                         ipath_ib_rcv(dd->verbs_dev, rc + 1, ebuf, tlen);
1040                         if (dd->ipath_lli_counter)
1041                                 dd->ipath_lli_counter--;
1042                         ipath_cdbg(PKT, "typ %x, opcode %x (eager, "
1043                                    "qp=%x), len %x; ignored\n",
1044                                    etype, bthbytes[0], qp, tlen);
1045                 }
1046                 else if (etype == RCVHQ_RCV_TYPE_EAGER)
1047                         ipath_cdbg(PKT, "typ %x, opcode %x (eager, "
1048                                    "qp=%x), len %x; ignored\n",
1049                                    etype, bthbytes[0], qp, tlen);
1050                 else if (etype == RCVHQ_RCV_TYPE_EXPECTED)
1051                         ipath_dbg("Bug: Expected TID, opcode %x; ignored\n",
1052                                   be32_to_cpu(hdr->bth[0]) & 0xff);
1053                 else {
1054                         /*
1055                          * error packet, type of error  unknown.
1056                          * Probably type 3, but we don't know, so don't
1057                          * even try to print the opcode, etc.
1058                          */
1059                         ipath_dbg("Error Pkt, but no eflags! egrbuf %x, "
1060                                   "len %x\nhdrq@%lx;hdrq+%x rhf: %llx; "
1061                                   "hdr %llx %llx %llx %llx %llx\n",
1062                                   etail, tlen, (unsigned long) rc, l,
1063                                   (unsigned long long) rc[0],
1064                                   (unsigned long long) rc[1],
1065                                   (unsigned long long) rc[2],
1066                                   (unsigned long long) rc[3],
1067                                   (unsigned long long) rc[4],
1068                                   (unsigned long long) rc[5]);
1069                 }
1070                 l += rsize;
1071                 if (l >= maxcnt)
1072                         l = 0;
1073                 if (etype != RCVHQ_RCV_TYPE_EXPECTED)
1074                     updegr = 1;
1075                 /*
1076                  * update head regs on last packet, and every 16 packets.
1077                  * Reduce bus traffic, while still trying to prevent
1078                  * rcvhdrq overflows, for when the queue is nearly full
1079                  */
1080                 if (l == hdrqtail || (i && !(i&0xf))) {
1081                         u64 lval;
1082                         if (l == hdrqtail)
1083                                 /* request IBA6120 interrupt only on last */
1084                                 lval = dd->ipath_rhdrhead_intr_off | l;
1085                         else
1086                                 lval = l;
1087                         (void)ipath_write_ureg(dd, ur_rcvhdrhead, lval, 0);
1088                         if (updegr) {
1089                                 (void)ipath_write_ureg(dd, ur_rcvegrindexhead,
1090                                                        etail, 0);
1091                                 updegr = 0;
1092                         }
1093                 }
1094         }
1095
1096         if (!dd->ipath_rhdrhead_intr_off && !reloop) {
1097                 /* IBA6110 workaround; we can have a race clearing chip
1098                  * interrupt with another interrupt about to be delivered,
1099                  * and can clear it before it is delivered on the GPIO
1100                  * workaround.  By doing the extra check here for the
1101                  * in-memory tail register updating while we were doing
1102                  * earlier packets, we "almost" guarantee we have covered
1103                  * that case.
1104                  */
1105                 u32 hqtail = (u32)le64_to_cpu(*dd->ipath_hdrqtailptr);
1106                 if (hqtail != hdrqtail) {
1107                         hdrqtail = hqtail;
1108                         reloop = 1; /* loop 1 extra time at most */
1109                         goto reloop;
1110                 }
1111         }
1112
1113         pkttot += i;
1114
1115         dd->ipath_port0head = l;
1116
1117         if (pkttot > ipath_stats.sps_maxpkts_call)
1118                 ipath_stats.sps_maxpkts_call = pkttot;
1119         ipath_stats.sps_port0pkts += pkttot;
1120         ipath_stats.sps_avgpkts_call =
1121                 ipath_stats.sps_port0pkts / ++totcalls;
1122
1123 done:
1124         clear_bit(0, &dd->ipath_rcv_pending);
1125         smp_mb__after_clear_bit();
1126
1127 bail:;
1128 }
1129
1130 /**
1131  * ipath_update_pio_bufs - update shadow copy of the PIO availability map
1132  * @dd: the infinipath device
1133  *
1134  * called whenever our local copy indicates we have run out of send buffers
1135  * NOTE: This can be called from interrupt context by some code
1136  * and from non-interrupt context by ipath_getpiobuf().
1137  */
1138
1139 static void ipath_update_pio_bufs(struct ipath_devdata *dd)
1140 {
1141         unsigned long flags;
1142         int i;
1143         const unsigned piobregs = (unsigned)dd->ipath_pioavregs;
1144
1145         /* If the generation (check) bits have changed, then we update the
1146          * busy bit for the corresponding PIO buffer.  This algorithm will
1147          * modify positions to the value they already have in some cases
1148          * (i.e., no change), but it's faster than changing only the bits
1149          * that have changed.
1150          *
1151          * We would like to do this atomicly, to avoid spinlocks in the
1152          * critical send path, but that's not really possible, given the
1153          * type of changes, and that this routine could be called on
1154          * multiple cpu's simultaneously, so we lock in this routine only,
1155          * to avoid conflicting updates; all we change is the shadow, and
1156          * it's a single 64 bit memory location, so by definition the update
1157          * is atomic in terms of what other cpu's can see in testing the
1158          * bits.  The spin_lock overhead isn't too bad, since it only
1159          * happens when all buffers are in use, so only cpu overhead, not
1160          * latency or bandwidth is affected.
1161          */
1162 #define _IPATH_ALL_CHECKBITS 0x5555555555555555ULL
1163         if (!dd->ipath_pioavailregs_dma) {
1164                 ipath_dbg("Update shadow pioavail, but regs_dma NULL!\n");
1165                 return;
1166         }
1167         if (ipath_debug & __IPATH_VERBDBG) {
1168                 /* only if packet debug and verbose */
1169                 volatile __le64 *dma = dd->ipath_pioavailregs_dma;
1170                 unsigned long *shadow = dd->ipath_pioavailshadow;
1171
1172                 ipath_cdbg(PKT, "Refill avail, dma0=%llx shad0=%lx, "
1173                            "d1=%llx s1=%lx, d2=%llx s2=%lx, d3=%llx "
1174                            "s3=%lx\n",
1175                            (unsigned long long) le64_to_cpu(dma[0]),
1176                            shadow[0],
1177                            (unsigned long long) le64_to_cpu(dma[1]),
1178                            shadow[1],
1179                            (unsigned long long) le64_to_cpu(dma[2]),
1180                            shadow[2],
1181                            (unsigned long long) le64_to_cpu(dma[3]),
1182                            shadow[3]);
1183                 if (piobregs > 4)
1184                         ipath_cdbg(
1185                                 PKT, "2nd group, dma4=%llx shad4=%lx, "
1186                                 "d5=%llx s5=%lx, d6=%llx s6=%lx, "
1187                                 "d7=%llx s7=%lx\n",
1188                                 (unsigned long long) le64_to_cpu(dma[4]),
1189                                 shadow[4],
1190                                 (unsigned long long) le64_to_cpu(dma[5]),
1191                                 shadow[5],
1192                                 (unsigned long long) le64_to_cpu(dma[6]),
1193                                 shadow[6],
1194                                 (unsigned long long) le64_to_cpu(dma[7]),
1195                                 shadow[7]);
1196         }
1197         spin_lock_irqsave(&ipath_pioavail_lock, flags);
1198         for (i = 0; i < piobregs; i++) {
1199                 u64 pchbusy, pchg, piov, pnew;
1200                 /*
1201                  * Chip Errata: bug 6641; even and odd qwords>3 are swapped
1202                  */
1203                 if (i > 3) {
1204                         if (i & 1)
1205                                 piov = le64_to_cpu(
1206                                         dd->ipath_pioavailregs_dma[i - 1]);
1207                         else
1208                                 piov = le64_to_cpu(
1209                                         dd->ipath_pioavailregs_dma[i + 1]);
1210                 } else
1211                         piov = le64_to_cpu(dd->ipath_pioavailregs_dma[i]);
1212                 pchg = _IPATH_ALL_CHECKBITS &
1213                         ~(dd->ipath_pioavailshadow[i] ^ piov);
1214                 pchbusy = pchg << INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT;
1215                 if (pchg && (pchbusy & dd->ipath_pioavailshadow[i])) {
1216                         pnew = dd->ipath_pioavailshadow[i] & ~pchbusy;
1217                         pnew |= piov & pchbusy;
1218                         dd->ipath_pioavailshadow[i] = pnew;
1219                 }
1220         }
1221         spin_unlock_irqrestore(&ipath_pioavail_lock, flags);
1222 }
1223
1224 /**
1225  * ipath_setrcvhdrsize - set the receive header size
1226  * @dd: the infinipath device
1227  * @rhdrsize: the receive header size
1228  *
1229  * called from user init code, and also layered driver init
1230  */
1231 int ipath_setrcvhdrsize(struct ipath_devdata *dd, unsigned rhdrsize)
1232 {
1233         int ret = 0;
1234
1235         if (dd->ipath_flags & IPATH_RCVHDRSZ_SET) {
1236                 if (dd->ipath_rcvhdrsize != rhdrsize) {
1237                         dev_info(&dd->pcidev->dev,
1238                                  "Error: can't set protocol header "
1239                                  "size %u, already %u\n",
1240                                  rhdrsize, dd->ipath_rcvhdrsize);
1241                         ret = -EAGAIN;
1242                 } else
1243                         ipath_cdbg(VERBOSE, "Reuse same protocol header "
1244                                    "size %u\n", dd->ipath_rcvhdrsize);
1245         } else if (rhdrsize > (dd->ipath_rcvhdrentsize -
1246                                (sizeof(u64) / sizeof(u32)))) {
1247                 ipath_dbg("Error: can't set protocol header size %u "
1248                           "(> max %u)\n", rhdrsize,
1249                           dd->ipath_rcvhdrentsize -
1250                           (u32) (sizeof(u64) / sizeof(u32)));
1251                 ret = -EOVERFLOW;
1252         } else {
1253                 dd->ipath_flags |= IPATH_RCVHDRSZ_SET;
1254                 dd->ipath_rcvhdrsize = rhdrsize;
1255                 ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvhdrsize,
1256                                  dd->ipath_rcvhdrsize);
1257                 ipath_cdbg(VERBOSE, "Set protocol header size to %u\n",
1258                            dd->ipath_rcvhdrsize);
1259         }
1260         return ret;
1261 }
1262
1263 /**
1264  * ipath_getpiobuf - find an available pio buffer
1265  * @dd: the infinipath device
1266  * @pbufnum: the buffer number is placed here
1267  *
1268  * do appropriate marking as busy, etc.
1269  * returns buffer number if one found (>=0), negative number is error.
1270  * Used by ipath_layer_send
1271  */
1272 u32 __iomem *ipath_getpiobuf(struct ipath_devdata *dd, u32 * pbufnum)
1273 {
1274         int i, j, starti, updated = 0;
1275         unsigned piobcnt, iter;
1276         unsigned long flags;
1277         unsigned long *shadow = dd->ipath_pioavailshadow;
1278         u32 __iomem *buf;
1279
1280         piobcnt = (unsigned)(dd->ipath_piobcnt2k
1281                              + dd->ipath_piobcnt4k);
1282         starti = dd->ipath_lastport_piobuf;
1283         iter = piobcnt - starti;
1284         if (dd->ipath_upd_pio_shadow) {
1285                 /*
1286                  * Minor optimization.  If we had no buffers on last call,
1287                  * start out by doing the update; continue and do scan even
1288                  * if no buffers were updated, to be paranoid
1289                  */
1290                 ipath_update_pio_bufs(dd);
1291                 /* we scanned here, don't do it at end of scan */
1292                 updated = 1;
1293                 i = starti;
1294         } else
1295                 i = dd->ipath_lastpioindex;
1296
1297 rescan:
1298         /*
1299          * while test_and_set_bit() is atomic, we do that and then the
1300          * change_bit(), and the pair is not.  See if this is the cause
1301          * of the remaining armlaunch errors.
1302          */
1303         spin_lock_irqsave(&ipath_pioavail_lock, flags);
1304         for (j = 0; j < iter; j++, i++) {
1305                 if (i >= piobcnt)
1306                         i = starti;
1307                 /*
1308                  * To avoid bus lock overhead, we first find a candidate
1309                  * buffer, then do the test and set, and continue if that
1310                  * fails.
1311                  */
1312                 if (test_bit((2 * i) + 1, shadow) ||
1313                     test_and_set_bit((2 * i) + 1, shadow))
1314                         continue;
1315                 /* flip generation bit */
1316                 change_bit(2 * i, shadow);
1317                 break;
1318         }
1319         spin_unlock_irqrestore(&ipath_pioavail_lock, flags);
1320
1321         if (j == iter) {
1322                 volatile __le64 *dma = dd->ipath_pioavailregs_dma;
1323
1324                 /*
1325                  * first time through; shadow exhausted, but may be real
1326                  * buffers available, so go see; if any updated, rescan
1327                  * (once)
1328                  */
1329                 if (!updated) {
1330                         ipath_update_pio_bufs(dd);
1331                         updated = 1;
1332                         i = starti;
1333                         goto rescan;
1334                 }
1335                 dd->ipath_upd_pio_shadow = 1;
1336                 /*
1337                  * not atomic, but if we lose one once in a while, that's OK
1338                  */
1339                 ipath_stats.sps_nopiobufs++;
1340                 if (!(++dd->ipath_consec_nopiobuf % 100000)) {
1341                         ipath_dbg(
1342                                 "%u pio sends with no bufavail; dmacopy: "
1343                                 "%llx %llx %llx %llx; shadow:  "
1344                                 "%lx %lx %lx %lx\n",
1345                                 dd->ipath_consec_nopiobuf,
1346                                 (unsigned long long) le64_to_cpu(dma[0]),
1347                                 (unsigned long long) le64_to_cpu(dma[1]),
1348                                 (unsigned long long) le64_to_cpu(dma[2]),
1349                                 (unsigned long long) le64_to_cpu(dma[3]),
1350                                 shadow[0], shadow[1], shadow[2],
1351                                 shadow[3]);
1352                         /*
1353                          * 4 buffers per byte, 4 registers above, cover rest
1354                          * below
1355                          */
1356                         if ((dd->ipath_piobcnt2k + dd->ipath_piobcnt4k) >
1357                             (sizeof(shadow[0]) * 4 * 4))
1358                                 ipath_dbg("2nd group: dmacopy: %llx %llx "
1359                                           "%llx %llx; shadow: %lx %lx "
1360                                           "%lx %lx\n",
1361                                           (unsigned long long)
1362                                           le64_to_cpu(dma[4]),
1363                                           (unsigned long long)
1364                                           le64_to_cpu(dma[5]),
1365                                           (unsigned long long)
1366                                           le64_to_cpu(dma[6]),
1367                                           (unsigned long long)
1368                                           le64_to_cpu(dma[7]),
1369                                           shadow[4], shadow[5],
1370                                           shadow[6], shadow[7]);
1371                 }
1372                 buf = NULL;
1373                 goto bail;
1374         }
1375
1376         /*
1377          * set next starting place.  Since it's just an optimization,
1378          * it doesn't matter who wins on this, so no locking
1379          */
1380         dd->ipath_lastpioindex = i + 1;
1381         if (dd->ipath_upd_pio_shadow)
1382                 dd->ipath_upd_pio_shadow = 0;
1383         if (dd->ipath_consec_nopiobuf)
1384                 dd->ipath_consec_nopiobuf = 0;
1385         if (i < dd->ipath_piobcnt2k)
1386                 buf = (u32 __iomem *) (dd->ipath_pio2kbase +
1387                                        i * dd->ipath_palign);
1388         else
1389                 buf = (u32 __iomem *)
1390                         (dd->ipath_pio4kbase +
1391                          (i - dd->ipath_piobcnt2k) * dd->ipath_4kalign);
1392         ipath_cdbg(VERBOSE, "Return piobuf%u %uk @ %p\n",
1393                    i, (i < dd->ipath_piobcnt2k) ? 2 : 4, buf);
1394         if (pbufnum)
1395                 *pbufnum = i;
1396
1397 bail:
1398         return buf;
1399 }
1400
1401 /**
1402  * ipath_create_rcvhdrq - create a receive header queue
1403  * @dd: the infinipath device
1404  * @pd: the port data
1405  *
1406  * this must be contiguous memory (from an i/o perspective), and must be
1407  * DMA'able (which means for some systems, it will go through an IOMMU,
1408  * or be forced into a low address range).
1409  */
1410 int ipath_create_rcvhdrq(struct ipath_devdata *dd,
1411                          struct ipath_portdata *pd)
1412 {
1413         int ret = 0;
1414
1415         if (!pd->port_rcvhdrq) {
1416                 dma_addr_t phys_hdrqtail;
1417                 gfp_t gfp_flags = GFP_USER | __GFP_COMP;
1418                 int amt = ALIGN(dd->ipath_rcvhdrcnt * dd->ipath_rcvhdrentsize *
1419                                 sizeof(u32), PAGE_SIZE);
1420
1421                 pd->port_rcvhdrq = dma_alloc_coherent(
1422                         &dd->pcidev->dev, amt, &pd->port_rcvhdrq_phys,
1423                         gfp_flags);
1424
1425                 if (!pd->port_rcvhdrq) {
1426                         ipath_dev_err(dd, "attempt to allocate %d bytes "
1427                                       "for port %u rcvhdrq failed\n",
1428                                       amt, pd->port_port);
1429                         ret = -ENOMEM;
1430                         goto bail;
1431                 }
1432                 pd->port_rcvhdrtail_kvaddr = dma_alloc_coherent(
1433                         &dd->pcidev->dev, PAGE_SIZE, &phys_hdrqtail, GFP_KERNEL);
1434                 if (!pd->port_rcvhdrtail_kvaddr) {
1435                         ipath_dev_err(dd, "attempt to allocate 1 page "
1436                                       "for port %u rcvhdrqtailaddr failed\n",
1437                                       pd->port_port);
1438                         ret = -ENOMEM;
1439                         dma_free_coherent(&dd->pcidev->dev, amt,
1440                                           pd->port_rcvhdrq, pd->port_rcvhdrq_phys);
1441                         pd->port_rcvhdrq = NULL;
1442                         goto bail;
1443                 }
1444                 pd->port_rcvhdrqtailaddr_phys = phys_hdrqtail;
1445
1446                 pd->port_rcvhdrq_size = amt;
1447
1448                 ipath_cdbg(VERBOSE, "%d pages at %p (phys %lx) size=%lu "
1449                            "for port %u rcvhdr Q\n",
1450                            amt >> PAGE_SHIFT, pd->port_rcvhdrq,
1451                            (unsigned long) pd->port_rcvhdrq_phys,
1452                            (unsigned long) pd->port_rcvhdrq_size,
1453                            pd->port_port);
1454
1455                 ipath_cdbg(VERBOSE, "port %d hdrtailaddr, %llx physical\n",
1456                            pd->port_port,
1457                            (unsigned long long) phys_hdrqtail);
1458         }
1459         else
1460                 ipath_cdbg(VERBOSE, "reuse port %d rcvhdrq @%p %llx phys; "
1461                            "hdrtailaddr@%p %llx physical\n",
1462                            pd->port_port, pd->port_rcvhdrq,
1463                            (unsigned long long) pd->port_rcvhdrq_phys,
1464                            pd->port_rcvhdrtail_kvaddr, (unsigned long long)
1465                            pd->port_rcvhdrqtailaddr_phys);
1466
1467         /* clear for security and sanity on each use */
1468         memset(pd->port_rcvhdrq, 0, pd->port_rcvhdrq_size);
1469         memset(pd->port_rcvhdrtail_kvaddr, 0, PAGE_SIZE);
1470
1471         /*
1472          * tell chip each time we init it, even if we are re-using previous
1473          * memory (we zero the register at process close)
1474          */
1475         ipath_write_kreg_port(dd, dd->ipath_kregs->kr_rcvhdrtailaddr,
1476                               pd->port_port, pd->port_rcvhdrqtailaddr_phys);
1477         ipath_write_kreg_port(dd, dd->ipath_kregs->kr_rcvhdraddr,
1478                               pd->port_port, pd->port_rcvhdrq_phys);
1479
1480         ret = 0;
1481 bail:
1482         return ret;
1483 }
1484
1485 int ipath_waitfor_complete(struct ipath_devdata *dd, ipath_kreg reg_id,
1486                            u64 bits_to_wait_for, u64 * valp)
1487 {
1488         unsigned long timeout;
1489         u64 lastval, val;
1490         int ret;
1491
1492         lastval = ipath_read_kreg64(dd, reg_id);
1493         /* wait a ridiculously long time */
1494         timeout = jiffies + msecs_to_jiffies(5);
1495         do {
1496                 val = ipath_read_kreg64(dd, reg_id);
1497                 /* set so they have something, even on failures. */
1498                 *valp = val;
1499                 if ((val & bits_to_wait_for) == bits_to_wait_for) {
1500                         ret = 0;
1501                         break;
1502                 }
1503                 if (val != lastval)
1504                         ipath_cdbg(VERBOSE, "Changed from %llx to %llx, "
1505                                    "waiting for %llx bits\n",
1506                                    (unsigned long long) lastval,
1507                                    (unsigned long long) val,
1508                                    (unsigned long long) bits_to_wait_for);
1509                 cond_resched();
1510                 if (time_after(jiffies, timeout)) {
1511                         ipath_dbg("Didn't get bits %llx in register 0x%x, "
1512                                   "got %llx\n",
1513                                   (unsigned long long) bits_to_wait_for,
1514                                   reg_id, (unsigned long long) *valp);
1515                         ret = -ENODEV;
1516                         break;
1517                 }
1518         } while (1);
1519
1520         return ret;
1521 }
1522
1523 /**
1524  * ipath_waitfor_mdio_cmdready - wait for last command to complete
1525  * @dd: the infinipath device
1526  *
1527  * Like ipath_waitfor_complete(), but we wait for the CMDVALID bit to go
1528  * away indicating the last command has completed.  It doesn't return data
1529  */
1530 int ipath_waitfor_mdio_cmdready(struct ipath_devdata *dd)
1531 {
1532         unsigned long timeout;
1533         u64 val;
1534         int ret;
1535
1536         /* wait a ridiculously long time */
1537         timeout = jiffies + msecs_to_jiffies(5);
1538         do {
1539                 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_mdio);
1540                 if (!(val & IPATH_MDIO_CMDVALID)) {
1541                         ret = 0;
1542                         break;
1543                 }
1544                 cond_resched();
1545                 if (time_after(jiffies, timeout)) {
1546                         ipath_dbg("CMDVALID stuck in mdio reg? (%llx)\n",
1547                                   (unsigned long long) val);
1548                         ret = -ENODEV;
1549                         break;
1550                 }
1551         } while (1);
1552
1553         return ret;
1554 }
1555
1556 static void ipath_set_ib_lstate(struct ipath_devdata *dd, int which)
1557 {
1558         static const char *what[4] = {
1559                 [0] = "DOWN",
1560                 [INFINIPATH_IBCC_LINKCMD_INIT] = "INIT",
1561                 [INFINIPATH_IBCC_LINKCMD_ARMED] = "ARMED",
1562                 [INFINIPATH_IBCC_LINKCMD_ACTIVE] = "ACTIVE"
1563         };
1564         int linkcmd = (which >> INFINIPATH_IBCC_LINKCMD_SHIFT) &
1565                         INFINIPATH_IBCC_LINKCMD_MASK;
1566
1567         ipath_cdbg(VERBOSE, "Trying to move unit %u to %s, current ltstate "
1568                    "is %s\n", dd->ipath_unit,
1569                    what[linkcmd],
1570                    ipath_ibcstatus_str[
1571                            (ipath_read_kreg64
1572                             (dd, dd->ipath_kregs->kr_ibcstatus) >>
1573                             INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT) &
1574                            INFINIPATH_IBCS_LINKTRAININGSTATE_MASK]);
1575         /* flush all queued sends when going to DOWN or INIT, to be sure that
1576          * they don't block MAD packets */
1577         if (!linkcmd || linkcmd == INFINIPATH_IBCC_LINKCMD_INIT) {
1578                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1579                                  INFINIPATH_S_ABORT);
1580                 ipath_disarm_piobufs(dd, dd->ipath_lastport_piobuf,
1581                                     (unsigned)(dd->ipath_piobcnt2k +
1582                                     dd->ipath_piobcnt4k) -
1583                                     dd->ipath_lastport_piobuf);
1584         }
1585
1586         ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl,
1587                          dd->ipath_ibcctrl | which);
1588 }
1589
1590 int ipath_set_linkstate(struct ipath_devdata *dd, u8 newstate)
1591 {
1592         u32 lstate;
1593         int ret;
1594
1595         switch (newstate) {
1596         case IPATH_IB_LINKDOWN:
1597                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKINITCMD_POLL <<
1598                                     INFINIPATH_IBCC_LINKINITCMD_SHIFT);
1599                 /* don't wait */
1600                 ret = 0;
1601                 goto bail;
1602
1603         case IPATH_IB_LINKDOWN_SLEEP:
1604                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKINITCMD_SLEEP <<
1605                                     INFINIPATH_IBCC_LINKINITCMD_SHIFT);
1606                 /* don't wait */
1607                 ret = 0;
1608                 goto bail;
1609
1610         case IPATH_IB_LINKDOWN_DISABLE:
1611                 ipath_set_ib_lstate(dd,
1612                                     INFINIPATH_IBCC_LINKINITCMD_DISABLE <<
1613                                     INFINIPATH_IBCC_LINKINITCMD_SHIFT);
1614                 /* don't wait */
1615                 ret = 0;
1616                 goto bail;
1617
1618         case IPATH_IB_LINKINIT:
1619                 if (dd->ipath_flags & IPATH_LINKINIT) {
1620                         ret = 0;
1621                         goto bail;
1622                 }
1623                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKCMD_INIT <<
1624                                     INFINIPATH_IBCC_LINKCMD_SHIFT);
1625                 lstate = IPATH_LINKINIT;
1626                 break;
1627
1628         case IPATH_IB_LINKARM:
1629                 if (dd->ipath_flags & IPATH_LINKARMED) {
1630                         ret = 0;
1631                         goto bail;
1632                 }
1633                 if (!(dd->ipath_flags &
1634                       (IPATH_LINKINIT | IPATH_LINKACTIVE))) {
1635                         ret = -EINVAL;
1636                         goto bail;
1637                 }
1638                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKCMD_ARMED <<
1639                                     INFINIPATH_IBCC_LINKCMD_SHIFT);
1640                 /*
1641                  * Since the port can transition to ACTIVE by receiving
1642                  * a non VL 15 packet, wait for either state.
1643                  */
1644                 lstate = IPATH_LINKARMED | IPATH_LINKACTIVE;
1645                 break;
1646
1647         case IPATH_IB_LINKACTIVE:
1648                 if (dd->ipath_flags & IPATH_LINKACTIVE) {
1649                         ret = 0;
1650                         goto bail;
1651                 }
1652                 if (!(dd->ipath_flags & IPATH_LINKARMED)) {
1653                         ret = -EINVAL;
1654                         goto bail;
1655                 }
1656                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKCMD_ACTIVE <<
1657                                     INFINIPATH_IBCC_LINKCMD_SHIFT);
1658                 lstate = IPATH_LINKACTIVE;
1659                 break;
1660
1661         default:
1662                 ipath_dbg("Invalid linkstate 0x%x requested\n", newstate);
1663                 ret = -EINVAL;
1664                 goto bail;
1665         }
1666         ret = ipath_wait_linkstate(dd, lstate, 2000);
1667
1668 bail:
1669         return ret;
1670 }
1671
1672 /**
1673  * ipath_set_mtu - set the MTU
1674  * @dd: the infinipath device
1675  * @arg: the new MTU
1676  *
1677  * we can handle "any" incoming size, the issue here is whether we
1678  * need to restrict our outgoing size.   For now, we don't do any
1679  * sanity checking on this, and we don't deal with what happens to
1680  * programs that are already running when the size changes.
1681  * NOTE: changing the MTU will usually cause the IBC to go back to
1682  * link initialize (IPATH_IBSTATE_INIT) state...
1683  */
1684 int ipath_set_mtu(struct ipath_devdata *dd, u16 arg)
1685 {
1686         u32 piosize;
1687         int changed = 0;
1688         int ret;
1689
1690         /*
1691          * mtu is IB data payload max.  It's the largest power of 2 less
1692          * than piosize (or even larger, since it only really controls the
1693          * largest we can receive; we can send the max of the mtu and
1694          * piosize).  We check that it's one of the valid IB sizes.
1695          */
1696         if (arg != 256 && arg != 512 && arg != 1024 && arg != 2048 &&
1697             arg != 4096) {
1698                 ipath_dbg("Trying to set invalid mtu %u, failing\n", arg);
1699                 ret = -EINVAL;
1700                 goto bail;
1701         }
1702         if (dd->ipath_ibmtu == arg) {
1703                 ret = 0;        /* same as current */
1704                 goto bail;
1705         }
1706
1707         piosize = dd->ipath_ibmaxlen;
1708         dd->ipath_ibmtu = arg;
1709
1710         if (arg >= (piosize - IPATH_PIO_MAXIBHDR)) {
1711                 /* Only if it's not the initial value (or reset to it) */
1712                 if (piosize != dd->ipath_init_ibmaxlen) {
1713                         dd->ipath_ibmaxlen = piosize;
1714                         changed = 1;
1715                 }
1716         } else if ((arg + IPATH_PIO_MAXIBHDR) != dd->ipath_ibmaxlen) {
1717                 piosize = arg + IPATH_PIO_MAXIBHDR;
1718                 ipath_cdbg(VERBOSE, "ibmaxlen was 0x%x, setting to 0x%x "
1719                            "(mtu 0x%x)\n", dd->ipath_ibmaxlen, piosize,
1720                            arg);
1721                 dd->ipath_ibmaxlen = piosize;
1722                 changed = 1;
1723         }
1724
1725         if (changed) {
1726                 /*
1727                  * set the IBC maxpktlength to the size of our pio
1728                  * buffers in words
1729                  */
1730                 u64 ibc = dd->ipath_ibcctrl;
1731                 ibc &= ~(INFINIPATH_IBCC_MAXPKTLEN_MASK <<
1732                          INFINIPATH_IBCC_MAXPKTLEN_SHIFT);
1733
1734                 piosize = piosize - 2 * sizeof(u32);    /* ignore pbc */
1735                 dd->ipath_ibmaxlen = piosize;
1736                 piosize /= sizeof(u32); /* in words */
1737                 /*
1738                  * for ICRC, which we only send in diag test pkt mode, and
1739                  * we don't need to worry about that for mtu
1740                  */
1741                 piosize += 1;
1742
1743                 ibc |= piosize << INFINIPATH_IBCC_MAXPKTLEN_SHIFT;
1744                 dd->ipath_ibcctrl = ibc;
1745                 ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl,
1746                                  dd->ipath_ibcctrl);
1747                 dd->ipath_f_tidtemplate(dd);
1748         }
1749
1750         ret = 0;
1751
1752 bail:
1753         return ret;
1754 }
1755
1756 int ipath_set_lid(struct ipath_devdata *dd, u32 arg, u8 lmc)
1757 {
1758         dd->ipath_lid = arg;
1759         dd->ipath_lmc = lmc;
1760
1761         return 0;
1762 }
1763
1764 /**
1765  * ipath_read_kreg64_port - read a device's per-port 64-bit kernel register
1766  * @dd: the infinipath device
1767  * @regno: the register number to read
1768  * @port: the port containing the register
1769  *
1770  * Registers that vary with the chip implementation constants (port)
1771  * use this routine.
1772  */
1773 u64 ipath_read_kreg64_port(const struct ipath_devdata *dd, ipath_kreg regno,
1774                            unsigned port)
1775 {
1776         u16 where;
1777
1778         if (port < dd->ipath_portcnt &&
1779             (regno == dd->ipath_kregs->kr_rcvhdraddr ||
1780              regno == dd->ipath_kregs->kr_rcvhdrtailaddr))
1781                 where = regno + port;
1782         else
1783                 where = -1;
1784
1785         return ipath_read_kreg64(dd, where);
1786 }
1787
1788 /**
1789  * ipath_write_kreg_port - write a device's per-port 64-bit kernel register
1790  * @dd: the infinipath device
1791  * @regno: the register number to write
1792  * @port: the port containing the register
1793  * @value: the value to write
1794  *
1795  * Registers that vary with the chip implementation constants (port)
1796  * use this routine.
1797  */
1798 void ipath_write_kreg_port(const struct ipath_devdata *dd, ipath_kreg regno,
1799                           unsigned port, u64 value)
1800 {
1801         u16 where;
1802
1803         if (port < dd->ipath_portcnt &&
1804             (regno == dd->ipath_kregs->kr_rcvhdraddr ||
1805              regno == dd->ipath_kregs->kr_rcvhdrtailaddr))
1806                 where = regno + port;
1807         else
1808                 where = -1;
1809
1810         ipath_write_kreg(dd, where, value);
1811 }
1812
1813 /**
1814  * ipath_shutdown_device - shut down a device
1815  * @dd: the infinipath device
1816  *
1817  * This is called to make the device quiet when we are about to
1818  * unload the driver, and also when the device is administratively
1819  * disabled.   It does not free any data structures.
1820  * Everything it does has to be setup again by ipath_init_chip(dd,1)
1821  */
1822 void ipath_shutdown_device(struct ipath_devdata *dd)
1823 {
1824         u64 val;
1825
1826         ipath_dbg("Shutting down the device\n");
1827
1828         dd->ipath_flags |= IPATH_LINKUNK;
1829         dd->ipath_flags &= ~(IPATH_INITTED | IPATH_LINKDOWN |
1830                              IPATH_LINKINIT | IPATH_LINKARMED |
1831                              IPATH_LINKACTIVE);
1832         *dd->ipath_statusp &= ~(IPATH_STATUS_IB_CONF |
1833                                 IPATH_STATUS_IB_READY);
1834
1835         /* mask interrupts, but not errors */
1836         ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, 0ULL);
1837
1838         dd->ipath_rcvctrl = 0;
1839         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl,
1840                          dd->ipath_rcvctrl);
1841
1842         /*
1843          * gracefully stop all sends allowing any in progress to trickle out
1844          * first.
1845          */
1846         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl, 0ULL);
1847         /* flush it */
1848         val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
1849         /*
1850          * enough for anything that's going to trickle out to have actually
1851          * done so.
1852          */
1853         udelay(5);
1854
1855         /*
1856          * abort any armed or launched PIO buffers that didn't go. (self
1857          * clearing).  Will cause any packet currently being transmitted to
1858          * go out with an EBP, and may also cause a short packet error on
1859          * the receiver.
1860          */
1861         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1862                          INFINIPATH_S_ABORT);
1863
1864         ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKINITCMD_DISABLE <<
1865                             INFINIPATH_IBCC_LINKINITCMD_SHIFT);
1866
1867         /* disable IBC */
1868         dd->ipath_control &= ~INFINIPATH_C_LINKENABLE;
1869         ipath_write_kreg(dd, dd->ipath_kregs->kr_control,
1870                          dd->ipath_control | INFINIPATH_C_FREEZEMODE);
1871
1872         /*
1873          * clear SerdesEnable and turn the leds off; do this here because
1874          * we are unloading, so don't count on interrupts to move along
1875          * Turn the LEDs off explictly for the same reason.
1876          */
1877         dd->ipath_f_quiet_serdes(dd);
1878         dd->ipath_f_setextled(dd, 0, 0);
1879
1880         if (dd->ipath_stats_timer_active) {
1881                 del_timer_sync(&dd->ipath_stats_timer);
1882                 dd->ipath_stats_timer_active = 0;
1883         }
1884
1885         /*
1886          * clear all interrupts and errors, so that the next time the driver
1887          * is loaded or device is enabled, we know that whatever is set
1888          * happened while we were unloaded
1889          */
1890         ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrclear,
1891                          ~0ULL & ~INFINIPATH_HWE_MEMBISTFAILED);
1892         ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear, -1LL);
1893         ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, -1LL);
1894 }
1895
1896 /**
1897  * ipath_free_pddata - free a port's allocated data
1898  * @dd: the infinipath device
1899  * @pd: the portdata structure
1900  *
1901  * free up any allocated data for a port
1902  * This should not touch anything that would affect a simultaneous
1903  * re-allocation of port data, because it is called after ipath_mutex
1904  * is released (and can be called from reinit as well).
1905  * It should never change any chip state, or global driver state.
1906  * (The only exception to global state is freeing the port0 port0_skbs.)
1907  */
1908 void ipath_free_pddata(struct ipath_devdata *dd, struct ipath_portdata *pd)
1909 {
1910         if (!pd)
1911                 return;
1912
1913         if (pd->port_rcvhdrq) {
1914                 ipath_cdbg(VERBOSE, "free closed port %d rcvhdrq @ %p "
1915                            "(size=%lu)\n", pd->port_port, pd->port_rcvhdrq,
1916                            (unsigned long) pd->port_rcvhdrq_size);
1917                 dma_free_coherent(&dd->pcidev->dev, pd->port_rcvhdrq_size,
1918                                   pd->port_rcvhdrq, pd->port_rcvhdrq_phys);
1919                 pd->port_rcvhdrq = NULL;
1920                 if (pd->port_rcvhdrtail_kvaddr) {
1921                         dma_free_coherent(&dd->pcidev->dev, PAGE_SIZE,
1922                                          pd->port_rcvhdrtail_kvaddr,
1923                                          pd->port_rcvhdrqtailaddr_phys);
1924                         pd->port_rcvhdrtail_kvaddr = NULL;
1925                 }
1926         }
1927         if (pd->port_port && pd->port_rcvegrbuf) {
1928                 unsigned e;
1929
1930                 for (e = 0; e < pd->port_rcvegrbuf_chunks; e++) {
1931                         void *base = pd->port_rcvegrbuf[e];
1932                         size_t size = pd->port_rcvegrbuf_size;
1933
1934                         ipath_cdbg(VERBOSE, "egrbuf free(%p, %lu), "
1935                                    "chunk %u/%u\n", base,
1936                                    (unsigned long) size,
1937                                    e, pd->port_rcvegrbuf_chunks);
1938                         dma_free_coherent(&dd->pcidev->dev, size,
1939                                 base, pd->port_rcvegrbuf_phys[e]);
1940                 }
1941                 kfree(pd->port_rcvegrbuf);
1942                 pd->port_rcvegrbuf = NULL;
1943                 kfree(pd->port_rcvegrbuf_phys);
1944                 pd->port_rcvegrbuf_phys = NULL;
1945                 pd->port_rcvegrbuf_chunks = 0;
1946         } else if (pd->port_port == 0 && dd->ipath_port0_skbinfo) {
1947                 unsigned e;
1948                 struct ipath_skbinfo *skbinfo = dd->ipath_port0_skbinfo;
1949
1950                 dd->ipath_port0_skbinfo = NULL;
1951                 ipath_cdbg(VERBOSE, "free closed port %d "
1952                            "ipath_port0_skbinfo @ %p\n", pd->port_port,
1953                            skbinfo);
1954                 for (e = 0; e < dd->ipath_rcvegrcnt; e++)
1955                 if (skbinfo[e].skb) {
1956                         pci_unmap_single(dd->pcidev, skbinfo[e].phys,
1957                                          dd->ipath_ibmaxlen,
1958                                          PCI_DMA_FROMDEVICE);
1959                         dev_kfree_skb(skbinfo[e].skb);
1960                 }
1961                 vfree(skbinfo);
1962         }
1963         kfree(pd->port_tid_pg_list);
1964         vfree(pd->subport_uregbase);
1965         vfree(pd->subport_rcvegrbuf);
1966         vfree(pd->subport_rcvhdr_base);
1967         kfree(pd);
1968 }
1969
1970 static int __init infinipath_init(void)
1971 {
1972         int ret;
1973
1974         ipath_dbg(KERN_INFO DRIVER_LOAD_MSG "%s", ib_ipath_version);
1975
1976         /*
1977          * These must be called before the driver is registered with
1978          * the PCI subsystem.
1979          */
1980         idr_init(&unit_table);
1981         if (!idr_pre_get(&unit_table, GFP_KERNEL)) {
1982                 ret = -ENOMEM;
1983                 goto bail;
1984         }
1985
1986         ret = pci_register_driver(&ipath_driver);
1987         if (ret < 0) {
1988                 printk(KERN_ERR IPATH_DRV_NAME
1989                        ": Unable to register driver: error %d\n", -ret);
1990                 goto bail_unit;
1991         }
1992
1993         ret = ipath_driver_create_group(&ipath_driver.driver);
1994         if (ret < 0) {
1995                 printk(KERN_ERR IPATH_DRV_NAME ": Unable to create driver "
1996                        "sysfs entries: error %d\n", -ret);
1997                 goto bail_pci;
1998         }
1999
2000         ret = ipath_init_ipathfs();
2001         if (ret < 0) {
2002                 printk(KERN_ERR IPATH_DRV_NAME ": Unable to create "
2003                        "ipathfs: error %d\n", -ret);
2004                 goto bail_group;
2005         }
2006
2007         goto bail;
2008
2009 bail_group:
2010         ipath_driver_remove_group(&ipath_driver.driver);
2011
2012 bail_pci:
2013         pci_unregister_driver(&ipath_driver);
2014
2015 bail_unit:
2016         idr_destroy(&unit_table);
2017
2018 bail:
2019         return ret;
2020 }
2021
2022 static void __exit infinipath_cleanup(void)
2023 {
2024         ipath_exit_ipathfs();
2025
2026         ipath_driver_remove_group(&ipath_driver.driver);
2027
2028         ipath_cdbg(VERBOSE, "Unregistering pci driver\n");
2029         pci_unregister_driver(&ipath_driver);
2030
2031         idr_destroy(&unit_table);
2032 }
2033
2034 /**
2035  * ipath_reset_device - reset the chip if possible
2036  * @unit: the device to reset
2037  *
2038  * Whether or not reset is successful, we attempt to re-initialize the chip
2039  * (that is, much like a driver unload/reload).  We clear the INITTED flag
2040  * so that the various entry points will fail until we reinitialize.  For
2041  * now, we only allow this if no user ports are open that use chip resources
2042  */
2043 int ipath_reset_device(int unit)
2044 {
2045         int ret, i;
2046         struct ipath_devdata *dd = ipath_lookup(unit);
2047
2048         if (!dd) {
2049                 ret = -ENODEV;
2050                 goto bail;
2051         }
2052
2053         dev_info(&dd->pcidev->dev, "Reset on unit %u requested\n", unit);
2054
2055         if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT)) {
2056                 dev_info(&dd->pcidev->dev, "Invalid unit number %u or "
2057                          "not initialized or not present\n", unit);
2058                 ret = -ENXIO;
2059                 goto bail;
2060         }
2061
2062         if (dd->ipath_pd)
2063                 for (i = 1; i < dd->ipath_cfgports; i++) {
2064                         if (dd->ipath_pd[i] && dd->ipath_pd[i]->port_cnt) {
2065                                 ipath_dbg("unit %u port %d is in use "
2066                                           "(PID %u cmd %s), can't reset\n",
2067                                           unit, i,
2068                                           dd->ipath_pd[i]->port_pid,
2069                                           dd->ipath_pd[i]->port_comm);
2070                                 ret = -EBUSY;
2071                                 goto bail;
2072                         }
2073                 }
2074
2075         dd->ipath_flags &= ~IPATH_INITTED;
2076         ret = dd->ipath_f_reset(dd);
2077         if (ret != 1)
2078                 ipath_dbg("reset was not successful\n");
2079         ipath_dbg("Trying to reinitialize unit %u after reset attempt\n",
2080                   unit);
2081         ret = ipath_init_chip(dd, 1);
2082         if (ret)
2083                 ipath_dev_err(dd, "Reinitialize unit %u after "
2084                               "reset failed with %d\n", unit, ret);
2085         else
2086                 dev_info(&dd->pcidev->dev, "Reinitialized unit %u after "
2087                          "resetting\n", unit);
2088
2089 bail:
2090         return ret;
2091 }
2092
2093 int ipath_set_rx_pol_inv(struct ipath_devdata *dd, u8 new_pol_inv)
2094 {
2095         u64 val;
2096         if ( new_pol_inv > INFINIPATH_XGXS_RX_POL_MASK ) {
2097                 return -1;
2098         }
2099         if ( dd->ipath_rx_pol_inv != new_pol_inv ) {
2100                 dd->ipath_rx_pol_inv = new_pol_inv;
2101                 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_xgxsconfig);
2102                 val &= ~(INFINIPATH_XGXS_RX_POL_MASK <<
2103                          INFINIPATH_XGXS_RX_POL_SHIFT);
2104                 val |= ((u64)dd->ipath_rx_pol_inv) <<
2105                         INFINIPATH_XGXS_RX_POL_SHIFT;
2106                 ipath_write_kreg(dd, dd->ipath_kregs->kr_xgxsconfig, val);
2107         }
2108         return 0;
2109 }
2110 module_init(infinipath_init);
2111 module_exit(infinipath_cleanup);