Merge tag 'for-linus-2019-08-17' of git://git.kernel.dk/linux-block
[sfrench/cifs-2.6.git] / drivers / iio / imu / inv_mpu6050 / inv_mpu_core.c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2012 Invensense, Inc.
4 */
5
6 #include <linux/module.h>
7 #include <linux/slab.h>
8 #include <linux/i2c.h>
9 #include <linux/err.h>
10 #include <linux/delay.h>
11 #include <linux/sysfs.h>
12 #include <linux/jiffies.h>
13 #include <linux/irq.h>
14 #include <linux/interrupt.h>
15 #include <linux/iio/iio.h>
16 #include <linux/acpi.h>
17 #include <linux/platform_device.h>
18 #include <linux/regulator/consumer.h>
19 #include "inv_mpu_iio.h"
20
21 /*
22  * this is the gyro scale translated from dynamic range plus/minus
23  * {250, 500, 1000, 2000} to rad/s
24  */
25 static const int gyro_scale_6050[] = {133090, 266181, 532362, 1064724};
26
27 /*
28  * this is the accel scale translated from dynamic range plus/minus
29  * {2, 4, 8, 16} to m/s^2
30  */
31 static const int accel_scale[] = {598, 1196, 2392, 4785};
32
33 static const struct inv_mpu6050_reg_map reg_set_icm20602 = {
34         .sample_rate_div        = INV_MPU6050_REG_SAMPLE_RATE_DIV,
35         .lpf                    = INV_MPU6050_REG_CONFIG,
36         .accel_lpf              = INV_MPU6500_REG_ACCEL_CONFIG_2,
37         .user_ctrl              = INV_MPU6050_REG_USER_CTRL,
38         .fifo_en                = INV_MPU6050_REG_FIFO_EN,
39         .gyro_config            = INV_MPU6050_REG_GYRO_CONFIG,
40         .accl_config            = INV_MPU6050_REG_ACCEL_CONFIG,
41         .fifo_count_h           = INV_MPU6050_REG_FIFO_COUNT_H,
42         .fifo_r_w               = INV_MPU6050_REG_FIFO_R_W,
43         .raw_gyro               = INV_MPU6050_REG_RAW_GYRO,
44         .raw_accl               = INV_MPU6050_REG_RAW_ACCEL,
45         .temperature            = INV_MPU6050_REG_TEMPERATURE,
46         .int_enable             = INV_MPU6050_REG_INT_ENABLE,
47         .int_status             = INV_MPU6050_REG_INT_STATUS,
48         .pwr_mgmt_1             = INV_MPU6050_REG_PWR_MGMT_1,
49         .pwr_mgmt_2             = INV_MPU6050_REG_PWR_MGMT_2,
50         .int_pin_cfg            = INV_MPU6050_REG_INT_PIN_CFG,
51         .accl_offset            = INV_MPU6500_REG_ACCEL_OFFSET,
52         .gyro_offset            = INV_MPU6050_REG_GYRO_OFFSET,
53         .i2c_if                 = INV_ICM20602_REG_I2C_IF,
54 };
55
56 static const struct inv_mpu6050_reg_map reg_set_6500 = {
57         .sample_rate_div        = INV_MPU6050_REG_SAMPLE_RATE_DIV,
58         .lpf                    = INV_MPU6050_REG_CONFIG,
59         .accel_lpf              = INV_MPU6500_REG_ACCEL_CONFIG_2,
60         .user_ctrl              = INV_MPU6050_REG_USER_CTRL,
61         .fifo_en                = INV_MPU6050_REG_FIFO_EN,
62         .gyro_config            = INV_MPU6050_REG_GYRO_CONFIG,
63         .accl_config            = INV_MPU6050_REG_ACCEL_CONFIG,
64         .fifo_count_h           = INV_MPU6050_REG_FIFO_COUNT_H,
65         .fifo_r_w               = INV_MPU6050_REG_FIFO_R_W,
66         .raw_gyro               = INV_MPU6050_REG_RAW_GYRO,
67         .raw_accl               = INV_MPU6050_REG_RAW_ACCEL,
68         .temperature            = INV_MPU6050_REG_TEMPERATURE,
69         .int_enable             = INV_MPU6050_REG_INT_ENABLE,
70         .int_status             = INV_MPU6050_REG_INT_STATUS,
71         .pwr_mgmt_1             = INV_MPU6050_REG_PWR_MGMT_1,
72         .pwr_mgmt_2             = INV_MPU6050_REG_PWR_MGMT_2,
73         .int_pin_cfg            = INV_MPU6050_REG_INT_PIN_CFG,
74         .accl_offset            = INV_MPU6500_REG_ACCEL_OFFSET,
75         .gyro_offset            = INV_MPU6050_REG_GYRO_OFFSET,
76         .i2c_if                 = 0,
77 };
78
79 static const struct inv_mpu6050_reg_map reg_set_6050 = {
80         .sample_rate_div        = INV_MPU6050_REG_SAMPLE_RATE_DIV,
81         .lpf                    = INV_MPU6050_REG_CONFIG,
82         .user_ctrl              = INV_MPU6050_REG_USER_CTRL,
83         .fifo_en                = INV_MPU6050_REG_FIFO_EN,
84         .gyro_config            = INV_MPU6050_REG_GYRO_CONFIG,
85         .accl_config            = INV_MPU6050_REG_ACCEL_CONFIG,
86         .fifo_count_h           = INV_MPU6050_REG_FIFO_COUNT_H,
87         .fifo_r_w               = INV_MPU6050_REG_FIFO_R_W,
88         .raw_gyro               = INV_MPU6050_REG_RAW_GYRO,
89         .raw_accl               = INV_MPU6050_REG_RAW_ACCEL,
90         .temperature            = INV_MPU6050_REG_TEMPERATURE,
91         .int_enable             = INV_MPU6050_REG_INT_ENABLE,
92         .pwr_mgmt_1             = INV_MPU6050_REG_PWR_MGMT_1,
93         .pwr_mgmt_2             = INV_MPU6050_REG_PWR_MGMT_2,
94         .int_pin_cfg            = INV_MPU6050_REG_INT_PIN_CFG,
95         .accl_offset            = INV_MPU6050_REG_ACCEL_OFFSET,
96         .gyro_offset            = INV_MPU6050_REG_GYRO_OFFSET,
97         .i2c_if                 = 0,
98 };
99
100 static const struct inv_mpu6050_chip_config chip_config_6050 = {
101         .fsr = INV_MPU6050_FSR_2000DPS,
102         .lpf = INV_MPU6050_FILTER_20HZ,
103         .divider = INV_MPU6050_FIFO_RATE_TO_DIVIDER(INV_MPU6050_INIT_FIFO_RATE),
104         .gyro_fifo_enable = false,
105         .accl_fifo_enable = false,
106         .accl_fs = INV_MPU6050_FS_02G,
107         .user_ctrl = 0,
108 };
109
110 /* Indexed by enum inv_devices */
111 static const struct inv_mpu6050_hw hw_info[] = {
112         {
113                 .whoami = INV_MPU6050_WHOAMI_VALUE,
114                 .name = "MPU6050",
115                 .reg = &reg_set_6050,
116                 .config = &chip_config_6050,
117         },
118         {
119                 .whoami = INV_MPU6500_WHOAMI_VALUE,
120                 .name = "MPU6500",
121                 .reg = &reg_set_6500,
122                 .config = &chip_config_6050,
123         },
124         {
125                 .whoami = INV_MPU6515_WHOAMI_VALUE,
126                 .name = "MPU6515",
127                 .reg = &reg_set_6500,
128                 .config = &chip_config_6050,
129         },
130         {
131                 .whoami = INV_MPU6000_WHOAMI_VALUE,
132                 .name = "MPU6000",
133                 .reg = &reg_set_6050,
134                 .config = &chip_config_6050,
135         },
136         {
137                 .whoami = INV_MPU9150_WHOAMI_VALUE,
138                 .name = "MPU9150",
139                 .reg = &reg_set_6050,
140                 .config = &chip_config_6050,
141         },
142         {
143                 .whoami = INV_MPU9250_WHOAMI_VALUE,
144                 .name = "MPU9250",
145                 .reg = &reg_set_6500,
146                 .config = &chip_config_6050,
147         },
148         {
149                 .whoami = INV_MPU9255_WHOAMI_VALUE,
150                 .name = "MPU9255",
151                 .reg = &reg_set_6500,
152                 .config = &chip_config_6050,
153         },
154         {
155                 .whoami = INV_ICM20608_WHOAMI_VALUE,
156                 .name = "ICM20608",
157                 .reg = &reg_set_6500,
158                 .config = &chip_config_6050,
159         },
160         {
161                 .whoami = INV_ICM20602_WHOAMI_VALUE,
162                 .name = "ICM20602",
163                 .reg = &reg_set_icm20602,
164                 .config = &chip_config_6050,
165         },
166 };
167
168 int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en, u32 mask)
169 {
170         unsigned int d, mgmt_1;
171         int result;
172         /*
173          * switch clock needs to be careful. Only when gyro is on, can
174          * clock source be switched to gyro. Otherwise, it must be set to
175          * internal clock
176          */
177         if (mask == INV_MPU6050_BIT_PWR_GYRO_STBY) {
178                 result = regmap_read(st->map, st->reg->pwr_mgmt_1, &mgmt_1);
179                 if (result)
180                         return result;
181
182                 mgmt_1 &= ~INV_MPU6050_BIT_CLK_MASK;
183         }
184
185         if ((mask == INV_MPU6050_BIT_PWR_GYRO_STBY) && (!en)) {
186                 /*
187                  * turning off gyro requires switch to internal clock first.
188                  * Then turn off gyro engine
189                  */
190                 mgmt_1 |= INV_CLK_INTERNAL;
191                 result = regmap_write(st->map, st->reg->pwr_mgmt_1, mgmt_1);
192                 if (result)
193                         return result;
194         }
195
196         result = regmap_read(st->map, st->reg->pwr_mgmt_2, &d);
197         if (result)
198                 return result;
199         if (en)
200                 d &= ~mask;
201         else
202                 d |= mask;
203         result = regmap_write(st->map, st->reg->pwr_mgmt_2, d);
204         if (result)
205                 return result;
206
207         if (en) {
208                 /* Wait for output to stabilize */
209                 msleep(INV_MPU6050_TEMP_UP_TIME);
210                 if (mask == INV_MPU6050_BIT_PWR_GYRO_STBY) {
211                         /* switch internal clock to PLL */
212                         mgmt_1 |= INV_CLK_PLL;
213                         result = regmap_write(st->map,
214                                               st->reg->pwr_mgmt_1, mgmt_1);
215                         if (result)
216                                 return result;
217                 }
218         }
219
220         return 0;
221 }
222
223 int inv_mpu6050_set_power_itg(struct inv_mpu6050_state *st, bool power_on)
224 {
225         int result;
226
227         if (power_on) {
228                 if (!st->powerup_count) {
229                         result = regmap_write(st->map, st->reg->pwr_mgmt_1, 0);
230                         if (result)
231                                 return result;
232                         usleep_range(INV_MPU6050_REG_UP_TIME_MIN,
233                                      INV_MPU6050_REG_UP_TIME_MAX);
234                 }
235                 st->powerup_count++;
236         } else {
237                 if (st->powerup_count == 1) {
238                         result = regmap_write(st->map, st->reg->pwr_mgmt_1,
239                                               INV_MPU6050_BIT_SLEEP);
240                         if (result)
241                                 return result;
242                 }
243                 st->powerup_count--;
244         }
245
246         dev_dbg(regmap_get_device(st->map), "set power %d, count=%u\n",
247                 power_on, st->powerup_count);
248
249         return 0;
250 }
251 EXPORT_SYMBOL_GPL(inv_mpu6050_set_power_itg);
252
253 /**
254  *  inv_mpu6050_set_lpf_regs() - set low pass filter registers, chip dependent
255  *
256  *  MPU60xx/MPU9150 use only 1 register for accelerometer + gyroscope
257  *  MPU6500 and above have a dedicated register for accelerometer
258  */
259 static int inv_mpu6050_set_lpf_regs(struct inv_mpu6050_state *st,
260                                     enum inv_mpu6050_filter_e val)
261 {
262         int result;
263
264         result = regmap_write(st->map, st->reg->lpf, val);
265         if (result)
266                 return result;
267
268         switch (st->chip_type) {
269         case INV_MPU6050:
270         case INV_MPU6000:
271         case INV_MPU9150:
272                 /* old chips, nothing to do */
273                 result = 0;
274                 break;
275         default:
276                 /* set accel lpf */
277                 result = regmap_write(st->map, st->reg->accel_lpf, val);
278                 break;
279         }
280
281         return result;
282 }
283
284 /**
285  *  inv_mpu6050_init_config() - Initialize hardware, disable FIFO.
286  *
287  *  Initial configuration:
288  *  FSR: Â± 2000DPS
289  *  DLPF: 20Hz
290  *  FIFO rate: 50Hz
291  *  Clock source: Gyro PLL
292  */
293 static int inv_mpu6050_init_config(struct iio_dev *indio_dev)
294 {
295         int result;
296         u8 d;
297         struct inv_mpu6050_state *st = iio_priv(indio_dev);
298
299         result = inv_mpu6050_set_power_itg(st, true);
300         if (result)
301                 return result;
302         d = (INV_MPU6050_FSR_2000DPS << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT);
303         result = regmap_write(st->map, st->reg->gyro_config, d);
304         if (result)
305                 goto error_power_off;
306
307         result = inv_mpu6050_set_lpf_regs(st, INV_MPU6050_FILTER_20HZ);
308         if (result)
309                 goto error_power_off;
310
311         d = INV_MPU6050_FIFO_RATE_TO_DIVIDER(INV_MPU6050_INIT_FIFO_RATE);
312         result = regmap_write(st->map, st->reg->sample_rate_div, d);
313         if (result)
314                 goto error_power_off;
315
316         d = (INV_MPU6050_FS_02G << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);
317         result = regmap_write(st->map, st->reg->accl_config, d);
318         if (result)
319                 goto error_power_off;
320
321         result = regmap_write(st->map, st->reg->int_pin_cfg, st->irq_mask);
322         if (result)
323                 return result;
324
325         memcpy(&st->chip_config, hw_info[st->chip_type].config,
326                sizeof(struct inv_mpu6050_chip_config));
327
328         /*
329          * Internal chip period is 1ms (1kHz).
330          * Let's use at the beginning the theorical value before measuring
331          * with interrupt timestamps.
332          */
333         st->chip_period = NSEC_PER_MSEC;
334
335         return inv_mpu6050_set_power_itg(st, false);
336
337 error_power_off:
338         inv_mpu6050_set_power_itg(st, false);
339         return result;
340 }
341
342 static int inv_mpu6050_sensor_set(struct inv_mpu6050_state  *st, int reg,
343                                 int axis, int val)
344 {
345         int ind, result;
346         __be16 d = cpu_to_be16(val);
347
348         ind = (axis - IIO_MOD_X) * 2;
349         result = regmap_bulk_write(st->map, reg + ind, (u8 *)&d, 2);
350         if (result)
351                 return -EINVAL;
352
353         return 0;
354 }
355
356 static int inv_mpu6050_sensor_show(struct inv_mpu6050_state  *st, int reg,
357                                    int axis, int *val)
358 {
359         int ind, result;
360         __be16 d;
361
362         ind = (axis - IIO_MOD_X) * 2;
363         result = regmap_bulk_read(st->map, reg + ind, (u8 *)&d, 2);
364         if (result)
365                 return -EINVAL;
366         *val = (short)be16_to_cpup(&d);
367
368         return IIO_VAL_INT;
369 }
370
371 static int inv_mpu6050_read_channel_data(struct iio_dev *indio_dev,
372                                          struct iio_chan_spec const *chan,
373                                          int *val)
374 {
375         struct inv_mpu6050_state *st = iio_priv(indio_dev);
376         int result;
377         int ret;
378
379         result = inv_mpu6050_set_power_itg(st, true);
380         if (result)
381                 return result;
382
383         switch (chan->type) {
384         case IIO_ANGL_VEL:
385                 result = inv_mpu6050_switch_engine(st, true,
386                                 INV_MPU6050_BIT_PWR_GYRO_STBY);
387                 if (result)
388                         goto error_power_off;
389                 ret = inv_mpu6050_sensor_show(st, st->reg->raw_gyro,
390                                               chan->channel2, val);
391                 result = inv_mpu6050_switch_engine(st, false,
392                                 INV_MPU6050_BIT_PWR_GYRO_STBY);
393                 if (result)
394                         goto error_power_off;
395                 break;
396         case IIO_ACCEL:
397                 result = inv_mpu6050_switch_engine(st, true,
398                                 INV_MPU6050_BIT_PWR_ACCL_STBY);
399                 if (result)
400                         goto error_power_off;
401                 ret = inv_mpu6050_sensor_show(st, st->reg->raw_accl,
402                                               chan->channel2, val);
403                 result = inv_mpu6050_switch_engine(st, false,
404                                 INV_MPU6050_BIT_PWR_ACCL_STBY);
405                 if (result)
406                         goto error_power_off;
407                 break;
408         case IIO_TEMP:
409                 /* wait for stablization */
410                 msleep(INV_MPU6050_SENSOR_UP_TIME);
411                 ret = inv_mpu6050_sensor_show(st, st->reg->temperature,
412                                               IIO_MOD_X, val);
413                 break;
414         default:
415                 ret = -EINVAL;
416                 break;
417         }
418
419         result = inv_mpu6050_set_power_itg(st, false);
420         if (result)
421                 goto error_power_off;
422
423         return ret;
424
425 error_power_off:
426         inv_mpu6050_set_power_itg(st, false);
427         return result;
428 }
429
430 static int
431 inv_mpu6050_read_raw(struct iio_dev *indio_dev,
432                      struct iio_chan_spec const *chan,
433                      int *val, int *val2, long mask)
434 {
435         struct inv_mpu6050_state  *st = iio_priv(indio_dev);
436         int ret = 0;
437
438         switch (mask) {
439         case IIO_CHAN_INFO_RAW:
440                 ret = iio_device_claim_direct_mode(indio_dev);
441                 if (ret)
442                         return ret;
443                 mutex_lock(&st->lock);
444                 ret = inv_mpu6050_read_channel_data(indio_dev, chan, val);
445                 mutex_unlock(&st->lock);
446                 iio_device_release_direct_mode(indio_dev);
447                 return ret;
448         case IIO_CHAN_INFO_SCALE:
449                 switch (chan->type) {
450                 case IIO_ANGL_VEL:
451                         mutex_lock(&st->lock);
452                         *val  = 0;
453                         *val2 = gyro_scale_6050[st->chip_config.fsr];
454                         mutex_unlock(&st->lock);
455
456                         return IIO_VAL_INT_PLUS_NANO;
457                 case IIO_ACCEL:
458                         mutex_lock(&st->lock);
459                         *val = 0;
460                         *val2 = accel_scale[st->chip_config.accl_fs];
461                         mutex_unlock(&st->lock);
462
463                         return IIO_VAL_INT_PLUS_MICRO;
464                 case IIO_TEMP:
465                         *val = 0;
466                         if (st->chip_type == INV_ICM20602)
467                                 *val2 = INV_ICM20602_TEMP_SCALE;
468                         else
469                                 *val2 = INV_MPU6050_TEMP_SCALE;
470
471                         return IIO_VAL_INT_PLUS_MICRO;
472                 default:
473                         return -EINVAL;
474                 }
475         case IIO_CHAN_INFO_OFFSET:
476                 switch (chan->type) {
477                 case IIO_TEMP:
478                         if (st->chip_type == INV_ICM20602)
479                                 *val = INV_ICM20602_TEMP_OFFSET;
480                         else
481                                 *val = INV_MPU6050_TEMP_OFFSET;
482
483                         return IIO_VAL_INT;
484                 default:
485                         return -EINVAL;
486                 }
487         case IIO_CHAN_INFO_CALIBBIAS:
488                 switch (chan->type) {
489                 case IIO_ANGL_VEL:
490                         mutex_lock(&st->lock);
491                         ret = inv_mpu6050_sensor_show(st, st->reg->gyro_offset,
492                                                 chan->channel2, val);
493                         mutex_unlock(&st->lock);
494                         return IIO_VAL_INT;
495                 case IIO_ACCEL:
496                         mutex_lock(&st->lock);
497                         ret = inv_mpu6050_sensor_show(st, st->reg->accl_offset,
498                                                 chan->channel2, val);
499                         mutex_unlock(&st->lock);
500                         return IIO_VAL_INT;
501
502                 default:
503                         return -EINVAL;
504                 }
505         default:
506                 return -EINVAL;
507         }
508 }
509
510 static int inv_mpu6050_write_gyro_scale(struct inv_mpu6050_state *st, int val)
511 {
512         int result, i;
513         u8 d;
514
515         for (i = 0; i < ARRAY_SIZE(gyro_scale_6050); ++i) {
516                 if (gyro_scale_6050[i] == val) {
517                         d = (i << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT);
518                         result = regmap_write(st->map, st->reg->gyro_config, d);
519                         if (result)
520                                 return result;
521
522                         st->chip_config.fsr = i;
523                         return 0;
524                 }
525         }
526
527         return -EINVAL;
528 }
529
530 static int inv_write_raw_get_fmt(struct iio_dev *indio_dev,
531                                  struct iio_chan_spec const *chan, long mask)
532 {
533         switch (mask) {
534         case IIO_CHAN_INFO_SCALE:
535                 switch (chan->type) {
536                 case IIO_ANGL_VEL:
537                         return IIO_VAL_INT_PLUS_NANO;
538                 default:
539                         return IIO_VAL_INT_PLUS_MICRO;
540                 }
541         default:
542                 return IIO_VAL_INT_PLUS_MICRO;
543         }
544
545         return -EINVAL;
546 }
547
548 static int inv_mpu6050_write_accel_scale(struct inv_mpu6050_state *st, int val)
549 {
550         int result, i;
551         u8 d;
552
553         for (i = 0; i < ARRAY_SIZE(accel_scale); ++i) {
554                 if (accel_scale[i] == val) {
555                         d = (i << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);
556                         result = regmap_write(st->map, st->reg->accl_config, d);
557                         if (result)
558                                 return result;
559
560                         st->chip_config.accl_fs = i;
561                         return 0;
562                 }
563         }
564
565         return -EINVAL;
566 }
567
568 static int inv_mpu6050_write_raw(struct iio_dev *indio_dev,
569                                  struct iio_chan_spec const *chan,
570                                  int val, int val2, long mask)
571 {
572         struct inv_mpu6050_state  *st = iio_priv(indio_dev);
573         int result;
574
575         /*
576          * we should only update scale when the chip is disabled, i.e.
577          * not running
578          */
579         result = iio_device_claim_direct_mode(indio_dev);
580         if (result)
581                 return result;
582
583         mutex_lock(&st->lock);
584         result = inv_mpu6050_set_power_itg(st, true);
585         if (result)
586                 goto error_write_raw_unlock;
587
588         switch (mask) {
589         case IIO_CHAN_INFO_SCALE:
590                 switch (chan->type) {
591                 case IIO_ANGL_VEL:
592                         result = inv_mpu6050_write_gyro_scale(st, val2);
593                         break;
594                 case IIO_ACCEL:
595                         result = inv_mpu6050_write_accel_scale(st, val2);
596                         break;
597                 default:
598                         result = -EINVAL;
599                         break;
600                 }
601                 break;
602         case IIO_CHAN_INFO_CALIBBIAS:
603                 switch (chan->type) {
604                 case IIO_ANGL_VEL:
605                         result = inv_mpu6050_sensor_set(st,
606                                                         st->reg->gyro_offset,
607                                                         chan->channel2, val);
608                         break;
609                 case IIO_ACCEL:
610                         result = inv_mpu6050_sensor_set(st,
611                                                         st->reg->accl_offset,
612                                                         chan->channel2, val);
613                         break;
614                 default:
615                         result = -EINVAL;
616                         break;
617                 }
618                 break;
619         default:
620                 result = -EINVAL;
621                 break;
622         }
623
624         result |= inv_mpu6050_set_power_itg(st, false);
625 error_write_raw_unlock:
626         mutex_unlock(&st->lock);
627         iio_device_release_direct_mode(indio_dev);
628
629         return result;
630 }
631
632 /**
633  *  inv_mpu6050_set_lpf() - set low pass filer based on fifo rate.
634  *
635  *                  Based on the Nyquist principle, the sampling rate must
636  *                  exceed twice of the bandwidth of the signal, or there
637  *                  would be alising. This function basically search for the
638  *                  correct low pass parameters based on the fifo rate, e.g,
639  *                  sampling frequency.
640  *
641  *  lpf is set automatically when setting sampling rate to avoid any aliases.
642  */
643 static int inv_mpu6050_set_lpf(struct inv_mpu6050_state *st, int rate)
644 {
645         static const int hz[] = {188, 98, 42, 20, 10, 5};
646         static const int d[] = {
647                 INV_MPU6050_FILTER_188HZ, INV_MPU6050_FILTER_98HZ,
648                 INV_MPU6050_FILTER_42HZ, INV_MPU6050_FILTER_20HZ,
649                 INV_MPU6050_FILTER_10HZ, INV_MPU6050_FILTER_5HZ
650         };
651         int i, h, result;
652         u8 data;
653
654         h = (rate >> 1);
655         i = 0;
656         while ((h < hz[i]) && (i < ARRAY_SIZE(d) - 1))
657                 i++;
658         data = d[i];
659         result = inv_mpu6050_set_lpf_regs(st, data);
660         if (result)
661                 return result;
662         st->chip_config.lpf = data;
663
664         return 0;
665 }
666
667 /**
668  * inv_mpu6050_fifo_rate_store() - Set fifo rate.
669  */
670 static ssize_t
671 inv_mpu6050_fifo_rate_store(struct device *dev, struct device_attribute *attr,
672                             const char *buf, size_t count)
673 {
674         int fifo_rate;
675         u8 d;
676         int result;
677         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
678         struct inv_mpu6050_state *st = iio_priv(indio_dev);
679
680         if (kstrtoint(buf, 10, &fifo_rate))
681                 return -EINVAL;
682         if (fifo_rate < INV_MPU6050_MIN_FIFO_RATE ||
683             fifo_rate > INV_MPU6050_MAX_FIFO_RATE)
684                 return -EINVAL;
685
686         result = iio_device_claim_direct_mode(indio_dev);
687         if (result)
688                 return result;
689
690         /* compute the chip sample rate divider */
691         d = INV_MPU6050_FIFO_RATE_TO_DIVIDER(fifo_rate);
692         /* compute back the fifo rate to handle truncation cases */
693         fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(d);
694
695         mutex_lock(&st->lock);
696         if (d == st->chip_config.divider) {
697                 result = 0;
698                 goto fifo_rate_fail_unlock;
699         }
700         result = inv_mpu6050_set_power_itg(st, true);
701         if (result)
702                 goto fifo_rate_fail_unlock;
703
704         result = regmap_write(st->map, st->reg->sample_rate_div, d);
705         if (result)
706                 goto fifo_rate_fail_power_off;
707         st->chip_config.divider = d;
708
709         result = inv_mpu6050_set_lpf(st, fifo_rate);
710         if (result)
711                 goto fifo_rate_fail_power_off;
712
713 fifo_rate_fail_power_off:
714         result |= inv_mpu6050_set_power_itg(st, false);
715 fifo_rate_fail_unlock:
716         mutex_unlock(&st->lock);
717         iio_device_release_direct_mode(indio_dev);
718         if (result)
719                 return result;
720
721         return count;
722 }
723
724 /**
725  * inv_fifo_rate_show() - Get the current sampling rate.
726  */
727 static ssize_t
728 inv_fifo_rate_show(struct device *dev, struct device_attribute *attr,
729                    char *buf)
730 {
731         struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev));
732         unsigned fifo_rate;
733
734         mutex_lock(&st->lock);
735         fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider);
736         mutex_unlock(&st->lock);
737
738         return scnprintf(buf, PAGE_SIZE, "%u\n", fifo_rate);
739 }
740
741 /**
742  * inv_attr_show() - calling this function will show current
743  *                    parameters.
744  *
745  * Deprecated in favor of IIO mounting matrix API.
746  *
747  * See inv_get_mount_matrix()
748  */
749 static ssize_t inv_attr_show(struct device *dev, struct device_attribute *attr,
750                              char *buf)
751 {
752         struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev));
753         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
754         s8 *m;
755
756         switch (this_attr->address) {
757         /*
758          * In MPU6050, the two matrix are the same because gyro and accel
759          * are integrated in one chip
760          */
761         case ATTR_GYRO_MATRIX:
762         case ATTR_ACCL_MATRIX:
763                 m = st->plat_data.orientation;
764
765                 return scnprintf(buf, PAGE_SIZE,
766                         "%d, %d, %d; %d, %d, %d; %d, %d, %d\n",
767                         m[0], m[1], m[2], m[3], m[4], m[5], m[6], m[7], m[8]);
768         default:
769                 return -EINVAL;
770         }
771 }
772
773 /**
774  * inv_mpu6050_validate_trigger() - validate_trigger callback for invensense
775  *                                  MPU6050 device.
776  * @indio_dev: The IIO device
777  * @trig: The new trigger
778  *
779  * Returns: 0 if the 'trig' matches the trigger registered by the MPU6050
780  * device, -EINVAL otherwise.
781  */
782 static int inv_mpu6050_validate_trigger(struct iio_dev *indio_dev,
783                                         struct iio_trigger *trig)
784 {
785         struct inv_mpu6050_state *st = iio_priv(indio_dev);
786
787         if (st->trig != trig)
788                 return -EINVAL;
789
790         return 0;
791 }
792
793 static const struct iio_mount_matrix *
794 inv_get_mount_matrix(const struct iio_dev *indio_dev,
795                      const struct iio_chan_spec *chan)
796 {
797         struct inv_mpu6050_state *data = iio_priv(indio_dev);
798
799         return &data->orientation;
800 }
801
802 static const struct iio_chan_spec_ext_info inv_ext_info[] = {
803         IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, inv_get_mount_matrix),
804         { }
805 };
806
807 #define INV_MPU6050_CHAN(_type, _channel2, _index)                    \
808         {                                                             \
809                 .type = _type,                                        \
810                 .modified = 1,                                        \
811                 .channel2 = _channel2,                                \
812                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
813                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |        \
814                                       BIT(IIO_CHAN_INFO_CALIBBIAS),   \
815                 .scan_index = _index,                                 \
816                 .scan_type = {                                        \
817                                 .sign = 's',                          \
818                                 .realbits = 16,                       \
819                                 .storagebits = 16,                    \
820                                 .shift = 0,                           \
821                                 .endianness = IIO_BE,                 \
822                              },                                       \
823                 .ext_info = inv_ext_info,                             \
824         }
825
826 static const struct iio_chan_spec inv_mpu_channels[] = {
827         IIO_CHAN_SOFT_TIMESTAMP(INV_MPU6050_SCAN_TIMESTAMP),
828         /*
829          * Note that temperature should only be via polled reading only,
830          * not the final scan elements output.
831          */
832         {
833                 .type = IIO_TEMP,
834                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW)
835                                 | BIT(IIO_CHAN_INFO_OFFSET)
836                                 | BIT(IIO_CHAN_INFO_SCALE),
837                 .scan_index = -1,
838         },
839         INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
840         INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
841         INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
842
843         INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X),
844         INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y),
845         INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
846 };
847
848 static const unsigned long inv_mpu_scan_masks[] = {
849         /* 3-axis accel */
850         BIT(INV_MPU6050_SCAN_ACCL_X)
851                 | BIT(INV_MPU6050_SCAN_ACCL_Y)
852                 | BIT(INV_MPU6050_SCAN_ACCL_Z),
853         /* 3-axis gyro */
854         BIT(INV_MPU6050_SCAN_GYRO_X)
855                 | BIT(INV_MPU6050_SCAN_GYRO_Y)
856                 | BIT(INV_MPU6050_SCAN_GYRO_Z),
857         /* 6-axis accel + gyro */
858         BIT(INV_MPU6050_SCAN_ACCL_X)
859                 | BIT(INV_MPU6050_SCAN_ACCL_Y)
860                 | BIT(INV_MPU6050_SCAN_ACCL_Z)
861                 | BIT(INV_MPU6050_SCAN_GYRO_X)
862                 | BIT(INV_MPU6050_SCAN_GYRO_Y)
863                 | BIT(INV_MPU6050_SCAN_GYRO_Z),
864         0,
865 };
866
867 static const struct iio_chan_spec inv_icm20602_channels[] = {
868         IIO_CHAN_SOFT_TIMESTAMP(INV_ICM20602_SCAN_TIMESTAMP),
869         {
870                 .type = IIO_TEMP,
871                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW)
872                                 | BIT(IIO_CHAN_INFO_OFFSET)
873                                 | BIT(IIO_CHAN_INFO_SCALE),
874                 .scan_index = INV_ICM20602_SCAN_TEMP,
875                 .scan_type = {
876                                 .sign = 's',
877                                 .realbits = 16,
878                                 .storagebits = 16,
879                                 .shift = 0,
880                                 .endianness = IIO_BE,
881                              },
882         },
883
884         INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_ICM20602_SCAN_GYRO_X),
885         INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_ICM20602_SCAN_GYRO_Y),
886         INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_ICM20602_SCAN_GYRO_Z),
887
888         INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_ICM20602_SCAN_ACCL_Y),
889         INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_ICM20602_SCAN_ACCL_X),
890         INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_ICM20602_SCAN_ACCL_Z),
891 };
892
893 static const unsigned long inv_icm20602_scan_masks[] = {
894         /* 3-axis accel + temp (mandatory) */
895         BIT(INV_ICM20602_SCAN_ACCL_X)
896                 | BIT(INV_ICM20602_SCAN_ACCL_Y)
897                 | BIT(INV_ICM20602_SCAN_ACCL_Z)
898                 | BIT(INV_ICM20602_SCAN_TEMP),
899         /* 3-axis gyro + temp (mandatory) */
900         BIT(INV_ICM20602_SCAN_GYRO_X)
901                 | BIT(INV_ICM20602_SCAN_GYRO_Y)
902                 | BIT(INV_ICM20602_SCAN_GYRO_Z)
903                 | BIT(INV_ICM20602_SCAN_TEMP),
904         /* 6-axis accel + gyro + temp (mandatory) */
905         BIT(INV_ICM20602_SCAN_ACCL_X)
906                 | BIT(INV_ICM20602_SCAN_ACCL_Y)
907                 | BIT(INV_ICM20602_SCAN_ACCL_Z)
908                 | BIT(INV_ICM20602_SCAN_GYRO_X)
909                 | BIT(INV_ICM20602_SCAN_GYRO_Y)
910                 | BIT(INV_ICM20602_SCAN_GYRO_Z)
911                 | BIT(INV_ICM20602_SCAN_TEMP),
912         0,
913 };
914
915 /*
916  * The user can choose any frequency between INV_MPU6050_MIN_FIFO_RATE and
917  * INV_MPU6050_MAX_FIFO_RATE, but only these frequencies are matched by the
918  * low-pass filter. Specifically, each of these sampling rates are about twice
919  * the bandwidth of a corresponding low-pass filter, which should eliminate
920  * aliasing following the Nyquist principle. By picking a frequency different
921  * from these, the user risks aliasing effects.
922  */
923 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("10 20 50 100 200 500");
924 static IIO_CONST_ATTR(in_anglvel_scale_available,
925                                           "0.000133090 0.000266181 0.000532362 0.001064724");
926 static IIO_CONST_ATTR(in_accel_scale_available,
927                                           "0.000598 0.001196 0.002392 0.004785");
928 static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO | S_IWUSR, inv_fifo_rate_show,
929         inv_mpu6050_fifo_rate_store);
930
931 /* Deprecated: kept for userspace backward compatibility. */
932 static IIO_DEVICE_ATTR(in_gyro_matrix, S_IRUGO, inv_attr_show, NULL,
933         ATTR_GYRO_MATRIX);
934 static IIO_DEVICE_ATTR(in_accel_matrix, S_IRUGO, inv_attr_show, NULL,
935         ATTR_ACCL_MATRIX);
936
937 static struct attribute *inv_attributes[] = {
938         &iio_dev_attr_in_gyro_matrix.dev_attr.attr,  /* deprecated */
939         &iio_dev_attr_in_accel_matrix.dev_attr.attr, /* deprecated */
940         &iio_dev_attr_sampling_frequency.dev_attr.attr,
941         &iio_const_attr_sampling_frequency_available.dev_attr.attr,
942         &iio_const_attr_in_accel_scale_available.dev_attr.attr,
943         &iio_const_attr_in_anglvel_scale_available.dev_attr.attr,
944         NULL,
945 };
946
947 static const struct attribute_group inv_attribute_group = {
948         .attrs = inv_attributes
949 };
950
951 static const struct iio_info mpu_info = {
952         .read_raw = &inv_mpu6050_read_raw,
953         .write_raw = &inv_mpu6050_write_raw,
954         .write_raw_get_fmt = &inv_write_raw_get_fmt,
955         .attrs = &inv_attribute_group,
956         .validate_trigger = inv_mpu6050_validate_trigger,
957 };
958
959 /**
960  *  inv_check_and_setup_chip() - check and setup chip.
961  */
962 static int inv_check_and_setup_chip(struct inv_mpu6050_state *st)
963 {
964         int result;
965         unsigned int regval;
966         int i;
967
968         st->hw  = &hw_info[st->chip_type];
969         st->reg = hw_info[st->chip_type].reg;
970
971         /* check chip self-identification */
972         result = regmap_read(st->map, INV_MPU6050_REG_WHOAMI, &regval);
973         if (result)
974                 return result;
975         if (regval != st->hw->whoami) {
976                 /* check whoami against all possible values */
977                 for (i = 0; i < INV_NUM_PARTS; ++i) {
978                         if (regval == hw_info[i].whoami) {
979                                 dev_warn(regmap_get_device(st->map),
980                                         "whoami mismatch got %#02x (%s)"
981                                         "expected %#02hhx (%s)\n",
982                                         regval, hw_info[i].name,
983                                         st->hw->whoami, st->hw->name);
984                                 break;
985                         }
986                 }
987                 if (i >= INV_NUM_PARTS) {
988                         dev_err(regmap_get_device(st->map),
989                                 "invalid whoami %#02x expected %#02hhx (%s)\n",
990                                 regval, st->hw->whoami, st->hw->name);
991                         return -ENODEV;
992                 }
993         }
994
995         /* reset to make sure previous state are not there */
996         result = regmap_write(st->map, st->reg->pwr_mgmt_1,
997                               INV_MPU6050_BIT_H_RESET);
998         if (result)
999                 return result;
1000         msleep(INV_MPU6050_POWER_UP_TIME);
1001
1002         /*
1003          * Turn power on. After reset, the sleep bit could be on
1004          * or off depending on the OTP settings. Turning power on
1005          * make it in a definite state as well as making the hardware
1006          * state align with the software state
1007          */
1008         result = inv_mpu6050_set_power_itg(st, true);
1009         if (result)
1010                 return result;
1011
1012         result = inv_mpu6050_switch_engine(st, false,
1013                                            INV_MPU6050_BIT_PWR_ACCL_STBY);
1014         if (result)
1015                 goto error_power_off;
1016         result = inv_mpu6050_switch_engine(st, false,
1017                                            INV_MPU6050_BIT_PWR_GYRO_STBY);
1018         if (result)
1019                 goto error_power_off;
1020
1021         return inv_mpu6050_set_power_itg(st, false);
1022
1023 error_power_off:
1024         inv_mpu6050_set_power_itg(st, false);
1025         return result;
1026 }
1027
1028 static int inv_mpu_core_enable_regulator(struct inv_mpu6050_state *st)
1029 {
1030         int result;
1031
1032         result = regulator_enable(st->vddio_supply);
1033         if (result) {
1034                 dev_err(regmap_get_device(st->map),
1035                         "Failed to enable regulator: %d\n", result);
1036         } else {
1037                 /* Give the device a little bit of time to start up. */
1038                 usleep_range(35000, 70000);
1039         }
1040
1041         return result;
1042 }
1043
1044 static int inv_mpu_core_disable_regulator(struct inv_mpu6050_state *st)
1045 {
1046         int result;
1047
1048         result = regulator_disable(st->vddio_supply);
1049         if (result)
1050                 dev_err(regmap_get_device(st->map),
1051                         "Failed to disable regulator: %d\n", result);
1052
1053         return result;
1054 }
1055
1056 static void inv_mpu_core_disable_regulator_action(void *_data)
1057 {
1058         inv_mpu_core_disable_regulator(_data);
1059 }
1060
1061 int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name,
1062                 int (*inv_mpu_bus_setup)(struct iio_dev *), int chip_type)
1063 {
1064         struct inv_mpu6050_state *st;
1065         struct iio_dev *indio_dev;
1066         struct inv_mpu6050_platform_data *pdata;
1067         struct device *dev = regmap_get_device(regmap);
1068         int result;
1069         struct irq_data *desc;
1070         int irq_type;
1071
1072         indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
1073         if (!indio_dev)
1074                 return -ENOMEM;
1075
1076         BUILD_BUG_ON(ARRAY_SIZE(hw_info) != INV_NUM_PARTS);
1077         if (chip_type < 0 || chip_type >= INV_NUM_PARTS) {
1078                 dev_err(dev, "Bad invensense chip_type=%d name=%s\n",
1079                                 chip_type, name);
1080                 return -ENODEV;
1081         }
1082         st = iio_priv(indio_dev);
1083         mutex_init(&st->lock);
1084         st->chip_type = chip_type;
1085         st->powerup_count = 0;
1086         st->irq = irq;
1087         st->map = regmap;
1088
1089         pdata = dev_get_platdata(dev);
1090         if (!pdata) {
1091                 result = iio_read_mount_matrix(dev, "mount-matrix",
1092                                                &st->orientation);
1093                 if (result) {
1094                         dev_err(dev, "Failed to retrieve mounting matrix %d\n",
1095                                 result);
1096                         return result;
1097                 }
1098         } else {
1099                 st->plat_data = *pdata;
1100         }
1101
1102         desc = irq_get_irq_data(irq);
1103         if (!desc) {
1104                 dev_err(dev, "Could not find IRQ %d\n", irq);
1105                 return -EINVAL;
1106         }
1107
1108         irq_type = irqd_get_trigger_type(desc);
1109         if (!irq_type)
1110                 irq_type = IRQF_TRIGGER_RISING;
1111         if (irq_type == IRQF_TRIGGER_RISING)
1112                 st->irq_mask = INV_MPU6050_ACTIVE_HIGH;
1113         else if (irq_type == IRQF_TRIGGER_FALLING)
1114                 st->irq_mask = INV_MPU6050_ACTIVE_LOW;
1115         else if (irq_type == IRQF_TRIGGER_HIGH)
1116                 st->irq_mask = INV_MPU6050_ACTIVE_HIGH |
1117                         INV_MPU6050_LATCH_INT_EN;
1118         else if (irq_type == IRQF_TRIGGER_LOW)
1119                 st->irq_mask = INV_MPU6050_ACTIVE_LOW |
1120                         INV_MPU6050_LATCH_INT_EN;
1121         else {
1122                 dev_err(dev, "Invalid interrupt type 0x%x specified\n",
1123                         irq_type);
1124                 return -EINVAL;
1125         }
1126
1127         st->vddio_supply = devm_regulator_get(dev, "vddio");
1128         if (IS_ERR(st->vddio_supply)) {
1129                 if (PTR_ERR(st->vddio_supply) != -EPROBE_DEFER)
1130                         dev_err(dev, "Failed to get vddio regulator %d\n",
1131                                 (int)PTR_ERR(st->vddio_supply));
1132
1133                 return PTR_ERR(st->vddio_supply);
1134         }
1135
1136         result = inv_mpu_core_enable_regulator(st);
1137         if (result)
1138                 return result;
1139
1140         result = devm_add_action(dev, inv_mpu_core_disable_regulator_action,
1141                                  st);
1142         if (result) {
1143                 inv_mpu_core_disable_regulator_action(st);
1144                 dev_err(dev, "Failed to setup regulator cleanup action %d\n",
1145                         result);
1146                 return result;
1147         }
1148
1149         /* power is turned on inside check chip type*/
1150         result = inv_check_and_setup_chip(st);
1151         if (result)
1152                 return result;
1153
1154         result = inv_mpu6050_init_config(indio_dev);
1155         if (result) {
1156                 dev_err(dev, "Could not initialize device.\n");
1157                 return result;
1158         }
1159
1160         if (inv_mpu_bus_setup)
1161                 inv_mpu_bus_setup(indio_dev);
1162
1163         dev_set_drvdata(dev, indio_dev);
1164         indio_dev->dev.parent = dev;
1165         /* name will be NULL when enumerated via ACPI */
1166         if (name)
1167                 indio_dev->name = name;
1168         else
1169                 indio_dev->name = dev_name(dev);
1170
1171         if (chip_type == INV_ICM20602) {
1172                 indio_dev->channels = inv_icm20602_channels;
1173                 indio_dev->num_channels = ARRAY_SIZE(inv_icm20602_channels);
1174                 indio_dev->available_scan_masks = inv_icm20602_scan_masks;
1175         } else {
1176                 indio_dev->channels = inv_mpu_channels;
1177                 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels);
1178                 indio_dev->available_scan_masks = inv_mpu_scan_masks;
1179         }
1180
1181         indio_dev->info = &mpu_info;
1182         indio_dev->modes = INDIO_BUFFER_TRIGGERED;
1183
1184         result = devm_iio_triggered_buffer_setup(dev, indio_dev,
1185                                                  iio_pollfunc_store_time,
1186                                                  inv_mpu6050_read_fifo,
1187                                                  NULL);
1188         if (result) {
1189                 dev_err(dev, "configure buffer fail %d\n", result);
1190                 return result;
1191         }
1192         result = inv_mpu6050_probe_trigger(indio_dev, irq_type);
1193         if (result) {
1194                 dev_err(dev, "trigger probe fail %d\n", result);
1195                 return result;
1196         }
1197
1198         result = devm_iio_device_register(dev, indio_dev);
1199         if (result) {
1200                 dev_err(dev, "IIO register fail %d\n", result);
1201                 return result;
1202         }
1203
1204         return 0;
1205 }
1206 EXPORT_SYMBOL_GPL(inv_mpu_core_probe);
1207
1208 #ifdef CONFIG_PM_SLEEP
1209
1210 static int inv_mpu_resume(struct device *dev)
1211 {
1212         struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev));
1213         int result;
1214
1215         mutex_lock(&st->lock);
1216         result = inv_mpu_core_enable_regulator(st);
1217         if (result)
1218                 goto out_unlock;
1219
1220         result = inv_mpu6050_set_power_itg(st, true);
1221 out_unlock:
1222         mutex_unlock(&st->lock);
1223
1224         return result;
1225 }
1226
1227 static int inv_mpu_suspend(struct device *dev)
1228 {
1229         struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev));
1230         int result;
1231
1232         mutex_lock(&st->lock);
1233         result = inv_mpu6050_set_power_itg(st, false);
1234         inv_mpu_core_disable_regulator(st);
1235         mutex_unlock(&st->lock);
1236
1237         return result;
1238 }
1239 #endif /* CONFIG_PM_SLEEP */
1240
1241 SIMPLE_DEV_PM_OPS(inv_mpu_pmops, inv_mpu_suspend, inv_mpu_resume);
1242 EXPORT_SYMBOL_GPL(inv_mpu_pmops);
1243
1244 MODULE_AUTHOR("Invensense Corporation");
1245 MODULE_DESCRIPTION("Invensense device MPU6050 driver");
1246 MODULE_LICENSE("GPL");