drivers/ieee1394/video1394.c

   1 /*
   2  * video1394.c - video driver for OHCI 1394 boards
   3  * Copyright (C)1999,2000 Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au>
   4  *                        Peter Schlaile <udbz@rz.uni-karlsruhe.de>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software Foundation,
  18  * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  19  *
  20  * NOTES:
  21  *
  22  * jds -- add private data to file to keep track of iso contexts associated
  23  * with each open -- so release won't kill all iso transfers.
  24  *
  25  * Damien Douxchamps: Fix failure when the number of DMA pages per frame is
  26  * one.
  27  *
  28  * ioctl return codes:
  29  * EFAULT is only for invalid address for the argp
  30  * EINVAL for out of range values
  31  * EBUSY when trying to use an already used resource
  32  * ESRCH when trying to free/stop a not used resource
  33  * EAGAIN for resource allocation failure that could perhaps succeed later
  34  * ENOTTY for unsupported ioctl request
  35  *
  36  */
  37
  38 /* Markus Tavenrath <speedygoo@speedygoo.de> :
  39    - fixed checks for valid buffer-numbers in video1394_icotl
  40    - changed the ways the dma prg's are used, now it's possible to use
  41      even a single dma buffer
  42 */
  43 #include <linux/config.h>
  44 #include <linux/kernel.h>
  45 #include <linux/list.h>
  46 #include <linux/slab.h>
  47 #include <linux/interrupt.h>
  48 #include <linux/wait.h>
  49 #include <linux/errno.h>
  50 #include <linux/module.h>
  51 #include <linux/init.h>
  52 #include <linux/pci.h>
  53 #include <linux/fs.h>
  54 #include <linux/poll.h>
  55 #include <linux/smp_lock.h>
  56 #include <linux/delay.h>
  57 #include <linux/devfs_fs_kernel.h>
  58 #include <linux/bitops.h>
  59 #include <linux/types.h>
  60 #include <linux/vmalloc.h>
  61 #include <linux/timex.h>
  62 #include <linux/mm.h>
  63 #include <linux/ioctl32.h>
  64 #include <linux/compat.h>
  65 #include <linux/cdev.h>
  66
  67 #include "ieee1394.h"
  68 #include "ieee1394_types.h"
  69 #include "hosts.h"
  70 #include "ieee1394_core.h"
  71 #include "highlevel.h"
  72 #include "video1394.h"
  73 #include "nodemgr.h"
  74 #include "dma.h"
  75
  76 #include "ohci1394.h"
  77
  78 #define ISO_CHANNELS 64
  79
  80 #ifndef virt_to_page
  81 #define virt_to_page(x) MAP_NR(x)
  82 #endif
  83
  84 #ifndef vmalloc_32
  85 #define vmalloc_32(x) vmalloc(x)
  86 #endif
  87
  88 struct it_dma_prg {
  89         struct dma_cmd begin;
  90         quadlet_t data[4];
  91         struct dma_cmd end;
  92         quadlet_t pad[4]; /* FIXME: quick hack for memory alignment */
  93 };
  94
  95 struct dma_iso_ctx {
  96         struct ti_ohci *ohci;
  97         int type; /* OHCI_ISO_TRANSMIT or OHCI_ISO_RECEIVE */
  98         struct ohci1394_iso_tasklet iso_tasklet;
  99         int channel;
 100         int ctx;
 101         int last_buffer;
 102         int * next_buffer;  /* For ISO Transmit of video packets
 103                                to write the correct SYT field
 104                                into the next block */
 105         unsigned int num_desc;
 106         unsigned int buf_size;
 107         unsigned int frame_size;
 108         unsigned int packet_size;
 109         unsigned int left_size;
 110         unsigned int nb_cmd;
 111
 112         struct dma_region dma;
 113
 114         struct dma_prog_region *prg_reg;
 115
 116         struct dma_cmd **ir_prg;
 117         struct it_dma_prg **it_prg;
 118
 119         unsigned int *buffer_status;
 120         unsigned int *buffer_prg_assignment;
 121         struct timeval *buffer_time; /* time when the buffer was received */
 122         unsigned int *last_used_cmd; /* For ISO Transmit with
 123                                         variable sized packets only ! */
 124         int ctrlClear;
 125         int ctrlSet;
 126         int cmdPtr;
 127         int ctxMatch;
 128         wait_queue_head_t waitq;
 129         spinlock_t lock;
 130         unsigned int syt_offset;
 131         int flags;
 132
 133         struct list_head link;
 134 };
 135
 136
 137 struct file_ctx {
 138         struct ti_ohci *ohci;
 139         struct list_head context_list;
 140         struct dma_iso_ctx *current_ctx;
 141 };
 142
 143 #ifdef CONFIG_IEEE1394_VERBOSEDEBUG
 144 #define VIDEO1394_DEBUG
 145 #endif
 146
 147 #ifdef DBGMSG
 148 #undef DBGMSG
 149 #endif
 150
 151 #ifdef VIDEO1394_DEBUG
 152 #define DBGMSG(card, fmt, args...) \
 153 printk(KERN_INFO "video1394_%d: " fmt "\n" , card , ## args)
 154 #else
 155 #define DBGMSG(card, fmt, args...)
 156 #endif
 157
 158 /* print general (card independent) information */
 159 #define PRINT_G(level, fmt, args...) \
 160 printk(level "video1394: " fmt "\n" , ## args)
 161
 162 /* print card specific information */
 163 #define PRINT(level, card, fmt, args...) \
 164 printk(level "video1394_%d: " fmt "\n" , card , ## args)
 165
 166 static void wakeup_dma_ir_ctx(unsigned long l);
 167 static void wakeup_dma_it_ctx(unsigned long l);
 168
 169 static struct hpsb_highlevel video1394_highlevel;
 170
 171 static int free_dma_iso_ctx(struct dma_iso_ctx *d)
 172 {
 173         int i;
 174
 175         DBGMSG(d->ohci->host->id, "Freeing dma_iso_ctx %d", d->ctx);
 176
 177         ohci1394_stop_context(d->ohci, d->ctrlClear, NULL);
 178         if (d->iso_tasklet.link.next != NULL)
 179                 ohci1394_unregister_iso_tasklet(d->ohci, &d->iso_tasklet);
 180
 181         dma_region_free(&d->dma);
 182
 183         if (d->prg_reg) {
 184                 for (i = 0; i < d->num_desc; i++)
 185                         dma_prog_region_free(&d->prg_reg[i]);
 186                 kfree(d->prg_reg);
 187         }
 188
 189         kfree(d->ir_prg);
 190         kfree(d->it_prg);
 191         kfree(d->buffer_status);
 192         kfree(d->buffer_prg_assignment);
 193         kfree(d->buffer_time);
 194         kfree(d->last_used_cmd);
 195         kfree(d->next_buffer);
 196         list_del(&d->link);
 197         kfree(d);
 198
 199         return 0;
 200 }
 201
 202 static struct dma_iso_ctx *
 203 alloc_dma_iso_ctx(struct ti_ohci *ohci, int type, int num_desc,
 204                   int buf_size, int channel, unsigned int packet_size)
 205 {
 206         struct dma_iso_ctx *d;
 207         int i;
 208
 209         d = kmalloc(sizeof(struct dma_iso_ctx), GFP_KERNEL);
 210         if (d == NULL) {
 211                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma_iso_ctx");
 212                 return NULL;
 213         }
 214
 215         memset(d, 0, sizeof *d);
 216
 217         d->ohci = ohci;
 218         d->type = type;
 219         d->channel = channel;
 220         d->num_desc = num_desc;
 221         d->frame_size = buf_size;
 222         d->buf_size = PAGE_ALIGN(buf_size);
 223         d->last_buffer = -1;
 224         INIT_LIST_HEAD(&d->link);
 225         init_waitqueue_head(&d->waitq);
 226
 227         /* Init the regions for easy cleanup */
 228         dma_region_init(&d->dma);
 229
 230         if (dma_region_alloc(&d->dma, (d->num_desc - 1) * d->buf_size, ohci->dev,
 231                              PCI_DMA_BIDIRECTIONAL)) {
 232                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma buffer");
 233                 free_dma_iso_ctx(d);
 234                 return NULL;
 235         }
 236
 237         if (type == OHCI_ISO_RECEIVE)
 238                 ohci1394_init_iso_tasklet(&d->iso_tasklet, type,
 239                                           wakeup_dma_ir_ctx,
 240                                           (unsigned long) d);
 241         else
 242                 ohci1394_init_iso_tasklet(&d->iso_tasklet, type,
 243                                           wakeup_dma_it_ctx,
 244                                           (unsigned long) d);
 245
 246         if (ohci1394_register_iso_tasklet(ohci, &d->iso_tasklet) < 0) {
 247                 PRINT(KERN_ERR, ohci->host->id, "no free iso %s contexts",
 248                       type == OHCI_ISO_RECEIVE ? "receive" : "transmit");
 249                 free_dma_iso_ctx(d);
 250                 return NULL;
 251         }
 252         d->ctx = d->iso_tasklet.context;
 253
 254         d->prg_reg = kmalloc(d->num_desc * sizeof(struct dma_prog_region),
 255                         GFP_KERNEL);
 256         if (d->prg_reg == NULL) {
 257                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate ir prg regs");
 258                 free_dma_iso_ctx(d);
 259                 return NULL;
 260         }
 261         /* Makes for easier cleanup */
 262         for (i = 0; i < d->num_desc; i++)
 263                 dma_prog_region_init(&d->prg_reg[i]);
 264
 265         if (type == OHCI_ISO_RECEIVE) {
 266                 d->ctrlSet = OHCI1394_IsoRcvContextControlSet+32*d->ctx;
 267                 d->ctrlClear = OHCI1394_IsoRcvContextControlClear+32*d->ctx;
 268                 d->cmdPtr = OHCI1394_IsoRcvCommandPtr+32*d->ctx;
 269                 d->ctxMatch = OHCI1394_IsoRcvContextMatch+32*d->ctx;
 270
 271                 d->ir_prg = kmalloc(d->num_desc * sizeof(struct dma_cmd *),
 272                                     GFP_KERNEL);
 273
 274                 if (d->ir_prg == NULL) {
 275                         PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma ir prg");
 276                         free_dma_iso_ctx(d);
 277                         return NULL;
 278                 }
 279                 memset(d->ir_prg, 0, d->num_desc * sizeof(struct dma_cmd *));
 280
 281                 d->nb_cmd = d->buf_size / PAGE_SIZE + 1;
 282                 d->left_size = (d->frame_size % PAGE_SIZE) ?
 283                         d->frame_size % PAGE_SIZE : PAGE_SIZE;
 284
 285                 for (i = 0;i < d->num_desc; i++) {
 286                         if (dma_prog_region_alloc(&d->prg_reg[i], d->nb_cmd *
 287                                                   sizeof(struct dma_cmd), ohci->dev)) {
 288                                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma ir prg");
 289                                 free_dma_iso_ctx(d);
 290                                 return NULL;
 291                         }
 292                         d->ir_prg[i] = (struct dma_cmd *)d->prg_reg[i].kvirt;
 293                 }
 294
 295         } else {  /* OHCI_ISO_TRANSMIT */
 296                 d->ctrlSet = OHCI1394_IsoXmitContextControlSet+16*d->ctx;
 297                 d->ctrlClear = OHCI1394_IsoXmitContextControlClear+16*d->ctx;
 298                 d->cmdPtr = OHCI1394_IsoXmitCommandPtr+16*d->ctx;
 299
 300                 d->it_prg = kmalloc(d->num_desc * sizeof(struct it_dma_prg *),
 301                                     GFP_KERNEL);
 302
 303                 if (d->it_prg == NULL) {
 304                         PRINT(KERN_ERR, ohci->host->id,
 305                               "Failed to allocate dma it prg");
 306                         free_dma_iso_ctx(d);
 307                         return NULL;
 308                 }
 309                 memset(d->it_prg, 0, d->num_desc*sizeof(struct it_dma_prg *));
 310
 311                 d->packet_size = packet_size;
 312
 313                 if (PAGE_SIZE % packet_size || packet_size>4096) {
 314                         PRINT(KERN_ERR, ohci->host->id,
 315                               "Packet size %d (page_size: %ld) "
 316                               "not yet supported\n",
 317                               packet_size, PAGE_SIZE);
 318                         free_dma_iso_ctx(d);
 319                         return NULL;
 320                 }
 321
 322                 d->nb_cmd = d->frame_size / d->packet_size;
 323                 if (d->frame_size % d->packet_size) {
 324                         d->nb_cmd++;
 325                         d->left_size = d->frame_size % d->packet_size;
 326                 } else
 327                         d->left_size = d->packet_size;
 328
 329                 for (i = 0; i < d->num_desc; i++) {
 330                         if (dma_prog_region_alloc(&d->prg_reg[i], d->nb_cmd *
 331                                                 sizeof(struct it_dma_prg), ohci->dev)) {
 332                                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma it prg");
 333                                 free_dma_iso_ctx(d);
 334                                 return NULL;
 335                         }
 336                         d->it_prg[i] = (struct it_dma_prg *)d->prg_reg[i].kvirt;
 337                 }
 338         }
 339
 340         d->buffer_status = kmalloc(d->num_desc * sizeof(unsigned int),
 341                                    GFP_KERNEL);
 342         d->buffer_prg_assignment = kmalloc(d->num_desc * sizeof(unsigned int),
 343                                    GFP_KERNEL);
 344         d->buffer_time = kmalloc(d->num_desc * sizeof(struct timeval),
 345                                    GFP_KERNEL);
 346         d->last_used_cmd = kmalloc(d->num_desc * sizeof(unsigned int),
 347                                    GFP_KERNEL);
 348         d->next_buffer = kmalloc(d->num_desc * sizeof(int),
 349                                  GFP_KERNEL);
 350
 351         if (d->buffer_status == NULL) {
 352                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate buffer_status");
 353                 free_dma_iso_ctx(d);
 354                 return NULL;
 355         }
 356         if (d->buffer_prg_assignment == NULL) {
 357                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate buffer_prg_assignment");
 358                 free_dma_iso_ctx(d);
 359                 return NULL;
 360         }
 361         if (d->buffer_time == NULL) {
 362                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate buffer_time");
 363                 free_dma_iso_ctx(d);
 364                 return NULL;
 365         }
 366         if (d->last_used_cmd == NULL) {
 367                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate last_used_cmd");
 368                 free_dma_iso_ctx(d);
 369                 return NULL;
 370         }
 371         if (d->next_buffer == NULL) {
 372                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate next_buffer");
 373                 free_dma_iso_ctx(d);
 374                 return NULL;
 375         }
 376         memset(d->buffer_status, 0, d->num_desc * sizeof(unsigned int));
 377         memset(d->buffer_prg_assignment, 0, d->num_desc * sizeof(unsigned int));
 378         memset(d->buffer_time, 0, d->num_desc * sizeof(struct timeval));
 379         memset(d->last_used_cmd, 0, d->num_desc * sizeof(unsigned int));
 380         memset(d->next_buffer, -1, d->num_desc * sizeof(int));
 381
 382         spin_lock_init(&d->lock);
 383
 384         PRINT(KERN_INFO, ohci->host->id, "Iso %s DMA: %d buffers "
 385               "of size %d allocated for a frame size %d, each with %d prgs",
 386               (type == OHCI_ISO_RECEIVE) ? "receive" : "transmit",
 387               d->num_desc - 1, d->buf_size, d->frame_size, d->nb_cmd);
 388
 389         return d;
 390 }
 391
 392 static void reset_ir_status(struct dma_iso_ctx *d, int n)
 393 {
 394         int i;
 395         d->ir_prg[n][0].status = cpu_to_le32(4);
 396         d->ir_prg[n][1].status = cpu_to_le32(PAGE_SIZE-4);
 397         for (i = 2; i < d->nb_cmd - 1; i++)
 398                 d->ir_prg[n][i].status = cpu_to_le32(PAGE_SIZE);
 399         d->ir_prg[n][i].status = cpu_to_le32(d->left_size);
 400 }
 401
 402 static void reprogram_dma_ir_prg(struct dma_iso_ctx *d, int n, int buffer, int flags)
 403 {
 404         struct dma_cmd *ir_prg = d->ir_prg[n];
 405         unsigned long buf = (unsigned long)d->dma.kvirt + buffer * d->buf_size;
 406         int i;
 407
 408         d->buffer_prg_assignment[n] = buffer;
 409
 410         ir_prg[0].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, buf -
 411                                 (unsigned long)d->dma.kvirt));
 412         ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 413                                 (buf + 4) - (unsigned long)d->dma.kvirt));
 414
 415         for (i=2;i<d->nb_cmd-1;i++) {
 416                 ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 417                                                 (buf+(i-1)*PAGE_SIZE) -
 418                                                 (unsigned long)d->dma.kvirt));
 419         }
 420
 421         ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
 422                                   DMA_CTL_IRQ | DMA_CTL_BRANCH | d->left_size);
 423         ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 424                                   (buf+(i-1)*PAGE_SIZE) - (unsigned long)d->dma.kvirt));
 425 }
 426
 427 static void initialize_dma_ir_prg(struct dma_iso_ctx *d, int n, int flags)
 428 {
 429         struct dma_cmd *ir_prg = d->ir_prg[n];
 430         struct dma_prog_region *ir_reg = &d->prg_reg[n];
 431         unsigned long buf = (unsigned long)d->dma.kvirt;
 432         int i;
 433
 434         /* the first descriptor will read only 4 bytes */
 435         ir_prg[0].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
 436                 DMA_CTL_BRANCH | 4);
 437
 438         /* set the sync flag */
 439         if (flags & VIDEO1394_SYNC_FRAMES)
 440                 ir_prg[0].control |= cpu_to_le32(DMA_CTL_WAIT);
 441
 442         ir_prg[0].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, buf -
 443                                 (unsigned long)d->dma.kvirt));
 444         ir_prg[0].branchAddress = cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
 445                                         1 * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
 446
 447         /* If there is *not* only one DMA page per frame (hence, d->nb_cmd==2) */
 448         if (d->nb_cmd > 2) {
 449                 /* The second descriptor will read PAGE_SIZE-4 bytes */
 450                 ir_prg[1].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
 451                                                 DMA_CTL_BRANCH | (PAGE_SIZE-4));
 452                 ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, (buf + 4) -
 453                                                 (unsigned long)d->dma.kvirt));
 454                 ir_prg[1].branchAddress = cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
 455                                                       2 * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
 456
 457                 for (i = 2; i < d->nb_cmd - 1; i++) {
 458                         ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
 459                                                         DMA_CTL_BRANCH | PAGE_SIZE);
 460                         ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 461                                                         (buf+(i-1)*PAGE_SIZE) -
 462                                                         (unsigned long)d->dma.kvirt));
 463
 464                         ir_prg[i].branchAddress =
 465                                 cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
 466                                             (i + 1) * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
 467                 }
 468
 469                 /* The last descriptor will generate an interrupt */
 470                 ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
 471                                                 DMA_CTL_IRQ | DMA_CTL_BRANCH | d->left_size);
 472                 ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 473                                                 (buf+(i-1)*PAGE_SIZE) -
 474                                                 (unsigned long)d->dma.kvirt));
 475         } else {
 476                 /* Only one DMA page is used. Read d->left_size immediately and */
 477                 /* generate an interrupt as this is also the last page. */
 478                 ir_prg[1].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
 479                                                 DMA_CTL_IRQ | DMA_CTL_BRANCH | (d->left_size-4));
 480                 ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 481                                                 (buf + 4) - (unsigned long)d->dma.kvirt));
 482         }
 483 }
 484
 485 static void initialize_dma_ir_ctx(struct dma_iso_ctx *d, int tag, int flags)
 486 {
 487         struct ti_ohci *ohci = (struct ti_ohci *)d->ohci;
 488         int i;
 489
 490         d->flags = flags;
 491
 492         ohci1394_stop_context(ohci, d->ctrlClear, NULL);
 493
 494         for (i=0;i<d->num_desc;i++) {
 495                 initialize_dma_ir_prg(d, i, flags);
 496                 reset_ir_status(d, i);
 497         }
 498
 499         /* reset the ctrl register */
 500         reg_write(ohci, d->ctrlClear, 0xf0000000);
 501
 502         /* Set bufferFill */
 503         reg_write(ohci, d->ctrlSet, 0x80000000);
 504
 505         /* Set isoch header */
 506         if (flags & VIDEO1394_INCLUDE_ISO_HEADERS)
 507                 reg_write(ohci, d->ctrlSet, 0x40000000);
 508
 509         /* Set the context match register to match on all tags,
 510            sync for sync tag, and listen to d->channel */
 511         reg_write(ohci, d->ctxMatch, 0xf0000000|((tag&0xf)<<8)|d->channel);
 512
 513         /* Set up isoRecvIntMask to generate interrupts */
 514         reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, 1<<d->ctx);
 515 }
 516
 517 /* find which context is listening to this channel */
 518 static struct dma_iso_ctx *
 519 find_ctx(struct list_head *list, int type, int channel)
 520 {
 521         struct dma_iso_ctx *ctx;
 522
 523         list_for_each_entry(ctx, list, link) {
 524                 if (ctx->type == type && ctx->channel == channel)
 525                         return ctx;
 526         }
 527
 528         return NULL;
 529 }
 530
 531 static void wakeup_dma_ir_ctx(unsigned long l)
 532 {
 533         struct dma_iso_ctx *d = (struct dma_iso_ctx *) l;
 534         int i;
 535
 536         spin_lock(&d->lock);
 537
 538         for (i = 0; i < d->num_desc; i++) {
 539                 if (d->ir_prg[i][d->nb_cmd-1].status & cpu_to_le32(0xFFFF0000)) {
 540                         reset_ir_status(d, i);
 541                         d->buffer_status[d->buffer_prg_assignment[i]] = VIDEO1394_BUFFER_READY;
 542                         do_gettimeofday(&d->buffer_time[i]);
 543                 }
 544         }
 545
 546         spin_unlock(&d->lock);
 547
 548         if (waitqueue_active(&d->waitq))
 549                 wake_up_interruptible(&d->waitq);
 550 }
 551
 552 static inline void put_timestamp(struct ti_ohci *ohci, struct dma_iso_ctx * d,
 553                                  int n)
 554 {
 555         unsigned char* buf = d->dma.kvirt + n * d->buf_size;
 556         u32 cycleTimer;
 557         u32 timeStamp;
 558
 559         if (n == -1) {
 560           return;
 561         }
 562
 563         cycleTimer = reg_read(ohci, OHCI1394_IsochronousCycleTimer);
 564
 565         timeStamp = ((cycleTimer & 0x0fff) + d->syt_offset); /* 11059 = 450 us */
 566         timeStamp = (timeStamp % 3072 + ((timeStamp / 3072) << 12)
 567                 + (cycleTimer & 0xf000)) & 0xffff;
 568
 569         buf[6] = timeStamp >> 8;
 570         buf[7] = timeStamp & 0xff;
 571
 572     /* if first packet is empty packet, then put timestamp into the next full one too */
 573     if ( (le32_to_cpu(d->it_prg[n][0].data[1]) >>16) == 0x008) {
 574             buf += d->packet_size;
 575         buf[6] = timeStamp >> 8;
 576             buf[7] = timeStamp & 0xff;
 577         }
 578
 579     /* do the next buffer frame too in case of irq latency */
 580         n = d->next_buffer[n];
 581         if (n == -1) {
 582           return;
 583         }
 584         buf = d->dma.kvirt + n * d->buf_size;
 585
 586         timeStamp += (d->last_used_cmd[n] << 12) & 0xffff;
 587
 588         buf[6] = timeStamp >> 8;
 589         buf[7] = timeStamp & 0xff;
 590
 591     /* if first packet is empty packet, then put timestamp into the next full one too */
 592     if ( (le32_to_cpu(d->it_prg[n][0].data[1]) >>16) == 0x008) {
 593             buf += d->packet_size;
 594         buf[6] = timeStamp >> 8;
 595             buf[7] = timeStamp & 0xff;
 596         }
 597
 598 #if 0
 599         printk("curr: %d, next: %d, cycleTimer: %08x timeStamp: %08x\n",
 600                curr, n, cycleTimer, timeStamp);
 601 #endif
 602 }
 603
 604 static void wakeup_dma_it_ctx(unsigned long l)
 605 {
 606         struct dma_iso_ctx *d = (struct dma_iso_ctx *) l;
 607         struct ti_ohci *ohci = d->ohci;
 608         int i;
 609
 610         spin_lock(&d->lock);
 611
 612         for (i = 0; i < d->num_desc; i++) {
 613                 if (d->it_prg[i][d->last_used_cmd[i]].end.status &
 614                     cpu_to_le32(0xFFFF0000)) {
 615                         int next = d->next_buffer[i];
 616                         put_timestamp(ohci, d, next);
 617                         d->it_prg[i][d->last_used_cmd[i]].end.status = 0;
 618                         d->buffer_status[d->buffer_prg_assignment[i]] = VIDEO1394_BUFFER_READY;
 619                 }
 620         }
 621
 622         spin_unlock(&d->lock);
 623
 624         if (waitqueue_active(&d->waitq))
 625                 wake_up_interruptible(&d->waitq);
 626 }
 627
 628 static void reprogram_dma_it_prg(struct dma_iso_ctx  *d, int n, int buffer)
 629 {
 630         struct it_dma_prg *it_prg = d->it_prg[n];
 631         unsigned long buf = (unsigned long)d->dma.kvirt + buffer * d->buf_size;
 632         int i;
 633
 634         d->buffer_prg_assignment[n] = buffer;
 635         for (i=0;i<d->nb_cmd;i++) {
 636           it_prg[i].end.address =
 637                 cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 638                         (buf+i*d->packet_size) - (unsigned long)d->dma.kvirt));
 639         }
 640 }
 641
 642 static void initialize_dma_it_prg(struct dma_iso_ctx *d, int n, int sync_tag)
 643 {
 644         struct it_dma_prg *it_prg = d->it_prg[n];
 645         struct dma_prog_region *it_reg = &d->prg_reg[n];
 646         unsigned long buf = (unsigned long)d->dma.kvirt;
 647         int i;
 648         d->last_used_cmd[n] = d->nb_cmd - 1;
 649         for (i=0;i<d->nb_cmd;i++) {
 650
 651                 it_prg[i].begin.control = cpu_to_le32(DMA_CTL_OUTPUT_MORE |
 652                         DMA_CTL_IMMEDIATE | 8) ;
 653                 it_prg[i].begin.address = 0;
 654
 655                 it_prg[i].begin.status = 0;
 656
 657                 it_prg[i].data[0] = cpu_to_le32(
 658                         (IEEE1394_SPEED_100 << 16)
 659                         | (/* tag */ 1 << 14)
 660                         | (d->channel << 8)
 661                         | (TCODE_ISO_DATA << 4));
 662                 if (i==0) it_prg[i].data[0] |= cpu_to_le32(sync_tag);
 663                 it_prg[i].data[1] = cpu_to_le32(d->packet_size << 16);
 664                 it_prg[i].data[2] = 0;
 665                 it_prg[i].data[3] = 0;
 666
 667                 it_prg[i].end.control = cpu_to_le32(DMA_CTL_OUTPUT_LAST |
 668                                              DMA_CTL_BRANCH);
 669                 it_prg[i].end.address =
 670                         cpu_to_le32(dma_region_offset_to_bus(&d->dma, (buf+i*d->packet_size) -
 671                                                 (unsigned long)d->dma.kvirt));
 672
 673                 if (i<d->nb_cmd-1) {
 674                         it_prg[i].end.control |= cpu_to_le32(d->packet_size);
 675                         it_prg[i].begin.branchAddress =
 676                                 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
 677                                         sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
 678                         it_prg[i].end.branchAddress =
 679                                 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
 680                                         sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
 681                 } else {
 682                         /* the last prg generates an interrupt */
 683                         it_prg[i].end.control |= cpu_to_le32(DMA_CTL_UPDATE |
 684                                 DMA_CTL_IRQ | d->left_size);
 685                         /* the last prg doesn't branch */
 686                         it_prg[i].begin.branchAddress = 0;
 687                         it_prg[i].end.branchAddress = 0;
 688                 }
 689                 it_prg[i].end.status = 0;
 690         }
 691 }
 692
 693 static void initialize_dma_it_prg_var_packet_queue(
 694         struct dma_iso_ctx *d, int n, unsigned int * packet_sizes,
 695         struct ti_ohci *ohci)
 696 {
 697         struct it_dma_prg *it_prg = d->it_prg[n];
 698         struct dma_prog_region *it_reg = &d->prg_reg[n];
 699         int i;
 700
 701 #if 0
 702         if (n != -1) {
 703                 put_timestamp(ohci, d, n);
 704         }
 705 #endif
 706         d->last_used_cmd[n] = d->nb_cmd - 1;
 707
 708         for (i = 0; i < d->nb_cmd; i++) {
 709                 unsigned int size;
 710                 if (packet_sizes[i] > d->packet_size) {
 711                         size = d->packet_size;
 712                 } else {
 713                         size = packet_sizes[i];
 714                 }
 715                 it_prg[i].data[1] = cpu_to_le32(size << 16);
 716                 it_prg[i].end.control = cpu_to_le32(DMA_CTL_OUTPUT_LAST | DMA_CTL_BRANCH);
 717
 718                 if (i < d->nb_cmd-1 && packet_sizes[i+1] != 0) {
 719                         it_prg[i].end.control |= cpu_to_le32(size);
 720                         it_prg[i].begin.branchAddress =
 721                                 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
 722                                         sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
 723                         it_prg[i].end.branchAddress =
 724                                 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
 725                                         sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
 726                 } else {
 727                         /* the last prg generates an interrupt */
 728                         it_prg[i].end.control |= cpu_to_le32(DMA_CTL_UPDATE |
 729                                 DMA_CTL_IRQ | size);
 730                         /* the last prg doesn't branch */
 731                         it_prg[i].begin.branchAddress = 0;
 732                         it_prg[i].end.branchAddress = 0;
 733                         d->last_used_cmd[n] = i;
 734                         break;
 735                 }
 736         }
 737 }
 738
 739 static void initialize_dma_it_ctx(struct dma_iso_ctx *d, int sync_tag,
 740                                   unsigned int syt_offset, int flags)
 741 {
 742         struct ti_ohci *ohci = (struct ti_ohci *)d->ohci;
 743         int i;
 744
 745         d->flags = flags;
 746         d->syt_offset = (syt_offset == 0 ? 11000 : syt_offset);
 747
 748         ohci1394_stop_context(ohci, d->ctrlClear, NULL);
 749
 750         for (i=0;i<d->num_desc;i++)
 751                 initialize_dma_it_prg(d, i, sync_tag);
 752
 753         /* Set up isoRecvIntMask to generate interrupts */
 754         reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, 1<<d->ctx);
 755 }
 756
 757 static inline unsigned video1394_buffer_state(struct dma_iso_ctx *d,
 758                                               unsigned int buffer)
 759 {
 760         unsigned long flags;
 761         unsigned int ret;
 762         spin_lock_irqsave(&d->lock, flags);
 763         ret = d->buffer_status[buffer];
 764         spin_unlock_irqrestore(&d->lock, flags);
 765         return ret;
 766 }
 767
 768 static int __video1394_ioctl(struct file *file,
 769                              unsigned int cmd, unsigned long arg)
 770 {
 771         struct file_ctx *ctx = (struct file_ctx *)file->private_data;
 772         struct ti_ohci *ohci = ctx->ohci;
 773         unsigned long flags;
 774         void __user *argp = (void __user *)arg;
 775
 776         switch(cmd)
 777         {
 778         case VIDEO1394_IOC_LISTEN_CHANNEL:
 779         case VIDEO1394_IOC_TALK_CHANNEL:
 780         {
 781                 struct video1394_mmap v;
 782                 u64 mask;
 783                 struct dma_iso_ctx *d;
 784                 int i;
 785
 786                 if (copy_from_user(&v, argp, sizeof(v)))
 787                         return -EFAULT;
 788
 789                 /* if channel < 0, find lowest available one */
 790                 if (v.channel < 0) {
 791                     mask = (u64)0x1;
 792                     for (i=0; ; i++) {
 793                         if (i == ISO_CHANNELS) {
 794                             PRINT(KERN_ERR, ohci->host->id,
 795                                   "No free channel found");
 796                             return EAGAIN;
 797                         }
 798                         if (!(ohci->ISO_channel_usage & mask)) {
 799                             v.channel = i;
 800                             PRINT(KERN_INFO, ohci->host->id, "Found free channel %d", i);
 801                             break;
 802                         }
 803                         mask = mask << 1;
 804                     }
 805                 } else if (v.channel >= ISO_CHANNELS) {
 806                         PRINT(KERN_ERR, ohci->host->id,
 807                               "Iso channel %d out of bounds", v.channel);
 808                         return -EINVAL;
 809                 } else {
 810                         mask = (u64)0x1<<v.channel;
 811                 }
 812                 PRINT(KERN_INFO, ohci->host->id, "mask: %08X%08X usage: %08X%08X\n",
 813                         (u32)(mask>>32),(u32)(mask&0xffffffff),
 814                         (u32)(ohci->ISO_channel_usage>>32),
 815                         (u32)(ohci->ISO_channel_usage&0xffffffff));
 816                 if (ohci->ISO_channel_usage & mask) {
 817                         PRINT(KERN_ERR, ohci->host->id,
 818                               "Channel %d is already taken", v.channel);
 819                         return -EBUSY;
 820                 }
 821
 822                 if (v.buf_size == 0 || v.buf_size > VIDEO1394_MAX_SIZE) {
 823                         PRINT(KERN_ERR, ohci->host->id,
 824                               "Invalid %d length buffer requested",v.buf_size);
 825                         return -EINVAL;
 826                 }
 827
 828                 if (v.nb_buffers == 0 || v.nb_buffers > VIDEO1394_MAX_SIZE) {
 829                         PRINT(KERN_ERR, ohci->host->id,
 830                               "Invalid %d buffers requested",v.nb_buffers);
 831                         return -EINVAL;
 832                 }
 833
 834                 if (v.nb_buffers * v.buf_size > VIDEO1394_MAX_SIZE) {
 835                         PRINT(KERN_ERR, ohci->host->id,
 836                               "%d buffers of size %d bytes is too big",
 837                               v.nb_buffers, v.buf_size);
 838                         return -EINVAL;
 839                 }
 840
 841                 if (cmd == VIDEO1394_IOC_LISTEN_CHANNEL) {
 842                         d = alloc_dma_iso_ctx(ohci, OHCI_ISO_RECEIVE,
 843                                               v.nb_buffers + 1, v.buf_size,
 844                                               v.channel, 0);
 845
 846                         if (d == NULL) {
 847                                 PRINT(KERN_ERR, ohci->host->id,
 848                                       "Couldn't allocate ir context");
 849                                 return -EAGAIN;
 850                         }
 851                         initialize_dma_ir_ctx(d, v.sync_tag, v.flags);
 852
 853                         ctx->current_ctx = d;
 854
 855                         v.buf_size = d->buf_size;
 856                         list_add_tail(&d->link, &ctx->context_list);
 857
 858                         PRINT(KERN_INFO, ohci->host->id,
 859                               "iso context %d listen on channel %d",
 860                               d->ctx, v.channel);
 861                 }
 862                 else {
 863                         d = alloc_dma_iso_ctx(ohci, OHCI_ISO_TRANSMIT,
 864                                               v.nb_buffers + 1, v.buf_size,
 865                                               v.channel, v.packet_size);
 866
 867                         if (d == NULL) {
 868                                 PRINT(KERN_ERR, ohci->host->id,
 869                                       "Couldn't allocate it context");
 870                                 return -EAGAIN;
 871                         }
 872                         initialize_dma_it_ctx(d, v.sync_tag,
 873                                               v.syt_offset, v.flags);
 874
 875                         ctx->current_ctx = d;
 876
 877                         v.buf_size = d->buf_size;
 878
 879                         list_add_tail(&d->link, &ctx->context_list);
 880
 881                         PRINT(KERN_INFO, ohci->host->id,
 882                               "Iso context %d talk on channel %d", d->ctx,
 883                               v.channel);
 884                 }
 885
 886                 if (copy_to_user(argp, &v, sizeof(v))) {
 887                         /* FIXME : free allocated dma resources */
 888                         return -EFAULT;
 889                 }
 890
 891                 ohci->ISO_channel_usage |= mask;
 892
 893                 return 0;
 894         }
 895         case VIDEO1394_IOC_UNLISTEN_CHANNEL:
 896         case VIDEO1394_IOC_UNTALK_CHANNEL:
 897         {
 898                 int channel;
 899                 u64 mask;
 900                 struct dma_iso_ctx *d;
 901
 902                 if (copy_from_user(&channel, argp, sizeof(int)))
 903                         return -EFAULT;
 904
 905                 if (channel < 0 || channel >= ISO_CHANNELS) {
 906                         PRINT(KERN_ERR, ohci->host->id,
 907                               "Iso channel %d out of bound", channel);
 908                         return -EINVAL;
 909                 }
 910                 mask = (u64)0x1<<channel;
 911                 if (!(ohci->ISO_channel_usage & mask)) {
 912                         PRINT(KERN_ERR, ohci->host->id,
 913                               "Channel %d is not being used", channel);
 914                         return -ESRCH;
 915                 }
 916
 917                 /* Mark this channel as unused */
 918                 ohci->ISO_channel_usage &= ~mask;
 919
 920                 if (cmd == VIDEO1394_IOC_UNLISTEN_CHANNEL)
 921                         d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, channel);
 922                 else
 923                         d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, channel);
 924
 925                 if (d == NULL) return -ESRCH;
 926                 PRINT(KERN_INFO, ohci->host->id, "Iso context %d "
 927                       "stop talking on channel %d", d->ctx, channel);
 928                 free_dma_iso_ctx(d);
 929
 930                 return 0;
 931         }
 932         case VIDEO1394_IOC_LISTEN_QUEUE_BUFFER:
 933         {
 934                 struct video1394_wait v;
 935                 struct dma_iso_ctx *d;
 936                 int next_prg;
 937
 938                 if (copy_from_user(&v, argp, sizeof(v)))
 939                         return -EFAULT;
 940
 941                 d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, v.channel);
 942                 if (d == NULL) return -EFAULT;
 943
 944                 if ((v.buffer<0) || (v.buffer>=d->num_desc - 1)) {
 945                         PRINT(KERN_ERR, ohci->host->id,
 946                               "Buffer %d out of range",v.buffer);
 947                         return -EINVAL;
 948                 }
 949
 950                 spin_lock_irqsave(&d->lock,flags);
 951
 952                 if (d->buffer_status[v.buffer]==VIDEO1394_BUFFER_QUEUED) {
 953                         PRINT(KERN_ERR, ohci->host->id,
 954                               "Buffer %d is already used",v.buffer);
 955                         spin_unlock_irqrestore(&d->lock,flags);
 956                         return -EBUSY;
 957                 }
 958
 959                 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_QUEUED;
 960
 961                 next_prg = (d->last_buffer + 1) % d->num_desc;
 962                 if (d->last_buffer>=0)
 963                         d->ir_prg[d->last_buffer][d->nb_cmd-1].branchAddress =
 964                                 cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[next_prg], 0)
 965                                         & 0xfffffff0) | 0x1);
 966
 967                 d->last_buffer = next_prg;
 968                 reprogram_dma_ir_prg(d, d->last_buffer, v.buffer, d->flags);
 969
 970                 d->ir_prg[d->last_buffer][d->nb_cmd-1].branchAddress = 0;
 971
 972                 spin_unlock_irqrestore(&d->lock,flags);
 973
 974                 if (!(reg_read(ohci, d->ctrlSet) & 0x8000))
 975                 {
 976                         DBGMSG(ohci->host->id, "Starting iso DMA ctx=%d",d->ctx);
 977
 978                         /* Tell the controller where the first program is */
 979                         reg_write(ohci, d->cmdPtr,
 980                                   dma_prog_region_offset_to_bus(&d->prg_reg[d->last_buffer], 0) | 0x1);
 981
 982                         /* Run IR context */
 983                         reg_write(ohci, d->ctrlSet, 0x8000);
 984                 }
 985                 else {
 986                         /* Wake up dma context if necessary */
 987                         if (!(reg_read(ohci, d->ctrlSet) & 0x400)) {
 988                                 PRINT(KERN_INFO, ohci->host->id,
 989                                       "Waking up iso dma ctx=%d", d->ctx);
 990                                 reg_write(ohci, d->ctrlSet, 0x1000);
 991                         }
 992                 }
 993                 return 0;
 994
 995         }
 996         case VIDEO1394_IOC_LISTEN_WAIT_BUFFER:
 997         case VIDEO1394_IOC_LISTEN_POLL_BUFFER:
 998         {
 999                 struct video1394_wait v;
1000                 struct dma_iso_ctx *d;
1001                 int i = 0;
1002
1003                 if (copy_from_user(&v, argp, sizeof(v)))
1004                         return -EFAULT;
1005
1006                 d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, v.channel);
1007                 if (d == NULL) return -EFAULT;
1008
1009                 if ((v.buffer<0) || (v.buffer>d->num_desc - 1)) {
1010                         PRINT(KERN_ERR, ohci->host->id,
1011                               "Buffer %d out of range",v.buffer);
1012                         return -EINVAL;
1013                 }
1014
1015                 /*
1016                  * I change the way it works so that it returns
1017                  * the last received frame.
1018                  */
1019                 spin_lock_irqsave(&d->lock, flags);
1020                 switch(d->buffer_status[v.buffer]) {
1021                 case VIDEO1394_BUFFER_READY:
1022                         d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
1023                         break;
1024                 case VIDEO1394_BUFFER_QUEUED:
1025                         if (cmd == VIDEO1394_IOC_LISTEN_POLL_BUFFER) {
1026                             /* for polling, return error code EINTR */
1027                             spin_unlock_irqrestore(&d->lock, flags);
1028                             return -EINTR;
1029                         }
1030
1031                         spin_unlock_irqrestore(&d->lock, flags);
1032                         wait_event_interruptible(d->waitq,
1033                                         video1394_buffer_state(d, v.buffer) ==
1034                                          VIDEO1394_BUFFER_READY);
1035                         if (signal_pending(current))
1036                                 return -EINTR;
1037                         spin_lock_irqsave(&d->lock, flags);
1038                         d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
1039                         break;
1040                 default:
1041                         PRINT(KERN_ERR, ohci->host->id,
1042                               "Buffer %d is not queued",v.buffer);
1043                         spin_unlock_irqrestore(&d->lock, flags);
1044                         return -ESRCH;
1045                 }
1046
1047                 /* set time of buffer */
1048                 v.filltime = d->buffer_time[v.buffer];
1049 //              printk("Buffer %d time %d\n", v.buffer, (d->buffer_time[v.buffer]).tv_usec);
1050
1051                 /*
1052                  * Look ahead to see how many more buffers have been received
1053                  */
1054                 i=0;
1055                 while (d->buffer_status[(v.buffer+1)%(d->num_desc - 1)]==
1056                        VIDEO1394_BUFFER_READY) {
1057                         v.buffer=(v.buffer+1)%(d->num_desc - 1);
1058                         i++;
1059                 }
1060                 spin_unlock_irqrestore(&d->lock, flags);
1061
1062                 v.buffer=i;
1063                 if (copy_to_user(argp, &v, sizeof(v)))
1064                         return -EFAULT;
1065
1066                 return 0;
1067         }
1068         case VIDEO1394_IOC_TALK_QUEUE_BUFFER:
1069         {
1070                 struct video1394_wait v;
1071                 unsigned int *psizes = NULL;
1072                 struct dma_iso_ctx *d;
1073                 int next_prg;
1074
1075                 if (copy_from_user(&v, argp, sizeof(v)))
1076                         return -EFAULT;
1077
1078                 d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, v.channel);
1079                 if (d == NULL) return -EFAULT;
1080
1081                 if ((v.buffer<0) || (v.buffer>=d->num_desc - 1)) {
1082                         PRINT(KERN_ERR, ohci->host->id,
1083                               "Buffer %d out of range",v.buffer);
1084                         return -EINVAL;
1085                 }
1086
1087                 if (d->flags & VIDEO1394_VARIABLE_PACKET_SIZE) {
1088                         int buf_size = d->nb_cmd * sizeof(unsigned int);
1089                         struct video1394_queue_variable __user *p = argp;
1090                         unsigned int __user *qv;
1091
1092                         if (get_user(qv, &p->packet_sizes))
1093                                 return -EFAULT;
1094
1095                         psizes = kmalloc(buf_size, GFP_KERNEL);
1096                         if (!psizes)
1097                                 return -ENOMEM;
1098
1099                         if (copy_from_user(psizes, qv, buf_size)) {
1100                                 kfree(psizes);
1101                                 return -EFAULT;
1102                         }
1103                 }
1104
1105                 spin_lock_irqsave(&d->lock,flags);
1106
1107                 // last_buffer is last_prg
1108                 next_prg = (d->last_buffer + 1) % d->num_desc;
1109                 if (d->buffer_status[v.buffer]!=VIDEO1394_BUFFER_FREE) {
1110                         PRINT(KERN_ERR, ohci->host->id,
1111                               "Buffer %d is already used",v.buffer);
1112                         spin_unlock_irqrestore(&d->lock,flags);
1113                         kfree(psizes);
1114                         return -EBUSY;
1115                 }
1116
1117                 if (d->flags & VIDEO1394_VARIABLE_PACKET_SIZE) {
1118                         initialize_dma_it_prg_var_packet_queue(
1119                                 d, next_prg, psizes, ohci);
1120                 }
1121
1122                 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_QUEUED;
1123
1124                 if (d->last_buffer >= 0) {
1125                         d->it_prg[d->last_buffer]
1126                                 [ d->last_used_cmd[d->last_buffer] ].end.branchAddress =
1127                                         cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[next_prg],
1128                                                 0) & 0xfffffff0) | 0x3);
1129
1130                         d->it_prg[d->last_buffer]
1131                                 [ d->last_used_cmd[d->last_buffer] ].begin.branchAddress =
1132                                         cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[next_prg],
1133                                                 0) & 0xfffffff0) | 0x3);
1134                         d->next_buffer[d->last_buffer] = (v.buffer + 1) % (d->num_desc - 1);
1135                 }
1136                 d->last_buffer = next_prg;
1137                 reprogram_dma_it_prg(d, d->last_buffer, v.buffer);
1138                 d->next_buffer[d->last_buffer] = -1;
1139
1140                 d->it_prg[d->last_buffer][d->last_used_cmd[d->last_buffer]].end.branchAddress = 0;
1141
1142                 spin_unlock_irqrestore(&d->lock,flags);
1143
1144                 if (!(reg_read(ohci, d->ctrlSet) & 0x8000))
1145                 {
1146                         DBGMSG(ohci->host->id, "Starting iso transmit DMA ctx=%d",
1147                                d->ctx);
1148                         put_timestamp(ohci, d, d->last_buffer);
1149
1150                         /* Tell the controller where the first program is */
1151                         reg_write(ohci, d->cmdPtr,
1152                                 dma_prog_region_offset_to_bus(&d->prg_reg[next_prg], 0) | 0x3);
1153
1154                         /* Run IT context */
1155                         reg_write(ohci, d->ctrlSet, 0x8000);
1156                 }
1157                 else {
1158                         /* Wake up dma context if necessary */
1159                         if (!(reg_read(ohci, d->ctrlSet) & 0x400)) {
1160                                 PRINT(KERN_INFO, ohci->host->id,
1161                                       "Waking up iso transmit dma ctx=%d",
1162                                       d->ctx);
1163                                 put_timestamp(ohci, d, d->last_buffer);
1164                                 reg_write(ohci, d->ctrlSet, 0x1000);
1165                         }
1166                 }
1167
1168                 kfree(psizes);
1169                 return 0;
1170
1171         }
1172         case VIDEO1394_IOC_TALK_WAIT_BUFFER:
1173         {
1174                 struct video1394_wait v;
1175                 struct dma_iso_ctx *d;
1176
1177                 if (copy_from_user(&v, argp, sizeof(v)))
1178                         return -EFAULT;
1179
1180                 d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, v.channel);
1181                 if (d == NULL) return -EFAULT;
1182
1183                 if ((v.buffer<0) || (v.buffer>=d->num_desc-1)) {
1184                         PRINT(KERN_ERR, ohci->host->id,
1185                               "Buffer %d out of range",v.buffer);
1186                         return -EINVAL;
1187                 }
1188
1189                 switch(d->buffer_status[v.buffer]) {
1190                 case VIDEO1394_BUFFER_READY:
1191                         d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
1192                         return 0;
1193                 case VIDEO1394_BUFFER_QUEUED:
1194                         wait_event_interruptible(d->waitq,
1195                                         (d->buffer_status[v.buffer] == VIDEO1394_BUFFER_READY));
1196                         if (signal_pending(current))
1197                                 return -EINTR;
1198                         d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
1199                         return 0;
1200                 default:
1201                         PRINT(KERN_ERR, ohci->host->id,
1202                               "Buffer %d is not queued",v.buffer);
1203                         return -ESRCH;
1204                 }
1205         }
1206         default:
1207                 return -ENOTTY;
1208         }
1209 }
1210
1211 static long video1394_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1212 {
1213         int err;
1214         lock_kernel();
1215         err = __video1394_ioctl(file, cmd, arg);
1216         unlock_kernel();
1217         return err;
1218 }
1219
1220 /*
1221  *      This maps the vmalloced and reserved buffer to user space.
1222  *
1223  *  FIXME:
1224  *  - PAGE_READONLY should suffice!?
1225  *  - remap_pfn_range is kind of inefficient for page by page remapping.
1226  *    But e.g. pte_alloc() does not work in modules ... :-(
1227  */
1228
1229 static int video1394_mmap(struct file *file, struct vm_area_struct *vma)
1230 {
1231         struct file_ctx *ctx = (struct file_ctx *)file->private_data;
1232         int res = -EINVAL;
1233
1234         lock_kernel();
1235         if (ctx->current_ctx == NULL) {
1236                 PRINT(KERN_ERR, ctx->ohci->host->id, "Current iso context not set");
1237         } else
1238                 res = dma_region_mmap(&ctx->current_ctx->dma, file, vma);
1239         unlock_kernel();
1240
1241         return res;
1242 }
1243
1244 static int video1394_open(struct inode *inode, struct file *file)
1245 {
1246         int i = ieee1394_file_to_instance(file);
1247         struct ti_ohci *ohci;
1248         struct file_ctx *ctx;
1249
1250         ohci = hpsb_get_hostinfo_bykey(&video1394_highlevel, i);
1251         if (ohci == NULL)
1252                 return -EIO;
1253
1254         ctx = kmalloc(sizeof(struct file_ctx), GFP_KERNEL);
1255         if (ctx == NULL)  {
1256                 PRINT(KERN_ERR, ohci->host->id, "Cannot malloc file_ctx");
1257                 return -ENOMEM;
1258         }
1259
1260         memset(ctx, 0, sizeof(struct file_ctx));
1261         ctx->ohci = ohci;
1262         INIT_LIST_HEAD(&ctx->context_list);
1263         ctx->current_ctx = NULL;
1264         file->private_data = ctx;
1265
1266         return 0;
1267 }
1268
1269 static int video1394_release(struct inode *inode, struct file *file)
1270 {
1271         struct file_ctx *ctx = (struct file_ctx *)file->private_data;
1272         struct ti_ohci *ohci = ctx->ohci;
1273         struct list_head *lh, *next;
1274         u64 mask;
1275
1276         lock_kernel();
1277         list_for_each_safe(lh, next, &ctx->context_list) {
1278                 struct dma_iso_ctx *d;
1279                 d = list_entry(lh, struct dma_iso_ctx, link);
1280                 mask = (u64) 1 << d->channel;
1281
1282                 if (!(ohci->ISO_channel_usage & mask))
1283                         PRINT(KERN_ERR, ohci->host->id, "On release: Channel %d "
1284                               "is not being used", d->channel);
1285                 else
1286                         ohci->ISO_channel_usage &= ~mask;
1287                 PRINT(KERN_INFO, ohci->host->id, "On release: Iso %s context "
1288                       "%d stop listening on channel %d",
1289                       d->type == OHCI_ISO_RECEIVE ? "receive" : "transmit",
1290                       d->ctx, d->channel);
1291                 free_dma_iso_ctx(d);
1292         }
1293
1294         kfree(ctx);
1295         file->private_data = NULL;
1296
1297         unlock_kernel();
1298         return 0;
1299 }
1300
1301 #ifdef CONFIG_COMPAT
1302 static long video1394_compat_ioctl(struct file *f, unsigned cmd, unsigned long arg);
1303 #endif
1304
1305 static struct cdev video1394_cdev;
1306 static struct file_operations video1394_fops=
1307 {
1308         .owner =        THIS_MODULE,
1309         .unlocked_ioctl = video1394_ioctl,
1310 #ifdef CONFIG_COMPAT
1311         .compat_ioctl = video1394_compat_ioctl,
1312 #endif
1313         .mmap =         video1394_mmap,
1314         .open =         video1394_open,
1315         .release =      video1394_release
1316 };
1317
1318 /*** HOTPLUG STUFF **********************************************************/
1319 /*
1320  * Export information about protocols/devices supported by this driver.
1321  */
1322 static struct ieee1394_device_id video1394_id_table[] = {
1323         {
1324                 .match_flags    = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
1325                 .specifier_id   = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff,
1326                 .version        = CAMERA_SW_VERSION_ENTRY & 0xffffff
1327         },
1328         {
1329                 .match_flags    = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
1330                 .specifier_id   = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff,
1331                 .version        = (CAMERA_SW_VERSION_ENTRY + 1) & 0xffffff
1332         },
1333         {
1334                 .match_flags    = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
1335                 .specifier_id   = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff,
1336                 .version        = (CAMERA_SW_VERSION_ENTRY + 2) & 0xffffff
1337         },
1338         { }
1339 };
1340
1341 MODULE_DEVICE_TABLE(ieee1394, video1394_id_table);
1342
1343 static struct hpsb_protocol_driver video1394_driver = {
1344         .name           = "1394 Digital Camera Driver",
1345         .id_table       = video1394_id_table,
1346         .driver         = {
1347                 .name   = VIDEO1394_DRIVER_NAME,
1348                 .bus    = &ieee1394_bus_type,
1349         },
1350 };
1351
1352
1353 static void video1394_add_host (struct hpsb_host *host)
1354 {
1355         struct ti_ohci *ohci;
1356         int minor;
1357
1358         /* We only work with the OHCI-1394 driver */
1359         if (strcmp(host->driver->name, OHCI1394_DRIVER_NAME))
1360                 return;
1361
1362         ohci = (struct ti_ohci *)host->hostdata;
1363
1364         if (!hpsb_create_hostinfo(&video1394_highlevel, host, 0)) {
1365                 PRINT(KERN_ERR, ohci->host->id, "Cannot allocate hostinfo");
1366                 return;
1367         }
1368
1369         hpsb_set_hostinfo(&video1394_highlevel, host, ohci);
1370         hpsb_set_hostinfo_key(&video1394_highlevel, host, ohci->host->id);
1371
1372         minor = IEEE1394_MINOR_BLOCK_VIDEO1394 * 16 + ohci->host->id;
1373         class_device_create(hpsb_protocol_class, NULL, MKDEV(
1374                 IEEE1394_MAJOR, minor),
1375                 NULL, "%s-%d", VIDEO1394_DRIVER_NAME, ohci->host->id);
1376         devfs_mk_cdev(MKDEV(IEEE1394_MAJOR, minor),
1377                        S_IFCHR | S_IRUSR | S_IWUSR,
1378                        "%s/%d", VIDEO1394_DRIVER_NAME, ohci->host->id);
1379 }
1380
1381
1382 static void video1394_remove_host (struct hpsb_host *host)
1383 {
1384         struct ti_ohci *ohci = hpsb_get_hostinfo(&video1394_highlevel, host);
1385
1386         if (ohci) {
1387                 class_device_destroy(hpsb_protocol_class, MKDEV(IEEE1394_MAJOR,
1388                         IEEE1394_MINOR_BLOCK_VIDEO1394 * 16 + ohci->host->id));
1389                 devfs_remove("%s/%d", VIDEO1394_DRIVER_NAME, ohci->host->id);
1390         }
1391
1392         return;
1393 }
1394
1395
1396 static struct hpsb_highlevel video1394_highlevel = {
1397         .name =         VIDEO1394_DRIVER_NAME,
1398         .add_host =     video1394_add_host,
1399         .remove_host =  video1394_remove_host,
1400 };
1401
1402 MODULE_AUTHOR("Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au>");
1403 MODULE_DESCRIPTION("driver for digital video on OHCI board");
1404 MODULE_SUPPORTED_DEVICE(VIDEO1394_DRIVER_NAME);
1405 MODULE_LICENSE("GPL");
1406
1407 #ifdef CONFIG_COMPAT
1408
1409 #define VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER     \
1410         _IOW ('#', 0x12, struct video1394_wait32)
1411 #define VIDEO1394_IOC32_LISTEN_WAIT_BUFFER      \
1412         _IOWR('#', 0x13, struct video1394_wait32)
1413 #define VIDEO1394_IOC32_TALK_WAIT_BUFFER        \
1414         _IOW ('#', 0x17, struct video1394_wait32)
1415 #define VIDEO1394_IOC32_LISTEN_POLL_BUFFER      \
1416         _IOWR('#', 0x18, struct video1394_wait32)
1417
1418 struct video1394_wait32 {
1419         u32 channel;
1420         u32 buffer;
1421         struct compat_timeval filltime;
1422 };
1423
1424 static int video1394_wr_wait32(struct file *file, unsigned int cmd, unsigned long arg)
1425 {
1426         struct video1394_wait32 __user *argp = (void __user *)arg;
1427         struct video1394_wait32 wait32;
1428         struct video1394_wait wait;
1429         mm_segment_t old_fs;
1430         int ret;
1431
1432         if (copy_from_user(&wait32, argp, sizeof(wait32)))
1433                 return -EFAULT;
1434
1435         wait.channel = wait32.channel;
1436         wait.buffer = wait32.buffer;
1437         wait.filltime.tv_sec = (time_t)wait32.filltime.tv_sec;
1438         wait.filltime.tv_usec = (suseconds_t)wait32.filltime.tv_usec;
1439
1440         old_fs = get_fs();
1441         set_fs(KERNEL_DS);
1442         if (cmd == VIDEO1394_IOC32_LISTEN_WAIT_BUFFER)
1443                 ret = video1394_ioctl(file,
1444                                       VIDEO1394_IOC_LISTEN_WAIT_BUFFER,
1445                                       (unsigned long) &wait);
1446         else
1447                 ret = video1394_ioctl(file,
1448                                       VIDEO1394_IOC_LISTEN_POLL_BUFFER,
1449                                       (unsigned long) &wait);
1450         set_fs(old_fs);
1451
1452         if (!ret) {
1453                 wait32.channel = wait.channel;
1454                 wait32.buffer = wait.buffer;
1455                 wait32.filltime.tv_sec = (int)wait.filltime.tv_sec;
1456                 wait32.filltime.tv_usec = (int)wait.filltime.tv_usec;
1457
1458                 if (copy_to_user(argp, &wait32, sizeof(wait32)))
1459                         ret = -EFAULT;
1460         }
1461
1462         return ret;
1463 }
1464
1465 static int video1394_w_wait32(struct file *file, unsigned int cmd, unsigned long arg)
1466 {
1467         struct video1394_wait32 wait32;
1468         struct video1394_wait wait;
1469         mm_segment_t old_fs;
1470         int ret;
1471
1472         if (copy_from_user(&wait32, (void __user *)arg, sizeof(wait32)))
1473                 return -EFAULT;
1474
1475         wait.channel = wait32.channel;
1476         wait.buffer = wait32.buffer;
1477         wait.filltime.tv_sec = (time_t)wait32.filltime.tv_sec;
1478         wait.filltime.tv_usec = (suseconds_t)wait32.filltime.tv_usec;
1479
1480         old_fs = get_fs();
1481         set_fs(KERNEL_DS);
1482         if (cmd == VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER)
1483                 ret = video1394_ioctl(file,
1484                                       VIDEO1394_IOC_LISTEN_QUEUE_BUFFER,
1485                                       (unsigned long) &wait);
1486         else
1487                 ret = video1394_ioctl(file,
1488                                       VIDEO1394_IOC_TALK_WAIT_BUFFER,
1489                                       (unsigned long) &wait);
1490         set_fs(old_fs);
1491
1492         return ret;
1493 }
1494
1495 static int video1394_queue_buf32(struct file *file, unsigned int cmd, unsigned long arg)
1496 {
1497         return -EFAULT;   /* ??? was there before. */
1498
1499         return video1394_ioctl(file,
1500                                 VIDEO1394_IOC_TALK_QUEUE_BUFFER, arg);
1501 }
1502
1503 static long video1394_compat_ioctl(struct file *f, unsigned cmd, unsigned long arg)
1504 {
1505         switch (cmd) {
1506         case VIDEO1394_IOC_LISTEN_CHANNEL:
1507         case VIDEO1394_IOC_UNLISTEN_CHANNEL:
1508         case VIDEO1394_IOC_TALK_CHANNEL:
1509         case VIDEO1394_IOC_UNTALK_CHANNEL:
1510                 return video1394_ioctl(f, cmd, arg);
1511
1512         case VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER:
1513                 return video1394_w_wait32(f, cmd, arg);
1514         case VIDEO1394_IOC32_LISTEN_WAIT_BUFFER:
1515                 return video1394_wr_wait32(f, cmd, arg);
1516         case VIDEO1394_IOC_TALK_QUEUE_BUFFER:
1517                 return video1394_queue_buf32(f, cmd, arg);
1518         case VIDEO1394_IOC32_TALK_WAIT_BUFFER:
1519                 return video1394_w_wait32(f, cmd, arg);
1520         case VIDEO1394_IOC32_LISTEN_POLL_BUFFER:
1521                 return video1394_wr_wait32(f, cmd, arg);
1522         default:
1523                 return -ENOIOCTLCMD;
1524         }
1525 }
1526
1527 #endif /* CONFIG_COMPAT */
1528
1529 static void __exit video1394_exit_module (void)
1530 {
1531         hpsb_unregister_protocol(&video1394_driver);
1532
1533         hpsb_unregister_highlevel(&video1394_highlevel);
1534
1535         devfs_remove(VIDEO1394_DRIVER_NAME);
1536         cdev_del(&video1394_cdev);
1537
1538         PRINT_G(KERN_INFO, "Removed " VIDEO1394_DRIVER_NAME " module");
1539 }
1540
1541 static int __init video1394_init_module (void)
1542 {
1543         int ret;
1544
1545         cdev_init(&video1394_cdev, &video1394_fops);
1546         video1394_cdev.owner = THIS_MODULE;
1547         kobject_set_name(&video1394_cdev.kobj, VIDEO1394_DRIVER_NAME);
1548         ret = cdev_add(&video1394_cdev, IEEE1394_VIDEO1394_DEV, 16);
1549         if (ret) {
1550                 PRINT_G(KERN_ERR, "video1394: unable to get minor device block");
1551                 return ret;
1552         }
1553
1554         devfs_mk_dir(VIDEO1394_DRIVER_NAME);
1555
1556         hpsb_register_highlevel(&video1394_highlevel);
1557
1558         ret = hpsb_register_protocol(&video1394_driver);
1559         if (ret) {
1560                 PRINT_G(KERN_ERR, "video1394: failed to register protocol");
1561                 hpsb_unregister_highlevel(&video1394_highlevel);
1562                 devfs_remove(VIDEO1394_DRIVER_NAME);
1563                 cdev_del(&video1394_cdev);
1564                 return ret;
1565         }
1566
1567         PRINT_G(KERN_INFO, "Installed " VIDEO1394_DRIVER_NAME " module");
1568         return 0;
1569 }
1570
1571
1572 module_init(video1394_init_module);
1573 module_exit(video1394_exit_module);