18767f8ab090a409c512db7ba29bf4b8d56cb2f2
[sfrench/cifs-2.6.git] / drivers / idle / intel_idle.c
1 /*
2  * intel_idle.c - native hardware idle loop for modern Intel processors
3  *
4  * Copyright (c) 2010, Intel Corporation.
5  * Len Brown <len.brown@intel.com>
6  *
7  * This program is free software; you can redistribute it and/or modify it
8  * under the terms and conditions of the GNU General Public License,
9  * version 2, as published by the Free Software Foundation.
10  *
11  * This program is distributed in the hope it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along with
17  * this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19  */
20
21 /*
22  * intel_idle is a cpuidle driver that loads on specific Intel processors
23  * in lieu of the legacy ACPI processor_idle driver.  The intent is to
24  * make Linux more efficient on these processors, as intel_idle knows
25  * more than ACPI, as well as make Linux more immune to ACPI BIOS bugs.
26  */
27
28 /*
29  * Design Assumptions
30  *
31  * All CPUs have same idle states as boot CPU
32  *
33  * Chipset BM_STS (bus master status) bit is a NOP
34  *      for preventing entry into deep C-stats
35  */
36
37 /*
38  * Known limitations
39  *
40  * The driver currently initializes for_each_online_cpu() upon modprobe.
41  * It it unaware of subsequent processors hot-added to the system.
42  * This means that if you boot with maxcpus=n and later online
43  * processors above n, those processors will use C1 only.
44  *
45  * ACPI has a .suspend hack to turn off deep c-statees during suspend
46  * to avoid complications with the lapic timer workaround.
47  * Have not seen issues with suspend, but may need same workaround here.
48  *
49  * There is currently no kernel-based automatic probing/loading mechanism
50  * if the driver is built as a module.
51  */
52
53 /* un-comment DEBUG to enable pr_debug() statements */
54 #define DEBUG
55
56 #include <linux/kernel.h>
57 #include <linux/cpuidle.h>
58 #include <linux/clockchips.h>
59 #include <linux/hrtimer.h>      /* ktime_get_real() */
60 #include <trace/events/power.h>
61 #include <linux/sched.h>
62 #include <linux/notifier.h>
63 #include <linux/cpu.h>
64 #include <linux/module.h>
65 #include <asm/mwait.h>
66 #include <asm/msr.h>
67
68 #define INTEL_IDLE_VERSION "0.4"
69 #define PREFIX "intel_idle: "
70
71 static struct cpuidle_driver intel_idle_driver = {
72         .name = "intel_idle",
73         .owner = THIS_MODULE,
74 };
75 /* intel_idle.max_cstate=0 disables driver */
76 static int max_cstate = MWAIT_MAX_NUM_CSTATES - 1;
77
78 static unsigned int mwait_substates;
79
80 #define LAPIC_TIMER_ALWAYS_RELIABLE 0xFFFFFFFF
81 /* Reliable LAPIC Timer States, bit 1 for C1 etc.  */
82 static unsigned int lapic_timer_reliable_states = (1 << 1);      /* Default to only C1 */
83
84 static struct cpuidle_device __percpu *intel_idle_cpuidle_devices;
85 static int intel_idle(struct cpuidle_device *dev, struct cpuidle_state *state);
86
87 static struct cpuidle_state *cpuidle_state_table;
88
89 /*
90  * Hardware C-state auto-demotion may not always be optimal.
91  * Indicate which enable bits to clear here.
92  */
93 static unsigned long long auto_demotion_disable_flags;
94
95 /*
96  * Set this flag for states where the HW flushes the TLB for us
97  * and so we don't need cross-calls to keep it consistent.
98  * If this flag is set, SW flushes the TLB, so even if the
99  * HW doesn't do the flushing, this flag is safe to use.
100  */
101 #define CPUIDLE_FLAG_TLB_FLUSHED        0x10000
102
103 /*
104  * States are indexed by the cstate number,
105  * which is also the index into the MWAIT hint array.
106  * Thus C0 is a dummy.
107  */
108 static struct cpuidle_state nehalem_cstates[MWAIT_MAX_NUM_CSTATES] = {
109         { /* MWAIT C0 */ },
110         { /* MWAIT C1 */
111                 .name = "C1-NHM",
112                 .desc = "MWAIT 0x00",
113                 .driver_data = (void *) 0x00,
114                 .flags = CPUIDLE_FLAG_TIME_VALID,
115                 .exit_latency = 3,
116                 .target_residency = 6,
117                 .enter = &intel_idle },
118         { /* MWAIT C2 */
119                 .name = "C3-NHM",
120                 .desc = "MWAIT 0x10",
121                 .driver_data = (void *) 0x10,
122                 .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
123                 .exit_latency = 20,
124                 .target_residency = 80,
125                 .enter = &intel_idle },
126         { /* MWAIT C3 */
127                 .name = "C6-NHM",
128                 .desc = "MWAIT 0x20",
129                 .driver_data = (void *) 0x20,
130                 .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
131                 .exit_latency = 200,
132                 .target_residency = 800,
133                 .enter = &intel_idle },
134 };
135
136 static struct cpuidle_state snb_cstates[MWAIT_MAX_NUM_CSTATES] = {
137         { /* MWAIT C0 */ },
138         { /* MWAIT C1 */
139                 .name = "C1-SNB",
140                 .desc = "MWAIT 0x00",
141                 .driver_data = (void *) 0x00,
142                 .flags = CPUIDLE_FLAG_TIME_VALID,
143                 .exit_latency = 1,
144                 .target_residency = 1,
145                 .enter = &intel_idle },
146         { /* MWAIT C2 */
147                 .name = "C3-SNB",
148                 .desc = "MWAIT 0x10",
149                 .driver_data = (void *) 0x10,
150                 .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
151                 .exit_latency = 80,
152                 .target_residency = 211,
153                 .enter = &intel_idle },
154         { /* MWAIT C3 */
155                 .name = "C6-SNB",
156                 .desc = "MWAIT 0x20",
157                 .driver_data = (void *) 0x20,
158                 .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
159                 .exit_latency = 104,
160                 .target_residency = 345,
161                 .enter = &intel_idle },
162         { /* MWAIT C4 */
163                 .name = "C7-SNB",
164                 .desc = "MWAIT 0x30",
165                 .driver_data = (void *) 0x30,
166                 .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
167                 .exit_latency = 109,
168                 .target_residency = 345,
169                 .enter = &intel_idle },
170 };
171
172 static struct cpuidle_state atom_cstates[MWAIT_MAX_NUM_CSTATES] = {
173         { /* MWAIT C0 */ },
174         { /* MWAIT C1 */
175                 .name = "C1-ATM",
176                 .desc = "MWAIT 0x00",
177                 .driver_data = (void *) 0x00,
178                 .flags = CPUIDLE_FLAG_TIME_VALID,
179                 .exit_latency = 1,
180                 .target_residency = 4,
181                 .enter = &intel_idle },
182         { /* MWAIT C2 */
183                 .name = "C2-ATM",
184                 .desc = "MWAIT 0x10",
185                 .driver_data = (void *) 0x10,
186                 .flags = CPUIDLE_FLAG_TIME_VALID,
187                 .exit_latency = 20,
188                 .target_residency = 80,
189                 .enter = &intel_idle },
190         { /* MWAIT C3 */ },
191         { /* MWAIT C4 */
192                 .name = "C4-ATM",
193                 .desc = "MWAIT 0x30",
194                 .driver_data = (void *) 0x30,
195                 .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
196                 .exit_latency = 100,
197                 .target_residency = 400,
198                 .enter = &intel_idle },
199         { /* MWAIT C5 */ },
200         { /* MWAIT C6 */
201                 .name = "C6-ATM",
202                 .desc = "MWAIT 0x52",
203                 .driver_data = (void *) 0x52,
204                 .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
205                 .exit_latency = 140,
206                 .target_residency = 560,
207                 .enter = &intel_idle },
208 };
209
210 /**
211  * intel_idle
212  * @dev: cpuidle_device
213  * @state: cpuidle state
214  *
215  */
216 static int intel_idle(struct cpuidle_device *dev, struct cpuidle_state *state)
217 {
218         unsigned long ecx = 1; /* break on interrupt flag */
219         unsigned long eax = (unsigned long)cpuidle_get_statedata(state);
220         unsigned int cstate;
221         ktime_t kt_before, kt_after;
222         s64 usec_delta;
223         int cpu = smp_processor_id();
224
225         cstate = (((eax) >> MWAIT_SUBSTATE_SIZE) & MWAIT_CSTATE_MASK) + 1;
226
227         local_irq_disable();
228
229         /*
230          * leave_mm() to avoid costly and often unnecessary wakeups
231          * for flushing the user TLB's associated with the active mm.
232          */
233         if (state->flags & CPUIDLE_FLAG_TLB_FLUSHED)
234                 leave_mm(cpu);
235
236         if (!(lapic_timer_reliable_states & (1 << (cstate))))
237                 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu);
238
239         kt_before = ktime_get_real();
240
241         stop_critical_timings();
242         if (!need_resched()) {
243
244                 __monitor((void *)&current_thread_info()->flags, 0, 0);
245                 smp_mb();
246                 if (!need_resched())
247                         __mwait(eax, ecx);
248         }
249
250         start_critical_timings();
251
252         kt_after = ktime_get_real();
253         usec_delta = ktime_to_us(ktime_sub(kt_after, kt_before));
254
255         local_irq_enable();
256
257         if (!(lapic_timer_reliable_states & (1 << (cstate))))
258                 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu);
259
260         return usec_delta;
261 }
262
263 static void __setup_broadcast_timer(void *arg)
264 {
265         unsigned long reason = (unsigned long)arg;
266         int cpu = smp_processor_id();
267
268         reason = reason ?
269                 CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
270
271         clockevents_notify(reason, &cpu);
272 }
273
274 static int setup_broadcast_cpuhp_notify(struct notifier_block *n,
275                 unsigned long action, void *hcpu)
276 {
277         int hotcpu = (unsigned long)hcpu;
278
279         switch (action & 0xf) {
280         case CPU_ONLINE:
281                 smp_call_function_single(hotcpu, __setup_broadcast_timer,
282                         (void *)true, 1);
283                 break;
284         }
285         return NOTIFY_OK;
286 }
287
288 static struct notifier_block setup_broadcast_notifier = {
289         .notifier_call = setup_broadcast_cpuhp_notify,
290 };
291
292 static void auto_demotion_disable(void *dummy)
293 {
294         unsigned long long msr_bits;
295
296         rdmsrl(MSR_NHM_SNB_PKG_CST_CFG_CTL, msr_bits);
297         msr_bits &= ~auto_demotion_disable_flags;
298         wrmsrl(MSR_NHM_SNB_PKG_CST_CFG_CTL, msr_bits);
299 }
300
301 /*
302  * intel_idle_probe()
303  */
304 static int intel_idle_probe(void)
305 {
306         unsigned int eax, ebx, ecx;
307
308         if (max_cstate == 0) {
309                 pr_debug(PREFIX "disabled\n");
310                 return -EPERM;
311         }
312
313         if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
314                 return -ENODEV;
315
316         if (!boot_cpu_has(X86_FEATURE_MWAIT))
317                 return -ENODEV;
318
319         if (boot_cpu_data.cpuid_level < CPUID_MWAIT_LEAF)
320                 return -ENODEV;
321
322         cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &mwait_substates);
323
324         if (!(ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED) ||
325                 !(ecx & CPUID5_ECX_INTERRUPT_BREAK))
326                         return -ENODEV;
327
328         pr_debug(PREFIX "MWAIT substates: 0x%x\n", mwait_substates);
329
330
331         if (boot_cpu_data.x86 != 6)     /* family 6 */
332                 return -ENODEV;
333
334         switch (boot_cpu_data.x86_model) {
335
336         case 0x1A:      /* Core i7, Xeon 5500 series */
337         case 0x1E:      /* Core i7 and i5 Processor - Lynnfield Jasper Forest */
338         case 0x1F:      /* Core i7 and i5 Processor - Nehalem */
339         case 0x2E:      /* Nehalem-EX Xeon */
340         case 0x2F:      /* Westmere-EX Xeon */
341         case 0x25:      /* Westmere */
342         case 0x2C:      /* Westmere */
343                 cpuidle_state_table = nehalem_cstates;
344                 auto_demotion_disable_flags =
345                         (NHM_C1_AUTO_DEMOTE | NHM_C3_AUTO_DEMOTE);
346                 break;
347
348         case 0x1C:      /* 28 - Atom Processor */
349                 cpuidle_state_table = atom_cstates;
350                 break;
351
352         case 0x26:      /* 38 - Lincroft Atom Processor */
353                 cpuidle_state_table = atom_cstates;
354                 auto_demotion_disable_flags = ATM_LNC_C6_AUTO_DEMOTE;
355                 break;
356
357         case 0x2A:      /* SNB */
358         case 0x2D:      /* SNB Xeon */
359                 cpuidle_state_table = snb_cstates;
360                 break;
361
362         default:
363                 pr_debug(PREFIX "does not run on family %d model %d\n",
364                         boot_cpu_data.x86, boot_cpu_data.x86_model);
365                 return -ENODEV;
366         }
367
368         if (boot_cpu_has(X86_FEATURE_ARAT))     /* Always Reliable APIC Timer */
369                 lapic_timer_reliable_states = LAPIC_TIMER_ALWAYS_RELIABLE;
370         else {
371                 smp_call_function(__setup_broadcast_timer, (void *)true, 1);
372                 register_cpu_notifier(&setup_broadcast_notifier);
373         }
374
375         pr_debug(PREFIX "v" INTEL_IDLE_VERSION
376                 " model 0x%X\n", boot_cpu_data.x86_model);
377
378         pr_debug(PREFIX "lapic_timer_reliable_states 0x%x\n",
379                 lapic_timer_reliable_states);
380         return 0;
381 }
382
383 /*
384  * intel_idle_cpuidle_devices_uninit()
385  * unregister, free cpuidle_devices
386  */
387 static void intel_idle_cpuidle_devices_uninit(void)
388 {
389         int i;
390         struct cpuidle_device *dev;
391
392         for_each_online_cpu(i) {
393                 dev = per_cpu_ptr(intel_idle_cpuidle_devices, i);
394                 cpuidle_unregister_device(dev);
395         }
396
397         free_percpu(intel_idle_cpuidle_devices);
398         return;
399 }
400 /*
401  * intel_idle_cpuidle_devices_init()
402  * allocate, initialize, register cpuidle_devices
403  */
404 static int intel_idle_cpuidle_devices_init(void)
405 {
406         int i, cstate;
407         struct cpuidle_device *dev;
408
409         intel_idle_cpuidle_devices = alloc_percpu(struct cpuidle_device);
410         if (intel_idle_cpuidle_devices == NULL)
411                 return -ENOMEM;
412
413         for_each_online_cpu(i) {
414                 dev = per_cpu_ptr(intel_idle_cpuidle_devices, i);
415
416                 dev->state_count = 1;
417
418                 for (cstate = 1; cstate < MWAIT_MAX_NUM_CSTATES; ++cstate) {
419                         int num_substates;
420
421                         if (cstate > max_cstate) {
422                                 printk(PREFIX "max_cstate %d reached\n",
423                                         max_cstate);
424                                 break;
425                         }
426
427                         /* does the state exist in CPUID.MWAIT? */
428                         num_substates = (mwait_substates >> ((cstate) * 4))
429                                                 & MWAIT_SUBSTATE_MASK;
430                         if (num_substates == 0)
431                                 continue;
432                         /* is the state not enabled? */
433                         if (cpuidle_state_table[cstate].enter == NULL) {
434                                 /* does the driver not know about the state? */
435                                 if (*cpuidle_state_table[cstate].name == '\0')
436                                         pr_debug(PREFIX "unaware of model 0x%x"
437                                                 " MWAIT %d please"
438                                                 " contact lenb@kernel.org",
439                                         boot_cpu_data.x86_model, cstate);
440                                 continue;
441                         }
442
443                         if ((cstate > 2) &&
444                                 !boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
445                                 mark_tsc_unstable("TSC halts in idle"
446                                         " states deeper than C2");
447
448                         dev->states[dev->state_count] = /* structure copy */
449                                 cpuidle_state_table[cstate];
450
451                         dev->state_count += 1;
452                 }
453
454                 dev->cpu = i;
455                 if (cpuidle_register_device(dev)) {
456                         pr_debug(PREFIX "cpuidle_register_device %d failed!\n",
457                                  i);
458                         intel_idle_cpuidle_devices_uninit();
459                         return -EIO;
460                 }
461         }
462         if (auto_demotion_disable_flags)
463                 smp_call_function(auto_demotion_disable, NULL, 1);
464
465         return 0;
466 }
467
468
469 static int __init intel_idle_init(void)
470 {
471         int retval;
472
473         /* Do not load intel_idle at all for now if idle= is passed */
474         if (boot_option_idle_override != IDLE_NO_OVERRIDE)
475                 return -ENODEV;
476
477         retval = intel_idle_probe();
478         if (retval)
479                 return retval;
480
481         retval = cpuidle_register_driver(&intel_idle_driver);
482         if (retval) {
483                 printk(KERN_DEBUG PREFIX "intel_idle yielding to %s",
484                         cpuidle_get_driver()->name);
485                 return retval;
486         }
487
488         retval = intel_idle_cpuidle_devices_init();
489         if (retval) {
490                 cpuidle_unregister_driver(&intel_idle_driver);
491                 return retval;
492         }
493
494         return 0;
495 }
496
497 static void __exit intel_idle_exit(void)
498 {
499         intel_idle_cpuidle_devices_uninit();
500         cpuidle_unregister_driver(&intel_idle_driver);
501
502         if (lapic_timer_reliable_states != LAPIC_TIMER_ALWAYS_RELIABLE) {
503                 smp_call_function(__setup_broadcast_timer, (void *)false, 1);
504                 unregister_cpu_notifier(&setup_broadcast_notifier);
505         }
506
507         return;
508 }
509
510 module_init(intel_idle_init);
511 module_exit(intel_idle_exit);
512
513 module_param(max_cstate, int, 0444);
514
515 MODULE_AUTHOR("Len Brown <len.brown@intel.com>");
516 MODULE_DESCRIPTION("Cpuidle driver for Intel Hardware v" INTEL_IDLE_VERSION);
517 MODULE_LICENSE("GPL");