8e5c8f28bc8bf039767362be30d617e43d4255aa
[sfrench/cifs-2.6.git] / drivers / i2c / busses / i2c-xgene-slimpro.c
1 /*
2  * X-Gene SLIMpro I2C Driver
3  *
4  * Copyright (c) 2014, Applied Micro Circuits Corporation
5  * Author: Feng Kan <fkan@apm.com>
6  * Author: Hieu Le <hnle@apm.com>
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License as
10  * published by the Free Software Foundation; either version 2 of
11  * the License, or (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, see <http://www.gnu.org/licenses/>.
20  *
21  * This driver provides support for X-Gene SLIMpro I2C device access
22  * using the APM X-Gene SLIMpro mailbox driver.
23  *
24  */
25 #include <acpi/pcc.h>
26 #include <linux/acpi.h>
27 #include <linux/dma-mapping.h>
28 #include <linux/i2c.h>
29 #include <linux/interrupt.h>
30 #include <linux/mailbox_client.h>
31 #include <linux/module.h>
32 #include <linux/of.h>
33 #include <linux/platform_device.h>
34 #include <linux/version.h>
35
36 #define MAILBOX_OP_TIMEOUT              1000    /* Operation time out in ms */
37 #define MAILBOX_I2C_INDEX               0
38 #define SLIMPRO_IIC_BUS                 1       /* Use I2C bus 1 only */
39
40 #define SMBUS_CMD_LEN                   1
41 #define BYTE_DATA                       1
42 #define WORD_DATA                       2
43 #define BLOCK_DATA                      3
44
45 #define SLIMPRO_IIC_I2C_PROTOCOL        0
46 #define SLIMPRO_IIC_SMB_PROTOCOL        1
47
48 #define SLIMPRO_IIC_READ                0
49 #define SLIMPRO_IIC_WRITE               1
50
51 #define IIC_SMB_WITHOUT_DATA_LEN        0
52 #define IIC_SMB_WITH_DATA_LEN           1
53
54 #define SLIMPRO_DEBUG_MSG               0
55 #define SLIMPRO_MSG_TYPE_SHIFT          28
56 #define SLIMPRO_DBG_SUBTYPE_I2C1READ    4
57 #define SLIMPRO_DBGMSG_TYPE_SHIFT       24
58 #define SLIMPRO_DBGMSG_TYPE_MASK        0x0F000000U
59 #define SLIMPRO_IIC_DEV_SHIFT           23
60 #define SLIMPRO_IIC_DEV_MASK            0x00800000U
61 #define SLIMPRO_IIC_DEVID_SHIFT         13
62 #define SLIMPRO_IIC_DEVID_MASK          0x007FE000U
63 #define SLIMPRO_IIC_RW_SHIFT            12
64 #define SLIMPRO_IIC_RW_MASK             0x00001000U
65 #define SLIMPRO_IIC_PROTO_SHIFT         11
66 #define SLIMPRO_IIC_PROTO_MASK          0x00000800U
67 #define SLIMPRO_IIC_ADDRLEN_SHIFT       8
68 #define SLIMPRO_IIC_ADDRLEN_MASK        0x00000700U
69 #define SLIMPRO_IIC_DATALEN_SHIFT       0
70 #define SLIMPRO_IIC_DATALEN_MASK        0x000000FFU
71
72 /*
73  * SLIMpro I2C message encode
74  *
75  * dev          - Controller number (0-based)
76  * chip         - I2C chip address
77  * op           - SLIMPRO_IIC_READ or SLIMPRO_IIC_WRITE
78  * proto        - SLIMPRO_IIC_SMB_PROTOCOL or SLIMPRO_IIC_I2C_PROTOCOL
79  * addrlen      - Length of the address field
80  * datalen      - Length of the data field
81  */
82 #define SLIMPRO_IIC_ENCODE_MSG(dev, chip, op, proto, addrlen, datalen) \
83         ((SLIMPRO_DEBUG_MSG << SLIMPRO_MSG_TYPE_SHIFT) | \
84         ((SLIMPRO_DBG_SUBTYPE_I2C1READ << SLIMPRO_DBGMSG_TYPE_SHIFT) & \
85         SLIMPRO_DBGMSG_TYPE_MASK) | \
86         ((dev << SLIMPRO_IIC_DEV_SHIFT) & SLIMPRO_IIC_DEV_MASK) | \
87         ((chip << SLIMPRO_IIC_DEVID_SHIFT) & SLIMPRO_IIC_DEVID_MASK) | \
88         ((op << SLIMPRO_IIC_RW_SHIFT) & SLIMPRO_IIC_RW_MASK) | \
89         ((proto << SLIMPRO_IIC_PROTO_SHIFT) & SLIMPRO_IIC_PROTO_MASK) | \
90         ((addrlen << SLIMPRO_IIC_ADDRLEN_SHIFT) & SLIMPRO_IIC_ADDRLEN_MASK) | \
91         ((datalen << SLIMPRO_IIC_DATALEN_SHIFT) & SLIMPRO_IIC_DATALEN_MASK))
92
93 #define SLIMPRO_MSG_TYPE(v)             (((v) & 0xF0000000) >> 28)
94
95 /*
96  * Encode for upper address for block data
97  */
98 #define SLIMPRO_IIC_ENCODE_FLAG_BUFADDR                 0x80000000
99 #define SLIMPRO_IIC_ENCODE_FLAG_WITH_DATA_LEN(a)        ((u32) (((a) << 30) \
100                                                                 & 0x40000000))
101 #define SLIMPRO_IIC_ENCODE_UPPER_BUFADDR(a)             ((u32) (((a) >> 12) \
102                                                                 & 0x3FF00000))
103 #define SLIMPRO_IIC_ENCODE_ADDR(a)                      ((a) & 0x000FFFFF)
104
105 #define SLIMPRO_IIC_MSG_DWORD_COUNT                     3
106
107 /* PCC related defines */
108 #define PCC_SIGNATURE                   0x50424300
109 #define PCC_STS_CMD_COMPLETE            BIT(0)
110 #define PCC_STS_SCI_DOORBELL            BIT(1)
111 #define PCC_STS_ERR                     BIT(2)
112 #define PCC_STS_PLAT_NOTIFY             BIT(3)
113 #define PCC_CMD_GENERATE_DB_INT         BIT(15)
114
115 struct slimpro_i2c_dev {
116         struct i2c_adapter adapter;
117         struct device *dev;
118         struct mbox_chan *mbox_chan;
119         struct mbox_client mbox_client;
120         int mbox_idx;
121         struct completion rd_complete;
122         u8 dma_buffer[I2C_SMBUS_BLOCK_MAX + 1]; /* dma_buffer[0] is used for length */
123         u32 *resp_msg;
124         phys_addr_t comm_base_addr;
125         void *pcc_comm_addr;
126 };
127
128 #define to_slimpro_i2c_dev(cl)  \
129                 container_of(cl, struct slimpro_i2c_dev, mbox_client)
130
131 /*
132  * This function tests and clears a bitmask then returns its old value
133  */
134 static u16 xgene_word_tst_and_clr(u16 *addr, u16 mask)
135 {
136         u16 ret, val;
137
138         val = le16_to_cpu(READ_ONCE(*addr));
139         ret = val & mask;
140         val &= ~mask;
141         WRITE_ONCE(*addr, cpu_to_le16(val));
142
143         return ret;
144 }
145
146 static void slimpro_i2c_rx_cb(struct mbox_client *cl, void *mssg)
147 {
148         struct slimpro_i2c_dev *ctx = to_slimpro_i2c_dev(cl);
149
150         /*
151          * Response message format:
152          * mssg[0] is the return code of the operation
153          * mssg[1] is the first data word
154          * mssg[2] is NOT used
155          */
156         if (ctx->resp_msg)
157                 *ctx->resp_msg = ((u32 *)mssg)[1];
158
159         if (ctx->mbox_client.tx_block)
160                 complete(&ctx->rd_complete);
161 }
162
163 static void slimpro_i2c_pcc_rx_cb(struct mbox_client *cl, void *msg)
164 {
165         struct slimpro_i2c_dev *ctx = to_slimpro_i2c_dev(cl);
166         struct acpi_pcct_shared_memory *generic_comm_base = ctx->pcc_comm_addr;
167
168         /* Check if platform sends interrupt */
169         if (!xgene_word_tst_and_clr(&generic_comm_base->status,
170                                     PCC_STS_SCI_DOORBELL))
171                 return;
172
173         if (xgene_word_tst_and_clr(&generic_comm_base->status,
174                                    PCC_STS_CMD_COMPLETE)) {
175                 msg = generic_comm_base + 1;
176
177                 /* Response message msg[1] contains the return value. */
178                 if (ctx->resp_msg)
179                         *ctx->resp_msg = ((u32 *)msg)[1];
180
181                 complete(&ctx->rd_complete);
182         }
183 }
184
185 static void slimpro_i2c_pcc_tx_prepare(struct slimpro_i2c_dev *ctx, u32 *msg)
186 {
187         struct acpi_pcct_shared_memory *generic_comm_base = ctx->pcc_comm_addr;
188         u32 *ptr = (void *)(generic_comm_base + 1);
189         u16 status;
190         int i;
191
192         WRITE_ONCE(generic_comm_base->signature,
193                    cpu_to_le32(PCC_SIGNATURE | ctx->mbox_idx));
194
195         WRITE_ONCE(generic_comm_base->command,
196                    cpu_to_le16(SLIMPRO_MSG_TYPE(msg[0]) | PCC_CMD_GENERATE_DB_INT));
197
198         status = le16_to_cpu(READ_ONCE(generic_comm_base->status));
199         status &= ~PCC_STS_CMD_COMPLETE;
200         WRITE_ONCE(generic_comm_base->status, cpu_to_le16(status));
201
202         /* Copy the message to the PCC comm space */
203         for (i = 0; i < SLIMPRO_IIC_MSG_DWORD_COUNT; i++)
204                 WRITE_ONCE(ptr[i], cpu_to_le32(msg[i]));
205 }
206
207 static int start_i2c_msg_xfer(struct slimpro_i2c_dev *ctx)
208 {
209         if (ctx->mbox_client.tx_block || !acpi_disabled) {
210                 if (!wait_for_completion_timeout(&ctx->rd_complete,
211                                                  msecs_to_jiffies(MAILBOX_OP_TIMEOUT)))
212                         return -ETIMEDOUT;
213         }
214
215         /* Check of invalid data or no device */
216         if (*ctx->resp_msg == 0xffffffff)
217                 return -ENODEV;
218
219         return 0;
220 }
221
222 static int slimpro_i2c_send_msg(struct slimpro_i2c_dev *ctx,
223                                 u32 *msg,
224                                 u32 *data)
225 {
226         int rc;
227
228         ctx->resp_msg = data;
229
230         if (!acpi_disabled) {
231                 reinit_completion(&ctx->rd_complete);
232                 slimpro_i2c_pcc_tx_prepare(ctx, msg);
233         }
234
235         rc = mbox_send_message(ctx->mbox_chan, msg);
236         if (rc < 0)
237                 goto err;
238
239         rc = start_i2c_msg_xfer(ctx);
240
241 err:
242         if (!acpi_disabled)
243                 mbox_chan_txdone(ctx->mbox_chan, 0);
244
245         ctx->resp_msg = NULL;
246
247         return rc;
248 }
249
250 static int slimpro_i2c_rd(struct slimpro_i2c_dev *ctx, u32 chip,
251                           u32 addr, u32 addrlen, u32 protocol,
252                           u32 readlen, u32 *data)
253 {
254         u32 msg[3];
255
256         msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip,
257                                         SLIMPRO_IIC_READ, protocol, addrlen, readlen);
258         msg[1] = SLIMPRO_IIC_ENCODE_ADDR(addr);
259         msg[2] = 0;
260
261         return slimpro_i2c_send_msg(ctx, msg, data);
262 }
263
264 static int slimpro_i2c_wr(struct slimpro_i2c_dev *ctx, u32 chip,
265                           u32 addr, u32 addrlen, u32 protocol, u32 writelen,
266                           u32 data)
267 {
268         u32 msg[3];
269
270         msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip,
271                                         SLIMPRO_IIC_WRITE, protocol, addrlen, writelen);
272         msg[1] = SLIMPRO_IIC_ENCODE_ADDR(addr);
273         msg[2] = data;
274
275         return slimpro_i2c_send_msg(ctx, msg, msg);
276 }
277
278 static int slimpro_i2c_blkrd(struct slimpro_i2c_dev *ctx, u32 chip, u32 addr,
279                              u32 addrlen, u32 protocol, u32 readlen,
280                              u32 with_data_len, void *data)
281 {
282         dma_addr_t paddr;
283         u32 msg[3];
284         int rc;
285
286         paddr = dma_map_single(ctx->dev, ctx->dma_buffer, readlen, DMA_FROM_DEVICE);
287         if (dma_mapping_error(ctx->dev, paddr)) {
288                 dev_err(&ctx->adapter.dev, "Error in mapping dma buffer %p\n",
289                         ctx->dma_buffer);
290                 return -ENOMEM;
291         }
292
293         msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip, SLIMPRO_IIC_READ,
294                                         protocol, addrlen, readlen);
295         msg[1] = SLIMPRO_IIC_ENCODE_FLAG_BUFADDR |
296                  SLIMPRO_IIC_ENCODE_FLAG_WITH_DATA_LEN(with_data_len) |
297                  SLIMPRO_IIC_ENCODE_UPPER_BUFADDR(paddr) |
298                  SLIMPRO_IIC_ENCODE_ADDR(addr);
299         msg[2] = (u32)paddr;
300
301         rc = slimpro_i2c_send_msg(ctx, msg, msg);
302
303         /* Copy to destination */
304         memcpy(data, ctx->dma_buffer, readlen);
305
306         dma_unmap_single(ctx->dev, paddr, readlen, DMA_FROM_DEVICE);
307         return rc;
308 }
309
310 static int slimpro_i2c_blkwr(struct slimpro_i2c_dev *ctx, u32 chip,
311                              u32 addr, u32 addrlen, u32 protocol, u32 writelen,
312                              void *data)
313 {
314         dma_addr_t paddr;
315         u32 msg[3];
316         int rc;
317
318         memcpy(ctx->dma_buffer, data, writelen);
319         paddr = dma_map_single(ctx->dev, ctx->dma_buffer, writelen,
320                                DMA_TO_DEVICE);
321         if (dma_mapping_error(ctx->dev, paddr)) {
322                 dev_err(&ctx->adapter.dev, "Error in mapping dma buffer %p\n",
323                         ctx->dma_buffer);
324                 return -ENOMEM;
325         }
326
327         msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip, SLIMPRO_IIC_WRITE,
328                                         protocol, addrlen, writelen);
329         msg[1] = SLIMPRO_IIC_ENCODE_FLAG_BUFADDR |
330                  SLIMPRO_IIC_ENCODE_UPPER_BUFADDR(paddr) |
331                  SLIMPRO_IIC_ENCODE_ADDR(addr);
332         msg[2] = (u32)paddr;
333
334         if (ctx->mbox_client.tx_block)
335                 reinit_completion(&ctx->rd_complete);
336
337         rc = slimpro_i2c_send_msg(ctx, msg, msg);
338
339         dma_unmap_single(ctx->dev, paddr, writelen, DMA_TO_DEVICE);
340         return rc;
341 }
342
343 static int xgene_slimpro_i2c_xfer(struct i2c_adapter *adap, u16 addr,
344                                   unsigned short flags, char read_write,
345                                   u8 command, int size,
346                                   union i2c_smbus_data *data)
347 {
348         struct slimpro_i2c_dev *ctx = i2c_get_adapdata(adap);
349         int ret = -EOPNOTSUPP;
350         u32 val;
351
352         switch (size) {
353         case I2C_SMBUS_BYTE:
354                 if (read_write == I2C_SMBUS_READ) {
355                         ret = slimpro_i2c_rd(ctx, addr, 0, 0,
356                                              SLIMPRO_IIC_SMB_PROTOCOL,
357                                              BYTE_DATA, &val);
358                         data->byte = val;
359                 } else {
360                         ret = slimpro_i2c_wr(ctx, addr, command, SMBUS_CMD_LEN,
361                                              SLIMPRO_IIC_SMB_PROTOCOL,
362                                              0, 0);
363                 }
364                 break;
365         case I2C_SMBUS_BYTE_DATA:
366                 if (read_write == I2C_SMBUS_READ) {
367                         ret = slimpro_i2c_rd(ctx, addr, command, SMBUS_CMD_LEN,
368                                              SLIMPRO_IIC_SMB_PROTOCOL,
369                                              BYTE_DATA, &val);
370                         data->byte = val;
371                 } else {
372                         val = data->byte;
373                         ret = slimpro_i2c_wr(ctx, addr, command, SMBUS_CMD_LEN,
374                                              SLIMPRO_IIC_SMB_PROTOCOL,
375                                              BYTE_DATA, val);
376                 }
377                 break;
378         case I2C_SMBUS_WORD_DATA:
379                 if (read_write == I2C_SMBUS_READ) {
380                         ret = slimpro_i2c_rd(ctx, addr, command, SMBUS_CMD_LEN,
381                                              SLIMPRO_IIC_SMB_PROTOCOL,
382                                              WORD_DATA, &val);
383                         data->word = val;
384                 } else {
385                         val = data->word;
386                         ret = slimpro_i2c_wr(ctx, addr, command, SMBUS_CMD_LEN,
387                                              SLIMPRO_IIC_SMB_PROTOCOL,
388                                              WORD_DATA, val);
389                 }
390                 break;
391         case I2C_SMBUS_BLOCK_DATA:
392                 if (read_write == I2C_SMBUS_READ) {
393                         ret = slimpro_i2c_blkrd(ctx, addr, command,
394                                                 SMBUS_CMD_LEN,
395                                                 SLIMPRO_IIC_SMB_PROTOCOL,
396                                                 I2C_SMBUS_BLOCK_MAX + 1,
397                                                 IIC_SMB_WITH_DATA_LEN,
398                                                 &data->block[0]);
399
400                 } else {
401                         ret = slimpro_i2c_blkwr(ctx, addr, command,
402                                                 SMBUS_CMD_LEN,
403                                                 SLIMPRO_IIC_SMB_PROTOCOL,
404                                                 data->block[0] + 1,
405                                                 &data->block[0]);
406                 }
407                 break;
408         case I2C_SMBUS_I2C_BLOCK_DATA:
409                 if (read_write == I2C_SMBUS_READ) {
410                         ret = slimpro_i2c_blkrd(ctx, addr,
411                                                 command,
412                                                 SMBUS_CMD_LEN,
413                                                 SLIMPRO_IIC_I2C_PROTOCOL,
414                                                 I2C_SMBUS_BLOCK_MAX,
415                                                 IIC_SMB_WITHOUT_DATA_LEN,
416                                                 &data->block[1]);
417                 } else {
418                         ret = slimpro_i2c_blkwr(ctx, addr, command,
419                                                 SMBUS_CMD_LEN,
420                                                 SLIMPRO_IIC_I2C_PROTOCOL,
421                                                 data->block[0],
422                                                 &data->block[1]);
423                 }
424                 break;
425         default:
426                 break;
427         }
428         return ret;
429 }
430
431 /*
432 * Return list of supported functionality.
433 */
434 static u32 xgene_slimpro_i2c_func(struct i2c_adapter *adapter)
435 {
436         return I2C_FUNC_SMBUS_BYTE |
437                 I2C_FUNC_SMBUS_BYTE_DATA |
438                 I2C_FUNC_SMBUS_WORD_DATA |
439                 I2C_FUNC_SMBUS_BLOCK_DATA |
440                 I2C_FUNC_SMBUS_I2C_BLOCK;
441 }
442
443 static const struct i2c_algorithm xgene_slimpro_i2c_algorithm = {
444         .smbus_xfer = xgene_slimpro_i2c_xfer,
445         .functionality = xgene_slimpro_i2c_func,
446 };
447
448 static int xgene_slimpro_i2c_probe(struct platform_device *pdev)
449 {
450         struct slimpro_i2c_dev *ctx;
451         struct i2c_adapter *adapter;
452         struct mbox_client *cl;
453         int rc;
454
455         ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL);
456         if (!ctx)
457                 return -ENOMEM;
458
459         ctx->dev = &pdev->dev;
460         platform_set_drvdata(pdev, ctx);
461         cl = &ctx->mbox_client;
462
463         /* Request mailbox channel */
464         cl->dev = &pdev->dev;
465         init_completion(&ctx->rd_complete);
466         cl->tx_tout = MAILBOX_OP_TIMEOUT;
467         cl->knows_txdone = false;
468         if (acpi_disabled) {
469                 cl->tx_block = true;
470                 cl->rx_callback = slimpro_i2c_rx_cb;
471                 ctx->mbox_chan = mbox_request_channel(cl, MAILBOX_I2C_INDEX);
472                 if (IS_ERR(ctx->mbox_chan)) {
473                         dev_err(&pdev->dev, "i2c mailbox channel request failed\n");
474                         return PTR_ERR(ctx->mbox_chan);
475                 }
476         } else {
477                 struct acpi_pcct_hw_reduced *cppc_ss;
478
479                 if (device_property_read_u32(&pdev->dev, "pcc-channel",
480                                              &ctx->mbox_idx))
481                         ctx->mbox_idx = MAILBOX_I2C_INDEX;
482
483                 cl->tx_block = false;
484                 cl->rx_callback = slimpro_i2c_pcc_rx_cb;
485                 ctx->mbox_chan = pcc_mbox_request_channel(cl, ctx->mbox_idx);
486                 if (IS_ERR(ctx->mbox_chan)) {
487                         dev_err(&pdev->dev, "PCC mailbox channel request failed\n");
488                         return PTR_ERR(ctx->mbox_chan);
489                 }
490
491                 /*
492                  * The PCC mailbox controller driver should
493                  * have parsed the PCCT (global table of all
494                  * PCC channels) and stored pointers to the
495                  * subspace communication region in con_priv.
496                  */
497                 cppc_ss = ctx->mbox_chan->con_priv;
498                 if (!cppc_ss) {
499                         dev_err(&pdev->dev, "PPC subspace not found\n");
500                         rc = -ENOENT;
501                         goto mbox_err;
502                 }
503
504                 if (!ctx->mbox_chan->mbox->txdone_irq) {
505                         dev_err(&pdev->dev, "PCC IRQ not supported\n");
506                         rc = -ENOENT;
507                         goto mbox_err;
508                 }
509
510                 /*
511                  * This is the shared communication region
512                  * for the OS and Platform to communicate over.
513                  */
514                 ctx->comm_base_addr = cppc_ss->base_address;
515                 if (ctx->comm_base_addr) {
516                         ctx->pcc_comm_addr = memremap(ctx->comm_base_addr,
517                                                       cppc_ss->length,
518                                                       MEMREMAP_WB);
519                 } else {
520                         dev_err(&pdev->dev, "Failed to get PCC comm region\n");
521                         rc = -ENOENT;
522                         goto mbox_err;
523                 }
524
525                 if (!ctx->pcc_comm_addr) {
526                         dev_err(&pdev->dev,
527                                 "Failed to ioremap PCC comm region\n");
528                         rc = -ENOMEM;
529                         goto mbox_err;
530                 }
531         }
532         rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
533         if (rc)
534                 dev_warn(&pdev->dev, "Unable to set dma mask\n");
535
536         /* Setup I2C adapter */
537         adapter = &ctx->adapter;
538         snprintf(adapter->name, sizeof(adapter->name), "MAILBOX I2C");
539         adapter->algo = &xgene_slimpro_i2c_algorithm;
540         adapter->class = I2C_CLASS_HWMON;
541         adapter->dev.parent = &pdev->dev;
542         adapter->dev.of_node = pdev->dev.of_node;
543         ACPI_COMPANION_SET(&adapter->dev, ACPI_COMPANION(&pdev->dev));
544         i2c_set_adapdata(adapter, ctx);
545         rc = i2c_add_adapter(adapter);
546         if (rc)
547                 goto mbox_err;
548
549         dev_info(&pdev->dev, "Mailbox I2C Adapter registered\n");
550         return 0;
551
552 mbox_err:
553         if (acpi_disabled)
554                 mbox_free_channel(ctx->mbox_chan);
555         else
556                 pcc_mbox_free_channel(ctx->mbox_chan);
557
558         return rc;
559 }
560
561 static int xgene_slimpro_i2c_remove(struct platform_device *pdev)
562 {
563         struct slimpro_i2c_dev *ctx = platform_get_drvdata(pdev);
564
565         i2c_del_adapter(&ctx->adapter);
566
567         if (acpi_disabled)
568                 mbox_free_channel(ctx->mbox_chan);
569         else
570                 pcc_mbox_free_channel(ctx->mbox_chan);
571
572         return 0;
573 }
574
575 static const struct of_device_id xgene_slimpro_i2c_dt_ids[] = {
576         {.compatible = "apm,xgene-slimpro-i2c" },
577         {},
578 };
579 MODULE_DEVICE_TABLE(of, xgene_slimpro_i2c_dt_ids);
580
581 #ifdef CONFIG_ACPI
582 static const struct acpi_device_id xgene_slimpro_i2c_acpi_ids[] = {
583         {"APMC0D40", 0},
584         {}
585 };
586 MODULE_DEVICE_TABLE(acpi, xgene_slimpro_i2c_acpi_ids);
587 #endif
588
589 static struct platform_driver xgene_slimpro_i2c_driver = {
590         .probe  = xgene_slimpro_i2c_probe,
591         .remove = xgene_slimpro_i2c_remove,
592         .driver = {
593                 .name   = "xgene-slimpro-i2c",
594                 .of_match_table = of_match_ptr(xgene_slimpro_i2c_dt_ids),
595                 .acpi_match_table = ACPI_PTR(xgene_slimpro_i2c_acpi_ids)
596         },
597 };
598
599 module_platform_driver(xgene_slimpro_i2c_driver);
600
601 MODULE_DESCRIPTION("APM X-Gene SLIMpro I2C driver");
602 MODULE_AUTHOR("Feng Kan <fkan@apm.com>");
603 MODULE_AUTHOR("Hieu Le <hnle@apm.com>");
604 MODULE_LICENSE("GPL");