drivers/hwmon/w83781d.c

   1 /*
   2     w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
   3                 monitoring
   4     Copyright (c) 1998 - 2001  Frodo Looijaard <frodol@dds.nl>,
   5     Philip Edelbrock <phil@netroedge.com>,
   6     and Mark Studebaker <mdsxyz123@yahoo.com>
   7
   8     This program is free software; you can redistribute it and/or modify
   9     it under the terms of the GNU General Public License as published by
  10     the Free Software Foundation; either version 2 of the License, or
  11     (at your option) any later version.
  12
  13     This program is distributed in the hope that it will be useful,
  14     but WITHOUT ANY WARRANTY; without even the implied warranty of
  15     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16     GNU General Public License for more details.
  17
  18     You should have received a copy of the GNU General Public License
  19     along with this program; if not, write to the Free Software
  20     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21 */
  22
  23 /*
  24     Supports following chips:
  25
  26     Chip        #vin    #fanin  #pwm    #temp   wchipid vendid  i2c     ISA
  27     as99127f    7       3       0       3       0x31    0x12c3  yes     no
  28     as99127f rev.2 (type_name = as99127f)       0x31    0x5ca3  yes     no
  29     w83781d     7       3       0       3       0x10-1  0x5ca3  yes     yes
  30     w83627hf    9       3       2       3       0x21    0x5ca3  yes     yes(LPC)
  31     w83782d     9       3       2-4     3       0x30    0x5ca3  yes     yes
  32     w83783s     5-6     3       2       1-2     0x40    0x5ca3  yes     no
  33
  34 */
  35
  36 #include <linux/module.h>
  37 #include <linux/init.h>
  38 #include <linux/slab.h>
  39 #include <linux/jiffies.h>
  40 #include <linux/i2c.h>
  41 #include <linux/i2c-isa.h>
  42 #include <linux/hwmon.h>
  43 #include <linux/hwmon-vid.h>
  44 #include <linux/err.h>
  45 #include <asm/io.h>
  46 #include "lm75.h"
  47
  48 /* Addresses to scan */
  49 static unsigned short normal_i2c[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25,
  50                                         0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b,
  51                                         0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END };
  52 static unsigned short isa_address = 0x290;
  53
  54 /* Insmod parameters */
  55 I2C_CLIENT_INSMOD_5(w83781d, w83782d, w83783s, w83627hf, as99127f);
  56 I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: "
  57                     "{bus, clientaddr, subclientaddr1, subclientaddr2}");
  58
  59 static int init = 1;
  60 module_param(init, bool, 0);
  61 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
  62
  63 /* Constants specified below */
  64
  65 /* Length of ISA address segment */
  66 #define W83781D_EXTENT                  8
  67
  68 /* Where are the ISA address/data registers relative to the base address */
  69 #define W83781D_ADDR_REG_OFFSET         5
  70 #define W83781D_DATA_REG_OFFSET         6
  71
  72 /* The W83781D registers */
  73 /* The W83782D registers for nr=7,8 are in bank 5 */
  74 #define W83781D_REG_IN_MAX(nr)          ((nr < 7) ? (0x2b + (nr) * 2) : \
  75                                                     (0x554 + (((nr) - 7) * 2)))
  76 #define W83781D_REG_IN_MIN(nr)          ((nr < 7) ? (0x2c + (nr) * 2) : \
  77                                                     (0x555 + (((nr) - 7) * 2)))
  78 #define W83781D_REG_IN(nr)              ((nr < 7) ? (0x20 + (nr)) : \
  79                                                     (0x550 + (nr) - 7))
  80
  81 #define W83781D_REG_FAN_MIN(nr)         (0x3a + (nr))
  82 #define W83781D_REG_FAN(nr)             (0x27 + (nr))
  83
  84 #define W83781D_REG_BANK                0x4E
  85 #define W83781D_REG_TEMP2_CONFIG        0x152
  86 #define W83781D_REG_TEMP3_CONFIG        0x252
  87 #define W83781D_REG_TEMP(nr)            ((nr == 3) ? (0x0250) : \
  88                                         ((nr == 2) ? (0x0150) : \
  89                                                      (0x27)))
  90 #define W83781D_REG_TEMP_HYST(nr)       ((nr == 3) ? (0x253) : \
  91                                         ((nr == 2) ? (0x153) : \
  92                                                      (0x3A)))
  93 #define W83781D_REG_TEMP_OVER(nr)       ((nr == 3) ? (0x255) : \
  94                                         ((nr == 2) ? (0x155) : \
  95                                                      (0x39)))
  96
  97 #define W83781D_REG_CONFIG              0x40
  98
  99 /* Interrupt status (W83781D, AS99127F) */
 100 #define W83781D_REG_ALARM1              0x41
 101 #define W83781D_REG_ALARM2              0x42
 102
 103 /* Real-time status (W83782D, W83783S, W83627HF) */
 104 #define W83782D_REG_ALARM1              0x459
 105 #define W83782D_REG_ALARM2              0x45A
 106 #define W83782D_REG_ALARM3              0x45B
 107
 108 #define W83781D_REG_BEEP_CONFIG         0x4D
 109 #define W83781D_REG_BEEP_INTS1          0x56
 110 #define W83781D_REG_BEEP_INTS2          0x57
 111 #define W83781D_REG_BEEP_INTS3          0x453   /* not on W83781D */
 112
 113 #define W83781D_REG_VID_FANDIV          0x47
 114
 115 #define W83781D_REG_CHIPID              0x49
 116 #define W83781D_REG_WCHIPID             0x58
 117 #define W83781D_REG_CHIPMAN             0x4F
 118 #define W83781D_REG_PIN                 0x4B
 119
 120 /* 782D/783S only */
 121 #define W83781D_REG_VBAT                0x5D
 122
 123 /* PWM 782D (1-4) and 783S (1-2) only */
 124 #define W83781D_REG_PWM1                0x5B    /* 782d and 783s/627hf datasheets disagree */
 125                                                 /* on which is which; */
 126 #define W83781D_REG_PWM2                0x5A    /* We follow the 782d convention here, */
 127                                                 /* However 782d is probably wrong. */
 128 #define W83781D_REG_PWM3                0x5E
 129 #define W83781D_REG_PWM4                0x5F
 130 #define W83781D_REG_PWMCLK12            0x5C
 131 #define W83781D_REG_PWMCLK34            0x45C
 132 static const u8 regpwm[] = { W83781D_REG_PWM1, W83781D_REG_PWM2,
 133         W83781D_REG_PWM3, W83781D_REG_PWM4
 134 };
 135
 136 #define W83781D_REG_PWM(nr)             (regpwm[(nr) - 1])
 137
 138 #define W83781D_REG_I2C_ADDR            0x48
 139 #define W83781D_REG_I2C_SUBADDR         0x4A
 140
 141 /* The following are undocumented in the data sheets however we
 142    received the information in an email from Winbond tech support */
 143 /* Sensor selection - not on 781d */
 144 #define W83781D_REG_SCFG1               0x5D
 145 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
 146
 147 #define W83781D_REG_SCFG2               0x59
 148 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
 149
 150 #define W83781D_DEFAULT_BETA            3435
 151
 152 /* RT Table registers */
 153 #define W83781D_REG_RT_IDX              0x50
 154 #define W83781D_REG_RT_VAL              0x51
 155
 156 /* Conversions. Rounding and limit checking is only done on the TO_REG
 157    variants. Note that you should be a bit careful with which arguments
 158    these macros are called: arguments may be evaluated more than once.
 159    Fixing this is just not worth it. */
 160 #define IN_TO_REG(val)                  (SENSORS_LIMIT((((val) * 10 + 8)/16),0,255))
 161 #define IN_FROM_REG(val)                (((val) * 16) / 10)
 162
 163 static inline u8
 164 FAN_TO_REG(long rpm, int div)
 165 {
 166         if (rpm == 0)
 167                 return 255;
 168         rpm = SENSORS_LIMIT(rpm, 1, 1000000);
 169         return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
 170 }
 171
 172 #define FAN_FROM_REG(val,div)           ((val) == 0   ? -1 : \
 173                                         ((val) == 255 ? 0 : \
 174                                                         1350000 / ((val) * (div))))
 175
 176 #define TEMP_TO_REG(val)                (SENSORS_LIMIT(((val) < 0 ? (val)+0x100*1000 \
 177                                                 : (val)) / 1000, 0, 0xff))
 178 #define TEMP_FROM_REG(val)              (((val) & 0x80 ? (val)-0x100 : (val)) * 1000)
 179
 180 #define PWM_FROM_REG(val)               (val)
 181 #define PWM_TO_REG(val)                 (SENSORS_LIMIT((val),0,255))
 182 #define BEEP_MASK_FROM_REG(val,type)    ((type) == as99127f ? \
 183                                          (val) ^ 0x7fff : (val))
 184 #define BEEP_MASK_TO_REG(val,type)      ((type) == as99127f ? \
 185                                          (~(val)) & 0x7fff : (val) & 0xffffff)
 186
 187 #define BEEP_ENABLE_TO_REG(val)         ((val) ? 1 : 0)
 188 #define BEEP_ENABLE_FROM_REG(val)       ((val) ? 1 : 0)
 189
 190 #define DIV_FROM_REG(val)               (1 << (val))
 191
 192 static inline u8
 193 DIV_TO_REG(long val, enum chips type)
 194 {
 195         int i;
 196         val = SENSORS_LIMIT(val, 1,
 197                             ((type == w83781d
 198                               || type == as99127f) ? 8 : 128)) >> 1;
 199         for (i = 0; i < 7; i++) {
 200                 if (val == 0)
 201                         break;
 202                 val >>= 1;
 203         }
 204         return ((u8) i);
 205 }
 206
 207 /* There are some complications in a module like this. First off, W83781D chips
 208    may be both present on the SMBus and the ISA bus, and we have to handle
 209    those cases separately at some places. Second, there might be several
 210    W83781D chips available (well, actually, that is probably never done; but
 211    it is a clean illustration of how to handle a case like that). Finally,
 212    a specific chip may be attached to *both* ISA and SMBus, and we would
 213    not like to detect it double. Fortunately, in the case of the W83781D at
 214    least, a register tells us what SMBus address we are on, so that helps
 215    a bit - except if there could be more than one SMBus. Groan. No solution
 216    for this yet. */
 217
 218 /* This module may seem overly long and complicated. In fact, it is not so
 219    bad. Quite a lot of bookkeeping is done. A real driver can often cut
 220    some corners. */
 221
 222 /* For each registered W83781D, we need to keep some data in memory. That
 223    data is pointed to by w83781d_list[NR]->data. The structure itself is
 224    dynamically allocated, at the same time when a new w83781d client is
 225    allocated. */
 226 struct w83781d_data {
 227         struct i2c_client client;
 228         struct class_device *class_dev;
 229         struct semaphore lock;
 230         enum chips type;
 231
 232         struct semaphore update_lock;
 233         char valid;             /* !=0 if following fields are valid */
 234         unsigned long last_updated;     /* In jiffies */
 235
 236         struct i2c_client *lm75[2];     /* for secondary I2C addresses */
 237         /* array of 2 pointers to subclients */
 238
 239         u8 in[9];               /* Register value - 8 & 9 for 782D only */
 240         u8 in_max[9];           /* Register value - 8 & 9 for 782D only */
 241         u8 in_min[9];           /* Register value - 8 & 9 for 782D only */
 242         u8 fan[3];              /* Register value */
 243         u8 fan_min[3];          /* Register value */
 244         u8 temp;
 245         u8 temp_max;            /* Register value */
 246         u8 temp_max_hyst;       /* Register value */
 247         u16 temp_add[2];        /* Register value */
 248         u16 temp_max_add[2];    /* Register value */
 249         u16 temp_max_hyst_add[2];       /* Register value */
 250         u8 fan_div[3];          /* Register encoding, shifted right */
 251         u8 vid;                 /* Register encoding, combined */
 252         u32 alarms;             /* Register encoding, combined */
 253         u32 beep_mask;          /* Register encoding, combined */
 254         u8 beep_enable;         /* Boolean */
 255         u8 pwm[4];              /* Register value */
 256         u8 pwmenable[4];        /* Boolean */
 257         u16 sens[3];            /* 782D/783S only.
 258                                    1 = pentium diode; 2 = 3904 diode;
 259                                    3000-5000 = thermistor beta.
 260                                    Default = 3435.
 261                                    Other Betas unimplemented */
 262         u8 vrm;
 263 };
 264
 265 static int w83781d_attach_adapter(struct i2c_adapter *adapter);
 266 static int w83781d_isa_attach_adapter(struct i2c_adapter *adapter);
 267 static int w83781d_detect(struct i2c_adapter *adapter, int address, int kind);
 268 static int w83781d_detach_client(struct i2c_client *client);
 269
 270 static int w83781d_read_value(struct i2c_client *client, u16 register);
 271 static int w83781d_write_value(struct i2c_client *client, u16 register,
 272                                u16 value);
 273 static struct w83781d_data *w83781d_update_device(struct device *dev);
 274 static void w83781d_init_client(struct i2c_client *client);
 275
 276 static struct i2c_driver w83781d_driver = {
 277         .driver = {
 278                 .name = "w83781d",
 279         },
 280         .id = I2C_DRIVERID_W83781D,
 281         .attach_adapter = w83781d_attach_adapter,
 282         .detach_client = w83781d_detach_client,
 283 };
 284
 285 static struct i2c_driver w83781d_isa_driver = {
 286         .driver = {
 287                 .name = "w83781d-isa",
 288         },
 289         .attach_adapter = w83781d_isa_attach_adapter,
 290         .detach_client = w83781d_detach_client,
 291 };
 292
 293
 294 /* following are the sysfs callback functions */
 295 #define show_in_reg(reg) \
 296 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
 297 { \
 298         struct w83781d_data *data = w83781d_update_device(dev); \
 299         return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr] * 10)); \
 300 }
 301 show_in_reg(in);
 302 show_in_reg(in_min);
 303 show_in_reg(in_max);
 304
 305 #define store_in_reg(REG, reg) \
 306 static ssize_t store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \
 307 { \
 308         struct i2c_client *client = to_i2c_client(dev); \
 309         struct w83781d_data *data = i2c_get_clientdata(client); \
 310         u32 val; \
 311          \
 312         val = simple_strtoul(buf, NULL, 10) / 10; \
 313          \
 314         down(&data->update_lock); \
 315         data->in_##reg[nr] = IN_TO_REG(val); \
 316         w83781d_write_value(client, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \
 317          \
 318         up(&data->update_lock); \
 319         return count; \
 320 }
 321 store_in_reg(MIN, min);
 322 store_in_reg(MAX, max);
 323
 324 #define sysfs_in_offset(offset) \
 325 static ssize_t \
 326 show_regs_in_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 327 { \
 328         return show_in(dev, buf, offset); \
 329 } \
 330 static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL);
 331
 332 #define sysfs_in_reg_offset(reg, offset) \
 333 static ssize_t show_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 334 { \
 335         return show_in_##reg (dev, buf, offset); \
 336 } \
 337 static ssize_t store_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 338 { \
 339         return store_in_##reg (dev, buf, count, offset); \
 340 } \
 341 static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_in_##reg##offset, store_regs_in_##reg##offset);
 342
 343 #define sysfs_in_offsets(offset) \
 344 sysfs_in_offset(offset); \
 345 sysfs_in_reg_offset(min, offset); \
 346 sysfs_in_reg_offset(max, offset);
 347
 348 sysfs_in_offsets(0);
 349 sysfs_in_offsets(1);
 350 sysfs_in_offsets(2);
 351 sysfs_in_offsets(3);
 352 sysfs_in_offsets(4);
 353 sysfs_in_offsets(5);
 354 sysfs_in_offsets(6);
 355 sysfs_in_offsets(7);
 356 sysfs_in_offsets(8);
 357
 358 #define device_create_file_in(client, offset) \
 359 do { \
 360 device_create_file(&client->dev, &dev_attr_in##offset##_input); \
 361 device_create_file(&client->dev, &dev_attr_in##offset##_min); \
 362 device_create_file(&client->dev, &dev_attr_in##offset##_max); \
 363 } while (0)
 364
 365 #define show_fan_reg(reg) \
 366 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
 367 { \
 368         struct w83781d_data *data = w83781d_update_device(dev); \
 369         return sprintf(buf,"%ld\n", \
 370                 FAN_FROM_REG(data->reg[nr-1], (long)DIV_FROM_REG(data->fan_div[nr-1]))); \
 371 }
 372 show_fan_reg(fan);
 373 show_fan_reg(fan_min);
 374
 375 static ssize_t
 376 store_fan_min(struct device *dev, const char *buf, size_t count, int nr)
 377 {
 378         struct i2c_client *client = to_i2c_client(dev);
 379         struct w83781d_data *data = i2c_get_clientdata(client);
 380         u32 val;
 381
 382         val = simple_strtoul(buf, NULL, 10);
 383
 384         down(&data->update_lock);
 385         data->fan_min[nr - 1] =
 386             FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1]));
 387         w83781d_write_value(client, W83781D_REG_FAN_MIN(nr),
 388                             data->fan_min[nr - 1]);
 389
 390         up(&data->update_lock);
 391         return count;
 392 }
 393
 394 #define sysfs_fan_offset(offset) \
 395 static ssize_t show_regs_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 396 { \
 397         return show_fan(dev, buf, offset); \
 398 } \
 399 static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL);
 400
 401 #define sysfs_fan_min_offset(offset) \
 402 static ssize_t show_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 403 { \
 404         return show_fan_min(dev, buf, offset); \
 405 } \
 406 static ssize_t store_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 407 { \
 408         return store_fan_min(dev, buf, count, offset); \
 409 } \
 410 static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, show_regs_fan_min##offset, store_regs_fan_min##offset);
 411
 412 sysfs_fan_offset(1);
 413 sysfs_fan_min_offset(1);
 414 sysfs_fan_offset(2);
 415 sysfs_fan_min_offset(2);
 416 sysfs_fan_offset(3);
 417 sysfs_fan_min_offset(3);
 418
 419 #define device_create_file_fan(client, offset) \
 420 do { \
 421 device_create_file(&client->dev, &dev_attr_fan##offset##_input); \
 422 device_create_file(&client->dev, &dev_attr_fan##offset##_min); \
 423 } while (0)
 424
 425 #define show_temp_reg(reg) \
 426 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
 427 { \
 428         struct w83781d_data *data = w83781d_update_device(dev); \
 429         if (nr >= 2) {  /* TEMP2 and TEMP3 */ \
 430                 return sprintf(buf,"%d\n", \
 431                         LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
 432         } else {        /* TEMP1 */ \
 433                 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
 434         } \
 435 }
 436 show_temp_reg(temp);
 437 show_temp_reg(temp_max);
 438 show_temp_reg(temp_max_hyst);
 439
 440 #define store_temp_reg(REG, reg) \
 441 static ssize_t store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \
 442 { \
 443         struct i2c_client *client = to_i2c_client(dev); \
 444         struct w83781d_data *data = i2c_get_clientdata(client); \
 445         s32 val; \
 446          \
 447         val = simple_strtol(buf, NULL, 10); \
 448          \
 449         down(&data->update_lock); \
 450          \
 451         if (nr >= 2) {  /* TEMP2 and TEMP3 */ \
 452                 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
 453                 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \
 454                                 data->temp_##reg##_add[nr-2]); \
 455         } else {        /* TEMP1 */ \
 456                 data->temp_##reg = TEMP_TO_REG(val); \
 457                 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \
 458                         data->temp_##reg); \
 459         } \
 460          \
 461         up(&data->update_lock); \
 462         return count; \
 463 }
 464 store_temp_reg(OVER, max);
 465 store_temp_reg(HYST, max_hyst);
 466
 467 #define sysfs_temp_offset(offset) \
 468 static ssize_t \
 469 show_regs_temp_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 470 { \
 471         return show_temp(dev, buf, offset); \
 472 } \
 473 static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL);
 474
 475 #define sysfs_temp_reg_offset(reg, offset) \
 476 static ssize_t show_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 477 { \
 478         return show_temp_##reg (dev, buf, offset); \
 479 } \
 480 static ssize_t store_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 481 { \
 482         return store_temp_##reg (dev, buf, count, offset); \
 483 } \
 484 static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_temp_##reg##offset, store_regs_temp_##reg##offset);
 485
 486 #define sysfs_temp_offsets(offset) \
 487 sysfs_temp_offset(offset); \
 488 sysfs_temp_reg_offset(max, offset); \
 489 sysfs_temp_reg_offset(max_hyst, offset);
 490
 491 sysfs_temp_offsets(1);
 492 sysfs_temp_offsets(2);
 493 sysfs_temp_offsets(3);
 494
 495 #define device_create_file_temp(client, offset) \
 496 do { \
 497 device_create_file(&client->dev, &dev_attr_temp##offset##_input); \
 498 device_create_file(&client->dev, &dev_attr_temp##offset##_max); \
 499 device_create_file(&client->dev, &dev_attr_temp##offset##_max_hyst); \
 500 } while (0)
 501
 502 static ssize_t
 503 show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
 504 {
 505         struct w83781d_data *data = w83781d_update_device(dev);
 506         return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
 507 }
 508
 509 static
 510 DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
 511 #define device_create_file_vid(client) \
 512 device_create_file(&client->dev, &dev_attr_cpu0_vid);
 513 static ssize_t
 514 show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
 515 {
 516         struct w83781d_data *data = w83781d_update_device(dev);
 517         return sprintf(buf, "%ld\n", (long) data->vrm);
 518 }
 519
 520 static ssize_t
 521 store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
 522 {
 523         struct i2c_client *client = to_i2c_client(dev);
 524         struct w83781d_data *data = i2c_get_clientdata(client);
 525         u32 val;
 526
 527         val = simple_strtoul(buf, NULL, 10);
 528         data->vrm = val;
 529
 530         return count;
 531 }
 532
 533 static
 534 DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
 535 #define device_create_file_vrm(client) \
 536 device_create_file(&client->dev, &dev_attr_vrm);
 537 static ssize_t
 538 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
 539 {
 540         struct w83781d_data *data = w83781d_update_device(dev);
 541         return sprintf(buf, "%u\n", data->alarms);
 542 }
 543
 544 static
 545 DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
 546 #define device_create_file_alarms(client) \
 547 device_create_file(&client->dev, &dev_attr_alarms);
 548 static ssize_t show_beep_mask (struct device *dev, struct device_attribute *attr, char *buf)
 549 {
 550         struct w83781d_data *data = w83781d_update_device(dev);
 551         return sprintf(buf, "%ld\n",
 552                        (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
 553 }
 554 static ssize_t show_beep_enable (struct device *dev, struct device_attribute *attr, char *buf)
 555 {
 556         struct w83781d_data *data = w83781d_update_device(dev);
 557         return sprintf(buf, "%ld\n",
 558                        (long)BEEP_ENABLE_FROM_REG(data->beep_enable));
 559 }
 560
 561 #define BEEP_ENABLE                     0       /* Store beep_enable */
 562 #define BEEP_MASK                       1       /* Store beep_mask */
 563
 564 static ssize_t
 565 store_beep_reg(struct device *dev, const char *buf, size_t count,
 566                int update_mask)
 567 {
 568         struct i2c_client *client = to_i2c_client(dev);
 569         struct w83781d_data *data = i2c_get_clientdata(client);
 570         u32 val, val2;
 571
 572         val = simple_strtoul(buf, NULL, 10);
 573
 574         down(&data->update_lock);
 575
 576         if (update_mask == BEEP_MASK) { /* We are storing beep_mask */
 577                 data->beep_mask = BEEP_MASK_TO_REG(val, data->type);
 578                 w83781d_write_value(client, W83781D_REG_BEEP_INTS1,
 579                                     data->beep_mask & 0xff);
 580
 581                 if ((data->type != w83781d) && (data->type != as99127f)) {
 582                         w83781d_write_value(client, W83781D_REG_BEEP_INTS3,
 583                                             ((data->beep_mask) >> 16) & 0xff);
 584                 }
 585
 586                 val2 = (data->beep_mask >> 8) & 0x7f;
 587         } else {                /* We are storing beep_enable */
 588                 val2 = w83781d_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f;
 589                 data->beep_enable = BEEP_ENABLE_TO_REG(val);
 590         }
 591
 592         w83781d_write_value(client, W83781D_REG_BEEP_INTS2,
 593                             val2 | data->beep_enable << 7);
 594
 595         up(&data->update_lock);
 596         return count;
 597 }
 598
 599 #define sysfs_beep(REG, reg) \
 600 static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
 601 { \
 602         return show_beep_##reg(dev, attr, buf); \
 603 } \
 604 static ssize_t store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 605 { \
 606         return store_beep_reg(dev, buf, count, BEEP_##REG); \
 607 } \
 608 static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, show_regs_beep_##reg, store_regs_beep_##reg);
 609
 610 sysfs_beep(ENABLE, enable);
 611 sysfs_beep(MASK, mask);
 612
 613 #define device_create_file_beep(client) \
 614 do { \
 615 device_create_file(&client->dev, &dev_attr_beep_enable); \
 616 device_create_file(&client->dev, &dev_attr_beep_mask); \
 617 } while (0)
 618
 619 static ssize_t
 620 show_fan_div_reg(struct device *dev, char *buf, int nr)
 621 {
 622         struct w83781d_data *data = w83781d_update_device(dev);
 623         return sprintf(buf, "%ld\n",
 624                        (long) DIV_FROM_REG(data->fan_div[nr - 1]));
 625 }
 626
 627 /* Note: we save and restore the fan minimum here, because its value is
 628    determined in part by the fan divisor.  This follows the principle of
 629    least suprise; the user doesn't expect the fan minimum to change just
 630    because the divisor changed. */
 631 static ssize_t
 632 store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr)
 633 {
 634         struct i2c_client *client = to_i2c_client(dev);
 635         struct w83781d_data *data = i2c_get_clientdata(client);
 636         unsigned long min;
 637         u8 reg;
 638         unsigned long val = simple_strtoul(buf, NULL, 10);
 639
 640         down(&data->update_lock);
 641
 642         /* Save fan_min */
 643         min = FAN_FROM_REG(data->fan_min[nr],
 644                            DIV_FROM_REG(data->fan_div[nr]));
 645
 646         data->fan_div[nr] = DIV_TO_REG(val, data->type);
 647
 648         reg = (w83781d_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
 649                & (nr==0 ? 0xcf : 0x3f))
 650             | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
 651         w83781d_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
 652
 653         /* w83781d and as99127f don't have extended divisor bits */
 654         if (data->type != w83781d && data->type != as99127f) {
 655                 reg = (w83781d_read_value(client, W83781D_REG_VBAT)
 656                        & ~(1 << (5 + nr)))
 657                     | ((data->fan_div[nr] & 0x04) << (3 + nr));
 658                 w83781d_write_value(client, W83781D_REG_VBAT, reg);
 659         }
 660
 661         /* Restore fan_min */
 662         data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
 663         w83781d_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]);
 664
 665         up(&data->update_lock);
 666         return count;
 667 }
 668
 669 #define sysfs_fan_div(offset) \
 670 static ssize_t show_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 671 { \
 672         return show_fan_div_reg(dev, buf, offset); \
 673 } \
 674 static ssize_t store_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 675 { \
 676         return store_fan_div_reg(dev, buf, count, offset - 1); \
 677 } \
 678 static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, show_regs_fan_div_##offset, store_regs_fan_div_##offset);
 679
 680 sysfs_fan_div(1);
 681 sysfs_fan_div(2);
 682 sysfs_fan_div(3);
 683
 684 #define device_create_file_fan_div(client, offset) \
 685 do { \
 686 device_create_file(&client->dev, &dev_attr_fan##offset##_div); \
 687 } while (0)
 688
 689 static ssize_t
 690 show_pwm_reg(struct device *dev, char *buf, int nr)
 691 {
 692         struct w83781d_data *data = w83781d_update_device(dev);
 693         return sprintf(buf, "%ld\n", (long) PWM_FROM_REG(data->pwm[nr - 1]));
 694 }
 695
 696 static ssize_t
 697 show_pwmenable_reg(struct device *dev, char *buf, int nr)
 698 {
 699         struct w83781d_data *data = w83781d_update_device(dev);
 700         return sprintf(buf, "%ld\n", (long) data->pwmenable[nr - 1]);
 701 }
 702
 703 static ssize_t
 704 store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr)
 705 {
 706         struct i2c_client *client = to_i2c_client(dev);
 707         struct w83781d_data *data = i2c_get_clientdata(client);
 708         u32 val;
 709
 710         val = simple_strtoul(buf, NULL, 10);
 711
 712         down(&data->update_lock);
 713         data->pwm[nr - 1] = PWM_TO_REG(val);
 714         w83781d_write_value(client, W83781D_REG_PWM(nr), data->pwm[nr - 1]);
 715         up(&data->update_lock);
 716         return count;
 717 }
 718
 719 static ssize_t
 720 store_pwmenable_reg(struct device *dev, const char *buf, size_t count, int nr)
 721 {
 722         struct i2c_client *client = to_i2c_client(dev);
 723         struct w83781d_data *data = i2c_get_clientdata(client);
 724         u32 val, reg;
 725
 726         val = simple_strtoul(buf, NULL, 10);
 727
 728         down(&data->update_lock);
 729
 730         switch (val) {
 731         case 0:
 732         case 1:
 733                 reg = w83781d_read_value(client, W83781D_REG_PWMCLK12);
 734                 w83781d_write_value(client, W83781D_REG_PWMCLK12,
 735                                     (reg & 0xf7) | (val << 3));
 736
 737                 reg = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
 738                 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG,
 739                                     (reg & 0xef) | (!val << 4));
 740
 741                 data->pwmenable[nr - 1] = val;
 742                 break;
 743
 744         default:
 745                 up(&data->update_lock);
 746                 return -EINVAL;
 747         }
 748
 749         up(&data->update_lock);
 750         return count;
 751 }
 752
 753 #define sysfs_pwm(offset) \
 754 static ssize_t show_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 755 { \
 756         return show_pwm_reg(dev, buf, offset); \
 757 } \
 758 static ssize_t store_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, \
 759                 const char *buf, size_t count) \
 760 { \
 761         return store_pwm_reg(dev, buf, count, offset); \
 762 } \
 763 static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
 764                 show_regs_pwm_##offset, store_regs_pwm_##offset);
 765
 766 #define sysfs_pwmenable(offset) \
 767 static ssize_t show_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 768 { \
 769         return show_pwmenable_reg(dev, buf, offset); \
 770 } \
 771 static ssize_t store_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, \
 772                 const char *buf, size_t count) \
 773 { \
 774         return store_pwmenable_reg(dev, buf, count, offset); \
 775 } \
 776 static DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \
 777                 show_regs_pwmenable_##offset, store_regs_pwmenable_##offset);
 778
 779 sysfs_pwm(1);
 780 sysfs_pwm(2);
 781 sysfs_pwmenable(2);             /* only PWM2 can be enabled/disabled */
 782 sysfs_pwm(3);
 783 sysfs_pwm(4);
 784
 785 #define device_create_file_pwm(client, offset) \
 786 do { \
 787 device_create_file(&client->dev, &dev_attr_pwm##offset); \
 788 } while (0)
 789
 790 #define device_create_file_pwmenable(client, offset) \
 791 do { \
 792 device_create_file(&client->dev, &dev_attr_pwm##offset##_enable); \
 793 } while (0)
 794
 795 static ssize_t
 796 show_sensor_reg(struct device *dev, char *buf, int nr)
 797 {
 798         struct w83781d_data *data = w83781d_update_device(dev);
 799         return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]);
 800 }
 801
 802 static ssize_t
 803 store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr)
 804 {
 805         struct i2c_client *client = to_i2c_client(dev);
 806         struct w83781d_data *data = i2c_get_clientdata(client);
 807         u32 val, tmp;
 808
 809         val = simple_strtoul(buf, NULL, 10);
 810
 811         down(&data->update_lock);
 812
 813         switch (val) {
 814         case 1:         /* PII/Celeron diode */
 815                 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
 816                 w83781d_write_value(client, W83781D_REG_SCFG1,
 817                                     tmp | BIT_SCFG1[nr - 1]);
 818                 tmp = w83781d_read_value(client, W83781D_REG_SCFG2);
 819                 w83781d_write_value(client, W83781D_REG_SCFG2,
 820                                     tmp | BIT_SCFG2[nr - 1]);
 821                 data->sens[nr - 1] = val;
 822                 break;
 823         case 2:         /* 3904 */
 824                 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
 825                 w83781d_write_value(client, W83781D_REG_SCFG1,
 826                                     tmp | BIT_SCFG1[nr - 1]);
 827                 tmp = w83781d_read_value(client, W83781D_REG_SCFG2);
 828                 w83781d_write_value(client, W83781D_REG_SCFG2,
 829                                     tmp & ~BIT_SCFG2[nr - 1]);
 830                 data->sens[nr - 1] = val;
 831                 break;
 832         case W83781D_DEFAULT_BETA:      /* thermistor */
 833                 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
 834                 w83781d_write_value(client, W83781D_REG_SCFG1,
 835                                     tmp & ~BIT_SCFG1[nr - 1]);
 836                 data->sens[nr - 1] = val;
 837                 break;
 838         default:
 839                 dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or %d\n",
 840                        (long) val, W83781D_DEFAULT_BETA);
 841                 break;
 842         }
 843
 844         up(&data->update_lock);
 845         return count;
 846 }
 847
 848 #define sysfs_sensor(offset) \
 849 static ssize_t show_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 850 { \
 851     return show_sensor_reg(dev, buf, offset); \
 852 } \
 853 static ssize_t store_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 854 { \
 855     return store_sensor_reg(dev, buf, count, offset); \
 856 } \
 857 static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, show_regs_sensor_##offset, store_regs_sensor_##offset);
 858
 859 sysfs_sensor(1);
 860 sysfs_sensor(2);
 861 sysfs_sensor(3);
 862
 863 #define device_create_file_sensor(client, offset) \
 864 do { \
 865 device_create_file(&client->dev, &dev_attr_temp##offset##_type); \
 866 } while (0)
 867
 868 /* This function is called when:
 869      * w83781d_driver is inserted (when this module is loaded), for each
 870        available adapter
 871      * when a new adapter is inserted (and w83781d_driver is still present) */
 872 static int
 873 w83781d_attach_adapter(struct i2c_adapter *adapter)
 874 {
 875         if (!(adapter->class & I2C_CLASS_HWMON))
 876                 return 0;
 877         return i2c_probe(adapter, &addr_data, w83781d_detect);
 878 }
 879
 880 static int
 881 w83781d_isa_attach_adapter(struct i2c_adapter *adapter)
 882 {
 883         return w83781d_detect(adapter, isa_address, -1);
 884 }
 885
 886 /* Assumes that adapter is of I2C, not ISA variety.
 887  * OTHERWISE DON'T CALL THIS
 888  */
 889 static int
 890 w83781d_detect_subclients(struct i2c_adapter *adapter, int address, int kind,
 891                 struct i2c_client *new_client)
 892 {
 893         int i, val1 = 0, id;
 894         int err;
 895         const char *client_name = "";
 896         struct w83781d_data *data = i2c_get_clientdata(new_client);
 897
 898         data->lm75[0] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
 899         if (!(data->lm75[0])) {
 900                 err = -ENOMEM;
 901                 goto ERROR_SC_0;
 902         }
 903
 904         id = i2c_adapter_id(adapter);
 905
 906         if (force_subclients[0] == id && force_subclients[1] == address) {
 907                 for (i = 2; i <= 3; i++) {
 908                         if (force_subclients[i] < 0x48 ||
 909                             force_subclients[i] > 0x4f) {
 910                                 dev_err(&new_client->dev, "Invalid subclient "
 911                                         "address %d; must be 0x48-0x4f\n",
 912                                         force_subclients[i]);
 913                                 err = -EINVAL;
 914                                 goto ERROR_SC_1;
 915                         }
 916                 }
 917                 w83781d_write_value(new_client, W83781D_REG_I2C_SUBADDR,
 918                                 (force_subclients[2] & 0x07) |
 919                                 ((force_subclients[3] & 0x07) << 4));
 920                 data->lm75[0]->addr = force_subclients[2];
 921         } else {
 922                 val1 = w83781d_read_value(new_client, W83781D_REG_I2C_SUBADDR);
 923                 data->lm75[0]->addr = 0x48 + (val1 & 0x07);
 924         }
 925
 926         if (kind != w83783s) {
 927                 data->lm75[1] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
 928                 if (!(data->lm75[1])) {
 929                         err = -ENOMEM;
 930                         goto ERROR_SC_1;
 931                 }
 932
 933                 if (force_subclients[0] == id &&
 934                     force_subclients[1] == address) {
 935                         data->lm75[1]->addr = force_subclients[3];
 936                 } else {
 937                         data->lm75[1]->addr = 0x48 + ((val1 >> 4) & 0x07);
 938                 }
 939                 if (data->lm75[0]->addr == data->lm75[1]->addr) {
 940                         dev_err(&new_client->dev,
 941                                "Duplicate addresses 0x%x for subclients.\n",
 942                                data->lm75[0]->addr);
 943                         err = -EBUSY;
 944                         goto ERROR_SC_2;
 945                 }
 946         }
 947
 948         if (kind == w83781d)
 949                 client_name = "w83781d subclient";
 950         else if (kind == w83782d)
 951                 client_name = "w83782d subclient";
 952         else if (kind == w83783s)
 953                 client_name = "w83783s subclient";
 954         else if (kind == w83627hf)
 955                 client_name = "w83627hf subclient";
 956         else if (kind == as99127f)
 957                 client_name = "as99127f subclient";
 958
 959         for (i = 0; i <= 1; i++) {
 960                 /* store all data in w83781d */
 961                 i2c_set_clientdata(data->lm75[i], NULL);
 962                 data->lm75[i]->adapter = adapter;
 963                 data->lm75[i]->driver = &w83781d_driver;
 964                 data->lm75[i]->flags = 0;
 965                 strlcpy(data->lm75[i]->name, client_name,
 966                         I2C_NAME_SIZE);
 967                 if ((err = i2c_attach_client(data->lm75[i]))) {
 968                         dev_err(&new_client->dev, "Subclient %d "
 969                                 "registration at address 0x%x "
 970                                 "failed.\n", i, data->lm75[i]->addr);
 971                         if (i == 1)
 972                                 goto ERROR_SC_3;
 973                         goto ERROR_SC_2;
 974                 }
 975                 if (kind == w83783s)
 976                         break;
 977         }
 978
 979         return 0;
 980
 981 /* Undo inits in case of errors */
 982 ERROR_SC_3:
 983         i2c_detach_client(data->lm75[0]);
 984 ERROR_SC_2:
 985         kfree(data->lm75[1]);
 986 ERROR_SC_1:
 987         kfree(data->lm75[0]);
 988 ERROR_SC_0:
 989         return err;
 990 }
 991
 992 static int
 993 w83781d_detect(struct i2c_adapter *adapter, int address, int kind)
 994 {
 995         int i = 0, val1 = 0, val2;
 996         struct i2c_client *new_client;
 997         struct w83781d_data *data;
 998         int err;
 999         const char *client_name = "";
1000         int is_isa = i2c_is_isa_adapter(adapter);
1001         enum vendor { winbond, asus } vendid;
1002
1003         if (!is_isa
1004             && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1005                 err = -EINVAL;
1006                 goto ERROR0;
1007         }
1008
1009         /* Prevent users from forcing a kind for a bus it isn't supposed
1010            to possibly be on */
1011         if (is_isa && (kind == as99127f || kind == w83783s)) {
1012                 dev_err(&adapter->dev,
1013                         "Cannot force I2C-only chip for ISA address 0x%02x.\n",
1014                         address);
1015                 err = -EINVAL;
1016                 goto ERROR0;
1017         }
1018
1019         if (is_isa)
1020                 if (!request_region(address, W83781D_EXTENT,
1021                                     w83781d_isa_driver.driver.name)) {
1022                         dev_dbg(&adapter->dev, "Request of region "
1023                                 "0x%x-0x%x for w83781d failed\n", address,
1024                                 address + W83781D_EXTENT - 1);
1025                         err = -EBUSY;
1026                         goto ERROR0;
1027                 }
1028
1029         /* Probe whether there is anything available on this address. Already
1030            done for SMBus clients */
1031         if (kind < 0) {
1032                 if (is_isa) {
1033
1034 #define REALLY_SLOW_IO
1035                         /* We need the timeouts for at least some LM78-like
1036                            chips. But only if we read 'undefined' registers. */
1037                         i = inb_p(address + 1);
1038                         if (inb_p(address + 2) != i
1039                          || inb_p(address + 3) != i
1040                          || inb_p(address + 7) != i) {
1041                                 dev_dbg(&adapter->dev, "Detection of w83781d "
1042                                         "chip failed at step 1\n");
1043                                 err = -ENODEV;
1044                                 goto ERROR1;
1045                         }
1046 #undef REALLY_SLOW_IO
1047
1048                         /* Let's just hope nothing breaks here */
1049                         i = inb_p(address + 5) & 0x7f;
1050                         outb_p(~i & 0x7f, address + 5);
1051                         val2 = inb_p(address + 5) & 0x7f;
1052                         if (val2 != (~i & 0x7f)) {
1053                                 outb_p(i, address + 5);
1054                                 dev_dbg(&adapter->dev, "Detection of w83781d "
1055                                         "chip failed at step 2 (0x%x != "
1056                                         "0x%x at 0x%x)\n", val2, ~i & 0x7f,
1057                                         address + 5);
1058                                 err = -ENODEV;
1059                                 goto ERROR1;
1060                         }
1061                 }
1062         }
1063
1064         /* OK. For now, we presume we have a valid client. We now create the
1065            client structure, even though we cannot fill it completely yet.
1066            But it allows us to access w83781d_{read,write}_value. */
1067
1068         if (!(data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL))) {
1069                 err = -ENOMEM;
1070                 goto ERROR1;
1071         }
1072
1073         new_client = &data->client;
1074         i2c_set_clientdata(new_client, data);
1075         new_client->addr = address;
1076         init_MUTEX(&data->lock);
1077         new_client->adapter = adapter;
1078         new_client->driver = is_isa ? &w83781d_isa_driver : &w83781d_driver;
1079         new_client->flags = 0;
1080
1081         /* Now, we do the remaining detection. */
1082
1083         /* The w8378?d may be stuck in some other bank than bank 0. This may
1084            make reading other information impossible. Specify a force=... or
1085            force_*=... parameter, and the Winbond will be reset to the right
1086            bank. */
1087         if (kind < 0) {
1088                 if (w83781d_read_value(new_client, W83781D_REG_CONFIG) & 0x80) {
1089                         dev_dbg(&new_client->dev, "Detection failed at step "
1090                                 "3\n");
1091                         err = -ENODEV;
1092                         goto ERROR2;
1093                 }
1094                 val1 = w83781d_read_value(new_client, W83781D_REG_BANK);
1095                 val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN);
1096                 /* Check for Winbond or Asus ID if in bank 0 */
1097                 if ((!(val1 & 0x07)) &&
1098                     (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3))
1099                      || ((val1 & 0x80) && (val2 != 0x5c) && (val2 != 0x12)))) {
1100                         dev_dbg(&new_client->dev, "Detection failed at step "
1101                                 "4\n");
1102                         err = -ENODEV;
1103                         goto ERROR2;
1104                 }
1105                 /* If Winbond SMBus, check address at 0x48.
1106                    Asus doesn't support, except for as99127f rev.2 */
1107                 if ((!is_isa) && (((!(val1 & 0x80)) && (val2 == 0xa3)) ||
1108                                   ((val1 & 0x80) && (val2 == 0x5c)))) {
1109                         if (w83781d_read_value
1110                             (new_client, W83781D_REG_I2C_ADDR) != address) {
1111                                 dev_dbg(&new_client->dev, "Detection failed "
1112                                         "at step 5\n");
1113                                 err = -ENODEV;
1114                                 goto ERROR2;
1115                         }
1116                 }
1117         }
1118
1119         /* We have either had a force parameter, or we have already detected the
1120            Winbond. Put it now into bank 0 and Vendor ID High Byte */
1121         w83781d_write_value(new_client, W83781D_REG_BANK,
1122                             (w83781d_read_value(new_client,
1123                                                 W83781D_REG_BANK) & 0x78) |
1124                             0x80);
1125
1126         /* Determine the chip type. */
1127         if (kind <= 0) {
1128                 /* get vendor ID */
1129                 val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN);
1130                 if (val2 == 0x5c)
1131                         vendid = winbond;
1132                 else if (val2 == 0x12)
1133                         vendid = asus;
1134                 else {
1135                         dev_dbg(&new_client->dev, "Chip was made by neither "
1136                                 "Winbond nor Asus?\n");
1137                         err = -ENODEV;
1138                         goto ERROR2;
1139                 }
1140
1141                 val1 = w83781d_read_value(new_client, W83781D_REG_WCHIPID);
1142                 if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
1143                         kind = w83781d;
1144                 else if (val1 == 0x30 && vendid == winbond)
1145                         kind = w83782d;
1146                 else if (val1 == 0x40 && vendid == winbond && !is_isa
1147                                 && address == 0x2d)
1148                         kind = w83783s;
1149                 else if (val1 == 0x21 && vendid == winbond)
1150                         kind = w83627hf;
1151                 else if (val1 == 0x31 && !is_isa && address >= 0x28)
1152                         kind = as99127f;
1153                 else {
1154                         if (kind == 0)
1155                                 dev_warn(&new_client->dev, "Ignoring 'force' "
1156                                          "parameter for unknown chip at "
1157                                          "adapter %d, address 0x%02x\n",
1158                                          i2c_adapter_id(adapter), address);
1159                         err = -EINVAL;
1160                         goto ERROR2;
1161                 }
1162         }
1163
1164         if (kind == w83781d) {
1165                 client_name = "w83781d";
1166         } else if (kind == w83782d) {
1167                 client_name = "w83782d";
1168         } else if (kind == w83783s) {
1169                 client_name = "w83783s";
1170         } else if (kind == w83627hf) {
1171                 client_name = "w83627hf";
1172         } else if (kind == as99127f) {
1173                 client_name = "as99127f";
1174         }
1175
1176         /* Fill in the remaining client fields and put into the global list */
1177         strlcpy(new_client->name, client_name, I2C_NAME_SIZE);
1178         data->type = kind;
1179
1180         data->valid = 0;
1181         init_MUTEX(&data->update_lock);
1182
1183         /* Tell the I2C layer a new client has arrived */
1184         if ((err = i2c_attach_client(new_client)))
1185                 goto ERROR2;
1186
1187         /* attach secondary i2c lm75-like clients */
1188         if (!is_isa) {
1189                 if ((err = w83781d_detect_subclients(adapter, address,
1190                                 kind, new_client)))
1191                         goto ERROR3;
1192         } else {
1193                 data->lm75[0] = NULL;
1194                 data->lm75[1] = NULL;
1195         }
1196
1197         /* Initialize the chip */
1198         w83781d_init_client(new_client);
1199
1200         /* A few vars need to be filled upon startup */
1201         for (i = 1; i <= 3; i++) {
1202                 data->fan_min[i - 1] = w83781d_read_value(new_client,
1203                                         W83781D_REG_FAN_MIN(i));
1204         }
1205         if (kind != w83781d && kind != as99127f)
1206                 for (i = 0; i < 4; i++)
1207                         data->pwmenable[i] = 1;
1208
1209         /* Register sysfs hooks */
1210         data->class_dev = hwmon_device_register(&new_client->dev);
1211         if (IS_ERR(data->class_dev)) {
1212                 err = PTR_ERR(data->class_dev);
1213                 goto ERROR4;
1214         }
1215
1216         device_create_file_in(new_client, 0);
1217         if (kind != w83783s)
1218                 device_create_file_in(new_client, 1);
1219         device_create_file_in(new_client, 2);
1220         device_create_file_in(new_client, 3);
1221         device_create_file_in(new_client, 4);
1222         device_create_file_in(new_client, 5);
1223         device_create_file_in(new_client, 6);
1224         if (kind != as99127f && kind != w83781d && kind != w83783s) {
1225                 device_create_file_in(new_client, 7);
1226                 device_create_file_in(new_client, 8);
1227         }
1228
1229         device_create_file_fan(new_client, 1);
1230         device_create_file_fan(new_client, 2);
1231         device_create_file_fan(new_client, 3);
1232
1233         device_create_file_temp(new_client, 1);
1234         device_create_file_temp(new_client, 2);
1235         if (kind != w83783s)
1236                 device_create_file_temp(new_client, 3);
1237
1238         device_create_file_vid(new_client);
1239         device_create_file_vrm(new_client);
1240
1241         device_create_file_fan_div(new_client, 1);
1242         device_create_file_fan_div(new_client, 2);
1243         device_create_file_fan_div(new_client, 3);
1244
1245         device_create_file_alarms(new_client);
1246
1247         device_create_file_beep(new_client);
1248
1249         if (kind != w83781d && kind != as99127f) {
1250                 device_create_file_pwm(new_client, 1);
1251                 device_create_file_pwm(new_client, 2);
1252                 device_create_file_pwmenable(new_client, 2);
1253         }
1254         if (kind == w83782d && !is_isa) {
1255                 device_create_file_pwm(new_client, 3);
1256                 device_create_file_pwm(new_client, 4);
1257         }
1258
1259         if (kind != as99127f && kind != w83781d) {
1260                 device_create_file_sensor(new_client, 1);
1261                 device_create_file_sensor(new_client, 2);
1262                 if (kind != w83783s)
1263                         device_create_file_sensor(new_client, 3);
1264         }
1265
1266         return 0;
1267
1268 ERROR4:
1269         if (data->lm75[1]) {
1270                 i2c_detach_client(data->lm75[1]);
1271                 kfree(data->lm75[1]);
1272         }
1273         if (data->lm75[0]) {
1274                 i2c_detach_client(data->lm75[0]);
1275                 kfree(data->lm75[0]);
1276         }
1277 ERROR3:
1278         i2c_detach_client(new_client);
1279 ERROR2:
1280         kfree(data);
1281 ERROR1:
1282         if (is_isa)
1283                 release_region(address, W83781D_EXTENT);
1284 ERROR0:
1285         return err;
1286 }
1287
1288 static int
1289 w83781d_detach_client(struct i2c_client *client)
1290 {
1291         struct w83781d_data *data = i2c_get_clientdata(client);
1292         int err;
1293
1294         /* main client */
1295         if (data)
1296                 hwmon_device_unregister(data->class_dev);
1297
1298         if (i2c_is_isa_client(client))
1299                 release_region(client->addr, W83781D_EXTENT);
1300
1301         if ((err = i2c_detach_client(client)))
1302                 return err;
1303
1304         /* main client */
1305         if (data)
1306                 kfree(data);
1307
1308         /* subclient */
1309         else
1310                 kfree(client);
1311
1312         return 0;
1313 }
1314
1315 /* The SMBus locks itself, usually, but nothing may access the Winbond between
1316    bank switches. ISA access must always be locked explicitly!
1317    We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1318    would slow down the W83781D access and should not be necessary.
1319    There are some ugly typecasts here, but the good news is - they should
1320    nowhere else be necessary! */
1321 static int
1322 w83781d_read_value(struct i2c_client *client, u16 reg)
1323 {
1324         struct w83781d_data *data = i2c_get_clientdata(client);
1325         int res, word_sized, bank;
1326         struct i2c_client *cl;
1327
1328         down(&data->lock);
1329         if (i2c_is_isa_client(client)) {
1330                 word_sized = (((reg & 0xff00) == 0x100)
1331                               || ((reg & 0xff00) == 0x200))
1332                     && (((reg & 0x00ff) == 0x50)
1333                         || ((reg & 0x00ff) == 0x53)
1334                         || ((reg & 0x00ff) == 0x55));
1335                 if (reg & 0xff00) {
1336                         outb_p(W83781D_REG_BANK,
1337                                client->addr + W83781D_ADDR_REG_OFFSET);
1338                         outb_p(reg >> 8,
1339                                client->addr + W83781D_DATA_REG_OFFSET);
1340                 }
1341                 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1342                 res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1343                 if (word_sized) {
1344                         outb_p((reg & 0xff) + 1,
1345                                client->addr + W83781D_ADDR_REG_OFFSET);
1346                         res =
1347                             (res << 8) + inb_p(client->addr +
1348                                                W83781D_DATA_REG_OFFSET);
1349                 }
1350                 if (reg & 0xff00) {
1351                         outb_p(W83781D_REG_BANK,
1352                                client->addr + W83781D_ADDR_REG_OFFSET);
1353                         outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1354                 }
1355         } else {
1356                 bank = (reg >> 8) & 0x0f;
1357                 if (bank > 2)
1358                         /* switch banks */
1359                         i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1360                                                   bank);
1361                 if (bank == 0 || bank > 2) {
1362                         res = i2c_smbus_read_byte_data(client, reg & 0xff);
1363                 } else {
1364                         /* switch to subclient */
1365                         cl = data->lm75[bank - 1];
1366                         /* convert from ISA to LM75 I2C addresses */
1367                         switch (reg & 0xff) {
1368                         case 0x50:      /* TEMP */
1369                                 res = swab16(i2c_smbus_read_word_data(cl, 0));
1370                                 break;
1371                         case 0x52:      /* CONFIG */
1372                                 res = i2c_smbus_read_byte_data(cl, 1);
1373                                 break;
1374                         case 0x53:      /* HYST */
1375                                 res = swab16(i2c_smbus_read_word_data(cl, 2));
1376                                 break;
1377                         case 0x55:      /* OVER */
1378                         default:
1379                                 res = swab16(i2c_smbus_read_word_data(cl, 3));
1380                                 break;
1381                         }
1382                 }
1383                 if (bank > 2)
1384                         i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1385         }
1386         up(&data->lock);
1387         return res;
1388 }
1389
1390 static int
1391 w83781d_write_value(struct i2c_client *client, u16 reg, u16 value)
1392 {
1393         struct w83781d_data *data = i2c_get_clientdata(client);
1394         int word_sized, bank;
1395         struct i2c_client *cl;
1396
1397         down(&data->lock);
1398         if (i2c_is_isa_client(client)) {
1399                 word_sized = (((reg & 0xff00) == 0x100)
1400                               || ((reg & 0xff00) == 0x200))
1401                     && (((reg & 0x00ff) == 0x53)
1402                         || ((reg & 0x00ff) == 0x55));
1403                 if (reg & 0xff00) {
1404                         outb_p(W83781D_REG_BANK,
1405                                client->addr + W83781D_ADDR_REG_OFFSET);
1406                         outb_p(reg >> 8,
1407                                client->addr + W83781D_DATA_REG_OFFSET);
1408                 }
1409                 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1410                 if (word_sized) {
1411                         outb_p(value >> 8,
1412                                client->addr + W83781D_DATA_REG_OFFSET);
1413                         outb_p((reg & 0xff) + 1,
1414                                client->addr + W83781D_ADDR_REG_OFFSET);
1415                 }
1416                 outb_p(value & 0xff, client->addr + W83781D_DATA_REG_OFFSET);
1417                 if (reg & 0xff00) {
1418                         outb_p(W83781D_REG_BANK,
1419                                client->addr + W83781D_ADDR_REG_OFFSET);
1420                         outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1421                 }
1422         } else {
1423                 bank = (reg >> 8) & 0x0f;
1424                 if (bank > 2)
1425                         /* switch banks */
1426                         i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1427                                                   bank);
1428                 if (bank == 0 || bank > 2) {
1429                         i2c_smbus_write_byte_data(client, reg & 0xff,
1430                                                   value & 0xff);
1431                 } else {
1432                         /* switch to subclient */
1433                         cl = data->lm75[bank - 1];
1434                         /* convert from ISA to LM75 I2C addresses */
1435                         switch (reg & 0xff) {
1436                         case 0x52:      /* CONFIG */
1437                                 i2c_smbus_write_byte_data(cl, 1, value & 0xff);
1438                                 break;
1439                         case 0x53:      /* HYST */
1440                                 i2c_smbus_write_word_data(cl, 2, swab16(value));
1441                                 break;
1442                         case 0x55:      /* OVER */
1443                                 i2c_smbus_write_word_data(cl, 3, swab16(value));
1444                                 break;
1445                         }
1446                 }
1447                 if (bank > 2)
1448                         i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1449         }
1450         up(&data->lock);
1451         return 0;
1452 }
1453
1454 static void
1455 w83781d_init_client(struct i2c_client *client)
1456 {
1457         struct w83781d_data *data = i2c_get_clientdata(client);
1458         int i, p;
1459         int type = data->type;
1460         u8 tmp;
1461
1462         if (init && type != as99127f) { /* this resets registers we don't have
1463                                            documentation for on the as99127f */
1464                 /* save these registers */
1465                 i = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
1466                 p = w83781d_read_value(client, W83781D_REG_PWMCLK12);
1467                 /* Reset all except Watchdog values and last conversion values
1468                    This sets fan-divs to 2, among others */
1469                 w83781d_write_value(client, W83781D_REG_CONFIG, 0x80);
1470                 /* Restore the registers and disable power-on abnormal beep.
1471                    This saves FAN 1/2/3 input/output values set by BIOS. */
1472                 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80);
1473                 w83781d_write_value(client, W83781D_REG_PWMCLK12, p);
1474                 /* Disable master beep-enable (reset turns it on).
1475                    Individual beep_mask should be reset to off but for some reason
1476                    disabling this bit helps some people not get beeped */
1477                 w83781d_write_value(client, W83781D_REG_BEEP_INTS2, 0);
1478         }
1479
1480         data->vrm = vid_which_vrm();
1481
1482         if ((type != w83781d) && (type != as99127f)) {
1483                 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
1484                 for (i = 1; i <= 3; i++) {
1485                         if (!(tmp & BIT_SCFG1[i - 1])) {
1486                                 data->sens[i - 1] = W83781D_DEFAULT_BETA;
1487                         } else {
1488                                 if (w83781d_read_value
1489                                     (client,
1490                                      W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1491                                         data->sens[i - 1] = 1;
1492                                 else
1493                                         data->sens[i - 1] = 2;
1494                         }
1495                         if (type == w83783s && i == 2)
1496                                 break;
1497                 }
1498         }
1499
1500         if (init && type != as99127f) {
1501                 /* Enable temp2 */
1502                 tmp = w83781d_read_value(client, W83781D_REG_TEMP2_CONFIG);
1503                 if (tmp & 0x01) {
1504                         dev_warn(&client->dev, "Enabling temp2, readings "
1505                                  "might not make sense\n");
1506                         w83781d_write_value(client, W83781D_REG_TEMP2_CONFIG,
1507                                 tmp & 0xfe);
1508                 }
1509
1510                 /* Enable temp3 */
1511                 if (type != w83783s) {
1512                         tmp = w83781d_read_value(client,
1513                                 W83781D_REG_TEMP3_CONFIG);
1514                         if (tmp & 0x01) {
1515                                 dev_warn(&client->dev, "Enabling temp3, "
1516                                          "readings might not make sense\n");
1517                                 w83781d_write_value(client,
1518                                         W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1519                         }
1520                 }
1521         }
1522
1523         /* Start monitoring */
1524         w83781d_write_value(client, W83781D_REG_CONFIG,
1525                             (w83781d_read_value(client,
1526                                                 W83781D_REG_CONFIG) & 0xf7)
1527                             | 0x01);
1528 }
1529
1530 static struct w83781d_data *w83781d_update_device(struct device *dev)
1531 {
1532         struct i2c_client *client = to_i2c_client(dev);
1533         struct w83781d_data *data = i2c_get_clientdata(client);
1534         int i;
1535
1536         down(&data->update_lock);
1537
1538         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1539             || !data->valid) {
1540                 dev_dbg(dev, "Starting device update\n");
1541
1542                 for (i = 0; i <= 8; i++) {
1543                         if (data->type == w83783s && i == 1)
1544                                 continue;       /* 783S has no in1 */
1545                         data->in[i] =
1546                             w83781d_read_value(client, W83781D_REG_IN(i));
1547                         data->in_min[i] =
1548                             w83781d_read_value(client, W83781D_REG_IN_MIN(i));
1549                         data->in_max[i] =
1550                             w83781d_read_value(client, W83781D_REG_IN_MAX(i));
1551                         if ((data->type != w83782d)
1552                             && (data->type != w83627hf) && (i == 6))
1553                                 break;
1554                 }
1555                 for (i = 1; i <= 3; i++) {
1556                         data->fan[i - 1] =
1557                             w83781d_read_value(client, W83781D_REG_FAN(i));
1558                         data->fan_min[i - 1] =
1559                             w83781d_read_value(client, W83781D_REG_FAN_MIN(i));
1560                 }
1561                 if (data->type != w83781d && data->type != as99127f) {
1562                         for (i = 1; i <= 4; i++) {
1563                                 data->pwm[i - 1] =
1564                                     w83781d_read_value(client,
1565                                                        W83781D_REG_PWM(i));
1566                                 if ((data->type != w83782d
1567                                      || i2c_is_isa_client(client))
1568                                     && i == 2)
1569                                         break;
1570                         }
1571                         /* Only PWM2 can be disabled */
1572                         data->pwmenable[1] = (w83781d_read_value(client,
1573                                               W83781D_REG_PWMCLK12) & 0x08) >> 3;
1574                 }
1575
1576                 data->temp = w83781d_read_value(client, W83781D_REG_TEMP(1));
1577                 data->temp_max =
1578                     w83781d_read_value(client, W83781D_REG_TEMP_OVER(1));
1579                 data->temp_max_hyst =
1580                     w83781d_read_value(client, W83781D_REG_TEMP_HYST(1));
1581                 data->temp_add[0] =
1582                     w83781d_read_value(client, W83781D_REG_TEMP(2));
1583                 data->temp_max_add[0] =
1584                     w83781d_read_value(client, W83781D_REG_TEMP_OVER(2));
1585                 data->temp_max_hyst_add[0] =
1586                     w83781d_read_value(client, W83781D_REG_TEMP_HYST(2));
1587                 if (data->type != w83783s) {
1588                         data->temp_add[1] =
1589                             w83781d_read_value(client, W83781D_REG_TEMP(3));
1590                         data->temp_max_add[1] =
1591                             w83781d_read_value(client,
1592                                                W83781D_REG_TEMP_OVER(3));
1593                         data->temp_max_hyst_add[1] =
1594                             w83781d_read_value(client,
1595                                                W83781D_REG_TEMP_HYST(3));
1596                 }
1597                 i = w83781d_read_value(client, W83781D_REG_VID_FANDIV);
1598                 data->vid = i & 0x0f;
1599                 data->vid |= (w83781d_read_value(client,
1600                                         W83781D_REG_CHIPID) & 0x01) << 4;
1601                 data->fan_div[0] = (i >> 4) & 0x03;
1602                 data->fan_div[1] = (i >> 6) & 0x03;
1603                 data->fan_div[2] = (w83781d_read_value(client,
1604                                         W83781D_REG_PIN) >> 6) & 0x03;
1605                 if ((data->type != w83781d) && (data->type != as99127f)) {
1606                         i = w83781d_read_value(client, W83781D_REG_VBAT);
1607                         data->fan_div[0] |= (i >> 3) & 0x04;
1608                         data->fan_div[1] |= (i >> 4) & 0x04;
1609                         data->fan_div[2] |= (i >> 5) & 0x04;
1610                 }
1611                 if ((data->type == w83782d) || (data->type == w83627hf)) {
1612                         data->alarms = w83781d_read_value(client,
1613                                                 W83782D_REG_ALARM1)
1614                                      | (w83781d_read_value(client,
1615                                                 W83782D_REG_ALARM2) << 8)
1616                                      | (w83781d_read_value(client,
1617                                                 W83782D_REG_ALARM3) << 16);
1618                 } else if (data->type == w83783s) {
1619                         data->alarms = w83781d_read_value(client,
1620                                                 W83782D_REG_ALARM1)
1621                                      | (w83781d_read_value(client,
1622                                                 W83782D_REG_ALARM2) << 8);
1623                 } else {
1624                         /* No real-time status registers, fall back to
1625                            interrupt status registers */
1626                         data->alarms = w83781d_read_value(client,
1627                                                 W83781D_REG_ALARM1)
1628                                      | (w83781d_read_value(client,
1629                                                 W83781D_REG_ALARM2) << 8);
1630                 }
1631                 i = w83781d_read_value(client, W83781D_REG_BEEP_INTS2);
1632                 data->beep_enable = i >> 7;
1633                 data->beep_mask = ((i & 0x7f) << 8) +
1634                     w83781d_read_value(client, W83781D_REG_BEEP_INTS1);
1635                 if ((data->type != w83781d) && (data->type != as99127f)) {
1636                         data->beep_mask |=
1637                             w83781d_read_value(client,
1638                                                W83781D_REG_BEEP_INTS3) << 16;
1639                 }
1640                 data->last_updated = jiffies;
1641                 data->valid = 1;
1642         }
1643
1644         up(&data->update_lock);
1645
1646         return data;
1647 }
1648
1649 static int __init
1650 sensors_w83781d_init(void)
1651 {
1652         int res;
1653
1654         res = i2c_add_driver(&w83781d_driver);
1655         if (res)
1656                 return res;
1657
1658         res = i2c_isa_add_driver(&w83781d_isa_driver);
1659         if (res) {
1660                 i2c_del_driver(&w83781d_driver);
1661                 return res;
1662         }
1663
1664         return 0;
1665 }
1666
1667 static void __exit
1668 sensors_w83781d_exit(void)
1669 {
1670         i2c_isa_del_driver(&w83781d_isa_driver);
1671         i2c_del_driver(&w83781d_driver);
1672 }
1673
1674 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1675               "Philip Edelbrock <phil@netroedge.com>, "
1676               "and Mark Studebaker <mdsxyz123@yahoo.com>");
1677 MODULE_DESCRIPTION("W83781D driver");
1678 MODULE_LICENSE("GPL");
1679
1680 module_init(sensors_w83781d_init);
1681 module_exit(sensors_w83781d_exit);