Merge tag 'v2.6.35-rc6' into drm-radeon-next
[sfrench/cifs-2.6.git] / drivers / gpu / drm / radeon / radeon_kms.c
1 /*
2  * Copyright 2008 Advanced Micro Devices, Inc.
3  * Copyright 2008 Red Hat Inc.
4  * Copyright 2009 Jerome Glisse.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22  * OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * Authors: Dave Airlie
25  *          Alex Deucher
26  *          Jerome Glisse
27  */
28 #include "drmP.h"
29 #include "drm_sarea.h"
30 #include "radeon.h"
31 #include "radeon_drm.h"
32
33 #include <linux/vga_switcheroo.h>
34 #include <linux/slab.h>
35
36 int radeon_driver_unload_kms(struct drm_device *dev)
37 {
38         struct radeon_device *rdev = dev->dev_private;
39
40         if (rdev == NULL)
41                 return 0;
42         radeon_modeset_fini(rdev);
43         radeon_device_fini(rdev);
44         kfree(rdev);
45         dev->dev_private = NULL;
46         return 0;
47 }
48
49 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags)
50 {
51         struct radeon_device *rdev;
52         int r, acpi_status;
53
54         rdev = kzalloc(sizeof(struct radeon_device), GFP_KERNEL);
55         if (rdev == NULL) {
56                 return -ENOMEM;
57         }
58         dev->dev_private = (void *)rdev;
59
60         /* update BUS flag */
61         if (drm_device_is_agp(dev)) {
62                 flags |= RADEON_IS_AGP;
63         } else if (drm_device_is_pcie(dev)) {
64                 flags |= RADEON_IS_PCIE;
65         } else {
66                 flags |= RADEON_IS_PCI;
67         }
68
69         /* radeon_device_init should report only fatal error
70          * like memory allocation failure or iomapping failure,
71          * or memory manager initialization failure, it must
72          * properly initialize the GPU MC controller and permit
73          * VRAM allocation
74          */
75         r = radeon_device_init(rdev, dev, dev->pdev, flags);
76         if (r) {
77                 dev_err(&dev->pdev->dev, "Fatal error during GPU init\n");
78                 goto out;
79         }
80
81         /* Call ACPI methods */
82         acpi_status = radeon_acpi_init(rdev);
83         if (acpi_status)
84                 dev_err(&dev->pdev->dev, "Error during ACPI methods call\n");
85
86         /* Again modeset_init should fail only on fatal error
87          * otherwise it should provide enough functionalities
88          * for shadowfb to run
89          */
90         r = radeon_modeset_init(rdev);
91         if (r)
92                 dev_err(&dev->pdev->dev, "Fatal error during modeset init\n");
93 out:
94         if (r)
95                 radeon_driver_unload_kms(dev);
96         return r;
97 }
98
99
100 /*
101  * Userspace get informations ioctl
102  */
103 int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
104 {
105         struct radeon_device *rdev = dev->dev_private;
106         struct drm_radeon_info *info;
107         struct radeon_mode_info *minfo = &rdev->mode_info;
108         uint32_t *value_ptr;
109         uint32_t value;
110         struct drm_crtc *crtc;
111         int i, found;
112
113         info = data;
114         value_ptr = (uint32_t *)((unsigned long)info->value);
115         value = *value_ptr;
116         switch (info->request) {
117         case RADEON_INFO_DEVICE_ID:
118                 value = dev->pci_device;
119                 break;
120         case RADEON_INFO_NUM_GB_PIPES:
121                 value = rdev->num_gb_pipes;
122                 break;
123         case RADEON_INFO_NUM_Z_PIPES:
124                 value = rdev->num_z_pipes;
125                 break;
126         case RADEON_INFO_ACCEL_WORKING:
127                 /* xf86-video-ati 6.13.0 relies on this being false for evergreen */
128                 if ((rdev->family >= CHIP_CEDAR) && (rdev->family <= CHIP_HEMLOCK))
129                         value = false;
130                 else
131                         value = rdev->accel_working;
132                 break;
133         case RADEON_INFO_CRTC_FROM_ID:
134                 for (i = 0, found = 0; i < rdev->num_crtc; i++) {
135                         crtc = (struct drm_crtc *)minfo->crtcs[i];
136                         if (crtc && crtc->base.id == value) {
137                                 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
138                                 value = radeon_crtc->crtc_id;
139                                 found = 1;
140                                 break;
141                         }
142                 }
143                 if (!found) {
144                         DRM_DEBUG("unknown crtc id %d\n", value);
145                         return -EINVAL;
146                 }
147                 break;
148         case RADEON_INFO_ACCEL_WORKING2:
149                 value = rdev->accel_working;
150                 break;
151         case RADEON_INFO_TILING_CONFIG:
152                 if (rdev->family >= CHIP_CEDAR)
153                         value = rdev->config.evergreen.tile_config;
154                 else if (rdev->family >= CHIP_RV770)
155                         value = rdev->config.rv770.tile_config;
156                 else if (rdev->family >= CHIP_R600)
157                         value = rdev->config.r600.tile_config;
158                 else {
159                         DRM_DEBUG("tiling config is r6xx+ only!\n");
160                         return -EINVAL;
161                 }
162                 break;
163         default:
164                 DRM_DEBUG("Invalid request %d\n", info->request);
165                 return -EINVAL;
166         }
167         if (DRM_COPY_TO_USER(value_ptr, &value, sizeof(uint32_t))) {
168                 DRM_ERROR("copy_to_user\n");
169                 return -EFAULT;
170         }
171         return 0;
172 }
173
174
175 /*
176  * Outdated mess for old drm with Xorg being in charge (void function now).
177  */
178 int radeon_driver_firstopen_kms(struct drm_device *dev)
179 {
180         return 0;
181 }
182
183
184 void radeon_driver_lastclose_kms(struct drm_device *dev)
185 {
186         vga_switcheroo_process_delayed_switch();
187 }
188
189 int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv)
190 {
191         return 0;
192 }
193
194 void radeon_driver_postclose_kms(struct drm_device *dev,
195                                  struct drm_file *file_priv)
196 {
197 }
198
199 void radeon_driver_preclose_kms(struct drm_device *dev,
200                                 struct drm_file *file_priv)
201 {
202 }
203
204
205 /*
206  * VBlank related functions.
207  */
208 u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc)
209 {
210         struct radeon_device *rdev = dev->dev_private;
211
212         if (crtc < 0 || crtc >= rdev->num_crtc) {
213                 DRM_ERROR("Invalid crtc %d\n", crtc);
214                 return -EINVAL;
215         }
216
217         return radeon_get_vblank_counter(rdev, crtc);
218 }
219
220 int radeon_enable_vblank_kms(struct drm_device *dev, int crtc)
221 {
222         struct radeon_device *rdev = dev->dev_private;
223
224         if (crtc < 0 || crtc >= rdev->num_crtc) {
225                 DRM_ERROR("Invalid crtc %d\n", crtc);
226                 return -EINVAL;
227         }
228
229         rdev->irq.crtc_vblank_int[crtc] = true;
230
231         return radeon_irq_set(rdev);
232 }
233
234 void radeon_disable_vblank_kms(struct drm_device *dev, int crtc)
235 {
236         struct radeon_device *rdev = dev->dev_private;
237
238         if (crtc < 0 || crtc >= rdev->num_crtc) {
239                 DRM_ERROR("Invalid crtc %d\n", crtc);
240                 return;
241         }
242
243         rdev->irq.crtc_vblank_int[crtc] = false;
244
245         radeon_irq_set(rdev);
246 }
247
248
249 /*
250  * IOCTL.
251  */
252 int radeon_dma_ioctl_kms(struct drm_device *dev, void *data,
253                          struct drm_file *file_priv)
254 {
255         /* Not valid in KMS. */
256         return -EINVAL;
257 }
258
259 #define KMS_INVALID_IOCTL(name)                                         \
260 int name(struct drm_device *dev, void *data, struct drm_file *file_priv)\
261 {                                                                       \
262         DRM_ERROR("invalid ioctl with kms %s\n", __func__);             \
263         return -EINVAL;                                                 \
264 }
265
266 /*
267  * All these ioctls are invalid in kms world.
268  */
269 KMS_INVALID_IOCTL(radeon_cp_init_kms)
270 KMS_INVALID_IOCTL(radeon_cp_start_kms)
271 KMS_INVALID_IOCTL(radeon_cp_stop_kms)
272 KMS_INVALID_IOCTL(radeon_cp_reset_kms)
273 KMS_INVALID_IOCTL(radeon_cp_idle_kms)
274 KMS_INVALID_IOCTL(radeon_cp_resume_kms)
275 KMS_INVALID_IOCTL(radeon_engine_reset_kms)
276 KMS_INVALID_IOCTL(radeon_fullscreen_kms)
277 KMS_INVALID_IOCTL(radeon_cp_swap_kms)
278 KMS_INVALID_IOCTL(radeon_cp_clear_kms)
279 KMS_INVALID_IOCTL(radeon_cp_vertex_kms)
280 KMS_INVALID_IOCTL(radeon_cp_indices_kms)
281 KMS_INVALID_IOCTL(radeon_cp_texture_kms)
282 KMS_INVALID_IOCTL(radeon_cp_stipple_kms)
283 KMS_INVALID_IOCTL(radeon_cp_indirect_kms)
284 KMS_INVALID_IOCTL(radeon_cp_vertex2_kms)
285 KMS_INVALID_IOCTL(radeon_cp_cmdbuf_kms)
286 KMS_INVALID_IOCTL(radeon_cp_getparam_kms)
287 KMS_INVALID_IOCTL(radeon_cp_flip_kms)
288 KMS_INVALID_IOCTL(radeon_mem_alloc_kms)
289 KMS_INVALID_IOCTL(radeon_mem_free_kms)
290 KMS_INVALID_IOCTL(radeon_mem_init_heap_kms)
291 KMS_INVALID_IOCTL(radeon_irq_emit_kms)
292 KMS_INVALID_IOCTL(radeon_irq_wait_kms)
293 KMS_INVALID_IOCTL(radeon_cp_setparam_kms)
294 KMS_INVALID_IOCTL(radeon_surface_alloc_kms)
295 KMS_INVALID_IOCTL(radeon_surface_free_kms)
296
297
298 struct drm_ioctl_desc radeon_ioctls_kms[] = {
299         DRM_IOCTL_DEF(DRM_RADEON_CP_INIT, radeon_cp_init_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
300         DRM_IOCTL_DEF(DRM_RADEON_CP_START, radeon_cp_start_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
301         DRM_IOCTL_DEF(DRM_RADEON_CP_STOP, radeon_cp_stop_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
302         DRM_IOCTL_DEF(DRM_RADEON_CP_RESET, radeon_cp_reset_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
303         DRM_IOCTL_DEF(DRM_RADEON_CP_IDLE, radeon_cp_idle_kms, DRM_AUTH),
304         DRM_IOCTL_DEF(DRM_RADEON_CP_RESUME, radeon_cp_resume_kms, DRM_AUTH),
305         DRM_IOCTL_DEF(DRM_RADEON_RESET, radeon_engine_reset_kms, DRM_AUTH),
306         DRM_IOCTL_DEF(DRM_RADEON_FULLSCREEN, radeon_fullscreen_kms, DRM_AUTH),
307         DRM_IOCTL_DEF(DRM_RADEON_SWAP, radeon_cp_swap_kms, DRM_AUTH),
308         DRM_IOCTL_DEF(DRM_RADEON_CLEAR, radeon_cp_clear_kms, DRM_AUTH),
309         DRM_IOCTL_DEF(DRM_RADEON_VERTEX, radeon_cp_vertex_kms, DRM_AUTH),
310         DRM_IOCTL_DEF(DRM_RADEON_INDICES, radeon_cp_indices_kms, DRM_AUTH),
311         DRM_IOCTL_DEF(DRM_RADEON_TEXTURE, radeon_cp_texture_kms, DRM_AUTH),
312         DRM_IOCTL_DEF(DRM_RADEON_STIPPLE, radeon_cp_stipple_kms, DRM_AUTH),
313         DRM_IOCTL_DEF(DRM_RADEON_INDIRECT, radeon_cp_indirect_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
314         DRM_IOCTL_DEF(DRM_RADEON_VERTEX2, radeon_cp_vertex2_kms, DRM_AUTH),
315         DRM_IOCTL_DEF(DRM_RADEON_CMDBUF, radeon_cp_cmdbuf_kms, DRM_AUTH),
316         DRM_IOCTL_DEF(DRM_RADEON_GETPARAM, radeon_cp_getparam_kms, DRM_AUTH),
317         DRM_IOCTL_DEF(DRM_RADEON_FLIP, radeon_cp_flip_kms, DRM_AUTH),
318         DRM_IOCTL_DEF(DRM_RADEON_ALLOC, radeon_mem_alloc_kms, DRM_AUTH),
319         DRM_IOCTL_DEF(DRM_RADEON_FREE, radeon_mem_free_kms, DRM_AUTH),
320         DRM_IOCTL_DEF(DRM_RADEON_INIT_HEAP, radeon_mem_init_heap_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
321         DRM_IOCTL_DEF(DRM_RADEON_IRQ_EMIT, radeon_irq_emit_kms, DRM_AUTH),
322         DRM_IOCTL_DEF(DRM_RADEON_IRQ_WAIT, radeon_irq_wait_kms, DRM_AUTH),
323         DRM_IOCTL_DEF(DRM_RADEON_SETPARAM, radeon_cp_setparam_kms, DRM_AUTH),
324         DRM_IOCTL_DEF(DRM_RADEON_SURF_ALLOC, radeon_surface_alloc_kms, DRM_AUTH),
325         DRM_IOCTL_DEF(DRM_RADEON_SURF_FREE, radeon_surface_free_kms, DRM_AUTH),
326         /* KMS */
327         DRM_IOCTL_DEF(DRM_RADEON_GEM_INFO, radeon_gem_info_ioctl, DRM_AUTH|DRM_UNLOCKED),
328         DRM_IOCTL_DEF(DRM_RADEON_GEM_CREATE, radeon_gem_create_ioctl, DRM_AUTH|DRM_UNLOCKED),
329         DRM_IOCTL_DEF(DRM_RADEON_GEM_MMAP, radeon_gem_mmap_ioctl, DRM_AUTH|DRM_UNLOCKED),
330         DRM_IOCTL_DEF(DRM_RADEON_GEM_SET_DOMAIN, radeon_gem_set_domain_ioctl, DRM_AUTH|DRM_UNLOCKED),
331         DRM_IOCTL_DEF(DRM_RADEON_GEM_PREAD, radeon_gem_pread_ioctl, DRM_AUTH|DRM_UNLOCKED),
332         DRM_IOCTL_DEF(DRM_RADEON_GEM_PWRITE, radeon_gem_pwrite_ioctl, DRM_AUTH|DRM_UNLOCKED),
333         DRM_IOCTL_DEF(DRM_RADEON_GEM_WAIT_IDLE, radeon_gem_wait_idle_ioctl, DRM_AUTH|DRM_UNLOCKED),
334         DRM_IOCTL_DEF(DRM_RADEON_CS, radeon_cs_ioctl, DRM_AUTH|DRM_UNLOCKED),
335         DRM_IOCTL_DEF(DRM_RADEON_INFO, radeon_info_ioctl, DRM_AUTH|DRM_UNLOCKED),
336         DRM_IOCTL_DEF(DRM_RADEON_GEM_SET_TILING, radeon_gem_set_tiling_ioctl, DRM_AUTH|DRM_UNLOCKED),
337         DRM_IOCTL_DEF(DRM_RADEON_GEM_GET_TILING, radeon_gem_get_tiling_ioctl, DRM_AUTH|DRM_UNLOCKED),
338         DRM_IOCTL_DEF(DRM_RADEON_GEM_BUSY, radeon_gem_busy_ioctl, DRM_AUTH|DRM_UNLOCKED),
339 };
340 int radeon_max_kms_ioctl = DRM_ARRAY_SIZE(radeon_ioctls_kms);