Merge branches 'arm/rockchip', 'arm/exynos', 'arm/smmu', 'x86/vt-d', 'x86/amd', ...
[sfrench/cifs-2.6.git] / drivers / gpu / drm / radeon / cik.c
1 /*
2  * Copyright 2012 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Alex Deucher
23  */
24 #include <linux/firmware.h>
25 #include <linux/slab.h>
26 #include <linux/module.h>
27 #include "drmP.h"
28 #include "radeon.h"
29 #include "radeon_asic.h"
30 #include "radeon_audio.h"
31 #include "cikd.h"
32 #include "atom.h"
33 #include "cik_blit_shaders.h"
34 #include "radeon_ucode.h"
35 #include "clearstate_ci.h"
36 #include "radeon_kfd.h"
37
38 MODULE_FIRMWARE("radeon/BONAIRE_pfp.bin");
39 MODULE_FIRMWARE("radeon/BONAIRE_me.bin");
40 MODULE_FIRMWARE("radeon/BONAIRE_ce.bin");
41 MODULE_FIRMWARE("radeon/BONAIRE_mec.bin");
42 MODULE_FIRMWARE("radeon/BONAIRE_mc.bin");
43 MODULE_FIRMWARE("radeon/BONAIRE_mc2.bin");
44 MODULE_FIRMWARE("radeon/BONAIRE_rlc.bin");
45 MODULE_FIRMWARE("radeon/BONAIRE_sdma.bin");
46 MODULE_FIRMWARE("radeon/BONAIRE_smc.bin");
47
48 MODULE_FIRMWARE("radeon/bonaire_pfp.bin");
49 MODULE_FIRMWARE("radeon/bonaire_me.bin");
50 MODULE_FIRMWARE("radeon/bonaire_ce.bin");
51 MODULE_FIRMWARE("radeon/bonaire_mec.bin");
52 MODULE_FIRMWARE("radeon/bonaire_mc.bin");
53 MODULE_FIRMWARE("radeon/bonaire_rlc.bin");
54 MODULE_FIRMWARE("radeon/bonaire_sdma.bin");
55 MODULE_FIRMWARE("radeon/bonaire_smc.bin");
56
57 MODULE_FIRMWARE("radeon/HAWAII_pfp.bin");
58 MODULE_FIRMWARE("radeon/HAWAII_me.bin");
59 MODULE_FIRMWARE("radeon/HAWAII_ce.bin");
60 MODULE_FIRMWARE("radeon/HAWAII_mec.bin");
61 MODULE_FIRMWARE("radeon/HAWAII_mc.bin");
62 MODULE_FIRMWARE("radeon/HAWAII_mc2.bin");
63 MODULE_FIRMWARE("radeon/HAWAII_rlc.bin");
64 MODULE_FIRMWARE("radeon/HAWAII_sdma.bin");
65 MODULE_FIRMWARE("radeon/HAWAII_smc.bin");
66
67 MODULE_FIRMWARE("radeon/hawaii_pfp.bin");
68 MODULE_FIRMWARE("radeon/hawaii_me.bin");
69 MODULE_FIRMWARE("radeon/hawaii_ce.bin");
70 MODULE_FIRMWARE("radeon/hawaii_mec.bin");
71 MODULE_FIRMWARE("radeon/hawaii_mc.bin");
72 MODULE_FIRMWARE("radeon/hawaii_rlc.bin");
73 MODULE_FIRMWARE("radeon/hawaii_sdma.bin");
74 MODULE_FIRMWARE("radeon/hawaii_smc.bin");
75
76 MODULE_FIRMWARE("radeon/KAVERI_pfp.bin");
77 MODULE_FIRMWARE("radeon/KAVERI_me.bin");
78 MODULE_FIRMWARE("radeon/KAVERI_ce.bin");
79 MODULE_FIRMWARE("radeon/KAVERI_mec.bin");
80 MODULE_FIRMWARE("radeon/KAVERI_rlc.bin");
81 MODULE_FIRMWARE("radeon/KAVERI_sdma.bin");
82
83 MODULE_FIRMWARE("radeon/kaveri_pfp.bin");
84 MODULE_FIRMWARE("radeon/kaveri_me.bin");
85 MODULE_FIRMWARE("radeon/kaveri_ce.bin");
86 MODULE_FIRMWARE("radeon/kaveri_mec.bin");
87 MODULE_FIRMWARE("radeon/kaveri_mec2.bin");
88 MODULE_FIRMWARE("radeon/kaveri_rlc.bin");
89 MODULE_FIRMWARE("radeon/kaveri_sdma.bin");
90
91 MODULE_FIRMWARE("radeon/KABINI_pfp.bin");
92 MODULE_FIRMWARE("radeon/KABINI_me.bin");
93 MODULE_FIRMWARE("radeon/KABINI_ce.bin");
94 MODULE_FIRMWARE("radeon/KABINI_mec.bin");
95 MODULE_FIRMWARE("radeon/KABINI_rlc.bin");
96 MODULE_FIRMWARE("radeon/KABINI_sdma.bin");
97
98 MODULE_FIRMWARE("radeon/kabini_pfp.bin");
99 MODULE_FIRMWARE("radeon/kabini_me.bin");
100 MODULE_FIRMWARE("radeon/kabini_ce.bin");
101 MODULE_FIRMWARE("radeon/kabini_mec.bin");
102 MODULE_FIRMWARE("radeon/kabini_rlc.bin");
103 MODULE_FIRMWARE("radeon/kabini_sdma.bin");
104
105 MODULE_FIRMWARE("radeon/MULLINS_pfp.bin");
106 MODULE_FIRMWARE("radeon/MULLINS_me.bin");
107 MODULE_FIRMWARE("radeon/MULLINS_ce.bin");
108 MODULE_FIRMWARE("radeon/MULLINS_mec.bin");
109 MODULE_FIRMWARE("radeon/MULLINS_rlc.bin");
110 MODULE_FIRMWARE("radeon/MULLINS_sdma.bin");
111
112 MODULE_FIRMWARE("radeon/mullins_pfp.bin");
113 MODULE_FIRMWARE("radeon/mullins_me.bin");
114 MODULE_FIRMWARE("radeon/mullins_ce.bin");
115 MODULE_FIRMWARE("radeon/mullins_mec.bin");
116 MODULE_FIRMWARE("radeon/mullins_rlc.bin");
117 MODULE_FIRMWARE("radeon/mullins_sdma.bin");
118
119 extern int r600_ih_ring_alloc(struct radeon_device *rdev);
120 extern void r600_ih_ring_fini(struct radeon_device *rdev);
121 extern void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *save);
122 extern void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *save);
123 extern bool evergreen_is_display_hung(struct radeon_device *rdev);
124 extern void sumo_rlc_fini(struct radeon_device *rdev);
125 extern int sumo_rlc_init(struct radeon_device *rdev);
126 extern void si_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc);
127 extern void si_rlc_reset(struct radeon_device *rdev);
128 extern void si_init_uvd_internal_cg(struct radeon_device *rdev);
129 static u32 cik_get_cu_active_bitmap(struct radeon_device *rdev, u32 se, u32 sh);
130 extern int cik_sdma_resume(struct radeon_device *rdev);
131 extern void cik_sdma_enable(struct radeon_device *rdev, bool enable);
132 extern void cik_sdma_fini(struct radeon_device *rdev);
133 extern void vce_v2_0_enable_mgcg(struct radeon_device *rdev, bool enable);
134 static void cik_rlc_stop(struct radeon_device *rdev);
135 static void cik_pcie_gen3_enable(struct radeon_device *rdev);
136 static void cik_program_aspm(struct radeon_device *rdev);
137 static void cik_init_pg(struct radeon_device *rdev);
138 static void cik_init_cg(struct radeon_device *rdev);
139 static void cik_fini_pg(struct radeon_device *rdev);
140 static void cik_fini_cg(struct radeon_device *rdev);
141 static void cik_enable_gui_idle_interrupt(struct radeon_device *rdev,
142                                           bool enable);
143
144 /**
145  * cik_get_allowed_info_register - fetch the register for the info ioctl
146  *
147  * @rdev: radeon_device pointer
148  * @reg: register offset in bytes
149  * @val: register value
150  *
151  * Returns 0 for success or -EINVAL for an invalid register
152  *
153  */
154 int cik_get_allowed_info_register(struct radeon_device *rdev,
155                                   u32 reg, u32 *val)
156 {
157         switch (reg) {
158         case GRBM_STATUS:
159         case GRBM_STATUS2:
160         case GRBM_STATUS_SE0:
161         case GRBM_STATUS_SE1:
162         case GRBM_STATUS_SE2:
163         case GRBM_STATUS_SE3:
164         case SRBM_STATUS:
165         case SRBM_STATUS2:
166         case (SDMA0_STATUS_REG + SDMA0_REGISTER_OFFSET):
167         case (SDMA0_STATUS_REG + SDMA1_REGISTER_OFFSET):
168         case UVD_STATUS:
169         /* TODO VCE */
170                 *val = RREG32(reg);
171                 return 0;
172         default:
173                 return -EINVAL;
174         }
175 }
176
177 /* get temperature in millidegrees */
178 int ci_get_temp(struct radeon_device *rdev)
179 {
180         u32 temp;
181         int actual_temp = 0;
182
183         temp = (RREG32_SMC(CG_MULT_THERMAL_STATUS) & CTF_TEMP_MASK) >>
184                 CTF_TEMP_SHIFT;
185
186         if (temp & 0x200)
187                 actual_temp = 255;
188         else
189                 actual_temp = temp & 0x1ff;
190
191         actual_temp = actual_temp * 1000;
192
193         return actual_temp;
194 }
195
196 /* get temperature in millidegrees */
197 int kv_get_temp(struct radeon_device *rdev)
198 {
199         u32 temp;
200         int actual_temp = 0;
201
202         temp = RREG32_SMC(0xC0300E0C);
203
204         if (temp)
205                 actual_temp = (temp / 8) - 49;
206         else
207                 actual_temp = 0;
208
209         actual_temp = actual_temp * 1000;
210
211         return actual_temp;
212 }
213
214 /*
215  * Indirect registers accessor
216  */
217 u32 cik_pciep_rreg(struct radeon_device *rdev, u32 reg)
218 {
219         unsigned long flags;
220         u32 r;
221
222         spin_lock_irqsave(&rdev->pciep_idx_lock, flags);
223         WREG32(PCIE_INDEX, reg);
224         (void)RREG32(PCIE_INDEX);
225         r = RREG32(PCIE_DATA);
226         spin_unlock_irqrestore(&rdev->pciep_idx_lock, flags);
227         return r;
228 }
229
230 void cik_pciep_wreg(struct radeon_device *rdev, u32 reg, u32 v)
231 {
232         unsigned long flags;
233
234         spin_lock_irqsave(&rdev->pciep_idx_lock, flags);
235         WREG32(PCIE_INDEX, reg);
236         (void)RREG32(PCIE_INDEX);
237         WREG32(PCIE_DATA, v);
238         (void)RREG32(PCIE_DATA);
239         spin_unlock_irqrestore(&rdev->pciep_idx_lock, flags);
240 }
241
242 static const u32 spectre_rlc_save_restore_register_list[] =
243 {
244         (0x0e00 << 16) | (0xc12c >> 2),
245         0x00000000,
246         (0x0e00 << 16) | (0xc140 >> 2),
247         0x00000000,
248         (0x0e00 << 16) | (0xc150 >> 2),
249         0x00000000,
250         (0x0e00 << 16) | (0xc15c >> 2),
251         0x00000000,
252         (0x0e00 << 16) | (0xc168 >> 2),
253         0x00000000,
254         (0x0e00 << 16) | (0xc170 >> 2),
255         0x00000000,
256         (0x0e00 << 16) | (0xc178 >> 2),
257         0x00000000,
258         (0x0e00 << 16) | (0xc204 >> 2),
259         0x00000000,
260         (0x0e00 << 16) | (0xc2b4 >> 2),
261         0x00000000,
262         (0x0e00 << 16) | (0xc2b8 >> 2),
263         0x00000000,
264         (0x0e00 << 16) | (0xc2bc >> 2),
265         0x00000000,
266         (0x0e00 << 16) | (0xc2c0 >> 2),
267         0x00000000,
268         (0x0e00 << 16) | (0x8228 >> 2),
269         0x00000000,
270         (0x0e00 << 16) | (0x829c >> 2),
271         0x00000000,
272         (0x0e00 << 16) | (0x869c >> 2),
273         0x00000000,
274         (0x0600 << 16) | (0x98f4 >> 2),
275         0x00000000,
276         (0x0e00 << 16) | (0x98f8 >> 2),
277         0x00000000,
278         (0x0e00 << 16) | (0x9900 >> 2),
279         0x00000000,
280         (0x0e00 << 16) | (0xc260 >> 2),
281         0x00000000,
282         (0x0e00 << 16) | (0x90e8 >> 2),
283         0x00000000,
284         (0x0e00 << 16) | (0x3c000 >> 2),
285         0x00000000,
286         (0x0e00 << 16) | (0x3c00c >> 2),
287         0x00000000,
288         (0x0e00 << 16) | (0x8c1c >> 2),
289         0x00000000,
290         (0x0e00 << 16) | (0x9700 >> 2),
291         0x00000000,
292         (0x0e00 << 16) | (0xcd20 >> 2),
293         0x00000000,
294         (0x4e00 << 16) | (0xcd20 >> 2),
295         0x00000000,
296         (0x5e00 << 16) | (0xcd20 >> 2),
297         0x00000000,
298         (0x6e00 << 16) | (0xcd20 >> 2),
299         0x00000000,
300         (0x7e00 << 16) | (0xcd20 >> 2),
301         0x00000000,
302         (0x8e00 << 16) | (0xcd20 >> 2),
303         0x00000000,
304         (0x9e00 << 16) | (0xcd20 >> 2),
305         0x00000000,
306         (0xae00 << 16) | (0xcd20 >> 2),
307         0x00000000,
308         (0xbe00 << 16) | (0xcd20 >> 2),
309         0x00000000,
310         (0x0e00 << 16) | (0x89bc >> 2),
311         0x00000000,
312         (0x0e00 << 16) | (0x8900 >> 2),
313         0x00000000,
314         0x3,
315         (0x0e00 << 16) | (0xc130 >> 2),
316         0x00000000,
317         (0x0e00 << 16) | (0xc134 >> 2),
318         0x00000000,
319         (0x0e00 << 16) | (0xc1fc >> 2),
320         0x00000000,
321         (0x0e00 << 16) | (0xc208 >> 2),
322         0x00000000,
323         (0x0e00 << 16) | (0xc264 >> 2),
324         0x00000000,
325         (0x0e00 << 16) | (0xc268 >> 2),
326         0x00000000,
327         (0x0e00 << 16) | (0xc26c >> 2),
328         0x00000000,
329         (0x0e00 << 16) | (0xc270 >> 2),
330         0x00000000,
331         (0x0e00 << 16) | (0xc274 >> 2),
332         0x00000000,
333         (0x0e00 << 16) | (0xc278 >> 2),
334         0x00000000,
335         (0x0e00 << 16) | (0xc27c >> 2),
336         0x00000000,
337         (0x0e00 << 16) | (0xc280 >> 2),
338         0x00000000,
339         (0x0e00 << 16) | (0xc284 >> 2),
340         0x00000000,
341         (0x0e00 << 16) | (0xc288 >> 2),
342         0x00000000,
343         (0x0e00 << 16) | (0xc28c >> 2),
344         0x00000000,
345         (0x0e00 << 16) | (0xc290 >> 2),
346         0x00000000,
347         (0x0e00 << 16) | (0xc294 >> 2),
348         0x00000000,
349         (0x0e00 << 16) | (0xc298 >> 2),
350         0x00000000,
351         (0x0e00 << 16) | (0xc29c >> 2),
352         0x00000000,
353         (0x0e00 << 16) | (0xc2a0 >> 2),
354         0x00000000,
355         (0x0e00 << 16) | (0xc2a4 >> 2),
356         0x00000000,
357         (0x0e00 << 16) | (0xc2a8 >> 2),
358         0x00000000,
359         (0x0e00 << 16) | (0xc2ac  >> 2),
360         0x00000000,
361         (0x0e00 << 16) | (0xc2b0 >> 2),
362         0x00000000,
363         (0x0e00 << 16) | (0x301d0 >> 2),
364         0x00000000,
365         (0x0e00 << 16) | (0x30238 >> 2),
366         0x00000000,
367         (0x0e00 << 16) | (0x30250 >> 2),
368         0x00000000,
369         (0x0e00 << 16) | (0x30254 >> 2),
370         0x00000000,
371         (0x0e00 << 16) | (0x30258 >> 2),
372         0x00000000,
373         (0x0e00 << 16) | (0x3025c >> 2),
374         0x00000000,
375         (0x4e00 << 16) | (0xc900 >> 2),
376         0x00000000,
377         (0x5e00 << 16) | (0xc900 >> 2),
378         0x00000000,
379         (0x6e00 << 16) | (0xc900 >> 2),
380         0x00000000,
381         (0x7e00 << 16) | (0xc900 >> 2),
382         0x00000000,
383         (0x8e00 << 16) | (0xc900 >> 2),
384         0x00000000,
385         (0x9e00 << 16) | (0xc900 >> 2),
386         0x00000000,
387         (0xae00 << 16) | (0xc900 >> 2),
388         0x00000000,
389         (0xbe00 << 16) | (0xc900 >> 2),
390         0x00000000,
391         (0x4e00 << 16) | (0xc904 >> 2),
392         0x00000000,
393         (0x5e00 << 16) | (0xc904 >> 2),
394         0x00000000,
395         (0x6e00 << 16) | (0xc904 >> 2),
396         0x00000000,
397         (0x7e00 << 16) | (0xc904 >> 2),
398         0x00000000,
399         (0x8e00 << 16) | (0xc904 >> 2),
400         0x00000000,
401         (0x9e00 << 16) | (0xc904 >> 2),
402         0x00000000,
403         (0xae00 << 16) | (0xc904 >> 2),
404         0x00000000,
405         (0xbe00 << 16) | (0xc904 >> 2),
406         0x00000000,
407         (0x4e00 << 16) | (0xc908 >> 2),
408         0x00000000,
409         (0x5e00 << 16) | (0xc908 >> 2),
410         0x00000000,
411         (0x6e00 << 16) | (0xc908 >> 2),
412         0x00000000,
413         (0x7e00 << 16) | (0xc908 >> 2),
414         0x00000000,
415         (0x8e00 << 16) | (0xc908 >> 2),
416         0x00000000,
417         (0x9e00 << 16) | (0xc908 >> 2),
418         0x00000000,
419         (0xae00 << 16) | (0xc908 >> 2),
420         0x00000000,
421         (0xbe00 << 16) | (0xc908 >> 2),
422         0x00000000,
423         (0x4e00 << 16) | (0xc90c >> 2),
424         0x00000000,
425         (0x5e00 << 16) | (0xc90c >> 2),
426         0x00000000,
427         (0x6e00 << 16) | (0xc90c >> 2),
428         0x00000000,
429         (0x7e00 << 16) | (0xc90c >> 2),
430         0x00000000,
431         (0x8e00 << 16) | (0xc90c >> 2),
432         0x00000000,
433         (0x9e00 << 16) | (0xc90c >> 2),
434         0x00000000,
435         (0xae00 << 16) | (0xc90c >> 2),
436         0x00000000,
437         (0xbe00 << 16) | (0xc90c >> 2),
438         0x00000000,
439         (0x4e00 << 16) | (0xc910 >> 2),
440         0x00000000,
441         (0x5e00 << 16) | (0xc910 >> 2),
442         0x00000000,
443         (0x6e00 << 16) | (0xc910 >> 2),
444         0x00000000,
445         (0x7e00 << 16) | (0xc910 >> 2),
446         0x00000000,
447         (0x8e00 << 16) | (0xc910 >> 2),
448         0x00000000,
449         (0x9e00 << 16) | (0xc910 >> 2),
450         0x00000000,
451         (0xae00 << 16) | (0xc910 >> 2),
452         0x00000000,
453         (0xbe00 << 16) | (0xc910 >> 2),
454         0x00000000,
455         (0x0e00 << 16) | (0xc99c >> 2),
456         0x00000000,
457         (0x0e00 << 16) | (0x9834 >> 2),
458         0x00000000,
459         (0x0000 << 16) | (0x30f00 >> 2),
460         0x00000000,
461         (0x0001 << 16) | (0x30f00 >> 2),
462         0x00000000,
463         (0x0000 << 16) | (0x30f04 >> 2),
464         0x00000000,
465         (0x0001 << 16) | (0x30f04 >> 2),
466         0x00000000,
467         (0x0000 << 16) | (0x30f08 >> 2),
468         0x00000000,
469         (0x0001 << 16) | (0x30f08 >> 2),
470         0x00000000,
471         (0x0000 << 16) | (0x30f0c >> 2),
472         0x00000000,
473         (0x0001 << 16) | (0x30f0c >> 2),
474         0x00000000,
475         (0x0600 << 16) | (0x9b7c >> 2),
476         0x00000000,
477         (0x0e00 << 16) | (0x8a14 >> 2),
478         0x00000000,
479         (0x0e00 << 16) | (0x8a18 >> 2),
480         0x00000000,
481         (0x0600 << 16) | (0x30a00 >> 2),
482         0x00000000,
483         (0x0e00 << 16) | (0x8bf0 >> 2),
484         0x00000000,
485         (0x0e00 << 16) | (0x8bcc >> 2),
486         0x00000000,
487         (0x0e00 << 16) | (0x8b24 >> 2),
488         0x00000000,
489         (0x0e00 << 16) | (0x30a04 >> 2),
490         0x00000000,
491         (0x0600 << 16) | (0x30a10 >> 2),
492         0x00000000,
493         (0x0600 << 16) | (0x30a14 >> 2),
494         0x00000000,
495         (0x0600 << 16) | (0x30a18 >> 2),
496         0x00000000,
497         (0x0600 << 16) | (0x30a2c >> 2),
498         0x00000000,
499         (0x0e00 << 16) | (0xc700 >> 2),
500         0x00000000,
501         (0x0e00 << 16) | (0xc704 >> 2),
502         0x00000000,
503         (0x0e00 << 16) | (0xc708 >> 2),
504         0x00000000,
505         (0x0e00 << 16) | (0xc768 >> 2),
506         0x00000000,
507         (0x0400 << 16) | (0xc770 >> 2),
508         0x00000000,
509         (0x0400 << 16) | (0xc774 >> 2),
510         0x00000000,
511         (0x0400 << 16) | (0xc778 >> 2),
512         0x00000000,
513         (0x0400 << 16) | (0xc77c >> 2),
514         0x00000000,
515         (0x0400 << 16) | (0xc780 >> 2),
516         0x00000000,
517         (0x0400 << 16) | (0xc784 >> 2),
518         0x00000000,
519         (0x0400 << 16) | (0xc788 >> 2),
520         0x00000000,
521         (0x0400 << 16) | (0xc78c >> 2),
522         0x00000000,
523         (0x0400 << 16) | (0xc798 >> 2),
524         0x00000000,
525         (0x0400 << 16) | (0xc79c >> 2),
526         0x00000000,
527         (0x0400 << 16) | (0xc7a0 >> 2),
528         0x00000000,
529         (0x0400 << 16) | (0xc7a4 >> 2),
530         0x00000000,
531         (0x0400 << 16) | (0xc7a8 >> 2),
532         0x00000000,
533         (0x0400 << 16) | (0xc7ac >> 2),
534         0x00000000,
535         (0x0400 << 16) | (0xc7b0 >> 2),
536         0x00000000,
537         (0x0400 << 16) | (0xc7b4 >> 2),
538         0x00000000,
539         (0x0e00 << 16) | (0x9100 >> 2),
540         0x00000000,
541         (0x0e00 << 16) | (0x3c010 >> 2),
542         0x00000000,
543         (0x0e00 << 16) | (0x92a8 >> 2),
544         0x00000000,
545         (0x0e00 << 16) | (0x92ac >> 2),
546         0x00000000,
547         (0x0e00 << 16) | (0x92b4 >> 2),
548         0x00000000,
549         (0x0e00 << 16) | (0x92b8 >> 2),
550         0x00000000,
551         (0x0e00 << 16) | (0x92bc >> 2),
552         0x00000000,
553         (0x0e00 << 16) | (0x92c0 >> 2),
554         0x00000000,
555         (0x0e00 << 16) | (0x92c4 >> 2),
556         0x00000000,
557         (0x0e00 << 16) | (0x92c8 >> 2),
558         0x00000000,
559         (0x0e00 << 16) | (0x92cc >> 2),
560         0x00000000,
561         (0x0e00 << 16) | (0x92d0 >> 2),
562         0x00000000,
563         (0x0e00 << 16) | (0x8c00 >> 2),
564         0x00000000,
565         (0x0e00 << 16) | (0x8c04 >> 2),
566         0x00000000,
567         (0x0e00 << 16) | (0x8c20 >> 2),
568         0x00000000,
569         (0x0e00 << 16) | (0x8c38 >> 2),
570         0x00000000,
571         (0x0e00 << 16) | (0x8c3c >> 2),
572         0x00000000,
573         (0x0e00 << 16) | (0xae00 >> 2),
574         0x00000000,
575         (0x0e00 << 16) | (0x9604 >> 2),
576         0x00000000,
577         (0x0e00 << 16) | (0xac08 >> 2),
578         0x00000000,
579         (0x0e00 << 16) | (0xac0c >> 2),
580         0x00000000,
581         (0x0e00 << 16) | (0xac10 >> 2),
582         0x00000000,
583         (0x0e00 << 16) | (0xac14 >> 2),
584         0x00000000,
585         (0x0e00 << 16) | (0xac58 >> 2),
586         0x00000000,
587         (0x0e00 << 16) | (0xac68 >> 2),
588         0x00000000,
589         (0x0e00 << 16) | (0xac6c >> 2),
590         0x00000000,
591         (0x0e00 << 16) | (0xac70 >> 2),
592         0x00000000,
593         (0x0e00 << 16) | (0xac74 >> 2),
594         0x00000000,
595         (0x0e00 << 16) | (0xac78 >> 2),
596         0x00000000,
597         (0x0e00 << 16) | (0xac7c >> 2),
598         0x00000000,
599         (0x0e00 << 16) | (0xac80 >> 2),
600         0x00000000,
601         (0x0e00 << 16) | (0xac84 >> 2),
602         0x00000000,
603         (0x0e00 << 16) | (0xac88 >> 2),
604         0x00000000,
605         (0x0e00 << 16) | (0xac8c >> 2),
606         0x00000000,
607         (0x0e00 << 16) | (0x970c >> 2),
608         0x00000000,
609         (0x0e00 << 16) | (0x9714 >> 2),
610         0x00000000,
611         (0x0e00 << 16) | (0x9718 >> 2),
612         0x00000000,
613         (0x0e00 << 16) | (0x971c >> 2),
614         0x00000000,
615         (0x0e00 << 16) | (0x31068 >> 2),
616         0x00000000,
617         (0x4e00 << 16) | (0x31068 >> 2),
618         0x00000000,
619         (0x5e00 << 16) | (0x31068 >> 2),
620         0x00000000,
621         (0x6e00 << 16) | (0x31068 >> 2),
622         0x00000000,
623         (0x7e00 << 16) | (0x31068 >> 2),
624         0x00000000,
625         (0x8e00 << 16) | (0x31068 >> 2),
626         0x00000000,
627         (0x9e00 << 16) | (0x31068 >> 2),
628         0x00000000,
629         (0xae00 << 16) | (0x31068 >> 2),
630         0x00000000,
631         (0xbe00 << 16) | (0x31068 >> 2),
632         0x00000000,
633         (0x0e00 << 16) | (0xcd10 >> 2),
634         0x00000000,
635         (0x0e00 << 16) | (0xcd14 >> 2),
636         0x00000000,
637         (0x0e00 << 16) | (0x88b0 >> 2),
638         0x00000000,
639         (0x0e00 << 16) | (0x88b4 >> 2),
640         0x00000000,
641         (0x0e00 << 16) | (0x88b8 >> 2),
642         0x00000000,
643         (0x0e00 << 16) | (0x88bc >> 2),
644         0x00000000,
645         (0x0400 << 16) | (0x89c0 >> 2),
646         0x00000000,
647         (0x0e00 << 16) | (0x88c4 >> 2),
648         0x00000000,
649         (0x0e00 << 16) | (0x88c8 >> 2),
650         0x00000000,
651         (0x0e00 << 16) | (0x88d0 >> 2),
652         0x00000000,
653         (0x0e00 << 16) | (0x88d4 >> 2),
654         0x00000000,
655         (0x0e00 << 16) | (0x88d8 >> 2),
656         0x00000000,
657         (0x0e00 << 16) | (0x8980 >> 2),
658         0x00000000,
659         (0x0e00 << 16) | (0x30938 >> 2),
660         0x00000000,
661         (0x0e00 << 16) | (0x3093c >> 2),
662         0x00000000,
663         (0x0e00 << 16) | (0x30940 >> 2),
664         0x00000000,
665         (0x0e00 << 16) | (0x89a0 >> 2),
666         0x00000000,
667         (0x0e00 << 16) | (0x30900 >> 2),
668         0x00000000,
669         (0x0e00 << 16) | (0x30904 >> 2),
670         0x00000000,
671         (0x0e00 << 16) | (0x89b4 >> 2),
672         0x00000000,
673         (0x0e00 << 16) | (0x3c210 >> 2),
674         0x00000000,
675         (0x0e00 << 16) | (0x3c214 >> 2),
676         0x00000000,
677         (0x0e00 << 16) | (0x3c218 >> 2),
678         0x00000000,
679         (0x0e00 << 16) | (0x8904 >> 2),
680         0x00000000,
681         0x5,
682         (0x0e00 << 16) | (0x8c28 >> 2),
683         (0x0e00 << 16) | (0x8c2c >> 2),
684         (0x0e00 << 16) | (0x8c30 >> 2),
685         (0x0e00 << 16) | (0x8c34 >> 2),
686         (0x0e00 << 16) | (0x9600 >> 2),
687 };
688
689 static const u32 kalindi_rlc_save_restore_register_list[] =
690 {
691         (0x0e00 << 16) | (0xc12c >> 2),
692         0x00000000,
693         (0x0e00 << 16) | (0xc140 >> 2),
694         0x00000000,
695         (0x0e00 << 16) | (0xc150 >> 2),
696         0x00000000,
697         (0x0e00 << 16) | (0xc15c >> 2),
698         0x00000000,
699         (0x0e00 << 16) | (0xc168 >> 2),
700         0x00000000,
701         (0x0e00 << 16) | (0xc170 >> 2),
702         0x00000000,
703         (0x0e00 << 16) | (0xc204 >> 2),
704         0x00000000,
705         (0x0e00 << 16) | (0xc2b4 >> 2),
706         0x00000000,
707         (0x0e00 << 16) | (0xc2b8 >> 2),
708         0x00000000,
709         (0x0e00 << 16) | (0xc2bc >> 2),
710         0x00000000,
711         (0x0e00 << 16) | (0xc2c0 >> 2),
712         0x00000000,
713         (0x0e00 << 16) | (0x8228 >> 2),
714         0x00000000,
715         (0x0e00 << 16) | (0x829c >> 2),
716         0x00000000,
717         (0x0e00 << 16) | (0x869c >> 2),
718         0x00000000,
719         (0x0600 << 16) | (0x98f4 >> 2),
720         0x00000000,
721         (0x0e00 << 16) | (0x98f8 >> 2),
722         0x00000000,
723         (0x0e00 << 16) | (0x9900 >> 2),
724         0x00000000,
725         (0x0e00 << 16) | (0xc260 >> 2),
726         0x00000000,
727         (0x0e00 << 16) | (0x90e8 >> 2),
728         0x00000000,
729         (0x0e00 << 16) | (0x3c000 >> 2),
730         0x00000000,
731         (0x0e00 << 16) | (0x3c00c >> 2),
732         0x00000000,
733         (0x0e00 << 16) | (0x8c1c >> 2),
734         0x00000000,
735         (0x0e00 << 16) | (0x9700 >> 2),
736         0x00000000,
737         (0x0e00 << 16) | (0xcd20 >> 2),
738         0x00000000,
739         (0x4e00 << 16) | (0xcd20 >> 2),
740         0x00000000,
741         (0x5e00 << 16) | (0xcd20 >> 2),
742         0x00000000,
743         (0x6e00 << 16) | (0xcd20 >> 2),
744         0x00000000,
745         (0x7e00 << 16) | (0xcd20 >> 2),
746         0x00000000,
747         (0x0e00 << 16) | (0x89bc >> 2),
748         0x00000000,
749         (0x0e00 << 16) | (0x8900 >> 2),
750         0x00000000,
751         0x3,
752         (0x0e00 << 16) | (0xc130 >> 2),
753         0x00000000,
754         (0x0e00 << 16) | (0xc134 >> 2),
755         0x00000000,
756         (0x0e00 << 16) | (0xc1fc >> 2),
757         0x00000000,
758         (0x0e00 << 16) | (0xc208 >> 2),
759         0x00000000,
760         (0x0e00 << 16) | (0xc264 >> 2),
761         0x00000000,
762         (0x0e00 << 16) | (0xc268 >> 2),
763         0x00000000,
764         (0x0e00 << 16) | (0xc26c >> 2),
765         0x00000000,
766         (0x0e00 << 16) | (0xc270 >> 2),
767         0x00000000,
768         (0x0e00 << 16) | (0xc274 >> 2),
769         0x00000000,
770         (0x0e00 << 16) | (0xc28c >> 2),
771         0x00000000,
772         (0x0e00 << 16) | (0xc290 >> 2),
773         0x00000000,
774         (0x0e00 << 16) | (0xc294 >> 2),
775         0x00000000,
776         (0x0e00 << 16) | (0xc298 >> 2),
777         0x00000000,
778         (0x0e00 << 16) | (0xc2a0 >> 2),
779         0x00000000,
780         (0x0e00 << 16) | (0xc2a4 >> 2),
781         0x00000000,
782         (0x0e00 << 16) | (0xc2a8 >> 2),
783         0x00000000,
784         (0x0e00 << 16) | (0xc2ac >> 2),
785         0x00000000,
786         (0x0e00 << 16) | (0x301d0 >> 2),
787         0x00000000,
788         (0x0e00 << 16) | (0x30238 >> 2),
789         0x00000000,
790         (0x0e00 << 16) | (0x30250 >> 2),
791         0x00000000,
792         (0x0e00 << 16) | (0x30254 >> 2),
793         0x00000000,
794         (0x0e00 << 16) | (0x30258 >> 2),
795         0x00000000,
796         (0x0e00 << 16) | (0x3025c >> 2),
797         0x00000000,
798         (0x4e00 << 16) | (0xc900 >> 2),
799         0x00000000,
800         (0x5e00 << 16) | (0xc900 >> 2),
801         0x00000000,
802         (0x6e00 << 16) | (0xc900 >> 2),
803         0x00000000,
804         (0x7e00 << 16) | (0xc900 >> 2),
805         0x00000000,
806         (0x4e00 << 16) | (0xc904 >> 2),
807         0x00000000,
808         (0x5e00 << 16) | (0xc904 >> 2),
809         0x00000000,
810         (0x6e00 << 16) | (0xc904 >> 2),
811         0x00000000,
812         (0x7e00 << 16) | (0xc904 >> 2),
813         0x00000000,
814         (0x4e00 << 16) | (0xc908 >> 2),
815         0x00000000,
816         (0x5e00 << 16) | (0xc908 >> 2),
817         0x00000000,
818         (0x6e00 << 16) | (0xc908 >> 2),
819         0x00000000,
820         (0x7e00 << 16) | (0xc908 >> 2),
821         0x00000000,
822         (0x4e00 << 16) | (0xc90c >> 2),
823         0x00000000,
824         (0x5e00 << 16) | (0xc90c >> 2),
825         0x00000000,
826         (0x6e00 << 16) | (0xc90c >> 2),
827         0x00000000,
828         (0x7e00 << 16) | (0xc90c >> 2),
829         0x00000000,
830         (0x4e00 << 16) | (0xc910 >> 2),
831         0x00000000,
832         (0x5e00 << 16) | (0xc910 >> 2),
833         0x00000000,
834         (0x6e00 << 16) | (0xc910 >> 2),
835         0x00000000,
836         (0x7e00 << 16) | (0xc910 >> 2),
837         0x00000000,
838         (0x0e00 << 16) | (0xc99c >> 2),
839         0x00000000,
840         (0x0e00 << 16) | (0x9834 >> 2),
841         0x00000000,
842         (0x0000 << 16) | (0x30f00 >> 2),
843         0x00000000,
844         (0x0000 << 16) | (0x30f04 >> 2),
845         0x00000000,
846         (0x0000 << 16) | (0x30f08 >> 2),
847         0x00000000,
848         (0x0000 << 16) | (0x30f0c >> 2),
849         0x00000000,
850         (0x0600 << 16) | (0x9b7c >> 2),
851         0x00000000,
852         (0x0e00 << 16) | (0x8a14 >> 2),
853         0x00000000,
854         (0x0e00 << 16) | (0x8a18 >> 2),
855         0x00000000,
856         (0x0600 << 16) | (0x30a00 >> 2),
857         0x00000000,
858         (0x0e00 << 16) | (0x8bf0 >> 2),
859         0x00000000,
860         (0x0e00 << 16) | (0x8bcc >> 2),
861         0x00000000,
862         (0x0e00 << 16) | (0x8b24 >> 2),
863         0x00000000,
864         (0x0e00 << 16) | (0x30a04 >> 2),
865         0x00000000,
866         (0x0600 << 16) | (0x30a10 >> 2),
867         0x00000000,
868         (0x0600 << 16) | (0x30a14 >> 2),
869         0x00000000,
870         (0x0600 << 16) | (0x30a18 >> 2),
871         0x00000000,
872         (0x0600 << 16) | (0x30a2c >> 2),
873         0x00000000,
874         (0x0e00 << 16) | (0xc700 >> 2),
875         0x00000000,
876         (0x0e00 << 16) | (0xc704 >> 2),
877         0x00000000,
878         (0x0e00 << 16) | (0xc708 >> 2),
879         0x00000000,
880         (0x0e00 << 16) | (0xc768 >> 2),
881         0x00000000,
882         (0x0400 << 16) | (0xc770 >> 2),
883         0x00000000,
884         (0x0400 << 16) | (0xc774 >> 2),
885         0x00000000,
886         (0x0400 << 16) | (0xc798 >> 2),
887         0x00000000,
888         (0x0400 << 16) | (0xc79c >> 2),
889         0x00000000,
890         (0x0e00 << 16) | (0x9100 >> 2),
891         0x00000000,
892         (0x0e00 << 16) | (0x3c010 >> 2),
893         0x00000000,
894         (0x0e00 << 16) | (0x8c00 >> 2),
895         0x00000000,
896         (0x0e00 << 16) | (0x8c04 >> 2),
897         0x00000000,
898         (0x0e00 << 16) | (0x8c20 >> 2),
899         0x00000000,
900         (0x0e00 << 16) | (0x8c38 >> 2),
901         0x00000000,
902         (0x0e00 << 16) | (0x8c3c >> 2),
903         0x00000000,
904         (0x0e00 << 16) | (0xae00 >> 2),
905         0x00000000,
906         (0x0e00 << 16) | (0x9604 >> 2),
907         0x00000000,
908         (0x0e00 << 16) | (0xac08 >> 2),
909         0x00000000,
910         (0x0e00 << 16) | (0xac0c >> 2),
911         0x00000000,
912         (0x0e00 << 16) | (0xac10 >> 2),
913         0x00000000,
914         (0x0e00 << 16) | (0xac14 >> 2),
915         0x00000000,
916         (0x0e00 << 16) | (0xac58 >> 2),
917         0x00000000,
918         (0x0e00 << 16) | (0xac68 >> 2),
919         0x00000000,
920         (0x0e00 << 16) | (0xac6c >> 2),
921         0x00000000,
922         (0x0e00 << 16) | (0xac70 >> 2),
923         0x00000000,
924         (0x0e00 << 16) | (0xac74 >> 2),
925         0x00000000,
926         (0x0e00 << 16) | (0xac78 >> 2),
927         0x00000000,
928         (0x0e00 << 16) | (0xac7c >> 2),
929         0x00000000,
930         (0x0e00 << 16) | (0xac80 >> 2),
931         0x00000000,
932         (0x0e00 << 16) | (0xac84 >> 2),
933         0x00000000,
934         (0x0e00 << 16) | (0xac88 >> 2),
935         0x00000000,
936         (0x0e00 << 16) | (0xac8c >> 2),
937         0x00000000,
938         (0x0e00 << 16) | (0x970c >> 2),
939         0x00000000,
940         (0x0e00 << 16) | (0x9714 >> 2),
941         0x00000000,
942         (0x0e00 << 16) | (0x9718 >> 2),
943         0x00000000,
944         (0x0e00 << 16) | (0x971c >> 2),
945         0x00000000,
946         (0x0e00 << 16) | (0x31068 >> 2),
947         0x00000000,
948         (0x4e00 << 16) | (0x31068 >> 2),
949         0x00000000,
950         (0x5e00 << 16) | (0x31068 >> 2),
951         0x00000000,
952         (0x6e00 << 16) | (0x31068 >> 2),
953         0x00000000,
954         (0x7e00 << 16) | (0x31068 >> 2),
955         0x00000000,
956         (0x0e00 << 16) | (0xcd10 >> 2),
957         0x00000000,
958         (0x0e00 << 16) | (0xcd14 >> 2),
959         0x00000000,
960         (0x0e00 << 16) | (0x88b0 >> 2),
961         0x00000000,
962         (0x0e00 << 16) | (0x88b4 >> 2),
963         0x00000000,
964         (0x0e00 << 16) | (0x88b8 >> 2),
965         0x00000000,
966         (0x0e00 << 16) | (0x88bc >> 2),
967         0x00000000,
968         (0x0400 << 16) | (0x89c0 >> 2),
969         0x00000000,
970         (0x0e00 << 16) | (0x88c4 >> 2),
971         0x00000000,
972         (0x0e00 << 16) | (0x88c8 >> 2),
973         0x00000000,
974         (0x0e00 << 16) | (0x88d0 >> 2),
975         0x00000000,
976         (0x0e00 << 16) | (0x88d4 >> 2),
977         0x00000000,
978         (0x0e00 << 16) | (0x88d8 >> 2),
979         0x00000000,
980         (0x0e00 << 16) | (0x8980 >> 2),
981         0x00000000,
982         (0x0e00 << 16) | (0x30938 >> 2),
983         0x00000000,
984         (0x0e00 << 16) | (0x3093c >> 2),
985         0x00000000,
986         (0x0e00 << 16) | (0x30940 >> 2),
987         0x00000000,
988         (0x0e00 << 16) | (0x89a0 >> 2),
989         0x00000000,
990         (0x0e00 << 16) | (0x30900 >> 2),
991         0x00000000,
992         (0x0e00 << 16) | (0x30904 >> 2),
993         0x00000000,
994         (0x0e00 << 16) | (0x89b4 >> 2),
995         0x00000000,
996         (0x0e00 << 16) | (0x3e1fc >> 2),
997         0x00000000,
998         (0x0e00 << 16) | (0x3c210 >> 2),
999         0x00000000,
1000         (0x0e00 << 16) | (0x3c214 >> 2),
1001         0x00000000,
1002         (0x0e00 << 16) | (0x3c218 >> 2),
1003         0x00000000,
1004         (0x0e00 << 16) | (0x8904 >> 2),
1005         0x00000000,
1006         0x5,
1007         (0x0e00 << 16) | (0x8c28 >> 2),
1008         (0x0e00 << 16) | (0x8c2c >> 2),
1009         (0x0e00 << 16) | (0x8c30 >> 2),
1010         (0x0e00 << 16) | (0x8c34 >> 2),
1011         (0x0e00 << 16) | (0x9600 >> 2),
1012 };
1013
1014 static const u32 bonaire_golden_spm_registers[] =
1015 {
1016         0x30800, 0xe0ffffff, 0xe0000000
1017 };
1018
1019 static const u32 bonaire_golden_common_registers[] =
1020 {
1021         0xc770, 0xffffffff, 0x00000800,
1022         0xc774, 0xffffffff, 0x00000800,
1023         0xc798, 0xffffffff, 0x00007fbf,
1024         0xc79c, 0xffffffff, 0x00007faf
1025 };
1026
1027 static const u32 bonaire_golden_registers[] =
1028 {
1029         0x3354, 0x00000333, 0x00000333,
1030         0x3350, 0x000c0fc0, 0x00040200,
1031         0x9a10, 0x00010000, 0x00058208,
1032         0x3c000, 0xffff1fff, 0x00140000,
1033         0x3c200, 0xfdfc0fff, 0x00000100,
1034         0x3c234, 0x40000000, 0x40000200,
1035         0x9830, 0xffffffff, 0x00000000,
1036         0x9834, 0xf00fffff, 0x00000400,
1037         0x9838, 0x0002021c, 0x00020200,
1038         0xc78, 0x00000080, 0x00000000,
1039         0x5bb0, 0x000000f0, 0x00000070,
1040         0x5bc0, 0xf0311fff, 0x80300000,
1041         0x98f8, 0x73773777, 0x12010001,
1042         0x350c, 0x00810000, 0x408af000,
1043         0x7030, 0x31000111, 0x00000011,
1044         0x2f48, 0x73773777, 0x12010001,
1045         0x220c, 0x00007fb6, 0x0021a1b1,
1046         0x2210, 0x00007fb6, 0x002021b1,
1047         0x2180, 0x00007fb6, 0x00002191,
1048         0x2218, 0x00007fb6, 0x002121b1,
1049         0x221c, 0x00007fb6, 0x002021b1,
1050         0x21dc, 0x00007fb6, 0x00002191,
1051         0x21e0, 0x00007fb6, 0x00002191,
1052         0x3628, 0x0000003f, 0x0000000a,
1053         0x362c, 0x0000003f, 0x0000000a,
1054         0x2ae4, 0x00073ffe, 0x000022a2,
1055         0x240c, 0x000007ff, 0x00000000,
1056         0x8a14, 0xf000003f, 0x00000007,
1057         0x8bf0, 0x00002001, 0x00000001,
1058         0x8b24, 0xffffffff, 0x00ffffff,
1059         0x30a04, 0x0000ff0f, 0x00000000,
1060         0x28a4c, 0x07ffffff, 0x06000000,
1061         0x4d8, 0x00000fff, 0x00000100,
1062         0x3e78, 0x00000001, 0x00000002,
1063         0x9100, 0x03000000, 0x0362c688,
1064         0x8c00, 0x000000ff, 0x00000001,
1065         0xe40, 0x00001fff, 0x00001fff,
1066         0x9060, 0x0000007f, 0x00000020,
1067         0x9508, 0x00010000, 0x00010000,
1068         0xac14, 0x000003ff, 0x000000f3,
1069         0xac0c, 0xffffffff, 0x00001032
1070 };
1071
1072 static const u32 bonaire_mgcg_cgcg_init[] =
1073 {
1074         0xc420, 0xffffffff, 0xfffffffc,
1075         0x30800, 0xffffffff, 0xe0000000,
1076         0x3c2a0, 0xffffffff, 0x00000100,
1077         0x3c208, 0xffffffff, 0x00000100,
1078         0x3c2c0, 0xffffffff, 0xc0000100,
1079         0x3c2c8, 0xffffffff, 0xc0000100,
1080         0x3c2c4, 0xffffffff, 0xc0000100,
1081         0x55e4, 0xffffffff, 0x00600100,
1082         0x3c280, 0xffffffff, 0x00000100,
1083         0x3c214, 0xffffffff, 0x06000100,
1084         0x3c220, 0xffffffff, 0x00000100,
1085         0x3c218, 0xffffffff, 0x06000100,
1086         0x3c204, 0xffffffff, 0x00000100,
1087         0x3c2e0, 0xffffffff, 0x00000100,
1088         0x3c224, 0xffffffff, 0x00000100,
1089         0x3c200, 0xffffffff, 0x00000100,
1090         0x3c230, 0xffffffff, 0x00000100,
1091         0x3c234, 0xffffffff, 0x00000100,
1092         0x3c250, 0xffffffff, 0x00000100,
1093         0x3c254, 0xffffffff, 0x00000100,
1094         0x3c258, 0xffffffff, 0x00000100,
1095         0x3c25c, 0xffffffff, 0x00000100,
1096         0x3c260, 0xffffffff, 0x00000100,
1097         0x3c27c, 0xffffffff, 0x00000100,
1098         0x3c278, 0xffffffff, 0x00000100,
1099         0x3c210, 0xffffffff, 0x06000100,
1100         0x3c290, 0xffffffff, 0x00000100,
1101         0x3c274, 0xffffffff, 0x00000100,
1102         0x3c2b4, 0xffffffff, 0x00000100,
1103         0x3c2b0, 0xffffffff, 0x00000100,
1104         0x3c270, 0xffffffff, 0x00000100,
1105         0x30800, 0xffffffff, 0xe0000000,
1106         0x3c020, 0xffffffff, 0x00010000,
1107         0x3c024, 0xffffffff, 0x00030002,
1108         0x3c028, 0xffffffff, 0x00040007,
1109         0x3c02c, 0xffffffff, 0x00060005,
1110         0x3c030, 0xffffffff, 0x00090008,
1111         0x3c034, 0xffffffff, 0x00010000,
1112         0x3c038, 0xffffffff, 0x00030002,
1113         0x3c03c, 0xffffffff, 0x00040007,
1114         0x3c040, 0xffffffff, 0x00060005,
1115         0x3c044, 0xffffffff, 0x00090008,
1116         0x3c048, 0xffffffff, 0x00010000,
1117         0x3c04c, 0xffffffff, 0x00030002,
1118         0x3c050, 0xffffffff, 0x00040007,
1119         0x3c054, 0xffffffff, 0x00060005,
1120         0x3c058, 0xffffffff, 0x00090008,
1121         0x3c05c, 0xffffffff, 0x00010000,
1122         0x3c060, 0xffffffff, 0x00030002,
1123         0x3c064, 0xffffffff, 0x00040007,
1124         0x3c068, 0xffffffff, 0x00060005,
1125         0x3c06c, 0xffffffff, 0x00090008,
1126         0x3c070, 0xffffffff, 0x00010000,
1127         0x3c074, 0xffffffff, 0x00030002,
1128         0x3c078, 0xffffffff, 0x00040007,
1129         0x3c07c, 0xffffffff, 0x00060005,
1130         0x3c080, 0xffffffff, 0x00090008,
1131         0x3c084, 0xffffffff, 0x00010000,
1132         0x3c088, 0xffffffff, 0x00030002,
1133         0x3c08c, 0xffffffff, 0x00040007,
1134         0x3c090, 0xffffffff, 0x00060005,
1135         0x3c094, 0xffffffff, 0x00090008,
1136         0x3c098, 0xffffffff, 0x00010000,
1137         0x3c09c, 0xffffffff, 0x00030002,
1138         0x3c0a0, 0xffffffff, 0x00040007,
1139         0x3c0a4, 0xffffffff, 0x00060005,
1140         0x3c0a8, 0xffffffff, 0x00090008,
1141         0x3c000, 0xffffffff, 0x96e00200,
1142         0x8708, 0xffffffff, 0x00900100,
1143         0xc424, 0xffffffff, 0x0020003f,
1144         0x38, 0xffffffff, 0x0140001c,
1145         0x3c, 0x000f0000, 0x000f0000,
1146         0x220, 0xffffffff, 0xC060000C,
1147         0x224, 0xc0000fff, 0x00000100,
1148         0xf90, 0xffffffff, 0x00000100,
1149         0xf98, 0x00000101, 0x00000000,
1150         0x20a8, 0xffffffff, 0x00000104,
1151         0x55e4, 0xff000fff, 0x00000100,
1152         0x30cc, 0xc0000fff, 0x00000104,
1153         0xc1e4, 0x00000001, 0x00000001,
1154         0xd00c, 0xff000ff0, 0x00000100,
1155         0xd80c, 0xff000ff0, 0x00000100
1156 };
1157
1158 static const u32 spectre_golden_spm_registers[] =
1159 {
1160         0x30800, 0xe0ffffff, 0xe0000000
1161 };
1162
1163 static const u32 spectre_golden_common_registers[] =
1164 {
1165         0xc770, 0xffffffff, 0x00000800,
1166         0xc774, 0xffffffff, 0x00000800,
1167         0xc798, 0xffffffff, 0x00007fbf,
1168         0xc79c, 0xffffffff, 0x00007faf
1169 };
1170
1171 static const u32 spectre_golden_registers[] =
1172 {
1173         0x3c000, 0xffff1fff, 0x96940200,
1174         0x3c00c, 0xffff0001, 0xff000000,
1175         0x3c200, 0xfffc0fff, 0x00000100,
1176         0x6ed8, 0x00010101, 0x00010000,
1177         0x9834, 0xf00fffff, 0x00000400,
1178         0x9838, 0xfffffffc, 0x00020200,
1179         0x5bb0, 0x000000f0, 0x00000070,
1180         0x5bc0, 0xf0311fff, 0x80300000,
1181         0x98f8, 0x73773777, 0x12010001,
1182         0x9b7c, 0x00ff0000, 0x00fc0000,
1183         0x2f48, 0x73773777, 0x12010001,
1184         0x8a14, 0xf000003f, 0x00000007,
1185         0x8b24, 0xffffffff, 0x00ffffff,
1186         0x28350, 0x3f3f3fff, 0x00000082,
1187         0x28354, 0x0000003f, 0x00000000,
1188         0x3e78, 0x00000001, 0x00000002,
1189         0x913c, 0xffff03df, 0x00000004,
1190         0xc768, 0x00000008, 0x00000008,
1191         0x8c00, 0x000008ff, 0x00000800,
1192         0x9508, 0x00010000, 0x00010000,
1193         0xac0c, 0xffffffff, 0x54763210,
1194         0x214f8, 0x01ff01ff, 0x00000002,
1195         0x21498, 0x007ff800, 0x00200000,
1196         0x2015c, 0xffffffff, 0x00000f40,
1197         0x30934, 0xffffffff, 0x00000001
1198 };
1199
1200 static const u32 spectre_mgcg_cgcg_init[] =
1201 {
1202         0xc420, 0xffffffff, 0xfffffffc,
1203         0x30800, 0xffffffff, 0xe0000000,
1204         0x3c2a0, 0xffffffff, 0x00000100,
1205         0x3c208, 0xffffffff, 0x00000100,
1206         0x3c2c0, 0xffffffff, 0x00000100,
1207         0x3c2c8, 0xffffffff, 0x00000100,
1208         0x3c2c4, 0xffffffff, 0x00000100,
1209         0x55e4, 0xffffffff, 0x00600100,
1210         0x3c280, 0xffffffff, 0x00000100,
1211         0x3c214, 0xffffffff, 0x06000100,
1212         0x3c220, 0xffffffff, 0x00000100,
1213         0x3c218, 0xffffffff, 0x06000100,
1214         0x3c204, 0xffffffff, 0x00000100,
1215         0x3c2e0, 0xffffffff, 0x00000100,
1216         0x3c224, 0xffffffff, 0x00000100,
1217         0x3c200, 0xffffffff, 0x00000100,
1218         0x3c230, 0xffffffff, 0x00000100,
1219         0x3c234, 0xffffffff, 0x00000100,
1220         0x3c250, 0xffffffff, 0x00000100,
1221         0x3c254, 0xffffffff, 0x00000100,
1222         0x3c258, 0xffffffff, 0x00000100,
1223         0x3c25c, 0xffffffff, 0x00000100,
1224         0x3c260, 0xffffffff, 0x00000100,
1225         0x3c27c, 0xffffffff, 0x00000100,
1226         0x3c278, 0xffffffff, 0x00000100,
1227         0x3c210, 0xffffffff, 0x06000100,
1228         0x3c290, 0xffffffff, 0x00000100,
1229         0x3c274, 0xffffffff, 0x00000100,
1230         0x3c2b4, 0xffffffff, 0x00000100,
1231         0x3c2b0, 0xffffffff, 0x00000100,
1232         0x3c270, 0xffffffff, 0x00000100,
1233         0x30800, 0xffffffff, 0xe0000000,
1234         0x3c020, 0xffffffff, 0x00010000,
1235         0x3c024, 0xffffffff, 0x00030002,
1236         0x3c028, 0xffffffff, 0x00040007,
1237         0x3c02c, 0xffffffff, 0x00060005,
1238         0x3c030, 0xffffffff, 0x00090008,
1239         0x3c034, 0xffffffff, 0x00010000,
1240         0x3c038, 0xffffffff, 0x00030002,
1241         0x3c03c, 0xffffffff, 0x00040007,
1242         0x3c040, 0xffffffff, 0x00060005,
1243         0x3c044, 0xffffffff, 0x00090008,
1244         0x3c048, 0xffffffff, 0x00010000,
1245         0x3c04c, 0xffffffff, 0x00030002,
1246         0x3c050, 0xffffffff, 0x00040007,
1247         0x3c054, 0xffffffff, 0x00060005,
1248         0x3c058, 0xffffffff, 0x00090008,
1249         0x3c05c, 0xffffffff, 0x00010000,
1250         0x3c060, 0xffffffff, 0x00030002,
1251         0x3c064, 0xffffffff, 0x00040007,
1252         0x3c068, 0xffffffff, 0x00060005,
1253         0x3c06c, 0xffffffff, 0x00090008,
1254         0x3c070, 0xffffffff, 0x00010000,
1255         0x3c074, 0xffffffff, 0x00030002,
1256         0x3c078, 0xffffffff, 0x00040007,
1257         0x3c07c, 0xffffffff, 0x00060005,
1258         0x3c080, 0xffffffff, 0x00090008,
1259         0x3c084, 0xffffffff, 0x00010000,
1260         0x3c088, 0xffffffff, 0x00030002,
1261         0x3c08c, 0xffffffff, 0x00040007,
1262         0x3c090, 0xffffffff, 0x00060005,
1263         0x3c094, 0xffffffff, 0x00090008,
1264         0x3c098, 0xffffffff, 0x00010000,
1265         0x3c09c, 0xffffffff, 0x00030002,
1266         0x3c0a0, 0xffffffff, 0x00040007,
1267         0x3c0a4, 0xffffffff, 0x00060005,
1268         0x3c0a8, 0xffffffff, 0x00090008,
1269         0x3c0ac, 0xffffffff, 0x00010000,
1270         0x3c0b0, 0xffffffff, 0x00030002,
1271         0x3c0b4, 0xffffffff, 0x00040007,
1272         0x3c0b8, 0xffffffff, 0x00060005,
1273         0x3c0bc, 0xffffffff, 0x00090008,
1274         0x3c000, 0xffffffff, 0x96e00200,
1275         0x8708, 0xffffffff, 0x00900100,
1276         0xc424, 0xffffffff, 0x0020003f,
1277         0x38, 0xffffffff, 0x0140001c,
1278         0x3c, 0x000f0000, 0x000f0000,
1279         0x220, 0xffffffff, 0xC060000C,
1280         0x224, 0xc0000fff, 0x00000100,
1281         0xf90, 0xffffffff, 0x00000100,
1282         0xf98, 0x00000101, 0x00000000,
1283         0x20a8, 0xffffffff, 0x00000104,
1284         0x55e4, 0xff000fff, 0x00000100,
1285         0x30cc, 0xc0000fff, 0x00000104,
1286         0xc1e4, 0x00000001, 0x00000001,
1287         0xd00c, 0xff000ff0, 0x00000100,
1288         0xd80c, 0xff000ff0, 0x00000100
1289 };
1290
1291 static const u32 kalindi_golden_spm_registers[] =
1292 {
1293         0x30800, 0xe0ffffff, 0xe0000000
1294 };
1295
1296 static const u32 kalindi_golden_common_registers[] =
1297 {
1298         0xc770, 0xffffffff, 0x00000800,
1299         0xc774, 0xffffffff, 0x00000800,
1300         0xc798, 0xffffffff, 0x00007fbf,
1301         0xc79c, 0xffffffff, 0x00007faf
1302 };
1303
1304 static const u32 kalindi_golden_registers[] =
1305 {
1306         0x3c000, 0xffffdfff, 0x6e944040,
1307         0x55e4, 0xff607fff, 0xfc000100,
1308         0x3c220, 0xff000fff, 0x00000100,
1309         0x3c224, 0xff000fff, 0x00000100,
1310         0x3c200, 0xfffc0fff, 0x00000100,
1311         0x6ed8, 0x00010101, 0x00010000,
1312         0x9830, 0xffffffff, 0x00000000,
1313         0x9834, 0xf00fffff, 0x00000400,
1314         0x5bb0, 0x000000f0, 0x00000070,
1315         0x5bc0, 0xf0311fff, 0x80300000,
1316         0x98f8, 0x73773777, 0x12010001,
1317         0x98fc, 0xffffffff, 0x00000010,
1318         0x9b7c, 0x00ff0000, 0x00fc0000,
1319         0x8030, 0x00001f0f, 0x0000100a,
1320         0x2f48, 0x73773777, 0x12010001,
1321         0x2408, 0x000fffff, 0x000c007f,
1322         0x8a14, 0xf000003f, 0x00000007,
1323         0x8b24, 0x3fff3fff, 0x00ffcfff,
1324         0x30a04, 0x0000ff0f, 0x00000000,
1325         0x28a4c, 0x07ffffff, 0x06000000,
1326         0x4d8, 0x00000fff, 0x00000100,
1327         0x3e78, 0x00000001, 0x00000002,
1328         0xc768, 0x00000008, 0x00000008,
1329         0x8c00, 0x000000ff, 0x00000003,
1330         0x214f8, 0x01ff01ff, 0x00000002,
1331         0x21498, 0x007ff800, 0x00200000,
1332         0x2015c, 0xffffffff, 0x00000f40,
1333         0x88c4, 0x001f3ae3, 0x00000082,
1334         0x88d4, 0x0000001f, 0x00000010,
1335         0x30934, 0xffffffff, 0x00000000
1336 };
1337
1338 static const u32 kalindi_mgcg_cgcg_init[] =
1339 {
1340         0xc420, 0xffffffff, 0xfffffffc,
1341         0x30800, 0xffffffff, 0xe0000000,
1342         0x3c2a0, 0xffffffff, 0x00000100,
1343         0x3c208, 0xffffffff, 0x00000100,
1344         0x3c2c0, 0xffffffff, 0x00000100,
1345         0x3c2c8, 0xffffffff, 0x00000100,
1346         0x3c2c4, 0xffffffff, 0x00000100,
1347         0x55e4, 0xffffffff, 0x00600100,
1348         0x3c280, 0xffffffff, 0x00000100,
1349         0x3c214, 0xffffffff, 0x06000100,
1350         0x3c220, 0xffffffff, 0x00000100,
1351         0x3c218, 0xffffffff, 0x06000100,
1352         0x3c204, 0xffffffff, 0x00000100,
1353         0x3c2e0, 0xffffffff, 0x00000100,
1354         0x3c224, 0xffffffff, 0x00000100,
1355         0x3c200, 0xffffffff, 0x00000100,
1356         0x3c230, 0xffffffff, 0x00000100,
1357         0x3c234, 0xffffffff, 0x00000100,
1358         0x3c250, 0xffffffff, 0x00000100,
1359         0x3c254, 0xffffffff, 0x00000100,
1360         0x3c258, 0xffffffff, 0x00000100,
1361         0x3c25c, 0xffffffff, 0x00000100,
1362         0x3c260, 0xffffffff, 0x00000100,
1363         0x3c27c, 0xffffffff, 0x00000100,
1364         0x3c278, 0xffffffff, 0x00000100,
1365         0x3c210, 0xffffffff, 0x06000100,
1366         0x3c290, 0xffffffff, 0x00000100,
1367         0x3c274, 0xffffffff, 0x00000100,
1368         0x3c2b4, 0xffffffff, 0x00000100,
1369         0x3c2b0, 0xffffffff, 0x00000100,
1370         0x3c270, 0xffffffff, 0x00000100,
1371         0x30800, 0xffffffff, 0xe0000000,
1372         0x3c020, 0xffffffff, 0x00010000,
1373         0x3c024, 0xffffffff, 0x00030002,
1374         0x3c028, 0xffffffff, 0x00040007,
1375         0x3c02c, 0xffffffff, 0x00060005,
1376         0x3c030, 0xffffffff, 0x00090008,
1377         0x3c034, 0xffffffff, 0x00010000,
1378         0x3c038, 0xffffffff, 0x00030002,
1379         0x3c03c, 0xffffffff, 0x00040007,
1380         0x3c040, 0xffffffff, 0x00060005,
1381         0x3c044, 0xffffffff, 0x00090008,
1382         0x3c000, 0xffffffff, 0x96e00200,
1383         0x8708, 0xffffffff, 0x00900100,
1384         0xc424, 0xffffffff, 0x0020003f,
1385         0x38, 0xffffffff, 0x0140001c,
1386         0x3c, 0x000f0000, 0x000f0000,
1387         0x220, 0xffffffff, 0xC060000C,
1388         0x224, 0xc0000fff, 0x00000100,
1389         0x20a8, 0xffffffff, 0x00000104,
1390         0x55e4, 0xff000fff, 0x00000100,
1391         0x30cc, 0xc0000fff, 0x00000104,
1392         0xc1e4, 0x00000001, 0x00000001,
1393         0xd00c, 0xff000ff0, 0x00000100,
1394         0xd80c, 0xff000ff0, 0x00000100
1395 };
1396
1397 static const u32 hawaii_golden_spm_registers[] =
1398 {
1399         0x30800, 0xe0ffffff, 0xe0000000
1400 };
1401
1402 static const u32 hawaii_golden_common_registers[] =
1403 {
1404         0x30800, 0xffffffff, 0xe0000000,
1405         0x28350, 0xffffffff, 0x3a00161a,
1406         0x28354, 0xffffffff, 0x0000002e,
1407         0x9a10, 0xffffffff, 0x00018208,
1408         0x98f8, 0xffffffff, 0x12011003
1409 };
1410
1411 static const u32 hawaii_golden_registers[] =
1412 {
1413         0x3354, 0x00000333, 0x00000333,
1414         0x9a10, 0x00010000, 0x00058208,
1415         0x9830, 0xffffffff, 0x00000000,
1416         0x9834, 0xf00fffff, 0x00000400,
1417         0x9838, 0x0002021c, 0x00020200,
1418         0xc78, 0x00000080, 0x00000000,
1419         0x5bb0, 0x000000f0, 0x00000070,
1420         0x5bc0, 0xf0311fff, 0x80300000,
1421         0x350c, 0x00810000, 0x408af000,
1422         0x7030, 0x31000111, 0x00000011,
1423         0x2f48, 0x73773777, 0x12010001,
1424         0x2120, 0x0000007f, 0x0000001b,
1425         0x21dc, 0x00007fb6, 0x00002191,
1426         0x3628, 0x0000003f, 0x0000000a,
1427         0x362c, 0x0000003f, 0x0000000a,
1428         0x2ae4, 0x00073ffe, 0x000022a2,
1429         0x240c, 0x000007ff, 0x00000000,
1430         0x8bf0, 0x00002001, 0x00000001,
1431         0x8b24, 0xffffffff, 0x00ffffff,
1432         0x30a04, 0x0000ff0f, 0x00000000,
1433         0x28a4c, 0x07ffffff, 0x06000000,
1434         0x3e78, 0x00000001, 0x00000002,
1435         0xc768, 0x00000008, 0x00000008,
1436         0xc770, 0x00000f00, 0x00000800,
1437         0xc774, 0x00000f00, 0x00000800,
1438         0xc798, 0x00ffffff, 0x00ff7fbf,
1439         0xc79c, 0x00ffffff, 0x00ff7faf,
1440         0x8c00, 0x000000ff, 0x00000800,
1441         0xe40, 0x00001fff, 0x00001fff,
1442         0x9060, 0x0000007f, 0x00000020,
1443         0x9508, 0x00010000, 0x00010000,
1444         0xae00, 0x00100000, 0x000ff07c,
1445         0xac14, 0x000003ff, 0x0000000f,
1446         0xac10, 0xffffffff, 0x7564fdec,
1447         0xac0c, 0xffffffff, 0x3120b9a8,
1448         0xac08, 0x20000000, 0x0f9c0000
1449 };
1450
1451 static const u32 hawaii_mgcg_cgcg_init[] =
1452 {
1453         0xc420, 0xffffffff, 0xfffffffd,
1454         0x30800, 0xffffffff, 0xe0000000,
1455         0x3c2a0, 0xffffffff, 0x00000100,
1456         0x3c208, 0xffffffff, 0x00000100,
1457         0x3c2c0, 0xffffffff, 0x00000100,
1458         0x3c2c8, 0xffffffff, 0x00000100,
1459         0x3c2c4, 0xffffffff, 0x00000100,
1460         0x55e4, 0xffffffff, 0x00200100,
1461         0x3c280, 0xffffffff, 0x00000100,
1462         0x3c214, 0xffffffff, 0x06000100,
1463         0x3c220, 0xffffffff, 0x00000100,
1464         0x3c218, 0xffffffff, 0x06000100,
1465         0x3c204, 0xffffffff, 0x00000100,
1466         0x3c2e0, 0xffffffff, 0x00000100,
1467         0x3c224, 0xffffffff, 0x00000100,
1468         0x3c200, 0xffffffff, 0x00000100,
1469         0x3c230, 0xffffffff, 0x00000100,
1470         0x3c234, 0xffffffff, 0x00000100,
1471         0x3c250, 0xffffffff, 0x00000100,
1472         0x3c254, 0xffffffff, 0x00000100,
1473         0x3c258, 0xffffffff, 0x00000100,
1474         0x3c25c, 0xffffffff, 0x00000100,
1475         0x3c260, 0xffffffff, 0x00000100,
1476         0x3c27c, 0xffffffff, 0x00000100,
1477         0x3c278, 0xffffffff, 0x00000100,
1478         0x3c210, 0xffffffff, 0x06000100,
1479         0x3c290, 0xffffffff, 0x00000100,
1480         0x3c274, 0xffffffff, 0x00000100,
1481         0x3c2b4, 0xffffffff, 0x00000100,
1482         0x3c2b0, 0xffffffff, 0x00000100,
1483         0x3c270, 0xffffffff, 0x00000100,
1484         0x30800, 0xffffffff, 0xe0000000,
1485         0x3c020, 0xffffffff, 0x00010000,
1486         0x3c024, 0xffffffff, 0x00030002,
1487         0x3c028, 0xffffffff, 0x00040007,
1488         0x3c02c, 0xffffffff, 0x00060005,
1489         0x3c030, 0xffffffff, 0x00090008,
1490         0x3c034, 0xffffffff, 0x00010000,
1491         0x3c038, 0xffffffff, 0x00030002,
1492         0x3c03c, 0xffffffff, 0x00040007,
1493         0x3c040, 0xffffffff, 0x00060005,
1494         0x3c044, 0xffffffff, 0x00090008,
1495         0x3c048, 0xffffffff, 0x00010000,
1496         0x3c04c, 0xffffffff, 0x00030002,
1497         0x3c050, 0xffffffff, 0x00040007,
1498         0x3c054, 0xffffffff, 0x00060005,
1499         0x3c058, 0xffffffff, 0x00090008,
1500         0x3c05c, 0xffffffff, 0x00010000,
1501         0x3c060, 0xffffffff, 0x00030002,
1502         0x3c064, 0xffffffff, 0x00040007,
1503         0x3c068, 0xffffffff, 0x00060005,
1504         0x3c06c, 0xffffffff, 0x00090008,
1505         0x3c070, 0xffffffff, 0x00010000,
1506         0x3c074, 0xffffffff, 0x00030002,
1507         0x3c078, 0xffffffff, 0x00040007,
1508         0x3c07c, 0xffffffff, 0x00060005,
1509         0x3c080, 0xffffffff, 0x00090008,
1510         0x3c084, 0xffffffff, 0x00010000,
1511         0x3c088, 0xffffffff, 0x00030002,
1512         0x3c08c, 0xffffffff, 0x00040007,
1513         0x3c090, 0xffffffff, 0x00060005,
1514         0x3c094, 0xffffffff, 0x00090008,
1515         0x3c098, 0xffffffff, 0x00010000,
1516         0x3c09c, 0xffffffff, 0x00030002,
1517         0x3c0a0, 0xffffffff, 0x00040007,
1518         0x3c0a4, 0xffffffff, 0x00060005,
1519         0x3c0a8, 0xffffffff, 0x00090008,
1520         0x3c0ac, 0xffffffff, 0x00010000,
1521         0x3c0b0, 0xffffffff, 0x00030002,
1522         0x3c0b4, 0xffffffff, 0x00040007,
1523         0x3c0b8, 0xffffffff, 0x00060005,
1524         0x3c0bc, 0xffffffff, 0x00090008,
1525         0x3c0c0, 0xffffffff, 0x00010000,
1526         0x3c0c4, 0xffffffff, 0x00030002,
1527         0x3c0c8, 0xffffffff, 0x00040007,
1528         0x3c0cc, 0xffffffff, 0x00060005,
1529         0x3c0d0, 0xffffffff, 0x00090008,
1530         0x3c0d4, 0xffffffff, 0x00010000,
1531         0x3c0d8, 0xffffffff, 0x00030002,
1532         0x3c0dc, 0xffffffff, 0x00040007,
1533         0x3c0e0, 0xffffffff, 0x00060005,
1534         0x3c0e4, 0xffffffff, 0x00090008,
1535         0x3c0e8, 0xffffffff, 0x00010000,
1536         0x3c0ec, 0xffffffff, 0x00030002,
1537         0x3c0f0, 0xffffffff, 0x00040007,
1538         0x3c0f4, 0xffffffff, 0x00060005,
1539         0x3c0f8, 0xffffffff, 0x00090008,
1540         0xc318, 0xffffffff, 0x00020200,
1541         0x3350, 0xffffffff, 0x00000200,
1542         0x15c0, 0xffffffff, 0x00000400,
1543         0x55e8, 0xffffffff, 0x00000000,
1544         0x2f50, 0xffffffff, 0x00000902,
1545         0x3c000, 0xffffffff, 0x96940200,
1546         0x8708, 0xffffffff, 0x00900100,
1547         0xc424, 0xffffffff, 0x0020003f,
1548         0x38, 0xffffffff, 0x0140001c,
1549         0x3c, 0x000f0000, 0x000f0000,
1550         0x220, 0xffffffff, 0xc060000c,
1551         0x224, 0xc0000fff, 0x00000100,
1552         0xf90, 0xffffffff, 0x00000100,
1553         0xf98, 0x00000101, 0x00000000,
1554         0x20a8, 0xffffffff, 0x00000104,
1555         0x55e4, 0xff000fff, 0x00000100,
1556         0x30cc, 0xc0000fff, 0x00000104,
1557         0xc1e4, 0x00000001, 0x00000001,
1558         0xd00c, 0xff000ff0, 0x00000100,
1559         0xd80c, 0xff000ff0, 0x00000100
1560 };
1561
1562 static const u32 godavari_golden_registers[] =
1563 {
1564         0x55e4, 0xff607fff, 0xfc000100,
1565         0x6ed8, 0x00010101, 0x00010000,
1566         0x9830, 0xffffffff, 0x00000000,
1567         0x98302, 0xf00fffff, 0x00000400,
1568         0x6130, 0xffffffff, 0x00010000,
1569         0x5bb0, 0x000000f0, 0x00000070,
1570         0x5bc0, 0xf0311fff, 0x80300000,
1571         0x98f8, 0x73773777, 0x12010001,
1572         0x98fc, 0xffffffff, 0x00000010,
1573         0x8030, 0x00001f0f, 0x0000100a,
1574         0x2f48, 0x73773777, 0x12010001,
1575         0x2408, 0x000fffff, 0x000c007f,
1576         0x8a14, 0xf000003f, 0x00000007,
1577         0x8b24, 0xffffffff, 0x00ff0fff,
1578         0x30a04, 0x0000ff0f, 0x00000000,
1579         0x28a4c, 0x07ffffff, 0x06000000,
1580         0x4d8, 0x00000fff, 0x00000100,
1581         0xd014, 0x00010000, 0x00810001,
1582         0xd814, 0x00010000, 0x00810001,
1583         0x3e78, 0x00000001, 0x00000002,
1584         0xc768, 0x00000008, 0x00000008,
1585         0xc770, 0x00000f00, 0x00000800,
1586         0xc774, 0x00000f00, 0x00000800,
1587         0xc798, 0x00ffffff, 0x00ff7fbf,
1588         0xc79c, 0x00ffffff, 0x00ff7faf,
1589         0x8c00, 0x000000ff, 0x00000001,
1590         0x214f8, 0x01ff01ff, 0x00000002,
1591         0x21498, 0x007ff800, 0x00200000,
1592         0x2015c, 0xffffffff, 0x00000f40,
1593         0x88c4, 0x001f3ae3, 0x00000082,
1594         0x88d4, 0x0000001f, 0x00000010,
1595         0x30934, 0xffffffff, 0x00000000
1596 };
1597
1598
1599 static void cik_init_golden_registers(struct radeon_device *rdev)
1600 {
1601         /* Some of the registers might be dependent on GRBM_GFX_INDEX */
1602         mutex_lock(&rdev->grbm_idx_mutex);
1603         switch (rdev->family) {
1604         case CHIP_BONAIRE:
1605                 radeon_program_register_sequence(rdev,
1606                                                  bonaire_mgcg_cgcg_init,
1607                                                  (const u32)ARRAY_SIZE(bonaire_mgcg_cgcg_init));
1608                 radeon_program_register_sequence(rdev,
1609                                                  bonaire_golden_registers,
1610                                                  (const u32)ARRAY_SIZE(bonaire_golden_registers));
1611                 radeon_program_register_sequence(rdev,
1612                                                  bonaire_golden_common_registers,
1613                                                  (const u32)ARRAY_SIZE(bonaire_golden_common_registers));
1614                 radeon_program_register_sequence(rdev,
1615                                                  bonaire_golden_spm_registers,
1616                                                  (const u32)ARRAY_SIZE(bonaire_golden_spm_registers));
1617                 break;
1618         case CHIP_KABINI:
1619                 radeon_program_register_sequence(rdev,
1620                                                  kalindi_mgcg_cgcg_init,
1621                                                  (const u32)ARRAY_SIZE(kalindi_mgcg_cgcg_init));
1622                 radeon_program_register_sequence(rdev,
1623                                                  kalindi_golden_registers,
1624                                                  (const u32)ARRAY_SIZE(kalindi_golden_registers));
1625                 radeon_program_register_sequence(rdev,
1626                                                  kalindi_golden_common_registers,
1627                                                  (const u32)ARRAY_SIZE(kalindi_golden_common_registers));
1628                 radeon_program_register_sequence(rdev,
1629                                                  kalindi_golden_spm_registers,
1630                                                  (const u32)ARRAY_SIZE(kalindi_golden_spm_registers));
1631                 break;
1632         case CHIP_MULLINS:
1633                 radeon_program_register_sequence(rdev,
1634                                                  kalindi_mgcg_cgcg_init,
1635                                                  (const u32)ARRAY_SIZE(kalindi_mgcg_cgcg_init));
1636                 radeon_program_register_sequence(rdev,
1637                                                  godavari_golden_registers,
1638                                                  (const u32)ARRAY_SIZE(godavari_golden_registers));
1639                 radeon_program_register_sequence(rdev,
1640                                                  kalindi_golden_common_registers,
1641                                                  (const u32)ARRAY_SIZE(kalindi_golden_common_registers));
1642                 radeon_program_register_sequence(rdev,
1643                                                  kalindi_golden_spm_registers,
1644                                                  (const u32)ARRAY_SIZE(kalindi_golden_spm_registers));
1645                 break;
1646         case CHIP_KAVERI:
1647                 radeon_program_register_sequence(rdev,
1648                                                  spectre_mgcg_cgcg_init,
1649                                                  (const u32)ARRAY_SIZE(spectre_mgcg_cgcg_init));
1650                 radeon_program_register_sequence(rdev,
1651                                                  spectre_golden_registers,
1652                                                  (const u32)ARRAY_SIZE(spectre_golden_registers));
1653                 radeon_program_register_sequence(rdev,
1654                                                  spectre_golden_common_registers,
1655                                                  (const u32)ARRAY_SIZE(spectre_golden_common_registers));
1656                 radeon_program_register_sequence(rdev,
1657                                                  spectre_golden_spm_registers,
1658                                                  (const u32)ARRAY_SIZE(spectre_golden_spm_registers));
1659                 break;
1660         case CHIP_HAWAII:
1661                 radeon_program_register_sequence(rdev,
1662                                                  hawaii_mgcg_cgcg_init,
1663                                                  (const u32)ARRAY_SIZE(hawaii_mgcg_cgcg_init));
1664                 radeon_program_register_sequence(rdev,
1665                                                  hawaii_golden_registers,
1666                                                  (const u32)ARRAY_SIZE(hawaii_golden_registers));
1667                 radeon_program_register_sequence(rdev,
1668                                                  hawaii_golden_common_registers,
1669                                                  (const u32)ARRAY_SIZE(hawaii_golden_common_registers));
1670                 radeon_program_register_sequence(rdev,
1671                                                  hawaii_golden_spm_registers,
1672                                                  (const u32)ARRAY_SIZE(hawaii_golden_spm_registers));
1673                 break;
1674         default:
1675                 break;
1676         }
1677         mutex_unlock(&rdev->grbm_idx_mutex);
1678 }
1679
1680 /**
1681  * cik_get_xclk - get the xclk
1682  *
1683  * @rdev: radeon_device pointer
1684  *
1685  * Returns the reference clock used by the gfx engine
1686  * (CIK).
1687  */
1688 u32 cik_get_xclk(struct radeon_device *rdev)
1689 {
1690         u32 reference_clock = rdev->clock.spll.reference_freq;
1691
1692         if (rdev->flags & RADEON_IS_IGP) {
1693                 if (RREG32_SMC(GENERAL_PWRMGT) & GPU_COUNTER_CLK)
1694                         return reference_clock / 2;
1695         } else {
1696                 if (RREG32_SMC(CG_CLKPIN_CNTL) & XTALIN_DIVIDE)
1697                         return reference_clock / 4;
1698         }
1699         return reference_clock;
1700 }
1701
1702 /**
1703  * cik_mm_rdoorbell - read a doorbell dword
1704  *
1705  * @rdev: radeon_device pointer
1706  * @index: doorbell index
1707  *
1708  * Returns the value in the doorbell aperture at the
1709  * requested doorbell index (CIK).
1710  */
1711 u32 cik_mm_rdoorbell(struct radeon_device *rdev, u32 index)
1712 {
1713         if (index < rdev->doorbell.num_doorbells) {
1714                 return readl(rdev->doorbell.ptr + index);
1715         } else {
1716                 DRM_ERROR("reading beyond doorbell aperture: 0x%08x!\n", index);
1717                 return 0;
1718         }
1719 }
1720
1721 /**
1722  * cik_mm_wdoorbell - write a doorbell dword
1723  *
1724  * @rdev: radeon_device pointer
1725  * @index: doorbell index
1726  * @v: value to write
1727  *
1728  * Writes @v to the doorbell aperture at the
1729  * requested doorbell index (CIK).
1730  */
1731 void cik_mm_wdoorbell(struct radeon_device *rdev, u32 index, u32 v)
1732 {
1733         if (index < rdev->doorbell.num_doorbells) {
1734                 writel(v, rdev->doorbell.ptr + index);
1735         } else {
1736                 DRM_ERROR("writing beyond doorbell aperture: 0x%08x!\n", index);
1737         }
1738 }
1739
1740 #define BONAIRE_IO_MC_REGS_SIZE 36
1741
1742 static const u32 bonaire_io_mc_regs[BONAIRE_IO_MC_REGS_SIZE][2] =
1743 {
1744         {0x00000070, 0x04400000},
1745         {0x00000071, 0x80c01803},
1746         {0x00000072, 0x00004004},
1747         {0x00000073, 0x00000100},
1748         {0x00000074, 0x00ff0000},
1749         {0x00000075, 0x34000000},
1750         {0x00000076, 0x08000014},
1751         {0x00000077, 0x00cc08ec},
1752         {0x00000078, 0x00000400},
1753         {0x00000079, 0x00000000},
1754         {0x0000007a, 0x04090000},
1755         {0x0000007c, 0x00000000},
1756         {0x0000007e, 0x4408a8e8},
1757         {0x0000007f, 0x00000304},
1758         {0x00000080, 0x00000000},
1759         {0x00000082, 0x00000001},
1760         {0x00000083, 0x00000002},
1761         {0x00000084, 0xf3e4f400},
1762         {0x00000085, 0x052024e3},
1763         {0x00000087, 0x00000000},
1764         {0x00000088, 0x01000000},
1765         {0x0000008a, 0x1c0a0000},
1766         {0x0000008b, 0xff010000},
1767         {0x0000008d, 0xffffefff},
1768         {0x0000008e, 0xfff3efff},
1769         {0x0000008f, 0xfff3efbf},
1770         {0x00000092, 0xf7ffffff},
1771         {0x00000093, 0xffffff7f},
1772         {0x00000095, 0x00101101},
1773         {0x00000096, 0x00000fff},
1774         {0x00000097, 0x00116fff},
1775         {0x00000098, 0x60010000},
1776         {0x00000099, 0x10010000},
1777         {0x0000009a, 0x00006000},
1778         {0x0000009b, 0x00001000},
1779         {0x0000009f, 0x00b48000}
1780 };
1781
1782 #define HAWAII_IO_MC_REGS_SIZE 22
1783
1784 static const u32 hawaii_io_mc_regs[HAWAII_IO_MC_REGS_SIZE][2] =
1785 {
1786         {0x0000007d, 0x40000000},
1787         {0x0000007e, 0x40180304},
1788         {0x0000007f, 0x0000ff00},
1789         {0x00000081, 0x00000000},
1790         {0x00000083, 0x00000800},
1791         {0x00000086, 0x00000000},
1792         {0x00000087, 0x00000100},
1793         {0x00000088, 0x00020100},
1794         {0x00000089, 0x00000000},
1795         {0x0000008b, 0x00040000},
1796         {0x0000008c, 0x00000100},
1797         {0x0000008e, 0xff010000},
1798         {0x00000090, 0xffffefff},
1799         {0x00000091, 0xfff3efff},
1800         {0x00000092, 0xfff3efbf},
1801         {0x00000093, 0xf7ffffff},
1802         {0x00000094, 0xffffff7f},
1803         {0x00000095, 0x00000fff},
1804         {0x00000096, 0x00116fff},
1805         {0x00000097, 0x60010000},
1806         {0x00000098, 0x10010000},
1807         {0x0000009f, 0x00c79000}
1808 };
1809
1810
1811 /**
1812  * cik_srbm_select - select specific register instances
1813  *
1814  * @rdev: radeon_device pointer
1815  * @me: selected ME (micro engine)
1816  * @pipe: pipe
1817  * @queue: queue
1818  * @vmid: VMID
1819  *
1820  * Switches the currently active registers instances.  Some
1821  * registers are instanced per VMID, others are instanced per
1822  * me/pipe/queue combination.
1823  */
1824 static void cik_srbm_select(struct radeon_device *rdev,
1825                             u32 me, u32 pipe, u32 queue, u32 vmid)
1826 {
1827         u32 srbm_gfx_cntl = (PIPEID(pipe & 0x3) |
1828                              MEID(me & 0x3) |
1829                              VMID(vmid & 0xf) |
1830                              QUEUEID(queue & 0x7));
1831         WREG32(SRBM_GFX_CNTL, srbm_gfx_cntl);
1832 }
1833
1834 /* ucode loading */
1835 /**
1836  * ci_mc_load_microcode - load MC ucode into the hw
1837  *
1838  * @rdev: radeon_device pointer
1839  *
1840  * Load the GDDR MC ucode into the hw (CIK).
1841  * Returns 0 on success, error on failure.
1842  */
1843 int ci_mc_load_microcode(struct radeon_device *rdev)
1844 {
1845         const __be32 *fw_data = NULL;
1846         const __le32 *new_fw_data = NULL;
1847         u32 running, blackout = 0, tmp;
1848         u32 *io_mc_regs = NULL;
1849         const __le32 *new_io_mc_regs = NULL;
1850         int i, regs_size, ucode_size;
1851
1852         if (!rdev->mc_fw)
1853                 return -EINVAL;
1854
1855         if (rdev->new_fw) {
1856                 const struct mc_firmware_header_v1_0 *hdr =
1857                         (const struct mc_firmware_header_v1_0 *)rdev->mc_fw->data;
1858
1859                 radeon_ucode_print_mc_hdr(&hdr->header);
1860
1861                 regs_size = le32_to_cpu(hdr->io_debug_size_bytes) / (4 * 2);
1862                 new_io_mc_regs = (const __le32 *)
1863                         (rdev->mc_fw->data + le32_to_cpu(hdr->io_debug_array_offset_bytes));
1864                 ucode_size = le32_to_cpu(hdr->header.ucode_size_bytes) / 4;
1865                 new_fw_data = (const __le32 *)
1866                         (rdev->mc_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));
1867         } else {
1868                 ucode_size = rdev->mc_fw->size / 4;
1869
1870                 switch (rdev->family) {
1871                 case CHIP_BONAIRE:
1872                         io_mc_regs = (u32 *)&bonaire_io_mc_regs;
1873                         regs_size = BONAIRE_IO_MC_REGS_SIZE;
1874                         break;
1875                 case CHIP_HAWAII:
1876                         io_mc_regs = (u32 *)&hawaii_io_mc_regs;
1877                         regs_size = HAWAII_IO_MC_REGS_SIZE;
1878                         break;
1879                 default:
1880                         return -EINVAL;
1881                 }
1882                 fw_data = (const __be32 *)rdev->mc_fw->data;
1883         }
1884
1885         running = RREG32(MC_SEQ_SUP_CNTL) & RUN_MASK;
1886
1887         if (running == 0) {
1888                 if (running) {
1889                         blackout = RREG32(MC_SHARED_BLACKOUT_CNTL);
1890                         WREG32(MC_SHARED_BLACKOUT_CNTL, blackout | 1);
1891                 }
1892
1893                 /* reset the engine and set to writable */
1894                 WREG32(MC_SEQ_SUP_CNTL, 0x00000008);
1895                 WREG32(MC_SEQ_SUP_CNTL, 0x00000010);
1896
1897                 /* load mc io regs */
1898                 for (i = 0; i < regs_size; i++) {
1899                         if (rdev->new_fw) {
1900                                 WREG32(MC_SEQ_IO_DEBUG_INDEX, le32_to_cpup(new_io_mc_regs++));
1901                                 WREG32(MC_SEQ_IO_DEBUG_DATA, le32_to_cpup(new_io_mc_regs++));
1902                         } else {
1903                                 WREG32(MC_SEQ_IO_DEBUG_INDEX, io_mc_regs[(i << 1)]);
1904                                 WREG32(MC_SEQ_IO_DEBUG_DATA, io_mc_regs[(i << 1) + 1]);
1905                         }
1906                 }
1907
1908                 tmp = RREG32(MC_SEQ_MISC0);
1909                 if ((rdev->pdev->device == 0x6649) && ((tmp & 0xff00) == 0x5600)) {
1910                         WREG32(MC_SEQ_IO_DEBUG_INDEX, 5);
1911                         WREG32(MC_SEQ_IO_DEBUG_DATA, 0x00000023);
1912                         WREG32(MC_SEQ_IO_DEBUG_INDEX, 9);
1913                         WREG32(MC_SEQ_IO_DEBUG_DATA, 0x000001f0);
1914                 }
1915
1916                 /* load the MC ucode */
1917                 for (i = 0; i < ucode_size; i++) {
1918                         if (rdev->new_fw)
1919                                 WREG32(MC_SEQ_SUP_PGM, le32_to_cpup(new_fw_data++));
1920                         else
1921                                 WREG32(MC_SEQ_SUP_PGM, be32_to_cpup(fw_data++));
1922                 }
1923
1924                 /* put the engine back into the active state */
1925                 WREG32(MC_SEQ_SUP_CNTL, 0x00000008);
1926                 WREG32(MC_SEQ_SUP_CNTL, 0x00000004);
1927                 WREG32(MC_SEQ_SUP_CNTL, 0x00000001);
1928
1929                 /* wait for training to complete */
1930                 for (i = 0; i < rdev->usec_timeout; i++) {
1931                         if (RREG32(MC_SEQ_TRAIN_WAKEUP_CNTL) & TRAIN_DONE_D0)
1932                                 break;
1933                         udelay(1);
1934                 }
1935                 for (i = 0; i < rdev->usec_timeout; i++) {
1936                         if (RREG32(MC_SEQ_TRAIN_WAKEUP_CNTL) & TRAIN_DONE_D1)
1937                                 break;
1938                         udelay(1);
1939                 }
1940
1941                 if (running)
1942                         WREG32(MC_SHARED_BLACKOUT_CNTL, blackout);
1943         }
1944
1945         return 0;
1946 }
1947
1948 /**
1949  * cik_init_microcode - load ucode images from disk
1950  *
1951  * @rdev: radeon_device pointer
1952  *
1953  * Use the firmware interface to load the ucode images into
1954  * the driver (not loaded into hw).
1955  * Returns 0 on success, error on failure.
1956  */
1957 static int cik_init_microcode(struct radeon_device *rdev)
1958 {
1959         const char *chip_name;
1960         const char *new_chip_name;
1961         size_t pfp_req_size, me_req_size, ce_req_size,
1962                 mec_req_size, rlc_req_size, mc_req_size = 0,
1963                 sdma_req_size, smc_req_size = 0, mc2_req_size = 0;
1964         char fw_name[30];
1965         int new_fw = 0;
1966         int err;
1967         int num_fw;
1968
1969         DRM_DEBUG("\n");
1970
1971         switch (rdev->family) {
1972         case CHIP_BONAIRE:
1973                 chip_name = "BONAIRE";
1974                 new_chip_name = "bonaire";
1975                 pfp_req_size = CIK_PFP_UCODE_SIZE * 4;
1976                 me_req_size = CIK_ME_UCODE_SIZE * 4;
1977                 ce_req_size = CIK_CE_UCODE_SIZE * 4;
1978                 mec_req_size = CIK_MEC_UCODE_SIZE * 4;
1979                 rlc_req_size = BONAIRE_RLC_UCODE_SIZE * 4;
1980                 mc_req_size = BONAIRE_MC_UCODE_SIZE * 4;
1981                 mc2_req_size = BONAIRE_MC2_UCODE_SIZE * 4;
1982                 sdma_req_size = CIK_SDMA_UCODE_SIZE * 4;
1983                 smc_req_size = ALIGN(BONAIRE_SMC_UCODE_SIZE, 4);
1984                 num_fw = 8;
1985                 break;
1986         case CHIP_HAWAII:
1987                 chip_name = "HAWAII";
1988                 new_chip_name = "hawaii";
1989                 pfp_req_size = CIK_PFP_UCODE_SIZE * 4;
1990                 me_req_size = CIK_ME_UCODE_SIZE * 4;
1991                 ce_req_size = CIK_CE_UCODE_SIZE * 4;
1992                 mec_req_size = CIK_MEC_UCODE_SIZE * 4;
1993                 rlc_req_size = BONAIRE_RLC_UCODE_SIZE * 4;
1994                 mc_req_size = HAWAII_MC_UCODE_SIZE * 4;
1995                 mc2_req_size = HAWAII_MC2_UCODE_SIZE * 4;
1996                 sdma_req_size = CIK_SDMA_UCODE_SIZE * 4;
1997                 smc_req_size = ALIGN(HAWAII_SMC_UCODE_SIZE, 4);
1998                 num_fw = 8;
1999                 break;
2000         case CHIP_KAVERI:
2001                 chip_name = "KAVERI";
2002                 new_chip_name = "kaveri";
2003                 pfp_req_size = CIK_PFP_UCODE_SIZE * 4;
2004                 me_req_size = CIK_ME_UCODE_SIZE * 4;
2005                 ce_req_size = CIK_CE_UCODE_SIZE * 4;
2006                 mec_req_size = CIK_MEC_UCODE_SIZE * 4;
2007                 rlc_req_size = KV_RLC_UCODE_SIZE * 4;
2008                 sdma_req_size = CIK_SDMA_UCODE_SIZE * 4;
2009                 num_fw = 7;
2010                 break;
2011         case CHIP_KABINI:
2012                 chip_name = "KABINI";
2013                 new_chip_name = "kabini";
2014                 pfp_req_size = CIK_PFP_UCODE_SIZE * 4;
2015                 me_req_size = CIK_ME_UCODE_SIZE * 4;
2016                 ce_req_size = CIK_CE_UCODE_SIZE * 4;
2017                 mec_req_size = CIK_MEC_UCODE_SIZE * 4;
2018                 rlc_req_size = KB_RLC_UCODE_SIZE * 4;
2019                 sdma_req_size = CIK_SDMA_UCODE_SIZE * 4;
2020                 num_fw = 6;
2021                 break;
2022         case CHIP_MULLINS:
2023                 chip_name = "MULLINS";
2024                 new_chip_name = "mullins";
2025                 pfp_req_size = CIK_PFP_UCODE_SIZE * 4;
2026                 me_req_size = CIK_ME_UCODE_SIZE * 4;
2027                 ce_req_size = CIK_CE_UCODE_SIZE * 4;
2028                 mec_req_size = CIK_MEC_UCODE_SIZE * 4;
2029                 rlc_req_size = ML_RLC_UCODE_SIZE * 4;
2030                 sdma_req_size = CIK_SDMA_UCODE_SIZE * 4;
2031                 num_fw = 6;
2032                 break;
2033         default: BUG();
2034         }
2035
2036         DRM_INFO("Loading %s Microcode\n", new_chip_name);
2037
2038         snprintf(fw_name, sizeof(fw_name), "radeon/%s_pfp.bin", new_chip_name);
2039         err = request_firmware(&rdev->pfp_fw, fw_name, rdev->dev);
2040         if (err) {
2041                 snprintf(fw_name, sizeof(fw_name), "radeon/%s_pfp.bin", chip_name);
2042                 err = request_firmware(&rdev->pfp_fw, fw_name, rdev->dev);
2043                 if (err)
2044                         goto out;
2045                 if (rdev->pfp_fw->size != pfp_req_size) {
2046                         printk(KERN_ERR
2047                                "cik_cp: Bogus length %zu in firmware \"%s\"\n",
2048                                rdev->pfp_fw->size, fw_name);
2049                         err = -EINVAL;
2050                         goto out;
2051                 }
2052         } else {
2053                 err = radeon_ucode_validate(rdev->pfp_fw);
2054                 if (err) {
2055                         printk(KERN_ERR
2056                                "cik_fw: validation failed for firmware \"%s\"\n",
2057                                fw_name);
2058                         goto out;
2059                 } else {
2060                         new_fw++;
2061                 }
2062         }
2063
2064         snprintf(fw_name, sizeof(fw_name), "radeon/%s_me.bin", new_chip_name);
2065         err = request_firmware(&rdev->me_fw, fw_name, rdev->dev);
2066         if (err) {
2067                 snprintf(fw_name, sizeof(fw_name), "radeon/%s_me.bin", chip_name);
2068                 err = request_firmware(&rdev->me_fw, fw_name, rdev->dev);
2069                 if (err)
2070                         goto out;
2071                 if (rdev->me_fw->size != me_req_size) {
2072                         printk(KERN_ERR
2073                                "cik_cp: Bogus length %zu in firmware \"%s\"\n",
2074                                rdev->me_fw->size, fw_name);
2075                         err = -EINVAL;
2076                 }
2077         } else {
2078                 err = radeon_ucode_validate(rdev->me_fw);
2079                 if (err) {
2080                         printk(KERN_ERR
2081                                "cik_fw: validation failed for firmware \"%s\"\n",
2082                                fw_name);
2083                         goto out;
2084                 } else {
2085                         new_fw++;
2086                 }
2087         }
2088
2089         snprintf(fw_name, sizeof(fw_name), "radeon/%s_ce.bin", new_chip_name);
2090         err = request_firmware(&rdev->ce_fw, fw_name, rdev->dev);
2091         if (err) {
2092                 snprintf(fw_name, sizeof(fw_name), "radeon/%s_ce.bin", chip_name);
2093                 err = request_firmware(&rdev->ce_fw, fw_name, rdev->dev);
2094                 if (err)
2095                         goto out;
2096                 if (rdev->ce_fw->size != ce_req_size) {
2097                         printk(KERN_ERR
2098                                "cik_cp: Bogus length %zu in firmware \"%s\"\n",
2099                                rdev->ce_fw->size, fw_name);
2100                         err = -EINVAL;
2101                 }
2102         } else {
2103                 err = radeon_ucode_validate(rdev->ce_fw);
2104                 if (err) {
2105                         printk(KERN_ERR
2106                                "cik_fw: validation failed for firmware \"%s\"\n",
2107                                fw_name);
2108                         goto out;
2109                 } else {
2110                         new_fw++;
2111                 }
2112         }
2113
2114         snprintf(fw_name, sizeof(fw_name), "radeon/%s_mec.bin", new_chip_name);
2115         err = request_firmware(&rdev->mec_fw, fw_name, rdev->dev);
2116         if (err) {
2117                 snprintf(fw_name, sizeof(fw_name), "radeon/%s_mec.bin", chip_name);
2118                 err = request_firmware(&rdev->mec_fw, fw_name, rdev->dev);
2119                 if (err)
2120                         goto out;
2121                 if (rdev->mec_fw->size != mec_req_size) {
2122                         printk(KERN_ERR
2123                                "cik_cp: Bogus length %zu in firmware \"%s\"\n",
2124                                rdev->mec_fw->size, fw_name);
2125                         err = -EINVAL;
2126                 }
2127         } else {
2128                 err = radeon_ucode_validate(rdev->mec_fw);
2129                 if (err) {
2130                         printk(KERN_ERR
2131                                "cik_fw: validation failed for firmware \"%s\"\n",
2132                                fw_name);
2133                         goto out;
2134                 } else {
2135                         new_fw++;
2136                 }
2137         }
2138
2139         if (rdev->family == CHIP_KAVERI) {
2140                 snprintf(fw_name, sizeof(fw_name), "radeon/%s_mec2.bin", new_chip_name);
2141                 err = request_firmware(&rdev->mec2_fw, fw_name, rdev->dev);
2142                 if (err) {
2143                         goto out;
2144                 } else {
2145                         err = radeon_ucode_validate(rdev->mec2_fw);
2146                         if (err) {
2147                                 goto out;
2148                         } else {
2149                                 new_fw++;
2150                         }
2151                 }
2152         }
2153
2154         snprintf(fw_name, sizeof(fw_name), "radeon/%s_rlc.bin", new_chip_name);
2155         err = request_firmware(&rdev->rlc_fw, fw_name, rdev->dev);
2156         if (err) {
2157                 snprintf(fw_name, sizeof(fw_name), "radeon/%s_rlc.bin", chip_name);
2158                 err = request_firmware(&rdev->rlc_fw, fw_name, rdev->dev);
2159                 if (err)
2160                         goto out;
2161                 if (rdev->rlc_fw->size != rlc_req_size) {
2162                         printk(KERN_ERR
2163                                "cik_rlc: Bogus length %zu in firmware \"%s\"\n",
2164                                rdev->rlc_fw->size, fw_name);
2165                         err = -EINVAL;
2166                 }
2167         } else {
2168                 err = radeon_ucode_validate(rdev->rlc_fw);
2169                 if (err) {
2170                         printk(KERN_ERR
2171                                "cik_fw: validation failed for firmware \"%s\"\n",
2172                                fw_name);
2173                         goto out;
2174                 } else {
2175                         new_fw++;
2176                 }
2177         }
2178
2179         snprintf(fw_name, sizeof(fw_name), "radeon/%s_sdma.bin", new_chip_name);
2180         err = request_firmware(&rdev->sdma_fw, fw_name, rdev->dev);
2181         if (err) {
2182                 snprintf(fw_name, sizeof(fw_name), "radeon/%s_sdma.bin", chip_name);
2183                 err = request_firmware(&rdev->sdma_fw, fw_name, rdev->dev);
2184                 if (err)
2185                         goto out;
2186                 if (rdev->sdma_fw->size != sdma_req_size) {
2187                         printk(KERN_ERR
2188                                "cik_sdma: Bogus length %zu in firmware \"%s\"\n",
2189                                rdev->sdma_fw->size, fw_name);
2190                         err = -EINVAL;
2191                 }
2192         } else {
2193                 err = radeon_ucode_validate(rdev->sdma_fw);
2194                 if (err) {
2195                         printk(KERN_ERR
2196                                "cik_fw: validation failed for firmware \"%s\"\n",
2197                                fw_name);
2198                         goto out;
2199                 } else {
2200                         new_fw++;
2201                 }
2202         }
2203
2204         /* No SMC, MC ucode on APUs */
2205         if (!(rdev->flags & RADEON_IS_IGP)) {
2206                 snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc.bin", new_chip_name);
2207                 err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev);
2208                 if (err) {
2209                         snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc2.bin", chip_name);
2210                         err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev);
2211                         if (err) {
2212                                 snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc.bin", chip_name);
2213                                 err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev);
2214                                 if (err)
2215                                         goto out;
2216                         }
2217                         if ((rdev->mc_fw->size != mc_req_size) &&
2218                             (rdev->mc_fw->size != mc2_req_size)){
2219                                 printk(KERN_ERR
2220                                        "cik_mc: Bogus length %zu in firmware \"%s\"\n",
2221                                        rdev->mc_fw->size, fw_name);
2222                                 err = -EINVAL;
2223                         }
2224                         DRM_INFO("%s: %zu bytes\n", fw_name, rdev->mc_fw->size);
2225                 } else {
2226                         err = radeon_ucode_validate(rdev->mc_fw);
2227                         if (err) {
2228                                 printk(KERN_ERR
2229                                        "cik_fw: validation failed for firmware \"%s\"\n",
2230                                        fw_name);
2231                                 goto out;
2232                         } else {
2233                                 new_fw++;
2234                         }
2235                 }
2236
2237                 snprintf(fw_name, sizeof(fw_name), "radeon/%s_smc.bin", new_chip_name);
2238                 err = request_firmware(&rdev->smc_fw, fw_name, rdev->dev);
2239                 if (err) {
2240                         snprintf(fw_name, sizeof(fw_name), "radeon/%s_smc.bin", chip_name);
2241                         err = request_firmware(&rdev->smc_fw, fw_name, rdev->dev);
2242                         if (err) {
2243                                 printk(KERN_ERR
2244                                        "smc: error loading firmware \"%s\"\n",
2245                                        fw_name);
2246                                 release_firmware(rdev->smc_fw);
2247                                 rdev->smc_fw = NULL;
2248                                 err = 0;
2249                         } else if (rdev->smc_fw->size != smc_req_size) {
2250                                 printk(KERN_ERR
2251                                        "cik_smc: Bogus length %zu in firmware \"%s\"\n",
2252                                        rdev->smc_fw->size, fw_name);
2253                                 err = -EINVAL;
2254                         }
2255                 } else {
2256                         err = radeon_ucode_validate(rdev->smc_fw);
2257                         if (err) {
2258                                 printk(KERN_ERR
2259                                        "cik_fw: validation failed for firmware \"%s\"\n",
2260                                        fw_name);
2261                                 goto out;
2262                         } else {
2263                                 new_fw++;
2264                         }
2265                 }
2266         }
2267
2268         if (new_fw == 0) {
2269                 rdev->new_fw = false;
2270         } else if (new_fw < num_fw) {
2271                 printk(KERN_ERR "ci_fw: mixing new and old firmware!\n");
2272                 err = -EINVAL;
2273         } else {
2274                 rdev->new_fw = true;
2275         }
2276
2277 out:
2278         if (err) {
2279                 if (err != -EINVAL)
2280                         printk(KERN_ERR
2281                                "cik_cp: Failed to load firmware \"%s\"\n",
2282                                fw_name);
2283                 release_firmware(rdev->pfp_fw);
2284                 rdev->pfp_fw = NULL;
2285                 release_firmware(rdev->me_fw);
2286                 rdev->me_fw = NULL;
2287                 release_firmware(rdev->ce_fw);
2288                 rdev->ce_fw = NULL;
2289                 release_firmware(rdev->mec_fw);
2290                 rdev->mec_fw = NULL;
2291                 release_firmware(rdev->mec2_fw);
2292                 rdev->mec2_fw = NULL;
2293                 release_firmware(rdev->rlc_fw);
2294                 rdev->rlc_fw = NULL;
2295                 release_firmware(rdev->sdma_fw);
2296                 rdev->sdma_fw = NULL;
2297                 release_firmware(rdev->mc_fw);
2298                 rdev->mc_fw = NULL;
2299                 release_firmware(rdev->smc_fw);
2300                 rdev->smc_fw = NULL;
2301         }
2302         return err;
2303 }
2304
2305 /*
2306  * Core functions
2307  */
2308 /**
2309  * cik_tiling_mode_table_init - init the hw tiling table
2310  *
2311  * @rdev: radeon_device pointer
2312  *
2313  * Starting with SI, the tiling setup is done globally in a
2314  * set of 32 tiling modes.  Rather than selecting each set of
2315  * parameters per surface as on older asics, we just select
2316  * which index in the tiling table we want to use, and the
2317  * surface uses those parameters (CIK).
2318  */
2319 static void cik_tiling_mode_table_init(struct radeon_device *rdev)
2320 {
2321         const u32 num_tile_mode_states = 32;
2322         const u32 num_secondary_tile_mode_states = 16;
2323         u32 reg_offset, gb_tile_moden, split_equal_to_row_size;
2324         u32 num_pipe_configs;
2325         u32 num_rbs = rdev->config.cik.max_backends_per_se *
2326                 rdev->config.cik.max_shader_engines;
2327
2328         switch (rdev->config.cik.mem_row_size_in_kb) {
2329         case 1:
2330                 split_equal_to_row_size = ADDR_SURF_TILE_SPLIT_1KB;
2331                 break;
2332         case 2:
2333         default:
2334                 split_equal_to_row_size = ADDR_SURF_TILE_SPLIT_2KB;
2335                 break;
2336         case 4:
2337                 split_equal_to_row_size = ADDR_SURF_TILE_SPLIT_4KB;
2338                 break;
2339         }
2340
2341         num_pipe_configs = rdev->config.cik.max_tile_pipes;
2342         if (num_pipe_configs > 8)
2343                 num_pipe_configs = 16;
2344
2345         if (num_pipe_configs == 16) {
2346                 for (reg_offset = 0; reg_offset < num_tile_mode_states; reg_offset++) {
2347                         switch (reg_offset) {
2348                         case 0:
2349                                 gb_tile_moden = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
2350                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING) |
2351                                                  PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) |
2352                                                  TILE_SPLIT(ADDR_SURF_TILE_SPLIT_64B));
2353                                 break;
2354                         case 1:
2355                                 gb_tile_moden = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
2356                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING) |
2357                                                  PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) |
2358                                                  TILE_SPLIT(ADDR_SURF_TILE_SPLIT_128B));
2359                                 break;
2360                         case 2:
2361                                 gb_tile_moden = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
2362                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING) |
2363                                                  PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) |
2364                                                  TILE_SPLIT(ADDR_SURF_TILE_SPLIT_256B));
2365                                 break;
2366                         case 3:
2367                                 gb_tile_moden = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
2368                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING) |
2369                                                  PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) |
2370                                                  TILE_SPLIT(ADDR_SURF_TILE_SPLIT_512B));
2371                                 break;
2372                         case 4:
2373                                 gb_tile_moden = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
2374                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING) |
2375                                                  PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) |
2376                                                  TILE_SPLIT(split_equal_to_row_size));
2377                                 break;
2378                         case 5:
2379                                 gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
2380                                                  PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) |
2381                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING));
2382                                 break;
2383                         case 6:
2384                                 gb_tile_moden = (ARRAY_MODE(ARRAY_PRT_2D_TILED_THIN1) |
2385                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING) |
2386                                                  PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) |
2387                                                  TILE_SPLIT(ADDR_SURF_TILE_SPLIT_256B));
2388                                 break;
2389                         case 7:
2390                                 gb_tile_moden = (ARRAY_MODE(ARRAY_PRT_2D_TILED_THIN1) |
2391                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING) |
2392                                                  PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) |
2393                                                  TILE_SPLIT(split_equal_to_row_size));
2394                                 break;
2395                         case 8:
2396                                 gb_tile_moden = (ARRAY_MODE(ARRAY_LINEAR_ALIGNED) |
2397                                                  PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16));
2398                                 break;
2399                         case 9:
2400                                 gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
2401                                                  PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) |
2402                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_DISPLAY_MICRO_TILING));
2403                                 break;
2404                         case 10:
2405                                 gb_tile_moden = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
2406                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_DISPLAY_MICRO_TILING) |
2407                                                  PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) |
2408                                                  SAMPLE_SPLIT(ADDR_SURF_SAMPLE_SPLIT_2));
2409                                 break;
2410                         case 11:
2411                                 gb_tile_moden = (ARRAY_MODE(ARRAY_PRT_TILED_THIN1) |
2412                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_DISPLAY_MICRO_TILING) |
2413                                                  PIPE_CONFIG(ADDR_SURF_P16_32x32_8x16) |
2414                                                  SAMPLE_SPLIT(ADDR_SURF_SAMPLE_SPLIT_2));
2415                                 break;
2416                         case 12:
2417                                 gb_tile_moden = (ARRAY_MODE(ARRAY_PRT_2D_TILED_THIN1) |
2418                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_DISPLAY_MICRO_TILING) |
2419                                                  PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) |
2420                                                  SAMPLE_SPLIT(ADDR_SURF_SAMPLE_SPLIT_2));
2421                                 break;
2422                         case 13:
2423                                 gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
2424                                                  PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) |
2425                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_THIN_MICRO_TILING));
2426                                 break;
2427                         case 14:
2428                                 gb_tile_moden = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
2429                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_THIN_MICRO_TILING) |
2430                                                  PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) |
2431                                                  SAMPLE_SPLIT(ADDR_SURF_SAMPLE_SPLIT_2));
2432                                 break;
2433                         case 16:
2434                                 gb_tile_moden = (ARRAY_MODE(ARRAY_PRT_TILED_THIN1) |
2435                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_THIN_MICRO_TILING) |
2436                                                  PIPE_CONFIG(ADDR_SURF_P16_32x32_8x16) |
2437                                                  SAMPLE_SPLIT(ADDR_SURF_SAMPLE_SPLIT_2));
2438                                 break;
2439                         case 17:
2440                                 gb_tile_moden = (ARRAY_MODE(ARRAY_PRT_2D_TILED_THIN1) |
2441                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_THIN_MICRO_TILING) |
2442                                                  PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) |
2443                                                  SAMPLE_SPLIT(ADDR_SURF_SAMPLE_SPLIT_2));
2444                                 break;
2445                         case 27:
2446                                 gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
2447                                                  PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) |
2448                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_ROTATED_MICRO_TILING));
2449                                 break;
2450                         case 28:
2451                                 gb_tile_moden = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
2452                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_ROTATED_MICRO_TILING) |
2453                                                  PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) |
2454                                                  SAMPLE_SPLIT(ADDR_SURF_SAMPLE_SPLIT_2));
2455                                 break;
2456                         case 29:
2457                                 gb_tile_moden = (ARRAY_MODE(ARRAY_PRT_TILED_THIN1) |
2458                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_ROTATED_MICRO_TILING) |
2459                                                  PIPE_CONFIG(ADDR_SURF_P16_32x32_8x16) |
2460                                                  SAMPLE_SPLIT(ADDR_SURF_SAMPLE_SPLIT_2));
2461                                 break;
2462                         case 30:
2463                                 gb_tile_moden = (ARRAY_MODE(ARRAY_PRT_2D_TILED_THIN1) |
2464                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_ROTATED_MICRO_TILING) |
2465                                                  PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) |
2466                                                  SAMPLE_SPLIT(ADDR_SURF_SAMPLE_SPLIT_2));
2467                                 break;
2468                         default:
2469                                 gb_tile_moden = 0;
2470                                 break;
2471                         }
2472                         rdev->config.cik.tile_mode_array[reg_offset] = gb_tile_moden;
2473                         WREG32(GB_TILE_MODE0 + (reg_offset * 4), gb_tile_moden);
2474                 }
2475                 for (reg_offset = 0; reg_offset < num_secondary_tile_mode_states; reg_offset++) {
2476                         switch (reg_offset) {
2477                         case 0:
2478                                 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) |
2479                                                  BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) |
2480                                                  MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) |
2481                                                  NUM_BANKS(ADDR_SURF_16_BANK));
2482                                 break;
2483                         case 1:
2484                                 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) |
2485                                                  BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) |
2486                                                  MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) |
2487                                                  NUM_BANKS(ADDR_SURF_16_BANK));
2488                                 break;
2489                         case 2:
2490                                 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) |
2491                                                  BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |
2492                                                  MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) |
2493                                                  NUM_BANKS(ADDR_SURF_16_BANK));
2494                                 break;
2495                         case 3:
2496                                 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) |
2497                                                  BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |
2498                                                  MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) |
2499                                                  NUM_BANKS(ADDR_SURF_16_BANK));
2500                                 break;
2501                         case 4:
2502                                 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) |
2503                                                  BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |
2504                                                  MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) |
2505                                                  NUM_BANKS(ADDR_SURF_8_BANK));
2506                                 break;
2507                         case 5:
2508                                 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) |
2509                                                  BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |
2510                                                  MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) |
2511                                                  NUM_BANKS(ADDR_SURF_4_BANK));
2512                                 break;
2513                         case 6:
2514                                 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) |
2515                                                  BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |
2516                                                  MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) |
2517                                                  NUM_BANKS(ADDR_SURF_2_BANK));
2518                                 break;
2519                         case 8:
2520                                 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) |
2521                                                  BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) |
2522                                                  MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) |
2523                                                  NUM_BANKS(ADDR_SURF_16_BANK));
2524                                 break;
2525                         case 9:
2526                                 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) |
2527                                                  BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) |
2528                                                  MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) |
2529                                                  NUM_BANKS(ADDR_SURF_16_BANK));
2530                                 break;
2531                         case 10:
2532                                 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) |
2533                                                  BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |
2534                                                  MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) |
2535                                                  NUM_BANKS(ADDR_SURF_16_BANK));
2536                                 break;
2537                         case 11:
2538                                 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) |
2539                                                  BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |
2540                                                  MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) |
2541                                                  NUM_BANKS(ADDR_SURF_8_BANK));
2542                                 break;
2543                         case 12:
2544                                 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) |
2545                                                  BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |
2546                                                  MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) |
2547                                                  NUM_BANKS(ADDR_SURF_4_BANK));
2548                                 break;
2549                         case 13:
2550                                 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) |
2551                                                  BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |
2552                                                  MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) |
2553                                                  NUM_BANKS(ADDR_SURF_2_BANK));
2554                                 break;
2555                         case 14:
2556                                 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) |
2557                                                  BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |
2558                                                  MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) |
2559                                                  NUM_BANKS(ADDR_SURF_2_BANK));
2560                                 break;
2561                         default:
2562                                 gb_tile_moden = 0;
2563                                 break;
2564                         }
2565                         rdev->config.cik.macrotile_mode_array[reg_offset] = gb_tile_moden;
2566                         WREG32(GB_MACROTILE_MODE0 + (reg_offset * 4), gb_tile_moden);
2567                 }
2568         } else if (num_pipe_configs == 8) {
2569                 for (reg_offset = 0; reg_offset < num_tile_mode_states; reg_offset++) {
2570                         switch (reg_offset) {
2571                         case 0:
2572                                 gb_tile_moden = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
2573                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING) |
2574                                                  PIPE_CONFIG(ADDR_SURF_P8_32x32_16x16) |
2575                                                  TILE_SPLIT(ADDR_SURF_TILE_SPLIT_64B));
2576                                 break;
2577                         case 1:
2578                                 gb_tile_moden = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
2579                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING) |
2580                                                  PIPE_CONFIG(ADDR_SURF_P8_32x32_16x16) |
2581                                                  TILE_SPLIT(ADDR_SURF_TILE_SPLIT_128B));
2582                                 break;
2583                         case 2:
2584                                 gb_tile_moden = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
2585                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING) |
2586                                                  PIPE_CONFIG(ADDR_SURF_P8_32x32_16x16) |
2587                                                  TILE_SPLIT(ADDR_SURF_TILE_SPLIT_256B));
2588                                 break;
2589                         case 3:
2590                                 gb_tile_moden = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
2591                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING) |
2592                                                  PIPE_CONFIG(ADDR_SURF_P8_32x32_16x16) |
2593                                                  TILE_SPLIT(ADDR_SURF_TILE_SPLIT_512B));
2594                                 break;
2595                         case 4:
2596                                 gb_tile_moden = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
2597                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING) |
2598                                                  PIPE_CONFIG(ADDR_SURF_P8_32x32_16x16) |
2599                                                  TILE_SPLIT(split_equal_to_row_size));
2600                                 break;
2601                         case 5:
2602                                 gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
2603                                                  PIPE_CONFIG(ADDR_SURF_P8_32x32_16x16) |
2604                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING));
2605                                 break;
2606                         case 6:
2607                                 gb_tile_moden = (ARRAY_MODE(ARRAY_PRT_2D_TILED_THIN1) |
2608                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING) |
2609                                                  PIPE_CONFIG(ADDR_SURF_P8_32x32_16x16) |
2610                                                  TILE_SPLIT(ADDR_SURF_TILE_SPLIT_256B));
2611                                 break;
2612                         case 7:
2613                                 gb_tile_moden = (ARRAY_MODE(ARRAY_PRT_2D_TILED_THIN1) |
2614                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING) |
2615                                                  PIPE_CONFIG(ADDR_SURF_P8_32x32_16x16) |
2616                                                  TILE_SPLIT(split_equal_to_row_size));
2617                                 break;
2618                         case 8:
2619                                 gb_tile_moden = (ARRAY_MODE(ARRAY_LINEAR_ALIGNED) |
2620                                                  PIPE_CONFIG(ADDR_SURF_P8_32x32_16x16));
2621                                 break;
2622                         case 9:
2623                                 gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
2624                                                  PIPE_CONFIG(ADDR_SURF_P8_32x32_16x16) |
2625                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_DISPLAY_MICRO_TILING));
2626                                 break;
2627                         case 10:
2628                                 gb_tile_moden = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
2629                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_DISPLAY_MICRO_TILING) |
2630                                                  PIPE_CONFIG(ADDR_SURF_P8_32x32_16x16) |
2631                                                  SAMPLE_SPLIT(ADDR_SURF_SAMPLE_SPLIT_2));
2632                                 break;
2633                         case 11:
2634                                 gb_tile_moden = (ARRAY_MODE(ARRAY_PRT_TILED_THIN1) |
2635                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_DISPLAY_MICRO_TILING) |
2636                                                  PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) |
2637                                                  SAMPLE_SPLIT(ADDR_SURF_SAMPLE_SPLIT_2));
2638                                 break;
2639                         case 12:
2640                                 gb_tile_moden = (ARRAY_MODE(ARRAY_PRT_2D_TILED_THIN1) |
2641                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_DISPLAY_MICRO_TILING) |
2642                                                  PIPE_CONFIG(ADDR_SURF_P8_32x32_16x16) |
2643                                                  SAMPLE_SPLIT(ADDR_SURF_SAMPLE_SPLIT_2));
2644                                 break;
2645                         case 13:
2646                                 gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
2647                                                  PIPE_CONFIG(ADDR_SURF_P8_32x32_16x16) |
2648                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_THIN_MICRO_TILING));
2649                                 break;
2650                         case 14:
2651                                 gb_tile_moden = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
2652                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_THIN_MICRO_TILING) |
2653                                                  PIPE_CONFIG(ADDR_SURF_P8_32x32_16x16) |
2654                                                  SAMPLE_SPLIT(ADDR_SURF_SAMPLE_SPLIT_2));
2655                                 break;
2656                         case 16:
2657                                 gb_tile_moden = (ARRAY_MODE(ARRAY_PRT_TILED_THIN1) |
2658                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_THIN_MICRO_TILING) |
2659                                                  PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) |
2660                                                  SAMPLE_SPLIT(ADDR_SURF_SAMPLE_SPLIT_2));
2661                                 break;
2662                         case 17:
2663                                 gb_tile_moden = (ARRAY_MODE(ARRAY_PRT_2D_TILED_THIN1) |
2664                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_THIN_MICRO_TILING) |
2665                                                  PIPE_CONFIG(ADDR_SURF_P8_32x32_16x16) |
2666                                                  SAMPLE_SPLIT(ADDR_SURF_SAMPLE_SPLIT_2));
2667                                 break;
2668                         case 27:
2669                                 gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
2670                                                  PIPE_CONFIG(ADDR_SURF_P8_32x32_16x16) |
2671                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_ROTATED_MICRO_TILING));
2672                                 break;
2673                         case 28:
2674                                 gb_tile_moden = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
2675                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_ROTATED_MICRO_TILING) |
2676                                                  PIPE_CONFIG(ADDR_SURF_P8_32x32_16x16) |
2677                                                  SAMPLE_SPLIT(ADDR_SURF_SAMPLE_SPLIT_2));
2678                                 break;
2679                         case 29:
2680                                 gb_tile_moden = (ARRAY_MODE(ARRAY_PRT_TILED_THIN1) |
2681                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_ROTATED_MICRO_TILING) |
2682                                                  PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) |
2683                                                  SAMPLE_SPLIT(ADDR_SURF_SAMPLE_SPLIT_2));
2684                                 break;
2685                         case 30:
2686                                 gb_tile_moden = (ARRAY_MODE(ARRAY_PRT_2D_TILED_THIN1) |
2687                                                  MICRO_TILE_MODE_NEW(ADDR_SURF_ROTATED_MICRO_TILING) |
2688                                                  PIPE_CONFIG(ADDR_SURF_P8_32x32_16x16) |
2689                                                  SAMPLE_SPLIT(ADDR_SURF_SAMPLE_SPLIT_2));
2690                                 break;
2691                         default:
2692                                 gb_tile_moden = 0;
2693                                 break;
2694                         }
2695                         rdev->config.cik.tile_mode_array[reg_offset] = gb_tile_moden;
2696                         WREG32(GB_TILE_MODE0 + (reg_offset * 4), gb_tile_moden);
2697                 }
2698                 for (reg_offset = 0; reg_offset < num_secondary_tile_mode_states; reg_offset++) {
2699                         switch (reg_offset) {
2700                         case 0:
2701                                 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) |
2702                                                  BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) |
2703                                                  MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_4) |
2704                                                  NUM_BANKS(ADDR_SURF_16_BANK));
2705                                 break;
2706                         case 1:
2707                                 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) |
2708                                                  BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) |
2709                                                  MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) |
2710                                                  NUM_BANKS(ADDR_SURF_16_BANK));
2711                                 break;
2712                         case 2:
2713                                 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) |
2714                                                  BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |
2715                                                  MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) |
2716                                                  NUM_BANKS(ADDR_SURF_16_BANK));
2717                                 break;
2718                         case 3:
2719                                 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) |
2720                                                  BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |
2721                                                  MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) |
2722                                                  NUM_BANKS(ADDR_SURF_16_BANK));
2723                                 break;
2724                         case 4:
2725                                 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) |
2726                                                  BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |
2727                                                  MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) |
2728                                                  NUM_BANKS(ADDR_SURF_8_BANK));
2729                                 break;
2730                         case 5:
2731                                 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) |
2732                                                  BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |
2733                                                  MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) |
2734                                                  NUM_BANKS(ADDR_SURF_4_BANK));
2735                                 break;
2736                         case 6:
2737                                 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) |
2738                                                  BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |
2739                                                  MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) |
2740                                                  NUM_BANKS(ADDR_SURF_2_BANK));
2741                                 break;
2742                         case 8:
2743                                 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) |
2744                                                  BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_8) |
2745                                                  MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_4) |
2746                                                  NUM_BANKS(ADDR_SURF_16_BANK));
2747                                 break;
2748                         case 9:
2749                                 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) |
2750                                                  BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) |
2751                                                  MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_4) |
2752                                                  NUM_BANKS(ADDR_SURF_16_BANK));
2753                                 break;
2754                         case 10:
2755                                 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) |
2756                                                  BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) |
2757                                                  MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) |
2758                                                  NUM_BANKS(ADDR_SURF_16_BANK));
2759                                 break;
2760                         case 11:
2761                                 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) |
2762                                                  BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |
2763                                                  MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) |
2764                                                  NUM_BANKS(ADDR_SURF_16_BANK));
2765                                 break;
2766                         case 12:
2767                                 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) |
2768                                                  BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |
2769                                                  MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) |
2770                                                  NUM_BANKS(ADDR_SURF_8_BANK));
2771                                 break;
2772                         case 13:
2773                                 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) |
2774                                                  BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |
2775                                                  MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) |
2776                                                  NUM_BANKS(ADDR_SURF_4_BANK));
2777                                 break;
2778                         case 14:
2779                                 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) |
2780                                                  BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |
2781                                                  MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) |
2782                                                  NUM_BANKS(ADDR_SURF_2_BANK));
2783                                 break;
2784                         default:
2785                                 gb_tile_moden = 0;
2786                                 break;
2787                         }
2788                         rdev->config.cik.macrotile_mode_array[reg_offset] = gb_tile_moden;
2789                         WREG32(GB_MACROTILE_MODE0 + (reg_offset * 4), gb_tile_moden);
2790                 }
2791         } else if (num_pipe_configs == 4) {
2792                 if (num_rbs == 4) {
2793                         for (reg_offset = 0; reg_offset < num_tile_mode_states; reg_offset++) {
2794                                 switch (reg_offset) {
2795                                 case 0:
2796                                         gb_tile_moden = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
2797                                                          MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING) |
2798                                                          PIPE_CONFIG(ADDR_SURF_P4_16x16) |
2799                                                          TILE_SPLIT(ADDR_SURF_TILE_SPLIT_64B));
2800                                         break;
2801                                 case 1:
2802                                         gb_tile_moden = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
2803                                                          MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING) |
2804                                                          PIPE_CONFIG(ADDR_SURF_P4_16x16) |
2805                                                          TILE_SPLIT(ADDR_SURF_TILE_SPLIT_128B));
2806                                         break;
2807                                 case 2:
2808                                         gb_tile_moden = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
2809                                                          MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING) |
2810                                                          PIPE_CONFIG(ADDR_SURF_P4_16x16) |
2811                                                          TILE_SPLIT(ADDR_SURF_TILE_SPLIT_256B));
2812                                         break;
2813                                 case 3:
2814                                         gb_tile_moden = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
2815                                                          MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING) |
2816                                                          PIPE_CONFIG(ADDR_SURF_P4_16x16) |
2817                                                          TILE_SPLIT(ADDR_SURF_TILE_SPLIT_512B));
2818                                         break;
2819                                 case 4:
2820                                         gb_tile_moden = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
2821                                                          MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING) |
2822                                                          PIPE_CONFIG(ADDR_SURF_P4_16x16) |
2823                                                          TILE_SPLIT(split_equal_to_row_size));
2824                                         break;
2825                                 case 5:
2826                                         gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
2827                                                          PIPE_CONFIG(ADDR_SURF_P4_16x16) |
2828                                                          MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING));
2829                                         break;
2830                                 case 6:
2831                                         gb_tile_moden = (ARRAY_MODE(ARRAY_PRT_2D_TILED_THIN1) |
2832                                                          MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING) |
2833                                                          PIPE_CONFIG(ADDR_SURF_P4_16x16) |
2834                                                          TILE_SPLIT(ADDR_SURF_TILE_SPLIT_256B));
2835                                         break;
2836                                 case 7:
2837                                         gb_tile_moden = (ARRAY_MODE(ARRAY_PRT_2D_TILED_THIN1) |
2838                                                          MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING) |
2839                                                          PIPE_CONFIG(ADDR_SURF_P4_16x16) |
2840                                                          TILE_SPLIT(split_equal_to_row_size));
2841                                         break;
2842                                 case 8:
2843                                         gb_tile_moden = (ARRAY_MODE(ARRAY_LINEAR_ALIGNED) |
2844                                                          PIPE_CONFIG(ADDR_SURF_P4_16x16));
2845                                         break;
2846                                 case 9:
2847                                         gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
2848                                                          PIPE_CONFIG(ADDR_SURF_P4_16x16) |
2849                                                          MICRO_TILE_MODE_NEW(ADDR_SURF_DISPLAY_MICRO_TILING));
2850                                         break;
2851                                 case 10:
2852                                         gb_tile_moden = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
2853                                                          MICRO_TILE_MODE_NEW(ADDR_SURF_DISPLAY_MICRO_TILING) |
2854                                                          PIPE_CONFIG(ADDR_SURF_P4_16x16) |
2855                                                          SAMPLE_SPLIT(ADDR_SURF_SAMPLE_SPLIT_2));
2856                                         break;
2857                                 case 11:
2858                                         gb_tile_moden = (ARRAY_MODE(ARRAY_PRT_TILED_THIN1) |
2859                                                          MICRO_TILE_MODE_NEW(ADDR_SURF_DISPLAY_MICRO_TILING) |
2860                                                          PIPE_CONFIG(ADDR_SURF_P4_8x16) |
2861                                                          SAMPLE_SPLIT(ADDR_SURF_SAMPLE_SPLIT_2));
2862                                         break;
2863                                 case 12:
2864                                         gb_tile_moden = (ARRAY_MODE(ARRAY_PRT_2D_TILED_THIN1) |
2865                                                          MICRO_TILE_MODE_NEW(ADDR_SURF_DISPLAY_MICRO_TILING) |
2866                                                          PIPE_CONFIG(ADDR_SURF_P4_16x16) |
2867                                                          SAMPLE_SPLIT(ADDR_SURF_SAMPLE_SPLIT_2));
2868                                         break;
2869                                 case 13:
2870                                         gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
2871                                                          PIPE_CONFIG(ADDR_SURF_P4_16x16) |
2872                                                          MICRO_TILE_MODE_NEW(ADDR_SURF_THIN_MICRO_TILING));
2873                                         break;
2874                                 case 14:
2875                                         gb_tile_moden = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
2876                                                          MICRO_TILE_MODE_NEW(ADDR_SURF_THIN_MICRO_TILING) |