2 * Copyright (C) 2016 Texas Instruments
3 * Author: Tomi Valkeinen <tomi.valkeinen@ti.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
18 #ifndef __OMAP_DRM_DSS_H
19 #define __OMAP_DRM_DSS_H
21 #include <linux/list.h>
22 #include <linux/kobject.h>
23 #include <linux/device.h>
24 #include <linux/interrupt.h>
25 #include <video/videomode.h>
26 #include <linux/platform_data/omapdss.h>
27 #include <uapi/drm/drm_mode.h>
29 #define DISPC_IRQ_FRAMEDONE (1 << 0)
30 #define DISPC_IRQ_VSYNC (1 << 1)
31 #define DISPC_IRQ_EVSYNC_EVEN (1 << 2)
32 #define DISPC_IRQ_EVSYNC_ODD (1 << 3)
33 #define DISPC_IRQ_ACBIAS_COUNT_STAT (1 << 4)
34 #define DISPC_IRQ_PROG_LINE_NUM (1 << 5)
35 #define DISPC_IRQ_GFX_FIFO_UNDERFLOW (1 << 6)
36 #define DISPC_IRQ_GFX_END_WIN (1 << 7)
37 #define DISPC_IRQ_PAL_GAMMA_MASK (1 << 8)
38 #define DISPC_IRQ_OCP_ERR (1 << 9)
39 #define DISPC_IRQ_VID1_FIFO_UNDERFLOW (1 << 10)
40 #define DISPC_IRQ_VID1_END_WIN (1 << 11)
41 #define DISPC_IRQ_VID2_FIFO_UNDERFLOW (1 << 12)
42 #define DISPC_IRQ_VID2_END_WIN (1 << 13)
43 #define DISPC_IRQ_SYNC_LOST (1 << 14)
44 #define DISPC_IRQ_SYNC_LOST_DIGIT (1 << 15)
45 #define DISPC_IRQ_WAKEUP (1 << 16)
46 #define DISPC_IRQ_SYNC_LOST2 (1 << 17)
47 #define DISPC_IRQ_VSYNC2 (1 << 18)
48 #define DISPC_IRQ_VID3_END_WIN (1 << 19)
49 #define DISPC_IRQ_VID3_FIFO_UNDERFLOW (1 << 20)
50 #define DISPC_IRQ_ACBIAS_COUNT_STAT2 (1 << 21)
51 #define DISPC_IRQ_FRAMEDONE2 (1 << 22)
52 #define DISPC_IRQ_FRAMEDONEWB (1 << 23)
53 #define DISPC_IRQ_FRAMEDONETV (1 << 24)
54 #define DISPC_IRQ_WBBUFFEROVERFLOW (1 << 25)
55 #define DISPC_IRQ_WBUNCOMPLETEERROR (1 << 26)
56 #define DISPC_IRQ_SYNC_LOST3 (1 << 27)
57 #define DISPC_IRQ_VSYNC3 (1 << 28)
58 #define DISPC_IRQ_ACBIAS_COUNT_STAT3 (1 << 29)
59 #define DISPC_IRQ_FRAMEDONE3 (1 << 30)
61 struct omap_dss_device;
62 struct dss_lcd_mgr_config;
63 struct snd_aes_iec958;
64 struct snd_cea_861_aud_if;
65 struct hdmi_avi_infoframe;
67 enum omap_display_type {
68 OMAP_DISPLAY_TYPE_NONE = 0,
69 OMAP_DISPLAY_TYPE_DPI = 1 << 0,
70 OMAP_DISPLAY_TYPE_DBI = 1 << 1,
71 OMAP_DISPLAY_TYPE_SDI = 1 << 2,
72 OMAP_DISPLAY_TYPE_DSI = 1 << 3,
73 OMAP_DISPLAY_TYPE_VENC = 1 << 4,
74 OMAP_DISPLAY_TYPE_HDMI = 1 << 5,
75 OMAP_DISPLAY_TYPE_DVI = 1 << 6,
87 OMAP_DSS_CHANNEL_LCD = 0,
88 OMAP_DSS_CHANNEL_DIGIT = 1,
89 OMAP_DSS_CHANNEL_LCD2 = 2,
90 OMAP_DSS_CHANNEL_LCD3 = 3,
91 OMAP_DSS_CHANNEL_WB = 4,
94 enum omap_color_mode {
98 enum omap_dss_load_mode {
99 OMAP_DSS_LOAD_CLUT_AND_FRAME = 0,
100 OMAP_DSS_LOAD_CLUT_ONLY = 1,
101 OMAP_DSS_LOAD_FRAME_ONLY = 2,
102 OMAP_DSS_LOAD_CLUT_ONCE_FRAME = 3,
105 enum omap_dss_trans_key_type {
106 OMAP_DSS_COLOR_KEY_GFX_DST = 0,
107 OMAP_DSS_COLOR_KEY_VID_SRC = 1,
110 enum omap_dss_signal_level {
111 OMAPDSS_SIG_ACTIVE_LOW,
112 OMAPDSS_SIG_ACTIVE_HIGH,
115 enum omap_dss_signal_edge {
116 OMAPDSS_DRIVE_SIG_FALLING_EDGE,
117 OMAPDSS_DRIVE_SIG_RISING_EDGE,
120 enum omap_dss_venc_type {
121 OMAP_DSS_VENC_TYPE_COMPOSITE,
122 OMAP_DSS_VENC_TYPE_SVIDEO,
125 enum omap_dss_dsi_pixel_format {
126 OMAP_DSS_DSI_FMT_RGB888,
127 OMAP_DSS_DSI_FMT_RGB666,
128 OMAP_DSS_DSI_FMT_RGB666_PACKED,
129 OMAP_DSS_DSI_FMT_RGB565,
132 enum omap_dss_dsi_mode {
133 OMAP_DSS_DSI_CMD_MODE = 0,
134 OMAP_DSS_DSI_VIDEO_MODE,
137 enum omap_display_caps {
138 OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE = 1 << 0,
139 OMAP_DSS_DISPLAY_CAP_TEAR_ELIM = 1 << 1,
142 enum omap_dss_display_state {
143 OMAP_DSS_DISPLAY_DISABLED = 0,
144 OMAP_DSS_DISPLAY_ACTIVE,
147 enum omap_dss_rotation_type {
148 OMAP_DSS_ROT_NONE = 0,
149 OMAP_DSS_ROT_TILER = 1 << 0,
152 enum omap_overlay_caps {
153 OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
154 OMAP_DSS_OVL_CAP_GLOBAL_ALPHA = 1 << 1,
155 OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA = 1 << 2,
156 OMAP_DSS_OVL_CAP_ZORDER = 1 << 3,
157 OMAP_DSS_OVL_CAP_POS = 1 << 4,
158 OMAP_DSS_OVL_CAP_REPLICATION = 1 << 5,
161 enum omap_dss_clk_source {
162 OMAP_DSS_CLK_SRC_FCK = 0, /* OMAP2/3: DSS1_ALWON_FCLK
164 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, /* OMAP3: DSI1_PLL_FCLK
165 * OMAP4: PLL1_CLK1 */
166 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, /* OMAP3: DSI2_PLL_FCLK
167 * OMAP4: PLL1_CLK2 */
168 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC, /* OMAP4: PLL2_CLK1 */
169 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI, /* OMAP4: PLL2_CLK2 */
172 enum omap_hdmi_flags {
173 OMAP_HDMI_SDA_SCL_EXTERNAL_PULLUP = 1 << 0,
176 enum omap_dss_output_id {
177 OMAP_DSS_OUTPUT_DPI = 1 << 0,
178 OMAP_DSS_OUTPUT_DBI = 1 << 1,
179 OMAP_DSS_OUTPUT_SDI = 1 << 2,
180 OMAP_DSS_OUTPUT_DSI1 = 1 << 3,
181 OMAP_DSS_OUTPUT_DSI2 = 1 << 4,
182 OMAP_DSS_OUTPUT_VENC = 1 << 5,
183 OMAP_DSS_OUTPUT_HDMI = 1 << 6,
188 enum omap_dss_dsi_trans_mode {
189 /* Sync Pulses: both sync start and end packets sent */
190 OMAP_DSS_DSI_PULSE_MODE,
191 /* Sync Events: only sync start packets sent */
192 OMAP_DSS_DSI_EVENT_MODE,
193 /* Burst: only sync start packets sent, pixels are time compressed */
194 OMAP_DSS_DSI_BURST_MODE,
197 struct omap_dss_dsi_videomode_timings {
208 /* DSI video mode blanking data */
209 /* Unit: byte clock cycles */
215 /* Unit: line clocks */
220 /* DSI blanking modes */
222 int hsa_blanking_mode;
223 int hbp_blanking_mode;
224 int hfp_blanking_mode;
226 enum omap_dss_dsi_trans_mode trans_mode;
228 bool ddr_clk_always_on;
232 struct omap_dss_dsi_config {
233 enum omap_dss_dsi_mode mode;
234 enum omap_dss_dsi_pixel_format pixel_format;
235 const struct videomode *vm;
237 unsigned long hs_clk_min, hs_clk_max;
238 unsigned long lp_clk_min, lp_clk_max;
240 bool ddr_clk_always_on;
241 enum omap_dss_dsi_trans_mode trans_mode;
244 /* Hardcoded videomodes for tv. Venc only uses these to
245 * identify the mode, and does not actually use the configs
246 * itself. However, the configs should be something that
247 * a normal monitor can also show */
248 extern const struct videomode omap_dss_pal_vm;
249 extern const struct videomode omap_dss_ntsc_vm;
251 struct omap_dss_cpr_coefs {
257 struct omap_overlay_info {
259 dma_addr_t p_uv_addr; /* for NV12 format */
265 enum omap_dss_rotation_type rotation_type;
269 u16 out_width; /* if 0, out_width == width */
270 u16 out_height; /* if 0, out_height == height */
276 struct omap_overlay_manager_info {
279 enum omap_dss_trans_key_type trans_key_type;
283 bool partial_alpha_enabled;
286 struct omap_dss_cpr_coefs cpr_coefs;
289 /* 22 pins means 1 clk lane and 10 data lanes */
290 #define OMAP_DSS_MAX_DSI_PINS 22
292 struct omap_dsi_pin_config {
295 * pin numbers in the following order:
301 int pins[OMAP_DSS_MAX_DSI_PINS];
304 struct omap_dss_writeback_info {
312 enum omap_dss_rotation_type rotation_type;
316 struct omapdss_dpi_ops {
317 int (*connect)(struct omap_dss_device *dssdev,
318 struct omap_dss_device *dst);
319 void (*disconnect)(struct omap_dss_device *dssdev,
320 struct omap_dss_device *dst);
322 int (*enable)(struct omap_dss_device *dssdev);
323 void (*disable)(struct omap_dss_device *dssdev);
325 int (*check_timings)(struct omap_dss_device *dssdev,
326 struct videomode *vm);
327 void (*set_timings)(struct omap_dss_device *dssdev,
328 struct videomode *vm);
329 void (*get_timings)(struct omap_dss_device *dssdev,
330 struct videomode *vm);
333 struct omapdss_sdi_ops {
334 int (*connect)(struct omap_dss_device *dssdev,
335 struct omap_dss_device *dst);
336 void (*disconnect)(struct omap_dss_device *dssdev,
337 struct omap_dss_device *dst);
339 int (*enable)(struct omap_dss_device *dssdev);
340 void (*disable)(struct omap_dss_device *dssdev);
342 int (*check_timings)(struct omap_dss_device *dssdev,
343 struct videomode *vm);
344 void (*set_timings)(struct omap_dss_device *dssdev,
345 struct videomode *vm);
346 void (*get_timings)(struct omap_dss_device *dssdev,
347 struct videomode *vm);
350 struct omapdss_dvi_ops {
351 int (*connect)(struct omap_dss_device *dssdev,
352 struct omap_dss_device *dst);
353 void (*disconnect)(struct omap_dss_device *dssdev,
354 struct omap_dss_device *dst);
356 int (*enable)(struct omap_dss_device *dssdev);
357 void (*disable)(struct omap_dss_device *dssdev);
359 int (*check_timings)(struct omap_dss_device *dssdev,
360 struct videomode *vm);
361 void (*set_timings)(struct omap_dss_device *dssdev,
362 struct videomode *vm);
363 void (*get_timings)(struct omap_dss_device *dssdev,
364 struct videomode *vm);
367 struct omapdss_atv_ops {
368 int (*connect)(struct omap_dss_device *dssdev,
369 struct omap_dss_device *dst);
370 void (*disconnect)(struct omap_dss_device *dssdev,
371 struct omap_dss_device *dst);
373 int (*enable)(struct omap_dss_device *dssdev);
374 void (*disable)(struct omap_dss_device *dssdev);
376 int (*check_timings)(struct omap_dss_device *dssdev,
377 struct videomode *vm);
378 void (*set_timings)(struct omap_dss_device *dssdev,
379 struct videomode *vm);
380 void (*get_timings)(struct omap_dss_device *dssdev,
381 struct videomode *vm);
383 int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
384 u32 (*get_wss)(struct omap_dss_device *dssdev);
387 struct omapdss_hdmi_ops {
388 int (*connect)(struct omap_dss_device *dssdev,
389 struct omap_dss_device *dst);
390 void (*disconnect)(struct omap_dss_device *dssdev,
391 struct omap_dss_device *dst);
393 int (*enable)(struct omap_dss_device *dssdev);
394 void (*disable)(struct omap_dss_device *dssdev);
396 int (*check_timings)(struct omap_dss_device *dssdev,
397 struct videomode *vm);
398 void (*set_timings)(struct omap_dss_device *dssdev,
399 struct videomode *vm);
400 void (*get_timings)(struct omap_dss_device *dssdev,
401 struct videomode *vm);
403 int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len);
404 bool (*detect)(struct omap_dss_device *dssdev);
406 int (*set_hdmi_mode)(struct omap_dss_device *dssdev, bool hdmi_mode);
407 int (*set_infoframe)(struct omap_dss_device *dssdev,
408 const struct hdmi_avi_infoframe *avi);
411 struct omapdss_dsi_ops {
412 int (*connect)(struct omap_dss_device *dssdev,
413 struct omap_dss_device *dst);
414 void (*disconnect)(struct omap_dss_device *dssdev,
415 struct omap_dss_device *dst);
417 int (*enable)(struct omap_dss_device *dssdev);
418 void (*disable)(struct omap_dss_device *dssdev, bool disconnect_lanes,
421 /* bus configuration */
422 int (*set_config)(struct omap_dss_device *dssdev,
423 const struct omap_dss_dsi_config *cfg);
424 int (*configure_pins)(struct omap_dss_device *dssdev,
425 const struct omap_dsi_pin_config *pin_cfg);
427 void (*enable_hs)(struct omap_dss_device *dssdev, int channel,
429 int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
431 int (*update)(struct omap_dss_device *dssdev, int channel,
432 void (*callback)(int, void *), void *data);
434 void (*bus_lock)(struct omap_dss_device *dssdev);
435 void (*bus_unlock)(struct omap_dss_device *dssdev);
437 int (*enable_video_output)(struct omap_dss_device *dssdev, int channel);
438 void (*disable_video_output)(struct omap_dss_device *dssdev,
441 int (*request_vc)(struct omap_dss_device *dssdev, int *channel);
442 int (*set_vc_id)(struct omap_dss_device *dssdev, int channel,
444 void (*release_vc)(struct omap_dss_device *dssdev, int channel);
447 int (*dcs_write)(struct omap_dss_device *dssdev, int channel,
449 int (*dcs_write_nosync)(struct omap_dss_device *dssdev, int channel,
451 int (*dcs_read)(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
454 int (*gen_write)(struct omap_dss_device *dssdev, int channel,
456 int (*gen_write_nosync)(struct omap_dss_device *dssdev, int channel,
458 int (*gen_read)(struct omap_dss_device *dssdev, int channel,
459 u8 *reqdata, int reqlen,
462 int (*bta_sync)(struct omap_dss_device *dssdev, int channel);
464 int (*set_max_rx_packet_size)(struct omap_dss_device *dssdev,
465 int channel, u16 plen);
468 struct omap_dss_device {
472 struct module *owner;
474 struct list_head panel_list;
476 /* alias in the form of "display%d" */
479 enum omap_display_type type;
480 enum omap_display_type output_type;
485 enum omap_dss_dsi_pixel_format dsi_pix_fmt;
486 enum omap_dss_dsi_mode dsi_mode;
491 struct omap_dss_driver *driver;
494 const struct omapdss_dpi_ops *dpi;
495 const struct omapdss_sdi_ops *sdi;
496 const struct omapdss_dvi_ops *dvi;
497 const struct omapdss_hdmi_ops *hdmi;
498 const struct omapdss_atv_ops *atv;
499 const struct omapdss_dsi_ops *dsi;
502 /* helper variable for driver suspend/resume */
503 bool activate_after_resume;
505 enum omap_display_caps caps;
507 struct omap_dss_device *src;
509 enum omap_dss_display_state state;
511 /* OMAP DSS output specific fields */
513 struct list_head list;
515 /* DISPC channel for this output */
516 enum omap_channel dispc_channel;
517 bool dispc_channel_connected;
519 /* output instance */
520 enum omap_dss_output_id id;
522 /* the port number in the DT node */
526 struct omap_dss_device *dst;
529 struct omap_dss_driver {
530 int (*probe)(struct omap_dss_device *);
531 void (*remove)(struct omap_dss_device *);
533 int (*connect)(struct omap_dss_device *dssdev);
534 void (*disconnect)(struct omap_dss_device *dssdev);
536 int (*enable)(struct omap_dss_device *display);
537 void (*disable)(struct omap_dss_device *display);
538 int (*run_test)(struct omap_dss_device *display, int test);
540 int (*update)(struct omap_dss_device *dssdev,
541 u16 x, u16 y, u16 w, u16 h);
542 int (*sync)(struct omap_dss_device *dssdev);
544 int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
545 int (*get_te)(struct omap_dss_device *dssdev);
547 u8 (*get_rotate)(struct omap_dss_device *dssdev);
548 int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);
550 bool (*get_mirror)(struct omap_dss_device *dssdev);
551 int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);
553 int (*memory_read)(struct omap_dss_device *dssdev,
554 void *buf, size_t size,
555 u16 x, u16 y, u16 w, u16 h);
557 int (*check_timings)(struct omap_dss_device *dssdev,
558 struct videomode *vm);
559 void (*set_timings)(struct omap_dss_device *dssdev,
560 struct videomode *vm);
561 void (*get_timings)(struct omap_dss_device *dssdev,
562 struct videomode *vm);
564 int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
565 u32 (*get_wss)(struct omap_dss_device *dssdev);
567 int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len);
568 bool (*detect)(struct omap_dss_device *dssdev);
570 int (*set_hdmi_mode)(struct omap_dss_device *dssdev, bool hdmi_mode);
571 int (*set_hdmi_infoframe)(struct omap_dss_device *dssdev,
572 const struct hdmi_avi_infoframe *avi);
575 enum omapdss_version omapdss_get_version(void);
576 bool omapdss_is_initialized(void);
578 int omap_dss_register_driver(struct omap_dss_driver *);
579 void omap_dss_unregister_driver(struct omap_dss_driver *);
581 int omapdss_register_display(struct omap_dss_device *dssdev);
582 void omapdss_unregister_display(struct omap_dss_device *dssdev);
584 struct omap_dss_device *omap_dss_get_device(struct omap_dss_device *dssdev);
585 void omap_dss_put_device(struct omap_dss_device *dssdev);
586 #define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
587 struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
588 struct omap_dss_device *omap_dss_find_device(void *data,
589 int (*match)(struct omap_dss_device *dssdev, void *data));
592 int omap_dss_get_num_overlay_managers(void);
594 int omap_dss_get_num_overlays(void);
596 int omapdss_register_output(struct omap_dss_device *output);
597 void omapdss_unregister_output(struct omap_dss_device *output);
598 struct omap_dss_device *omap_dss_get_output(enum omap_dss_output_id id);
599 struct omap_dss_device *omap_dss_find_output_by_port_node(struct device_node *port);
600 int omapdss_output_set_device(struct omap_dss_device *out,
601 struct omap_dss_device *dssdev);
602 int omapdss_output_unset_device(struct omap_dss_device *out);
604 struct omap_dss_device *omapdss_find_output_from_display(struct omap_dss_device *dssdev);
606 void omapdss_default_get_timings(struct omap_dss_device *dssdev,
607 struct videomode *vm);
609 typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
610 int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
611 int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
613 int omapdss_compat_init(void);
614 void omapdss_compat_uninit(void);
616 static inline bool omapdss_device_is_connected(struct omap_dss_device *dssdev)
621 static inline bool omapdss_device_is_enabled(struct omap_dss_device *dssdev)
623 return dssdev->state == OMAP_DSS_DISPLAY_ACTIVE;
626 struct omap_dss_device *
627 omapdss_of_find_source_for_first_ep(struct device_node *node);
629 void omapdss_set_is_initialized(bool set);
631 struct device_node *dss_of_port_get_parent_device(struct device_node *port);
632 u32 dss_of_port_get_port_number(struct device_node *port);
635 int (*connect)(enum omap_channel channel,
636 struct omap_dss_device *dst);
637 void (*disconnect)(enum omap_channel channel,
638 struct omap_dss_device *dst);
640 void (*start_update)(enum omap_channel channel);
641 int (*enable)(enum omap_channel channel);
642 void (*disable)(enum omap_channel channel);
643 void (*set_timings)(enum omap_channel channel,
644 const struct videomode *vm);
645 void (*set_lcd_config)(enum omap_channel channel,
646 const struct dss_lcd_mgr_config *config);
647 int (*register_framedone_handler)(enum omap_channel channel,
648 void (*handler)(void *), void *data);
649 void (*unregister_framedone_handler)(enum omap_channel channel,
650 void (*handler)(void *), void *data);
653 int dss_install_mgr_ops(const struct dss_mgr_ops *mgr_ops);
654 void dss_uninstall_mgr_ops(void);
656 int dss_mgr_connect(enum omap_channel channel,
657 struct omap_dss_device *dst);
658 void dss_mgr_disconnect(enum omap_channel channel,
659 struct omap_dss_device *dst);
660 void dss_mgr_set_timings(enum omap_channel channel,
661 const struct videomode *vm);
662 void dss_mgr_set_lcd_config(enum omap_channel channel,
663 const struct dss_lcd_mgr_config *config);
664 int dss_mgr_enable(enum omap_channel channel);
665 void dss_mgr_disable(enum omap_channel channel);
666 void dss_mgr_start_update(enum omap_channel channel);
667 int dss_mgr_register_framedone_handler(enum omap_channel channel,
668 void (*handler)(void *), void *data);
669 void dss_mgr_unregister_framedone_handler(enum omap_channel channel,
670 void (*handler)(void *), void *data);
675 u32 (*read_irqstatus)(void);
676 void (*clear_irqstatus)(u32 mask);
677 void (*write_irqenable)(u32 mask);
679 int (*request_irq)(irq_handler_t handler, void *dev_id);
680 void (*free_irq)(void *dev_id);
682 int (*runtime_get)(void);
683 void (*runtime_put)(void);
685 int (*get_num_ovls)(void);
686 int (*get_num_mgrs)(void);
688 void (*mgr_enable)(enum omap_channel channel, bool enable);
689 bool (*mgr_is_enabled)(enum omap_channel channel);
690 u32 (*mgr_get_vsync_irq)(enum omap_channel channel);
691 u32 (*mgr_get_framedone_irq)(enum omap_channel channel);
692 u32 (*mgr_get_sync_lost_irq)(enum omap_channel channel);
693 bool (*mgr_go_busy)(enum omap_channel channel);
694 void (*mgr_go)(enum omap_channel channel);
695 void (*mgr_set_lcd_config)(enum omap_channel channel,
696 const struct dss_lcd_mgr_config *config);
697 void (*mgr_set_timings)(enum omap_channel channel,
698 const struct videomode *vm);
699 void (*mgr_setup)(enum omap_channel channel,
700 const struct omap_overlay_manager_info *info);
701 enum omap_dss_output_id (*mgr_get_supported_outputs)(enum omap_channel channel);
702 u32 (*mgr_gamma_size)(enum omap_channel channel);
703 void (*mgr_set_gamma)(enum omap_channel channel,
704 const struct drm_color_lut *lut,
705 unsigned int length);
707 int (*ovl_enable)(enum omap_plane_id plane, bool enable);
708 int (*ovl_setup)(enum omap_plane_id plane,
709 const struct omap_overlay_info *oi,
710 const struct videomode *vm, bool mem_to_mem,
711 enum omap_channel channel);
713 const u32 *(*ovl_get_color_modes)(enum omap_plane_id plane);
716 void dispc_set_ops(const struct dispc_ops *o);
717 const struct dispc_ops *dispc_get_ops(void);
719 bool omapdss_component_is_display(struct device_node *node);
720 bool omapdss_component_is_output(struct device_node *node);
722 bool omapdss_stack_is_ready(void);
723 void omapdss_gather_components(struct device *dev);
725 #endif /* __OMAP_DRM_DSS_H */