drivers/gpu/drm/msm/mdp/mdp4/mdp4_plane.c

   1 /*
   2  * Copyright (C) 2013 Red Hat
   3  * Author: Rob Clark <robdclark@gmail.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 as published by
   7  * the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #include "mdp4_kms.h"
  19
  20 #define DOWN_SCALE_MAX  8
  21 #define UP_SCALE_MAX    8
  22
  23 struct mdp4_plane {
  24         struct drm_plane base;
  25         const char *name;
  26
  27         enum mdp4_pipe pipe;
  28
  29         uint32_t caps;
  30         uint32_t nformats;
  31         uint32_t formats[32];
  32
  33         bool enabled;
  34 };
  35 #define to_mdp4_plane(x) container_of(x, struct mdp4_plane, base)
  36
  37 /* MDP format helper functions */
  38 static inline
  39 enum mdp4_frame_format mdp4_get_frame_format(struct drm_framebuffer *fb)
  40 {
  41         bool is_tile = false;
  42
  43         if (fb->modifier == DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
  44                 is_tile = true;
  45
  46         if (fb->format->format == DRM_FORMAT_NV12 && is_tile)
  47                 return FRAME_TILE_YCBCR_420;
  48
  49         return FRAME_LINEAR;
  50 }
  51
  52 static void mdp4_plane_set_scanout(struct drm_plane *plane,
  53                 struct drm_framebuffer *fb);
  54 static int mdp4_plane_mode_set(struct drm_plane *plane,
  55                 struct drm_crtc *crtc, struct drm_framebuffer *fb,
  56                 int crtc_x, int crtc_y,
  57                 unsigned int crtc_w, unsigned int crtc_h,
  58                 uint32_t src_x, uint32_t src_y,
  59                 uint32_t src_w, uint32_t src_h);
  60
  61 static struct mdp4_kms *get_kms(struct drm_plane *plane)
  62 {
  63         struct msm_drm_private *priv = plane->dev->dev_private;
  64         return to_mdp4_kms(to_mdp_kms(priv->kms));
  65 }
  66
  67 static void mdp4_plane_destroy(struct drm_plane *plane)
  68 {
  69         struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
  70
  71         drm_plane_helper_disable(plane);
  72         drm_plane_cleanup(plane);
  73
  74         kfree(mdp4_plane);
  75 }
  76
  77 /* helper to install properties which are common to planes and crtcs */
  78 static void mdp4_plane_install_properties(struct drm_plane *plane,
  79                 struct drm_mode_object *obj)
  80 {
  81         // XXX
  82 }
  83
  84 static int mdp4_plane_set_property(struct drm_plane *plane,
  85                 struct drm_property *property, uint64_t val)
  86 {
  87         // XXX
  88         return -EINVAL;
  89 }
  90
  91 static const struct drm_plane_funcs mdp4_plane_funcs = {
  92                 .update_plane = drm_atomic_helper_update_plane,
  93                 .disable_plane = drm_atomic_helper_disable_plane,
  94                 .destroy = mdp4_plane_destroy,
  95                 .set_property = mdp4_plane_set_property,
  96                 .reset = drm_atomic_helper_plane_reset,
  97                 .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
  98                 .atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
  99 };
 100
 101 static int mdp4_plane_prepare_fb(struct drm_plane *plane,
 102                                  struct drm_plane_state *new_state)
 103 {
 104         struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
 105         struct mdp4_kms *mdp4_kms = get_kms(plane);
 106         struct msm_kms *kms = &mdp4_kms->base.base;
 107         struct drm_framebuffer *fb = new_state->fb;
 108
 109         if (!fb)
 110                 return 0;
 111
 112         DBG("%s: prepare: FB[%u]", mdp4_plane->name, fb->base.id);
 113         return msm_framebuffer_prepare(fb, kms->aspace);
 114 }
 115
 116 static void mdp4_plane_cleanup_fb(struct drm_plane *plane,
 117                                   struct drm_plane_state *old_state)
 118 {
 119         struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
 120         struct mdp4_kms *mdp4_kms = get_kms(plane);
 121         struct msm_kms *kms = &mdp4_kms->base.base;
 122         struct drm_framebuffer *fb = old_state->fb;
 123
 124         if (!fb)
 125                 return;
 126
 127         DBG("%s: cleanup: FB[%u]", mdp4_plane->name, fb->base.id);
 128         msm_framebuffer_cleanup(fb, kms->aspace);
 129 }
 130
 131
 132 static int mdp4_plane_atomic_check(struct drm_plane *plane,
 133                 struct drm_plane_state *state)
 134 {
 135         return 0;
 136 }
 137
 138 static void mdp4_plane_atomic_update(struct drm_plane *plane,
 139                                      struct drm_plane_state *old_state)
 140 {
 141         struct drm_plane_state *state = plane->state;
 142         int ret;
 143
 144         ret = mdp4_plane_mode_set(plane,
 145                         state->crtc, state->fb,
 146                         state->crtc_x, state->crtc_y,
 147                         state->crtc_w, state->crtc_h,
 148                         state->src_x,  state->src_y,
 149                         state->src_w, state->src_h);
 150         /* atomic_check should have ensured that this doesn't fail */
 151         WARN_ON(ret < 0);
 152 }
 153
 154 static const struct drm_plane_helper_funcs mdp4_plane_helper_funcs = {
 155                 .prepare_fb = mdp4_plane_prepare_fb,
 156                 .cleanup_fb = mdp4_plane_cleanup_fb,
 157                 .atomic_check = mdp4_plane_atomic_check,
 158                 .atomic_update = mdp4_plane_atomic_update,
 159 };
 160
 161 static void mdp4_plane_set_scanout(struct drm_plane *plane,
 162                 struct drm_framebuffer *fb)
 163 {
 164         struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
 165         struct mdp4_kms *mdp4_kms = get_kms(plane);
 166         struct msm_kms *kms = &mdp4_kms->base.base;
 167         enum mdp4_pipe pipe = mdp4_plane->pipe;
 168
 169         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_STRIDE_A(pipe),
 170                         MDP4_PIPE_SRC_STRIDE_A_P0(fb->pitches[0]) |
 171                         MDP4_PIPE_SRC_STRIDE_A_P1(fb->pitches[1]));
 172
 173         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_STRIDE_B(pipe),
 174                         MDP4_PIPE_SRC_STRIDE_B_P2(fb->pitches[2]) |
 175                         MDP4_PIPE_SRC_STRIDE_B_P3(fb->pitches[3]));
 176
 177         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP0_BASE(pipe),
 178                         msm_framebuffer_iova(fb, kms->aspace, 0));
 179         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP1_BASE(pipe),
 180                         msm_framebuffer_iova(fb, kms->aspace, 1));
 181         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP2_BASE(pipe),
 182                         msm_framebuffer_iova(fb, kms->aspace, 2));
 183         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP3_BASE(pipe),
 184                         msm_framebuffer_iova(fb, kms->aspace, 3));
 185
 186         plane->fb = fb;
 187 }
 188
 189 static void mdp4_write_csc_config(struct mdp4_kms *mdp4_kms,
 190                 enum mdp4_pipe pipe, struct csc_cfg *csc)
 191 {
 192         int i;
 193
 194         for (i = 0; i < ARRAY_SIZE(csc->matrix); i++) {
 195                 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_MV(pipe, i),
 196                                 csc->matrix[i]);
 197         }
 198
 199         for (i = 0; i < ARRAY_SIZE(csc->post_bias) ; i++) {
 200                 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_PRE_BV(pipe, i),
 201                                 csc->pre_bias[i]);
 202
 203                 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_POST_BV(pipe, i),
 204                                 csc->post_bias[i]);
 205         }
 206
 207         for (i = 0; i < ARRAY_SIZE(csc->post_clamp) ; i++) {
 208                 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_PRE_LV(pipe, i),
 209                                 csc->pre_clamp[i]);
 210
 211                 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_POST_LV(pipe, i),
 212                                 csc->post_clamp[i]);
 213         }
 214 }
 215
 216 #define MDP4_VG_PHASE_STEP_DEFAULT      0x20000000
 217
 218 static int mdp4_plane_mode_set(struct drm_plane *plane,
 219                 struct drm_crtc *crtc, struct drm_framebuffer *fb,
 220                 int crtc_x, int crtc_y,
 221                 unsigned int crtc_w, unsigned int crtc_h,
 222                 uint32_t src_x, uint32_t src_y,
 223                 uint32_t src_w, uint32_t src_h)
 224 {
 225         struct drm_device *dev = plane->dev;
 226         struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
 227         struct mdp4_kms *mdp4_kms = get_kms(plane);
 228         enum mdp4_pipe pipe = mdp4_plane->pipe;
 229         const struct mdp_format *format;
 230         uint32_t op_mode = 0;
 231         uint32_t phasex_step = MDP4_VG_PHASE_STEP_DEFAULT;
 232         uint32_t phasey_step = MDP4_VG_PHASE_STEP_DEFAULT;
 233         enum mdp4_frame_format frame_type;
 234
 235         if (!(crtc && fb)) {
 236                 DBG("%s: disabled!", mdp4_plane->name);
 237                 return 0;
 238         }
 239
 240         frame_type = mdp4_get_frame_format(fb);
 241
 242         /* src values are in Q16 fixed point, convert to integer: */
 243         src_x = src_x >> 16;
 244         src_y = src_y >> 16;
 245         src_w = src_w >> 16;
 246         src_h = src_h >> 16;
 247
 248         DBG("%s: FB[%u] %u,%u,%u,%u -> CRTC[%u] %d,%d,%u,%u", mdp4_plane->name,
 249                         fb->base.id, src_x, src_y, src_w, src_h,
 250                         crtc->base.id, crtc_x, crtc_y, crtc_w, crtc_h);
 251
 252         format = to_mdp_format(msm_framebuffer_format(fb));
 253
 254         if (src_w > (crtc_w * DOWN_SCALE_MAX)) {
 255                 dev_err(dev->dev, "Width down scaling exceeds limits!\n");
 256                 return -ERANGE;
 257         }
 258
 259         if (src_h > (crtc_h * DOWN_SCALE_MAX)) {
 260                 dev_err(dev->dev, "Height down scaling exceeds limits!\n");
 261                 return -ERANGE;
 262         }
 263
 264         if (crtc_w > (src_w * UP_SCALE_MAX)) {
 265                 dev_err(dev->dev, "Width up scaling exceeds limits!\n");
 266                 return -ERANGE;
 267         }
 268
 269         if (crtc_h > (src_h * UP_SCALE_MAX)) {
 270                 dev_err(dev->dev, "Height up scaling exceeds limits!\n");
 271                 return -ERANGE;
 272         }
 273
 274         if (src_w != crtc_w) {
 275                 uint32_t sel_unit = SCALE_FIR;
 276                 op_mode |= MDP4_PIPE_OP_MODE_SCALEX_EN;
 277
 278                 if (MDP_FORMAT_IS_YUV(format)) {
 279                         if (crtc_w > src_w)
 280                                 sel_unit = SCALE_PIXEL_RPT;
 281                         else if (crtc_w <= (src_w / 4))
 282                                 sel_unit = SCALE_MN_PHASE;
 283
 284                         op_mode |= MDP4_PIPE_OP_MODE_SCALEX_UNIT_SEL(sel_unit);
 285                         phasex_step = mult_frac(MDP4_VG_PHASE_STEP_DEFAULT,
 286                                         src_w, crtc_w);
 287                 }
 288         }
 289
 290         if (src_h != crtc_h) {
 291                 uint32_t sel_unit = SCALE_FIR;
 292                 op_mode |= MDP4_PIPE_OP_MODE_SCALEY_EN;
 293
 294                 if (MDP_FORMAT_IS_YUV(format)) {
 295
 296                         if (crtc_h > src_h)
 297                                 sel_unit = SCALE_PIXEL_RPT;
 298                         else if (crtc_h <= (src_h / 4))
 299                                 sel_unit = SCALE_MN_PHASE;
 300
 301                         op_mode |= MDP4_PIPE_OP_MODE_SCALEY_UNIT_SEL(sel_unit);
 302                         phasey_step = mult_frac(MDP4_VG_PHASE_STEP_DEFAULT,
 303                                         src_h, crtc_h);
 304                 }
 305         }
 306
 307         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_SIZE(pipe),
 308                         MDP4_PIPE_SRC_SIZE_WIDTH(src_w) |
 309                         MDP4_PIPE_SRC_SIZE_HEIGHT(src_h));
 310
 311         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_XY(pipe),
 312                         MDP4_PIPE_SRC_XY_X(src_x) |
 313                         MDP4_PIPE_SRC_XY_Y(src_y));
 314
 315         mdp4_write(mdp4_kms, REG_MDP4_PIPE_DST_SIZE(pipe),
 316                         MDP4_PIPE_DST_SIZE_WIDTH(crtc_w) |
 317                         MDP4_PIPE_DST_SIZE_HEIGHT(crtc_h));
 318
 319         mdp4_write(mdp4_kms, REG_MDP4_PIPE_DST_XY(pipe),
 320                         MDP4_PIPE_DST_XY_X(crtc_x) |
 321                         MDP4_PIPE_DST_XY_Y(crtc_y));
 322
 323         mdp4_plane_set_scanout(plane, fb);
 324
 325         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_FORMAT(pipe),
 326                         MDP4_PIPE_SRC_FORMAT_A_BPC(format->bpc_a) |
 327                         MDP4_PIPE_SRC_FORMAT_R_BPC(format->bpc_r) |
 328                         MDP4_PIPE_SRC_FORMAT_G_BPC(format->bpc_g) |
 329                         MDP4_PIPE_SRC_FORMAT_B_BPC(format->bpc_b) |
 330                         COND(format->alpha_enable, MDP4_PIPE_SRC_FORMAT_ALPHA_ENABLE) |
 331                         MDP4_PIPE_SRC_FORMAT_CPP(format->cpp - 1) |
 332                         MDP4_PIPE_SRC_FORMAT_UNPACK_COUNT(format->unpack_count - 1) |
 333                         MDP4_PIPE_SRC_FORMAT_FETCH_PLANES(format->fetch_type) |
 334                         MDP4_PIPE_SRC_FORMAT_CHROMA_SAMP(format->chroma_sample) |
 335                         MDP4_PIPE_SRC_FORMAT_FRAME_FORMAT(frame_type) |
 336                         COND(format->unpack_tight, MDP4_PIPE_SRC_FORMAT_UNPACK_TIGHT));
 337
 338         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_UNPACK(pipe),
 339                         MDP4_PIPE_SRC_UNPACK_ELEM0(format->unpack[0]) |
 340                         MDP4_PIPE_SRC_UNPACK_ELEM1(format->unpack[1]) |
 341                         MDP4_PIPE_SRC_UNPACK_ELEM2(format->unpack[2]) |
 342                         MDP4_PIPE_SRC_UNPACK_ELEM3(format->unpack[3]));
 343
 344         if (MDP_FORMAT_IS_YUV(format)) {
 345                 struct csc_cfg *csc = mdp_get_default_csc_cfg(CSC_YUV2RGB);
 346
 347                 op_mode |= MDP4_PIPE_OP_MODE_SRC_YCBCR;
 348                 op_mode |= MDP4_PIPE_OP_MODE_CSC_EN;
 349                 mdp4_write_csc_config(mdp4_kms, pipe, csc);
 350         }
 351
 352         mdp4_write(mdp4_kms, REG_MDP4_PIPE_OP_MODE(pipe), op_mode);
 353         mdp4_write(mdp4_kms, REG_MDP4_PIPE_PHASEX_STEP(pipe), phasex_step);
 354         mdp4_write(mdp4_kms, REG_MDP4_PIPE_PHASEY_STEP(pipe), phasey_step);
 355
 356         if (frame_type != FRAME_LINEAR)
 357                 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SSTILE_FRAME_SIZE(pipe),
 358                                 MDP4_PIPE_SSTILE_FRAME_SIZE_WIDTH(src_w) |
 359                                 MDP4_PIPE_SSTILE_FRAME_SIZE_HEIGHT(src_h));
 360
 361         return 0;
 362 }
 363
 364 static const char *pipe_names[] = {
 365                 "VG1", "VG2",
 366                 "RGB1", "RGB2", "RGB3",
 367                 "VG3", "VG4",
 368 };
 369
 370 enum mdp4_pipe mdp4_plane_pipe(struct drm_plane *plane)
 371 {
 372         struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
 373         return mdp4_plane->pipe;
 374 }
 375
 376 /* initialize plane */
 377 struct drm_plane *mdp4_plane_init(struct drm_device *dev,
 378                 enum mdp4_pipe pipe_id, bool private_plane)
 379 {
 380         struct drm_plane *plane = NULL;
 381         struct mdp4_plane *mdp4_plane;
 382         int ret;
 383         enum drm_plane_type type;
 384
 385         mdp4_plane = kzalloc(sizeof(*mdp4_plane), GFP_KERNEL);
 386         if (!mdp4_plane) {
 387                 ret = -ENOMEM;
 388                 goto fail;
 389         }
 390
 391         plane = &mdp4_plane->base;
 392
 393         mdp4_plane->pipe = pipe_id;
 394         mdp4_plane->name = pipe_names[pipe_id];
 395         mdp4_plane->caps = mdp4_pipe_caps(pipe_id);
 396
 397         mdp4_plane->nformats = mdp_get_formats(mdp4_plane->formats,
 398                         ARRAY_SIZE(mdp4_plane->formats),
 399                         !pipe_supports_yuv(mdp4_plane->caps));
 400
 401         type = private_plane ? DRM_PLANE_TYPE_PRIMARY : DRM_PLANE_TYPE_OVERLAY;
 402         ret = drm_universal_plane_init(dev, plane, 0xff, &mdp4_plane_funcs,
 403                                  mdp4_plane->formats, mdp4_plane->nformats,
 404                                  type, NULL);
 405         if (ret)
 406                 goto fail;
 407
 408         drm_plane_helper_add(plane, &mdp4_plane_helper_funcs);
 409
 410         mdp4_plane_install_properties(plane, &plane->base);
 411
 412         return plane;
 413
 414 fail:
 415         if (plane)
 416                 mdp4_plane_destroy(plane);
 417
 418         return ERR_PTR(ret);
 419 }