drivers/gpu/drm/meson/meson_drv.c

   1 /*
   2  * Copyright (C) 2016 BayLibre, SAS
   3  * Author: Neil Armstrong <narmstrong@baylibre.com>
   4  * Copyright (C) 2014 Endless Mobile
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation; either version 2 of the
   9  * License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful, but
  12  * WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, see <http://www.gnu.org/licenses/>.
  18  *
  19  * Written by:
  20  *     Jasper St. Pierre <jstpierre@mecheye.net>
  21  */
  22
  23 #include <linux/kernel.h>
  24 #include <linux/module.h>
  25 #include <linux/mutex.h>
  26 #include <linux/platform_device.h>
  27 #include <linux/component.h>
  28 #include <linux/of_graph.h>
  29
  30 #include <drm/drmP.h>
  31 #include <drm/drm_atomic.h>
  32 #include <drm/drm_atomic_helper.h>
  33 #include <drm/drm_flip_work.h>
  34 #include <drm/drm_crtc_helper.h>
  35 #include <drm/drm_plane_helper.h>
  36 #include <drm/drm_gem_cma_helper.h>
  37 #include <drm/drm_gem_framebuffer_helper.h>
  38 #include <drm/drm_fb_cma_helper.h>
  39 #include <drm/drm_rect.h>
  40 #include <drm/drm_fb_helper.h>
  41
  42 #include "meson_drv.h"
  43 #include "meson_plane.h"
  44 #include "meson_overlay.h"
  45 #include "meson_crtc.h"
  46 #include "meson_venc_cvbs.h"
  47
  48 #include "meson_vpp.h"
  49 #include "meson_viu.h"
  50 #include "meson_venc.h"
  51 #include "meson_canvas.h"
  52 #include "meson_registers.h"
  53
  54 #define DRIVER_NAME "meson"
  55 #define DRIVER_DESC "Amlogic Meson DRM driver"
  56
  57 /**
  58  * DOC: Video Processing Unit
  59  *
  60  * VPU Handles the Global Video Processing, it includes management of the
  61  * clocks gates, blocks reset lines and power domains.
  62  *
  63  * What is missing :
  64  *
  65  * - Full reset of entire video processing HW blocks
  66  * - Scaling and setup of the VPU clock
  67  * - Bus clock gates
  68  * - Powering up video processing HW blocks
  69  * - Powering Up HDMI controller and PHY
  70  */
  71
  72 static const struct drm_mode_config_funcs meson_mode_config_funcs = {
  73         .atomic_check        = drm_atomic_helper_check,
  74         .atomic_commit       = drm_atomic_helper_commit,
  75         .fb_create           = drm_gem_fb_create,
  76 };
  77
  78 static const struct drm_mode_config_helper_funcs meson_mode_config_helpers = {
  79         .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm,
  80 };
  81
  82 static irqreturn_t meson_irq(int irq, void *arg)
  83 {
  84         struct drm_device *dev = arg;
  85         struct meson_drm *priv = dev->dev_private;
  86
  87         (void)readl_relaxed(priv->io_base + _REG(VENC_INTFLAG));
  88
  89         meson_crtc_irq(priv);
  90
  91         return IRQ_HANDLED;
  92 }
  93
  94 DEFINE_DRM_GEM_CMA_FOPS(fops);
  95
  96 static struct drm_driver meson_driver = {
  97         .driver_features        = DRIVER_HAVE_IRQ | DRIVER_GEM |
  98                                   DRIVER_MODESET | DRIVER_PRIME |
  99                                   DRIVER_ATOMIC,
 100
 101         /* IRQ */
 102         .irq_handler            = meson_irq,
 103
 104         /* PRIME Ops */
 105         .prime_handle_to_fd     = drm_gem_prime_handle_to_fd,
 106         .prime_fd_to_handle     = drm_gem_prime_fd_to_handle,
 107         .gem_prime_import       = drm_gem_prime_import,
 108         .gem_prime_export       = drm_gem_prime_export,
 109         .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
 110         .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
 111         .gem_prime_vmap         = drm_gem_cma_prime_vmap,
 112         .gem_prime_vunmap       = drm_gem_cma_prime_vunmap,
 113         .gem_prime_mmap         = drm_gem_cma_prime_mmap,
 114
 115         /* GEM Ops */
 116         .dumb_create            = drm_gem_cma_dumb_create,
 117         .gem_free_object_unlocked = drm_gem_cma_free_object,
 118         .gem_vm_ops             = &drm_gem_cma_vm_ops,
 119
 120         /* Misc */
 121         .fops                   = &fops,
 122         .name                   = DRIVER_NAME,
 123         .desc                   = DRIVER_DESC,
 124         .date                   = "20161109",
 125         .major                  = 1,
 126         .minor                  = 0,
 127 };
 128
 129 static bool meson_vpu_has_available_connectors(struct device *dev)
 130 {
 131         struct device_node *ep, *remote;
 132
 133         /* Parses each endpoint and check if remote exists */
 134         for_each_endpoint_of_node(dev->of_node, ep) {
 135                 /* If the endpoint node exists, consider it enabled */
 136                 remote = of_graph_get_remote_port(ep);
 137                 if (remote)
 138                         return true;
 139         }
 140
 141         return false;
 142 }
 143
 144 static struct regmap_config meson_regmap_config = {
 145         .reg_bits       = 32,
 146         .val_bits       = 32,
 147         .reg_stride     = 4,
 148         .max_register   = 0x1000,
 149 };
 150
 151 static void meson_vpu_init(struct meson_drm *priv)
 152 {
 153         writel_relaxed(0x210000, priv->io_base + _REG(VPU_RDARB_MODE_L1C1));
 154         writel_relaxed(0x10000, priv->io_base + _REG(VPU_RDARB_MODE_L1C2));
 155         writel_relaxed(0x900000, priv->io_base + _REG(VPU_RDARB_MODE_L2C1));
 156         writel_relaxed(0x20000, priv->io_base + _REG(VPU_WRARB_MODE_L2C1));
 157 }
 158
 159 static int meson_drv_bind_master(struct device *dev, bool has_components)
 160 {
 161         struct platform_device *pdev = to_platform_device(dev);
 162         struct meson_drm *priv;
 163         struct drm_device *drm;
 164         struct resource *res;
 165         void __iomem *regs;
 166         int ret;
 167
 168         /* Checks if an output connector is available */
 169         if (!meson_vpu_has_available_connectors(dev)) {
 170                 dev_err(dev, "No output connector available\n");
 171                 return -ENODEV;
 172         }
 173
 174         drm = drm_dev_alloc(&meson_driver, dev);
 175         if (IS_ERR(drm))
 176                 return PTR_ERR(drm);
 177
 178         priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
 179         if (!priv) {
 180                 ret = -ENOMEM;
 181                 goto free_drm;
 182         }
 183         drm->dev_private = priv;
 184         priv->drm = drm;
 185         priv->dev = dev;
 186
 187         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "vpu");
 188         regs = devm_ioremap_resource(dev, res);
 189         if (IS_ERR(regs)) {
 190                 ret = PTR_ERR(regs);
 191                 goto free_drm;
 192         }
 193
 194         priv->io_base = regs;
 195
 196         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi");
 197         if (!res) {
 198                 ret = -EINVAL;
 199                 goto free_drm;
 200         }
 201         /* Simply ioremap since it may be a shared register zone */
 202         regs = devm_ioremap(dev, res->start, resource_size(res));
 203         if (!regs) {
 204                 ret = -EADDRNOTAVAIL;
 205                 goto free_drm;
 206         }
 207
 208         priv->hhi = devm_regmap_init_mmio(dev, regs,
 209                                           &meson_regmap_config);
 210         if (IS_ERR(priv->hhi)) {
 211                 dev_err(&pdev->dev, "Couldn't create the HHI regmap\n");
 212                 ret = PTR_ERR(priv->hhi);
 213                 goto free_drm;
 214         }
 215
 216         priv->canvas = meson_canvas_get(dev);
 217         if (!IS_ERR(priv->canvas)) {
 218                 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1);
 219                 if (ret)
 220                         goto free_drm;
 221                 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_0);
 222                 if (ret) {
 223                         meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
 224                         goto free_drm;
 225                 }
 226                 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_1);
 227                 if (ret) {
 228                         meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
 229                         meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
 230                         goto free_drm;
 231                 }
 232                 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_2);
 233                 if (ret) {
 234                         meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
 235                         meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
 236                         meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
 237                         goto free_drm;
 238                 }
 239         } else {
 240                 priv->canvas = NULL;
 241
 242                 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dmc");
 243                 if (!res) {
 244                         ret = -EINVAL;
 245                         goto free_drm;
 246                 }
 247                 /* Simply ioremap since it may be a shared register zone */
 248                 regs = devm_ioremap(dev, res->start, resource_size(res));
 249                 if (!regs) {
 250                         ret = -EADDRNOTAVAIL;
 251                         goto free_drm;
 252                 }
 253
 254                 priv->dmc = devm_regmap_init_mmio(dev, regs,
 255                                                   &meson_regmap_config);
 256                 if (IS_ERR(priv->dmc)) {
 257                         dev_err(&pdev->dev, "Couldn't create the DMC regmap\n");
 258                         ret = PTR_ERR(priv->dmc);
 259                         goto free_drm;
 260                 }
 261         }
 262
 263         priv->vsync_irq = platform_get_irq(pdev, 0);
 264
 265         ret = drm_vblank_init(drm, 1);
 266         if (ret)
 267                 goto free_drm;
 268
 269         drm_mode_config_init(drm);
 270         drm->mode_config.max_width = 3840;
 271         drm->mode_config.max_height = 2160;
 272         drm->mode_config.funcs = &meson_mode_config_funcs;
 273         drm->mode_config.helper_private = &meson_mode_config_helpers;
 274
 275         /* Hardware Initialization */
 276
 277         meson_vpu_init(priv);
 278         meson_venc_init(priv);
 279         meson_vpp_init(priv);
 280         meson_viu_init(priv);
 281
 282         /* Encoder Initialization */
 283
 284         ret = meson_venc_cvbs_create(priv);
 285         if (ret)
 286                 goto free_drm;
 287
 288         if (has_components) {
 289                 ret = component_bind_all(drm->dev, drm);
 290                 if (ret) {
 291                         dev_err(drm->dev, "Couldn't bind all components\n");
 292                         goto free_drm;
 293                 }
 294         }
 295
 296         ret = meson_plane_create(priv);
 297         if (ret)
 298                 goto free_drm;
 299
 300         ret = meson_overlay_create(priv);
 301         if (ret)
 302                 goto free_drm;
 303
 304         ret = meson_crtc_create(priv);
 305         if (ret)
 306                 goto free_drm;
 307
 308         ret = drm_irq_install(drm, priv->vsync_irq);
 309         if (ret)
 310                 goto free_drm;
 311
 312         drm_mode_config_reset(drm);
 313
 314         drm_kms_helper_poll_init(drm);
 315
 316         platform_set_drvdata(pdev, priv);
 317
 318         ret = drm_dev_register(drm, 0);
 319         if (ret)
 320                 goto free_drm;
 321
 322         drm_fbdev_generic_setup(drm, 32);
 323
 324         return 0;
 325
 326 free_drm:
 327         drm_dev_put(drm);
 328
 329         return ret;
 330 }
 331
 332 static int meson_drv_bind(struct device *dev)
 333 {
 334         return meson_drv_bind_master(dev, true);
 335 }
 336
 337 static void meson_drv_unbind(struct device *dev)
 338 {
 339         struct drm_device *drm = dev_get_drvdata(dev);
 340         struct meson_drm *priv = drm->dev_private;
 341
 342         if (priv->canvas) {
 343                 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
 344                 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
 345                 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
 346                 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_2);
 347         }
 348
 349         drm_dev_unregister(drm);
 350         drm_kms_helper_poll_fini(drm);
 351         drm_mode_config_cleanup(drm);
 352         drm_dev_put(drm);
 353
 354 }
 355
 356 static const struct component_master_ops meson_drv_master_ops = {
 357         .bind   = meson_drv_bind,
 358         .unbind = meson_drv_unbind,
 359 };
 360
 361 static int compare_of(struct device *dev, void *data)
 362 {
 363         DRM_DEBUG_DRIVER("Comparing of node %pOF with %pOF\n",
 364                          dev->of_node, data);
 365
 366         return dev->of_node == data;
 367 }
 368
 369 /* Possible connectors nodes to ignore */
 370 static const struct of_device_id connectors_match[] = {
 371         { .compatible = "composite-video-connector" },
 372         { .compatible = "svideo-connector" },
 373         { .compatible = "hdmi-connector" },
 374         { .compatible = "dvi-connector" },
 375         {}
 376 };
 377
 378 static int meson_probe_remote(struct platform_device *pdev,
 379                               struct component_match **match,
 380                               struct device_node *parent,
 381                               struct device_node *remote)
 382 {
 383         struct device_node *ep, *remote_node;
 384         int count = 1;
 385
 386         /* If node is a connector, return and do not add to match table */
 387         if (of_match_node(connectors_match, remote))
 388                 return 1;
 389
 390         component_match_add(&pdev->dev, match, compare_of, remote);
 391
 392         for_each_endpoint_of_node(remote, ep) {
 393                 remote_node = of_graph_get_remote_port_parent(ep);
 394                 if (!remote_node ||
 395                     remote_node == parent || /* Ignore parent endpoint */
 396                     !of_device_is_available(remote_node)) {
 397                         of_node_put(remote_node);
 398                         continue;
 399                 }
 400
 401                 count += meson_probe_remote(pdev, match, remote, remote_node);
 402
 403                 of_node_put(remote_node);
 404         }
 405
 406         return count;
 407 }
 408
 409 static int meson_drv_probe(struct platform_device *pdev)
 410 {
 411         struct component_match *match = NULL;
 412         struct device_node *np = pdev->dev.of_node;
 413         struct device_node *ep, *remote;
 414         int count = 0;
 415
 416         for_each_endpoint_of_node(np, ep) {
 417                 remote = of_graph_get_remote_port_parent(ep);
 418                 if (!remote || !of_device_is_available(remote)) {
 419                         of_node_put(remote);
 420                         continue;
 421                 }
 422
 423                 count += meson_probe_remote(pdev, &match, np, remote);
 424                 of_node_put(remote);
 425         }
 426
 427         if (count && !match)
 428                 return meson_drv_bind_master(&pdev->dev, false);
 429
 430         /* If some endpoints were found, initialize the nodes */
 431         if (count) {
 432                 dev_info(&pdev->dev, "Queued %d outputs on vpu\n", count);
 433
 434                 return component_master_add_with_match(&pdev->dev,
 435                                                        &meson_drv_master_ops,
 436                                                        match);
 437         }
 438
 439         /* If no output endpoints were available, simply bail out */
 440         return 0;
 441 };
 442
 443 static const struct of_device_id dt_match[] = {
 444         { .compatible = "amlogic,meson-gxbb-vpu" },
 445         { .compatible = "amlogic,meson-gxl-vpu" },
 446         { .compatible = "amlogic,meson-gxm-vpu" },
 447         {}
 448 };
 449 MODULE_DEVICE_TABLE(of, dt_match);
 450
 451 static struct platform_driver meson_drm_platform_driver = {
 452         .probe      = meson_drv_probe,
 453         .driver     = {
 454                 .name   = "meson-drm",
 455                 .of_match_table = dt_match,
 456         },
 457 };
 458
 459 module_platform_driver(meson_drm_platform_driver);
 460
 461 MODULE_AUTHOR("Jasper St. Pierre <jstpierre@mecheye.net>");
 462 MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>");
 463 MODULE_DESCRIPTION(DRIVER_DESC);
 464 MODULE_LICENSE("GPL");