drivers/gpu/drm/i915/intel_uncore.h

   1 /*
   2  * Copyright © 2017 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  */
  24
  25 #ifndef __INTEL_UNCORE_H__
  26 #define __INTEL_UNCORE_H__
  27
  28 #include <linux/spinlock.h>
  29 #include <linux/notifier.h>
  30 #include <linux/hrtimer.h>
  31
  32 #include "i915_reg.h"
  33
  34 struct drm_i915_private;
  35
  36 enum forcewake_domain_id {
  37         FW_DOMAIN_ID_RENDER = 0,
  38         FW_DOMAIN_ID_BLITTER,
  39         FW_DOMAIN_ID_MEDIA,
  40
  41         FW_DOMAIN_ID_COUNT
  42 };
  43
  44 enum forcewake_domains {
  45         FORCEWAKE_RENDER = BIT(FW_DOMAIN_ID_RENDER),
  46         FORCEWAKE_BLITTER = BIT(FW_DOMAIN_ID_BLITTER),
  47         FORCEWAKE_MEDIA = BIT(FW_DOMAIN_ID_MEDIA),
  48         FORCEWAKE_ALL = (FORCEWAKE_RENDER |
  49                          FORCEWAKE_BLITTER |
  50                          FORCEWAKE_MEDIA)
  51 };
  52
  53 struct intel_uncore_funcs {
  54         void (*force_wake_get)(struct drm_i915_private *dev_priv,
  55                                enum forcewake_domains domains);
  56         void (*force_wake_put)(struct drm_i915_private *dev_priv,
  57                                enum forcewake_domains domains);
  58
  59         uint8_t  (*mmio_readb)(struct drm_i915_private *dev_priv,
  60                                i915_reg_t r, bool trace);
  61         uint16_t (*mmio_readw)(struct drm_i915_private *dev_priv,
  62                                i915_reg_t r, bool trace);
  63         uint32_t (*mmio_readl)(struct drm_i915_private *dev_priv,
  64                                i915_reg_t r, bool trace);
  65         uint64_t (*mmio_readq)(struct drm_i915_private *dev_priv,
  66                                i915_reg_t r, bool trace);
  67
  68         void (*mmio_writeb)(struct drm_i915_private *dev_priv,
  69                             i915_reg_t r, uint8_t val, bool trace);
  70         void (*mmio_writew)(struct drm_i915_private *dev_priv,
  71                             i915_reg_t r, uint16_t val, bool trace);
  72         void (*mmio_writel)(struct drm_i915_private *dev_priv,
  73                             i915_reg_t r, uint32_t val, bool trace);
  74 };
  75
  76 struct intel_forcewake_range {
  77         u32 start;
  78         u32 end;
  79
  80         enum forcewake_domains domains;
  81 };
  82
  83 struct intel_uncore {
  84         spinlock_t lock; /** lock is also taken in irq contexts. */
  85
  86         const struct intel_forcewake_range *fw_domains_table;
  87         unsigned int fw_domains_table_entries;
  88
  89         struct notifier_block pmic_bus_access_nb;
  90         struct intel_uncore_funcs funcs;
  91
  92         unsigned int fifo_count;
  93
  94         enum forcewake_domains fw_domains;
  95         enum forcewake_domains fw_domains_active;
  96
  97         u32 fw_set;
  98         u32 fw_clear;
  99         u32 fw_reset;
 100
 101         struct intel_uncore_forcewake_domain {
 102                 enum forcewake_domain_id id;
 103                 enum forcewake_domains mask;
 104                 unsigned int wake_count;
 105                 bool active;
 106                 struct hrtimer timer;
 107                 i915_reg_t reg_set;
 108                 i915_reg_t reg_ack;
 109         } fw_domain[FW_DOMAIN_ID_COUNT];
 110
 111         struct {
 112                 unsigned int count;
 113
 114                 int saved_mmio_check;
 115                 int saved_mmio_debug;
 116         } user_forcewake;
 117
 118         int unclaimed_mmio_check;
 119 };
 120
 121 /* Iterate over initialised fw domains */
 122 #define for_each_fw_domain_masked(domain__, mask__, dev_priv__, tmp__) \
 123         for (tmp__ = (mask__); \
 124              tmp__ ? (domain__ = &(dev_priv__)->uncore.fw_domain[__mask_next_bit(tmp__)]), 1 : 0;)
 125
 126 #define for_each_fw_domain(domain__, dev_priv__, tmp__) \
 127         for_each_fw_domain_masked(domain__, (dev_priv__)->uncore.fw_domains, dev_priv__, tmp__)
 128
 129
 130 void intel_uncore_sanitize(struct drm_i915_private *dev_priv);
 131 void intel_uncore_init(struct drm_i915_private *dev_priv);
 132 bool intel_uncore_unclaimed_mmio(struct drm_i915_private *dev_priv);
 133 bool intel_uncore_arm_unclaimed_mmio_detection(struct drm_i915_private *dev_priv);
 134 void intel_uncore_fini(struct drm_i915_private *dev_priv);
 135 void intel_uncore_suspend(struct drm_i915_private *dev_priv);
 136 void intel_uncore_resume_early(struct drm_i915_private *dev_priv);
 137 void intel_uncore_runtime_resume(struct drm_i915_private *dev_priv);
 138
 139 u64 intel_uncore_edram_size(struct drm_i915_private *dev_priv);
 140 void assert_forcewakes_inactive(struct drm_i915_private *dev_priv);
 141 void assert_forcewakes_active(struct drm_i915_private *dev_priv,
 142                               enum forcewake_domains fw_domains);
 143 const char *intel_uncore_forcewake_domain_to_str(const enum forcewake_domain_id id);
 144
 145 enum forcewake_domains
 146 intel_uncore_forcewake_for_reg(struct drm_i915_private *dev_priv,
 147                                i915_reg_t reg, unsigned int op);
 148 #define FW_REG_READ  (1)
 149 #define FW_REG_WRITE (2)
 150
 151 void intel_uncore_forcewake_get(struct drm_i915_private *dev_priv,
 152                                 enum forcewake_domains domains);
 153 void intel_uncore_forcewake_put(struct drm_i915_private *dev_priv,
 154                                 enum forcewake_domains domains);
 155 /* Like above but the caller must manage the uncore.lock itself.
 156  * Must be used with I915_READ_FW and friends.
 157  */
 158 void intel_uncore_forcewake_get__locked(struct drm_i915_private *dev_priv,
 159                                         enum forcewake_domains domains);
 160 void intel_uncore_forcewake_put__locked(struct drm_i915_private *dev_priv,
 161                                         enum forcewake_domains domains);
 162
 163 void intel_uncore_forcewake_user_get(struct drm_i915_private *dev_priv);
 164 void intel_uncore_forcewake_user_put(struct drm_i915_private *dev_priv);
 165
 166 int intel_wait_for_register(struct drm_i915_private *dev_priv,
 167                             i915_reg_t reg,
 168                             u32 mask,
 169                             u32 value,
 170                             unsigned int timeout_ms);
 171 int __intel_wait_for_register_fw(struct drm_i915_private *dev_priv,
 172                                  i915_reg_t reg,
 173                                  u32 mask,
 174                                  u32 value,
 175                                  unsigned int fast_timeout_us,
 176                                  unsigned int slow_timeout_ms,
 177                                  u32 *out_value);
 178 static inline
 179 int intel_wait_for_register_fw(struct drm_i915_private *dev_priv,
 180                                i915_reg_t reg,
 181                                u32 mask,
 182                                u32 value,
 183                                unsigned int timeout_ms)
 184 {
 185         return __intel_wait_for_register_fw(dev_priv, reg, mask, value,
 186                                             2, timeout_ms, NULL);
 187 }
 188
 189 #endif /* !__INTEL_UNCORE_H__ */