drivers/gpu/drm/i915/intel_sdvo.c

   1 /*
   2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright © 2006-2007 Intel Corporation
   4  *   Jesse Barnes <jesse.barnes@intel.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23  * DEALINGS IN THE SOFTWARE.
  24  *
  25  * Authors:
  26  *      Eric Anholt <eric@anholt.net>
  27  */
  28 #include <linux/i2c.h>
  29 #include <linux/slab.h>
  30 #include <linux/delay.h>
  31 #include <linux/export.h>
  32 #include <drm/drmP.h>
  33 #include <drm/drm_crtc.h>
  34 #include <drm/drm_edid.h>
  35 #include "intel_drv.h"
  36 #include <drm/i915_drm.h>
  37 #include "i915_drv.h"
  38 #include "intel_sdvo_regs.h"
  39
  40 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  41 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  42 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  43 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
  44
  45 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  46                         SDVO_TV_MASK)
  47
  48 #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
  49 #define IS_TMDS(c)      (c->output_flag & SDVO_TMDS_MASK)
  50 #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
  51 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  52 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  53
  54
  55 static const char *tv_format_names[] = {
  56         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
  57         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
  58         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
  59         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
  60         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
  61         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
  62         "SECAM_60"
  63 };
  64
  65 #define TV_FORMAT_NUM  (sizeof(tv_format_names) / sizeof(*tv_format_names))
  66
  67 struct intel_sdvo {
  68         struct intel_encoder base;
  69
  70         struct i2c_adapter *i2c;
  71         u8 slave_addr;
  72
  73         struct i2c_adapter ddc;
  74
  75         /* Register for the SDVO device: SDVOB or SDVOC */
  76         uint32_t sdvo_reg;
  77
  78         /* Active outputs controlled by this SDVO output */
  79         uint16_t controlled_output;
  80
  81         /*
  82          * Capabilities of the SDVO device returned by
  83          * intel_sdvo_get_capabilities()
  84          */
  85         struct intel_sdvo_caps caps;
  86
  87         /* Pixel clock limitations reported by the SDVO device, in kHz */
  88         int pixel_clock_min, pixel_clock_max;
  89
  90         /*
  91         * For multiple function SDVO device,
  92         * this is for current attached outputs.
  93         */
  94         uint16_t attached_output;
  95
  96         /*
  97          * Hotplug activation bits for this device
  98          */
  99         uint16_t hotplug_active;
 100
 101         /**
 102          * This is used to select the color range of RBG outputs in HDMI mode.
 103          * It is only valid when using TMDS encoding and 8 bit per color mode.
 104          */
 105         uint32_t color_range;
 106         bool color_range_auto;
 107
 108         /**
 109          * This is set if we're going to treat the device as TV-out.
 110          *
 111          * While we have these nice friendly flags for output types that ought
 112          * to decide this for us, the S-Video output on our HDMI+S-Video card
 113          * shows up as RGB1 (VGA).
 114          */
 115         bool is_tv;
 116
 117         /* On different gens SDVOB is at different places. */
 118         bool is_sdvob;
 119
 120         /* This is for current tv format name */
 121         int tv_format_index;
 122
 123         /**
 124          * This is set if we treat the device as HDMI, instead of DVI.
 125          */
 126         bool is_hdmi;
 127         bool has_hdmi_monitor;
 128         bool has_hdmi_audio;
 129         bool rgb_quant_range_selectable;
 130
 131         /**
 132          * This is set if we detect output of sdvo device as LVDS and
 133          * have a valid fixed mode to use with the panel.
 134          */
 135         bool is_lvds;
 136
 137         /**
 138          * This is sdvo fixed pannel mode pointer
 139          */
 140         struct drm_display_mode *sdvo_lvds_fixed_mode;
 141
 142         /* DDC bus used by this SDVO encoder */
 143         uint8_t ddc_bus;
 144
 145         /*
 146          * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
 147          */
 148         uint8_t dtd_sdvo_flags;
 149 };
 150
 151 struct intel_sdvo_connector {
 152         struct intel_connector base;
 153
 154         /* Mark the type of connector */
 155         uint16_t output_flag;
 156
 157         enum hdmi_force_audio force_audio;
 158
 159         /* This contains all current supported TV format */
 160         u8 tv_format_supported[TV_FORMAT_NUM];
 161         int   format_supported_num;
 162         struct drm_property *tv_format;
 163
 164         /* add the property for the SDVO-TV */
 165         struct drm_property *left;
 166         struct drm_property *right;
 167         struct drm_property *top;
 168         struct drm_property *bottom;
 169         struct drm_property *hpos;
 170         struct drm_property *vpos;
 171         struct drm_property *contrast;
 172         struct drm_property *saturation;
 173         struct drm_property *hue;
 174         struct drm_property *sharpness;
 175         struct drm_property *flicker_filter;
 176         struct drm_property *flicker_filter_adaptive;
 177         struct drm_property *flicker_filter_2d;
 178         struct drm_property *tv_chroma_filter;
 179         struct drm_property *tv_luma_filter;
 180         struct drm_property *dot_crawl;
 181
 182         /* add the property for the SDVO-TV/LVDS */
 183         struct drm_property *brightness;
 184
 185         /* Add variable to record current setting for the above property */
 186         u32     left_margin, right_margin, top_margin, bottom_margin;
 187
 188         /* this is to get the range of margin.*/
 189         u32     max_hscan,  max_vscan;
 190         u32     max_hpos, cur_hpos;
 191         u32     max_vpos, cur_vpos;
 192         u32     cur_brightness, max_brightness;
 193         u32     cur_contrast,   max_contrast;
 194         u32     cur_saturation, max_saturation;
 195         u32     cur_hue,        max_hue;
 196         u32     cur_sharpness,  max_sharpness;
 197         u32     cur_flicker_filter,             max_flicker_filter;
 198         u32     cur_flicker_filter_adaptive,    max_flicker_filter_adaptive;
 199         u32     cur_flicker_filter_2d,          max_flicker_filter_2d;
 200         u32     cur_tv_chroma_filter,   max_tv_chroma_filter;
 201         u32     cur_tv_luma_filter,     max_tv_luma_filter;
 202         u32     cur_dot_crawl,  max_dot_crawl;
 203 };
 204
 205 static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder)
 206 {
 207         return container_of(encoder, struct intel_sdvo, base);
 208 }
 209
 210 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
 211 {
 212         return to_sdvo(intel_attached_encoder(connector));
 213 }
 214
 215 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
 216 {
 217         return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
 218 }
 219
 220 static bool
 221 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
 222 static bool
 223 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
 224                               struct intel_sdvo_connector *intel_sdvo_connector,
 225                               int type);
 226 static bool
 227 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
 228                                    struct intel_sdvo_connector *intel_sdvo_connector);
 229
 230 /**
 231  * Writes the SDVOB or SDVOC with the given value, but always writes both
 232  * SDVOB and SDVOC to work around apparent hardware issues (according to
 233  * comments in the BIOS).
 234  */
 235 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
 236 {
 237         struct drm_device *dev = intel_sdvo->base.base.dev;
 238         struct drm_i915_private *dev_priv = dev->dev_private;
 239         u32 bval = val, cval = val;
 240         int i;
 241
 242         if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
 243                 I915_WRITE(intel_sdvo->sdvo_reg, val);
 244                 I915_READ(intel_sdvo->sdvo_reg);
 245                 return;
 246         }
 247
 248         if (intel_sdvo->sdvo_reg == GEN3_SDVOB)
 249                 cval = I915_READ(GEN3_SDVOC);
 250         else
 251                 bval = I915_READ(GEN3_SDVOB);
 252
 253         /*
 254          * Write the registers twice for luck. Sometimes,
 255          * writing them only once doesn't appear to 'stick'.
 256          * The BIOS does this too. Yay, magic
 257          */
 258         for (i = 0; i < 2; i++)
 259         {
 260                 I915_WRITE(GEN3_SDVOB, bval);
 261                 I915_READ(GEN3_SDVOB);
 262                 I915_WRITE(GEN3_SDVOC, cval);
 263                 I915_READ(GEN3_SDVOC);
 264         }
 265 }
 266
 267 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
 268 {
 269         struct i2c_msg msgs[] = {
 270                 {
 271                         .addr = intel_sdvo->slave_addr,
 272                         .flags = 0,
 273                         .len = 1,
 274                         .buf = &addr,
 275                 },
 276                 {
 277                         .addr = intel_sdvo->slave_addr,
 278                         .flags = I2C_M_RD,
 279                         .len = 1,
 280                         .buf = ch,
 281                 }
 282         };
 283         int ret;
 284
 285         if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
 286                 return true;
 287
 288         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
 289         return false;
 290 }
 291
 292 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
 293 /** Mapping of command numbers to names, for debug output */
 294 static const struct _sdvo_cmd_name {
 295         u8 cmd;
 296         const char *name;
 297 } sdvo_cmd_names[] = {
 298         SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
 299         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
 300         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
 301         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
 302         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
 303         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
 304         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
 305         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
 306         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
 307         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
 308         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
 309         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
 310         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
 311         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
 312         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
 313         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
 314         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
 315         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 316         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
 317         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 318         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
 319         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
 320         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
 321         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
 322         SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
 323         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
 324         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
 325         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
 326         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
 327         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
 328         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
 329         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
 330         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
 331         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
 332         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
 333         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
 334         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
 335         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
 336         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
 337         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
 338         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
 339         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
 340         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
 341
 342         /* Add the op code for SDVO enhancements */
 343         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
 344         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
 345         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
 346         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
 347         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
 348         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
 349         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
 350         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
 351         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
 352         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
 353         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
 354         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
 355         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
 356         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
 357         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
 358         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
 359         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
 360         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
 361         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
 362         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
 363         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
 364         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
 365         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
 366         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
 367         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
 368         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
 369         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
 370         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
 371         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
 372         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
 373         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
 374         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
 375         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
 376         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
 377         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
 378         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
 379         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
 380         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
 381         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
 382         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
 383         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
 384         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
 385         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
 386         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
 387
 388         /* HDMI op code */
 389         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
 390         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
 391         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
 392         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
 393         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
 394         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
 395         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
 396         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
 397         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
 398         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
 399         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
 400         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
 401         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
 402         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
 403         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
 404         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
 405         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
 406         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
 407         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
 408         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
 409 };
 410
 411 #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
 412
 413 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
 414                                    const void *args, int args_len)
 415 {
 416         int i, pos = 0;
 417 #define BUF_LEN 256
 418         char buffer[BUF_LEN];
 419
 420 #define BUF_PRINT(args...) \
 421         pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
 422
 423
 424         for (i = 0; i < args_len; i++) {
 425                 BUF_PRINT("%02X ", ((u8 *)args)[i]);
 426         }
 427         for (; i < 8; i++) {
 428                 BUF_PRINT("   ");
 429         }
 430         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
 431                 if (cmd == sdvo_cmd_names[i].cmd) {
 432                         BUF_PRINT("(%s)", sdvo_cmd_names[i].name);
 433                         break;
 434                 }
 435         }
 436         if (i == ARRAY_SIZE(sdvo_cmd_names)) {
 437                 BUF_PRINT("(%02X)", cmd);
 438         }
 439         BUG_ON(pos >= BUF_LEN - 1);
 440 #undef BUF_PRINT
 441 #undef BUF_LEN
 442
 443         DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer);
 444 }
 445
 446 static const char *cmd_status_names[] = {
 447         "Power on",
 448         "Success",
 449         "Not supported",
 450         "Invalid arg",
 451         "Pending",
 452         "Target not specified",
 453         "Scaling not supported"
 454 };
 455
 456 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 457                                  const void *args, int args_len)
 458 {
 459         u8 *buf, status;
 460         struct i2c_msg *msgs;
 461         int i, ret = true;
 462
 463         /* Would be simpler to allocate both in one go ? */
 464         buf = kzalloc(args_len * 2 + 2, GFP_KERNEL);
 465         if (!buf)
 466                 return false;
 467
 468         msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
 469         if (!msgs) {
 470                 kfree(buf);
 471                 return false;
 472         }
 473
 474         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
 475
 476         for (i = 0; i < args_len; i++) {
 477                 msgs[i].addr = intel_sdvo->slave_addr;
 478                 msgs[i].flags = 0;
 479                 msgs[i].len = 2;
 480                 msgs[i].buf = buf + 2 *i;
 481                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
 482                 buf[2*i + 1] = ((u8*)args)[i];
 483         }
 484         msgs[i].addr = intel_sdvo->slave_addr;
 485         msgs[i].flags = 0;
 486         msgs[i].len = 2;
 487         msgs[i].buf = buf + 2*i;
 488         buf[2*i + 0] = SDVO_I2C_OPCODE;
 489         buf[2*i + 1] = cmd;
 490
 491         /* the following two are to read the response */
 492         status = SDVO_I2C_CMD_STATUS;
 493         msgs[i+1].addr = intel_sdvo->slave_addr;
 494         msgs[i+1].flags = 0;
 495         msgs[i+1].len = 1;
 496         msgs[i+1].buf = &status;
 497
 498         msgs[i+2].addr = intel_sdvo->slave_addr;
 499         msgs[i+2].flags = I2C_M_RD;
 500         msgs[i+2].len = 1;
 501         msgs[i+2].buf = &status;
 502
 503         ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 504         if (ret < 0) {
 505                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
 506                 ret = false;
 507                 goto out;
 508         }
 509         if (ret != i+3) {
 510                 /* failure in I2C transfer */
 511                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
 512                 ret = false;
 513         }
 514
 515 out:
 516         kfree(msgs);
 517         kfree(buf);
 518         return ret;
 519 }
 520
 521 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
 522                                      void *response, int response_len)
 523 {
 524         u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
 525         u8 status;
 526         int i, pos = 0;
 527 #define BUF_LEN 256
 528         char buffer[BUF_LEN];
 529
 530
 531         /*
 532          * The documentation states that all commands will be
 533          * processed within 15µs, and that we need only poll
 534          * the status byte a maximum of 3 times in order for the
 535          * command to be complete.
 536          *
 537          * Check 5 times in case the hardware failed to read the docs.
 538          *
 539          * Also beware that the first response by many devices is to
 540          * reply PENDING and stall for time. TVs are notorious for
 541          * requiring longer than specified to complete their replies.
 542          * Originally (in the DDX long ago), the delay was only ever 15ms
 543          * with an additional delay of 30ms applied for TVs added later after
 544          * many experiments. To accommodate both sets of delays, we do a
 545          * sequence of slow checks if the device is falling behind and fails
 546          * to reply within 5*15µs.
 547          */
 548         if (!intel_sdvo_read_byte(intel_sdvo,
 549                                   SDVO_I2C_CMD_STATUS,
 550                                   &status))
 551                 goto log_fail;
 552
 553         while ((status == SDVO_CMD_STATUS_PENDING ||
 554                 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) {
 555                 if (retry < 10)
 556                         msleep(15);
 557                 else
 558                         udelay(15);
 559
 560                 if (!intel_sdvo_read_byte(intel_sdvo,
 561                                           SDVO_I2C_CMD_STATUS,
 562                                           &status))
 563                         goto log_fail;
 564         }
 565
 566 #define BUF_PRINT(args...) \
 567         pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
 568
 569         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
 570                 BUF_PRINT("(%s)", cmd_status_names[status]);
 571         else
 572                 BUF_PRINT("(??? %d)", status);
 573
 574         if (status != SDVO_CMD_STATUS_SUCCESS)
 575                 goto log_fail;
 576
 577         /* Read the command response */
 578         for (i = 0; i < response_len; i++) {
 579                 if (!intel_sdvo_read_byte(intel_sdvo,
 580                                           SDVO_I2C_RETURN_0 + i,
 581                                           &((u8 *)response)[i]))
 582                         goto log_fail;
 583                 BUF_PRINT(" %02X", ((u8 *)response)[i]);
 584         }
 585         BUG_ON(pos >= BUF_LEN - 1);
 586 #undef BUF_PRINT
 587 #undef BUF_LEN
 588
 589         DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer);
 590         return true;
 591
 592 log_fail:
 593         DRM_DEBUG_KMS("%s: R: ... failed\n", SDVO_NAME(intel_sdvo));
 594         return false;
 595 }
 596
 597 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
 598 {
 599         if (mode->clock >= 100000)
 600                 return 1;
 601         else if (mode->clock >= 50000)
 602                 return 2;
 603         else
 604                 return 4;
 605 }
 606
 607 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
 608                                               u8 ddc_bus)
 609 {
 610         /* This must be the immediately preceding write before the i2c xfer */
 611         return intel_sdvo_write_cmd(intel_sdvo,
 612                                     SDVO_CMD_SET_CONTROL_BUS_SWITCH,
 613                                     &ddc_bus, 1);
 614 }
 615
 616 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
 617 {
 618         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
 619                 return false;
 620
 621         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
 622 }
 623
 624 static bool
 625 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
 626 {
 627         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
 628                 return false;
 629
 630         return intel_sdvo_read_response(intel_sdvo, value, len);
 631 }
 632
 633 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
 634 {
 635         struct intel_sdvo_set_target_input_args targets = {0};
 636         return intel_sdvo_set_value(intel_sdvo,
 637                                     SDVO_CMD_SET_TARGET_INPUT,
 638                                     &targets, sizeof(targets));
 639 }
 640
 641 /**
 642  * Return whether each input is trained.
 643  *
 644  * This function is making an assumption about the layout of the response,
 645  * which should be checked against the docs.
 646  */
 647 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
 648 {
 649         struct intel_sdvo_get_trained_inputs_response response;
 650
 651         BUILD_BUG_ON(sizeof(response) != 1);
 652         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
 653                                   &response, sizeof(response)))
 654                 return false;
 655
 656         *input_1 = response.input0_trained;
 657         *input_2 = response.input1_trained;
 658         return true;
 659 }
 660
 661 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
 662                                           u16 outputs)
 663 {
 664         return intel_sdvo_set_value(intel_sdvo,
 665                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
 666                                     &outputs, sizeof(outputs));
 667 }
 668
 669 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
 670                                           u16 *outputs)
 671 {
 672         return intel_sdvo_get_value(intel_sdvo,
 673                                     SDVO_CMD_GET_ACTIVE_OUTPUTS,
 674                                     outputs, sizeof(*outputs));
 675 }
 676
 677 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
 678                                                int mode)
 679 {
 680         u8 state = SDVO_ENCODER_STATE_ON;
 681
 682         switch (mode) {
 683         case DRM_MODE_DPMS_ON:
 684                 state = SDVO_ENCODER_STATE_ON;
 685                 break;
 686         case DRM_MODE_DPMS_STANDBY:
 687                 state = SDVO_ENCODER_STATE_STANDBY;
 688                 break;
 689         case DRM_MODE_DPMS_SUSPEND:
 690                 state = SDVO_ENCODER_STATE_SUSPEND;
 691                 break;
 692         case DRM_MODE_DPMS_OFF:
 693                 state = SDVO_ENCODER_STATE_OFF;
 694                 break;
 695         }
 696
 697         return intel_sdvo_set_value(intel_sdvo,
 698                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
 699 }
 700
 701 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
 702                                                    int *clock_min,
 703                                                    int *clock_max)
 704 {
 705         struct intel_sdvo_pixel_clock_range clocks;
 706
 707         BUILD_BUG_ON(sizeof(clocks) != 4);
 708         if (!intel_sdvo_get_value(intel_sdvo,
 709                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
 710                                   &clocks, sizeof(clocks)))
 711                 return false;
 712
 713         /* Convert the values from units of 10 kHz to kHz. */
 714         *clock_min = clocks.min * 10;
 715         *clock_max = clocks.max * 10;
 716         return true;
 717 }
 718
 719 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
 720                                          u16 outputs)
 721 {
 722         return intel_sdvo_set_value(intel_sdvo,
 723                                     SDVO_CMD_SET_TARGET_OUTPUT,
 724                                     &outputs, sizeof(outputs));
 725 }
 726
 727 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 728                                   struct intel_sdvo_dtd *dtd)
 729 {
 730         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 731                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 732 }
 733
 734 static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 735                                   struct intel_sdvo_dtd *dtd)
 736 {
 737         return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 738                 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 739 }
 740
 741 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
 742                                          struct intel_sdvo_dtd *dtd)
 743 {
 744         return intel_sdvo_set_timing(intel_sdvo,
 745                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
 746 }
 747
 748 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
 749                                          struct intel_sdvo_dtd *dtd)
 750 {
 751         return intel_sdvo_set_timing(intel_sdvo,
 752                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
 753 }
 754
 755 static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo,
 756                                         struct intel_sdvo_dtd *dtd)
 757 {
 758         return intel_sdvo_get_timing(intel_sdvo,
 759                                      SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd);
 760 }
 761
 762 static bool
 763 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 764                                          uint16_t clock,
 765                                          uint16_t width,
 766                                          uint16_t height)
 767 {
 768         struct intel_sdvo_preferred_input_timing_args args;
 769
 770         memset(&args, 0, sizeof(args));
 771         args.clock = clock;
 772         args.width = width;
 773         args.height = height;
 774         args.interlace = 0;
 775
 776         if (intel_sdvo->is_lvds &&
 777            (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
 778             intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
 779                 args.scaled = 1;
 780
 781         return intel_sdvo_set_value(intel_sdvo,
 782                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
 783                                     &args, sizeof(args));
 784 }
 785
 786 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 787                                                   struct intel_sdvo_dtd *dtd)
 788 {
 789         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
 790         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
 791         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
 792                                     &dtd->part1, sizeof(dtd->part1)) &&
 793                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
 794                                      &dtd->part2, sizeof(dtd->part2));
 795 }
 796
 797 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
 798 {
 799         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
 800 }
 801
 802 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
 803                                          const struct drm_display_mode *mode)
 804 {
 805         uint16_t width, height;
 806         uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
 807         uint16_t h_sync_offset, v_sync_offset;
 808         int mode_clock;
 809
 810         memset(dtd, 0, sizeof(*dtd));
 811
 812         width = mode->hdisplay;
 813         height = mode->vdisplay;
 814
 815         /* do some mode translations */
 816         h_blank_len = mode->htotal - mode->hdisplay;
 817         h_sync_len = mode->hsync_end - mode->hsync_start;
 818
 819         v_blank_len = mode->vtotal - mode->vdisplay;
 820         v_sync_len = mode->vsync_end - mode->vsync_start;
 821
 822         h_sync_offset = mode->hsync_start - mode->hdisplay;
 823         v_sync_offset = mode->vsync_start - mode->vdisplay;
 824
 825         mode_clock = mode->clock;
 826         mode_clock /= 10;
 827         dtd->part1.clock = mode_clock;
 828
 829         dtd->part1.h_active = width & 0xff;
 830         dtd->part1.h_blank = h_blank_len & 0xff;
 831         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
 832                 ((h_blank_len >> 8) & 0xf);
 833         dtd->part1.v_active = height & 0xff;
 834         dtd->part1.v_blank = v_blank_len & 0xff;
 835         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
 836                 ((v_blank_len >> 8) & 0xf);
 837
 838         dtd->part2.h_sync_off = h_sync_offset & 0xff;
 839         dtd->part2.h_sync_width = h_sync_len & 0xff;
 840         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
 841                 (v_sync_len & 0xf);
 842         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
 843                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
 844                 ((v_sync_len & 0x30) >> 4);
 845
 846         dtd->part2.dtd_flags = 0x18;
 847         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
 848                 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
 849         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 850                 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
 851         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 852                 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
 853
 854         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
 855 }
 856
 857 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode,
 858                                          const struct intel_sdvo_dtd *dtd)
 859 {
 860         struct drm_display_mode mode = {};
 861
 862         mode.hdisplay = dtd->part1.h_active;
 863         mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
 864         mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off;
 865         mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
 866         mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width;
 867         mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
 868         mode.htotal = mode.hdisplay + dtd->part1.h_blank;
 869         mode.htotal += (dtd->part1.h_high & 0xf) << 8;
 870
 871         mode.vdisplay = dtd->part1.v_active;
 872         mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
 873         mode.vsync_start = mode.vdisplay;
 874         mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
 875         mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
 876         mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0;
 877         mode.vsync_end = mode.vsync_start +
 878                 (dtd->part2.v_sync_off_width & 0xf);
 879         mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
 880         mode.vtotal = mode.vdisplay + dtd->part1.v_blank;
 881         mode.vtotal += (dtd->part1.v_high & 0xf) << 8;
 882
 883         mode.clock = dtd->part1.clock * 10;
 884
 885         if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
 886                 mode.flags |= DRM_MODE_FLAG_INTERLACE;
 887         if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
 888                 mode.flags |= DRM_MODE_FLAG_PHSYNC;
 889         else
 890                 mode.flags |= DRM_MODE_FLAG_NHSYNC;
 891         if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
 892                 mode.flags |= DRM_MODE_FLAG_PVSYNC;
 893         else
 894                 mode.flags |= DRM_MODE_FLAG_NVSYNC;
 895
 896         drm_mode_set_crtcinfo(&mode, 0);
 897
 898         drm_mode_copy(pmode, &mode);
 899 }
 900
 901 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
 902 {
 903         struct intel_sdvo_encode encode;
 904
 905         BUILD_BUG_ON(sizeof(encode) != 2);
 906         return intel_sdvo_get_value(intel_sdvo,
 907                                   SDVO_CMD_GET_SUPP_ENCODE,
 908                                   &encode, sizeof(encode));
 909 }
 910
 911 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
 912                                   uint8_t mode)
 913 {
 914         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
 915 }
 916
 917 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
 918                                        uint8_t mode)
 919 {
 920         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
 921 }
 922
 923 #if 0
 924 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
 925 {
 926         int i, j;
 927         uint8_t set_buf_index[2];
 928         uint8_t av_split;
 929         uint8_t buf_size;
 930         uint8_t buf[48];
 931         uint8_t *pos;
 932
 933         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
 934
 935         for (i = 0; i <= av_split; i++) {
 936                 set_buf_index[0] = i; set_buf_index[1] = 0;
 937                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
 938                                      set_buf_index, 2);
 939                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
 940                 intel_sdvo_read_response(encoder, &buf_size, 1);
 941
 942                 pos = buf;
 943                 for (j = 0; j <= buf_size; j += 8) {
 944                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
 945                                              NULL, 0);
 946                         intel_sdvo_read_response(encoder, pos, 8);
 947                         pos += 8;
 948                 }
 949         }
 950 }
 951 #endif
 952
 953 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
 954                                        unsigned if_index, uint8_t tx_rate,
 955                                        const uint8_t *data, unsigned length)
 956 {
 957         uint8_t set_buf_index[2] = { if_index, 0 };
 958         uint8_t hbuf_size, tmp[8];
 959         int i;
 960
 961         if (!intel_sdvo_set_value(intel_sdvo,
 962                                   SDVO_CMD_SET_HBUF_INDEX,
 963                                   set_buf_index, 2))
 964                 return false;
 965
 966         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
 967                                   &hbuf_size, 1))
 968                 return false;
 969
 970         /* Buffer size is 0 based, hooray! */
 971         hbuf_size++;
 972
 973         DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
 974                       if_index, length, hbuf_size);
 975
 976         for (i = 0; i < hbuf_size; i += 8) {
 977                 memset(tmp, 0, 8);
 978                 if (i < length)
 979                         memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
 980
 981                 if (!intel_sdvo_set_value(intel_sdvo,
 982                                           SDVO_CMD_SET_HBUF_DATA,
 983                                           tmp, 8))
 984                         return false;
 985         }
 986
 987         return intel_sdvo_set_value(intel_sdvo,
 988                                     SDVO_CMD_SET_HBUF_TXRATE,
 989                                     &tx_rate, 1);
 990 }
 991
 992 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
 993                                          const struct drm_display_mode *adjusted_mode)
 994 {
 995         uint8_t sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
 996         struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
 997         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 998         union hdmi_infoframe frame;
 999         int ret;
1000         ssize_t len;
1001
1002         ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi,
1003                                                        adjusted_mode);
1004         if (ret < 0) {
1005                 DRM_ERROR("couldn't fill AVI infoframe\n");
1006                 return false;
1007         }
1008
1009         if (intel_sdvo->rgb_quant_range_selectable) {
1010                 if (intel_crtc->config.limited_color_range)
1011                         frame.avi.quantization_range =
1012                                 HDMI_QUANTIZATION_RANGE_LIMITED;
1013                 else
1014                         frame.avi.quantization_range =
1015                                 HDMI_QUANTIZATION_RANGE_FULL;
1016         }
1017
1018         len = hdmi_infoframe_pack(&frame, sdvo_data, sizeof(sdvo_data));
1019         if (len < 0)
1020                 return false;
1021
1022         return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1023                                           SDVO_HBUF_TX_VSYNC,
1024                                           sdvo_data, sizeof(sdvo_data));
1025 }
1026
1027 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
1028 {
1029         struct intel_sdvo_tv_format format;
1030         uint32_t format_map;
1031
1032         format_map = 1 << intel_sdvo->tv_format_index;
1033         memset(&format, 0, sizeof(format));
1034         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
1035
1036         BUILD_BUG_ON(sizeof(format) != 6);
1037         return intel_sdvo_set_value(intel_sdvo,
1038                                     SDVO_CMD_SET_TV_FORMAT,
1039                                     &format, sizeof(format));
1040 }
1041
1042 static bool
1043 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
1044                                         const struct drm_display_mode *mode)
1045 {
1046         struct intel_sdvo_dtd output_dtd;
1047
1048         if (!intel_sdvo_set_target_output(intel_sdvo,
1049                                           intel_sdvo->attached_output))
1050                 return false;
1051
1052         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1053         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1054                 return false;
1055
1056         return true;
1057 }
1058
1059 /* Asks the sdvo controller for the preferred input mode given the output mode.
1060  * Unfortunately we have to set up the full output mode to do that. */
1061 static bool
1062 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
1063                                     const struct drm_display_mode *mode,
1064                                     struct drm_display_mode *adjusted_mode)
1065 {
1066         struct intel_sdvo_dtd input_dtd;
1067
1068         /* Reset the input timing to the screen. Assume always input 0. */
1069         if (!intel_sdvo_set_target_input(intel_sdvo))
1070                 return false;
1071
1072         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1073                                                       mode->clock / 10,
1074                                                       mode->hdisplay,
1075                                                       mode->vdisplay))
1076                 return false;
1077
1078         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1079                                                    &input_dtd))
1080                 return false;
1081
1082         intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1083         intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
1084
1085         return true;
1086 }
1087
1088 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_config *pipe_config)
1089 {
1090         unsigned dotclock = pipe_config->port_clock;
1091         struct dpll *clock = &pipe_config->dpll;
1092
1093         /* SDVO TV has fixed PLL values depend on its clock range,
1094            this mirrors vbios setting. */
1095         if (dotclock >= 100000 && dotclock < 140500) {
1096                 clock->p1 = 2;
1097                 clock->p2 = 10;
1098                 clock->n = 3;
1099                 clock->m1 = 16;
1100                 clock->m2 = 8;
1101         } else if (dotclock >= 140500 && dotclock <= 200000) {
1102                 clock->p1 = 1;
1103                 clock->p2 = 10;
1104                 clock->n = 6;
1105                 clock->m1 = 12;
1106                 clock->m2 = 8;
1107         } else {
1108                 WARN(1, "SDVO TV clock out of range: %i\n", dotclock);
1109         }
1110
1111         pipe_config->clock_set = true;
1112 }
1113
1114 static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
1115                                       struct intel_crtc_config *pipe_config)
1116 {
1117         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1118         struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
1119         struct drm_display_mode *mode = &pipe_config->requested_mode;
1120
1121         DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1122         pipe_config->pipe_bpp = 8*3;
1123
1124         if (HAS_PCH_SPLIT(encoder->base.dev))
1125                 pipe_config->has_pch_encoder = true;
1126
1127         /* We need to construct preferred input timings based on our
1128          * output timings.  To do that, we have to set the output
1129          * timings, even though this isn't really the right place in
1130          * the sequence to do it. Oh well.
1131          */
1132         if (intel_sdvo->is_tv) {
1133                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1134                         return false;
1135
1136                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1137                                                            mode,
1138                                                            adjusted_mode);
1139                 pipe_config->sdvo_tv_clock = true;
1140         } else if (intel_sdvo->is_lvds) {
1141                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1142                                                              intel_sdvo->sdvo_lvds_fixed_mode))
1143                         return false;
1144
1145                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1146                                                            mode,
1147                                                            adjusted_mode);
1148         }
1149
1150         /* Make the CRTC code factor in the SDVO pixel multiplier.  The
1151          * SDVO device will factor out the multiplier during mode_set.
1152          */
1153         pipe_config->pixel_multiplier =
1154                 intel_sdvo_get_pixel_multiplier(adjusted_mode);
1155
1156         pipe_config->has_hdmi_sink = intel_sdvo->has_hdmi_monitor;
1157
1158         if (intel_sdvo->color_range_auto) {
1159                 /* See CEA-861-E - 5.1 Default Encoding Parameters */
1160                 /* FIXME: This bit is only valid when using TMDS encoding and 8
1161                  * bit per color mode. */
1162                 if (pipe_config->has_hdmi_sink &&
1163                     drm_match_cea_mode(adjusted_mode) > 1)
1164                         pipe_config->limited_color_range = true;
1165         } else {
1166                 if (pipe_config->has_hdmi_sink &&
1167                     intel_sdvo->color_range == HDMI_COLOR_RANGE_16_235)
1168                         pipe_config->limited_color_range = true;
1169         }
1170
1171         /* Clock computation needs to happen after pixel multiplier. */
1172         if (intel_sdvo->is_tv)
1173                 i9xx_adjust_sdvo_tv_clock(pipe_config);
1174
1175         return true;
1176 }
1177
1178 static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder)
1179 {
1180         struct drm_device *dev = intel_encoder->base.dev;
1181         struct drm_i915_private *dev_priv = dev->dev_private;
1182         struct intel_crtc *crtc = to_intel_crtc(intel_encoder->base.crtc);
1183         struct drm_display_mode *adjusted_mode =
1184                 &crtc->config.adjusted_mode;
1185         struct drm_display_mode *mode = &crtc->config.requested_mode;
1186         struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder);
1187         u32 sdvox;
1188         struct intel_sdvo_in_out_map in_out;
1189         struct intel_sdvo_dtd input_dtd, output_dtd;
1190         int rate;
1191
1192         if (!mode)
1193                 return;
1194
1195         /* First, set the input mapping for the first input to our controlled
1196          * output. This is only correct if we're a single-input device, in
1197          * which case the first input is the output from the appropriate SDVO
1198          * channel on the motherboard.  In a two-input device, the first input
1199          * will be SDVOB and the second SDVOC.
1200          */
1201         in_out.in0 = intel_sdvo->attached_output;
1202         in_out.in1 = 0;
1203
1204         intel_sdvo_set_value(intel_sdvo,
1205                              SDVO_CMD_SET_IN_OUT_MAP,
1206                              &in_out, sizeof(in_out));
1207
1208         /* Set the output timings to the screen */
1209         if (!intel_sdvo_set_target_output(intel_sdvo,
1210                                           intel_sdvo->attached_output))
1211                 return;
1212
1213         /* lvds has a special fixed output timing. */
1214         if (intel_sdvo->is_lvds)
1215                 intel_sdvo_get_dtd_from_mode(&output_dtd,
1216                                              intel_sdvo->sdvo_lvds_fixed_mode);
1217         else
1218                 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1219         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1220                 DRM_INFO("Setting output timings on %s failed\n",
1221                          SDVO_NAME(intel_sdvo));
1222
1223         /* Set the input timing to the screen. Assume always input 0. */
1224         if (!intel_sdvo_set_target_input(intel_sdvo))
1225                 return;
1226
1227         if (crtc->config.has_hdmi_sink) {
1228                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1229                 intel_sdvo_set_colorimetry(intel_sdvo,
1230                                            SDVO_COLORIMETRY_RGB256);
1231                 intel_sdvo_set_avi_infoframe(intel_sdvo, adjusted_mode);
1232         } else
1233                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1234
1235         if (intel_sdvo->is_tv &&
1236             !intel_sdvo_set_tv_format(intel_sdvo))
1237                 return;
1238
1239         intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1240
1241         if (intel_sdvo->is_tv || intel_sdvo->is_lvds)
1242                 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1243         if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1244                 DRM_INFO("Setting input timings on %s failed\n",
1245                          SDVO_NAME(intel_sdvo));
1246
1247         switch (crtc->config.pixel_multiplier) {
1248         default:
1249                 WARN(1, "unknown pixel mutlipler specified\n");
1250         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1251         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1252         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1253         }
1254         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1255                 return;
1256
1257         /* Set the SDVO control regs. */
1258         if (INTEL_INFO(dev)->gen >= 4) {
1259                 /* The real mode polarity is set by the SDVO commands, using
1260                  * struct intel_sdvo_dtd. */
1261                 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1262                 if (!HAS_PCH_SPLIT(dev) && crtc->config.limited_color_range)
1263                         sdvox |= HDMI_COLOR_RANGE_16_235;
1264                 if (INTEL_INFO(dev)->gen < 5)
1265                         sdvox |= SDVO_BORDER_ENABLE;
1266         } else {
1267                 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1268                 switch (intel_sdvo->sdvo_reg) {
1269                 case GEN3_SDVOB:
1270                         sdvox &= SDVOB_PRESERVE_MASK;
1271                         break;
1272                 case GEN3_SDVOC:
1273                         sdvox &= SDVOC_PRESERVE_MASK;
1274                         break;
1275                 }
1276                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1277         }
1278
1279         if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1280                 sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe);
1281         else
1282                 sdvox |= SDVO_PIPE_SEL(crtc->pipe);
1283
1284         if (intel_sdvo->has_hdmi_audio)
1285                 sdvox |= SDVO_AUDIO_ENABLE;
1286
1287         if (INTEL_INFO(dev)->gen >= 4) {
1288                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1289         } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1290                 /* done in crtc_mode_set as it lives inside the dpll register */
1291         } else {
1292                 sdvox |= (crtc->config.pixel_multiplier - 1)
1293                         << SDVO_PORT_MULTIPLY_SHIFT;
1294         }
1295
1296         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1297             INTEL_INFO(dev)->gen < 5)
1298                 sdvox |= SDVO_STALL_SELECT;
1299         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1300 }
1301
1302 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1303 {
1304         struct intel_sdvo_connector *intel_sdvo_connector =
1305                 to_intel_sdvo_connector(&connector->base);
1306         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1307         u16 active_outputs = 0;
1308
1309         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1310
1311         if (active_outputs & intel_sdvo_connector->output_flag)
1312                 return true;
1313         else
1314                 return false;
1315 }
1316
1317 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1318                                     enum pipe *pipe)
1319 {
1320         struct drm_device *dev = encoder->base.dev;
1321         struct drm_i915_private *dev_priv = dev->dev_private;
1322         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1323         u16 active_outputs = 0;
1324         u32 tmp;
1325
1326         tmp = I915_READ(intel_sdvo->sdvo_reg);
1327         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1328
1329         if (!(tmp & SDVO_ENABLE) && (active_outputs == 0))
1330                 return false;
1331
1332         if (HAS_PCH_CPT(dev))
1333                 *pipe = PORT_TO_PIPE_CPT(tmp);
1334         else
1335                 *pipe = PORT_TO_PIPE(tmp);
1336
1337         return true;
1338 }
1339
1340 static void intel_sdvo_get_config(struct intel_encoder *encoder,
1341                                   struct intel_crtc_config *pipe_config)
1342 {
1343         struct drm_device *dev = encoder->base.dev;
1344         struct drm_i915_private *dev_priv = dev->dev_private;
1345         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1346         struct intel_sdvo_dtd dtd;
1347         int encoder_pixel_multiplier = 0;
1348         int dotclock;
1349         u32 flags = 0, sdvox;
1350         u8 val;
1351         bool ret;
1352
1353         sdvox = I915_READ(intel_sdvo->sdvo_reg);
1354
1355         ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
1356         if (!ret) {
1357                 /* Some sdvo encoders are not spec compliant and don't
1358                  * implement the mandatory get_timings function. */
1359                 DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n");
1360                 pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS;
1361         } else {
1362                 if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
1363                         flags |= DRM_MODE_FLAG_PHSYNC;
1364                 else
1365                         flags |= DRM_MODE_FLAG_NHSYNC;
1366
1367                 if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
1368                         flags |= DRM_MODE_FLAG_PVSYNC;
1369                 else
1370                         flags |= DRM_MODE_FLAG_NVSYNC;
1371         }
1372
1373         pipe_config->adjusted_mode.flags |= flags;
1374
1375         /*
1376          * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
1377          * the sdvo port register, on all other platforms it is part of the dpll
1378          * state. Since the general pipe state readout happens before the
1379          * encoder->get_config we so already have a valid pixel multplier on all
1380          * other platfroms.
1381          */
1382         if (IS_I915G(dev) || IS_I915GM(dev)) {
1383                 pipe_config->pixel_multiplier =
1384                         ((sdvox & SDVO_PORT_MULTIPLY_MASK)
1385                          >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
1386         }
1387
1388         dotclock = pipe_config->port_clock / pipe_config->pixel_multiplier;
1389
1390         if (HAS_PCH_SPLIT(dev))
1391                 ironlake_check_encoder_dotclock(pipe_config, dotclock);
1392
1393         pipe_config->adjusted_mode.crtc_clock = dotclock;
1394
1395         /* Cross check the port pixel multiplier with the sdvo encoder state. */
1396         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT,
1397                                  &val, 1)) {
1398                 switch (val) {
1399                 case SDVO_CLOCK_RATE_MULT_1X:
1400                         encoder_pixel_multiplier = 1;
1401                         break;
1402                 case SDVO_CLOCK_RATE_MULT_2X:
1403                         encoder_pixel_multiplier = 2;
1404                         break;
1405                 case SDVO_CLOCK_RATE_MULT_4X:
1406                         encoder_pixel_multiplier = 4;
1407                         break;
1408                 }
1409         }
1410
1411         if (sdvox & HDMI_COLOR_RANGE_16_235)
1412                 pipe_config->limited_color_range = true;
1413
1414         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE,
1415                                  &val, 1)) {
1416                 if (val == SDVO_ENCODE_HDMI)
1417                         pipe_config->has_hdmi_sink = true;
1418         }
1419
1420         WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier,
1421              "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1422              pipe_config->pixel_multiplier, encoder_pixel_multiplier);
1423 }
1424
1425 static void intel_disable_sdvo(struct intel_encoder *encoder)
1426 {
1427         struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
1428         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1429         u32 temp;
1430
1431         intel_sdvo_set_active_outputs(intel_sdvo, 0);
1432         if (0)
1433                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1434                                                    DRM_MODE_DPMS_OFF);
1435
1436         temp = I915_READ(intel_sdvo->sdvo_reg);
1437         if ((temp & SDVO_ENABLE) != 0) {
1438                 /* HW workaround for IBX, we need to move the port to
1439                  * transcoder A before disabling it. */
1440                 if (HAS_PCH_IBX(encoder->base.dev)) {
1441                         struct drm_crtc *crtc = encoder->base.crtc;
1442                         int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1;
1443
1444                         if (temp & SDVO_PIPE_B_SELECT) {
1445                                 temp &= ~SDVO_PIPE_B_SELECT;
1446                                 I915_WRITE(intel_sdvo->sdvo_reg, temp);
1447                                 POSTING_READ(intel_sdvo->sdvo_reg);
1448
1449                                 /* Again we need to write this twice. */
1450                                 I915_WRITE(intel_sdvo->sdvo_reg, temp);
1451                                 POSTING_READ(intel_sdvo->sdvo_reg);
1452
1453                                 /* Transcoder selection bits only update
1454                                  * effectively on vblank. */
1455                                 if (crtc)
1456                                         intel_wait_for_vblank(encoder->base.dev, pipe);
1457                                 else
1458                                         msleep(50);
1459                         }
1460                 }
1461
1462                 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1463         }
1464 }
1465
1466 static void intel_enable_sdvo(struct intel_encoder *encoder)
1467 {
1468         struct drm_device *dev = encoder->base.dev;
1469         struct drm_i915_private *dev_priv = dev->dev_private;
1470         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1471         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
1472         u32 temp;
1473         bool input1, input2;
1474         int i;
1475         bool success;
1476
1477         temp = I915_READ(intel_sdvo->sdvo_reg);
1478         if ((temp & SDVO_ENABLE) == 0) {
1479                 /* HW workaround for IBX, we need to move the port
1480                  * to transcoder A before disabling it, so restore it here. */
1481                 if (HAS_PCH_IBX(dev))
1482                         temp |= SDVO_PIPE_SEL(intel_crtc->pipe);
1483
1484                 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1485         }
1486         for (i = 0; i < 2; i++)
1487                 intel_wait_for_vblank(dev, intel_crtc->pipe);
1488
1489         success = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1490         /* Warn if the device reported failure to sync.
1491          * A lot of SDVO devices fail to notify of sync, but it's
1492          * a given it the status is a success, we succeeded.
1493          */
1494         if (success && !input1) {
1495                 DRM_DEBUG_KMS("First %s output reported failure to "
1496                                 "sync\n", SDVO_NAME(intel_sdvo));
1497         }
1498
1499         if (0)
1500                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1501                                                    DRM_MODE_DPMS_ON);
1502         intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1503 }
1504
1505 /* Special dpms function to support cloning between dvo/sdvo/crt. */
1506 static void intel_sdvo_dpms(struct drm_connector *connector, int mode)
1507 {
1508         struct drm_crtc *crtc;
1509         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1510
1511         /* dvo supports only 2 dpms states. */
1512         if (mode != DRM_MODE_DPMS_ON)
1513                 mode = DRM_MODE_DPMS_OFF;
1514
1515         if (mode == connector->dpms)
1516                 return;
1517
1518         connector->dpms = mode;
1519
1520         /* Only need to change hw state when actually enabled */
1521         crtc = intel_sdvo->base.base.crtc;
1522         if (!crtc) {
1523                 intel_sdvo->base.connectors_active = false;
1524                 return;
1525         }
1526
1527         /* We set active outputs manually below in case pipe dpms doesn't change
1528          * due to cloning. */
1529         if (mode != DRM_MODE_DPMS_ON) {
1530                 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1531                 if (0)
1532                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1533
1534                 intel_sdvo->base.connectors_active = false;
1535
1536                 intel_crtc_update_dpms(crtc);
1537         } else {
1538                 intel_sdvo->base.connectors_active = true;
1539
1540                 intel_crtc_update_dpms(crtc);
1541
1542                 if (0)
1543                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1544                 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1545         }
1546
1547         intel_modeset_check_state(connector->dev);
1548 }
1549
1550 static enum drm_mode_status
1551 intel_sdvo_mode_valid(struct drm_connector *connector,
1552                       struct drm_display_mode *mode)
1553 {
1554         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1555
1556         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1557                 return MODE_NO_DBLESCAN;
1558
1559         if (intel_sdvo->pixel_clock_min > mode->clock)
1560                 return MODE_CLOCK_LOW;
1561
1562         if (intel_sdvo->pixel_clock_max < mode->clock)
1563                 return MODE_CLOCK_HIGH;
1564
1565         if (intel_sdvo->is_lvds) {
1566                 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1567                         return MODE_PANEL;
1568
1569                 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1570                         return MODE_PANEL;
1571         }
1572
1573         return MODE_OK;
1574 }
1575
1576 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1577 {
1578         BUILD_BUG_ON(sizeof(*caps) != 8);
1579         if (!intel_sdvo_get_value(intel_sdvo,
1580                                   SDVO_CMD_GET_DEVICE_CAPS,
1581                                   caps, sizeof(*caps)))
1582                 return false;
1583
1584         DRM_DEBUG_KMS("SDVO capabilities:\n"
1585                       "  vendor_id: %d\n"
1586                       "  device_id: %d\n"
1587                       "  device_rev_id: %d\n"
1588                       "  sdvo_version_major: %d\n"
1589                       "  sdvo_version_minor: %d\n"
1590                       "  sdvo_inputs_mask: %d\n"
1591                       "  smooth_scaling: %d\n"
1592                       "  sharp_scaling: %d\n"
1593                       "  up_scaling: %d\n"
1594                       "  down_scaling: %d\n"
1595                       "  stall_support: %d\n"
1596                       "  output_flags: %d\n",
1597                       caps->vendor_id,
1598                       caps->device_id,
1599                       caps->device_rev_id,
1600                       caps->sdvo_version_major,
1601                       caps->sdvo_version_minor,
1602                       caps->sdvo_inputs_mask,
1603                       caps->smooth_scaling,
1604                       caps->sharp_scaling,
1605                       caps->up_scaling,
1606                       caps->down_scaling,
1607                       caps->stall_support,
1608                       caps->output_flags);
1609
1610         return true;
1611 }
1612
1613 static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
1614 {
1615         struct drm_device *dev = intel_sdvo->base.base.dev;
1616         uint16_t hotplug;
1617
1618         /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1619          * on the line. */
1620         if (IS_I945G(dev) || IS_I945GM(dev))
1621                 return 0;
1622
1623         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1624                                         &hotplug, sizeof(hotplug)))
1625                 return 0;
1626
1627         return hotplug;
1628 }
1629
1630 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1631 {
1632         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1633
1634         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1635                         &intel_sdvo->hotplug_active, 2);
1636 }
1637
1638 static bool
1639 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1640 {
1641         /* Is there more than one type of output? */
1642         return hweight16(intel_sdvo->caps.output_flags) > 1;
1643 }
1644
1645 static struct edid *
1646 intel_sdvo_get_edid(struct drm_connector *connector)
1647 {
1648         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1649         return drm_get_edid(connector, &sdvo->ddc);
1650 }
1651
1652 /* Mac mini hack -- use the same DDC as the analog connector */
1653 static struct edid *
1654 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1655 {
1656         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1657
1658         return drm_get_edid(connector,
1659                             intel_gmbus_get_adapter(dev_priv,
1660                                                     dev_priv->vbt.crt_ddc_pin));
1661 }
1662
1663 static enum drm_connector_status
1664 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1665 {
1666         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1667         enum drm_connector_status status;
1668         struct edid *edid;
1669
1670         edid = intel_sdvo_get_edid(connector);
1671
1672         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1673                 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1674
1675                 /*
1676                  * Don't use the 1 as the argument of DDC bus switch to get
1677                  * the EDID. It is used for SDVO SPD ROM.
1678                  */
1679                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1680                         intel_sdvo->ddc_bus = ddc;
1681                         edid = intel_sdvo_get_edid(connector);
1682                         if (edid)
1683                                 break;
1684                 }
1685                 /*
1686                  * If we found the EDID on the other bus,
1687                  * assume that is the correct DDC bus.
1688                  */
1689                 if (edid == NULL)
1690                         intel_sdvo->ddc_bus = saved_ddc;
1691         }
1692
1693         /*
1694          * When there is no edid and no monitor is connected with VGA
1695          * port, try to use the CRT ddc to read the EDID for DVI-connector.
1696          */
1697         if (edid == NULL)
1698                 edid = intel_sdvo_get_analog_edid(connector);
1699
1700         status = connector_status_unknown;
1701         if (edid != NULL) {
1702                 /* DDC bus is shared, match EDID to connector type */
1703                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1704                         status = connector_status_connected;
1705                         if (intel_sdvo->is_hdmi) {
1706                                 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1707                                 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1708                                 intel_sdvo->rgb_quant_range_selectable =
1709                                         drm_rgb_quant_range_selectable(edid);
1710                         }
1711                 } else
1712                         status = connector_status_disconnected;
1713                 kfree(edid);
1714         }
1715
1716         if (status == connector_status_connected) {
1717                 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1718                 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1719                         intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
1720         }
1721
1722         return status;
1723 }
1724
1725 static bool
1726 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1727                                   struct edid *edid)
1728 {
1729         bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1730         bool connector_is_digital = !!IS_DIGITAL(sdvo);
1731
1732         DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1733                       connector_is_digital, monitor_is_digital);
1734         return connector_is_digital == monitor_is_digital;
1735 }
1736
1737 static enum drm_connector_status
1738 intel_sdvo_detect(struct drm_connector *connector, bool force)
1739 {
1740         uint16_t response;
1741         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1742         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1743         enum drm_connector_status ret;
1744
1745         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1746                       connector->base.id, connector->name);
1747
1748         if (!intel_sdvo_get_value(intel_sdvo,
1749                                   SDVO_CMD_GET_ATTACHED_DISPLAYS,
1750                                   &response, 2))
1751                 return connector_status_unknown;
1752
1753         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1754                       response & 0xff, response >> 8,
1755                       intel_sdvo_connector->output_flag);
1756
1757         if (response == 0)
1758                 return connector_status_disconnected;
1759
1760         intel_sdvo->attached_output = response;
1761
1762         intel_sdvo->has_hdmi_monitor = false;
1763         intel_sdvo->has_hdmi_audio = false;
1764         intel_sdvo->rgb_quant_range_selectable = false;
1765
1766         if ((intel_sdvo_connector->output_flag & response) == 0)
1767                 ret = connector_status_disconnected;
1768         else if (IS_TMDS(intel_sdvo_connector))
1769                 ret = intel_sdvo_tmds_sink_detect(connector);
1770         else {
1771                 struct edid *edid;
1772
1773                 /* if we have an edid check it matches the connection */
1774                 edid = intel_sdvo_get_edid(connector);
1775                 if (edid == NULL)
1776                         edid = intel_sdvo_get_analog_edid(connector);
1777                 if (edid != NULL) {
1778                         if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1779                                                               edid))
1780                                 ret = connector_status_connected;
1781                         else
1782                                 ret = connector_status_disconnected;
1783
1784                         kfree(edid);
1785                 } else
1786                         ret = connector_status_connected;
1787         }
1788
1789         /* May update encoder flag for like clock for SDVO TV, etc.*/
1790         if (ret == connector_status_connected) {
1791                 intel_sdvo->is_tv = false;
1792                 intel_sdvo->is_lvds = false;
1793
1794                 if (response & SDVO_TV_MASK)
1795                         intel_sdvo->is_tv = true;
1796                 if (response & SDVO_LVDS_MASK)
1797                         intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1798         }
1799
1800         return ret;
1801 }
1802
1803 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1804 {
1805         struct edid *edid;
1806
1807         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1808                       connector->base.id, connector->name);
1809
1810         /* set the bus switch and get the modes */
1811         edid = intel_sdvo_get_edid(connector);
1812
1813         /*
1814          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
1815          * link between analog and digital outputs. So, if the regular SDVO
1816          * DDC fails, check to see if the analog output is disconnected, in
1817          * which case we'll look there for the digital DDC data.
1818          */
1819         if (edid == NULL)
1820                 edid = intel_sdvo_get_analog_edid(connector);
1821
1822         if (edid != NULL) {
1823                 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1824                                                       edid)) {
1825                         drm_mode_connector_update_edid_property(connector, edid);
1826                         drm_add_edid_modes(connector, edid);
1827                 }
1828
1829                 kfree(edid);
1830         }
1831 }
1832
1833 /*
1834  * Set of SDVO TV modes.
1835  * Note!  This is in reply order (see loop in get_tv_modes).
1836  * XXX: all 60Hz refresh?
1837  */
1838 static const struct drm_display_mode sdvo_tv_modes[] = {
1839         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1840                    416, 0, 200, 201, 232, 233, 0,
1841                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1842         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1843                    416, 0, 240, 241, 272, 273, 0,
1844                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1845         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1846                    496, 0, 300, 301, 332, 333, 0,
1847                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1848         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1849                    736, 0, 350, 351, 382, 383, 0,
1850                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1851         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1852                    736, 0, 400, 401, 432, 433, 0,
1853                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1854         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1855                    736, 0, 480, 481, 512, 513, 0,
1856                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1857         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1858                    800, 0, 480, 481, 512, 513, 0,
1859                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1860         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1861                    800, 0, 576, 577, 608, 609, 0,
1862                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1863         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1864                    816, 0, 350, 351, 382, 383, 0,
1865                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1866         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1867                    816, 0, 400, 401, 432, 433, 0,
1868                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1869         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1870                    816, 0, 480, 481, 512, 513, 0,
1871                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1872         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1873                    816, 0, 540, 541, 572, 573, 0,
1874                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1875         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1876                    816, 0, 576, 577, 608, 609, 0,
1877                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1878         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1879                    864, 0, 576, 577, 608, 609, 0,
1880                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1881         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1882                    896, 0, 600, 601, 632, 633, 0,
1883                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1884         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1885                    928, 0, 624, 625, 656, 657, 0,
1886                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1887         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1888                    1016, 0, 766, 767, 798, 799, 0,
1889                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1890         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1891                    1120, 0, 768, 769, 800, 801, 0,
1892                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1893         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1894                    1376, 0, 1024, 1025, 1056, 1057, 0,
1895                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1896 };
1897
1898 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1899 {
1900         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1901         struct intel_sdvo_sdtv_resolution_request tv_res;
1902         uint32_t reply = 0, format_map = 0;
1903         int i;
1904
1905         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1906                       connector->base.id, connector->name);
1907
1908         /* Read the list of supported input resolutions for the selected TV
1909          * format.
1910          */
1911         format_map = 1 << intel_sdvo->tv_format_index;
1912         memcpy(&tv_res, &format_map,
1913                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1914
1915         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1916                 return;
1917
1918         BUILD_BUG_ON(sizeof(tv_res) != 3);
1919         if (!intel_sdvo_write_cmd(intel_sdvo,
1920                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1921                                   &tv_res, sizeof(tv_res)))
1922                 return;
1923         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1924                 return;
1925
1926         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1927                 if (reply & (1 << i)) {
1928                         struct drm_display_mode *nmode;
1929                         nmode = drm_mode_duplicate(connector->dev,
1930                                                    &sdvo_tv_modes[i]);
1931                         if (nmode)
1932                                 drm_mode_probed_add(connector, nmode);
1933                 }
1934 }
1935
1936 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1937 {
1938         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1939         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1940         struct drm_display_mode *newmode;
1941
1942         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1943                       connector->base.id, connector->name);
1944
1945         /*
1946          * Fetch modes from VBT. For SDVO prefer the VBT mode since some
1947          * SDVO->LVDS transcoders can't cope with the EDID mode.
1948          */
1949         if (dev_priv->vbt.sdvo_lvds_vbt_mode != NULL) {
1950                 newmode = drm_mode_duplicate(connector->dev,
1951                                              dev_priv->vbt.sdvo_lvds_vbt_mode);
1952                 if (newmode != NULL) {
1953                         /* Guarantee the mode is preferred */
1954                         newmode->type = (DRM_MODE_TYPE_PREFERRED |
1955                                          DRM_MODE_TYPE_DRIVER);
1956                         drm_mode_probed_add(connector, newmode);
1957                 }
1958         }
1959
1960         /*
1961          * Attempt to get the mode list from DDC.
1962          * Assume that the preferred modes are
1963          * arranged in priority order.
1964          */
1965         intel_ddc_get_modes(connector, &intel_sdvo->ddc);
1966
1967         list_for_each_entry(newmode, &connector->probed_modes, head) {
1968                 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1969                         intel_sdvo->sdvo_lvds_fixed_mode =
1970                                 drm_mode_duplicate(connector->dev, newmode);
1971
1972                         intel_sdvo->is_lvds = true;
1973                         break;
1974                 }
1975         }
1976 }
1977
1978 static int intel_sdvo_get_modes(struct drm_connector *connector)
1979 {
1980         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1981
1982         if (IS_TV(intel_sdvo_connector))
1983                 intel_sdvo_get_tv_modes(connector);
1984         else if (IS_LVDS(intel_sdvo_connector))
1985                 intel_sdvo_get_lvds_modes(connector);
1986         else
1987                 intel_sdvo_get_ddc_modes(connector);
1988
1989         return !list_empty(&connector->probed_modes);
1990 }
1991
1992 static void
1993 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1994 {
1995         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1996         struct drm_device *dev = connector->dev;
1997
1998         if (intel_sdvo_connector->left)
1999                 drm_property_destroy(dev, intel_sdvo_connector->left);
2000         if (intel_sdvo_connector->right)
2001                 drm_property_destroy(dev, intel_sdvo_connector->right);
2002         if (intel_sdvo_connector->top)
2003                 drm_property_destroy(dev, intel_sdvo_connector->top);
2004         if (intel_sdvo_connector->bottom)
2005                 drm_property_destroy(dev, intel_sdvo_connector->bottom);
2006         if (intel_sdvo_connector->hpos)
2007                 drm_property_destroy(dev, intel_sdvo_connector->hpos);
2008         if (intel_sdvo_connector->vpos)
2009                 drm_property_destroy(dev, intel_sdvo_connector->vpos);
2010         if (intel_sdvo_connector->saturation)
2011                 drm_property_destroy(dev, intel_sdvo_connector->saturation);
2012         if (intel_sdvo_connector->contrast)
2013                 drm_property_destroy(dev, intel_sdvo_connector->contrast);
2014         if (intel_sdvo_connector->hue)
2015                 drm_property_destroy(dev, intel_sdvo_connector->hue);
2016         if (intel_sdvo_connector->sharpness)
2017                 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
2018         if (intel_sdvo_connector->flicker_filter)
2019                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
2020         if (intel_sdvo_connector->flicker_filter_2d)
2021                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
2022         if (intel_sdvo_connector->flicker_filter_adaptive)
2023                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
2024         if (intel_sdvo_connector->tv_luma_filter)
2025                 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
2026         if (intel_sdvo_connector->tv_chroma_filter)
2027                 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
2028         if (intel_sdvo_connector->dot_crawl)
2029                 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
2030         if (intel_sdvo_connector->brightness)
2031                 drm_property_destroy(dev, intel_sdvo_connector->brightness);
2032 }
2033
2034 static void intel_sdvo_destroy(struct drm_connector *connector)
2035 {
2036         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2037
2038         if (intel_sdvo_connector->tv_format)
2039                 drm_property_destroy(connector->dev,
2040                                      intel_sdvo_connector->tv_format);
2041
2042         intel_sdvo_destroy_enhance_property(connector);
2043         drm_connector_cleanup(connector);
2044         kfree(intel_sdvo_connector);
2045 }
2046
2047 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
2048 {
2049         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
2050         struct edid *edid;
2051         bool has_audio = false;
2052
2053         if (!intel_sdvo->is_hdmi)
2054                 return false;
2055
2056         edid = intel_sdvo_get_edid(connector);
2057         if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
2058                 has_audio = drm_detect_monitor_audio(edid);
2059         kfree(edid);
2060
2061         return has_audio;
2062 }
2063
2064 static int
2065 intel_sdvo_set_property(struct drm_connector *connector,
2066                         struct drm_property *property,
2067                         uint64_t val)
2068 {
2069         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
2070         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2071         struct drm_i915_private *dev_priv = connector->dev->dev_private;
2072         uint16_t temp_value;
2073         uint8_t cmd;
2074         int ret;
2075
2076         ret = drm_object_property_set_value(&connector->base, property, val);
2077         if (ret)
2078                 return ret;
2079
2080         if (property == dev_priv->force_audio_property) {
2081                 int i = val;
2082                 bool has_audio;
2083
2084                 if (i == intel_sdvo_connector->force_audio)
2085                         return 0;
2086
2087                 intel_sdvo_connector->force_audio = i;
2088
2089                 if (i == HDMI_AUDIO_AUTO)
2090                         has_audio = intel_sdvo_detect_hdmi_audio(connector);
2091                 else
2092                         has_audio = (i == HDMI_AUDIO_ON);
2093
2094                 if (has_audio == intel_sdvo->has_hdmi_audio)
2095                         return 0;
2096
2097                 intel_sdvo->has_hdmi_audio = has_audio;
2098                 goto done;
2099         }
2100
2101         if (property == dev_priv->broadcast_rgb_property) {
2102                 bool old_auto = intel_sdvo->color_range_auto;
2103                 uint32_t old_range = intel_sdvo->color_range;
2104
2105                 switch (val) {
2106                 case INTEL_BROADCAST_RGB_AUTO:
2107                         intel_sdvo->color_range_auto = true;
2108                         break;
2109                 case INTEL_BROADCAST_RGB_FULL:
2110                         intel_sdvo->color_range_auto = false;
2111                         intel_sdvo->color_range = 0;
2112                         break;
2113                 case INTEL_BROADCAST_RGB_LIMITED:
2114                         intel_sdvo->color_range_auto = false;
2115                         /* FIXME: this bit is only valid when using TMDS
2116                          * encoding and 8 bit per color mode. */
2117                         intel_sdvo->color_range = HDMI_COLOR_RANGE_16_235;
2118                         break;
2119                 default:
2120                         return -EINVAL;
2121                 }
2122
2123                 if (old_auto == intel_sdvo->color_range_auto &&
2124                     old_range == intel_sdvo->color_range)
2125                         return 0;
2126
2127                 goto done;
2128         }
2129
2130 #define CHECK_PROPERTY(name, NAME) \
2131         if (intel_sdvo_connector->name == property) { \
2132                 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
2133                 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
2134                 cmd = SDVO_CMD_SET_##NAME; \
2135                 intel_sdvo_connector->cur_##name = temp_value; \
2136                 goto set_value; \
2137         }
2138
2139         if (property == intel_sdvo_connector->tv_format) {
2140                 if (val >= TV_FORMAT_NUM)
2141                         return -EINVAL;
2142
2143                 if (intel_sdvo->tv_format_index ==
2144                     intel_sdvo_connector->tv_format_supported[val])
2145                         return 0;
2146
2147                 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
2148                 goto done;
2149         } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
2150                 temp_value = val;
2151                 if (intel_sdvo_connector->left == property) {
2152                         drm_object_property_set_value(&connector->base,
2153                                                          intel_sdvo_connector->right, val);
2154                         if (intel_sdvo_connector->left_margin == temp_value)
2155                                 return 0;
2156
2157                         intel_sdvo_connector->left_margin = temp_value;
2158                         intel_sdvo_connector->right_margin = temp_value;
2159                         temp_value = intel_sdvo_connector->max_hscan -
2160                                 intel_sdvo_connector->left_margin;
2161                         cmd = SDVO_CMD_SET_OVERSCAN_H;
2162                         goto set_value;
2163                 } else if (intel_sdvo_connector->right == property) {
2164                         drm_object_property_set_value(&connector->base,
2165                                                          intel_sdvo_connector->left, val);
2166                         if (intel_sdvo_connector->right_margin == temp_value)
2167                                 return 0;
2168
2169                         intel_sdvo_connector->left_margin = temp_value;
2170                         intel_sdvo_connector->right_margin = temp_value;
2171                         temp_value = intel_sdvo_connector->max_hscan -
2172                                 intel_sdvo_connector->left_margin;
2173                         cmd = SDVO_CMD_SET_OVERSCAN_H;
2174                         goto set_value;
2175                 } else if (intel_sdvo_connector->top == property) {
2176                         drm_object_property_set_value(&connector->base,
2177                                                          intel_sdvo_connector->bottom, val);
2178                         if (intel_sdvo_connector->top_margin == temp_value)
2179                                 return 0;
2180
2181                         intel_sdvo_connector->top_margin = temp_value;
2182                         intel_sdvo_connector->bottom_margin = temp_value;
2183                         temp_value = intel_sdvo_connector->max_vscan -
2184                                 intel_sdvo_connector->top_margin;
2185                         cmd = SDVO_CMD_SET_OVERSCAN_V;
2186                         goto set_value;
2187                 } else if (intel_sdvo_connector->bottom == property) {
2188                         drm_object_property_set_value(&connector->base,
2189                                                          intel_sdvo_connector->top, val);
2190                         if (intel_sdvo_connector->bottom_margin == temp_value)
2191                                 return 0;
2192
2193                         intel_sdvo_connector->top_margin = temp_value;
2194                         intel_sdvo_connector->bottom_margin = temp_value;
2195                         temp_value = intel_sdvo_connector->max_vscan -
2196                                 intel_sdvo_connector->top_margin;
2197                         cmd = SDVO_CMD_SET_OVERSCAN_V;
2198                         goto set_value;
2199                 }
2200                 CHECK_PROPERTY(hpos, HPOS)
2201                 CHECK_PROPERTY(vpos, VPOS)
2202                 CHECK_PROPERTY(saturation, SATURATION)
2203                 CHECK_PROPERTY(contrast, CONTRAST)
2204                 CHECK_PROPERTY(hue, HUE)
2205                 CHECK_PROPERTY(brightness, BRIGHTNESS)
2206                 CHECK_PROPERTY(sharpness, SHARPNESS)
2207                 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
2208                 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
2209                 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
2210                 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
2211                 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
2212                 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
2213         }
2214
2215         return -EINVAL; /* unknown property */
2216
2217 set_value:
2218         if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
2219                 return -EIO;
2220
2221
2222 done:
2223         if (intel_sdvo->base.base.crtc)
2224                 intel_crtc_restore_mode(intel_sdvo->base.base.crtc);
2225
2226         return 0;
2227 #undef CHECK_PROPERTY
2228 }
2229
2230 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
2231         .dpms = intel_sdvo_dpms,
2232         .detect = intel_sdvo_detect,
2233         .fill_modes = drm_helper_probe_single_connector_modes,
2234         .set_property = intel_sdvo_set_property,
2235         .destroy = intel_sdvo_destroy,
2236 };
2237
2238 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2239         .get_modes = intel_sdvo_get_modes,
2240         .mode_valid = intel_sdvo_mode_valid,
2241         .best_encoder = intel_best_encoder,
2242 };
2243
2244 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
2245 {
2246         struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder));
2247
2248         if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
2249                 drm_mode_destroy(encoder->dev,
2250                                  intel_sdvo->sdvo_lvds_fixed_mode);
2251
2252         i2c_del_adapter(&intel_sdvo->ddc);
2253         intel_encoder_destroy(encoder);
2254 }
2255
2256 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2257         .destroy = intel_sdvo_enc_destroy,
2258 };
2259
2260 static void
2261 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2262 {
2263         uint16_t mask = 0;
2264         unsigned int num_bits;
2265
2266         /* Make a mask of outputs less than or equal to our own priority in the
2267          * list.
2268          */
2269         switch (sdvo->controlled_output) {
2270         case SDVO_OUTPUT_LVDS1:
2271                 mask |= SDVO_OUTPUT_LVDS1;
2272         case SDVO_OUTPUT_LVDS0:
2273                 mask |= SDVO_OUTPUT_LVDS0;
2274         case SDVO_OUTPUT_TMDS1:
2275                 mask |= SDVO_OUTPUT_TMDS1;
2276         case SDVO_OUTPUT_TMDS0:
2277                 mask |= SDVO_OUTPUT_TMDS0;
2278         case SDVO_OUTPUT_RGB1:
2279                 mask |= SDVO_OUTPUT_RGB1;
2280         case SDVO_OUTPUT_RGB0:
2281                 mask |= SDVO_OUTPUT_RGB0;
2282                 break;
2283         }
2284
2285         /* Count bits to find what number we are in the priority list. */
2286         mask &= sdvo->caps.output_flags;
2287         num_bits = hweight16(mask);
2288         /* If more than 3 outputs, default to DDC bus 3 for now. */
2289         if (num_bits > 3)
2290                 num_bits = 3;
2291
2292         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2293         sdvo->ddc_bus = 1 << num_bits;
2294 }
2295
2296 /**
2297  * Choose the appropriate DDC bus for control bus switch command for this
2298  * SDVO output based on the controlled output.
2299  *
2300  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2301  * outputs, then LVDS outputs.
2302  */
2303 static void
2304 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2305                           struct intel_sdvo *sdvo, u32 reg)
2306 {
2307         struct sdvo_device_mapping *mapping;
2308
2309         if (sdvo->is_sdvob)
2310                 mapping = &(dev_priv->sdvo_mappings[0]);
2311         else
2312                 mapping = &(dev_priv->sdvo_mappings[1]);
2313
2314         if (mapping->initialized)
2315                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2316         else
2317                 intel_sdvo_guess_ddc_bus(sdvo);
2318 }
2319
2320 static void
2321 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2322                           struct intel_sdvo *sdvo, u32 reg)
2323 {
2324         struct sdvo_device_mapping *mapping;
2325         u8 pin;
2326
2327         if (sdvo->is_sdvob)
2328                 mapping = &dev_priv->sdvo_mappings[0];
2329         else
2330                 mapping = &dev_priv->sdvo_mappings[1];
2331
2332         if (mapping->initialized && intel_gmbus_is_port_valid(mapping->i2c_pin))
2333                 pin = mapping->i2c_pin;
2334         else
2335                 pin = GMBUS_PORT_DPB;
2336
2337         sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2338
2339         /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2340          * our code totally fails once we start using gmbus. Hence fall back to
2341          * bit banging for now. */
2342         intel_gmbus_force_bit(sdvo->i2c, true);
2343 }
2344
2345 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2346 static void
2347 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2348 {
2349         intel_gmbus_force_bit(sdvo->i2c, false);
2350 }
2351
2352 static bool
2353 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
2354 {
2355         return intel_sdvo_check_supp_encode(intel_sdvo);
2356 }
2357
2358 static u8
2359 intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
2360 {
2361         struct drm_i915_private *dev_priv = dev->dev_private;
2362         struct sdvo_device_mapping *my_mapping, *other_mapping;
2363
2364         if (sdvo->is_sdvob) {
2365                 my_mapping = &dev_priv->sdvo_mappings[0];
2366                 other_mapping = &dev_priv->sdvo_mappings[1];
2367         } else {
2368                 my_mapping = &dev_priv->sdvo_mappings[1];
2369                 other_mapping = &dev_priv->sdvo_mappings[0];
2370         }
2371
2372         /* If the BIOS described our SDVO device, take advantage of it. */
2373         if (my_mapping->slave_addr)
2374                 return my_mapping->slave_addr;
2375
2376         /* If the BIOS only described a different SDVO device, use the
2377          * address that it isn't using.
2378          */
2379         if (other_mapping->slave_addr) {
2380                 if (other_mapping->slave_addr == 0x70)
2381                         return 0x72;
2382                 else
2383                         return 0x70;
2384         }
2385
2386         /* No SDVO device info is found for another DVO port,
2387          * so use mapping assumption we had before BIOS parsing.
2388          */
2389         if (sdvo->is_sdvob)
2390                 return 0x70;
2391         else
2392                 return 0x72;
2393 }
2394
2395 static void
2396 intel_sdvo_connector_unregister(struct intel_connector *intel_connector)
2397 {
2398         struct drm_connector *drm_connector;
2399         struct intel_sdvo *sdvo_encoder;
2400
2401         drm_connector = &intel_connector->base;
2402         sdvo_encoder = intel_attached_sdvo(&intel_connector->base);
2403
2404         sysfs_remove_link(&drm_connector->kdev->kobj,
2405                           sdvo_encoder->ddc.dev.kobj.name);
2406         intel_connector_unregister(intel_connector);
2407 }
2408
2409 static int
2410 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2411                           struct intel_sdvo *encoder)
2412 {
2413         struct drm_connector *drm_connector;
2414         int ret;
2415
2416         drm_connector = &connector->base.base;
2417         ret = drm_connector_init(encoder->base.base.dev,
2418                            drm_connector,
2419                            &intel_sdvo_connector_funcs,
2420                            connector->base.base.connector_type);
2421         if (ret < 0)
2422                 return ret;
2423
2424         drm_connector_helper_add(drm_connector,
2425                                  &intel_sdvo_connector_helper_funcs);
2426
2427         connector->base.base.interlace_allowed = 1;
2428         connector->base.base.doublescan_allowed = 0;
2429         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2430         connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2431         connector->base.unregister = intel_sdvo_connector_unregister;
2432
2433         intel_connector_attach_encoder(&connector->base, &encoder->base);
2434         ret = drm_sysfs_connector_add(drm_connector);
2435         if (ret < 0)
2436                 goto err1;
2437
2438         ret = sysfs_create_link(&drm_connector->kdev->kobj,
2439                                 &encoder->ddc.dev.kobj,
2440                                 encoder->ddc.dev.kobj.name);
2441         if (ret < 0)
2442                 goto err2;
2443
2444         return 0;
2445
2446 err2:
2447         drm_sysfs_connector_remove(drm_connector);
2448 err1:
2449         drm_connector_cleanup(drm_connector);
2450
2451         return ret;
2452 }
2453
2454 static void
2455 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
2456                                struct intel_sdvo_connector *connector)
2457 {
2458         struct drm_device *dev = connector->base.base.dev;
2459
2460         intel_attach_force_audio_property(&connector->base.base);
2461         if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev)) {
2462                 intel_attach_broadcast_rgb_property(&connector->base.base);
2463                 intel_sdvo->color_range_auto = true;
2464         }
2465 }
2466
2467 static bool
2468 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2469 {
2470         struct drm_encoder *encoder = &intel_sdvo->base.base;
2471         struct drm_connector *connector;
2472         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2473         struct intel_connector *intel_connector;
2474         struct intel_sdvo_connector *intel_sdvo_connector;
2475
2476         DRM_DEBUG_KMS("initialising DVI device %d\n", device);
2477
2478         intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL);
2479         if (!intel_sdvo_connector)
2480                 return false;
2481
2482         if (device == 0) {
2483                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2484                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2485         } else if (device == 1) {
2486                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2487                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2488         }
2489
2490         intel_connector = &intel_sdvo_connector->base;
2491         connector = &intel_connector->base;
2492         if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2493                 intel_sdvo_connector->output_flag) {
2494                 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2495                 /* Some SDVO devices have one-shot hotplug interrupts.
2496                  * Ensure that they get re-enabled when an interrupt happens.
2497                  */
2498                 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2499                 intel_sdvo_enable_hotplug(intel_encoder);
2500         } else {
2501                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2502         }
2503         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2504         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2505
2506         if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2507                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2508                 intel_sdvo->is_hdmi = true;
2509         }
2510
2511         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2512                 kfree(intel_sdvo_connector);
2513                 return false;
2514         }
2515
2516         if (intel_sdvo->is_hdmi)
2517                 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
2518
2519         return true;
2520 }
2521
2522 static bool
2523 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2524 {
2525         struct drm_encoder *encoder = &intel_sdvo->base.base;
2526         struct drm_connector *connector;
2527         struct intel_connector *intel_connector;
2528         struct intel_sdvo_connector *intel_sdvo_connector;
2529
2530         DRM_DEBUG_KMS("initialising TV type %d\n", type);
2531
2532         intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL);
2533         if (!intel_sdvo_connector)
2534                 return false;
2535
2536         intel_connector = &intel_sdvo_connector->base;
2537         connector = &intel_connector->base;
2538         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2539         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2540
2541         intel_sdvo->controlled_output |= type;
2542         intel_sdvo_connector->output_flag = type;
2543
2544         intel_sdvo->is_tv = true;
2545
2546         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2547                 kfree(intel_sdvo_connector);
2548                 return false;
2549         }
2550
2551         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2552                 goto err;
2553
2554         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2555                 goto err;
2556
2557         return true;
2558
2559 err:
2560         drm_sysfs_connector_remove(connector);
2561         intel_sdvo_destroy(connector);
2562         return false;
2563 }
2564
2565 static bool
2566 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2567 {
2568         struct drm_encoder *encoder = &intel_sdvo->base.base;
2569         struct drm_connector *connector;
2570         struct intel_connector *intel_connector;
2571         struct intel_sdvo_connector *intel_sdvo_connector;
2572
2573         DRM_DEBUG_KMS("initialising analog device %d\n", device);
2574
2575         intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL);
2576         if (!intel_sdvo_connector)
2577                 return false;
2578
2579         intel_connector = &intel_sdvo_connector->base;
2580         connector = &intel_connector->base;
2581         intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2582         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2583         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2584
2585         if (device == 0) {
2586                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2587                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2588         } else if (device == 1) {
2589                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2590                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2591         }
2592
2593         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2594                 kfree(intel_sdvo_connector);
2595                 return false;
2596         }
2597
2598         return true;
2599 }
2600
2601 static bool
2602 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2603 {
2604         struct drm_encoder *encoder = &intel_sdvo->base.base;
2605         struct drm_connector *connector;
2606         struct intel_connector *intel_connector;
2607         struct intel_sdvo_connector *intel_sdvo_connector;
2608
2609         DRM_DEBUG_KMS("initialising LVDS device %d\n", device);
2610
2611         intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL);
2612         if (!intel_sdvo_connector)
2613                 return false;
2614
2615         intel_connector = &intel_sdvo_connector->base;
2616         connector = &intel_connector->base;
2617         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2618         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2619
2620         if (device == 0) {
2621                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2622                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2623         } else if (device == 1) {
2624                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2625                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2626         }
2627
2628         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2629                 kfree(intel_sdvo_connector);
2630                 return false;
2631         }
2632
2633         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2634                 goto err;
2635
2636         return true;
2637
2638 err:
2639         drm_sysfs_connector_remove(connector);
2640         intel_sdvo_destroy(connector);
2641         return false;
2642 }
2643
2644 static bool
2645 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2646 {
2647         intel_sdvo->is_tv = false;
2648         intel_sdvo->is_lvds = false;
2649
2650         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2651
2652         if (flags & SDVO_OUTPUT_TMDS0)
2653                 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2654                         return false;
2655
2656         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2657                 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2658                         return false;
2659
2660         /* TV has no XXX1 function block */
2661         if (flags & SDVO_OUTPUT_SVID0)
2662                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2663                         return false;
2664
2665         if (flags & SDVO_OUTPUT_CVBS0)
2666                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2667                         return false;
2668
2669         if (flags & SDVO_OUTPUT_YPRPB0)
2670                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2671                         return false;
2672
2673         if (flags & SDVO_OUTPUT_RGB0)
2674                 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2675                         return false;
2676
2677         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2678                 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2679                         return false;
2680
2681         if (flags & SDVO_OUTPUT_LVDS0)
2682                 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2683                         return false;
2684
2685         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2686                 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2687                         return false;
2688
2689         if ((flags & SDVO_OUTPUT_MASK) == 0) {
2690                 unsigned char bytes[2];
2691
2692                 intel_sdvo->controlled_output = 0;
2693                 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2694                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2695                               SDVO_NAME(intel_sdvo),
2696                               bytes[0], bytes[1]);
2697                 return false;
2698         }
2699         intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2700
2701         return true;
2702 }
2703
2704 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2705 {
2706         struct drm_device *dev = intel_sdvo->base.base.dev;
2707         struct drm_connector *connector, *tmp;
2708
2709         list_for_each_entry_safe(connector, tmp,
2710                                  &dev->mode_config.connector_list, head) {
2711                 if (intel_attached_encoder(connector) == &intel_sdvo->base) {
2712                         drm_sysfs_connector_remove(connector);
2713                         intel_sdvo_destroy(connector);
2714                 }
2715         }
2716 }
2717
2718 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2719                                           struct intel_sdvo_connector *intel_sdvo_connector,
2720                                           int type)
2721 {
2722         struct drm_device *dev = intel_sdvo->base.base.dev;
2723         struct intel_sdvo_tv_format format;
2724         uint32_t format_map, i;
2725
2726         if (!intel_sdvo_set_target_output(intel_sdvo, type))
2727                 return false;
2728
2729         BUILD_BUG_ON(sizeof(format) != 6);
2730         if (!intel_sdvo_get_value(intel_sdvo,
2731                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2732                                   &format, sizeof(format)))
2733                 return false;
2734
2735         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2736
2737         if (format_map == 0)
2738                 return false;
2739
2740         intel_sdvo_connector->format_supported_num = 0;
2741         for (i = 0 ; i < TV_FORMAT_NUM; i++)
2742                 if (format_map & (1 << i))
2743                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2744
2745
2746         intel_sdvo_connector->tv_format =
2747                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
2748                                             "mode", intel_sdvo_connector->format_supported_num);
2749         if (!intel_sdvo_connector->tv_format)
2750                 return false;
2751
2752         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2753                 drm_property_add_enum(
2754                                 intel_sdvo_connector->tv_format, i,
2755                                 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2756
2757         intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2758         drm_object_attach_property(&intel_sdvo_connector->base.base.base,
2759                                       intel_sdvo_connector->tv_format, 0);
2760         return true;
2761
2762 }
2763
2764 #define ENHANCEMENT(name, NAME) do { \
2765         if (enhancements.name) { \
2766                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2767                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2768                         return false; \
2769                 intel_sdvo_connector->max_##name = data_value[0]; \
2770                 intel_sdvo_connector->cur_##name = response; \
2771                 intel_sdvo_connector->name = \
2772                         drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2773                 if (!intel_sdvo_connector->name) return false; \
2774                 drm_object_attach_property(&connector->base, \
2775                                               intel_sdvo_connector->name, \
2776                                               intel_sdvo_connector->cur_##name); \
2777                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2778                               data_value[0], data_value[1], response); \
2779         } \
2780 } while (0)
2781
2782 static bool
2783 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2784                                       struct intel_sdvo_connector *intel_sdvo_connector,
2785                                       struct intel_sdvo_enhancements_reply enhancements)
2786 {
2787         struct drm_device *dev = intel_sdvo->base.base.dev;
2788         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2789         uint16_t response, data_value[2];
2790
2791         /* when horizontal overscan is supported, Add the left/right  property */
2792         if (enhancements.overscan_h) {
2793                 if (!intel_sdvo_get_value(intel_sdvo,
2794                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
2795                                           &data_value, 4))
2796                         return false;
2797
2798                 if (!intel_sdvo_get_value(intel_sdvo,
2799                                           SDVO_CMD_GET_OVERSCAN_H,
2800                                           &response, 2))
2801                         return false;
2802
2803                 intel_sdvo_connector->max_hscan = data_value[0];
2804                 intel_sdvo_connector->left_margin = data_value[0] - response;
2805                 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2806                 intel_sdvo_connector->left =
2807                         drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2808                 if (!intel_sdvo_connector->left)
2809                         return false;
2810
2811                 drm_object_attach_property(&connector->base,
2812                                               intel_sdvo_connector->left,
2813                                               intel_sdvo_connector->left_margin);
2814
2815                 intel_sdvo_connector->right =
2816                         drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2817                 if (!intel_sdvo_connector->right)
2818                         return false;
2819
2820                 drm_object_attach_property(&connector->base,
2821                                               intel_sdvo_connector->right,
2822                                               intel_sdvo_connector->right_margin);
2823                 DRM_DEBUG_KMS("h_overscan: max %d, "
2824                               "default %d, current %d\n",
2825                               data_value[0], data_value[1], response);
2826         }
2827
2828         if (enhancements.overscan_v) {
2829                 if (!intel_sdvo_get_value(intel_sdvo,
2830                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
2831                                           &data_value, 4))
2832                         return false;
2833
2834                 if (!intel_sdvo_get_value(intel_sdvo,
2835                                           SDVO_CMD_GET_OVERSCAN_V,
2836                                           &response, 2))
2837                         return false;
2838
2839                 intel_sdvo_connector->max_vscan = data_value[0];
2840                 intel_sdvo_connector->top_margin = data_value[0] - response;
2841                 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2842                 intel_sdvo_connector->top =
2843                         drm_property_create_range(dev, 0,
2844                                             "top_margin", 0, data_value[0]);
2845                 if (!intel_sdvo_connector->top)
2846                         return false;
2847
2848                 drm_object_attach_property(&connector->base,
2849                                               intel_sdvo_connector->top,
2850                                               intel_sdvo_connector->top_margin);
2851
2852                 intel_sdvo_connector->bottom =
2853                         drm_property_create_range(dev, 0,
2854                                             "bottom_margin", 0, data_value[0]);
2855                 if (!intel_sdvo_connector->bottom)
2856                         return false;
2857
2858                 drm_object_attach_property(&connector->base,
2859                                               intel_sdvo_connector->bottom,
2860                                               intel_sdvo_connector->bottom_margin);
2861                 DRM_DEBUG_KMS("v_overscan: max %d, "
2862                               "default %d, current %d\n",
2863                               data_value[0], data_value[1], response);
2864         }
2865
2866         ENHANCEMENT(hpos, HPOS);
2867         ENHANCEMENT(vpos, VPOS);
2868         ENHANCEMENT(saturation, SATURATION);
2869         ENHANCEMENT(contrast, CONTRAST);
2870         ENHANCEMENT(hue, HUE);
2871         ENHANCEMENT(sharpness, SHARPNESS);
2872         ENHANCEMENT(brightness, BRIGHTNESS);
2873         ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2874         ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2875         ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2876         ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2877         ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2878
2879         if (enhancements.dot_crawl) {
2880                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2881                         return false;
2882
2883                 intel_sdvo_connector->max_dot_crawl = 1;
2884                 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2885                 intel_sdvo_connector->dot_crawl =
2886                         drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2887                 if (!intel_sdvo_connector->dot_crawl)
2888                         return false;
2889
2890                 drm_object_attach_property(&connector->base,
2891                                               intel_sdvo_connector->dot_crawl,
2892                                               intel_sdvo_connector->cur_dot_crawl);
2893                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2894         }
2895
2896         return true;
2897 }
2898
2899 static bool
2900 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2901                                         struct intel_sdvo_connector *intel_sdvo_connector,
2902                                         struct intel_sdvo_enhancements_reply enhancements)
2903 {
2904         struct drm_device *dev = intel_sdvo->base.base.dev;
2905         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2906         uint16_t response, data_value[2];
2907
2908         ENHANCEMENT(brightness, BRIGHTNESS);
2909
2910         return true;
2911 }
2912 #undef ENHANCEMENT
2913
2914 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2915                                                struct intel_sdvo_connector *intel_sdvo_connector)
2916 {
2917         union {
2918                 struct intel_sdvo_enhancements_reply reply;
2919                 uint16_t response;
2920         } enhancements;
2921
2922         BUILD_BUG_ON(sizeof(enhancements) != 2);
2923
2924         enhancements.response = 0;
2925         intel_sdvo_get_value(intel_sdvo,
2926                              SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2927                              &enhancements, sizeof(enhancements));
2928         if (enhancements.response == 0) {
2929                 DRM_DEBUG_KMS("No enhancement is supported\n");
2930                 return true;
2931         }
2932
2933         if (IS_TV(intel_sdvo_connector))
2934                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2935         else if (IS_LVDS(intel_sdvo_connector))
2936                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2937         else
2938                 return true;
2939 }
2940
2941 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2942                                      struct i2c_msg *msgs,
2943                                      int num)
2944 {
2945         struct intel_sdvo *sdvo = adapter->algo_data;
2946
2947         if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2948                 return -EIO;
2949
2950         return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2951 }
2952
2953 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2954 {
2955         struct intel_sdvo *sdvo = adapter->algo_data;
2956         return sdvo->i2c->algo->functionality(sdvo->i2c);
2957 }
2958
2959 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2960         .master_xfer    = intel_sdvo_ddc_proxy_xfer,
2961         .functionality  = intel_sdvo_ddc_proxy_func
2962 };
2963
2964 static bool
2965 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2966                           struct drm_device *dev)
2967 {
2968         sdvo->ddc.owner = THIS_MODULE;
2969         sdvo->ddc.class = I2C_CLASS_DDC;
2970         snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2971         sdvo->ddc.dev.parent = &dev->pdev->dev;
2972         sdvo->ddc.algo_data = sdvo;
2973         sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2974
2975         return i2c_add_adapter(&sdvo->ddc) == 0;
2976 }
2977
2978 bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
2979 {
2980         struct drm_i915_private *dev_priv = dev->dev_private;
2981         struct intel_encoder *intel_encoder;
2982         struct intel_sdvo *intel_sdvo;
2983         int i;
2984         intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL);
2985         if (!intel_sdvo)
2986                 return false;
2987
2988         intel_sdvo->sdvo_reg = sdvo_reg;
2989         intel_sdvo->is_sdvob = is_sdvob;
2990         intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
2991         intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2992         if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev))
2993                 goto err_i2c_bus;
2994
2995         /* encoder type will be decided later */
2996         intel_encoder = &intel_sdvo->base;
2997         intel_encoder->type = INTEL_OUTPUT_SDVO;
2998         drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2999
3000         /* Read the regs to test if we can talk to the device */
3001         for (i = 0; i < 0x40; i++) {
3002                 u8 byte;
3003
3004                 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
3005                         DRM_DEBUG_KMS("No SDVO device found on %s\n",
3006                                       SDVO_NAME(intel_sdvo));
3007                         goto err;
3008                 }
3009         }
3010
3011         intel_encoder->compute_config = intel_sdvo_compute_config;
3012         intel_encoder->disable = intel_disable_sdvo;
3013         intel_encoder->pre_enable = intel_sdvo_pre_enable;
3014         intel_encoder->enable = intel_enable_sdvo;
3015         intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
3016         intel_encoder->get_config = intel_sdvo_get_config;
3017
3018         /* In default case sdvo lvds is false */
3019         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
3020                 goto err;
3021
3022         if (intel_sdvo_output_setup(intel_sdvo,
3023                                     intel_sdvo->caps.output_flags) != true) {
3024                 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
3025                               SDVO_NAME(intel_sdvo));
3026                 /* Output_setup can leave behind connectors! */
3027                 goto err_output;
3028         }
3029
3030         /* Only enable the hotplug irq if we need it, to work around noisy
3031          * hotplug lines.
3032          */
3033         if (intel_sdvo->hotplug_active) {
3034                 intel_encoder->hpd_pin =
3035                         intel_sdvo->is_sdvob ?  HPD_SDVO_B : HPD_SDVO_C;
3036         }
3037
3038         /*
3039          * Cloning SDVO with anything is often impossible, since the SDVO
3040          * encoder can request a special input timing mode. And even if that's
3041          * not the case we have evidence that cloning a plain unscaled mode with
3042          * VGA doesn't really work. Furthermore the cloning flags are way too
3043          * simplistic anyway to express such constraints, so just give up on
3044          * cloning for SDVO encoders.
3045          */
3046         intel_sdvo->base.cloneable = 0;
3047
3048         intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
3049
3050         /* Set the input timing to the screen. Assume always input 0. */
3051         if (!intel_sdvo_set_target_input(intel_sdvo))
3052                 goto err_output;
3053
3054         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
3055                                                     &intel_sdvo->pixel_clock_min,
3056                                                     &intel_sdvo->pixel_clock_max))
3057                 goto err_output;
3058
3059         DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
3060                         "clock range %dMHz - %dMHz, "
3061                         "input 1: %c, input 2: %c, "
3062                         "output 1: %c, output 2: %c\n",
3063                         SDVO_NAME(intel_sdvo),
3064                         intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
3065                         intel_sdvo->caps.device_rev_id,
3066                         intel_sdvo->pixel_clock_min / 1000,
3067                         intel_sdvo->pixel_clock_max / 1000,
3068                         (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
3069                         (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
3070                         /* check currently supported outputs */
3071                         intel_sdvo->caps.output_flags &
3072                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
3073                         intel_sdvo->caps.output_flags &
3074                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
3075         return true;
3076
3077 err_output:
3078         intel_sdvo_output_cleanup(intel_sdvo);
3079
3080 err:
3081         drm_encoder_cleanup(&intel_encoder->base);
3082         i2c_del_adapter(&intel_sdvo->ddc);
3083 err_i2c_bus:
3084         intel_sdvo_unselect_i2c_bus(intel_sdvo);
3085         kfree(intel_sdvo);
3086
3087         return false;
3088 }