drivers/gpu/drm/i915/intel_sdvo.c

   1 /*
   2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright © 2006-2007 Intel Corporation
   4  *   Jesse Barnes <jesse.barnes@intel.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23  * DEALINGS IN THE SOFTWARE.
  24  *
  25  * Authors:
  26  *      Eric Anholt <eric@anholt.net>
  27  */
  28 #include <linux/i2c.h>
  29 #include <linux/slab.h>
  30 #include <linux/delay.h>
  31 #include <linux/export.h>
  32 #include <drm/drmP.h>
  33 #include <drm/drm_atomic_helper.h>
  34 #include <drm/drm_crtc.h>
  35 #include <drm/drm_edid.h>
  36 #include "intel_drv.h"
  37 #include <drm/i915_drm.h>
  38 #include "i915_drv.h"
  39 #include "intel_sdvo_regs.h"
  40
  41 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  42 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  43 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  44 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
  45
  46 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  47                         SDVO_TV_MASK)
  48
  49 #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
  50 #define IS_TMDS(c)      (c->output_flag & SDVO_TMDS_MASK)
  51 #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
  52 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  53 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  54
  55
  56 static const char * const tv_format_names[] = {
  57         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
  58         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
  59         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
  60         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
  61         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
  62         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
  63         "SECAM_60"
  64 };
  65
  66 #define TV_FORMAT_NUM  ARRAY_SIZE(tv_format_names)
  67
  68 struct intel_sdvo {
  69         struct intel_encoder base;
  70
  71         struct i2c_adapter *i2c;
  72         u8 slave_addr;
  73
  74         struct i2c_adapter ddc;
  75
  76         /* Register for the SDVO device: SDVOB or SDVOC */
  77         i915_reg_t sdvo_reg;
  78
  79         /* Active outputs controlled by this SDVO output */
  80         uint16_t controlled_output;
  81
  82         /*
  83          * Capabilities of the SDVO device returned by
  84          * intel_sdvo_get_capabilities()
  85          */
  86         struct intel_sdvo_caps caps;
  87
  88         /* Pixel clock limitations reported by the SDVO device, in kHz */
  89         int pixel_clock_min, pixel_clock_max;
  90
  91         /*
  92         * For multiple function SDVO device,
  93         * this is for current attached outputs.
  94         */
  95         uint16_t attached_output;
  96
  97         /*
  98          * Hotplug activation bits for this device
  99          */
 100         uint16_t hotplug_active;
 101
 102         /**
 103          * This is used to select the color range of RBG outputs in HDMI mode.
 104          * It is only valid when using TMDS encoding and 8 bit per color mode.
 105          */
 106         uint32_t color_range;
 107         bool color_range_auto;
 108
 109         /**
 110          * HDMI user specified aspect ratio
 111          */
 112         enum hdmi_picture_aspect aspect_ratio;
 113
 114         /**
 115          * This is set if we're going to treat the device as TV-out.
 116          *
 117          * While we have these nice friendly flags for output types that ought
 118          * to decide this for us, the S-Video output on our HDMI+S-Video card
 119          * shows up as RGB1 (VGA).
 120          */
 121         bool is_tv;
 122
 123         enum port port;
 124
 125         /* This is for current tv format name */
 126         int tv_format_index;
 127
 128         /**
 129          * This is set if we treat the device as HDMI, instead of DVI.
 130          */
 131         bool is_hdmi;
 132         bool has_hdmi_monitor;
 133         bool has_hdmi_audio;
 134         bool rgb_quant_range_selectable;
 135
 136         /**
 137          * This is set if we detect output of sdvo device as LVDS and
 138          * have a valid fixed mode to use with the panel.
 139          */
 140         bool is_lvds;
 141
 142         /**
 143          * This is sdvo fixed pannel mode pointer
 144          */
 145         struct drm_display_mode *sdvo_lvds_fixed_mode;
 146
 147         /* DDC bus used by this SDVO encoder */
 148         uint8_t ddc_bus;
 149
 150         /*
 151          * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
 152          */
 153         uint8_t dtd_sdvo_flags;
 154 };
 155
 156 struct intel_sdvo_connector {
 157         struct intel_connector base;
 158
 159         /* Mark the type of connector */
 160         uint16_t output_flag;
 161
 162         enum hdmi_force_audio force_audio;
 163
 164         /* This contains all current supported TV format */
 165         u8 tv_format_supported[TV_FORMAT_NUM];
 166         int   format_supported_num;
 167         struct drm_property *tv_format;
 168
 169         /* add the property for the SDVO-TV */
 170         struct drm_property *left;
 171         struct drm_property *right;
 172         struct drm_property *top;
 173         struct drm_property *bottom;
 174         struct drm_property *hpos;
 175         struct drm_property *vpos;
 176         struct drm_property *contrast;
 177         struct drm_property *saturation;
 178         struct drm_property *hue;
 179         struct drm_property *sharpness;
 180         struct drm_property *flicker_filter;
 181         struct drm_property *flicker_filter_adaptive;
 182         struct drm_property *flicker_filter_2d;
 183         struct drm_property *tv_chroma_filter;
 184         struct drm_property *tv_luma_filter;
 185         struct drm_property *dot_crawl;
 186
 187         /* add the property for the SDVO-TV/LVDS */
 188         struct drm_property *brightness;
 189
 190         /* Add variable to record current setting for the above property */
 191         u32     left_margin, right_margin, top_margin, bottom_margin;
 192
 193         /* this is to get the range of margin.*/
 194         u32     max_hscan,  max_vscan;
 195         u32     max_hpos, cur_hpos;
 196         u32     max_vpos, cur_vpos;
 197         u32     cur_brightness, max_brightness;
 198         u32     cur_contrast,   max_contrast;
 199         u32     cur_saturation, max_saturation;
 200         u32     cur_hue,        max_hue;
 201         u32     cur_sharpness,  max_sharpness;
 202         u32     cur_flicker_filter,             max_flicker_filter;
 203         u32     cur_flicker_filter_adaptive,    max_flicker_filter_adaptive;
 204         u32     cur_flicker_filter_2d,          max_flicker_filter_2d;
 205         u32     cur_tv_chroma_filter,   max_tv_chroma_filter;
 206         u32     cur_tv_luma_filter,     max_tv_luma_filter;
 207         u32     cur_dot_crawl,  max_dot_crawl;
 208 };
 209
 210 static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder)
 211 {
 212         return container_of(encoder, struct intel_sdvo, base);
 213 }
 214
 215 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
 216 {
 217         return to_sdvo(intel_attached_encoder(connector));
 218 }
 219
 220 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
 221 {
 222         return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
 223 }
 224
 225 static bool
 226 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
 227 static bool
 228 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
 229                               struct intel_sdvo_connector *intel_sdvo_connector,
 230                               int type);
 231 static bool
 232 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
 233                                    struct intel_sdvo_connector *intel_sdvo_connector);
 234
 235 /**
 236  * Writes the SDVOB or SDVOC with the given value, but always writes both
 237  * SDVOB and SDVOC to work around apparent hardware issues (according to
 238  * comments in the BIOS).
 239  */
 240 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
 241 {
 242         struct drm_device *dev = intel_sdvo->base.base.dev;
 243         struct drm_i915_private *dev_priv = to_i915(dev);
 244         u32 bval = val, cval = val;
 245         int i;
 246
 247         if (HAS_PCH_SPLIT(dev_priv)) {
 248                 I915_WRITE(intel_sdvo->sdvo_reg, val);
 249                 POSTING_READ(intel_sdvo->sdvo_reg);
 250                 /*
 251                  * HW workaround, need to write this twice for issue
 252                  * that may result in first write getting masked.
 253                  */
 254                 if (HAS_PCH_IBX(dev_priv)) {
 255                         I915_WRITE(intel_sdvo->sdvo_reg, val);
 256                         POSTING_READ(intel_sdvo->sdvo_reg);
 257                 }
 258                 return;
 259         }
 260
 261         if (intel_sdvo->port == PORT_B)
 262                 cval = I915_READ(GEN3_SDVOC);
 263         else
 264                 bval = I915_READ(GEN3_SDVOB);
 265
 266         /*
 267          * Write the registers twice for luck. Sometimes,
 268          * writing them only once doesn't appear to 'stick'.
 269          * The BIOS does this too. Yay, magic
 270          */
 271         for (i = 0; i < 2; i++)
 272         {
 273                 I915_WRITE(GEN3_SDVOB, bval);
 274                 POSTING_READ(GEN3_SDVOB);
 275                 I915_WRITE(GEN3_SDVOC, cval);
 276                 POSTING_READ(GEN3_SDVOC);
 277         }
 278 }
 279
 280 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
 281 {
 282         struct i2c_msg msgs[] = {
 283                 {
 284                         .addr = intel_sdvo->slave_addr,
 285                         .flags = 0,
 286                         .len = 1,
 287                         .buf = &addr,
 288                 },
 289                 {
 290                         .addr = intel_sdvo->slave_addr,
 291                         .flags = I2C_M_RD,
 292                         .len = 1,
 293                         .buf = ch,
 294                 }
 295         };
 296         int ret;
 297
 298         if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
 299                 return true;
 300
 301         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
 302         return false;
 303 }
 304
 305 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
 306 /** Mapping of command numbers to names, for debug output */
 307 static const struct _sdvo_cmd_name {
 308         u8 cmd;
 309         const char *name;
 310 } __attribute__ ((packed)) sdvo_cmd_names[] = {
 311         SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
 312         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
 313         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
 314         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
 315         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
 316         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
 317         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
 318         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
 319         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
 320         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
 321         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
 322         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
 323         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
 324         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
 325         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
 326         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
 327         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
 328         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 329         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
 330         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 331         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
 332         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
 333         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
 334         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
 335         SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
 336         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
 337         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
 338         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
 339         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
 340         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
 341         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
 342         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
 343         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
 344         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
 345         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
 346         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
 347         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
 348         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
 349         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
 350         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
 351         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
 352         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
 353         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
 354
 355         /* Add the op code for SDVO enhancements */
 356         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
 357         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
 358         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
 359         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
 360         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
 361         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
 362         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
 363         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
 364         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
 365         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
 366         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
 367         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
 368         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
 369         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
 370         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
 371         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
 372         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
 373         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
 374         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
 375         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
 376         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
 377         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
 378         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
 379         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
 380         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
 381         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
 382         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
 383         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
 384         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
 385         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
 386         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
 387         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
 388         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
 389         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
 390         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
 391         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
 392         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
 393         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
 394         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
 395         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
 396         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
 397         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
 398         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
 399         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
 400
 401         /* HDMI op code */
 402         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
 403         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
 404         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
 405         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
 406         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
 407         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
 408         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
 409         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
 410         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
 411         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
 412         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
 413         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
 414         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
 415         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
 416         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
 417         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
 418         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
 419         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
 420         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
 421         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
 422 };
 423
 424 #define SDVO_NAME(svdo) ((svdo)->port == PORT_B ? "SDVOB" : "SDVOC")
 425
 426 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
 427                                    const void *args, int args_len)
 428 {
 429         int i, pos = 0;
 430 #define BUF_LEN 256
 431         char buffer[BUF_LEN];
 432
 433 #define BUF_PRINT(args...) \
 434         pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
 435
 436
 437         for (i = 0; i < args_len; i++) {
 438                 BUF_PRINT("%02X ", ((u8 *)args)[i]);
 439         }
 440         for (; i < 8; i++) {
 441                 BUF_PRINT("   ");
 442         }
 443         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
 444                 if (cmd == sdvo_cmd_names[i].cmd) {
 445                         BUF_PRINT("(%s)", sdvo_cmd_names[i].name);
 446                         break;
 447                 }
 448         }
 449         if (i == ARRAY_SIZE(sdvo_cmd_names)) {
 450                 BUF_PRINT("(%02X)", cmd);
 451         }
 452         BUG_ON(pos >= BUF_LEN - 1);
 453 #undef BUF_PRINT
 454 #undef BUF_LEN
 455
 456         DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer);
 457 }
 458
 459 static const char * const cmd_status_names[] = {
 460         "Power on",
 461         "Success",
 462         "Not supported",
 463         "Invalid arg",
 464         "Pending",
 465         "Target not specified",
 466         "Scaling not supported"
 467 };
 468
 469 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 470                                  const void *args, int args_len)
 471 {
 472         u8 *buf, status;
 473         struct i2c_msg *msgs;
 474         int i, ret = true;
 475
 476         /* Would be simpler to allocate both in one go ? */
 477         buf = kzalloc(args_len * 2 + 2, GFP_KERNEL);
 478         if (!buf)
 479                 return false;
 480
 481         msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
 482         if (!msgs) {
 483                 kfree(buf);
 484                 return false;
 485         }
 486
 487         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
 488
 489         for (i = 0; i < args_len; i++) {
 490                 msgs[i].addr = intel_sdvo->slave_addr;
 491                 msgs[i].flags = 0;
 492                 msgs[i].len = 2;
 493                 msgs[i].buf = buf + 2 *i;
 494                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
 495                 buf[2*i + 1] = ((u8*)args)[i];
 496         }
 497         msgs[i].addr = intel_sdvo->slave_addr;
 498         msgs[i].flags = 0;
 499         msgs[i].len = 2;
 500         msgs[i].buf = buf + 2*i;
 501         buf[2*i + 0] = SDVO_I2C_OPCODE;
 502         buf[2*i + 1] = cmd;
 503
 504         /* the following two are to read the response */
 505         status = SDVO_I2C_CMD_STATUS;
 506         msgs[i+1].addr = intel_sdvo->slave_addr;
 507         msgs[i+1].flags = 0;
 508         msgs[i+1].len = 1;
 509         msgs[i+1].buf = &status;
 510
 511         msgs[i+2].addr = intel_sdvo->slave_addr;
 512         msgs[i+2].flags = I2C_M_RD;
 513         msgs[i+2].len = 1;
 514         msgs[i+2].buf = &status;
 515
 516         ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 517         if (ret < 0) {
 518                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
 519                 ret = false;
 520                 goto out;
 521         }
 522         if (ret != i+3) {
 523                 /* failure in I2C transfer */
 524                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
 525                 ret = false;
 526         }
 527
 528 out:
 529         kfree(msgs);
 530         kfree(buf);
 531         return ret;
 532 }
 533
 534 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
 535                                      void *response, int response_len)
 536 {
 537         u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
 538         u8 status;
 539         int i, pos = 0;
 540 #define BUF_LEN 256
 541         char buffer[BUF_LEN];
 542
 543
 544         /*
 545          * The documentation states that all commands will be
 546          * processed within 15µs, and that we need only poll
 547          * the status byte a maximum of 3 times in order for the
 548          * command to be complete.
 549          *
 550          * Check 5 times in case the hardware failed to read the docs.
 551          *
 552          * Also beware that the first response by many devices is to
 553          * reply PENDING and stall for time. TVs are notorious for
 554          * requiring longer than specified to complete their replies.
 555          * Originally (in the DDX long ago), the delay was only ever 15ms
 556          * with an additional delay of 30ms applied for TVs added later after
 557          * many experiments. To accommodate both sets of delays, we do a
 558          * sequence of slow checks if the device is falling behind and fails
 559          * to reply within 5*15µs.
 560          */
 561         if (!intel_sdvo_read_byte(intel_sdvo,
 562                                   SDVO_I2C_CMD_STATUS,
 563                                   &status))
 564                 goto log_fail;
 565
 566         while ((status == SDVO_CMD_STATUS_PENDING ||
 567                 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) {
 568                 if (retry < 10)
 569                         msleep(15);
 570                 else
 571                         udelay(15);
 572
 573                 if (!intel_sdvo_read_byte(intel_sdvo,
 574                                           SDVO_I2C_CMD_STATUS,
 575                                           &status))
 576                         goto log_fail;
 577         }
 578
 579 #define BUF_PRINT(args...) \
 580         pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
 581
 582         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
 583                 BUF_PRINT("(%s)", cmd_status_names[status]);
 584         else
 585                 BUF_PRINT("(??? %d)", status);
 586
 587         if (status != SDVO_CMD_STATUS_SUCCESS)
 588                 goto log_fail;
 589
 590         /* Read the command response */
 591         for (i = 0; i < response_len; i++) {
 592                 if (!intel_sdvo_read_byte(intel_sdvo,
 593                                           SDVO_I2C_RETURN_0 + i,
 594                                           &((u8 *)response)[i]))
 595                         goto log_fail;
 596                 BUF_PRINT(" %02X", ((u8 *)response)[i]);
 597         }
 598         BUG_ON(pos >= BUF_LEN - 1);
 599 #undef BUF_PRINT
 600 #undef BUF_LEN
 601
 602         DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer);
 603         return true;
 604
 605 log_fail:
 606         DRM_DEBUG_KMS("%s: R: ... failed\n", SDVO_NAME(intel_sdvo));
 607         return false;
 608 }
 609
 610 static int intel_sdvo_get_pixel_multiplier(const struct drm_display_mode *adjusted_mode)
 611 {
 612         if (adjusted_mode->crtc_clock >= 100000)
 613                 return 1;
 614         else if (adjusted_mode->crtc_clock >= 50000)
 615                 return 2;
 616         else
 617                 return 4;
 618 }
 619
 620 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
 621                                               u8 ddc_bus)
 622 {
 623         /* This must be the immediately preceding write before the i2c xfer */
 624         return intel_sdvo_write_cmd(intel_sdvo,
 625                                     SDVO_CMD_SET_CONTROL_BUS_SWITCH,
 626                                     &ddc_bus, 1);
 627 }
 628
 629 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
 630 {
 631         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
 632                 return false;
 633
 634         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
 635 }
 636
 637 static bool
 638 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
 639 {
 640         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
 641                 return false;
 642
 643         return intel_sdvo_read_response(intel_sdvo, value, len);
 644 }
 645
 646 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
 647 {
 648         struct intel_sdvo_set_target_input_args targets = {0};
 649         return intel_sdvo_set_value(intel_sdvo,
 650                                     SDVO_CMD_SET_TARGET_INPUT,
 651                                     &targets, sizeof(targets));
 652 }
 653
 654 /**
 655  * Return whether each input is trained.
 656  *
 657  * This function is making an assumption about the layout of the response,
 658  * which should be checked against the docs.
 659  */
 660 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
 661 {
 662         struct intel_sdvo_get_trained_inputs_response response;
 663
 664         BUILD_BUG_ON(sizeof(response) != 1);
 665         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
 666                                   &response, sizeof(response)))
 667                 return false;
 668
 669         *input_1 = response.input0_trained;
 670         *input_2 = response.input1_trained;
 671         return true;
 672 }
 673
 674 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
 675                                           u16 outputs)
 676 {
 677         return intel_sdvo_set_value(intel_sdvo,
 678                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
 679                                     &outputs, sizeof(outputs));
 680 }
 681
 682 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
 683                                           u16 *outputs)
 684 {
 685         return intel_sdvo_get_value(intel_sdvo,
 686                                     SDVO_CMD_GET_ACTIVE_OUTPUTS,
 687                                     outputs, sizeof(*outputs));
 688 }
 689
 690 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
 691                                                int mode)
 692 {
 693         u8 state = SDVO_ENCODER_STATE_ON;
 694
 695         switch (mode) {
 696         case DRM_MODE_DPMS_ON:
 697                 state = SDVO_ENCODER_STATE_ON;
 698                 break;
 699         case DRM_MODE_DPMS_STANDBY:
 700                 state = SDVO_ENCODER_STATE_STANDBY;
 701                 break;
 702         case DRM_MODE_DPMS_SUSPEND:
 703                 state = SDVO_ENCODER_STATE_SUSPEND;
 704                 break;
 705         case DRM_MODE_DPMS_OFF:
 706                 state = SDVO_ENCODER_STATE_OFF;
 707                 break;
 708         }
 709
 710         return intel_sdvo_set_value(intel_sdvo,
 711                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
 712 }
 713
 714 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
 715                                                    int *clock_min,
 716                                                    int *clock_max)
 717 {
 718         struct intel_sdvo_pixel_clock_range clocks;
 719
 720         BUILD_BUG_ON(sizeof(clocks) != 4);
 721         if (!intel_sdvo_get_value(intel_sdvo,
 722                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
 723                                   &clocks, sizeof(clocks)))
 724                 return false;
 725
 726         /* Convert the values from units of 10 kHz to kHz. */
 727         *clock_min = clocks.min * 10;
 728         *clock_max = clocks.max * 10;
 729         return true;
 730 }
 731
 732 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
 733                                          u16 outputs)
 734 {
 735         return intel_sdvo_set_value(intel_sdvo,
 736                                     SDVO_CMD_SET_TARGET_OUTPUT,
 737                                     &outputs, sizeof(outputs));
 738 }
 739
 740 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 741                                   struct intel_sdvo_dtd *dtd)
 742 {
 743         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 744                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 745 }
 746
 747 static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 748                                   struct intel_sdvo_dtd *dtd)
 749 {
 750         return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 751                 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 752 }
 753
 754 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
 755                                          struct intel_sdvo_dtd *dtd)
 756 {
 757         return intel_sdvo_set_timing(intel_sdvo,
 758                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
 759 }
 760
 761 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
 762                                          struct intel_sdvo_dtd *dtd)
 763 {
 764         return intel_sdvo_set_timing(intel_sdvo,
 765                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
 766 }
 767
 768 static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo,
 769                                         struct intel_sdvo_dtd *dtd)
 770 {
 771         return intel_sdvo_get_timing(intel_sdvo,
 772                                      SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd);
 773 }
 774
 775 static bool
 776 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 777                                          uint16_t clock,
 778                                          uint16_t width,
 779                                          uint16_t height)
 780 {
 781         struct intel_sdvo_preferred_input_timing_args args;
 782
 783         memset(&args, 0, sizeof(args));
 784         args.clock = clock;
 785         args.width = width;
 786         args.height = height;
 787         args.interlace = 0;
 788
 789         if (intel_sdvo->is_lvds &&
 790            (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
 791             intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
 792                 args.scaled = 1;
 793
 794         return intel_sdvo_set_value(intel_sdvo,
 795                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
 796                                     &args, sizeof(args));
 797 }
 798
 799 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 800                                                   struct intel_sdvo_dtd *dtd)
 801 {
 802         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
 803         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
 804         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
 805                                     &dtd->part1, sizeof(dtd->part1)) &&
 806                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
 807                                      &dtd->part2, sizeof(dtd->part2));
 808 }
 809
 810 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
 811 {
 812         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
 813 }
 814
 815 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
 816                                          const struct drm_display_mode *mode)
 817 {
 818         uint16_t width, height;
 819         uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
 820         uint16_t h_sync_offset, v_sync_offset;
 821         int mode_clock;
 822
 823         memset(dtd, 0, sizeof(*dtd));
 824
 825         width = mode->hdisplay;
 826         height = mode->vdisplay;
 827
 828         /* do some mode translations */
 829         h_blank_len = mode->htotal - mode->hdisplay;
 830         h_sync_len = mode->hsync_end - mode->hsync_start;
 831
 832         v_blank_len = mode->vtotal - mode->vdisplay;
 833         v_sync_len = mode->vsync_end - mode->vsync_start;
 834
 835         h_sync_offset = mode->hsync_start - mode->hdisplay;
 836         v_sync_offset = mode->vsync_start - mode->vdisplay;
 837
 838         mode_clock = mode->clock;
 839         mode_clock /= 10;
 840         dtd->part1.clock = mode_clock;
 841
 842         dtd->part1.h_active = width & 0xff;
 843         dtd->part1.h_blank = h_blank_len & 0xff;
 844         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
 845                 ((h_blank_len >> 8) & 0xf);
 846         dtd->part1.v_active = height & 0xff;
 847         dtd->part1.v_blank = v_blank_len & 0xff;
 848         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
 849                 ((v_blank_len >> 8) & 0xf);
 850
 851         dtd->part2.h_sync_off = h_sync_offset & 0xff;
 852         dtd->part2.h_sync_width = h_sync_len & 0xff;
 853         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
 854                 (v_sync_len & 0xf);
 855         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
 856                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
 857                 ((v_sync_len & 0x30) >> 4);
 858
 859         dtd->part2.dtd_flags = 0x18;
 860         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
 861                 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
 862         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 863                 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
 864         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 865                 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
 866
 867         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
 868 }
 869
 870 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode,
 871                                          const struct intel_sdvo_dtd *dtd)
 872 {
 873         struct drm_display_mode mode = {};
 874
 875         mode.hdisplay = dtd->part1.h_active;
 876         mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
 877         mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off;
 878         mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
 879         mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width;
 880         mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
 881         mode.htotal = mode.hdisplay + dtd->part1.h_blank;
 882         mode.htotal += (dtd->part1.h_high & 0xf) << 8;
 883
 884         mode.vdisplay = dtd->part1.v_active;
 885         mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
 886         mode.vsync_start = mode.vdisplay;
 887         mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
 888         mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
 889         mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0;
 890         mode.vsync_end = mode.vsync_start +
 891                 (dtd->part2.v_sync_off_width & 0xf);
 892         mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
 893         mode.vtotal = mode.vdisplay + dtd->part1.v_blank;
 894         mode.vtotal += (dtd->part1.v_high & 0xf) << 8;
 895
 896         mode.clock = dtd->part1.clock * 10;
 897
 898         if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
 899                 mode.flags |= DRM_MODE_FLAG_INTERLACE;
 900         if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
 901                 mode.flags |= DRM_MODE_FLAG_PHSYNC;
 902         else
 903                 mode.flags |= DRM_MODE_FLAG_NHSYNC;
 904         if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
 905                 mode.flags |= DRM_MODE_FLAG_PVSYNC;
 906         else
 907                 mode.flags |= DRM_MODE_FLAG_NVSYNC;
 908
 909         drm_mode_set_crtcinfo(&mode, 0);
 910
 911         drm_mode_copy(pmode, &mode);
 912 }
 913
 914 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
 915 {
 916         struct intel_sdvo_encode encode;
 917
 918         BUILD_BUG_ON(sizeof(encode) != 2);
 919         return intel_sdvo_get_value(intel_sdvo,
 920                                   SDVO_CMD_GET_SUPP_ENCODE,
 921                                   &encode, sizeof(encode));
 922 }
 923
 924 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
 925                                   uint8_t mode)
 926 {
 927         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
 928 }
 929
 930 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
 931                                        uint8_t mode)
 932 {
 933         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
 934 }
 935
 936 #if 0
 937 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
 938 {
 939         int i, j;
 940         uint8_t set_buf_index[2];
 941         uint8_t av_split;
 942         uint8_t buf_size;
 943         uint8_t buf[48];
 944         uint8_t *pos;
 945
 946         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
 947
 948         for (i = 0; i <= av_split; i++) {
 949                 set_buf_index[0] = i; set_buf_index[1] = 0;
 950                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
 951                                      set_buf_index, 2);
 952                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
 953                 intel_sdvo_read_response(encoder, &buf_size, 1);
 954
 955                 pos = buf;
 956                 for (j = 0; j <= buf_size; j += 8) {
 957                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
 958                                              NULL, 0);
 959                         intel_sdvo_read_response(encoder, pos, 8);
 960                         pos += 8;
 961                 }
 962         }
 963 }
 964 #endif
 965
 966 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
 967                                        unsigned if_index, uint8_t tx_rate,
 968                                        const uint8_t *data, unsigned length)
 969 {
 970         uint8_t set_buf_index[2] = { if_index, 0 };
 971         uint8_t hbuf_size, tmp[8];
 972         int i;
 973
 974         if (!intel_sdvo_set_value(intel_sdvo,
 975                                   SDVO_CMD_SET_HBUF_INDEX,
 976                                   set_buf_index, 2))
 977                 return false;
 978
 979         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
 980                                   &hbuf_size, 1))
 981                 return false;
 982
 983         /* Buffer size is 0 based, hooray! */
 984         hbuf_size++;
 985
 986         DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
 987                       if_index, length, hbuf_size);
 988
 989         for (i = 0; i < hbuf_size; i += 8) {
 990                 memset(tmp, 0, 8);
 991                 if (i < length)
 992                         memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
 993
 994                 if (!intel_sdvo_set_value(intel_sdvo,
 995                                           SDVO_CMD_SET_HBUF_DATA,
 996                                           tmp, 8))
 997                         return false;
 998         }
 999
1000         return intel_sdvo_set_value(intel_sdvo,
1001                                     SDVO_CMD_SET_HBUF_TXRATE,
1002                                     &tx_rate, 1);
1003 }
1004
1005 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
1006                                          struct intel_crtc_state *pipe_config)
1007 {
1008         uint8_t sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
1009         union hdmi_infoframe frame;
1010         int ret;
1011         ssize_t len;
1012
1013         ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi,
1014                                                        &pipe_config->base.adjusted_mode);
1015         if (ret < 0) {
1016                 DRM_ERROR("couldn't fill AVI infoframe\n");
1017                 return false;
1018         }
1019
1020         if (intel_sdvo->rgb_quant_range_selectable) {
1021                 if (pipe_config->limited_color_range)
1022                         frame.avi.quantization_range =
1023                                 HDMI_QUANTIZATION_RANGE_LIMITED;
1024                 else
1025                         frame.avi.quantization_range =
1026                                 HDMI_QUANTIZATION_RANGE_FULL;
1027         }
1028
1029         len = hdmi_infoframe_pack(&frame, sdvo_data, sizeof(sdvo_data));
1030         if (len < 0)
1031                 return false;
1032
1033         return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1034                                           SDVO_HBUF_TX_VSYNC,
1035                                           sdvo_data, sizeof(sdvo_data));
1036 }
1037
1038 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
1039 {
1040         struct intel_sdvo_tv_format format;
1041         uint32_t format_map;
1042
1043         format_map = 1 << intel_sdvo->tv_format_index;
1044         memset(&format, 0, sizeof(format));
1045         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
1046
1047         BUILD_BUG_ON(sizeof(format) != 6);
1048         return intel_sdvo_set_value(intel_sdvo,
1049                                     SDVO_CMD_SET_TV_FORMAT,
1050                                     &format, sizeof(format));
1051 }
1052
1053 static bool
1054 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
1055                                         const struct drm_display_mode *mode)
1056 {
1057         struct intel_sdvo_dtd output_dtd;
1058
1059         if (!intel_sdvo_set_target_output(intel_sdvo,
1060                                           intel_sdvo->attached_output))
1061                 return false;
1062
1063         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1064         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1065                 return false;
1066
1067         return true;
1068 }
1069
1070 /* Asks the sdvo controller for the preferred input mode given the output mode.
1071  * Unfortunately we have to set up the full output mode to do that. */
1072 static bool
1073 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
1074                                     const struct drm_display_mode *mode,
1075                                     struct drm_display_mode *adjusted_mode)
1076 {
1077         struct intel_sdvo_dtd input_dtd;
1078
1079         /* Reset the input timing to the screen. Assume always input 0. */
1080         if (!intel_sdvo_set_target_input(intel_sdvo))
1081                 return false;
1082
1083         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1084                                                       mode->clock / 10,
1085                                                       mode->hdisplay,
1086                                                       mode->vdisplay))
1087                 return false;
1088
1089         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1090                                                    &input_dtd))
1091                 return false;
1092
1093         intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1094         intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
1095
1096         return true;
1097 }
1098
1099 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config)
1100 {
1101         unsigned dotclock = pipe_config->port_clock;
1102         struct dpll *clock = &pipe_config->dpll;
1103
1104         /* SDVO TV has fixed PLL values depend on its clock range,
1105            this mirrors vbios setting. */
1106         if (dotclock >= 100000 && dotclock < 140500) {
1107                 clock->p1 = 2;
1108                 clock->p2 = 10;
1109                 clock->n = 3;
1110                 clock->m1 = 16;
1111                 clock->m2 = 8;
1112         } else if (dotclock >= 140500 && dotclock <= 200000) {
1113                 clock->p1 = 1;
1114                 clock->p2 = 10;
1115                 clock->n = 6;
1116                 clock->m1 = 12;
1117                 clock->m2 = 8;
1118         } else {
1119                 WARN(1, "SDVO TV clock out of range: %i\n", dotclock);
1120         }
1121
1122         pipe_config->clock_set = true;
1123 }
1124
1125 static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
1126                                       struct intel_crtc_state *pipe_config,
1127                                       struct drm_connector_state *conn_state)
1128 {
1129         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1130         struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
1131         struct drm_display_mode *mode = &pipe_config->base.mode;
1132
1133         DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1134         pipe_config->pipe_bpp = 8*3;
1135
1136         if (HAS_PCH_SPLIT(to_i915(encoder->base.dev)))
1137                 pipe_config->has_pch_encoder = true;
1138
1139         /* We need to construct preferred input timings based on our
1140          * output timings.  To do that, we have to set the output
1141          * timings, even though this isn't really the right place in
1142          * the sequence to do it. Oh well.
1143          */
1144         if (intel_sdvo->is_tv) {
1145                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1146                         return false;
1147
1148                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1149                                                            mode,
1150                                                            adjusted_mode);
1151                 pipe_config->sdvo_tv_clock = true;
1152         } else if (intel_sdvo->is_lvds) {
1153                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1154                                                              intel_sdvo->sdvo_lvds_fixed_mode))
1155                         return false;
1156
1157                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1158                                                            mode,
1159                                                            adjusted_mode);
1160         }
1161
1162         /* Make the CRTC code factor in the SDVO pixel multiplier.  The
1163          * SDVO device will factor out the multiplier during mode_set.
1164          */
1165         pipe_config->pixel_multiplier =
1166                 intel_sdvo_get_pixel_multiplier(adjusted_mode);
1167
1168         pipe_config->has_hdmi_sink = intel_sdvo->has_hdmi_monitor;
1169
1170         if (intel_sdvo->color_range_auto) {
1171                 /* See CEA-861-E - 5.1 Default Encoding Parameters */
1172                 /* FIXME: This bit is only valid when using TMDS encoding and 8
1173                  * bit per color mode. */
1174                 if (pipe_config->has_hdmi_sink &&
1175                     drm_match_cea_mode(adjusted_mode) > 1)
1176                         pipe_config->limited_color_range = true;
1177         } else {
1178                 if (pipe_config->has_hdmi_sink &&
1179                     intel_sdvo->color_range == HDMI_COLOR_RANGE_16_235)
1180                         pipe_config->limited_color_range = true;
1181         }
1182
1183         /* Clock computation needs to happen after pixel multiplier. */
1184         if (intel_sdvo->is_tv)
1185                 i9xx_adjust_sdvo_tv_clock(pipe_config);
1186
1187         /* Set user selected PAR to incoming mode's member */
1188         if (intel_sdvo->is_hdmi)
1189                 adjusted_mode->picture_aspect_ratio = intel_sdvo->aspect_ratio;
1190
1191         return true;
1192 }
1193
1194 static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder,
1195                                   struct intel_crtc_state *crtc_state,
1196                                   struct drm_connector_state *conn_state)
1197 {
1198         struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
1199         struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
1200         const struct drm_display_mode *adjusted_mode = &crtc_state->base.adjusted_mode;
1201         struct drm_display_mode *mode = &crtc_state->base.mode;
1202         struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder);
1203         u32 sdvox;
1204         struct intel_sdvo_in_out_map in_out;
1205         struct intel_sdvo_dtd input_dtd, output_dtd;
1206         int rate;
1207
1208         /* First, set the input mapping for the first input to our controlled
1209          * output. This is only correct if we're a single-input device, in
1210          * which case the first input is the output from the appropriate SDVO
1211          * channel on the motherboard.  In a two-input device, the first input
1212          * will be SDVOB and the second SDVOC.
1213          */
1214         in_out.in0 = intel_sdvo->attached_output;
1215         in_out.in1 = 0;
1216
1217         intel_sdvo_set_value(intel_sdvo,
1218                              SDVO_CMD_SET_IN_OUT_MAP,
1219                              &in_out, sizeof(in_out));
1220
1221         /* Set the output timings to the screen */
1222         if (!intel_sdvo_set_target_output(intel_sdvo,
1223                                           intel_sdvo->attached_output))
1224                 return;
1225
1226         /* lvds has a special fixed output timing. */
1227         if (intel_sdvo->is_lvds)
1228                 intel_sdvo_get_dtd_from_mode(&output_dtd,
1229                                              intel_sdvo->sdvo_lvds_fixed_mode);
1230         else
1231                 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1232         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1233                 DRM_INFO("Setting output timings on %s failed\n",
1234                          SDVO_NAME(intel_sdvo));
1235
1236         /* Set the input timing to the screen. Assume always input 0. */
1237         if (!intel_sdvo_set_target_input(intel_sdvo))
1238                 return;
1239
1240         if (crtc_state->has_hdmi_sink) {
1241                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1242                 intel_sdvo_set_colorimetry(intel_sdvo,
1243                                            SDVO_COLORIMETRY_RGB256);
1244                 intel_sdvo_set_avi_infoframe(intel_sdvo, crtc_state);
1245         } else
1246                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1247
1248         if (intel_sdvo->is_tv &&
1249             !intel_sdvo_set_tv_format(intel_sdvo))
1250                 return;
1251
1252         intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1253
1254         if (intel_sdvo->is_tv || intel_sdvo->is_lvds)
1255                 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1256         if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1257                 DRM_INFO("Setting input timings on %s failed\n",
1258                          SDVO_NAME(intel_sdvo));
1259
1260         switch (crtc_state->pixel_multiplier) {
1261         default:
1262                 WARN(1, "unknown pixel multiplier specified\n");
1263         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1264         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1265         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1266         }
1267         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1268                 return;
1269
1270         /* Set the SDVO control regs. */
1271         if (INTEL_GEN(dev_priv) >= 4) {
1272                 /* The real mode polarity is set by the SDVO commands, using
1273                  * struct intel_sdvo_dtd. */
1274                 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1275                 if (!HAS_PCH_SPLIT(dev_priv) && crtc_state->limited_color_range)
1276                         sdvox |= HDMI_COLOR_RANGE_16_235;
1277                 if (INTEL_GEN(dev_priv) < 5)
1278                         sdvox |= SDVO_BORDER_ENABLE;
1279         } else {
1280                 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1281                 if (intel_sdvo->port == PORT_B)
1282                         sdvox &= SDVOB_PRESERVE_MASK;
1283                 else
1284                         sdvox &= SDVOC_PRESERVE_MASK;
1285                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1286         }
1287
1288         if (INTEL_PCH_TYPE(dev_priv) >= PCH_CPT)
1289                 sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe);
1290         else
1291                 sdvox |= SDVO_PIPE_SEL(crtc->pipe);
1292
1293         if (intel_sdvo->has_hdmi_audio)
1294                 sdvox |= SDVO_AUDIO_ENABLE;
1295
1296         if (INTEL_GEN(dev_priv) >= 4) {
1297                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1298         } else if (IS_I945G(dev_priv) || IS_I945GM(dev_priv) ||
1299                    IS_G33(dev_priv) || IS_PINEVIEW(dev_priv)) {
1300                 /* done in crtc_mode_set as it lives inside the dpll register */
1301         } else {
1302                 sdvox |= (crtc_state->pixel_multiplier - 1)
1303                         << SDVO_PORT_MULTIPLY_SHIFT;
1304         }
1305
1306         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1307             INTEL_GEN(dev_priv) < 5)
1308                 sdvox |= SDVO_STALL_SELECT;
1309         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1310 }
1311
1312 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1313 {
1314         struct intel_sdvo_connector *intel_sdvo_connector =
1315                 to_intel_sdvo_connector(&connector->base);
1316         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1317         u16 active_outputs = 0;
1318
1319         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1320
1321         if (active_outputs & intel_sdvo_connector->output_flag)
1322                 return true;
1323         else
1324                 return false;
1325 }
1326
1327 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1328                                     enum pipe *pipe)
1329 {
1330         struct drm_device *dev = encoder->base.dev;
1331         struct drm_i915_private *dev_priv = to_i915(dev);
1332         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1333         u16 active_outputs = 0;
1334         u32 tmp;
1335
1336         tmp = I915_READ(intel_sdvo->sdvo_reg);
1337         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1338
1339         if (!(tmp & SDVO_ENABLE) && (active_outputs == 0))
1340                 return false;
1341
1342         if (HAS_PCH_CPT(dev_priv))
1343                 *pipe = PORT_TO_PIPE_CPT(tmp);
1344         else
1345                 *pipe = PORT_TO_PIPE(tmp);
1346
1347         return true;
1348 }
1349
1350 static void intel_sdvo_get_config(struct intel_encoder *encoder,
1351                                   struct intel_crtc_state *pipe_config)
1352 {
1353         struct drm_device *dev = encoder->base.dev;
1354         struct drm_i915_private *dev_priv = to_i915(dev);
1355         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1356         struct intel_sdvo_dtd dtd;
1357         int encoder_pixel_multiplier = 0;
1358         int dotclock;
1359         u32 flags = 0, sdvox;
1360         u8 val;
1361         bool ret;
1362
1363         sdvox = I915_READ(intel_sdvo->sdvo_reg);
1364
1365         ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
1366         if (!ret) {
1367                 /* Some sdvo encoders are not spec compliant and don't
1368                  * implement the mandatory get_timings function. */
1369                 DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n");
1370                 pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS;
1371         } else {
1372                 if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
1373                         flags |= DRM_MODE_FLAG_PHSYNC;
1374                 else
1375                         flags |= DRM_MODE_FLAG_NHSYNC;
1376
1377                 if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
1378                         flags |= DRM_MODE_FLAG_PVSYNC;
1379                 else
1380                         flags |= DRM_MODE_FLAG_NVSYNC;
1381         }
1382
1383         pipe_config->base.adjusted_mode.flags |= flags;
1384
1385         /*
1386          * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
1387          * the sdvo port register, on all other platforms it is part of the dpll
1388          * state. Since the general pipe state readout happens before the
1389          * encoder->get_config we so already have a valid pixel multplier on all
1390          * other platfroms.
1391          */
1392         if (IS_I915G(dev_priv) || IS_I915GM(dev_priv)) {
1393                 pipe_config->pixel_multiplier =
1394                         ((sdvox & SDVO_PORT_MULTIPLY_MASK)
1395                          >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
1396         }
1397
1398         dotclock = pipe_config->port_clock;
1399
1400         if (pipe_config->pixel_multiplier)
1401                 dotclock /= pipe_config->pixel_multiplier;
1402
1403         pipe_config->base.adjusted_mode.crtc_clock = dotclock;
1404
1405         /* Cross check the port pixel multiplier with the sdvo encoder state. */
1406         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT,
1407                                  &val, 1)) {
1408                 switch (val) {
1409                 case SDVO_CLOCK_RATE_MULT_1X:
1410                         encoder_pixel_multiplier = 1;
1411                         break;
1412                 case SDVO_CLOCK_RATE_MULT_2X:
1413                         encoder_pixel_multiplier = 2;
1414                         break;
1415                 case SDVO_CLOCK_RATE_MULT_4X:
1416                         encoder_pixel_multiplier = 4;
1417                         break;
1418                 }
1419         }
1420
1421         if (sdvox & HDMI_COLOR_RANGE_16_235)
1422                 pipe_config->limited_color_range = true;
1423
1424         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE,
1425                                  &val, 1)) {
1426                 if (val == SDVO_ENCODE_HDMI)
1427                         pipe_config->has_hdmi_sink = true;
1428         }
1429
1430         WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier,
1431              "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1432              pipe_config->pixel_multiplier, encoder_pixel_multiplier);
1433 }
1434
1435 static void intel_disable_sdvo(struct intel_encoder *encoder,
1436                                struct intel_crtc_state *old_crtc_state,
1437                                struct drm_connector_state *conn_state)
1438 {
1439         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1440         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1441         struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
1442         u32 temp;
1443
1444         intel_sdvo_set_active_outputs(intel_sdvo, 0);
1445         if (0)
1446                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1447                                                    DRM_MODE_DPMS_OFF);
1448
1449         temp = I915_READ(intel_sdvo->sdvo_reg);
1450
1451         temp &= ~SDVO_ENABLE;
1452         intel_sdvo_write_sdvox(intel_sdvo, temp);
1453
1454         /*
1455          * HW workaround for IBX, we need to move the port
1456          * to transcoder A after disabling it to allow the
1457          * matching DP port to be enabled on transcoder A.
1458          */
1459         if (HAS_PCH_IBX(dev_priv) && crtc->pipe == PIPE_B) {
1460                 /*
1461                  * We get CPU/PCH FIFO underruns on the other pipe when
1462                  * doing the workaround. Sweep them under the rug.
1463                  */
1464                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1465                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1466
1467                 temp &= ~SDVO_PIPE_B_SELECT;
1468                 temp |= SDVO_ENABLE;
1469                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1470
1471                 temp &= ~SDVO_ENABLE;
1472                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1473
1474                 intel_wait_for_vblank_if_active(dev_priv, PIPE_A);
1475                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1476                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1477         }
1478 }
1479
1480 static void pch_disable_sdvo(struct intel_encoder *encoder,
1481                              struct intel_crtc_state *old_crtc_state,
1482                              struct drm_connector_state *old_conn_state)
1483 {
1484 }
1485
1486 static void pch_post_disable_sdvo(struct intel_encoder *encoder,
1487                                   struct intel_crtc_state *old_crtc_state,
1488                                   struct drm_connector_state *old_conn_state)
1489 {
1490         intel_disable_sdvo(encoder, old_crtc_state, old_conn_state);
1491 }
1492
1493 static void intel_enable_sdvo(struct intel_encoder *encoder,
1494                               struct intel_crtc_state *pipe_config,
1495                               struct drm_connector_state *conn_state)
1496 {
1497         struct drm_device *dev = encoder->base.dev;
1498         struct drm_i915_private *dev_priv = to_i915(dev);
1499         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1500         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
1501         u32 temp;
1502         bool input1, input2;
1503         int i;
1504         bool success;
1505
1506         temp = I915_READ(intel_sdvo->sdvo_reg);
1507         temp |= SDVO_ENABLE;
1508         intel_sdvo_write_sdvox(intel_sdvo, temp);
1509
1510         for (i = 0; i < 2; i++)
1511                 intel_wait_for_vblank(dev_priv, intel_crtc->pipe);
1512
1513         success = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1514         /* Warn if the device reported failure to sync.
1515          * A lot of SDVO devices fail to notify of sync, but it's
1516          * a given it the status is a success, we succeeded.
1517          */
1518         if (success && !input1) {
1519                 DRM_DEBUG_KMS("First %s output reported failure to "
1520                                 "sync\n", SDVO_NAME(intel_sdvo));
1521         }
1522
1523         if (0)
1524                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1525                                                    DRM_MODE_DPMS_ON);
1526         intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1527 }
1528
1529 static enum drm_mode_status
1530 intel_sdvo_mode_valid(struct drm_connector *connector,
1531                       struct drm_display_mode *mode)
1532 {
1533         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1534         int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
1535
1536         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1537                 return MODE_NO_DBLESCAN;
1538
1539         if (intel_sdvo->pixel_clock_min > mode->clock)
1540                 return MODE_CLOCK_LOW;
1541
1542         if (intel_sdvo->pixel_clock_max < mode->clock)
1543                 return MODE_CLOCK_HIGH;
1544
1545         if (mode->clock > max_dotclk)
1546                 return MODE_CLOCK_HIGH;
1547
1548         if (intel_sdvo->is_lvds) {
1549                 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1550                         return MODE_PANEL;
1551
1552                 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1553                         return MODE_PANEL;
1554         }
1555
1556         return MODE_OK;
1557 }
1558
1559 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1560 {
1561         BUILD_BUG_ON(sizeof(*caps) != 8);
1562         if (!intel_sdvo_get_value(intel_sdvo,
1563                                   SDVO_CMD_GET_DEVICE_CAPS,
1564                                   caps, sizeof(*caps)))
1565                 return false;
1566
1567         DRM_DEBUG_KMS("SDVO capabilities:\n"
1568                       "  vendor_id: %d\n"
1569                       "  device_id: %d\n"
1570                       "  device_rev_id: %d\n"
1571                       "  sdvo_version_major: %d\n"
1572                       "  sdvo_version_minor: %d\n"
1573                       "  sdvo_inputs_mask: %d\n"
1574                       "  smooth_scaling: %d\n"
1575                       "  sharp_scaling: %d\n"
1576                       "  up_scaling: %d\n"
1577                       "  down_scaling: %d\n"
1578                       "  stall_support: %d\n"
1579                       "  output_flags: %d\n",
1580                       caps->vendor_id,
1581                       caps->device_id,
1582                       caps->device_rev_id,
1583                       caps->sdvo_version_major,
1584                       caps->sdvo_version_minor,
1585                       caps->sdvo_inputs_mask,
1586                       caps->smooth_scaling,
1587                       caps->sharp_scaling,
1588                       caps->up_scaling,
1589                       caps->down_scaling,
1590                       caps->stall_support,
1591                       caps->output_flags);
1592
1593         return true;
1594 }
1595
1596 static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
1597 {
1598         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
1599         uint16_t hotplug;
1600
1601         if (!I915_HAS_HOTPLUG(dev_priv))
1602                 return 0;
1603
1604         /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1605          * on the line. */
1606         if (IS_I945G(dev_priv) || IS_I945GM(dev_priv))
1607                 return 0;
1608
1609         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1610                                         &hotplug, sizeof(hotplug)))
1611                 return 0;
1612
1613         return hotplug;
1614 }
1615
1616 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1617 {
1618         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1619
1620         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1621                         &intel_sdvo->hotplug_active, 2);
1622 }
1623
1624 static bool
1625 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1626 {
1627         /* Is there more than one type of output? */
1628         return hweight16(intel_sdvo->caps.output_flags) > 1;
1629 }
1630
1631 static struct edid *
1632 intel_sdvo_get_edid(struct drm_connector *connector)
1633 {
1634         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1635         return drm_get_edid(connector, &sdvo->ddc);
1636 }
1637
1638 /* Mac mini hack -- use the same DDC as the analog connector */
1639 static struct edid *
1640 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1641 {
1642         struct drm_i915_private *dev_priv = to_i915(connector->dev);
1643
1644         return drm_get_edid(connector,
1645                             intel_gmbus_get_adapter(dev_priv,
1646                                                     dev_priv->vbt.crt_ddc_pin));
1647 }
1648
1649 static enum drm_connector_status
1650 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1651 {
1652         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1653         enum drm_connector_status status;
1654         struct edid *edid;
1655
1656         edid = intel_sdvo_get_edid(connector);
1657
1658         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1659                 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1660
1661                 /*
1662                  * Don't use the 1 as the argument of DDC bus switch to get
1663                  * the EDID. It is used for SDVO SPD ROM.
1664                  */
1665                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1666                         intel_sdvo->ddc_bus = ddc;
1667                         edid = intel_sdvo_get_edid(connector);
1668                         if (edid)
1669                                 break;
1670                 }
1671                 /*
1672                  * If we found the EDID on the other bus,
1673                  * assume that is the correct DDC bus.
1674                  */
1675                 if (edid == NULL)
1676                         intel_sdvo->ddc_bus = saved_ddc;
1677         }
1678
1679         /*
1680          * When there is no edid and no monitor is connected with VGA
1681          * port, try to use the CRT ddc to read the EDID for DVI-connector.
1682          */
1683         if (edid == NULL)
1684                 edid = intel_sdvo_get_analog_edid(connector);
1685
1686         status = connector_status_unknown;
1687         if (edid != NULL) {
1688                 /* DDC bus is shared, match EDID to connector type */
1689                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1690                         status = connector_status_connected;
1691                         if (intel_sdvo->is_hdmi) {
1692                                 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1693                                 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1694                                 intel_sdvo->rgb_quant_range_selectable =
1695                                         drm_rgb_quant_range_selectable(edid);
1696                         }
1697                 } else
1698                         status = connector_status_disconnected;
1699                 kfree(edid);
1700         }
1701
1702         if (status == connector_status_connected) {
1703                 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1704                 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1705                         intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
1706         }
1707
1708         return status;
1709 }
1710
1711 static bool
1712 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1713                                   struct edid *edid)
1714 {
1715         bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1716         bool connector_is_digital = !!IS_DIGITAL(sdvo);
1717
1718         DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1719                       connector_is_digital, monitor_is_digital);
1720         return connector_is_digital == monitor_is_digital;
1721 }
1722
1723 static enum drm_connector_status
1724 intel_sdvo_detect(struct drm_connector *connector, bool force)
1725 {
1726         uint16_t response;
1727         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1728         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1729         enum drm_connector_status ret;
1730
1731         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1732                       connector->base.id, connector->name);
1733
1734         if (!intel_sdvo_get_value(intel_sdvo,
1735                                   SDVO_CMD_GET_ATTACHED_DISPLAYS,
1736                                   &response, 2))
1737                 return connector_status_unknown;
1738
1739         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1740                       response & 0xff, response >> 8,
1741                       intel_sdvo_connector->output_flag);
1742
1743         if (response == 0)
1744                 return connector_status_disconnected;
1745
1746         intel_sdvo->attached_output = response;
1747
1748         intel_sdvo->has_hdmi_monitor = false;
1749         intel_sdvo->has_hdmi_audio = false;
1750         intel_sdvo->rgb_quant_range_selectable = false;
1751
1752         if ((intel_sdvo_connector->output_flag & response) == 0)
1753                 ret = connector_status_disconnected;
1754         else if (IS_TMDS(intel_sdvo_connector))
1755                 ret = intel_sdvo_tmds_sink_detect(connector);
1756         else {
1757                 struct edid *edid;
1758
1759                 /* if we have an edid check it matches the connection */
1760                 edid = intel_sdvo_get_edid(connector);
1761                 if (edid == NULL)
1762                         edid = intel_sdvo_get_analog_edid(connector);
1763                 if (edid != NULL) {
1764                         if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1765                                                               edid))
1766                                 ret = connector_status_connected;
1767                         else
1768                                 ret = connector_status_disconnected;
1769
1770                         kfree(edid);
1771                 } else
1772                         ret = connector_status_connected;
1773         }
1774
1775         /* May update encoder flag for like clock for SDVO TV, etc.*/
1776         if (ret == connector_status_connected) {
1777                 intel_sdvo->is_tv = false;
1778                 intel_sdvo->is_lvds = false;
1779
1780                 if (response & SDVO_TV_MASK)
1781                         intel_sdvo->is_tv = true;
1782                 if (response & SDVO_LVDS_MASK)
1783                         intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1784         }
1785
1786         return ret;
1787 }
1788
1789 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1790 {
1791         struct edid *edid;
1792
1793         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1794                       connector->base.id, connector->name);
1795
1796         /* set the bus switch and get the modes */
1797         edid = intel_sdvo_get_edid(connector);
1798
1799         /*
1800          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
1801          * link between analog and digital outputs. So, if the regular SDVO
1802          * DDC fails, check to see if the analog output is disconnected, in
1803          * which case we'll look there for the digital DDC data.
1804          */
1805         if (edid == NULL)
1806                 edid = intel_sdvo_get_analog_edid(connector);
1807
1808         if (edid != NULL) {
1809                 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1810                                                       edid)) {
1811                         drm_mode_connector_update_edid_property(connector, edid);
1812                         drm_add_edid_modes(connector, edid);
1813                 }
1814
1815                 kfree(edid);
1816         }
1817 }
1818
1819 /*
1820  * Set of SDVO TV modes.
1821  * Note!  This is in reply order (see loop in get_tv_modes).
1822  * XXX: all 60Hz refresh?
1823  */
1824 static const struct drm_display_mode sdvo_tv_modes[] = {
1825         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1826                    416, 0, 200, 201, 232, 233, 0,
1827                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1828         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1829                    416, 0, 240, 241, 272, 273, 0,
1830                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1831         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1832                    496, 0, 300, 301, 332, 333, 0,
1833                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1834         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1835                    736, 0, 350, 351, 382, 383, 0,
1836                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1837         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1838                    736, 0, 400, 401, 432, 433, 0,
1839                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1840         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1841                    736, 0, 480, 481, 512, 513, 0,
1842                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1843         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1844                    800, 0, 480, 481, 512, 513, 0,
1845                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1846         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1847                    800, 0, 576, 577, 608, 609, 0,
1848                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1849         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1850                    816, 0, 350, 351, 382, 383, 0,
1851                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1852         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1853                    816, 0, 400, 401, 432, 433, 0,
1854                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1855         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1856                    816, 0, 480, 481, 512, 513, 0,
1857                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1858         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1859                    816, 0, 540, 541, 572, 573, 0,
1860                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1861         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1862                    816, 0, 576, 577, 608, 609, 0,
1863                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1864         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1865                    864, 0, 576, 577, 608, 609, 0,
1866                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1867         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1868                    896, 0, 600, 601, 632, 633, 0,
1869                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1870         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1871                    928, 0, 624, 625, 656, 657, 0,
1872                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1873         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1874                    1016, 0, 766, 767, 798, 799, 0,
1875                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1876         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1877                    1120, 0, 768, 769, 800, 801, 0,
1878                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1879         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1880                    1376, 0, 1024, 1025, 1056, 1057, 0,
1881                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1882 };
1883
1884 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1885 {
1886         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1887         struct intel_sdvo_sdtv_resolution_request tv_res;
1888         uint32_t reply = 0, format_map = 0;
1889         int i;
1890
1891         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1892                       connector->base.id, connector->name);
1893
1894         /* Read the list of supported input resolutions for the selected TV
1895          * format.
1896          */
1897         format_map = 1 << intel_sdvo->tv_format_index;
1898         memcpy(&tv_res, &format_map,
1899                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1900
1901         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1902                 return;
1903
1904         BUILD_BUG_ON(sizeof(tv_res) != 3);
1905         if (!intel_sdvo_write_cmd(intel_sdvo,
1906                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1907                                   &tv_res, sizeof(tv_res)))
1908                 return;
1909         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1910                 return;
1911
1912         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1913                 if (reply & (1 << i)) {
1914                         struct drm_display_mode *nmode;
1915                         nmode = drm_mode_duplicate(connector->dev,
1916                                                    &sdvo_tv_modes[i]);
1917                         if (nmode)
1918                                 drm_mode_probed_add(connector, nmode);
1919                 }
1920 }
1921
1922 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1923 {
1924         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1925         struct drm_i915_private *dev_priv = to_i915(connector->dev);
1926         struct drm_display_mode *newmode;
1927
1928         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1929                       connector->base.id, connector->name);
1930
1931         /*
1932          * Fetch modes from VBT. For SDVO prefer the VBT mode since some
1933          * SDVO->LVDS transcoders can't cope with the EDID mode.
1934          */
1935         if (dev_priv->vbt.sdvo_lvds_vbt_mode != NULL) {
1936                 newmode = drm_mode_duplicate(connector->dev,
1937                                              dev_priv->vbt.sdvo_lvds_vbt_mode);
1938                 if (newmode != NULL) {
1939                         /* Guarantee the mode is preferred */
1940                         newmode->type = (DRM_MODE_TYPE_PREFERRED |
1941                                          DRM_MODE_TYPE_DRIVER);
1942                         drm_mode_probed_add(connector, newmode);
1943                 }
1944         }
1945
1946         /*
1947          * Attempt to get the mode list from DDC.
1948          * Assume that the preferred modes are
1949          * arranged in priority order.
1950          */
1951         intel_ddc_get_modes(connector, &intel_sdvo->ddc);
1952
1953         list_for_each_entry(newmode, &connector->probed_modes, head) {
1954                 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1955                         intel_sdvo->sdvo_lvds_fixed_mode =
1956                                 drm_mode_duplicate(connector->dev, newmode);
1957
1958                         intel_sdvo->is_lvds = true;
1959                         break;
1960                 }
1961         }
1962 }
1963
1964 static int intel_sdvo_get_modes(struct drm_connector *connector)
1965 {
1966         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1967
1968         if (IS_TV(intel_sdvo_connector))
1969                 intel_sdvo_get_tv_modes(connector);
1970         else if (IS_LVDS(intel_sdvo_connector))
1971                 intel_sdvo_get_lvds_modes(connector);
1972         else
1973                 intel_sdvo_get_ddc_modes(connector);
1974
1975         return !list_empty(&connector->probed_modes);
1976 }
1977
1978 static void intel_sdvo_destroy(struct drm_connector *connector)
1979 {
1980         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1981
1982         drm_connector_cleanup(connector);
1983         kfree(intel_sdvo_connector);
1984 }
1985
1986 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1987 {
1988         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1989         struct edid *edid;
1990         bool has_audio = false;
1991
1992         if (!intel_sdvo->is_hdmi)
1993                 return false;
1994
1995         edid = intel_sdvo_get_edid(connector);
1996         if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1997                 has_audio = drm_detect_monitor_audio(edid);
1998         kfree(edid);
1999
2000         return has_audio;
2001 }
2002
2003 static int
2004 intel_sdvo_set_property(struct drm_connector *connector,
2005                         struct drm_property *property,
2006                         uint64_t val)
2007 {
2008         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
2009         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2010         struct drm_i915_private *dev_priv = to_i915(connector->dev);
2011         uint16_t temp_value;
2012         uint8_t cmd;
2013         int ret;
2014
2015         ret = drm_object_property_set_value(&connector->base, property, val);
2016         if (ret)
2017                 return ret;
2018
2019         if (property == dev_priv->force_audio_property) {
2020                 int i = val;
2021                 bool has_audio;
2022
2023                 if (i == intel_sdvo_connector->force_audio)
2024                         return 0;
2025
2026                 intel_sdvo_connector->force_audio = i;
2027
2028                 if (i == HDMI_AUDIO_AUTO)
2029                         has_audio = intel_sdvo_detect_hdmi_audio(connector);
2030                 else
2031                         has_audio = (i == HDMI_AUDIO_ON);
2032
2033                 if (has_audio == intel_sdvo->has_hdmi_audio)
2034                         return 0;
2035
2036                 intel_sdvo->has_hdmi_audio = has_audio;
2037                 goto done;
2038         }
2039
2040         if (property == dev_priv->broadcast_rgb_property) {
2041                 bool old_auto = intel_sdvo->color_range_auto;
2042                 uint32_t old_range = intel_sdvo->color_range;
2043
2044                 switch (val) {
2045                 case INTEL_BROADCAST_RGB_AUTO:
2046                         intel_sdvo->color_range_auto = true;
2047                         break;
2048                 case INTEL_BROADCAST_RGB_FULL:
2049                         intel_sdvo->color_range_auto = false;
2050                         intel_sdvo->color_range = 0;
2051                         break;
2052                 case INTEL_BROADCAST_RGB_LIMITED:
2053                         intel_sdvo->color_range_auto = false;
2054                         /* FIXME: this bit is only valid when using TMDS
2055                          * encoding and 8 bit per color mode. */
2056                         intel_sdvo->color_range = HDMI_COLOR_RANGE_16_235;
2057                         break;
2058                 default:
2059                         return -EINVAL;
2060                 }
2061
2062                 if (old_auto == intel_sdvo->color_range_auto &&
2063                     old_range == intel_sdvo->color_range)
2064                         return 0;
2065
2066                 goto done;
2067         }
2068
2069         if (property == connector->dev->mode_config.aspect_ratio_property) {
2070                 switch (val) {
2071                 case DRM_MODE_PICTURE_ASPECT_NONE:
2072                         intel_sdvo->aspect_ratio = HDMI_PICTURE_ASPECT_NONE;
2073                         break;
2074                 case DRM_MODE_PICTURE_ASPECT_4_3:
2075                         intel_sdvo->aspect_ratio = HDMI_PICTURE_ASPECT_4_3;
2076                         break;
2077                 case DRM_MODE_PICTURE_ASPECT_16_9:
2078                         intel_sdvo->aspect_ratio = HDMI_PICTURE_ASPECT_16_9;
2079                         break;
2080                 default:
2081                         return -EINVAL;
2082                 }
2083                 goto done;
2084         }
2085
2086 #define CHECK_PROPERTY(name, NAME) \
2087         if (intel_sdvo_connector->name == property) { \
2088                 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
2089                 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
2090                 cmd = SDVO_CMD_SET_##NAME; \
2091                 intel_sdvo_connector->cur_##name = temp_value; \
2092                 goto set_value; \
2093         }
2094
2095         if (property == intel_sdvo_connector->tv_format) {
2096                 if (val >= TV_FORMAT_NUM)
2097                         return -EINVAL;
2098
2099                 if (intel_sdvo->tv_format_index ==
2100                     intel_sdvo_connector->tv_format_supported[val])
2101                         return 0;
2102
2103                 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
2104                 goto done;
2105         } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
2106                 temp_value = val;
2107                 if (intel_sdvo_connector->left == property) {
2108                         drm_object_property_set_value(&connector->base,
2109                                                          intel_sdvo_connector->right, val);
2110                         if (intel_sdvo_connector->left_margin == temp_value)
2111                                 return 0;
2112
2113                         intel_sdvo_connector->left_margin = temp_value;
2114                         intel_sdvo_connector->right_margin = temp_value;
2115                         temp_value = intel_sdvo_connector->max_hscan -
2116                                 intel_sdvo_connector->left_margin;
2117                         cmd = SDVO_CMD_SET_OVERSCAN_H;
2118                         goto set_value;
2119                 } else if (intel_sdvo_connector->right == property) {
2120                         drm_object_property_set_value(&connector->base,
2121                                                          intel_sdvo_connector->left, val);
2122                         if (intel_sdvo_connector->right_margin == temp_value)
2123                                 return 0;
2124
2125                         intel_sdvo_connector->left_margin = temp_value;
2126                         intel_sdvo_connector->right_margin = temp_value;
2127                         temp_value = intel_sdvo_connector->max_hscan -
2128                                 intel_sdvo_connector->left_margin;
2129                         cmd = SDVO_CMD_SET_OVERSCAN_H;
2130                         goto set_value;
2131                 } else if (intel_sdvo_connector->top == property) {
2132                         drm_object_property_set_value(&connector->base,
2133                                                          intel_sdvo_connector->bottom, val);
2134                         if (intel_sdvo_connector->top_margin == temp_value)
2135                                 return 0;
2136
2137                         intel_sdvo_connector->top_margin = temp_value;
2138                         intel_sdvo_connector->bottom_margin = temp_value;
2139                         temp_value = intel_sdvo_connector->max_vscan -
2140                                 intel_sdvo_connector->top_margin;
2141                         cmd = SDVO_CMD_SET_OVERSCAN_V;
2142                         goto set_value;
2143                 } else if (intel_sdvo_connector->bottom == property) {
2144                         drm_object_property_set_value(&connector->base,
2145                                                          intel_sdvo_connector->top, val);
2146                         if (intel_sdvo_connector->bottom_margin == temp_value)
2147                                 return 0;
2148
2149                         intel_sdvo_connector->top_margin = temp_value;
2150                         intel_sdvo_connector->bottom_margin = temp_value;
2151                         temp_value = intel_sdvo_connector->max_vscan -
2152                                 intel_sdvo_connector->top_margin;
2153                         cmd = SDVO_CMD_SET_OVERSCAN_V;
2154                         goto set_value;
2155                 }
2156                 CHECK_PROPERTY(hpos, HPOS)
2157                 CHECK_PROPERTY(vpos, VPOS)
2158                 CHECK_PROPERTY(saturation, SATURATION)
2159                 CHECK_PROPERTY(contrast, CONTRAST)
2160                 CHECK_PROPERTY(hue, HUE)
2161                 CHECK_PROPERTY(brightness, BRIGHTNESS)
2162                 CHECK_PROPERTY(sharpness, SHARPNESS)
2163                 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
2164                 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
2165                 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
2166                 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
2167                 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
2168                 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
2169         }
2170
2171         return -EINVAL; /* unknown property */
2172
2173 set_value:
2174         if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
2175                 return -EIO;
2176
2177
2178 done:
2179         if (intel_sdvo->base.base.crtc)
2180                 intel_crtc_restore_mode(intel_sdvo->base.base.crtc);
2181
2182         return 0;
2183 #undef CHECK_PROPERTY
2184 }
2185
2186 static int
2187 intel_sdvo_connector_register(struct drm_connector *connector)
2188 {
2189         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
2190         int ret;
2191
2192         ret = intel_connector_register(connector);
2193         if (ret)
2194                 return ret;
2195
2196         return sysfs_create_link(&connector->kdev->kobj,
2197                                  &sdvo->ddc.dev.kobj,
2198                                  sdvo->ddc.dev.kobj.name);
2199 }
2200
2201 static void
2202 intel_sdvo_connector_unregister(struct drm_connector *connector)
2203 {
2204         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
2205
2206         sysfs_remove_link(&connector->kdev->kobj,
2207                           sdvo->ddc.dev.kobj.name);
2208         intel_connector_unregister(connector);
2209 }
2210
2211 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
2212         .dpms = drm_atomic_helper_connector_dpms,
2213         .detect = intel_sdvo_detect,
2214         .fill_modes = drm_helper_probe_single_connector_modes,
2215         .set_property = intel_sdvo_set_property,
2216         .atomic_get_property = intel_connector_atomic_get_property,
2217         .late_register = intel_sdvo_connector_register,
2218         .early_unregister = intel_sdvo_connector_unregister,
2219         .destroy = intel_sdvo_destroy,
2220         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
2221         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
2222 };
2223
2224 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2225         .get_modes = intel_sdvo_get_modes,
2226         .mode_valid = intel_sdvo_mode_valid,
2227 };
2228
2229 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
2230 {
2231         struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder));
2232
2233         if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
2234                 drm_mode_destroy(encoder->dev,
2235                                  intel_sdvo->sdvo_lvds_fixed_mode);
2236
2237         i2c_del_adapter(&intel_sdvo->ddc);
2238         intel_encoder_destroy(encoder);
2239 }
2240
2241 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2242         .destroy = intel_sdvo_enc_destroy,
2243 };
2244
2245 static void
2246 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2247 {
2248         uint16_t mask = 0;
2249         unsigned int num_bits;
2250
2251         /* Make a mask of outputs less than or equal to our own priority in the
2252          * list.
2253          */
2254         switch (sdvo->controlled_output) {
2255         case SDVO_OUTPUT_LVDS1:
2256                 mask |= SDVO_OUTPUT_LVDS1;
2257         case SDVO_OUTPUT_LVDS0:
2258                 mask |= SDVO_OUTPUT_LVDS0;
2259         case SDVO_OUTPUT_TMDS1:
2260                 mask |= SDVO_OUTPUT_TMDS1;
2261         case SDVO_OUTPUT_TMDS0:
2262                 mask |= SDVO_OUTPUT_TMDS0;
2263         case SDVO_OUTPUT_RGB1:
2264                 mask |= SDVO_OUTPUT_RGB1;
2265         case SDVO_OUTPUT_RGB0:
2266                 mask |= SDVO_OUTPUT_RGB0;
2267                 break;
2268         }
2269
2270         /* Count bits to find what number we are in the priority list. */
2271         mask &= sdvo->caps.output_flags;
2272         num_bits = hweight16(mask);
2273         /* If more than 3 outputs, default to DDC bus 3 for now. */
2274         if (num_bits > 3)
2275                 num_bits = 3;
2276
2277         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2278         sdvo->ddc_bus = 1 << num_bits;
2279 }
2280
2281 /**
2282  * Choose the appropriate DDC bus for control bus switch command for this
2283  * SDVO output based on the controlled output.
2284  *
2285  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2286  * outputs, then LVDS outputs.
2287  */
2288 static void
2289 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2290                           struct intel_sdvo *sdvo)
2291 {
2292         struct sdvo_device_mapping *mapping;
2293
2294         if (sdvo->port == PORT_B)
2295                 mapping = &dev_priv->vbt.sdvo_mappings[0];
2296         else
2297                 mapping = &dev_priv->vbt.sdvo_mappings[1];
2298
2299         if (mapping->initialized)
2300                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2301         else
2302                 intel_sdvo_guess_ddc_bus(sdvo);
2303 }
2304
2305 static void
2306 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2307                           struct intel_sdvo *sdvo)
2308 {
2309         struct sdvo_device_mapping *mapping;
2310         u8 pin;
2311
2312         if (sdvo->port == PORT_B)
2313                 mapping = &dev_priv->vbt.sdvo_mappings[0];
2314         else
2315                 mapping = &dev_priv->vbt.sdvo_mappings[1];
2316
2317         if (mapping->initialized &&
2318             intel_gmbus_is_valid_pin(dev_priv, mapping->i2c_pin))
2319                 pin = mapping->i2c_pin;
2320         else
2321                 pin = GMBUS_PIN_DPB;
2322
2323         sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2324
2325         /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2326          * our code totally fails once we start using gmbus. Hence fall back to
2327          * bit banging for now. */
2328         intel_gmbus_force_bit(sdvo->i2c, true);
2329 }
2330
2331 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2332 static void
2333 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2334 {
2335         intel_gmbus_force_bit(sdvo->i2c, false);
2336 }
2337
2338 static bool
2339 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
2340 {
2341         return intel_sdvo_check_supp_encode(intel_sdvo);
2342 }
2343
2344 static u8
2345 intel_sdvo_get_slave_addr(struct drm_i915_private *dev_priv,
2346                           struct intel_sdvo *sdvo)
2347 {
2348         struct sdvo_device_mapping *my_mapping, *other_mapping;
2349
2350         if (sdvo->port == PORT_B) {
2351                 my_mapping = &dev_priv->vbt.sdvo_mappings[0];
2352                 other_mapping = &dev_priv->vbt.sdvo_mappings[1];
2353         } else {
2354                 my_mapping = &dev_priv->vbt.sdvo_mappings[1];
2355                 other_mapping = &dev_priv->vbt.sdvo_mappings[0];
2356         }
2357
2358         /* If the BIOS described our SDVO device, take advantage of it. */
2359         if (my_mapping->slave_addr)
2360                 return my_mapping->slave_addr;
2361
2362         /* If the BIOS only described a different SDVO device, use the
2363          * address that it isn't using.
2364          */
2365         if (other_mapping->slave_addr) {
2366                 if (other_mapping->slave_addr == 0x70)
2367                         return 0x72;
2368                 else
2369                         return 0x70;
2370         }
2371
2372         /* No SDVO device info is found for another DVO port,
2373          * so use mapping assumption we had before BIOS parsing.
2374          */
2375         if (sdvo->port == PORT_B)
2376                 return 0x70;
2377         else
2378                 return 0x72;
2379 }
2380
2381 static int
2382 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2383                           struct intel_sdvo *encoder)
2384 {
2385         struct drm_connector *drm_connector;
2386         int ret;
2387
2388         drm_connector = &connector->base.base;
2389         ret = drm_connector_init(encoder->base.base.dev,
2390                            drm_connector,
2391                            &intel_sdvo_connector_funcs,
2392                            connector->base.base.connector_type);
2393         if (ret < 0)
2394                 return ret;
2395
2396         drm_connector_helper_add(drm_connector,
2397                                  &intel_sdvo_connector_helper_funcs);
2398
2399         connector->base.base.interlace_allowed = 1;
2400         connector->base.base.doublescan_allowed = 0;
2401         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2402         connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2403
2404         intel_connector_attach_encoder(&connector->base, &encoder->base);
2405
2406         return 0;
2407 }
2408
2409 static void
2410 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
2411                                struct intel_sdvo_connector *connector)
2412 {
2413         struct drm_i915_private *dev_priv = to_i915(connector->base.base.dev);
2414
2415         intel_attach_force_audio_property(&connector->base.base);
2416         if (INTEL_GEN(dev_priv) >= 4 && IS_MOBILE(dev_priv)) {
2417                 intel_attach_broadcast_rgb_property(&connector->base.base);
2418                 intel_sdvo->color_range_auto = true;
2419         }
2420         intel_attach_aspect_ratio_property(&connector->base.base);
2421         intel_sdvo->aspect_ratio = HDMI_PICTURE_ASPECT_NONE;
2422 }
2423
2424 static struct intel_sdvo_connector *intel_sdvo_connector_alloc(void)
2425 {
2426         struct intel_sdvo_connector *sdvo_connector;
2427
2428         sdvo_connector = kzalloc(sizeof(*sdvo_connector), GFP_KERNEL);
2429         if (!sdvo_connector)
2430                 return NULL;
2431
2432         if (intel_connector_init(&sdvo_connector->base) < 0) {
2433                 kfree(sdvo_connector);
2434                 return NULL;
2435         }
2436
2437         return sdvo_connector;
2438 }
2439
2440 static bool
2441 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2442 {
2443         struct drm_encoder *encoder = &intel_sdvo->base.base;
2444         struct drm_connector *connector;
2445         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2446         struct intel_connector *intel_connector;
2447         struct intel_sdvo_connector *intel_sdvo_connector;
2448
2449         DRM_DEBUG_KMS("initialising DVI device %d\n", device);
2450
2451         intel_sdvo_connector = intel_sdvo_connector_alloc();
2452         if (!intel_sdvo_connector)
2453                 return false;
2454
2455         if (device == 0) {
2456                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2457                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2458         } else if (device == 1) {
2459                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2460                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2461         }
2462
2463         intel_connector = &intel_sdvo_connector->base;
2464         connector = &intel_connector->base;
2465         if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2466                 intel_sdvo_connector->output_flag) {
2467                 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2468                 /* Some SDVO devices have one-shot hotplug interrupts.
2469                  * Ensure that they get re-enabled when an interrupt happens.
2470                  */
2471                 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2472                 intel_sdvo_enable_hotplug(intel_encoder);
2473         } else {
2474                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2475         }
2476         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2477         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2478
2479         if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2480                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2481                 intel_sdvo->is_hdmi = true;
2482         }
2483
2484         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2485                 kfree(intel_sdvo_connector);
2486                 return false;
2487         }
2488
2489         if (intel_sdvo->is_hdmi)
2490                 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
2491
2492         return true;
2493 }
2494
2495 static bool
2496 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2497 {
2498         struct drm_encoder *encoder = &intel_sdvo->base.base;
2499         struct drm_connector *connector;
2500         struct intel_connector *intel_connector;
2501         struct intel_sdvo_connector *intel_sdvo_connector;
2502
2503         DRM_DEBUG_KMS("initialising TV type %d\n", type);
2504
2505         intel_sdvo_connector = intel_sdvo_connector_alloc();
2506         if (!intel_sdvo_connector)
2507                 return false;
2508
2509         intel_connector = &intel_sdvo_connector->base;
2510         connector = &intel_connector->base;
2511         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2512         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2513
2514         intel_sdvo->controlled_output |= type;
2515         intel_sdvo_connector->output_flag = type;
2516
2517         intel_sdvo->is_tv = true;
2518
2519         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2520                 kfree(intel_sdvo_connector);
2521                 return false;
2522         }
2523
2524         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2525                 goto err;
2526
2527         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2528                 goto err;
2529
2530         return true;
2531
2532 err:
2533         intel_sdvo_destroy(connector);
2534         return false;
2535 }
2536
2537 static bool
2538 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2539 {
2540         struct drm_encoder *encoder = &intel_sdvo->base.base;
2541         struct drm_connector *connector;
2542         struct intel_connector *intel_connector;
2543         struct intel_sdvo_connector *intel_sdvo_connector;
2544
2545         DRM_DEBUG_KMS("initialising analog device %d\n", device);
2546
2547         intel_sdvo_connector = intel_sdvo_connector_alloc();
2548         if (!intel_sdvo_connector)
2549                 return false;
2550
2551         intel_connector = &intel_sdvo_connector->base;
2552         connector = &intel_connector->base;
2553         intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2554         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2555         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2556
2557         if (device == 0) {
2558                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2559                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2560         } else if (device == 1) {
2561                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2562                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2563         }
2564
2565         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2566                 kfree(intel_sdvo_connector);
2567                 return false;
2568         }
2569
2570         return true;
2571 }
2572
2573 static bool
2574 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2575 {
2576         struct drm_encoder *encoder = &intel_sdvo->base.base;
2577         struct drm_connector *connector;
2578         struct intel_connector *intel_connector;
2579         struct intel_sdvo_connector *intel_sdvo_connector;
2580
2581         DRM_DEBUG_KMS("initialising LVDS device %d\n", device);
2582
2583         intel_sdvo_connector = intel_sdvo_connector_alloc();
2584         if (!intel_sdvo_connector)
2585                 return false;
2586
2587         intel_connector = &intel_sdvo_connector->base;
2588         connector = &intel_connector->base;
2589         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2590         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2591
2592         if (device == 0) {
2593                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2594                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2595         } else if (device == 1) {
2596                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2597                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2598         }
2599
2600         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2601                 kfree(intel_sdvo_connector);
2602                 return false;
2603         }
2604
2605         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2606                 goto err;
2607
2608         return true;
2609
2610 err:
2611         intel_sdvo_destroy(connector);
2612         return false;
2613 }
2614
2615 static bool
2616 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2617 {
2618         intel_sdvo->is_tv = false;
2619         intel_sdvo->is_lvds = false;
2620
2621         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2622
2623         if (flags & SDVO_OUTPUT_TMDS0)
2624                 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2625                         return false;
2626
2627         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2628                 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2629                         return false;
2630
2631         /* TV has no XXX1 function block */
2632         if (flags & SDVO_OUTPUT_SVID0)
2633                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2634                         return false;
2635
2636         if (flags & SDVO_OUTPUT_CVBS0)
2637                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2638                         return false;
2639
2640         if (flags & SDVO_OUTPUT_YPRPB0)
2641                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2642                         return false;
2643
2644         if (flags & SDVO_OUTPUT_RGB0)
2645                 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2646                         return false;
2647
2648         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2649                 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2650                         return false;
2651
2652         if (flags & SDVO_OUTPUT_LVDS0)
2653                 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2654                         return false;
2655
2656         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2657                 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2658                         return false;
2659
2660         if ((flags & SDVO_OUTPUT_MASK) == 0) {
2661                 unsigned char bytes[2];
2662
2663                 intel_sdvo->controlled_output = 0;
2664                 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2665                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2666                               SDVO_NAME(intel_sdvo),
2667                               bytes[0], bytes[1]);
2668                 return false;
2669         }
2670         intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2671
2672         return true;
2673 }
2674
2675 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2676 {
2677         struct drm_device *dev = intel_sdvo->base.base.dev;
2678         struct drm_connector *connector, *tmp;
2679
2680         list_for_each_entry_safe(connector, tmp,
2681                                  &dev->mode_config.connector_list, head) {
2682                 if (intel_attached_encoder(connector) == &intel_sdvo->base) {
2683                         drm_connector_unregister(connector);
2684                         intel_sdvo_destroy(connector);
2685                 }
2686         }
2687 }
2688
2689 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2690                                           struct intel_sdvo_connector *intel_sdvo_connector,
2691                                           int type)
2692 {
2693         struct drm_device *dev = intel_sdvo->base.base.dev;
2694         struct intel_sdvo_tv_format format;
2695         uint32_t format_map, i;
2696
2697         if (!intel_sdvo_set_target_output(intel_sdvo, type))
2698                 return false;
2699
2700         BUILD_BUG_ON(sizeof(format) != 6);
2701         if (!intel_sdvo_get_value(intel_sdvo,
2702                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2703                                   &format, sizeof(format)))
2704                 return false;
2705
2706         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2707
2708         if (format_map == 0)
2709                 return false;
2710
2711         intel_sdvo_connector->format_supported_num = 0;
2712         for (i = 0 ; i < TV_FORMAT_NUM; i++)
2713                 if (format_map & (1 << i))
2714                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2715
2716
2717         intel_sdvo_connector->tv_format =
2718                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
2719                                             "mode", intel_sdvo_connector->format_supported_num);
2720         if (!intel_sdvo_connector->tv_format)
2721                 return false;
2722
2723         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2724                 drm_property_add_enum(
2725                                 intel_sdvo_connector->tv_format, i,
2726                                 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2727
2728         intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2729         drm_object_attach_property(&intel_sdvo_connector->base.base.base,
2730                                       intel_sdvo_connector->tv_format, 0);
2731         return true;
2732
2733 }
2734
2735 #define ENHANCEMENT(name, NAME) do { \
2736         if (enhancements.name) { \
2737                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2738                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2739                         return false; \
2740                 intel_sdvo_connector->max_##name = data_value[0]; \
2741                 intel_sdvo_connector->cur_##name = response; \
2742                 intel_sdvo_connector->name = \
2743                         drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2744                 if (!intel_sdvo_connector->name) return false; \
2745                 drm_object_attach_property(&connector->base, \
2746                                               intel_sdvo_connector->name, \
2747                                               intel_sdvo_connector->cur_##name); \
2748                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2749                               data_value[0], data_value[1], response); \
2750         } \
2751 } while (0)
2752
2753 static bool
2754 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2755                                       struct intel_sdvo_connector *intel_sdvo_connector,
2756                                       struct intel_sdvo_enhancements_reply enhancements)
2757 {
2758         struct drm_device *dev = intel_sdvo->base.base.dev;
2759         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2760         uint16_t response, data_value[2];
2761
2762         /* when horizontal overscan is supported, Add the left/right  property */
2763         if (enhancements.overscan_h) {
2764                 if (!intel_sdvo_get_value(intel_sdvo,
2765                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
2766                                           &data_value, 4))
2767                         return false;
2768
2769                 if (!intel_sdvo_get_value(intel_sdvo,
2770                                           SDVO_CMD_GET_OVERSCAN_H,
2771                                           &response, 2))
2772                         return false;
2773
2774                 intel_sdvo_connector->max_hscan = data_value[0];
2775                 intel_sdvo_connector->left_margin = data_value[0] - response;
2776                 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2777                 intel_sdvo_connector->left =
2778                         drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2779                 if (!intel_sdvo_connector->left)
2780                         return false;
2781
2782                 drm_object_attach_property(&connector->base,
2783                                               intel_sdvo_connector->left,
2784                                               intel_sdvo_connector->left_margin);
2785
2786                 intel_sdvo_connector->right =
2787                         drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2788                 if (!intel_sdvo_connector->right)
2789                         return false;
2790
2791                 drm_object_attach_property(&connector->base,
2792                                               intel_sdvo_connector->right,
2793                                               intel_sdvo_connector->right_margin);
2794                 DRM_DEBUG_KMS("h_overscan: max %d, "
2795                               "default %d, current %d\n",
2796                               data_value[0], data_value[1], response);
2797         }
2798
2799         if (enhancements.overscan_v) {
2800                 if (!intel_sdvo_get_value(intel_sdvo,
2801                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
2802                                           &data_value, 4))
2803                         return false;
2804
2805                 if (!intel_sdvo_get_value(intel_sdvo,
2806                                           SDVO_CMD_GET_OVERSCAN_V,
2807                                           &response, 2))
2808                         return false;
2809
2810                 intel_sdvo_connector->max_vscan = data_value[0];
2811                 intel_sdvo_connector->top_margin = data_value[0] - response;
2812                 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2813                 intel_sdvo_connector->top =
2814                         drm_property_create_range(dev, 0,
2815                                             "top_margin", 0, data_value[0]);
2816                 if (!intel_sdvo_connector->top)
2817                         return false;
2818
2819                 drm_object_attach_property(&connector->base,
2820                                               intel_sdvo_connector->top,
2821                                               intel_sdvo_connector->top_margin);
2822
2823                 intel_sdvo_connector->bottom =
2824                         drm_property_create_range(dev, 0,
2825                                             "bottom_margin", 0, data_value[0]);
2826                 if (!intel_sdvo_connector->bottom)
2827                         return false;
2828
2829                 drm_object_attach_property(&connector->base,
2830                                               intel_sdvo_connector->bottom,
2831                                               intel_sdvo_connector->bottom_margin);
2832                 DRM_DEBUG_KMS("v_overscan: max %d, "
2833                               "default %d, current %d\n",
2834                               data_value[0], data_value[1], response);
2835         }
2836
2837         ENHANCEMENT(hpos, HPOS);
2838         ENHANCEMENT(vpos, VPOS);
2839         ENHANCEMENT(saturation, SATURATION);
2840         ENHANCEMENT(contrast, CONTRAST);
2841         ENHANCEMENT(hue, HUE);
2842         ENHANCEMENT(sharpness, SHARPNESS);
2843         ENHANCEMENT(brightness, BRIGHTNESS);
2844         ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2845         ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2846         ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2847         ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2848         ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2849
2850         if (enhancements.dot_crawl) {
2851                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2852                         return false;
2853
2854                 intel_sdvo_connector->max_dot_crawl = 1;
2855                 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2856                 intel_sdvo_connector->dot_crawl =
2857                         drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2858                 if (!intel_sdvo_connector->dot_crawl)
2859                         return false;
2860
2861                 drm_object_attach_property(&connector->base,
2862                                               intel_sdvo_connector->dot_crawl,
2863                                               intel_sdvo_connector->cur_dot_crawl);
2864                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2865         }
2866
2867         return true;
2868 }
2869
2870 static bool
2871 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2872                                         struct intel_sdvo_connector *intel_sdvo_connector,
2873                                         struct intel_sdvo_enhancements_reply enhancements)
2874 {
2875         struct drm_device *dev = intel_sdvo->base.base.dev;
2876         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2877         uint16_t response, data_value[2];
2878
2879         ENHANCEMENT(brightness, BRIGHTNESS);
2880
2881         return true;
2882 }
2883 #undef ENHANCEMENT
2884
2885 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2886                                                struct intel_sdvo_connector *intel_sdvo_connector)
2887 {
2888         union {
2889                 struct intel_sdvo_enhancements_reply reply;
2890                 uint16_t response;
2891         } enhancements;
2892
2893         BUILD_BUG_ON(sizeof(enhancements) != 2);
2894
2895         enhancements.response = 0;
2896         intel_sdvo_get_value(intel_sdvo,
2897                              SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2898                              &enhancements, sizeof(enhancements));
2899         if (enhancements.response == 0) {
2900                 DRM_DEBUG_KMS("No enhancement is supported\n");
2901                 return true;
2902         }
2903
2904         if (IS_TV(intel_sdvo_connector))
2905                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2906         else if (IS_LVDS(intel_sdvo_connector))
2907                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2908         else
2909                 return true;
2910 }
2911
2912 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2913                                      struct i2c_msg *msgs,
2914                                      int num)
2915 {
2916         struct intel_sdvo *sdvo = adapter->algo_data;
2917
2918         if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2919                 return -EIO;
2920
2921         return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2922 }
2923
2924 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2925 {
2926         struct intel_sdvo *sdvo = adapter->algo_data;
2927         return sdvo->i2c->algo->functionality(sdvo->i2c);
2928 }
2929
2930 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2931         .master_xfer    = intel_sdvo_ddc_proxy_xfer,
2932         .functionality  = intel_sdvo_ddc_proxy_func
2933 };
2934
2935 static bool
2936 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2937                           struct drm_i915_private *dev_priv)
2938 {
2939         struct pci_dev *pdev = dev_priv->drm.pdev;
2940
2941         sdvo->ddc.owner = THIS_MODULE;
2942         sdvo->ddc.class = I2C_CLASS_DDC;
2943         snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2944         sdvo->ddc.dev.parent = &pdev->dev;
2945         sdvo->ddc.algo_data = sdvo;
2946         sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2947
2948         return i2c_add_adapter(&sdvo->ddc) == 0;
2949 }
2950
2951 static void assert_sdvo_port_valid(const struct drm_i915_private *dev_priv,
2952                                    enum port port)
2953 {
2954         if (HAS_PCH_SPLIT(dev_priv))
2955                 WARN_ON(port != PORT_B);
2956         else
2957                 WARN_ON(port != PORT_B && port != PORT_C);
2958 }
2959
2960 bool intel_sdvo_init(struct drm_i915_private *dev_priv,
2961                      i915_reg_t sdvo_reg, enum port port)
2962 {
2963         struct intel_encoder *intel_encoder;
2964         struct intel_sdvo *intel_sdvo;
2965         int i;
2966
2967         assert_sdvo_port_valid(dev_priv, port);
2968
2969         intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL);
2970         if (!intel_sdvo)
2971                 return false;
2972
2973         intel_sdvo->sdvo_reg = sdvo_reg;
2974         intel_sdvo->port = port;
2975         intel_sdvo->slave_addr =
2976                 intel_sdvo_get_slave_addr(dev_priv, intel_sdvo) >> 1;
2977         intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo);
2978         if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev_priv))
2979                 goto err_i2c_bus;
2980
2981         /* encoder type will be decided later */
2982         intel_encoder = &intel_sdvo->base;
2983         intel_encoder->type = INTEL_OUTPUT_SDVO;
2984         intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
2985         intel_encoder->port = port;
2986         drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
2987                          &intel_sdvo_enc_funcs, 0,
2988                          "SDVO %c", port_name(port));
2989
2990         /* Read the regs to test if we can talk to the device */
2991         for (i = 0; i < 0x40; i++) {
2992                 u8 byte;
2993
2994                 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2995                         DRM_DEBUG_KMS("No SDVO device found on %s\n",
2996                                       SDVO_NAME(intel_sdvo));
2997                         goto err;
2998                 }
2999         }
3000
3001         intel_encoder->compute_config = intel_sdvo_compute_config;
3002         if (HAS_PCH_SPLIT(dev_priv)) {
3003                 intel_encoder->disable = pch_disable_sdvo;
3004                 intel_encoder->post_disable = pch_post_disable_sdvo;
3005         } else {
3006                 intel_encoder->disable = intel_disable_sdvo;
3007         }
3008         intel_encoder->pre_enable = intel_sdvo_pre_enable;
3009         intel_encoder->enable = intel_enable_sdvo;
3010         intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
3011         intel_encoder->get_config = intel_sdvo_get_config;
3012
3013         /* In default case sdvo lvds is false */
3014         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
3015                 goto err;
3016
3017         if (intel_sdvo_output_setup(intel_sdvo,
3018                                     intel_sdvo->caps.output_flags) != true) {
3019                 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
3020                               SDVO_NAME(intel_sdvo));
3021                 /* Output_setup can leave behind connectors! */
3022                 goto err_output;
3023         }
3024
3025         /* Only enable the hotplug irq if we need it, to work around noisy
3026          * hotplug lines.
3027          */
3028         if (intel_sdvo->hotplug_active) {
3029                 if (intel_sdvo->port == PORT_B)
3030                         intel_encoder->hpd_pin = HPD_SDVO_B;
3031                 else
3032                         intel_encoder->hpd_pin = HPD_SDVO_C;
3033         }
3034
3035         /*
3036          * Cloning SDVO with anything is often impossible, since the SDVO
3037          * encoder can request a special input timing mode. And even if that's
3038          * not the case we have evidence that cloning a plain unscaled mode with
3039          * VGA doesn't really work. Furthermore the cloning flags are way too
3040          * simplistic anyway to express such constraints, so just give up on
3041          * cloning for SDVO encoders.
3042          */
3043         intel_sdvo->base.cloneable = 0;
3044
3045         intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo);
3046
3047         /* Set the input timing to the screen. Assume always input 0. */
3048         if (!intel_sdvo_set_target_input(intel_sdvo))
3049                 goto err_output;
3050
3051         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
3052                                                     &intel_sdvo->pixel_clock_min,
3053                                                     &intel_sdvo->pixel_clock_max))
3054                 goto err_output;
3055
3056         DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
3057                         "clock range %dMHz - %dMHz, "
3058                         "input 1: %c, input 2: %c, "
3059                         "output 1: %c, output 2: %c\n",
3060                         SDVO_NAME(intel_sdvo),
3061                         intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
3062                         intel_sdvo->caps.device_rev_id,
3063                         intel_sdvo->pixel_clock_min / 1000,
3064                         intel_sdvo->pixel_clock_max / 1000,
3065                         (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
3066                         (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
3067                         /* check currently supported outputs */
3068                         intel_sdvo->caps.output_flags &
3069                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
3070                         intel_sdvo->caps.output_flags &
3071                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
3072         return true;
3073
3074 err_output:
3075         intel_sdvo_output_cleanup(intel_sdvo);
3076
3077 err:
3078         drm_encoder_cleanup(&intel_encoder->base);
3079         i2c_del_adapter(&intel_sdvo->ddc);
3080 err_i2c_bus:
3081         intel_sdvo_unselect_i2c_bus(intel_sdvo);
3082         kfree(intel_sdvo);
3083
3084         return false;
3085 }