drivers/gpu/drm/i915/intel_lvds.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  *      Dave Airlie <airlied@linux.ie>
  27  *      Jesse Barnes <jesse.barnes@intel.com>
  28  */
  29
  30 #include <acpi/button.h>
  31 #include <linux/dmi.h>
  32 #include <linux/i2c.h>
  33 #include <linux/slab.h>
  34 #include "drmP.h"
  35 #include "drm.h"
  36 #include "drm_crtc.h"
  37 #include "drm_edid.h"
  38 #include "intel_drv.h"
  39 #include "i915_drm.h"
  40 #include "i915_drv.h"
  41 #include <linux/acpi.h>
  42
  43 /* Private structure for the integrated LVDS support */
  44 struct intel_lvds_priv {
  45         int fitting_mode;
  46         u32 pfit_control;
  47         u32 pfit_pgm_ratios;
  48 };
  49
  50 /**
  51  * Sets the backlight level.
  52  *
  53  * \param level backlight level, from 0 to intel_lvds_get_max_backlight().
  54  */
  55 static void intel_lvds_set_backlight(struct drm_device *dev, int level)
  56 {
  57         struct drm_i915_private *dev_priv = dev->dev_private;
  58         u32 blc_pwm_ctl, reg;
  59
  60         if (HAS_PCH_SPLIT(dev))
  61                 reg = BLC_PWM_CPU_CTL;
  62         else
  63                 reg = BLC_PWM_CTL;
  64
  65         blc_pwm_ctl = I915_READ(reg) & ~BACKLIGHT_DUTY_CYCLE_MASK;
  66         I915_WRITE(reg, (blc_pwm_ctl |
  67                                  (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
  68 }
  69
  70 /**
  71  * Returns the maximum level of the backlight duty cycle field.
  72  */
  73 static u32 intel_lvds_get_max_backlight(struct drm_device *dev)
  74 {
  75         struct drm_i915_private *dev_priv = dev->dev_private;
  76         u32 reg;
  77
  78         if (HAS_PCH_SPLIT(dev))
  79                 reg = BLC_PWM_PCH_CTL2;
  80         else
  81                 reg = BLC_PWM_CTL;
  82
  83         return ((I915_READ(reg) & BACKLIGHT_MODULATION_FREQ_MASK) >>
  84                 BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
  85 }
  86
  87 /**
  88  * Sets the power state for the panel.
  89  */
  90 static void intel_lvds_set_power(struct drm_device *dev, bool on)
  91 {
  92         struct drm_i915_private *dev_priv = dev->dev_private;
  93         u32 pp_status, ctl_reg, status_reg, lvds_reg;
  94
  95         if (HAS_PCH_SPLIT(dev)) {
  96                 ctl_reg = PCH_PP_CONTROL;
  97                 status_reg = PCH_PP_STATUS;
  98                 lvds_reg = PCH_LVDS;
  99         } else {
 100                 ctl_reg = PP_CONTROL;
 101                 status_reg = PP_STATUS;
 102                 lvds_reg = LVDS;
 103         }
 104
 105         if (on) {
 106                 I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
 107                 POSTING_READ(lvds_reg);
 108
 109                 I915_WRITE(ctl_reg, I915_READ(ctl_reg) |
 110                            POWER_TARGET_ON);
 111                 do {
 112                         pp_status = I915_READ(status_reg);
 113                 } while ((pp_status & PP_ON) == 0);
 114
 115                 intel_lvds_set_backlight(dev, dev_priv->backlight_duty_cycle);
 116         } else {
 117                 intel_lvds_set_backlight(dev, 0);
 118
 119                 I915_WRITE(ctl_reg, I915_READ(ctl_reg) &
 120                            ~POWER_TARGET_ON);
 121                 do {
 122                         pp_status = I915_READ(status_reg);
 123                 } while (pp_status & PP_ON);
 124
 125                 I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
 126                 POSTING_READ(lvds_reg);
 127         }
 128 }
 129
 130 static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
 131 {
 132         struct drm_device *dev = encoder->dev;
 133
 134         if (mode == DRM_MODE_DPMS_ON)
 135                 intel_lvds_set_power(dev, true);
 136         else
 137                 intel_lvds_set_power(dev, false);
 138
 139         /* XXX: We never power down the LVDS pairs. */
 140 }
 141
 142 static int intel_lvds_mode_valid(struct drm_connector *connector,
 143                                  struct drm_display_mode *mode)
 144 {
 145         struct drm_device *dev = connector->dev;
 146         struct drm_i915_private *dev_priv = dev->dev_private;
 147         struct drm_display_mode *fixed_mode = dev_priv->panel_fixed_mode;
 148
 149         if (fixed_mode) {
 150                 if (mode->hdisplay > fixed_mode->hdisplay)
 151                         return MODE_PANEL;
 152                 if (mode->vdisplay > fixed_mode->vdisplay)
 153                         return MODE_PANEL;
 154         }
 155
 156         return MODE_OK;
 157 }
 158
 159 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
 160                                   struct drm_display_mode *mode,
 161                                   struct drm_display_mode *adjusted_mode)
 162 {
 163         /*
 164          * float point operation is not supported . So the PANEL_RATIO_FACTOR
 165          * is defined, which can avoid the float point computation when
 166          * calculating the panel ratio.
 167          */
 168 #define PANEL_RATIO_FACTOR 8192
 169         struct drm_device *dev = encoder->dev;
 170         struct drm_i915_private *dev_priv = dev->dev_private;
 171         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
 172         struct drm_encoder *tmp_encoder;
 173         struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
 174         struct intel_lvds_priv *lvds_priv = intel_encoder->dev_priv;
 175         u32 pfit_control = 0, pfit_pgm_ratios = 0;
 176         int left_border = 0, right_border = 0, top_border = 0;
 177         int bottom_border = 0;
 178         bool border = 0;
 179         int panel_ratio, desired_ratio, vert_scale, horiz_scale;
 180         int horiz_ratio, vert_ratio;
 181         u32 hsync_width, vsync_width;
 182         u32 hblank_width, vblank_width;
 183         u32 hsync_pos, vsync_pos;
 184
 185         /* Should never happen!! */
 186         if (!IS_I965G(dev) && intel_crtc->pipe == 0) {
 187                 DRM_ERROR("Can't support LVDS on pipe A\n");
 188                 return false;
 189         }
 190
 191         /* Should never happen!! */
 192         list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
 193                 if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
 194                         DRM_ERROR("Can't enable LVDS and another "
 195                                "encoder on the same pipe\n");
 196                         return false;
 197                 }
 198         }
 199         /* If we don't have a panel mode, there is nothing we can do */
 200         if (dev_priv->panel_fixed_mode == NULL)
 201                 return true;
 202         /*
 203          * If we have timings from the BIOS for the panel, put them in
 204          * to the adjusted mode.  The CRTC will be set up for this mode,
 205          * with the panel scaling set up to source from the H/VDisplay
 206          * of the original mode.
 207          */
 208         if (dev_priv->panel_fixed_mode != NULL) {
 209                 adjusted_mode->hdisplay = dev_priv->panel_fixed_mode->hdisplay;
 210                 adjusted_mode->hsync_start =
 211                         dev_priv->panel_fixed_mode->hsync_start;
 212                 adjusted_mode->hsync_end =
 213                         dev_priv->panel_fixed_mode->hsync_end;
 214                 adjusted_mode->htotal = dev_priv->panel_fixed_mode->htotal;
 215                 adjusted_mode->vdisplay = dev_priv->panel_fixed_mode->vdisplay;
 216                 adjusted_mode->vsync_start =
 217                         dev_priv->panel_fixed_mode->vsync_start;
 218                 adjusted_mode->vsync_end =
 219                         dev_priv->panel_fixed_mode->vsync_end;
 220                 adjusted_mode->vtotal = dev_priv->panel_fixed_mode->vtotal;
 221                 adjusted_mode->clock = dev_priv->panel_fixed_mode->clock;
 222                 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
 223         }
 224
 225         /* Make sure pre-965s set dither correctly */
 226         if (!IS_I965G(dev)) {
 227                 if (dev_priv->panel_wants_dither || dev_priv->lvds_dither)
 228                         pfit_control |= PANEL_8TO6_DITHER_ENABLE;
 229         }
 230
 231         /* Native modes don't need fitting */
 232         if (adjusted_mode->hdisplay == mode->hdisplay &&
 233                         adjusted_mode->vdisplay == mode->vdisplay) {
 234                 pfit_pgm_ratios = 0;
 235                 border = 0;
 236                 goto out;
 237         }
 238
 239         /* full screen scale for now */
 240         if (HAS_PCH_SPLIT(dev))
 241                 goto out;
 242
 243         /* 965+ wants fuzzy fitting */
 244         if (IS_I965G(dev))
 245                 pfit_control |= (intel_crtc->pipe << PFIT_PIPE_SHIFT) |
 246                                         PFIT_FILTER_FUZZY;
 247
 248         hsync_width = adjusted_mode->crtc_hsync_end -
 249                                         adjusted_mode->crtc_hsync_start;
 250         vsync_width = adjusted_mode->crtc_vsync_end -
 251                                         adjusted_mode->crtc_vsync_start;
 252         hblank_width = adjusted_mode->crtc_hblank_end -
 253                                         adjusted_mode->crtc_hblank_start;
 254         vblank_width = adjusted_mode->crtc_vblank_end -
 255                                         adjusted_mode->crtc_vblank_start;
 256         /*
 257          * Deal with panel fitting options. Figure out how to stretch the
 258          * image based on its aspect ratio & the current panel fitting mode.
 259          */
 260         panel_ratio = adjusted_mode->hdisplay * PANEL_RATIO_FACTOR /
 261                                 adjusted_mode->vdisplay;
 262         desired_ratio = mode->hdisplay * PANEL_RATIO_FACTOR /
 263                                 mode->vdisplay;
 264         /*
 265          * Enable automatic panel scaling for non-native modes so that they fill
 266          * the screen.  Should be enabled before the pipe is enabled, according
 267          * to register description and PRM.
 268          * Change the value here to see the borders for debugging
 269          */
 270         if (!HAS_PCH_SPLIT(dev)) {
 271                 I915_WRITE(BCLRPAT_A, 0);
 272                 I915_WRITE(BCLRPAT_B, 0);
 273         }
 274
 275         switch (lvds_priv->fitting_mode) {
 276         case DRM_MODE_SCALE_CENTER:
 277                 /*
 278                  * For centered modes, we have to calculate border widths &
 279                  * heights and modify the values programmed into the CRTC.
 280                  */
 281                 left_border = (adjusted_mode->hdisplay - mode->hdisplay) / 2;
 282                 right_border = left_border;
 283                 if (mode->hdisplay & 1)
 284                         right_border++;
 285                 top_border = (adjusted_mode->vdisplay - mode->vdisplay) / 2;
 286                 bottom_border = top_border;
 287                 if (mode->vdisplay & 1)
 288                         bottom_border++;
 289                 /* Set active & border values */
 290                 adjusted_mode->crtc_hdisplay = mode->hdisplay;
 291                 /* Keep the boder be even */
 292                 if (right_border & 1)
 293                         right_border++;
 294                 /* use the border directly instead of border minuse one */
 295                 adjusted_mode->crtc_hblank_start = mode->hdisplay +
 296                                                 right_border;
 297                 /* keep the blank width constant */
 298                 adjusted_mode->crtc_hblank_end =
 299                         adjusted_mode->crtc_hblank_start + hblank_width;
 300                 /* get the hsync pos relative to hblank start */
 301                 hsync_pos = (hblank_width - hsync_width) / 2;
 302                 /* keep the hsync pos be even */
 303                 if (hsync_pos & 1)
 304                         hsync_pos++;
 305                 adjusted_mode->crtc_hsync_start =
 306                                 adjusted_mode->crtc_hblank_start + hsync_pos;
 307                 /* keep the hsync width constant */
 308                 adjusted_mode->crtc_hsync_end =
 309                                 adjusted_mode->crtc_hsync_start + hsync_width;
 310                 adjusted_mode->crtc_vdisplay = mode->vdisplay;
 311                 /* use the border instead of border minus one */
 312                 adjusted_mode->crtc_vblank_start = mode->vdisplay +
 313                                                 bottom_border;
 314                 /* keep the vblank width constant */
 315                 adjusted_mode->crtc_vblank_end =
 316                                 adjusted_mode->crtc_vblank_start + vblank_width;
 317                 /* get the vsync start postion relative to vblank start */
 318                 vsync_pos = (vblank_width - vsync_width) / 2;
 319                 adjusted_mode->crtc_vsync_start =
 320                                 adjusted_mode->crtc_vblank_start + vsync_pos;
 321                 /* keep the vsync width constant */
 322                 adjusted_mode->crtc_vsync_end =
 323                                 adjusted_mode->crtc_vsync_start + vsync_width;
 324                 border = 1;
 325                 break;
 326         case DRM_MODE_SCALE_ASPECT:
 327                 /* Scale but preserve the spect ratio */
 328                 pfit_control |= PFIT_ENABLE;
 329                 if (IS_I965G(dev)) {
 330                         /* 965+ is easy, it does everything in hw */
 331                         if (panel_ratio > desired_ratio)
 332                                 pfit_control |= PFIT_SCALING_PILLAR;
 333                         else if (panel_ratio < desired_ratio)
 334                                 pfit_control |= PFIT_SCALING_LETTER;
 335                         else
 336                                 pfit_control |= PFIT_SCALING_AUTO;
 337                 } else {
 338                         /*
 339                          * For earlier chips we have to calculate the scaling
 340                          * ratio by hand and program it into the
 341                          * PFIT_PGM_RATIO register
 342                          */
 343                         u32 horiz_bits, vert_bits, bits = 12;
 344                         horiz_ratio = mode->hdisplay * PANEL_RATIO_FACTOR/
 345                                                 adjusted_mode->hdisplay;
 346                         vert_ratio = mode->vdisplay * PANEL_RATIO_FACTOR/
 347                                                 adjusted_mode->vdisplay;
 348                         horiz_scale = adjusted_mode->hdisplay *
 349                                         PANEL_RATIO_FACTOR / mode->hdisplay;
 350                         vert_scale = adjusted_mode->vdisplay *
 351                                         PANEL_RATIO_FACTOR / mode->vdisplay;
 352
 353                         /* retain aspect ratio */
 354                         if (panel_ratio > desired_ratio) { /* Pillar */
 355                                 u32 scaled_width;
 356                                 scaled_width = mode->hdisplay * vert_scale /
 357                                                 PANEL_RATIO_FACTOR;
 358                                 horiz_ratio = vert_ratio;
 359                                 pfit_control |= (VERT_AUTO_SCALE |
 360                                                  VERT_INTERP_BILINEAR |
 361                                                  HORIZ_INTERP_BILINEAR);
 362                                 /* Pillar will have left/right borders */
 363                                 left_border = (adjusted_mode->hdisplay -
 364                                                 scaled_width) / 2;
 365                                 right_border = left_border;
 366                                 if (mode->hdisplay & 1) /* odd resolutions */
 367                                         right_border++;
 368                                 /* keep the border be even */
 369                                 if (right_border & 1)
 370                                         right_border++;
 371                                 adjusted_mode->crtc_hdisplay = scaled_width;
 372                                 /* use border instead of border minus one */
 373                                 adjusted_mode->crtc_hblank_start =
 374                                         scaled_width + right_border;
 375                                 /* keep the hblank width constant */
 376                                 adjusted_mode->crtc_hblank_end =
 377                                         adjusted_mode->crtc_hblank_start +
 378                                                         hblank_width;
 379                                 /*
 380                                  * get the hsync start pos relative to
 381                                  * hblank start
 382                                  */
 383                                 hsync_pos = (hblank_width - hsync_width) / 2;
 384                                 /* keep the hsync_pos be even */
 385                                 if (hsync_pos & 1)
 386                                         hsync_pos++;
 387                                 adjusted_mode->crtc_hsync_start =
 388                                         adjusted_mode->crtc_hblank_start +
 389                                                         hsync_pos;
 390                                 /* keept hsync width constant */
 391                                 adjusted_mode->crtc_hsync_end =
 392                                         adjusted_mode->crtc_hsync_start +
 393                                                         hsync_width;
 394                                 border = 1;
 395                         } else if (panel_ratio < desired_ratio) { /* letter */
 396                                 u32 scaled_height = mode->vdisplay *
 397                                         horiz_scale / PANEL_RATIO_FACTOR;
 398                                 vert_ratio = horiz_ratio;
 399                                 pfit_control |= (HORIZ_AUTO_SCALE |
 400                                                  VERT_INTERP_BILINEAR |
 401                                                  HORIZ_INTERP_BILINEAR);
 402                                 /* Letterbox will have top/bottom border */
 403                                 top_border = (adjusted_mode->vdisplay -
 404                                         scaled_height) / 2;
 405                                 bottom_border = top_border;
 406                                 if (mode->vdisplay & 1)
 407                                         bottom_border++;
 408                                 adjusted_mode->crtc_vdisplay = scaled_height;
 409                                 /* use border instead of border minus one */
 410                                 adjusted_mode->crtc_vblank_start =
 411                                         scaled_height + bottom_border;
 412                                 /* keep the vblank width constant */
 413                                 adjusted_mode->crtc_vblank_end =
 414                                         adjusted_mode->crtc_vblank_start +
 415                                                         vblank_width;
 416                                 /*
 417                                  * get the vsync start pos relative to
 418                                  * vblank start
 419                                  */
 420                                 vsync_pos = (vblank_width - vsync_width) / 2;
 421                                 adjusted_mode->crtc_vsync_start =
 422                                         adjusted_mode->crtc_vblank_start +
 423                                                         vsync_pos;
 424                                 /* keep the vsync width constant */
 425                                 adjusted_mode->crtc_vsync_end =
 426                                         adjusted_mode->crtc_vsync_start +
 427                                                         vsync_width;
 428                                 border = 1;
 429                         } else {
 430                         /* Aspects match, Let hw scale both directions */
 431                                 pfit_control |= (VERT_AUTO_SCALE |
 432                                                  HORIZ_AUTO_SCALE |
 433                                                  VERT_INTERP_BILINEAR |
 434                                                  HORIZ_INTERP_BILINEAR);
 435                         }
 436                         horiz_bits = (1 << bits) * horiz_ratio /
 437                                         PANEL_RATIO_FACTOR;
 438                         vert_bits = (1 << bits) * vert_ratio /
 439                                         PANEL_RATIO_FACTOR;
 440                         pfit_pgm_ratios =
 441                                 ((vert_bits << PFIT_VERT_SCALE_SHIFT) &
 442                                                 PFIT_VERT_SCALE_MASK) |
 443                                 ((horiz_bits << PFIT_HORIZ_SCALE_SHIFT) &
 444                                                 PFIT_HORIZ_SCALE_MASK);
 445                 }
 446                 break;
 447
 448         case DRM_MODE_SCALE_FULLSCREEN:
 449                 /*
 450                  * Full scaling, even if it changes the aspect ratio.
 451                  * Fortunately this is all done for us in hw.
 452                  */
 453                 pfit_control |= PFIT_ENABLE;
 454                 if (IS_I965G(dev))
 455                         pfit_control |= PFIT_SCALING_AUTO;
 456                 else
 457                         pfit_control |= (VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
 458                                          VERT_INTERP_BILINEAR |
 459                                          HORIZ_INTERP_BILINEAR);
 460                 break;
 461         default:
 462                 break;
 463         }
 464
 465 out:
 466         lvds_priv->pfit_control = pfit_control;
 467         lvds_priv->pfit_pgm_ratios = pfit_pgm_ratios;
 468         /*
 469          * When there exists the border, it means that the LVDS_BORDR
 470          * should be enabled.
 471          */
 472         if (border)
 473                 dev_priv->lvds_border_bits |= LVDS_BORDER_ENABLE;
 474         else
 475                 dev_priv->lvds_border_bits &= ~(LVDS_BORDER_ENABLE);
 476         /*
 477          * XXX: It would be nice to support lower refresh rates on the
 478          * panels to reduce power consumption, and perhaps match the
 479          * user's requested refresh rate.
 480          */
 481
 482         return true;
 483 }
 484
 485 static void intel_lvds_prepare(struct drm_encoder *encoder)
 486 {
 487         struct drm_device *dev = encoder->dev;
 488         struct drm_i915_private *dev_priv = dev->dev_private;
 489         u32 reg;
 490
 491         if (HAS_PCH_SPLIT(dev))
 492                 reg = BLC_PWM_CPU_CTL;
 493         else
 494                 reg = BLC_PWM_CTL;
 495
 496         dev_priv->saveBLC_PWM_CTL = I915_READ(reg);
 497         dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
 498                                        BACKLIGHT_DUTY_CYCLE_MASK);
 499
 500         intel_lvds_set_power(dev, false);
 501 }
 502
 503 static void intel_lvds_commit( struct drm_encoder *encoder)
 504 {
 505         struct drm_device *dev = encoder->dev;
 506         struct drm_i915_private *dev_priv = dev->dev_private;
 507
 508         if (dev_priv->backlight_duty_cycle == 0)
 509                 dev_priv->backlight_duty_cycle =
 510                         intel_lvds_get_max_backlight(dev);
 511
 512         intel_lvds_set_power(dev, true);
 513 }
 514
 515 static void intel_lvds_mode_set(struct drm_encoder *encoder,
 516                                 struct drm_display_mode *mode,
 517                                 struct drm_display_mode *adjusted_mode)
 518 {
 519         struct drm_device *dev = encoder->dev;
 520         struct drm_i915_private *dev_priv = dev->dev_private;
 521         struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
 522         struct intel_lvds_priv *lvds_priv = intel_encoder->dev_priv;
 523
 524         /*
 525          * The LVDS pin pair will already have been turned on in the
 526          * intel_crtc_mode_set since it has a large impact on the DPLL
 527          * settings.
 528          */
 529
 530         if (HAS_PCH_SPLIT(dev))
 531                 return;
 532
 533         /*
 534          * Enable automatic panel scaling so that non-native modes fill the
 535          * screen.  Should be enabled before the pipe is enabled, according to
 536          * register description and PRM.
 537          */
 538         I915_WRITE(PFIT_PGM_RATIOS, lvds_priv->pfit_pgm_ratios);
 539         I915_WRITE(PFIT_CONTROL, lvds_priv->pfit_control);
 540 }
 541
 542 /**
 543  * Detect the LVDS connection.
 544  *
 545  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
 546  * connected and closed means disconnected.  We also send hotplug events as
 547  * needed, using lid status notification from the input layer.
 548  */
 549 static enum drm_connector_status intel_lvds_detect(struct drm_connector *connector)
 550 {
 551         struct drm_device *dev = connector->dev;
 552         enum drm_connector_status status = connector_status_connected;
 553
 554         /* ACPI lid methods were generally unreliable in this generation, so
 555          * don't even bother.
 556          */
 557         if (IS_GEN2(dev) || IS_GEN3(dev))
 558                 return connector_status_connected;
 559
 560         return status;
 561 }
 562
 563 /**
 564  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
 565  */
 566 static int intel_lvds_get_modes(struct drm_connector *connector)
 567 {
 568         struct drm_device *dev = connector->dev;
 569         struct drm_encoder *encoder = intel_attached_encoder(connector);
 570         struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
 571         struct drm_i915_private *dev_priv = dev->dev_private;
 572         int ret = 0;
 573
 574         if (dev_priv->lvds_edid_good) {
 575                 ret = intel_ddc_get_modes(connector, intel_encoder->ddc_bus);
 576
 577                 if (ret)
 578                         return ret;
 579         }
 580
 581         /* Didn't get an EDID, so
 582          * Set wide sync ranges so we get all modes
 583          * handed to valid_mode for checking
 584          */
 585         connector->display_info.min_vfreq = 0;
 586         connector->display_info.max_vfreq = 200;
 587         connector->display_info.min_hfreq = 0;
 588         connector->display_info.max_hfreq = 200;
 589
 590         if (dev_priv->panel_fixed_mode != NULL) {
 591                 struct drm_display_mode *mode;
 592
 593                 mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode);
 594                 drm_mode_probed_add(connector, mode);
 595
 596                 return 1;
 597         }
 598
 599         return 0;
 600 }
 601
 602 /*
 603  * Lid events. Note the use of 'modeset_on_lid':
 604  *  - we set it on lid close, and reset it on open
 605  *  - we use it as a "only once" bit (ie we ignore
 606  *    duplicate events where it was already properly
 607  *    set/reset)
 608  *  - the suspend/resume paths will also set it to
 609  *    zero, since they restore the mode ("lid open").
 610  */
 611 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
 612                             void *unused)
 613 {
 614         struct drm_i915_private *dev_priv =
 615                 container_of(nb, struct drm_i915_private, lid_notifier);
 616         struct drm_device *dev = dev_priv->dev;
 617         struct drm_connector *connector = dev_priv->int_lvds_connector;
 618
 619         /*
 620          * check and update the status of LVDS connector after receiving
 621          * the LID nofication event.
 622          */
 623         if (connector)
 624                 connector->status = connector->funcs->detect(connector);
 625         if (!acpi_lid_open()) {
 626                 dev_priv->modeset_on_lid = 1;
 627                 return NOTIFY_OK;
 628         }
 629
 630         if (!dev_priv->modeset_on_lid)
 631                 return NOTIFY_OK;
 632
 633         dev_priv->modeset_on_lid = 0;
 634
 635         mutex_lock(&dev->mode_config.mutex);
 636         drm_helper_resume_force_mode(dev);
 637         mutex_unlock(&dev->mode_config.mutex);
 638
 639         return NOTIFY_OK;
 640 }
 641
 642 /**
 643  * intel_lvds_destroy - unregister and free LVDS structures
 644  * @connector: connector to free
 645  *
 646  * Unregister the DDC bus for this connector then free the driver private
 647  * structure.
 648  */
 649 static void intel_lvds_destroy(struct drm_connector *connector)
 650 {
 651         struct drm_device *dev = connector->dev;
 652         struct drm_i915_private *dev_priv = dev->dev_private;
 653
 654         if (dev_priv->lid_notifier.notifier_call)
 655                 acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
 656         drm_sysfs_connector_remove(connector);
 657         drm_connector_cleanup(connector);
 658         kfree(connector);
 659 }
 660
 661 static int intel_lvds_set_property(struct drm_connector *connector,
 662                                    struct drm_property *property,
 663                                    uint64_t value)
 664 {
 665         struct drm_device *dev = connector->dev;
 666
 667         if (property == dev->mode_config.scaling_mode_property &&
 668                                 connector->encoder) {
 669                 struct drm_crtc *crtc = connector->encoder->crtc;
 670                 struct drm_encoder *encoder = connector->encoder;
 671                 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
 672                 struct intel_lvds_priv *lvds_priv = intel_encoder->dev_priv;
 673
 674                 if (value == DRM_MODE_SCALE_NONE) {
 675                         DRM_DEBUG_KMS("no scaling not supported\n");
 676                         return 0;
 677                 }
 678                 if (lvds_priv->fitting_mode == value) {
 679                         /* the LVDS scaling property is not changed */
 680                         return 0;
 681                 }
 682                 lvds_priv->fitting_mode = value;
 683                 if (crtc && crtc->enabled) {
 684                         /*
 685                          * If the CRTC is enabled, the display will be changed
 686                          * according to the new panel fitting mode.
 687                          */
 688                         drm_crtc_helper_set_mode(crtc, &crtc->mode,
 689                                 crtc->x, crtc->y, crtc->fb);
 690                 }
 691         }
 692
 693         return 0;
 694 }
 695
 696 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
 697         .dpms = intel_lvds_dpms,
 698         .mode_fixup = intel_lvds_mode_fixup,
 699         .prepare = intel_lvds_prepare,
 700         .mode_set = intel_lvds_mode_set,
 701         .commit = intel_lvds_commit,
 702 };
 703
 704 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
 705         .get_modes = intel_lvds_get_modes,
 706         .mode_valid = intel_lvds_mode_valid,
 707         .best_encoder = intel_attached_encoder,
 708 };
 709
 710 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
 711         .dpms = drm_helper_connector_dpms,
 712         .detect = intel_lvds_detect,
 713         .fill_modes = drm_helper_probe_single_connector_modes,
 714         .set_property = intel_lvds_set_property,
 715         .destroy = intel_lvds_destroy,
 716 };
 717
 718
 719 static void intel_lvds_enc_destroy(struct drm_encoder *encoder)
 720 {
 721         struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
 722
 723         if (intel_encoder->ddc_bus)
 724                 intel_i2c_destroy(intel_encoder->ddc_bus);
 725         drm_encoder_cleanup(encoder);
 726         kfree(intel_encoder);
 727 }
 728
 729 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
 730         .destroy = intel_lvds_enc_destroy,
 731 };
 732
 733 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
 734 {
 735         DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
 736         return 1;
 737 }
 738
 739 /* These systems claim to have LVDS, but really don't */
 740 static const struct dmi_system_id intel_no_lvds[] = {
 741         {
 742                 .callback = intel_no_lvds_dmi_callback,
 743                 .ident = "Apple Mac Mini (Core series)",
 744                 .matches = {
 745                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 746                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
 747                 },
 748         },
 749         {
 750                 .callback = intel_no_lvds_dmi_callback,
 751                 .ident = "Apple Mac Mini (Core 2 series)",
 752                 .matches = {
 753                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 754                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
 755                 },
 756         },
 757         {
 758                 .callback = intel_no_lvds_dmi_callback,
 759                 .ident = "MSI IM-945GSE-A",
 760                 .matches = {
 761                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
 762                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
 763                 },
 764         },
 765         {
 766                 .callback = intel_no_lvds_dmi_callback,
 767                 .ident = "Dell Studio Hybrid",
 768                 .matches = {
 769                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 770                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
 771                 },
 772         },
 773         {
 774                 .callback = intel_no_lvds_dmi_callback,
 775                 .ident = "AOpen Mini PC",
 776                 .matches = {
 777                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
 778                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
 779                 },
 780         },
 781         {
 782                 .callback = intel_no_lvds_dmi_callback,
 783                 .ident = "AOpen Mini PC MP915",
 784                 .matches = {
 785                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 786                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
 787                 },
 788         },
 789         {
 790                 .callback = intel_no_lvds_dmi_callback,
 791                 .ident = "Aopen i945GTt-VFA",
 792                 .matches = {
 793                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
 794                 },
 795         },
 796         {
 797                 .callback = intel_no_lvds_dmi_callback,
 798                 .ident = "Clientron U800",
 799                 .matches = {
 800                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 801                         DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
 802                 },
 803         },
 804
 805         { }     /* terminating entry */
 806 };
 807
 808 /**
 809  * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
 810  * @dev: drm device
 811  * @connector: LVDS connector
 812  *
 813  * Find the reduced downclock for LVDS in EDID.
 814  */
 815 static void intel_find_lvds_downclock(struct drm_device *dev,
 816                                 struct drm_connector *connector)
 817 {
 818         struct drm_i915_private *dev_priv = dev->dev_private;
 819         struct drm_display_mode *scan, *panel_fixed_mode;
 820         int temp_downclock;
 821
 822         panel_fixed_mode = dev_priv->panel_fixed_mode;
 823         temp_downclock = panel_fixed_mode->clock;
 824
 825         mutex_lock(&dev->mode_config.mutex);
 826         list_for_each_entry(scan, &connector->probed_modes, head) {
 827                 /*
 828                  * If one mode has the same resolution with the fixed_panel
 829                  * mode while they have the different refresh rate, it means
 830                  * that the reduced downclock is found for the LVDS. In such
 831                  * case we can set the different FPx0/1 to dynamically select
 832                  * between low and high frequency.
 833                  */
 834                 if (scan->hdisplay == panel_fixed_mode->hdisplay &&
 835                         scan->hsync_start == panel_fixed_mode->hsync_start &&
 836                         scan->hsync_end == panel_fixed_mode->hsync_end &&
 837                         scan->htotal == panel_fixed_mode->htotal &&
 838                         scan->vdisplay == panel_fixed_mode->vdisplay &&
 839                         scan->vsync_start == panel_fixed_mode->vsync_start &&
 840                         scan->vsync_end == panel_fixed_mode->vsync_end &&
 841                         scan->vtotal == panel_fixed_mode->vtotal) {
 842                         if (scan->clock < temp_downclock) {
 843                                 /*
 844                                  * The downclock is already found. But we
 845                                  * expect to find the lower downclock.
 846                                  */
 847                                 temp_downclock = scan->clock;
 848                         }
 849                 }
 850         }
 851         mutex_unlock(&dev->mode_config.mutex);
 852         if (temp_downclock < panel_fixed_mode->clock &&
 853             i915_lvds_downclock) {
 854                 /* We found the downclock for LVDS. */
 855                 dev_priv->lvds_downclock_avail = 1;
 856                 dev_priv->lvds_downclock = temp_downclock;
 857                 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
 858                                 "Normal clock %dKhz, downclock %dKhz\n",
 859                                 panel_fixed_mode->clock, temp_downclock);
 860         }
 861         return;
 862 }
 863
 864 /*
 865  * Enumerate the child dev array parsed from VBT to check whether
 866  * the LVDS is present.
 867  * If it is present, return 1.
 868  * If it is not present, return false.
 869  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
 870  * Note: The addin_offset should also be checked for LVDS panel.
 871  * Only when it is non-zero, it is assumed that it is present.
 872  */
 873 static int lvds_is_present_in_vbt(struct drm_device *dev)
 874 {
 875         struct drm_i915_private *dev_priv = dev->dev_private;
 876         struct child_device_config *p_child;
 877         int i, ret;
 878
 879         if (!dev_priv->child_dev_num)
 880                 return 1;
 881
 882         ret = 0;
 883         for (i = 0; i < dev_priv->child_dev_num; i++) {
 884                 p_child = dev_priv->child_dev + i;
 885                 /*
 886                  * If the device type is not LFP, continue.
 887                  * If the device type is 0x22, it is also regarded as LFP.
 888                  */
 889                 if (p_child->device_type != DEVICE_TYPE_INT_LFP &&
 890                         p_child->device_type != DEVICE_TYPE_LFP)
 891                         continue;
 892
 893                 /* The addin_offset should be checked. Only when it is
 894                  * non-zero, it is regarded as present.
 895                  */
 896                 if (p_child->addin_offset) {
 897                         ret = 1;
 898                         break;
 899                 }
 900         }
 901         return ret;
 902 }
 903
 904 /**
 905  * intel_lvds_init - setup LVDS connectors on this device
 906  * @dev: drm device
 907  *
 908  * Create the connector, register the LVDS DDC bus, and try to figure out what
 909  * modes we can display on the LVDS panel (if present).
 910  */
 911 void intel_lvds_init(struct drm_device *dev)
 912 {
 913         struct drm_i915_private *dev_priv = dev->dev_private;
 914         struct intel_encoder *intel_encoder;
 915         struct intel_connector *intel_connector;
 916         struct drm_connector *connector;
 917         struct drm_encoder *encoder;
 918         struct drm_display_mode *scan; /* *modes, *bios_mode; */
 919         struct drm_crtc *crtc;
 920         struct intel_lvds_priv *lvds_priv;
 921         u32 lvds;
 922         int pipe, gpio = GPIOC;
 923
 924         /* Skip init on machines we know falsely report LVDS */
 925         if (dmi_check_system(intel_no_lvds))
 926                 return;
 927
 928         if (!lvds_is_present_in_vbt(dev)) {
 929                 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
 930                 return;
 931         }
 932
 933         if (HAS_PCH_SPLIT(dev)) {
 934                 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
 935                         return;
 936                 if (dev_priv->edp_support) {
 937                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
 938                         return;
 939                 }
 940                 gpio = PCH_GPIOC;
 941         }
 942
 943         intel_encoder = kzalloc(sizeof(struct intel_encoder) +
 944                                 sizeof(struct intel_lvds_priv), GFP_KERNEL);
 945         if (!intel_encoder) {
 946                 return;
 947         }
 948
 949         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
 950         if (!intel_connector) {
 951                 kfree(intel_encoder);
 952                 return;
 953         }
 954
 955         connector = &intel_connector->base;
 956         encoder = &intel_encoder->enc;
 957         drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
 958                            DRM_MODE_CONNECTOR_LVDS);
 959
 960         drm_encoder_init(dev, &intel_encoder->enc, &intel_lvds_enc_funcs,
 961                          DRM_MODE_ENCODER_LVDS);
 962
 963         drm_mode_connector_attach_encoder(&intel_connector->base, &intel_encoder->enc);
 964         intel_encoder->type = INTEL_OUTPUT_LVDS;
 965
 966         intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
 967         intel_encoder->crtc_mask = (1 << 1);
 968         if (IS_I965G(dev))
 969                 intel_encoder->crtc_mask |= (1 << 0);
 970         drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
 971         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
 972         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
 973         connector->interlace_allowed = false;
 974         connector->doublescan_allowed = false;
 975
 976         lvds_priv = (struct intel_lvds_priv *)(intel_encoder + 1);
 977         intel_encoder->dev_priv = lvds_priv;
 978         /* create the scaling mode property */
 979         drm_mode_create_scaling_mode_property(dev);
 980         /*
 981          * the initial panel fitting mode will be FULL_SCREEN.
 982          */
 983
 984         drm_connector_attach_property(&intel_connector->base,
 985                                       dev->mode_config.scaling_mode_property,
 986                                       DRM_MODE_SCALE_FULLSCREEN);
 987         lvds_priv->fitting_mode = DRM_MODE_SCALE_FULLSCREEN;
 988         /*
 989          * LVDS discovery:
 990          * 1) check for EDID on DDC
 991          * 2) check for VBT data
 992          * 3) check to see if LVDS is already on
 993          *    if none of the above, no panel
 994          * 4) make sure lid is open
 995          *    if closed, act like it's not there for now
 996          */
 997
 998         /* Set up the DDC bus. */
 999         intel_encoder->ddc_bus = intel_i2c_create(dev, gpio, "LVDSDDC_C");
1000         if (!intel_encoder->ddc_bus) {
1001                 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
1002                            "failed.\n");
1003                 goto failed;
1004         }
1005
1006         /*
1007          * Attempt to get the fixed panel mode from DDC.  Assume that the
1008          * preferred mode is the right one.
1009          */
1010         dev_priv->lvds_edid_good = true;
1011
1012         if (!intel_ddc_get_modes(connector, intel_encoder->ddc_bus))
1013                 dev_priv->lvds_edid_good = false;
1014
1015         list_for_each_entry(scan, &connector->probed_modes, head) {
1016                 mutex_lock(&dev->mode_config.mutex);
1017                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1018                         dev_priv->panel_fixed_mode =
1019                                 drm_mode_duplicate(dev, scan);
1020                         mutex_unlock(&dev->mode_config.mutex);
1021                         intel_find_lvds_downclock(dev, connector);
1022                         goto out;
1023                 }
1024                 mutex_unlock(&dev->mode_config.mutex);
1025         }
1026
1027         /* Failed to get EDID, what about VBT? */
1028         if (dev_priv->lfp_lvds_vbt_mode) {
1029                 mutex_lock(&dev->mode_config.mutex);
1030                 dev_priv->panel_fixed_mode =
1031                         drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
1032                 mutex_unlock(&dev->mode_config.mutex);
1033                 if (dev_priv->panel_fixed_mode) {
1034                         dev_priv->panel_fixed_mode->type |=
1035                                 DRM_MODE_TYPE_PREFERRED;
1036                         goto out;
1037                 }
1038         }
1039
1040         /*
1041          * If we didn't get EDID, try checking if the panel is already turned
1042          * on.  If so, assume that whatever is currently programmed is the
1043          * correct mode.
1044          */
1045
1046         /* Ironlake: FIXME if still fail, not try pipe mode now */
1047         if (HAS_PCH_SPLIT(dev))
1048                 goto failed;
1049
1050         lvds = I915_READ(LVDS);
1051         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1052         crtc = intel_get_crtc_from_pipe(dev, pipe);
1053
1054         if (crtc && (lvds & LVDS_PORT_EN)) {
1055                 dev_priv->panel_fixed_mode = intel_crtc_mode_get(dev, crtc);
1056                 if (dev_priv->panel_fixed_mode) {
1057                         dev_priv->panel_fixed_mode->type |=
1058                                 DRM_MODE_TYPE_PREFERRED;
1059                         goto out;
1060                 }
1061         }
1062
1063         /* If we still don't have a mode after all that, give up. */
1064         if (!dev_priv->panel_fixed_mode)
1065                 goto failed;
1066
1067 out:
1068         if (HAS_PCH_SPLIT(dev)) {
1069                 u32 pwm;
1070                 /* make sure PWM is enabled */
1071                 pwm = I915_READ(BLC_PWM_CPU_CTL2);
1072                 pwm |= (PWM_ENABLE | PWM_PIPE_B);
1073                 I915_WRITE(BLC_PWM_CPU_CTL2, pwm);
1074
1075                 pwm = I915_READ(BLC_PWM_PCH_CTL1);
1076                 pwm |= PWM_PCH_ENABLE;
1077                 I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
1078         }
1079         dev_priv->lid_notifier.notifier_call = intel_lid_notify;
1080         if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
1081                 DRM_DEBUG_KMS("lid notifier registration failed\n");
1082                 dev_priv->lid_notifier.notifier_call = NULL;
1083         }
1084         /* keep the LVDS connector */
1085         dev_priv->int_lvds_connector = connector;
1086         drm_sysfs_connector_add(connector);
1087         return;
1088
1089 failed:
1090         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1091         if (intel_encoder->ddc_bus)
1092                 intel_i2c_destroy(intel_encoder->ddc_bus);
1093         drm_connector_cleanup(connector);
1094         drm_encoder_cleanup(encoder);
1095         kfree(intel_encoder);
1096         kfree(intel_connector);
1097 }