Merge remote-tracking branches 'spi/fix/atmel', 'spi/fix/bcm63xx', 'spi/fix/doc'...
[sfrench/cifs-2.6.git] / drivers / gpu / drm / i915 / intel_dp_aux_backlight.c
1 /*
2  * Copyright © 2015 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21  * IN THE SOFTWARE.
22  *
23  */
24
25 #include "intel_drv.h"
26
27 static void set_aux_backlight_enable(struct intel_dp *intel_dp, bool enable)
28 {
29         uint8_t reg_val = 0;
30
31         if (drm_dp_dpcd_readb(&intel_dp->aux, DP_EDP_DISPLAY_CONTROL_REGISTER,
32                               &reg_val) < 0) {
33                 DRM_DEBUG_KMS("Failed to read DPCD register 0x%x\n",
34                               DP_EDP_DISPLAY_CONTROL_REGISTER);
35                 return;
36         }
37         if (enable)
38                 reg_val |= DP_EDP_BACKLIGHT_ENABLE;
39         else
40                 reg_val &= ~(DP_EDP_BACKLIGHT_ENABLE);
41
42         if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_EDP_DISPLAY_CONTROL_REGISTER,
43                                reg_val) != 1) {
44                 DRM_DEBUG_KMS("Failed to %s aux backlight\n",
45                               enable ? "enable" : "disable");
46         }
47 }
48
49 /*
50  * Read the current backlight value from DPCD register(s) based
51  * on if 8-bit(MSB) or 16-bit(MSB and LSB) values are supported
52  */
53 static uint32_t intel_dp_aux_get_backlight(struct intel_connector *connector)
54 {
55         struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base);
56         uint8_t read_val[2] = { 0x0 };
57         uint16_t level = 0;
58
59         if (drm_dp_dpcd_read(&intel_dp->aux, DP_EDP_BACKLIGHT_BRIGHTNESS_MSB,
60                              &read_val, sizeof(read_val)) < 0) {
61                 DRM_DEBUG_KMS("Failed to read DPCD register 0x%x\n",
62                               DP_EDP_BACKLIGHT_BRIGHTNESS_MSB);
63                 return 0;
64         }
65         level = read_val[0];
66         if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT)
67                 level = (read_val[0] << 8 | read_val[1]);
68
69         return level;
70 }
71
72 /*
73  * Sends the current backlight level over the aux channel, checking if its using
74  * 8-bit or 16 bit value (MSB and LSB)
75  */
76 static void
77 intel_dp_aux_set_backlight(struct intel_connector *connector, u32 level)
78 {
79         struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base);
80         uint8_t vals[2] = { 0x0 };
81
82         vals[0] = level;
83
84         /* Write the MSB and/or LSB */
85         if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT) {
86                 vals[0] = (level & 0xFF00) >> 8;
87                 vals[1] = (level & 0xFF);
88         }
89         if (drm_dp_dpcd_write(&intel_dp->aux, DP_EDP_BACKLIGHT_BRIGHTNESS_MSB,
90                               vals, sizeof(vals)) < 0) {
91                 DRM_DEBUG_KMS("Failed to write aux backlight level\n");
92                 return;
93         }
94 }
95
96 static void intel_dp_aux_enable_backlight(struct intel_connector *connector)
97 {
98         struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base);
99         uint8_t dpcd_buf = 0;
100
101         set_aux_backlight_enable(intel_dp, true);
102
103         if ((drm_dp_dpcd_readb(&intel_dp->aux,
104                                DP_EDP_BACKLIGHT_MODE_SET_REGISTER, &dpcd_buf) == 1) &&
105             ((dpcd_buf & DP_EDP_BACKLIGHT_CONTROL_MODE_MASK) ==
106              DP_EDP_BACKLIGHT_CONTROL_MODE_PRESET))
107                 drm_dp_dpcd_writeb(&intel_dp->aux, DP_EDP_BACKLIGHT_MODE_SET_REGISTER,
108                                    (dpcd_buf | DP_EDP_BACKLIGHT_CONTROL_MODE_DPCD));
109 }
110
111 static void intel_dp_aux_disable_backlight(struct intel_connector *connector)
112 {
113         set_aux_backlight_enable(enc_to_intel_dp(&connector->encoder->base), false);
114 }
115
116 static int intel_dp_aux_setup_backlight(struct intel_connector *connector,
117                                         enum pipe pipe)
118 {
119         struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base);
120         struct intel_panel *panel = &connector->panel;
121
122         if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT)
123                 panel->backlight.max = 0xFFFF;
124         else
125                 panel->backlight.max = 0xFF;
126
127         panel->backlight.min = 0;
128         panel->backlight.level = intel_dp_aux_get_backlight(connector);
129
130         panel->backlight.enabled = panel->backlight.level != 0;
131
132         return 0;
133 }
134
135 static bool
136 intel_dp_aux_display_control_capable(struct intel_connector *connector)
137 {
138         struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base);
139
140         /* Check the  eDP Display control capabilities registers to determine if
141          * the panel can support backlight control over the aux channel
142          */
143         if (intel_dp->edp_dpcd[1] & DP_EDP_TCON_BACKLIGHT_ADJUSTMENT_CAP &&
144             (intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_AUX_ENABLE_CAP) &&
145             !((intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_PIN_ENABLE_CAP) ||
146               (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_PWM_PIN_CAP))) {
147                 DRM_DEBUG_KMS("AUX Backlight Control Supported!\n");
148                 return true;
149         }
150         return false;
151 }
152
153 int intel_dp_aux_init_backlight_funcs(struct intel_connector *intel_connector)
154 {
155         struct intel_panel *panel = &intel_connector->panel;
156
157         if (!i915.enable_dpcd_backlight)
158                 return -ENODEV;
159
160         if (!intel_dp_aux_display_control_capable(intel_connector))
161                 return -ENODEV;
162
163         panel->backlight.setup = intel_dp_aux_setup_backlight;
164         panel->backlight.enable = intel_dp_aux_enable_backlight;
165         panel->backlight.disable = intel_dp_aux_disable_backlight;
166         panel->backlight.set = intel_dp_aux_set_backlight;
167         panel->backlight.get = intel_dp_aux_get_backlight;
168
169         return 0;
170 }