drivers/gpu/drm/i915/intel_breadcrumbs.c

   1 /*
   2  * Copyright © 2015 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  */
  24
  25 #include <linux/kthread.h>
  26 #include <uapi/linux/sched/types.h>
  27
  28 #include "i915_drv.h"
  29
  30 #ifdef CONFIG_SMP
  31 #define task_asleep(tsk) ((tsk)->state & TASK_NORMAL && !(tsk)->on_cpu)
  32 #else
  33 #define task_asleep(tsk) ((tsk)->state & TASK_NORMAL)
  34 #endif
  35
  36 static unsigned int __intel_breadcrumbs_wakeup(struct intel_breadcrumbs *b)
  37 {
  38         struct intel_wait *wait;
  39         unsigned int result = 0;
  40
  41         lockdep_assert_held(&b->irq_lock);
  42
  43         wait = b->irq_wait;
  44         if (wait) {
  45                 /*
  46                  * N.B. Since task_asleep() and ttwu are not atomic, the
  47                  * waiter may actually go to sleep after the check, causing
  48                  * us to suppress a valid wakeup. We prefer to reduce the
  49                  * number of false positive missed_breadcrumb() warnings
  50                  * at the expense of a few false negatives, as it it easy
  51                  * to trigger a false positive under heavy load. Enough
  52                  * signal should remain from genuine missed_breadcrumb()
  53                  * for us to detect in CI.
  54                  */
  55                 bool was_asleep = task_asleep(wait->tsk);
  56
  57                 result = ENGINE_WAKEUP_WAITER;
  58                 if (wake_up_process(wait->tsk) && was_asleep)
  59                         result |= ENGINE_WAKEUP_ASLEEP;
  60         }
  61
  62         return result;
  63 }
  64
  65 unsigned int intel_engine_wakeup(struct intel_engine_cs *engine)
  66 {
  67         struct intel_breadcrumbs *b = &engine->breadcrumbs;
  68         unsigned long flags;
  69         unsigned int result;
  70
  71         spin_lock_irqsave(&b->irq_lock, flags);
  72         result = __intel_breadcrumbs_wakeup(b);
  73         spin_unlock_irqrestore(&b->irq_lock, flags);
  74
  75         return result;
  76 }
  77
  78 static unsigned long wait_timeout(void)
  79 {
  80         return round_jiffies_up(jiffies + DRM_I915_HANGCHECK_JIFFIES);
  81 }
  82
  83 static noinline void missed_breadcrumb(struct intel_engine_cs *engine)
  84 {
  85         if (GEM_SHOW_DEBUG()) {
  86                 struct drm_printer p = drm_debug_printer(__func__);
  87
  88                 intel_engine_dump(engine, &p,
  89                                   "%s missed breadcrumb at %pS\n",
  90                                   engine->name, __builtin_return_address(0));
  91         }
  92
  93         set_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings);
  94 }
  95
  96 static void intel_breadcrumbs_hangcheck(struct timer_list *t)
  97 {
  98         struct intel_engine_cs *engine =
  99                 from_timer(engine, t, breadcrumbs.hangcheck);
 100         struct intel_breadcrumbs *b = &engine->breadcrumbs;
 101         unsigned int irq_count;
 102
 103         if (!b->irq_armed)
 104                 return;
 105
 106         irq_count = READ_ONCE(b->irq_count);
 107         if (b->hangcheck_interrupts != irq_count) {
 108                 b->hangcheck_interrupts = irq_count;
 109                 mod_timer(&b->hangcheck, wait_timeout());
 110                 return;
 111         }
 112
 113         /* We keep the hangcheck timer alive until we disarm the irq, even
 114          * if there are no waiters at present.
 115          *
 116          * If the waiter was currently running, assume it hasn't had a chance
 117          * to process the pending interrupt (e.g, low priority task on a loaded
 118          * system) and wait until it sleeps before declaring a missed interrupt.
 119          *
 120          * If the waiter was asleep (and not even pending a wakeup), then we
 121          * must have missed an interrupt as the GPU has stopped advancing
 122          * but we still have a waiter. Assuming all batches complete within
 123          * DRM_I915_HANGCHECK_JIFFIES [1.5s]!
 124          */
 125         if (intel_engine_wakeup(engine) & ENGINE_WAKEUP_ASLEEP) {
 126                 missed_breadcrumb(engine);
 127                 mod_timer(&b->fake_irq, jiffies + 1);
 128         } else {
 129                 mod_timer(&b->hangcheck, wait_timeout());
 130         }
 131 }
 132
 133 static void intel_breadcrumbs_fake_irq(struct timer_list *t)
 134 {
 135         struct intel_engine_cs *engine =
 136                 from_timer(engine, t, breadcrumbs.fake_irq);
 137         struct intel_breadcrumbs *b = &engine->breadcrumbs;
 138
 139         /*
 140          * The timer persists in case we cannot enable interrupts,
 141          * or if we have previously seen seqno/interrupt incoherency
 142          * ("missed interrupt" syndrome, better known as a "missed breadcrumb").
 143          * Here the worker will wake up every jiffie in order to kick the
 144          * oldest waiter to do the coherent seqno check.
 145          */
 146
 147         spin_lock_irq(&b->irq_lock);
 148         if (b->irq_armed && !__intel_breadcrumbs_wakeup(b))
 149                 __intel_engine_disarm_breadcrumbs(engine);
 150         spin_unlock_irq(&b->irq_lock);
 151         if (!b->irq_armed)
 152                 return;
 153
 154         /* If the user has disabled the fake-irq, restore the hangchecking */
 155         if (!test_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings)) {
 156                 mod_timer(&b->hangcheck, wait_timeout());
 157                 return;
 158         }
 159
 160         mod_timer(&b->fake_irq, jiffies + 1);
 161 }
 162
 163 static void irq_enable(struct intel_engine_cs *engine)
 164 {
 165         /*
 166          * FIXME: Ideally we want this on the API boundary, but for the
 167          * sake of testing with mock breadcrumbs (no HW so unable to
 168          * enable irqs) we place it deep within the bowels, at the point
 169          * of no return.
 170          */
 171         GEM_BUG_ON(!intel_irqs_enabled(engine->i915));
 172
 173         /* Enabling the IRQ may miss the generation of the interrupt, but
 174          * we still need to force the barrier before reading the seqno,
 175          * just in case.
 176          */
 177         set_bit(ENGINE_IRQ_BREADCRUMB, &engine->irq_posted);
 178
 179         /* Caller disables interrupts */
 180         if (engine->irq_enable) {
 181                 spin_lock(&engine->i915->irq_lock);
 182                 engine->irq_enable(engine);
 183                 spin_unlock(&engine->i915->irq_lock);
 184         }
 185 }
 186
 187 static void irq_disable(struct intel_engine_cs *engine)
 188 {
 189         /* Caller disables interrupts */
 190         if (engine->irq_disable) {
 191                 spin_lock(&engine->i915->irq_lock);
 192                 engine->irq_disable(engine);
 193                 spin_unlock(&engine->i915->irq_lock);
 194         }
 195 }
 196
 197 void __intel_engine_disarm_breadcrumbs(struct intel_engine_cs *engine)
 198 {
 199         struct intel_breadcrumbs *b = &engine->breadcrumbs;
 200
 201         lockdep_assert_held(&b->irq_lock);
 202         GEM_BUG_ON(b->irq_wait);
 203         GEM_BUG_ON(!b->irq_armed);
 204
 205         GEM_BUG_ON(!b->irq_enabled);
 206         if (!--b->irq_enabled)
 207                 irq_disable(engine);
 208
 209         b->irq_armed = false;
 210 }
 211
 212 void intel_engine_pin_breadcrumbs_irq(struct intel_engine_cs *engine)
 213 {
 214         struct intel_breadcrumbs *b = &engine->breadcrumbs;
 215
 216         spin_lock_irq(&b->irq_lock);
 217         if (!b->irq_enabled++)
 218                 irq_enable(engine);
 219         GEM_BUG_ON(!b->irq_enabled); /* no overflow! */
 220         spin_unlock_irq(&b->irq_lock);
 221 }
 222
 223 void intel_engine_unpin_breadcrumbs_irq(struct intel_engine_cs *engine)
 224 {
 225         struct intel_breadcrumbs *b = &engine->breadcrumbs;
 226
 227         spin_lock_irq(&b->irq_lock);
 228         GEM_BUG_ON(!b->irq_enabled); /* no underflow! */
 229         if (!--b->irq_enabled)
 230                 irq_disable(engine);
 231         spin_unlock_irq(&b->irq_lock);
 232 }
 233
 234 void intel_engine_disarm_breadcrumbs(struct intel_engine_cs *engine)
 235 {
 236         struct intel_breadcrumbs *b = &engine->breadcrumbs;
 237         struct intel_wait *wait, *n;
 238
 239         if (!b->irq_armed)
 240                 return;
 241
 242         /*
 243          * We only disarm the irq when we are idle (all requests completed),
 244          * so if the bottom-half remains asleep, it missed the request
 245          * completion.
 246          */
 247         if (intel_engine_wakeup(engine) & ENGINE_WAKEUP_ASLEEP)
 248                 missed_breadcrumb(engine);
 249
 250         spin_lock_irq(&b->rb_lock);
 251
 252         spin_lock(&b->irq_lock);
 253         b->irq_wait = NULL;
 254         if (b->irq_armed)
 255                 __intel_engine_disarm_breadcrumbs(engine);
 256         spin_unlock(&b->irq_lock);
 257
 258         rbtree_postorder_for_each_entry_safe(wait, n, &b->waiters, node) {
 259                 GEM_BUG_ON(!intel_engine_signaled(engine, wait->seqno));
 260                 RB_CLEAR_NODE(&wait->node);
 261                 wake_up_process(wait->tsk);
 262         }
 263         b->waiters = RB_ROOT;
 264
 265         spin_unlock_irq(&b->rb_lock);
 266 }
 267
 268 static bool use_fake_irq(const struct intel_breadcrumbs *b)
 269 {
 270         const struct intel_engine_cs *engine =
 271                 container_of(b, struct intel_engine_cs, breadcrumbs);
 272
 273         if (!test_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings))
 274                 return false;
 275
 276         /*
 277          * Only start with the heavy weight fake irq timer if we have not
 278          * seen any interrupts since enabling it the first time. If the
 279          * interrupts are still arriving, it means we made a mistake in our
 280          * engine->seqno_barrier(), a timing error that should be transient
 281          * and unlikely to reoccur.
 282          */
 283         return READ_ONCE(b->irq_count) == b->hangcheck_interrupts;
 284 }
 285
 286 static void enable_fake_irq(struct intel_breadcrumbs *b)
 287 {
 288         /* Ensure we never sleep indefinitely */
 289         if (!b->irq_enabled || use_fake_irq(b))
 290                 mod_timer(&b->fake_irq, jiffies + 1);
 291         else
 292                 mod_timer(&b->hangcheck, wait_timeout());
 293 }
 294
 295 static bool __intel_breadcrumbs_enable_irq(struct intel_breadcrumbs *b)
 296 {
 297         struct intel_engine_cs *engine =
 298                 container_of(b, struct intel_engine_cs, breadcrumbs);
 299         struct drm_i915_private *i915 = engine->i915;
 300         bool enabled;
 301
 302         lockdep_assert_held(&b->irq_lock);
 303         if (b->irq_armed)
 304                 return false;
 305
 306         /* The breadcrumb irq will be disarmed on the interrupt after the
 307          * waiters are signaled. This gives us a single interrupt window in
 308          * which we can add a new waiter and avoid the cost of re-enabling
 309          * the irq.
 310          */
 311         b->irq_armed = true;
 312
 313         if (I915_SELFTEST_ONLY(b->mock)) {
 314                 /* For our mock objects we want to avoid interaction
 315                  * with the real hardware (which is not set up). So
 316                  * we simply pretend we have enabled the powerwell
 317                  * and the irq, and leave it up to the mock
 318                  * implementation to call intel_engine_wakeup()
 319                  * itself when it wants to simulate a user interrupt,
 320                  */
 321                 return true;
 322         }
 323
 324         /* Since we are waiting on a request, the GPU should be busy
 325          * and should have its own rpm reference. This is tracked
 326          * by i915->gt.awake, we can forgo holding our own wakref
 327          * for the interrupt as before i915->gt.awake is released (when
 328          * the driver is idle) we disarm the breadcrumbs.
 329          */
 330
 331         /* No interrupts? Kick the waiter every jiffie! */
 332         enabled = false;
 333         if (!b->irq_enabled++ &&
 334             !test_bit(engine->id, &i915->gpu_error.test_irq_rings)) {
 335                 irq_enable(engine);
 336                 enabled = true;
 337         }
 338
 339         enable_fake_irq(b);
 340         return enabled;
 341 }
 342
 343 static inline struct intel_wait *to_wait(struct rb_node *node)
 344 {
 345         return rb_entry(node, struct intel_wait, node);
 346 }
 347
 348 static inline void __intel_breadcrumbs_finish(struct intel_breadcrumbs *b,
 349                                               struct intel_wait *wait)
 350 {
 351         lockdep_assert_held(&b->rb_lock);
 352         GEM_BUG_ON(b->irq_wait == wait);
 353
 354         /*
 355          * This request is completed, so remove it from the tree, mark it as
 356          * complete, and *then* wake up the associated task. N.B. when the
 357          * task wakes up, it will find the empty rb_node, discern that it
 358          * has already been removed from the tree and skip the serialisation
 359          * of the b->rb_lock and b->irq_lock. This means that the destruction
 360          * of the intel_wait is not serialised with the interrupt handler
 361          * by the waiter - it must instead be serialised by the caller.
 362          */
 363         rb_erase(&wait->node, &b->waiters);
 364         RB_CLEAR_NODE(&wait->node);
 365
 366         if (wait->tsk->state != TASK_RUNNING)
 367                 wake_up_process(wait->tsk); /* implicit smp_wmb() */
 368 }
 369
 370 static inline void __intel_breadcrumbs_next(struct intel_engine_cs *engine,
 371                                             struct rb_node *next)
 372 {
 373         struct intel_breadcrumbs *b = &engine->breadcrumbs;
 374
 375         spin_lock(&b->irq_lock);
 376         GEM_BUG_ON(!b->irq_armed);
 377         GEM_BUG_ON(!b->irq_wait);
 378         b->irq_wait = to_wait(next);
 379         spin_unlock(&b->irq_lock);
 380
 381         /* We always wake up the next waiter that takes over as the bottom-half
 382          * as we may delegate not only the irq-seqno barrier to the next waiter
 383          * but also the task of waking up concurrent waiters.
 384          */
 385         if (next)
 386                 wake_up_process(to_wait(next)->tsk);
 387 }
 388
 389 static bool __intel_engine_add_wait(struct intel_engine_cs *engine,
 390                                     struct intel_wait *wait)
 391 {
 392         struct intel_breadcrumbs *b = &engine->breadcrumbs;
 393         struct rb_node **p, *parent, *completed;
 394         bool first, armed;
 395         u32 seqno;
 396
 397         GEM_BUG_ON(!wait->seqno);
 398
 399         /* Insert the request into the retirement ordered list
 400          * of waiters by walking the rbtree. If we are the oldest
 401          * seqno in the tree (the first to be retired), then
 402          * set ourselves as the bottom-half.
 403          *
 404          * As we descend the tree, prune completed branches since we hold the
 405          * spinlock we know that the first_waiter must be delayed and can
 406          * reduce some of the sequential wake up latency if we take action
 407          * ourselves and wake up the completed tasks in parallel. Also, by
 408          * removing stale elements in the tree, we may be able to reduce the
 409          * ping-pong between the old bottom-half and ourselves as first-waiter.
 410          */
 411         armed = false;
 412         first = true;
 413         parent = NULL;
 414         completed = NULL;
 415         seqno = intel_engine_get_seqno(engine);
 416
 417          /* If the request completed before we managed to grab the spinlock,
 418           * return now before adding ourselves to the rbtree. We let the
 419           * current bottom-half handle any pending wakeups and instead
 420           * try and get out of the way quickly.
 421           */
 422         if (i915_seqno_passed(seqno, wait->seqno)) {
 423                 RB_CLEAR_NODE(&wait->node);
 424                 return first;
 425         }
 426
 427         p = &b->waiters.rb_node;
 428         while (*p) {
 429                 parent = *p;
 430                 if (wait->seqno == to_wait(parent)->seqno) {
 431                         /* We have multiple waiters on the same seqno, select
 432                          * the highest priority task (that with the smallest
 433                          * task->prio) to serve as the bottom-half for this
 434                          * group.
 435                          */
 436                         if (wait->tsk->prio > to_wait(parent)->tsk->prio) {
 437                                 p = &parent->rb_right;
 438                                 first = false;
 439                         } else {
 440                                 p = &parent->rb_left;
 441                         }
 442                 } else if (i915_seqno_passed(wait->seqno,
 443                                              to_wait(parent)->seqno)) {
 444                         p = &parent->rb_right;
 445                         if (i915_seqno_passed(seqno, to_wait(parent)->seqno))
 446                                 completed = parent;
 447                         else
 448                                 first = false;
 449                 } else {
 450                         p = &parent->rb_left;
 451                 }
 452         }
 453         rb_link_node(&wait->node, parent, p);
 454         rb_insert_color(&wait->node, &b->waiters);
 455
 456         if (first) {
 457                 spin_lock(&b->irq_lock);
 458                 b->irq_wait = wait;
 459                 /* After assigning ourselves as the new bottom-half, we must
 460                  * perform a cursory check to prevent a missed interrupt.
 461                  * Either we miss the interrupt whilst programming the hardware,
 462                  * or if there was a previous waiter (for a later seqno) they
 463                  * may be woken instead of us (due to the inherent race
 464                  * in the unlocked read of b->irq_seqno_bh in the irq handler)
 465                  * and so we miss the wake up.
 466                  */
 467                 armed = __intel_breadcrumbs_enable_irq(b);
 468                 spin_unlock(&b->irq_lock);
 469         }
 470
 471         if (completed) {
 472                 /* Advance the bottom-half (b->irq_wait) before we wake up
 473                  * the waiters who may scribble over their intel_wait
 474                  * just as the interrupt handler is dereferencing it via
 475                  * b->irq_wait.
 476                  */
 477                 if (!first) {
 478                         struct rb_node *next = rb_next(completed);
 479                         GEM_BUG_ON(next == &wait->node);
 480                         __intel_breadcrumbs_next(engine, next);
 481                 }
 482
 483                 do {
 484                         struct intel_wait *crumb = to_wait(completed);
 485                         completed = rb_prev(completed);
 486                         __intel_breadcrumbs_finish(b, crumb);
 487                 } while (completed);
 488         }
 489
 490         GEM_BUG_ON(!b->irq_wait);
 491         GEM_BUG_ON(!b->irq_armed);
 492         GEM_BUG_ON(rb_first(&b->waiters) != &b->irq_wait->node);
 493
 494         return armed;
 495 }
 496
 497 bool intel_engine_add_wait(struct intel_engine_cs *engine,
 498                            struct intel_wait *wait)
 499 {
 500         struct intel_breadcrumbs *b = &engine->breadcrumbs;
 501         bool armed;
 502
 503         spin_lock_irq(&b->rb_lock);
 504         armed = __intel_engine_add_wait(engine, wait);
 505         spin_unlock_irq(&b->rb_lock);
 506         if (armed)
 507                 return armed;
 508
 509         /* Make the caller recheck if its request has already started. */
 510         return intel_engine_has_started(engine, wait->seqno);
 511 }
 512
 513 static inline bool chain_wakeup(struct rb_node *rb, int priority)
 514 {
 515         return rb && to_wait(rb)->tsk->prio <= priority;
 516 }
 517
 518 static inline int wakeup_priority(struct intel_breadcrumbs *b,
 519                                   struct task_struct *tsk)
 520 {
 521         if (tsk == b->signaler)
 522                 return INT_MIN;
 523         else
 524                 return tsk->prio;
 525 }
 526
 527 static void __intel_engine_remove_wait(struct intel_engine_cs *engine,
 528                                        struct intel_wait *wait)
 529 {
 530         struct intel_breadcrumbs *b = &engine->breadcrumbs;
 531
 532         lockdep_assert_held(&b->rb_lock);
 533
 534         if (RB_EMPTY_NODE(&wait->node))
 535                 goto out;
 536
 537         if (b->irq_wait == wait) {
 538                 const int priority = wakeup_priority(b, wait->tsk);
 539                 struct rb_node *next;
 540
 541                 /* We are the current bottom-half. Find the next candidate,
 542                  * the first waiter in the queue on the remaining oldest
 543                  * request. As multiple seqnos may complete in the time it
 544                  * takes us to wake up and find the next waiter, we have to
 545                  * wake up that waiter for it to perform its own coherent
 546                  * completion check.
 547                  */
 548                 next = rb_next(&wait->node);
 549                 if (chain_wakeup(next, priority)) {
 550                         /* If the next waiter is already complete,
 551                          * wake it up and continue onto the next waiter. So
 552                          * if have a small herd, they will wake up in parallel
 553                          * rather than sequentially, which should reduce
 554                          * the overall latency in waking all the completed
 555                          * clients.
 556                          *
 557                          * However, waking up a chain adds extra latency to
 558                          * the first_waiter. This is undesirable if that
 559                          * waiter is a high priority task.
 560                          */
 561                         u32 seqno = intel_engine_get_seqno(engine);
 562
 563                         while (i915_seqno_passed(seqno, to_wait(next)->seqno)) {
 564                                 struct rb_node *n = rb_next(next);
 565
 566                                 __intel_breadcrumbs_finish(b, to_wait(next));
 567                                 next = n;
 568                                 if (!chain_wakeup(next, priority))
 569                                         break;
 570                         }
 571                 }
 572
 573                 __intel_breadcrumbs_next(engine, next);
 574         } else {
 575                 GEM_BUG_ON(rb_first(&b->waiters) == &wait->node);
 576         }
 577
 578         GEM_BUG_ON(RB_EMPTY_NODE(&wait->node));
 579         rb_erase(&wait->node, &b->waiters);
 580         RB_CLEAR_NODE(&wait->node);
 581
 582 out:
 583         GEM_BUG_ON(b->irq_wait == wait);
 584         GEM_BUG_ON(rb_first(&b->waiters) !=
 585                    (b->irq_wait ? &b->irq_wait->node : NULL));
 586 }
 587
 588 void intel_engine_remove_wait(struct intel_engine_cs *engine,
 589                               struct intel_wait *wait)
 590 {
 591         struct intel_breadcrumbs *b = &engine->breadcrumbs;
 592
 593         /* Quick check to see if this waiter was already decoupled from
 594          * the tree by the bottom-half to avoid contention on the spinlock
 595          * by the herd.
 596          */
 597         if (RB_EMPTY_NODE(&wait->node)) {
 598                 GEM_BUG_ON(READ_ONCE(b->irq_wait) == wait);
 599                 return;
 600         }
 601
 602         spin_lock_irq(&b->rb_lock);
 603         __intel_engine_remove_wait(engine, wait);
 604         spin_unlock_irq(&b->rb_lock);
 605 }
 606
 607 static void signaler_set_rtpriority(void)
 608 {
 609          struct sched_param param = { .sched_priority = 1 };
 610
 611          sched_setscheduler_nocheck(current, SCHED_FIFO, &param);
 612 }
 613
 614 static int intel_breadcrumbs_signaler(void *arg)
 615 {
 616         struct intel_engine_cs *engine = arg;
 617         struct intel_breadcrumbs *b = &engine->breadcrumbs;
 618         struct i915_request *rq, *n;
 619
 620         /* Install ourselves with high priority to reduce signalling latency */
 621         signaler_set_rtpriority();
 622
 623         do {
 624                 bool do_schedule = true;
 625                 LIST_HEAD(list);
 626                 u32 seqno;
 627
 628                 set_current_state(TASK_INTERRUPTIBLE);
 629                 if (list_empty(&b->signals))
 630                         goto sleep;
 631
 632                 /*
 633                  * We are either woken up by the interrupt bottom-half,
 634                  * or by a client adding a new signaller. In both cases,
 635                  * the GPU seqno may have advanced beyond our oldest signal.
 636                  * If it has, propagate the signal, remove the waiter and
 637                  * check again with the next oldest signal. Otherwise we
 638                  * need to wait for a new interrupt from the GPU or for
 639                  * a new client.
 640                  */
 641                 seqno = intel_engine_get_seqno(engine);
 642
 643                 spin_lock_irq(&b->rb_lock);
 644                 list_for_each_entry_safe(rq, n, &b->signals, signaling.link) {
 645                         u32 this = rq->signaling.wait.seqno;
 646
 647                         GEM_BUG_ON(!rq->signaling.wait.seqno);
 648
 649                         if (!i915_seqno_passed(seqno, this))
 650                                 break;
 651
 652                         if (likely(this == i915_request_global_seqno(rq))) {
 653                                 __intel_engine_remove_wait(engine,
 654                                                            &rq->signaling.wait);
 655
 656                                 rq->signaling.wait.seqno = 0;
 657                                 __list_del_entry(&rq->signaling.link);
 658
 659                                 if (!test_bit(DMA_FENCE_FLAG_SIGNALED_BIT,
 660                                               &rq->fence.flags)) {
 661                                         list_add_tail(&rq->signaling.link,
 662                                                       &list);
 663                                         i915_request_get(rq);
 664                                 }
 665                         }
 666                 }
 667                 spin_unlock_irq(&b->rb_lock);
 668
 669                 if (!list_empty(&list)) {
 670                         local_bh_disable();
 671                         list_for_each_entry_safe(rq, n, &list, signaling.link) {
 672                                 dma_fence_signal(&rq->fence);
 673                                 GEM_BUG_ON(!i915_request_completed(rq));
 674                                 i915_request_put(rq);
 675                         }
 676                         local_bh_enable(); /* kick start the tasklets */
 677
 678                         /*
 679                          * If the engine is saturated we may be continually
 680                          * processing completed requests. This angers the
 681                          * NMI watchdog if we never let anything else
 682                          * have access to the CPU. Let's pretend to be nice
 683                          * and relinquish the CPU if we burn through the
 684                          * entire RT timeslice!
 685                          */
 686                         do_schedule = need_resched();
 687                 }
 688
 689                 if (unlikely(do_schedule)) {
 690                         /* Before we sleep, check for a missed seqno */
 691                         if (current->state & TASK_NORMAL &&
 692                             !list_empty(&b->signals) &&
 693                             engine->irq_seqno_barrier &&
 694                             test_and_clear_bit(ENGINE_IRQ_BREADCRUMB,
 695                                                &engine->irq_posted)) {
 696                                 engine->irq_seqno_barrier(engine);
 697                                 intel_engine_wakeup(engine);
 698                         }
 699
 700 sleep:
 701                         if (kthread_should_park())
 702                                 kthread_parkme();
 703
 704                         if (unlikely(kthread_should_stop()))
 705                                 break;
 706
 707                         schedule();
 708                 }
 709         } while (1);
 710         __set_current_state(TASK_RUNNING);
 711
 712         return 0;
 713 }
 714
 715 static void insert_signal(struct intel_breadcrumbs *b,
 716                           struct i915_request *request,
 717                           const u32 seqno)
 718 {
 719         struct i915_request *iter;
 720
 721         lockdep_assert_held(&b->rb_lock);
 722
 723         /*
 724          * A reasonable assumption is that we are called to add signals
 725          * in sequence, as the requests are submitted for execution and
 726          * assigned a global_seqno. This will be the case for the majority
 727          * of internally generated signals (inter-engine signaling).
 728          *
 729          * Out of order waiters triggering random signaling enabling will
 730          * be more problematic, but hopefully rare enough and the list
 731          * small enough that the O(N) insertion sort is not an issue.
 732          */
 733
 734         list_for_each_entry_reverse(iter, &b->signals, signaling.link)
 735                 if (i915_seqno_passed(seqno, iter->signaling.wait.seqno))
 736                         break;
 737
 738         list_add(&request->signaling.link, &iter->signaling.link);
 739 }
 740
 741 bool intel_engine_enable_signaling(struct i915_request *request, bool wakeup)
 742 {
 743         struct intel_engine_cs *engine = request->engine;
 744         struct intel_breadcrumbs *b = &engine->breadcrumbs;
 745         struct intel_wait *wait = &request->signaling.wait;
 746         u32 seqno;
 747
 748         /*
 749          * Note that we may be called from an interrupt handler on another
 750          * device (e.g. nouveau signaling a fence completion causing us
 751          * to submit a request, and so enable signaling). As such,
 752          * we need to make sure that all other users of b->rb_lock protect
 753          * against interrupts, i.e. use spin_lock_irqsave.
 754          */
 755
 756         /* locked by dma_fence_enable_sw_signaling() (irqsafe fence->lock) */
 757         GEM_BUG_ON(!irqs_disabled());
 758         lockdep_assert_held(&request->lock);
 759
 760         seqno = i915_request_global_seqno(request);
 761         if (!seqno) /* will be enabled later upon execution */
 762                 return true;
 763
 764         GEM_BUG_ON(wait->seqno);
 765         wait->tsk = b->signaler;
 766         wait->request = request;
 767         wait->seqno = seqno;
 768
 769         /*
 770          * Add ourselves into the list of waiters, but registering our
 771          * bottom-half as the signaller thread. As per usual, only the oldest
 772          * waiter (not just signaller) is tasked as the bottom-half waking
 773          * up all completed waiters after the user interrupt.
 774          *
 775          * If we are the oldest waiter, enable the irq (after which we
 776          * must double check that the seqno did not complete).
 777          */
 778         spin_lock(&b->rb_lock);
 779         insert_signal(b, request, seqno);
 780         wakeup &= __intel_engine_add_wait(engine, wait);
 781         spin_unlock(&b->rb_lock);
 782
 783         if (wakeup) {
 784                 wake_up_process(b->signaler);
 785                 return !intel_wait_complete(wait);
 786         }
 787
 788         return true;
 789 }
 790
 791 void intel_engine_cancel_signaling(struct i915_request *request)
 792 {
 793         struct intel_engine_cs *engine = request->engine;
 794         struct intel_breadcrumbs *b = &engine->breadcrumbs;
 795
 796         GEM_BUG_ON(!irqs_disabled());
 797         lockdep_assert_held(&request->lock);
 798
 799         if (!READ_ONCE(request->signaling.wait.seqno))
 800                 return;
 801
 802         spin_lock(&b->rb_lock);
 803         __intel_engine_remove_wait(engine, &request->signaling.wait);
 804         if (fetch_and_zero(&request->signaling.wait.seqno))
 805                 __list_del_entry(&request->signaling.link);
 806         spin_unlock(&b->rb_lock);
 807 }
 808
 809 int intel_engine_init_breadcrumbs(struct intel_engine_cs *engine)
 810 {
 811         struct intel_breadcrumbs *b = &engine->breadcrumbs;
 812         struct task_struct *tsk;
 813
 814         spin_lock_init(&b->rb_lock);
 815         spin_lock_init(&b->irq_lock);
 816
 817         timer_setup(&b->fake_irq, intel_breadcrumbs_fake_irq, 0);
 818         timer_setup(&b->hangcheck, intel_breadcrumbs_hangcheck, 0);
 819
 820         INIT_LIST_HEAD(&b->signals);
 821
 822         /* Spawn a thread to provide a common bottom-half for all signals.
 823          * As this is an asynchronous interface we cannot steal the current
 824          * task for handling the bottom-half to the user interrupt, therefore
 825          * we create a thread to do the coherent seqno dance after the
 826          * interrupt and then signal the waitqueue (via the dma-buf/fence).
 827          */
 828         tsk = kthread_run(intel_breadcrumbs_signaler, engine,
 829                           "i915/signal:%d", engine->id);
 830         if (IS_ERR(tsk))
 831                 return PTR_ERR(tsk);
 832
 833         b->signaler = tsk;
 834
 835         return 0;
 836 }
 837
 838 static void cancel_fake_irq(struct intel_engine_cs *engine)
 839 {
 840         struct intel_breadcrumbs *b = &engine->breadcrumbs;
 841
 842         del_timer_sync(&b->fake_irq); /* may queue b->hangcheck */
 843         del_timer_sync(&b->hangcheck);
 844         clear_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings);
 845 }
 846
 847 void intel_engine_reset_breadcrumbs(struct intel_engine_cs *engine)
 848 {
 849         struct intel_breadcrumbs *b = &engine->breadcrumbs;
 850         unsigned long flags;
 851
 852         spin_lock_irqsave(&b->irq_lock, flags);
 853
 854         /*
 855          * Leave the fake_irq timer enabled (if it is running), but clear the
 856          * bit so that it turns itself off on its next wake up and goes back
 857          * to the long hangcheck interval if still required.
 858          */
 859         clear_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings);
 860
 861         if (b->irq_enabled)
 862                 irq_enable(engine);
 863         else
 864                 irq_disable(engine);
 865
 866         /*
 867          * We set the IRQ_BREADCRUMB bit when we enable the irq presuming the
 868          * GPU is active and may have already executed the MI_USER_INTERRUPT
 869          * before the CPU is ready to receive. However, the engine is currently
 870          * idle (we haven't started it yet), there is no possibility for a
 871          * missed interrupt as we enabled the irq and so we can clear the
 872          * immediate wakeup (until a real interrupt arrives for the waiter).
 873          */
 874         clear_bit(ENGINE_IRQ_BREADCRUMB, &engine->irq_posted);
 875
 876         spin_unlock_irqrestore(&b->irq_lock, flags);
 877 }
 878
 879 void intel_engine_fini_breadcrumbs(struct intel_engine_cs *engine)
 880 {
 881         struct intel_breadcrumbs *b = &engine->breadcrumbs;
 882
 883         /* The engines should be idle and all requests accounted for! */
 884         WARN_ON(READ_ONCE(b->irq_wait));
 885         WARN_ON(!RB_EMPTY_ROOT(&b->waiters));
 886         WARN_ON(!list_empty(&b->signals));
 887
 888         if (!IS_ERR_OR_NULL(b->signaler))
 889                 kthread_stop(b->signaler);
 890
 891         cancel_fake_irq(engine);
 892 }
 893
 894 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
 895 #include "selftests/intel_breadcrumbs.c"
 896 #endif