drivers/gpu/drm/i915/display/intel_sdvo.c

   1 /*
   2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright © 2006-2007 Intel Corporation
   4  *   Jesse Barnes <jesse.barnes@intel.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23  * DEALINGS IN THE SOFTWARE.
  24  *
  25  * Authors:
  26  *      Eric Anholt <eric@anholt.net>
  27  */
  28
  29 #include <linux/delay.h>
  30 #include <linux/export.h>
  31 #include <linux/i2c.h>
  32 #include <linux/slab.h>
  33
  34 #include <drm/drm_atomic_helper.h>
  35 #include <drm/drm_crtc.h>
  36 #include <drm/drm_edid.h>
  37 #include <drm/i915_drm.h>
  38
  39 #include "i915_drv.h"
  40 #include "intel_atomic.h"
  41 #include "intel_connector.h"
  42 #include "intel_drv.h"
  43 #include "intel_fifo_underrun.h"
  44 #include "intel_gmbus.h"
  45 #include "intel_hdmi.h"
  46 #include "intel_hotplug.h"
  47 #include "intel_panel.h"
  48 #include "intel_sdvo.h"
  49 #include "intel_sdvo_regs.h"
  50
  51 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  52 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  53 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  54 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
  55
  56 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  57                         SDVO_TV_MASK)
  58
  59 #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
  60 #define IS_TMDS(c)      (c->output_flag & SDVO_TMDS_MASK)
  61 #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
  62 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  63 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  64
  65
  66 static const char * const tv_format_names[] = {
  67         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
  68         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
  69         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
  70         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
  71         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
  72         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
  73         "SECAM_60"
  74 };
  75
  76 #define TV_FORMAT_NUM  ARRAY_SIZE(tv_format_names)
  77
  78 struct intel_sdvo {
  79         struct intel_encoder base;
  80
  81         struct i2c_adapter *i2c;
  82         u8 slave_addr;
  83
  84         struct i2c_adapter ddc;
  85
  86         /* Register for the SDVO device: SDVOB or SDVOC */
  87         i915_reg_t sdvo_reg;
  88
  89         /* Active outputs controlled by this SDVO output */
  90         u16 controlled_output;
  91
  92         /*
  93          * Capabilities of the SDVO device returned by
  94          * intel_sdvo_get_capabilities()
  95          */
  96         struct intel_sdvo_caps caps;
  97
  98         /* Pixel clock limitations reported by the SDVO device, in kHz */
  99         int pixel_clock_min, pixel_clock_max;
 100
 101         /*
 102         * For multiple function SDVO device,
 103         * this is for current attached outputs.
 104         */
 105         u16 attached_output;
 106
 107         /*
 108          * Hotplug activation bits for this device
 109          */
 110         u16 hotplug_active;
 111
 112         enum port port;
 113
 114         bool has_hdmi_monitor;
 115         bool has_hdmi_audio;
 116
 117         /* DDC bus used by this SDVO encoder */
 118         u8 ddc_bus;
 119
 120         /*
 121          * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
 122          */
 123         u8 dtd_sdvo_flags;
 124 };
 125
 126 struct intel_sdvo_connector {
 127         struct intel_connector base;
 128
 129         /* Mark the type of connector */
 130         u16 output_flag;
 131
 132         /* This contains all current supported TV format */
 133         u8 tv_format_supported[TV_FORMAT_NUM];
 134         int   format_supported_num;
 135         struct drm_property *tv_format;
 136
 137         /* add the property for the SDVO-TV */
 138         struct drm_property *left;
 139         struct drm_property *right;
 140         struct drm_property *top;
 141         struct drm_property *bottom;
 142         struct drm_property *hpos;
 143         struct drm_property *vpos;
 144         struct drm_property *contrast;
 145         struct drm_property *saturation;
 146         struct drm_property *hue;
 147         struct drm_property *sharpness;
 148         struct drm_property *flicker_filter;
 149         struct drm_property *flicker_filter_adaptive;
 150         struct drm_property *flicker_filter_2d;
 151         struct drm_property *tv_chroma_filter;
 152         struct drm_property *tv_luma_filter;
 153         struct drm_property *dot_crawl;
 154
 155         /* add the property for the SDVO-TV/LVDS */
 156         struct drm_property *brightness;
 157
 158         /* this is to get the range of margin.*/
 159         u32 max_hscan, max_vscan;
 160
 161         /**
 162          * This is set if we treat the device as HDMI, instead of DVI.
 163          */
 164         bool is_hdmi;
 165 };
 166
 167 struct intel_sdvo_connector_state {
 168         /* base.base: tv.saturation/contrast/hue/brightness */
 169         struct intel_digital_connector_state base;
 170
 171         struct {
 172                 unsigned overscan_h, overscan_v, hpos, vpos, sharpness;
 173                 unsigned flicker_filter, flicker_filter_2d, flicker_filter_adaptive;
 174                 unsigned chroma_filter, luma_filter, dot_crawl;
 175         } tv;
 176 };
 177
 178 static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder)
 179 {
 180         return container_of(encoder, struct intel_sdvo, base);
 181 }
 182
 183 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
 184 {
 185         return to_sdvo(intel_attached_encoder(connector));
 186 }
 187
 188 static struct intel_sdvo_connector *
 189 to_intel_sdvo_connector(struct drm_connector *connector)
 190 {
 191         return container_of(connector, struct intel_sdvo_connector, base.base);
 192 }
 193
 194 #define to_intel_sdvo_connector_state(conn_state) \
 195         container_of((conn_state), struct intel_sdvo_connector_state, base.base)
 196
 197 static bool
 198 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, u16 flags);
 199 static bool
 200 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
 201                               struct intel_sdvo_connector *intel_sdvo_connector,
 202                               int type);
 203 static bool
 204 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
 205                                    struct intel_sdvo_connector *intel_sdvo_connector);
 206
 207 /*
 208  * Writes the SDVOB or SDVOC with the given value, but always writes both
 209  * SDVOB and SDVOC to work around apparent hardware issues (according to
 210  * comments in the BIOS).
 211  */
 212 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
 213 {
 214         struct drm_device *dev = intel_sdvo->base.base.dev;
 215         struct drm_i915_private *dev_priv = to_i915(dev);
 216         u32 bval = val, cval = val;
 217         int i;
 218
 219         if (HAS_PCH_SPLIT(dev_priv)) {
 220                 I915_WRITE(intel_sdvo->sdvo_reg, val);
 221                 POSTING_READ(intel_sdvo->sdvo_reg);
 222                 /*
 223                  * HW workaround, need to write this twice for issue
 224                  * that may result in first write getting masked.
 225                  */
 226                 if (HAS_PCH_IBX(dev_priv)) {
 227                         I915_WRITE(intel_sdvo->sdvo_reg, val);
 228                         POSTING_READ(intel_sdvo->sdvo_reg);
 229                 }
 230                 return;
 231         }
 232
 233         if (intel_sdvo->port == PORT_B)
 234                 cval = I915_READ(GEN3_SDVOC);
 235         else
 236                 bval = I915_READ(GEN3_SDVOB);
 237
 238         /*
 239          * Write the registers twice for luck. Sometimes,
 240          * writing them only once doesn't appear to 'stick'.
 241          * The BIOS does this too. Yay, magic
 242          */
 243         for (i = 0; i < 2; i++) {
 244                 I915_WRITE(GEN3_SDVOB, bval);
 245                 POSTING_READ(GEN3_SDVOB);
 246
 247                 I915_WRITE(GEN3_SDVOC, cval);
 248                 POSTING_READ(GEN3_SDVOC);
 249         }
 250 }
 251
 252 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
 253 {
 254         struct i2c_msg msgs[] = {
 255                 {
 256                         .addr = intel_sdvo->slave_addr,
 257                         .flags = 0,
 258                         .len = 1,
 259                         .buf = &addr,
 260                 },
 261                 {
 262                         .addr = intel_sdvo->slave_addr,
 263                         .flags = I2C_M_RD,
 264                         .len = 1,
 265                         .buf = ch,
 266                 }
 267         };
 268         int ret;
 269
 270         if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
 271                 return true;
 272
 273         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
 274         return false;
 275 }
 276
 277 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
 278 /** Mapping of command numbers to names, for debug output */
 279 static const struct _sdvo_cmd_name {
 280         u8 cmd;
 281         const char *name;
 282 } __attribute__ ((packed)) sdvo_cmd_names[] = {
 283         SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
 284         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
 285         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
 286         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
 287         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
 288         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
 289         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
 290         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
 291         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
 292         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
 293         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
 294         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
 295         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
 296         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
 297         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
 298         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
 299         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
 300         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 301         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
 302         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 303         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
 304         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
 305         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
 306         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
 307         SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
 308         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
 309         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
 310         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
 311         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
 312         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
 313         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
 314         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
 315         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
 316         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
 317         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
 318         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
 319         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
 320         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
 321         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
 322         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
 323         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
 324         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
 325         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
 326
 327         /* Add the op code for SDVO enhancements */
 328         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
 329         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
 330         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
 331         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
 332         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
 333         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
 334         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
 335         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
 336         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
 337         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
 338         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
 339         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
 340         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
 341         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
 342         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
 343         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
 344         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
 345         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
 346         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
 347         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
 348         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
 349         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
 350         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
 351         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
 352         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
 353         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
 354         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
 355         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
 356         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
 357         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
 358         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
 359         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
 360         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
 361         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
 362         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
 363         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
 364         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
 365         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
 366         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
 367         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
 368         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
 369         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
 370         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
 371         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
 372
 373         /* HDMI op code */
 374         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
 375         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
 376         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
 377         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
 378         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
 379         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
 380         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
 381         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
 382         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
 383         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
 384         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
 385         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
 386         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
 387         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
 388         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
 389         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
 390         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
 391         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
 392         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
 393         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
 394 };
 395
 396 #define SDVO_NAME(svdo) ((svdo)->port == PORT_B ? "SDVOB" : "SDVOC")
 397
 398 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
 399                                    const void *args, int args_len)
 400 {
 401         int i, pos = 0;
 402 #define BUF_LEN 256
 403         char buffer[BUF_LEN];
 404
 405 #define BUF_PRINT(args...) \
 406         pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
 407
 408
 409         for (i = 0; i < args_len; i++) {
 410                 BUF_PRINT("%02X ", ((u8 *)args)[i]);
 411         }
 412         for (; i < 8; i++) {
 413                 BUF_PRINT("   ");
 414         }
 415         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
 416                 if (cmd == sdvo_cmd_names[i].cmd) {
 417                         BUF_PRINT("(%s)", sdvo_cmd_names[i].name);
 418                         break;
 419                 }
 420         }
 421         if (i == ARRAY_SIZE(sdvo_cmd_names)) {
 422                 BUF_PRINT("(%02X)", cmd);
 423         }
 424         BUG_ON(pos >= BUF_LEN - 1);
 425 #undef BUF_PRINT
 426 #undef BUF_LEN
 427
 428         DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer);
 429 }
 430
 431 static const char * const cmd_status_names[] = {
 432         "Power on",
 433         "Success",
 434         "Not supported",
 435         "Invalid arg",
 436         "Pending",
 437         "Target not specified",
 438         "Scaling not supported"
 439 };
 440
 441 static bool __intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 442                                    const void *args, int args_len,
 443                                    bool unlocked)
 444 {
 445         u8 *buf, status;
 446         struct i2c_msg *msgs;
 447         int i, ret = true;
 448
 449         /* Would be simpler to allocate both in one go ? */
 450         buf = kzalloc(args_len * 2 + 2, GFP_KERNEL);
 451         if (!buf)
 452                 return false;
 453
 454         msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
 455         if (!msgs) {
 456                 kfree(buf);
 457                 return false;
 458         }
 459
 460         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
 461
 462         for (i = 0; i < args_len; i++) {
 463                 msgs[i].addr = intel_sdvo->slave_addr;
 464                 msgs[i].flags = 0;
 465                 msgs[i].len = 2;
 466                 msgs[i].buf = buf + 2 *i;
 467                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
 468                 buf[2*i + 1] = ((u8*)args)[i];
 469         }
 470         msgs[i].addr = intel_sdvo->slave_addr;
 471         msgs[i].flags = 0;
 472         msgs[i].len = 2;
 473         msgs[i].buf = buf + 2*i;
 474         buf[2*i + 0] = SDVO_I2C_OPCODE;
 475         buf[2*i + 1] = cmd;
 476
 477         /* the following two are to read the response */
 478         status = SDVO_I2C_CMD_STATUS;
 479         msgs[i+1].addr = intel_sdvo->slave_addr;
 480         msgs[i+1].flags = 0;
 481         msgs[i+1].len = 1;
 482         msgs[i+1].buf = &status;
 483
 484         msgs[i+2].addr = intel_sdvo->slave_addr;
 485         msgs[i+2].flags = I2C_M_RD;
 486         msgs[i+2].len = 1;
 487         msgs[i+2].buf = &status;
 488
 489         if (unlocked)
 490                 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 491         else
 492                 ret = __i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 493         if (ret < 0) {
 494                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
 495                 ret = false;
 496                 goto out;
 497         }
 498         if (ret != i+3) {
 499                 /* failure in I2C transfer */
 500                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
 501                 ret = false;
 502         }
 503
 504 out:
 505         kfree(msgs);
 506         kfree(buf);
 507         return ret;
 508 }
 509
 510 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 511                                  const void *args, int args_len)
 512 {
 513         return __intel_sdvo_write_cmd(intel_sdvo, cmd, args, args_len, true);
 514 }
 515
 516 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
 517                                      void *response, int response_len)
 518 {
 519         u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
 520         u8 status;
 521         int i, pos = 0;
 522 #define BUF_LEN 256
 523         char buffer[BUF_LEN];
 524
 525         buffer[0] = '\0';
 526
 527         /*
 528          * The documentation states that all commands will be
 529          * processed within 15µs, and that we need only poll
 530          * the status byte a maximum of 3 times in order for the
 531          * command to be complete.
 532          *
 533          * Check 5 times in case the hardware failed to read the docs.
 534          *
 535          * Also beware that the first response by many devices is to
 536          * reply PENDING and stall for time. TVs are notorious for
 537          * requiring longer than specified to complete their replies.
 538          * Originally (in the DDX long ago), the delay was only ever 15ms
 539          * with an additional delay of 30ms applied for TVs added later after
 540          * many experiments. To accommodate both sets of delays, we do a
 541          * sequence of slow checks if the device is falling behind and fails
 542          * to reply within 5*15µs.
 543          */
 544         if (!intel_sdvo_read_byte(intel_sdvo,
 545                                   SDVO_I2C_CMD_STATUS,
 546                                   &status))
 547                 goto log_fail;
 548
 549         while ((status == SDVO_CMD_STATUS_PENDING ||
 550                 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) {
 551                 if (retry < 10)
 552                         msleep(15);
 553                 else
 554                         udelay(15);
 555
 556                 if (!intel_sdvo_read_byte(intel_sdvo,
 557                                           SDVO_I2C_CMD_STATUS,
 558                                           &status))
 559                         goto log_fail;
 560         }
 561
 562 #define BUF_PRINT(args...) \
 563         pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
 564
 565         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
 566                 BUF_PRINT("(%s)", cmd_status_names[status]);
 567         else
 568                 BUF_PRINT("(??? %d)", status);
 569
 570         if (status != SDVO_CMD_STATUS_SUCCESS)
 571                 goto log_fail;
 572
 573         /* Read the command response */
 574         for (i = 0; i < response_len; i++) {
 575                 if (!intel_sdvo_read_byte(intel_sdvo,
 576                                           SDVO_I2C_RETURN_0 + i,
 577                                           &((u8 *)response)[i]))
 578                         goto log_fail;
 579                 BUF_PRINT(" %02X", ((u8 *)response)[i]);
 580         }
 581         BUG_ON(pos >= BUF_LEN - 1);
 582 #undef BUF_PRINT
 583 #undef BUF_LEN
 584
 585         DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer);
 586         return true;
 587
 588 log_fail:
 589         DRM_DEBUG_KMS("%s: R: ... failed %s\n",
 590                       SDVO_NAME(intel_sdvo), buffer);
 591         return false;
 592 }
 593
 594 static int intel_sdvo_get_pixel_multiplier(const struct drm_display_mode *adjusted_mode)
 595 {
 596         if (adjusted_mode->crtc_clock >= 100000)
 597                 return 1;
 598         else if (adjusted_mode->crtc_clock >= 50000)
 599                 return 2;
 600         else
 601                 return 4;
 602 }
 603
 604 static bool __intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
 605                                                 u8 ddc_bus)
 606 {
 607         /* This must be the immediately preceding write before the i2c xfer */
 608         return __intel_sdvo_write_cmd(intel_sdvo,
 609                                       SDVO_CMD_SET_CONTROL_BUS_SWITCH,
 610                                       &ddc_bus, 1, false);
 611 }
 612
 613 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
 614 {
 615         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
 616                 return false;
 617
 618         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
 619 }
 620
 621 static bool
 622 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
 623 {
 624         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
 625                 return false;
 626
 627         return intel_sdvo_read_response(intel_sdvo, value, len);
 628 }
 629
 630 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
 631 {
 632         struct intel_sdvo_set_target_input_args targets = {0};
 633         return intel_sdvo_set_value(intel_sdvo,
 634                                     SDVO_CMD_SET_TARGET_INPUT,
 635                                     &targets, sizeof(targets));
 636 }
 637
 638 /*
 639  * Return whether each input is trained.
 640  *
 641  * This function is making an assumption about the layout of the response,
 642  * which should be checked against the docs.
 643  */
 644 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
 645 {
 646         struct intel_sdvo_get_trained_inputs_response response;
 647
 648         BUILD_BUG_ON(sizeof(response) != 1);
 649         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
 650                                   &response, sizeof(response)))
 651                 return false;
 652
 653         *input_1 = response.input0_trained;
 654         *input_2 = response.input1_trained;
 655         return true;
 656 }
 657
 658 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
 659                                           u16 outputs)
 660 {
 661         return intel_sdvo_set_value(intel_sdvo,
 662                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
 663                                     &outputs, sizeof(outputs));
 664 }
 665
 666 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
 667                                           u16 *outputs)
 668 {
 669         return intel_sdvo_get_value(intel_sdvo,
 670                                     SDVO_CMD_GET_ACTIVE_OUTPUTS,
 671                                     outputs, sizeof(*outputs));
 672 }
 673
 674 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
 675                                                int mode)
 676 {
 677         u8 state = SDVO_ENCODER_STATE_ON;
 678
 679         switch (mode) {
 680         case DRM_MODE_DPMS_ON:
 681                 state = SDVO_ENCODER_STATE_ON;
 682                 break;
 683         case DRM_MODE_DPMS_STANDBY:
 684                 state = SDVO_ENCODER_STATE_STANDBY;
 685                 break;
 686         case DRM_MODE_DPMS_SUSPEND:
 687                 state = SDVO_ENCODER_STATE_SUSPEND;
 688                 break;
 689         case DRM_MODE_DPMS_OFF:
 690                 state = SDVO_ENCODER_STATE_OFF;
 691                 break;
 692         }
 693
 694         return intel_sdvo_set_value(intel_sdvo,
 695                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
 696 }
 697
 698 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
 699                                                    int *clock_min,
 700                                                    int *clock_max)
 701 {
 702         struct intel_sdvo_pixel_clock_range clocks;
 703
 704         BUILD_BUG_ON(sizeof(clocks) != 4);
 705         if (!intel_sdvo_get_value(intel_sdvo,
 706                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
 707                                   &clocks, sizeof(clocks)))
 708                 return false;
 709
 710         /* Convert the values from units of 10 kHz to kHz. */
 711         *clock_min = clocks.min * 10;
 712         *clock_max = clocks.max * 10;
 713         return true;
 714 }
 715
 716 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
 717                                          u16 outputs)
 718 {
 719         return intel_sdvo_set_value(intel_sdvo,
 720                                     SDVO_CMD_SET_TARGET_OUTPUT,
 721                                     &outputs, sizeof(outputs));
 722 }
 723
 724 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 725                                   struct intel_sdvo_dtd *dtd)
 726 {
 727         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 728                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 729 }
 730
 731 static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 732                                   struct intel_sdvo_dtd *dtd)
 733 {
 734         return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 735                 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 736 }
 737
 738 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
 739                                          struct intel_sdvo_dtd *dtd)
 740 {
 741         return intel_sdvo_set_timing(intel_sdvo,
 742                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
 743 }
 744
 745 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
 746                                          struct intel_sdvo_dtd *dtd)
 747 {
 748         return intel_sdvo_set_timing(intel_sdvo,
 749                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
 750 }
 751
 752 static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo,
 753                                         struct intel_sdvo_dtd *dtd)
 754 {
 755         return intel_sdvo_get_timing(intel_sdvo,
 756                                      SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd);
 757 }
 758
 759 static bool
 760 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 761                                          struct intel_sdvo_connector *intel_sdvo_connector,
 762                                          u16 clock,
 763                                          u16 width,
 764                                          u16 height)
 765 {
 766         struct intel_sdvo_preferred_input_timing_args args;
 767
 768         memset(&args, 0, sizeof(args));
 769         args.clock = clock;
 770         args.width = width;
 771         args.height = height;
 772         args.interlace = 0;
 773
 774         if (IS_LVDS(intel_sdvo_connector)) {
 775                 const struct drm_display_mode *fixed_mode =
 776                         intel_sdvo_connector->base.panel.fixed_mode;
 777
 778                 if (fixed_mode->hdisplay != width ||
 779                     fixed_mode->vdisplay != height)
 780                         args.scaled = 1;
 781         }
 782
 783         return intel_sdvo_set_value(intel_sdvo,
 784                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
 785                                     &args, sizeof(args));
 786 }
 787
 788 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 789                                                   struct intel_sdvo_dtd *dtd)
 790 {
 791         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
 792         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
 793         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
 794                                     &dtd->part1, sizeof(dtd->part1)) &&
 795                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
 796                                      &dtd->part2, sizeof(dtd->part2));
 797 }
 798
 799 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
 800 {
 801         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
 802 }
 803
 804 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
 805                                          const struct drm_display_mode *mode)
 806 {
 807         u16 width, height;
 808         u16 h_blank_len, h_sync_len, v_blank_len, v_sync_len;
 809         u16 h_sync_offset, v_sync_offset;
 810         int mode_clock;
 811
 812         memset(dtd, 0, sizeof(*dtd));
 813
 814         width = mode->hdisplay;
 815         height = mode->vdisplay;
 816
 817         /* do some mode translations */
 818         h_blank_len = mode->htotal - mode->hdisplay;
 819         h_sync_len = mode->hsync_end - mode->hsync_start;
 820
 821         v_blank_len = mode->vtotal - mode->vdisplay;
 822         v_sync_len = mode->vsync_end - mode->vsync_start;
 823
 824         h_sync_offset = mode->hsync_start - mode->hdisplay;
 825         v_sync_offset = mode->vsync_start - mode->vdisplay;
 826
 827         mode_clock = mode->clock;
 828         mode_clock /= 10;
 829         dtd->part1.clock = mode_clock;
 830
 831         dtd->part1.h_active = width & 0xff;
 832         dtd->part1.h_blank = h_blank_len & 0xff;
 833         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
 834                 ((h_blank_len >> 8) & 0xf);
 835         dtd->part1.v_active = height & 0xff;
 836         dtd->part1.v_blank = v_blank_len & 0xff;
 837         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
 838                 ((v_blank_len >> 8) & 0xf);
 839
 840         dtd->part2.h_sync_off = h_sync_offset & 0xff;
 841         dtd->part2.h_sync_width = h_sync_len & 0xff;
 842         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
 843                 (v_sync_len & 0xf);
 844         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
 845                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
 846                 ((v_sync_len & 0x30) >> 4);
 847
 848         dtd->part2.dtd_flags = 0x18;
 849         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
 850                 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
 851         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 852                 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
 853         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 854                 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
 855
 856         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
 857 }
 858
 859 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode,
 860                                          const struct intel_sdvo_dtd *dtd)
 861 {
 862         struct drm_display_mode mode = {};
 863
 864         mode.hdisplay = dtd->part1.h_active;
 865         mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
 866         mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off;
 867         mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
 868         mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width;
 869         mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
 870         mode.htotal = mode.hdisplay + dtd->part1.h_blank;
 871         mode.htotal += (dtd->part1.h_high & 0xf) << 8;
 872
 873         mode.vdisplay = dtd->part1.v_active;
 874         mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
 875         mode.vsync_start = mode.vdisplay;
 876         mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
 877         mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
 878         mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0;
 879         mode.vsync_end = mode.vsync_start +
 880                 (dtd->part2.v_sync_off_width & 0xf);
 881         mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
 882         mode.vtotal = mode.vdisplay + dtd->part1.v_blank;
 883         mode.vtotal += (dtd->part1.v_high & 0xf) << 8;
 884
 885         mode.clock = dtd->part1.clock * 10;
 886
 887         if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
 888                 mode.flags |= DRM_MODE_FLAG_INTERLACE;
 889         if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
 890                 mode.flags |= DRM_MODE_FLAG_PHSYNC;
 891         else
 892                 mode.flags |= DRM_MODE_FLAG_NHSYNC;
 893         if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
 894                 mode.flags |= DRM_MODE_FLAG_PVSYNC;
 895         else
 896                 mode.flags |= DRM_MODE_FLAG_NVSYNC;
 897
 898         drm_mode_set_crtcinfo(&mode, 0);
 899
 900         drm_mode_copy(pmode, &mode);
 901 }
 902
 903 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
 904 {
 905         struct intel_sdvo_encode encode;
 906
 907         BUILD_BUG_ON(sizeof(encode) != 2);
 908         return intel_sdvo_get_value(intel_sdvo,
 909                                   SDVO_CMD_GET_SUPP_ENCODE,
 910                                   &encode, sizeof(encode));
 911 }
 912
 913 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
 914                                   u8 mode)
 915 {
 916         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
 917 }
 918
 919 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
 920                                        u8 mode)
 921 {
 922         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
 923 }
 924
 925 static bool intel_sdvo_set_audio_state(struct intel_sdvo *intel_sdvo,
 926                                        u8 audio_state)
 927 {
 928         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_AUDIO_STAT,
 929                                     &audio_state, 1);
 930 }
 931
 932 #if 0
 933 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
 934 {
 935         int i, j;
 936         u8 set_buf_index[2];
 937         u8 av_split;
 938         u8 buf_size;
 939         u8 buf[48];
 940         u8 *pos;
 941
 942         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
 943
 944         for (i = 0; i <= av_split; i++) {
 945                 set_buf_index[0] = i; set_buf_index[1] = 0;
 946                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
 947                                      set_buf_index, 2);
 948                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
 949                 intel_sdvo_read_response(encoder, &buf_size, 1);
 950
 951                 pos = buf;
 952                 for (j = 0; j <= buf_size; j += 8) {
 953                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
 954                                              NULL, 0);
 955                         intel_sdvo_read_response(encoder, pos, 8);
 956                         pos += 8;
 957                 }
 958         }
 959 }
 960 #endif
 961
 962 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
 963                                        unsigned int if_index, u8 tx_rate,
 964                                        const u8 *data, unsigned int length)
 965 {
 966         u8 set_buf_index[2] = { if_index, 0 };
 967         u8 hbuf_size, tmp[8];
 968         int i;
 969
 970         if (!intel_sdvo_set_value(intel_sdvo,
 971                                   SDVO_CMD_SET_HBUF_INDEX,
 972                                   set_buf_index, 2))
 973                 return false;
 974
 975         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
 976                                   &hbuf_size, 1))
 977                 return false;
 978
 979         /* Buffer size is 0 based, hooray! */
 980         hbuf_size++;
 981
 982         DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
 983                       if_index, length, hbuf_size);
 984
 985         if (hbuf_size < length)
 986                 return false;
 987
 988         for (i = 0; i < hbuf_size; i += 8) {
 989                 memset(tmp, 0, 8);
 990                 if (i < length)
 991                         memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
 992
 993                 if (!intel_sdvo_set_value(intel_sdvo,
 994                                           SDVO_CMD_SET_HBUF_DATA,
 995                                           tmp, 8))
 996                         return false;
 997         }
 998
 999         return intel_sdvo_set_value(intel_sdvo,
1000                                     SDVO_CMD_SET_HBUF_TXRATE,
1001                                     &tx_rate, 1);
1002 }
1003
1004 static ssize_t intel_sdvo_read_infoframe(struct intel_sdvo *intel_sdvo,
1005                                          unsigned int if_index,
1006                                          u8 *data, unsigned int length)
1007 {
1008         u8 set_buf_index[2] = { if_index, 0 };
1009         u8 hbuf_size, tx_rate, av_split;
1010         int i;
1011
1012         if (!intel_sdvo_get_value(intel_sdvo,
1013                                   SDVO_CMD_GET_HBUF_AV_SPLIT,
1014                                   &av_split, 1))
1015                 return -ENXIO;
1016
1017         if (av_split < if_index)
1018                 return 0;
1019
1020         if (!intel_sdvo_set_value(intel_sdvo,
1021                                   SDVO_CMD_SET_HBUF_INDEX,
1022                                   set_buf_index, 2))
1023                 return -ENXIO;
1024
1025         if (!intel_sdvo_get_value(intel_sdvo,
1026                                   SDVO_CMD_GET_HBUF_TXRATE,
1027                                   &tx_rate, 1))
1028                 return -ENXIO;
1029
1030         if (tx_rate == SDVO_HBUF_TX_DISABLED)
1031                 return 0;
1032
1033         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
1034                                   &hbuf_size, 1))
1035                 return -ENXIO;
1036
1037         /* Buffer size is 0 based, hooray! */
1038         hbuf_size++;
1039
1040         DRM_DEBUG_KMS("reading sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
1041                       if_index, length, hbuf_size);
1042
1043         hbuf_size = min_t(unsigned int, length, hbuf_size);
1044
1045         for (i = 0; i < hbuf_size; i += 8) {
1046                 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HBUF_DATA, NULL, 0))
1047                         return -ENXIO;
1048                 if (!intel_sdvo_read_response(intel_sdvo, &data[i],
1049                                               min_t(unsigned int, 8, hbuf_size - i)))
1050                         return -ENXIO;
1051         }
1052
1053         return hbuf_size;
1054 }
1055
1056 static bool intel_sdvo_compute_avi_infoframe(struct intel_sdvo *intel_sdvo,
1057                                              struct intel_crtc_state *crtc_state,
1058                                              struct drm_connector_state *conn_state)
1059 {
1060         struct hdmi_avi_infoframe *frame = &crtc_state->infoframes.avi.avi;
1061         const struct drm_display_mode *adjusted_mode =
1062                 &crtc_state->base.adjusted_mode;
1063         int ret;
1064
1065         if (!crtc_state->has_hdmi_sink)
1066                 return true;
1067
1068         crtc_state->infoframes.enable |=
1069                 intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI);
1070
1071         ret = drm_hdmi_avi_infoframe_from_display_mode(frame,
1072                                                        conn_state->connector,
1073                                                        adjusted_mode);
1074         if (ret)
1075                 return false;
1076
1077         drm_hdmi_avi_infoframe_quant_range(frame,
1078                                            conn_state->connector,
1079                                            adjusted_mode,
1080                                            crtc_state->limited_color_range ?
1081                                            HDMI_QUANTIZATION_RANGE_LIMITED :
1082                                            HDMI_QUANTIZATION_RANGE_FULL);
1083
1084         ret = hdmi_avi_infoframe_check(frame);
1085         if (WARN_ON(ret))
1086                 return false;
1087
1088         return true;
1089 }
1090
1091 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
1092                                          const struct intel_crtc_state *crtc_state)
1093 {
1094         u8 sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
1095         const union hdmi_infoframe *frame = &crtc_state->infoframes.avi;
1096         ssize_t len;
1097
1098         if ((crtc_state->infoframes.enable &
1099              intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI)) == 0)
1100                 return true;
1101
1102         if (WARN_ON(frame->any.type != HDMI_INFOFRAME_TYPE_AVI))
1103                 return false;
1104
1105         len = hdmi_infoframe_pack_only(frame, sdvo_data, sizeof(sdvo_data));
1106         if (WARN_ON(len < 0))
1107                 return false;
1108
1109         return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1110                                           SDVO_HBUF_TX_VSYNC,
1111                                           sdvo_data, len);
1112 }
1113
1114 static void intel_sdvo_get_avi_infoframe(struct intel_sdvo *intel_sdvo,
1115                                          struct intel_crtc_state *crtc_state)
1116 {
1117         u8 sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
1118         union hdmi_infoframe *frame = &crtc_state->infoframes.avi;
1119         ssize_t len;
1120         int ret;
1121
1122         if (!crtc_state->has_hdmi_sink)
1123                 return;
1124
1125         len = intel_sdvo_read_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1126                                         sdvo_data, sizeof(sdvo_data));
1127         if (len < 0) {
1128                 DRM_DEBUG_KMS("failed to read AVI infoframe\n");
1129                 return;
1130         } else if (len == 0) {
1131                 return;
1132         }
1133
1134         crtc_state->infoframes.enable |=
1135                 intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI);
1136
1137         ret = hdmi_infoframe_unpack(frame, sdvo_data, len);
1138         if (ret) {
1139                 DRM_DEBUG_KMS("Failed to unpack AVI infoframe\n");
1140                 return;
1141         }
1142
1143         if (frame->any.type != HDMI_INFOFRAME_TYPE_AVI)
1144                 DRM_DEBUG_KMS("Found the wrong infoframe type 0x%x (expected 0x%02x)\n",
1145                               frame->any.type, HDMI_INFOFRAME_TYPE_AVI);
1146 }
1147
1148 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo,
1149                                      const struct drm_connector_state *conn_state)
1150 {
1151         struct intel_sdvo_tv_format format;
1152         u32 format_map;
1153
1154         format_map = 1 << conn_state->tv.mode;
1155         memset(&format, 0, sizeof(format));
1156         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
1157
1158         BUILD_BUG_ON(sizeof(format) != 6);
1159         return intel_sdvo_set_value(intel_sdvo,
1160                                     SDVO_CMD_SET_TV_FORMAT,
1161                                     &format, sizeof(format));
1162 }
1163
1164 static bool
1165 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
1166                                         const struct drm_display_mode *mode)
1167 {
1168         struct intel_sdvo_dtd output_dtd;
1169
1170         if (!intel_sdvo_set_target_output(intel_sdvo,
1171                                           intel_sdvo->attached_output))
1172                 return false;
1173
1174         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1175         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1176                 return false;
1177
1178         return true;
1179 }
1180
1181 /*
1182  * Asks the sdvo controller for the preferred input mode given the output mode.
1183  * Unfortunately we have to set up the full output mode to do that.
1184  */
1185 static bool
1186 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
1187                                     struct intel_sdvo_connector *intel_sdvo_connector,
1188                                     const struct drm_display_mode *mode,
1189                                     struct drm_display_mode *adjusted_mode)
1190 {
1191         struct intel_sdvo_dtd input_dtd;
1192
1193         /* Reset the input timing to the screen. Assume always input 0. */
1194         if (!intel_sdvo_set_target_input(intel_sdvo))
1195                 return false;
1196
1197         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1198                                                       intel_sdvo_connector,
1199                                                       mode->clock / 10,
1200                                                       mode->hdisplay,
1201                                                       mode->vdisplay))
1202                 return false;
1203
1204         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1205                                                    &input_dtd))
1206                 return false;
1207
1208         intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1209         intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
1210
1211         return true;
1212 }
1213
1214 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config)
1215 {
1216         unsigned dotclock = pipe_config->port_clock;
1217         struct dpll *clock = &pipe_config->dpll;
1218
1219         /*
1220          * SDVO TV has fixed PLL values depend on its clock range,
1221          * this mirrors vbios setting.
1222          */
1223         if (dotclock >= 100000 && dotclock < 140500) {
1224                 clock->p1 = 2;
1225                 clock->p2 = 10;
1226                 clock->n = 3;
1227                 clock->m1 = 16;
1228                 clock->m2 = 8;
1229         } else if (dotclock >= 140500 && dotclock <= 200000) {
1230                 clock->p1 = 1;
1231                 clock->p2 = 10;
1232                 clock->n = 6;
1233                 clock->m1 = 12;
1234                 clock->m2 = 8;
1235         } else {
1236                 WARN(1, "SDVO TV clock out of range: %i\n", dotclock);
1237         }
1238
1239         pipe_config->clock_set = true;
1240 }
1241
1242 static int intel_sdvo_compute_config(struct intel_encoder *encoder,
1243                                      struct intel_crtc_state *pipe_config,
1244                                      struct drm_connector_state *conn_state)
1245 {
1246         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1247         struct intel_sdvo_connector_state *intel_sdvo_state =
1248                 to_intel_sdvo_connector_state(conn_state);
1249         struct intel_sdvo_connector *intel_sdvo_connector =
1250                 to_intel_sdvo_connector(conn_state->connector);
1251         struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
1252         struct drm_display_mode *mode = &pipe_config->base.mode;
1253
1254         DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1255         pipe_config->pipe_bpp = 8*3;
1256         pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
1257
1258         if (HAS_PCH_SPLIT(to_i915(encoder->base.dev)))
1259                 pipe_config->has_pch_encoder = true;
1260
1261         /*
1262          * We need to construct preferred input timings based on our
1263          * output timings.  To do that, we have to set the output
1264          * timings, even though this isn't really the right place in
1265          * the sequence to do it. Oh well.
1266          */
1267         if (IS_TV(intel_sdvo_connector)) {
1268                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1269                         return -EINVAL;
1270
1271                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1272                                                            intel_sdvo_connector,
1273                                                            mode,
1274                                                            adjusted_mode);
1275                 pipe_config->sdvo_tv_clock = true;
1276         } else if (IS_LVDS(intel_sdvo_connector)) {
1277                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1278                                                              intel_sdvo_connector->base.panel.fixed_mode))
1279                         return -EINVAL;
1280
1281                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1282                                                            intel_sdvo_connector,
1283                                                            mode,
1284                                                            adjusted_mode);
1285         }
1286
1287         if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
1288                 return -EINVAL;
1289
1290         /*
1291          * Make the CRTC code factor in the SDVO pixel multiplier.  The
1292          * SDVO device will factor out the multiplier during mode_set.
1293          */
1294         pipe_config->pixel_multiplier =
1295                 intel_sdvo_get_pixel_multiplier(adjusted_mode);
1296
1297         if (intel_sdvo_state->base.force_audio != HDMI_AUDIO_OFF_DVI)
1298                 pipe_config->has_hdmi_sink = intel_sdvo->has_hdmi_monitor;
1299
1300         if (intel_sdvo_state->base.force_audio == HDMI_AUDIO_ON ||
1301             (intel_sdvo_state->base.force_audio == HDMI_AUDIO_AUTO && intel_sdvo->has_hdmi_audio))
1302                 pipe_config->has_audio = true;
1303
1304         if (intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_AUTO) {
1305                 /*
1306                  * See CEA-861-E - 5.1 Default Encoding Parameters
1307                  *
1308                  * FIXME: This bit is only valid when using TMDS encoding and 8
1309                  * bit per color mode.
1310                  */
1311                 if (pipe_config->has_hdmi_sink &&
1312                     drm_match_cea_mode(adjusted_mode) > 1)
1313                         pipe_config->limited_color_range = true;
1314         } else {
1315                 if (pipe_config->has_hdmi_sink &&
1316                     intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_LIMITED)
1317                         pipe_config->limited_color_range = true;
1318         }
1319
1320         /* Clock computation needs to happen after pixel multiplier. */
1321         if (IS_TV(intel_sdvo_connector))
1322                 i9xx_adjust_sdvo_tv_clock(pipe_config);
1323
1324         /* Set user selected PAR to incoming mode's member */
1325         if (intel_sdvo_connector->is_hdmi)
1326                 adjusted_mode->picture_aspect_ratio = conn_state->picture_aspect_ratio;
1327
1328         if (!intel_sdvo_compute_avi_infoframe(intel_sdvo,
1329                                               pipe_config, conn_state)) {
1330                 DRM_DEBUG_KMS("bad AVI infoframe\n");
1331                 return -EINVAL;
1332         }
1333
1334         return 0;
1335 }
1336
1337 #define UPDATE_PROPERTY(input, NAME) \
1338         do { \
1339                 val = input; \
1340                 intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_##NAME, &val, sizeof(val)); \
1341         } while (0)
1342
1343 static void intel_sdvo_update_props(struct intel_sdvo *intel_sdvo,
1344                                     const struct intel_sdvo_connector_state *sdvo_state)
1345 {
1346         const struct drm_connector_state *conn_state = &sdvo_state->base.base;
1347         struct intel_sdvo_connector *intel_sdvo_conn =
1348                 to_intel_sdvo_connector(conn_state->connector);
1349         u16 val;
1350
1351         if (intel_sdvo_conn->left)
1352                 UPDATE_PROPERTY(sdvo_state->tv.overscan_h, OVERSCAN_H);
1353
1354         if (intel_sdvo_conn->top)
1355                 UPDATE_PROPERTY(sdvo_state->tv.overscan_v, OVERSCAN_V);
1356
1357         if (intel_sdvo_conn->hpos)
1358                 UPDATE_PROPERTY(sdvo_state->tv.hpos, HPOS);
1359
1360         if (intel_sdvo_conn->vpos)
1361                 UPDATE_PROPERTY(sdvo_state->tv.vpos, VPOS);
1362
1363         if (intel_sdvo_conn->saturation)
1364                 UPDATE_PROPERTY(conn_state->tv.saturation, SATURATION);
1365
1366         if (intel_sdvo_conn->contrast)
1367                 UPDATE_PROPERTY(conn_state->tv.contrast, CONTRAST);
1368
1369         if (intel_sdvo_conn->hue)
1370                 UPDATE_PROPERTY(conn_state->tv.hue, HUE);
1371
1372         if (intel_sdvo_conn->brightness)
1373                 UPDATE_PROPERTY(conn_state->tv.brightness, BRIGHTNESS);
1374
1375         if (intel_sdvo_conn->sharpness)
1376                 UPDATE_PROPERTY(sdvo_state->tv.sharpness, SHARPNESS);
1377
1378         if (intel_sdvo_conn->flicker_filter)
1379                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter, FLICKER_FILTER);
1380
1381         if (intel_sdvo_conn->flicker_filter_2d)
1382                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_2d, FLICKER_FILTER_2D);
1383
1384         if (intel_sdvo_conn->flicker_filter_adaptive)
1385                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
1386
1387         if (intel_sdvo_conn->tv_chroma_filter)
1388                 UPDATE_PROPERTY(sdvo_state->tv.chroma_filter, TV_CHROMA_FILTER);
1389
1390         if (intel_sdvo_conn->tv_luma_filter)
1391                 UPDATE_PROPERTY(sdvo_state->tv.luma_filter, TV_LUMA_FILTER);
1392
1393         if (intel_sdvo_conn->dot_crawl)
1394                 UPDATE_PROPERTY(sdvo_state->tv.dot_crawl, DOT_CRAWL);
1395
1396 #undef UPDATE_PROPERTY
1397 }
1398
1399 static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder,
1400                                   const struct intel_crtc_state *crtc_state,
1401                                   const struct drm_connector_state *conn_state)
1402 {
1403         struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
1404         struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
1405         const struct drm_display_mode *adjusted_mode = &crtc_state->base.adjusted_mode;
1406         const struct intel_sdvo_connector_state *sdvo_state =
1407                 to_intel_sdvo_connector_state(conn_state);
1408         const struct intel_sdvo_connector *intel_sdvo_connector =
1409                 to_intel_sdvo_connector(conn_state->connector);
1410         const struct drm_display_mode *mode = &crtc_state->base.mode;
1411         struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder);
1412         u32 sdvox;
1413         struct intel_sdvo_in_out_map in_out;
1414         struct intel_sdvo_dtd input_dtd, output_dtd;
1415         int rate;
1416
1417         intel_sdvo_update_props(intel_sdvo, sdvo_state);
1418
1419         /*
1420          * First, set the input mapping for the first input to our controlled
1421          * output. This is only correct if we're a single-input device, in
1422          * which case the first input is the output from the appropriate SDVO
1423          * channel on the motherboard.  In a two-input device, the first input
1424          * will be SDVOB and the second SDVOC.
1425          */
1426         in_out.in0 = intel_sdvo->attached_output;
1427         in_out.in1 = 0;
1428
1429         intel_sdvo_set_value(intel_sdvo,
1430                              SDVO_CMD_SET_IN_OUT_MAP,
1431                              &in_out, sizeof(in_out));
1432
1433         /* Set the output timings to the screen */
1434         if (!intel_sdvo_set_target_output(intel_sdvo,
1435                                           intel_sdvo->attached_output))
1436                 return;
1437
1438         /* lvds has a special fixed output timing. */
1439         if (IS_LVDS(intel_sdvo_connector))
1440                 intel_sdvo_get_dtd_from_mode(&output_dtd,
1441                                              intel_sdvo_connector->base.panel.fixed_mode);
1442         else
1443                 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1444         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1445                 DRM_INFO("Setting output timings on %s failed\n",
1446                          SDVO_NAME(intel_sdvo));
1447
1448         /* Set the input timing to the screen. Assume always input 0. */
1449         if (!intel_sdvo_set_target_input(intel_sdvo))
1450                 return;
1451
1452         if (crtc_state->has_hdmi_sink) {
1453                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1454                 intel_sdvo_set_colorimetry(intel_sdvo,
1455                                            SDVO_COLORIMETRY_RGB256);
1456                 intel_sdvo_set_avi_infoframe(intel_sdvo, crtc_state);
1457         } else
1458                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1459
1460         if (IS_TV(intel_sdvo_connector) &&
1461             !intel_sdvo_set_tv_format(intel_sdvo, conn_state))
1462                 return;
1463
1464         intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1465
1466         if (IS_TV(intel_sdvo_connector) || IS_LVDS(intel_sdvo_connector))
1467                 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1468         if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1469                 DRM_INFO("Setting input timings on %s failed\n",
1470                          SDVO_NAME(intel_sdvo));
1471
1472         switch (crtc_state->pixel_multiplier) {
1473         default:
1474                 WARN(1, "unknown pixel multiplier specified\n");
1475                 /* fall through */
1476         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1477         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1478         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1479         }
1480         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1481                 return;
1482
1483         /* Set the SDVO control regs. */
1484         if (INTEL_GEN(dev_priv) >= 4) {
1485                 /* The real mode polarity is set by the SDVO commands, using
1486                  * struct intel_sdvo_dtd. */
1487                 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1488                 if (!HAS_PCH_SPLIT(dev_priv) && crtc_state->limited_color_range)
1489                         sdvox |= HDMI_COLOR_RANGE_16_235;
1490                 if (INTEL_GEN(dev_priv) < 5)
1491                         sdvox |= SDVO_BORDER_ENABLE;
1492         } else {
1493                 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1494                 if (intel_sdvo->port == PORT_B)
1495                         sdvox &= SDVOB_PRESERVE_MASK;
1496                 else
1497                         sdvox &= SDVOC_PRESERVE_MASK;
1498                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1499         }
1500
1501         if (HAS_PCH_CPT(dev_priv))
1502                 sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe);
1503         else
1504                 sdvox |= SDVO_PIPE_SEL(crtc->pipe);
1505
1506         if (INTEL_GEN(dev_priv) >= 4) {
1507                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1508         } else if (IS_I945G(dev_priv) || IS_I945GM(dev_priv) ||
1509                    IS_G33(dev_priv) || IS_PINEVIEW(dev_priv)) {
1510                 /* done in crtc_mode_set as it lives inside the dpll register */
1511         } else {
1512                 sdvox |= (crtc_state->pixel_multiplier - 1)
1513                         << SDVO_PORT_MULTIPLY_SHIFT;
1514         }
1515
1516         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1517             INTEL_GEN(dev_priv) < 5)
1518                 sdvox |= SDVO_STALL_SELECT;
1519         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1520 }
1521
1522 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1523 {
1524         struct intel_sdvo_connector *intel_sdvo_connector =
1525                 to_intel_sdvo_connector(&connector->base);
1526         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1527         u16 active_outputs = 0;
1528
1529         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1530
1531         return active_outputs & intel_sdvo_connector->output_flag;
1532 }
1533
1534 bool intel_sdvo_port_enabled(struct drm_i915_private *dev_priv,
1535                              i915_reg_t sdvo_reg, enum pipe *pipe)
1536 {
1537         u32 val;
1538
1539         val = I915_READ(sdvo_reg);
1540
1541         /* asserts want to know the pipe even if the port is disabled */
1542         if (HAS_PCH_CPT(dev_priv))
1543                 *pipe = (val & SDVO_PIPE_SEL_MASK_CPT) >> SDVO_PIPE_SEL_SHIFT_CPT;
1544         else if (IS_CHERRYVIEW(dev_priv))
1545                 *pipe = (val & SDVO_PIPE_SEL_MASK_CHV) >> SDVO_PIPE_SEL_SHIFT_CHV;
1546         else
1547                 *pipe = (val & SDVO_PIPE_SEL_MASK) >> SDVO_PIPE_SEL_SHIFT;
1548
1549         return val & SDVO_ENABLE;
1550 }
1551
1552 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1553                                     enum pipe *pipe)
1554 {
1555         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1556         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1557         u16 active_outputs = 0;
1558         bool ret;
1559
1560         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1561
1562         ret = intel_sdvo_port_enabled(dev_priv, intel_sdvo->sdvo_reg, pipe);
1563
1564         return ret || active_outputs;
1565 }
1566
1567 static void intel_sdvo_get_config(struct intel_encoder *encoder,
1568                                   struct intel_crtc_state *pipe_config)
1569 {
1570         struct drm_device *dev = encoder->base.dev;
1571         struct drm_i915_private *dev_priv = to_i915(dev);
1572         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1573         struct intel_sdvo_dtd dtd;
1574         int encoder_pixel_multiplier = 0;
1575         int dotclock;
1576         u32 flags = 0, sdvox;
1577         u8 val;
1578         bool ret;
1579
1580         pipe_config->output_types |= BIT(INTEL_OUTPUT_SDVO);
1581
1582         sdvox = I915_READ(intel_sdvo->sdvo_reg);
1583
1584         ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
1585         if (!ret) {
1586                 /*
1587                  * Some sdvo encoders are not spec compliant and don't
1588                  * implement the mandatory get_timings function.
1589                  */
1590                 DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n");
1591                 pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS;
1592         } else {
1593                 if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
1594                         flags |= DRM_MODE_FLAG_PHSYNC;
1595                 else
1596                         flags |= DRM_MODE_FLAG_NHSYNC;
1597
1598                 if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
1599                         flags |= DRM_MODE_FLAG_PVSYNC;
1600                 else
1601                         flags |= DRM_MODE_FLAG_NVSYNC;
1602         }
1603
1604         pipe_config->base.adjusted_mode.flags |= flags;
1605
1606         /*
1607          * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
1608          * the sdvo port register, on all other platforms it is part of the dpll
1609          * state. Since the general pipe state readout happens before the
1610          * encoder->get_config we so already have a valid pixel multplier on all
1611          * other platfroms.
1612          */
1613         if (IS_I915G(dev_priv) || IS_I915GM(dev_priv)) {
1614                 pipe_config->pixel_multiplier =
1615                         ((sdvox & SDVO_PORT_MULTIPLY_MASK)
1616                          >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
1617         }
1618
1619         dotclock = pipe_config->port_clock;
1620
1621         if (pipe_config->pixel_multiplier)
1622                 dotclock /= pipe_config->pixel_multiplier;
1623
1624         pipe_config->base.adjusted_mode.crtc_clock = dotclock;
1625
1626         /* Cross check the port pixel multiplier with the sdvo encoder state. */
1627         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT,
1628                                  &val, 1)) {
1629                 switch (val) {
1630                 case SDVO_CLOCK_RATE_MULT_1X:
1631                         encoder_pixel_multiplier = 1;
1632                         break;
1633                 case SDVO_CLOCK_RATE_MULT_2X:
1634                         encoder_pixel_multiplier = 2;
1635                         break;
1636                 case SDVO_CLOCK_RATE_MULT_4X:
1637                         encoder_pixel_multiplier = 4;
1638                         break;
1639                 }
1640         }
1641
1642         WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier,
1643              "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1644              pipe_config->pixel_multiplier, encoder_pixel_multiplier);
1645
1646         if (sdvox & HDMI_COLOR_RANGE_16_235)
1647                 pipe_config->limited_color_range = true;
1648
1649         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_AUDIO_STAT,
1650                                  &val, 1)) {
1651                 u8 mask = SDVO_AUDIO_ELD_VALID | SDVO_AUDIO_PRESENCE_DETECT;
1652
1653                 if ((val & mask) == mask)
1654                         pipe_config->has_audio = true;
1655         }
1656
1657         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE,
1658                                  &val, 1)) {
1659                 if (val == SDVO_ENCODE_HDMI)
1660                         pipe_config->has_hdmi_sink = true;
1661         }
1662
1663         intel_sdvo_get_avi_infoframe(intel_sdvo, pipe_config);
1664 }
1665
1666 static void intel_sdvo_disable_audio(struct intel_sdvo *intel_sdvo)
1667 {
1668         intel_sdvo_set_audio_state(intel_sdvo, 0);
1669 }
1670
1671 static void intel_sdvo_enable_audio(struct intel_sdvo *intel_sdvo,
1672                                     const struct intel_crtc_state *crtc_state,
1673                                     const struct drm_connector_state *conn_state)
1674 {
1675         const struct drm_display_mode *adjusted_mode =
1676                 &crtc_state->base.adjusted_mode;
1677         struct drm_connector *connector = conn_state->connector;
1678         u8 *eld = connector->eld;
1679
1680         eld[6] = drm_av_sync_delay(connector, adjusted_mode) / 2;
1681
1682         intel_sdvo_set_audio_state(intel_sdvo, 0);
1683
1684         intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_ELD,
1685                                    SDVO_HBUF_TX_DISABLED,
1686                                    eld, drm_eld_size(eld));
1687
1688         intel_sdvo_set_audio_state(intel_sdvo, SDVO_AUDIO_ELD_VALID |
1689                                    SDVO_AUDIO_PRESENCE_DETECT);
1690 }
1691
1692 static void intel_disable_sdvo(struct intel_encoder *encoder,
1693                                const struct intel_crtc_state *old_crtc_state,
1694                                const struct drm_connector_state *conn_state)
1695 {
1696         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1697         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1698         struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
1699         u32 temp;
1700
1701         if (old_crtc_state->has_audio)
1702                 intel_sdvo_disable_audio(intel_sdvo);
1703
1704         intel_sdvo_set_active_outputs(intel_sdvo, 0);
1705         if (0)
1706                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1707                                                    DRM_MODE_DPMS_OFF);
1708
1709         temp = I915_READ(intel_sdvo->sdvo_reg);
1710
1711         temp &= ~SDVO_ENABLE;
1712         intel_sdvo_write_sdvox(intel_sdvo, temp);
1713
1714         /*
1715          * HW workaround for IBX, we need to move the port
1716          * to transcoder A after disabling it to allow the
1717          * matching DP port to be enabled on transcoder A.
1718          */
1719         if (HAS_PCH_IBX(dev_priv) && crtc->pipe == PIPE_B) {
1720                 /*
1721                  * We get CPU/PCH FIFO underruns on the other pipe when
1722                  * doing the workaround. Sweep them under the rug.
1723                  */
1724                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1725                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1726
1727                 temp &= ~SDVO_PIPE_SEL_MASK;
1728                 temp |= SDVO_ENABLE | SDVO_PIPE_SEL(PIPE_A);
1729                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1730
1731                 temp &= ~SDVO_ENABLE;
1732                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1733
1734                 intel_wait_for_vblank_if_active(dev_priv, PIPE_A);
1735                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1736                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1737         }
1738 }
1739
1740 static void pch_disable_sdvo(struct intel_encoder *encoder,
1741                              const struct intel_crtc_state *old_crtc_state,
1742                              const struct drm_connector_state *old_conn_state)
1743 {
1744 }
1745
1746 static void pch_post_disable_sdvo(struct intel_encoder *encoder,
1747                                   const struct intel_crtc_state *old_crtc_state,
1748                                   const struct drm_connector_state *old_conn_state)
1749 {
1750         intel_disable_sdvo(encoder, old_crtc_state, old_conn_state);
1751 }
1752
1753 static void intel_enable_sdvo(struct intel_encoder *encoder,
1754                               const struct intel_crtc_state *pipe_config,
1755                               const struct drm_connector_state *conn_state)
1756 {
1757         struct drm_device *dev = encoder->base.dev;
1758         struct drm_i915_private *dev_priv = to_i915(dev);
1759         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1760         struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);
1761         u32 temp;
1762         bool input1, input2;
1763         int i;
1764         bool success;
1765
1766         temp = I915_READ(intel_sdvo->sdvo_reg);
1767         temp |= SDVO_ENABLE;
1768         intel_sdvo_write_sdvox(intel_sdvo, temp);
1769
1770         for (i = 0; i < 2; i++)
1771                 intel_wait_for_vblank(dev_priv, intel_crtc->pipe);
1772
1773         success = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1774         /*
1775          * Warn if the device reported failure to sync.
1776          *
1777          * A lot of SDVO devices fail to notify of sync, but it's
1778          * a given it the status is a success, we succeeded.
1779          */
1780         if (success && !input1) {
1781                 DRM_DEBUG_KMS("First %s output reported failure to "
1782                                 "sync\n", SDVO_NAME(intel_sdvo));
1783         }
1784
1785         if (0)
1786                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1787                                                    DRM_MODE_DPMS_ON);
1788         intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1789
1790         if (pipe_config->has_audio)
1791                 intel_sdvo_enable_audio(intel_sdvo, pipe_config, conn_state);
1792 }
1793
1794 static enum drm_mode_status
1795 intel_sdvo_mode_valid(struct drm_connector *connector,
1796                       struct drm_display_mode *mode)
1797 {
1798         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1799         struct intel_sdvo_connector *intel_sdvo_connector =
1800                 to_intel_sdvo_connector(connector);
1801         int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
1802
1803         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1804                 return MODE_NO_DBLESCAN;
1805
1806         if (intel_sdvo->pixel_clock_min > mode->clock)
1807                 return MODE_CLOCK_LOW;
1808
1809         if (intel_sdvo->pixel_clock_max < mode->clock)
1810                 return MODE_CLOCK_HIGH;
1811
1812         if (mode->clock > max_dotclk)
1813                 return MODE_CLOCK_HIGH;
1814
1815         if (IS_LVDS(intel_sdvo_connector)) {
1816                 const struct drm_display_mode *fixed_mode =
1817                         intel_sdvo_connector->base.panel.fixed_mode;
1818
1819                 if (mode->hdisplay > fixed_mode->hdisplay)
1820                         return MODE_PANEL;
1821
1822                 if (mode->vdisplay > fixed_mode->vdisplay)
1823                         return MODE_PANEL;
1824         }
1825
1826         return MODE_OK;
1827 }
1828
1829 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1830 {
1831         BUILD_BUG_ON(sizeof(*caps) != 8);
1832         if (!intel_sdvo_get_value(intel_sdvo,
1833                                   SDVO_CMD_GET_DEVICE_CAPS,
1834                                   caps, sizeof(*caps)))
1835                 return false;
1836
1837         DRM_DEBUG_KMS("SDVO capabilities:\n"
1838                       "  vendor_id: %d\n"
1839                       "  device_id: %d\n"
1840                       "  device_rev_id: %d\n"
1841                       "  sdvo_version_major: %d\n"
1842                       "  sdvo_version_minor: %d\n"
1843                       "  sdvo_inputs_mask: %d\n"
1844                       "  smooth_scaling: %d\n"
1845                       "  sharp_scaling: %d\n"
1846                       "  up_scaling: %d\n"
1847                       "  down_scaling: %d\n"
1848                       "  stall_support: %d\n"
1849                       "  output_flags: %d\n",
1850                       caps->vendor_id,
1851                       caps->device_id,
1852                       caps->device_rev_id,
1853                       caps->sdvo_version_major,
1854                       caps->sdvo_version_minor,
1855                       caps->sdvo_inputs_mask,
1856                       caps->smooth_scaling,
1857                       caps->sharp_scaling,
1858                       caps->up_scaling,
1859                       caps->down_scaling,
1860                       caps->stall_support,
1861                       caps->output_flags);
1862
1863         return true;
1864 }
1865
1866 static u16 intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
1867 {
1868         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
1869         u16 hotplug;
1870
1871         if (!I915_HAS_HOTPLUG(dev_priv))
1872                 return 0;
1873
1874         /*
1875          * HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1876          * on the line.
1877          */
1878         if (IS_I945G(dev_priv) || IS_I945GM(dev_priv))
1879                 return 0;
1880
1881         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1882                                         &hotplug, sizeof(hotplug)))
1883                 return 0;
1884
1885         return hotplug;
1886 }
1887
1888 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1889 {
1890         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1891
1892         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1893                              &intel_sdvo->hotplug_active, 2);
1894 }
1895
1896 static bool intel_sdvo_hotplug(struct intel_encoder *encoder,
1897                                struct intel_connector *connector)
1898 {
1899         intel_sdvo_enable_hotplug(encoder);
1900
1901         return intel_encoder_hotplug(encoder, connector);
1902 }
1903
1904 static bool
1905 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1906 {
1907         /* Is there more than one type of output? */
1908         return hweight16(intel_sdvo->caps.output_flags) > 1;
1909 }
1910
1911 static struct edid *
1912 intel_sdvo_get_edid(struct drm_connector *connector)
1913 {
1914         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1915         return drm_get_edid(connector, &sdvo->ddc);
1916 }
1917
1918 /* Mac mini hack -- use the same DDC as the analog connector */
1919 static struct edid *
1920 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1921 {
1922         struct drm_i915_private *dev_priv = to_i915(connector->dev);
1923
1924         return drm_get_edid(connector,
1925                             intel_gmbus_get_adapter(dev_priv,
1926                                                     dev_priv->vbt.crt_ddc_pin));
1927 }
1928
1929 static enum drm_connector_status
1930 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1931 {
1932         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1933         struct intel_sdvo_connector *intel_sdvo_connector =
1934                 to_intel_sdvo_connector(connector);
1935         enum drm_connector_status status;
1936         struct edid *edid;
1937
1938         edid = intel_sdvo_get_edid(connector);
1939
1940         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1941                 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1942
1943                 /*
1944                  * Don't use the 1 as the argument of DDC bus switch to get
1945                  * the EDID. It is used for SDVO SPD ROM.
1946                  */
1947                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1948                         intel_sdvo->ddc_bus = ddc;
1949                         edid = intel_sdvo_get_edid(connector);
1950                         if (edid)
1951                                 break;
1952                 }
1953                 /*
1954                  * If we found the EDID on the other bus,
1955                  * assume that is the correct DDC bus.
1956                  */
1957                 if (edid == NULL)
1958                         intel_sdvo->ddc_bus = saved_ddc;
1959         }
1960
1961         /*
1962          * When there is no edid and no monitor is connected with VGA
1963          * port, try to use the CRT ddc to read the EDID for DVI-connector.
1964          */
1965         if (edid == NULL)
1966                 edid = intel_sdvo_get_analog_edid(connector);
1967
1968         status = connector_status_unknown;
1969         if (edid != NULL) {
1970                 /* DDC bus is shared, match EDID to connector type */
1971                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1972                         status = connector_status_connected;
1973                         if (intel_sdvo_connector->is_hdmi) {
1974                                 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1975                                 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1976                         }
1977                 } else
1978                         status = connector_status_disconnected;
1979                 kfree(edid);
1980         }
1981
1982         return status;
1983 }
1984
1985 static bool
1986 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1987                                   struct edid *edid)
1988 {
1989         bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1990         bool connector_is_digital = !!IS_DIGITAL(sdvo);
1991
1992         DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1993                       connector_is_digital, monitor_is_digital);
1994         return connector_is_digital == monitor_is_digital;
1995 }
1996
1997 static enum drm_connector_status
1998 intel_sdvo_detect(struct drm_connector *connector, bool force)
1999 {
2000         u16 response;
2001         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
2002         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2003         enum drm_connector_status ret;
2004
2005         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2006                       connector->base.id, connector->name);
2007
2008         if (!intel_sdvo_get_value(intel_sdvo,
2009                                   SDVO_CMD_GET_ATTACHED_DISPLAYS,
2010                                   &response, 2))
2011                 return connector_status_unknown;
2012
2013         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
2014                       response & 0xff, response >> 8,
2015                       intel_sdvo_connector->output_flag);
2016
2017         if (response == 0)
2018                 return connector_status_disconnected;
2019
2020         intel_sdvo->attached_output = response;
2021
2022         intel_sdvo->has_hdmi_monitor = false;
2023         intel_sdvo->has_hdmi_audio = false;
2024
2025         if ((intel_sdvo_connector->output_flag & response) == 0)
2026                 ret = connector_status_disconnected;
2027         else if (IS_TMDS(intel_sdvo_connector))
2028                 ret = intel_sdvo_tmds_sink_detect(connector);
2029         else {
2030                 struct edid *edid;
2031
2032                 /* if we have an edid check it matches the connection */
2033                 edid = intel_sdvo_get_edid(connector);
2034                 if (edid == NULL)
2035                         edid = intel_sdvo_get_analog_edid(connector);
2036                 if (edid != NULL) {
2037                         if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
2038                                                               edid))
2039                                 ret = connector_status_connected;
2040                         else
2041                                 ret = connector_status_disconnected;
2042
2043                         kfree(edid);
2044                 } else
2045                         ret = connector_status_connected;
2046         }
2047
2048         return ret;
2049 }
2050
2051 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
2052 {
2053         struct edid *edid;
2054
2055         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2056                       connector->base.id, connector->name);
2057
2058         /* set the bus switch and get the modes */
2059         edid = intel_sdvo_get_edid(connector);
2060
2061         /*
2062          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
2063          * link between analog and digital outputs. So, if the regular SDVO
2064          * DDC fails, check to see if the analog output is disconnected, in
2065          * which case we'll look there for the digital DDC data.
2066          */
2067         if (edid == NULL)
2068                 edid = intel_sdvo_get_analog_edid(connector);
2069
2070         if (edid != NULL) {
2071                 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
2072                                                       edid)) {
2073                         drm_connector_update_edid_property(connector, edid);
2074                         drm_add_edid_modes(connector, edid);
2075                 }
2076
2077                 kfree(edid);
2078         }
2079 }
2080
2081 /*
2082  * Set of SDVO TV modes.
2083  * Note!  This is in reply order (see loop in get_tv_modes).
2084  * XXX: all 60Hz refresh?
2085  */
2086 static const struct drm_display_mode sdvo_tv_modes[] = {
2087         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
2088                    416, 0, 200, 201, 232, 233, 0,
2089                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2090         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
2091                    416, 0, 240, 241, 272, 273, 0,
2092                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2093         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
2094                    496, 0, 300, 301, 332, 333, 0,
2095                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2096         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
2097                    736, 0, 350, 351, 382, 383, 0,
2098                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2099         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
2100                    736, 0, 400, 401, 432, 433, 0,
2101                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2102         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
2103                    736, 0, 480, 481, 512, 513, 0,
2104                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2105         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
2106                    800, 0, 480, 481, 512, 513, 0,
2107                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2108         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
2109                    800, 0, 576, 577, 608, 609, 0,
2110                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2111         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
2112                    816, 0, 350, 351, 382, 383, 0,
2113                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2114         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
2115                    816, 0, 400, 401, 432, 433, 0,
2116                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2117         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
2118                    816, 0, 480, 481, 512, 513, 0,
2119                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2120         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
2121                    816, 0, 540, 541, 572, 573, 0,
2122                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2123         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
2124                    816, 0, 576, 577, 608, 609, 0,
2125                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2126         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
2127                    864, 0, 576, 577, 608, 609, 0,
2128                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2129         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
2130                    896, 0, 600, 601, 632, 633, 0,
2131                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2132         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
2133                    928, 0, 624, 625, 656, 657, 0,
2134                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2135         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
2136                    1016, 0, 766, 767, 798, 799, 0,
2137                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2138         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
2139                    1120, 0, 768, 769, 800, 801, 0,
2140                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2141         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
2142                    1376, 0, 1024, 1025, 1056, 1057, 0,
2143                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2144 };
2145
2146 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
2147 {
2148         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
2149         const struct drm_connector_state *conn_state = connector->state;
2150         struct intel_sdvo_sdtv_resolution_request tv_res;
2151         u32 reply = 0, format_map = 0;
2152         int i;
2153
2154         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2155                       connector->base.id, connector->name);
2156
2157         /*
2158          * Read the list of supported input resolutions for the selected TV
2159          * format.
2160          */
2161         format_map = 1 << conn_state->tv.mode;
2162         memcpy(&tv_res, &format_map,
2163                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
2164
2165         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
2166                 return;
2167
2168         BUILD_BUG_ON(sizeof(tv_res) != 3);
2169         if (!intel_sdvo_write_cmd(intel_sdvo,
2170                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
2171                                   &tv_res, sizeof(tv_res)))
2172                 return;
2173         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
2174                 return;
2175
2176         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
2177                 if (reply & (1 << i)) {
2178                         struct drm_display_mode *nmode;
2179                         nmode = drm_mode_duplicate(connector->dev,
2180                                                    &sdvo_tv_modes[i]);
2181                         if (nmode)
2182                                 drm_mode_probed_add(connector, nmode);
2183                 }
2184 }
2185
2186 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
2187 {
2188         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
2189         struct drm_i915_private *dev_priv = to_i915(connector->dev);
2190         struct drm_display_mode *newmode;
2191
2192         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2193                       connector->base.id, connector->name);
2194
2195         /*
2196          * Fetch modes from VBT. For SDVO prefer the VBT mode since some
2197          * SDVO->LVDS transcoders can't cope with the EDID mode.
2198          */
2199         if (dev_priv->vbt.sdvo_lvds_vbt_mode != NULL) {
2200                 newmode = drm_mode_duplicate(connector->dev,
2201                                              dev_priv->vbt.sdvo_lvds_vbt_mode);
2202                 if (newmode != NULL) {
2203                         /* Guarantee the mode is preferred */
2204                         newmode->type = (DRM_MODE_TYPE_PREFERRED |
2205                                          DRM_MODE_TYPE_DRIVER);
2206                         drm_mode_probed_add(connector, newmode);
2207                 }
2208         }
2209
2210         /*
2211          * Attempt to get the mode list from DDC.
2212          * Assume that the preferred modes are
2213          * arranged in priority order.
2214          */
2215         intel_ddc_get_modes(connector, &intel_sdvo->ddc);
2216 }
2217
2218 static int intel_sdvo_get_modes(struct drm_connector *connector)
2219 {
2220         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2221
2222         if (IS_TV(intel_sdvo_connector))
2223                 intel_sdvo_get_tv_modes(connector);
2224         else if (IS_LVDS(intel_sdvo_connector))
2225                 intel_sdvo_get_lvds_modes(connector);
2226         else
2227                 intel_sdvo_get_ddc_modes(connector);
2228
2229         return !list_empty(&connector->probed_modes);
2230 }
2231
2232 static int
2233 intel_sdvo_connector_atomic_get_property(struct drm_connector *connector,
2234                                          const struct drm_connector_state *state,
2235                                          struct drm_property *property,
2236                                          u64 *val)
2237 {
2238         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2239         const struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state((void *)state);
2240
2241         if (property == intel_sdvo_connector->tv_format) {
2242                 int i;
2243
2244                 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2245                         if (state->tv.mode == intel_sdvo_connector->tv_format_supported[i]) {
2246                                 *val = i;
2247
2248                                 return 0;
2249                         }
2250
2251                 WARN_ON(1);
2252                 *val = 0;
2253         } else if (property == intel_sdvo_connector->top ||
2254                    property == intel_sdvo_connector->bottom)
2255                 *val = intel_sdvo_connector->max_vscan - sdvo_state->tv.overscan_v;
2256         else if (property == intel_sdvo_connector->left ||
2257                  property == intel_sdvo_connector->right)
2258                 *val = intel_sdvo_connector->max_hscan - sdvo_state->tv.overscan_h;
2259         else if (property == intel_sdvo_connector->hpos)
2260                 *val = sdvo_state->tv.hpos;
2261         else if (property == intel_sdvo_connector->vpos)
2262                 *val = sdvo_state->tv.vpos;
2263         else if (property == intel_sdvo_connector->saturation)
2264                 *val = state->tv.saturation;
2265         else if (property == intel_sdvo_connector->contrast)
2266                 *val = state->tv.contrast;
2267         else if (property == intel_sdvo_connector->hue)
2268                 *val = state->tv.hue;
2269         else if (property == intel_sdvo_connector->brightness)
2270                 *val = state->tv.brightness;
2271         else if (property == intel_sdvo_connector->sharpness)
2272                 *val = sdvo_state->tv.sharpness;
2273         else if (property == intel_sdvo_connector->flicker_filter)
2274                 *val = sdvo_state->tv.flicker_filter;
2275         else if (property == intel_sdvo_connector->flicker_filter_2d)
2276                 *val = sdvo_state->tv.flicker_filter_2d;
2277         else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2278                 *val = sdvo_state->tv.flicker_filter_adaptive;
2279         else if (property == intel_sdvo_connector->tv_chroma_filter)
2280                 *val = sdvo_state->tv.chroma_filter;
2281         else if (property == intel_sdvo_connector->tv_luma_filter)
2282                 *val = sdvo_state->tv.luma_filter;
2283         else if (property == intel_sdvo_connector->dot_crawl)
2284                 *val = sdvo_state->tv.dot_crawl;
2285         else
2286                 return intel_digital_connector_atomic_get_property(connector, state, property, val);
2287
2288         return 0;
2289 }
2290
2291 static int
2292 intel_sdvo_connector_atomic_set_property(struct drm_connector *connector,
2293                                          struct drm_connector_state *state,
2294                                          struct drm_property *property,
2295                                          u64 val)
2296 {
2297         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2298         struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state(state);
2299
2300         if (property == intel_sdvo_connector->tv_format) {
2301                 state->tv.mode = intel_sdvo_connector->tv_format_supported[val];
2302
2303                 if (state->crtc) {
2304                         struct drm_crtc_state *crtc_state =
2305                                 drm_atomic_get_new_crtc_state(state->state, state->crtc);
2306
2307                         crtc_state->connectors_changed = true;
2308                 }
2309         } else if (property == intel_sdvo_connector->top ||
2310                    property == intel_sdvo_connector->bottom)
2311                 /* Cannot set these independent from each other */
2312                 sdvo_state->tv.overscan_v = intel_sdvo_connector->max_vscan - val;
2313         else if (property == intel_sdvo_connector->left ||
2314                  property == intel_sdvo_connector->right)
2315                 /* Cannot set these independent from each other */
2316                 sdvo_state->tv.overscan_h = intel_sdvo_connector->max_hscan - val;
2317         else if (property == intel_sdvo_connector->hpos)
2318                 sdvo_state->tv.hpos = val;
2319         else if (property == intel_sdvo_connector->vpos)
2320                 sdvo_state->tv.vpos = val;
2321         else if (property == intel_sdvo_connector->saturation)
2322                 state->tv.saturation = val;
2323         else if (property == intel_sdvo_connector->contrast)
2324                 state->tv.contrast = val;
2325         else if (property == intel_sdvo_connector->hue)
2326                 state->tv.hue = val;
2327         else if (property == intel_sdvo_connector->brightness)
2328                 state->tv.brightness = val;
2329         else if (property == intel_sdvo_connector->sharpness)
2330                 sdvo_state->tv.sharpness = val;
2331         else if (property == intel_sdvo_connector->flicker_filter)
2332                 sdvo_state->tv.flicker_filter = val;
2333         else if (property == intel_sdvo_connector->flicker_filter_2d)
2334                 sdvo_state->tv.flicker_filter_2d = val;
2335         else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2336                 sdvo_state->tv.flicker_filter_adaptive = val;
2337         else if (property == intel_sdvo_connector->tv_chroma_filter)
2338                 sdvo_state->tv.chroma_filter = val;
2339         else if (property == intel_sdvo_connector->tv_luma_filter)
2340                 sdvo_state->tv.luma_filter = val;
2341         else if (property == intel_sdvo_connector->dot_crawl)
2342                 sdvo_state->tv.dot_crawl = val;
2343         else
2344                 return intel_digital_connector_atomic_set_property(connector, state, property, val);
2345
2346         return 0;
2347 }
2348
2349 static int
2350 intel_sdvo_connector_register(struct drm_connector *connector)
2351 {
2352         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
2353         int ret;
2354
2355         ret = intel_connector_register(connector);
2356         if (ret)
2357                 return ret;
2358
2359         return sysfs_create_link(&connector->kdev->kobj,
2360                                  &sdvo->ddc.dev.kobj,
2361                                  sdvo->ddc.dev.kobj.name);
2362 }
2363
2364 static void
2365 intel_sdvo_connector_unregister(struct drm_connector *connector)
2366 {
2367         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
2368
2369         sysfs_remove_link(&connector->kdev->kobj,
2370                           sdvo->ddc.dev.kobj.name);
2371         intel_connector_unregister(connector);
2372 }
2373
2374 static struct drm_connector_state *
2375 intel_sdvo_connector_duplicate_state(struct drm_connector *connector)
2376 {
2377         struct intel_sdvo_connector_state *state;
2378
2379         state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL);
2380         if (!state)
2381                 return NULL;
2382
2383         __drm_atomic_helper_connector_duplicate_state(connector, &state->base.base);
2384         return &state->base.base;
2385 }
2386
2387 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
2388         .detect = intel_sdvo_detect,
2389         .fill_modes = drm_helper_probe_single_connector_modes,
2390         .atomic_get_property = intel_sdvo_connector_atomic_get_property,
2391         .atomic_set_property = intel_sdvo_connector_atomic_set_property,
2392         .late_register = intel_sdvo_connector_register,
2393         .early_unregister = intel_sdvo_connector_unregister,
2394         .destroy = intel_connector_destroy,
2395         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
2396         .atomic_duplicate_state = intel_sdvo_connector_duplicate_state,
2397 };
2398
2399 static int intel_sdvo_atomic_check(struct drm_connector *conn,
2400                                    struct drm_connector_state *new_conn_state)
2401 {
2402         struct drm_atomic_state *state = new_conn_state->state;
2403         struct drm_connector_state *old_conn_state =
2404                 drm_atomic_get_old_connector_state(state, conn);
2405         struct intel_sdvo_connector_state *old_state =
2406                 to_intel_sdvo_connector_state(old_conn_state);
2407         struct intel_sdvo_connector_state *new_state =
2408                 to_intel_sdvo_connector_state(new_conn_state);
2409
2410         if (new_conn_state->crtc &&
2411             (memcmp(&old_state->tv, &new_state->tv, sizeof(old_state->tv)) ||
2412              memcmp(&old_conn_state->tv, &new_conn_state->tv, sizeof(old_conn_state->tv)))) {
2413                 struct drm_crtc_state *crtc_state =
2414                         drm_atomic_get_new_crtc_state(new_conn_state->state,
2415                                                       new_conn_state->crtc);
2416
2417                 crtc_state->connectors_changed = true;
2418         }
2419
2420         return intel_digital_connector_atomic_check(conn, new_conn_state);
2421 }
2422
2423 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2424         .get_modes = intel_sdvo_get_modes,
2425         .mode_valid = intel_sdvo_mode_valid,
2426         .atomic_check = intel_sdvo_atomic_check,
2427 };
2428
2429 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
2430 {
2431         struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder));
2432
2433         i2c_del_adapter(&intel_sdvo->ddc);
2434         intel_encoder_destroy(encoder);
2435 }
2436
2437 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2438         .destroy = intel_sdvo_enc_destroy,
2439 };
2440
2441 static void
2442 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2443 {
2444         u16 mask = 0;
2445         unsigned int num_bits;
2446
2447         /*
2448          * Make a mask of outputs less than or equal to our own priority in the
2449          * list.
2450          */
2451         switch (sdvo->controlled_output) {
2452         case SDVO_OUTPUT_LVDS1:
2453                 mask |= SDVO_OUTPUT_LVDS1;
2454                 /* fall through */
2455         case SDVO_OUTPUT_LVDS0:
2456                 mask |= SDVO_OUTPUT_LVDS0;
2457                 /* fall through */
2458         case SDVO_OUTPUT_TMDS1:
2459                 mask |= SDVO_OUTPUT_TMDS1;
2460                 /* fall through */
2461         case SDVO_OUTPUT_TMDS0:
2462                 mask |= SDVO_OUTPUT_TMDS0;
2463                 /* fall through */
2464         case SDVO_OUTPUT_RGB1:
2465                 mask |= SDVO_OUTPUT_RGB1;
2466                 /* fall through */
2467         case SDVO_OUTPUT_RGB0:
2468                 mask |= SDVO_OUTPUT_RGB0;
2469                 break;
2470         }
2471
2472         /* Count bits to find what number we are in the priority list. */
2473         mask &= sdvo->caps.output_flags;
2474         num_bits = hweight16(mask);
2475         /* If more than 3 outputs, default to DDC bus 3 for now. */
2476         if (num_bits > 3)
2477                 num_bits = 3;
2478
2479         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2480         sdvo->ddc_bus = 1 << num_bits;
2481 }
2482
2483 /*
2484  * Choose the appropriate DDC bus for control bus switch command for this
2485  * SDVO output based on the controlled output.
2486  *
2487  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2488  * outputs, then LVDS outputs.
2489  */
2490 static void
2491 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2492                           struct intel_sdvo *sdvo)
2493 {
2494         struct sdvo_device_mapping *mapping;
2495
2496         if (sdvo->port == PORT_B)
2497                 mapping = &dev_priv->vbt.sdvo_mappings[0];
2498         else
2499                 mapping = &dev_priv->vbt.sdvo_mappings[1];
2500
2501         if (mapping->initialized)
2502                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2503         else
2504                 intel_sdvo_guess_ddc_bus(sdvo);
2505 }
2506
2507 static void
2508 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2509                           struct intel_sdvo *sdvo)
2510 {
2511         struct sdvo_device_mapping *mapping;
2512         u8 pin;
2513
2514         if (sdvo->port == PORT_B)
2515                 mapping = &dev_priv->vbt.sdvo_mappings[0];
2516         else
2517                 mapping = &dev_priv->vbt.sdvo_mappings[1];
2518
2519         if (mapping->initialized &&
2520             intel_gmbus_is_valid_pin(dev_priv, mapping->i2c_pin))
2521                 pin = mapping->i2c_pin;
2522         else
2523                 pin = GMBUS_PIN_DPB;
2524
2525         sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2526
2527         /*
2528          * With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2529          * our code totally fails once we start using gmbus. Hence fall back to
2530          * bit banging for now.
2531          */
2532         intel_gmbus_force_bit(sdvo->i2c, true);
2533 }
2534
2535 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2536 static void
2537 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2538 {
2539         intel_gmbus_force_bit(sdvo->i2c, false);
2540 }
2541
2542 static bool
2543 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
2544 {
2545         return intel_sdvo_check_supp_encode(intel_sdvo);
2546 }
2547
2548 static u8
2549 intel_sdvo_get_slave_addr(struct drm_i915_private *dev_priv,
2550                           struct intel_sdvo *sdvo)
2551 {
2552         struct sdvo_device_mapping *my_mapping, *other_mapping;
2553
2554         if (sdvo->port == PORT_B) {
2555                 my_mapping = &dev_priv->vbt.sdvo_mappings[0];
2556                 other_mapping = &dev_priv->vbt.sdvo_mappings[1];
2557         } else {
2558                 my_mapping = &dev_priv->vbt.sdvo_mappings[1];
2559                 other_mapping = &dev_priv->vbt.sdvo_mappings[0];
2560         }
2561
2562         /* If the BIOS described our SDVO device, take advantage of it. */
2563         if (my_mapping->slave_addr)
2564                 return my_mapping->slave_addr;
2565
2566         /*
2567          * If the BIOS only described a different SDVO device, use the
2568          * address that it isn't using.
2569          */
2570         if (other_mapping->slave_addr) {
2571                 if (other_mapping->slave_addr == 0x70)
2572                         return 0x72;
2573                 else
2574                         return 0x70;
2575         }
2576
2577         /*
2578          * No SDVO device info is found for another DVO port,
2579          * so use mapping assumption we had before BIOS parsing.
2580          */
2581         if (sdvo->port == PORT_B)
2582                 return 0x70;
2583         else
2584                 return 0x72;
2585 }
2586
2587 static int
2588 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2589                           struct intel_sdvo *encoder)
2590 {
2591         struct drm_connector *drm_connector;
2592         int ret;
2593
2594         drm_connector = &connector->base.base;
2595         ret = drm_connector_init(encoder->base.base.dev,
2596                            drm_connector,
2597                            &intel_sdvo_connector_funcs,
2598                            connector->base.base.connector_type);
2599         if (ret < 0)
2600                 return ret;
2601
2602         drm_connector_helper_add(drm_connector,
2603                                  &intel_sdvo_connector_helper_funcs);
2604
2605         connector->base.base.interlace_allowed = 1;
2606         connector->base.base.doublescan_allowed = 0;
2607         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2608         connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2609
2610         intel_connector_attach_encoder(&connector->base, &encoder->base);
2611
2612         return 0;
2613 }
2614
2615 static void
2616 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
2617                                struct intel_sdvo_connector *connector)
2618 {
2619         struct drm_i915_private *dev_priv = to_i915(connector->base.base.dev);
2620
2621         intel_attach_force_audio_property(&connector->base.base);
2622         if (INTEL_GEN(dev_priv) >= 4 && IS_MOBILE(dev_priv)) {
2623                 intel_attach_broadcast_rgb_property(&connector->base.base);
2624         }
2625         intel_attach_aspect_ratio_property(&connector->base.base);
2626         connector->base.base.state->picture_aspect_ratio = HDMI_PICTURE_ASPECT_NONE;
2627 }
2628
2629 static struct intel_sdvo_connector *intel_sdvo_connector_alloc(void)
2630 {
2631         struct intel_sdvo_connector *sdvo_connector;
2632         struct intel_sdvo_connector_state *conn_state;
2633
2634         sdvo_connector = kzalloc(sizeof(*sdvo_connector), GFP_KERNEL);
2635         if (!sdvo_connector)
2636                 return NULL;
2637
2638         conn_state = kzalloc(sizeof(*conn_state), GFP_KERNEL);
2639         if (!conn_state) {
2640                 kfree(sdvo_connector);
2641                 return NULL;
2642         }
2643
2644         __drm_atomic_helper_connector_reset(&sdvo_connector->base.base,
2645                                             &conn_state->base.base);
2646
2647         return sdvo_connector;
2648 }
2649
2650 static bool
2651 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2652 {
2653         struct drm_encoder *encoder = &intel_sdvo->base.base;
2654         struct drm_connector *connector;
2655         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2656         struct intel_connector *intel_connector;
2657         struct intel_sdvo_connector *intel_sdvo_connector;
2658
2659         DRM_DEBUG_KMS("initialising DVI device %d\n", device);
2660
2661         intel_sdvo_connector = intel_sdvo_connector_alloc();
2662         if (!intel_sdvo_connector)
2663                 return false;
2664
2665         if (device == 0) {
2666                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2667                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2668         } else if (device == 1) {
2669                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2670                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2671         }
2672
2673         intel_connector = &intel_sdvo_connector->base;
2674         connector = &intel_connector->base;
2675         if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2676                 intel_sdvo_connector->output_flag) {
2677                 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2678                 /*
2679                  * Some SDVO devices have one-shot hotplug interrupts.
2680                  * Ensure that they get re-enabled when an interrupt happens.
2681                  */
2682                 intel_encoder->hotplug = intel_sdvo_hotplug;
2683                 intel_sdvo_enable_hotplug(intel_encoder);
2684         } else {
2685                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2686         }
2687         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2688         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2689
2690         if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2691                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2692                 intel_sdvo_connector->is_hdmi = true;
2693         }
2694
2695         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2696                 kfree(intel_sdvo_connector);
2697                 return false;
2698         }
2699
2700         if (intel_sdvo_connector->is_hdmi)
2701                 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
2702
2703         return true;
2704 }
2705
2706 static bool
2707 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2708 {
2709         struct drm_encoder *encoder = &intel_sdvo->base.base;
2710         struct drm_connector *connector;
2711         struct intel_connector *intel_connector;
2712         struct intel_sdvo_connector *intel_sdvo_connector;
2713
2714         DRM_DEBUG_KMS("initialising TV type %d\n", type);
2715
2716         intel_sdvo_connector = intel_sdvo_connector_alloc();
2717         if (!intel_sdvo_connector)
2718                 return false;
2719
2720         intel_connector = &intel_sdvo_connector->base;
2721         connector = &intel_connector->base;
2722         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2723         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2724
2725         intel_sdvo->controlled_output |= type;
2726         intel_sdvo_connector->output_flag = type;
2727
2728         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2729                 kfree(intel_sdvo_connector);
2730                 return false;
2731         }
2732
2733         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2734                 goto err;
2735
2736         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2737                 goto err;
2738
2739         return true;
2740
2741 err:
2742         intel_connector_destroy(connector);
2743         return false;
2744 }
2745
2746 static bool
2747 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2748 {
2749         struct drm_encoder *encoder = &intel_sdvo->base.base;
2750         struct drm_connector *connector;
2751         struct intel_connector *intel_connector;
2752         struct intel_sdvo_connector *intel_sdvo_connector;
2753
2754         DRM_DEBUG_KMS("initialising analog device %d\n", device);
2755
2756         intel_sdvo_connector = intel_sdvo_connector_alloc();
2757         if (!intel_sdvo_connector)
2758                 return false;
2759
2760         intel_connector = &intel_sdvo_connector->base;
2761         connector = &intel_connector->base;
2762         intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2763         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2764         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2765
2766         if (device == 0) {
2767                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2768                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2769         } else if (device == 1) {
2770                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2771                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2772         }
2773
2774         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2775                 kfree(intel_sdvo_connector);
2776                 return false;
2777         }
2778
2779         return true;
2780 }
2781
2782 static bool
2783 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2784 {
2785         struct drm_encoder *encoder = &intel_sdvo->base.base;
2786         struct drm_connector *connector;
2787         struct intel_connector *intel_connector;
2788         struct intel_sdvo_connector *intel_sdvo_connector;
2789         struct drm_display_mode *mode;
2790
2791         DRM_DEBUG_KMS("initialising LVDS device %d\n", device);
2792
2793         intel_sdvo_connector = intel_sdvo_connector_alloc();
2794         if (!intel_sdvo_connector)
2795                 return false;
2796
2797         intel_connector = &intel_sdvo_connector->base;
2798         connector = &intel_connector->base;
2799         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2800         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2801
2802         if (device == 0) {
2803                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2804                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2805         } else if (device == 1) {
2806                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2807                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2808         }
2809
2810         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2811                 kfree(intel_sdvo_connector);
2812                 return false;
2813         }
2814
2815         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2816                 goto err;
2817
2818         intel_sdvo_get_lvds_modes(connector);
2819
2820         list_for_each_entry(mode, &connector->probed_modes, head) {
2821                 if (mode->type & DRM_MODE_TYPE_PREFERRED) {
2822                         struct drm_display_mode *fixed_mode =
2823                                 drm_mode_duplicate(connector->dev, mode);
2824
2825                         intel_panel_init(&intel_connector->panel,
2826                                          fixed_mode, NULL);
2827                         break;
2828                 }
2829         }
2830
2831         if (!intel_connector->panel.fixed_mode)
2832                 goto err;
2833
2834         return true;
2835
2836 err:
2837         intel_connector_destroy(connector);
2838         return false;
2839 }
2840
2841 static bool
2842 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, u16 flags)
2843 {
2844         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2845
2846         if (flags & SDVO_OUTPUT_TMDS0)
2847                 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2848                         return false;
2849
2850         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2851                 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2852                         return false;
2853
2854         /* TV has no XXX1 function block */
2855         if (flags & SDVO_OUTPUT_SVID0)
2856                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2857                         return false;
2858
2859         if (flags & SDVO_OUTPUT_CVBS0)
2860                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2861                         return false;
2862
2863         if (flags & SDVO_OUTPUT_YPRPB0)
2864                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2865                         return false;
2866
2867         if (flags & SDVO_OUTPUT_RGB0)
2868                 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2869                         return false;
2870
2871         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2872                 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2873                         return false;
2874
2875         if (flags & SDVO_OUTPUT_LVDS0)
2876                 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2877                         return false;
2878
2879         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2880                 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2881                         return false;
2882
2883         if ((flags & SDVO_OUTPUT_MASK) == 0) {
2884                 unsigned char bytes[2];
2885
2886                 intel_sdvo->controlled_output = 0;
2887                 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2888                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2889                               SDVO_NAME(intel_sdvo),
2890                               bytes[0], bytes[1]);
2891                 return false;
2892         }
2893         intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2894
2895         return true;
2896 }
2897
2898 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2899 {
2900         struct drm_device *dev = intel_sdvo->base.base.dev;
2901         struct drm_connector *connector, *tmp;
2902
2903         list_for_each_entry_safe(connector, tmp,
2904                                  &dev->mode_config.connector_list, head) {
2905                 if (intel_attached_encoder(connector) == &intel_sdvo->base) {
2906                         drm_connector_unregister(connector);
2907                         intel_connector_destroy(connector);
2908                 }
2909         }
2910 }
2911
2912 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2913                                           struct intel_sdvo_connector *intel_sdvo_connector,
2914                                           int type)
2915 {
2916         struct drm_device *dev = intel_sdvo->base.base.dev;
2917         struct intel_sdvo_tv_format format;
2918         u32 format_map, i;
2919
2920         if (!intel_sdvo_set_target_output(intel_sdvo, type))
2921                 return false;
2922
2923         BUILD_BUG_ON(sizeof(format) != 6);
2924         if (!intel_sdvo_get_value(intel_sdvo,
2925                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2926                                   &format, sizeof(format)))
2927                 return false;
2928
2929         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2930
2931         if (format_map == 0)
2932                 return false;
2933
2934         intel_sdvo_connector->format_supported_num = 0;
2935         for (i = 0 ; i < TV_FORMAT_NUM; i++)
2936                 if (format_map & (1 << i))
2937                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2938
2939
2940         intel_sdvo_connector->tv_format =
2941                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
2942                                             "mode", intel_sdvo_connector->format_supported_num);
2943         if (!intel_sdvo_connector->tv_format)
2944                 return false;
2945
2946         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2947                 drm_property_add_enum(intel_sdvo_connector->tv_format, i,
2948                                       tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2949
2950         intel_sdvo_connector->base.base.state->tv.mode = intel_sdvo_connector->tv_format_supported[0];
2951         drm_object_attach_property(&intel_sdvo_connector->base.base.base,
2952                                    intel_sdvo_connector->tv_format, 0);
2953         return true;
2954
2955 }
2956
2957 #define _ENHANCEMENT(state_assignment, name, NAME) do { \
2958         if (enhancements.name) { \
2959                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2960                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2961                         return false; \
2962                 intel_sdvo_connector->name = \
2963                         drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2964                 if (!intel_sdvo_connector->name) return false; \
2965                 state_assignment = response; \
2966                 drm_object_attach_property(&connector->base, \
2967                                            intel_sdvo_connector->name, 0); \
2968                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2969                               data_value[0], data_value[1], response); \
2970         } \
2971 } while (0)
2972
2973 #define ENHANCEMENT(state, name, NAME) _ENHANCEMENT((state)->name, name, NAME)
2974
2975 static bool
2976 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2977                                       struct intel_sdvo_connector *intel_sdvo_connector,
2978                                       struct intel_sdvo_enhancements_reply enhancements)
2979 {
2980         struct drm_device *dev = intel_sdvo->base.base.dev;
2981         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2982         struct drm_connector_state *conn_state = connector->state;
2983         struct intel_sdvo_connector_state *sdvo_state =
2984                 to_intel_sdvo_connector_state(conn_state);
2985         u16 response, data_value[2];
2986
2987         /* when horizontal overscan is supported, Add the left/right property */
2988         if (enhancements.overscan_h) {
2989                 if (!intel_sdvo_get_value(intel_sdvo,
2990                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
2991                                           &data_value, 4))
2992                         return false;
2993
2994                 if (!intel_sdvo_get_value(intel_sdvo,
2995                                           SDVO_CMD_GET_OVERSCAN_H,
2996                                           &response, 2))
2997                         return false;
2998
2999                 sdvo_state->tv.overscan_h = response;
3000
3001                 intel_sdvo_connector->max_hscan = data_value[0];
3002                 intel_sdvo_connector->left =
3003                         drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
3004                 if (!intel_sdvo_connector->left)
3005                         return false;
3006
3007                 drm_object_attach_property(&connector->base,
3008                                            intel_sdvo_connector->left, 0);
3009
3010                 intel_sdvo_connector->right =
3011                         drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
3012                 if (!intel_sdvo_connector->right)
3013                         return false;
3014
3015                 drm_object_attach_property(&connector->base,
3016                                               intel_sdvo_connector->right, 0);
3017                 DRM_DEBUG_KMS("h_overscan: max %d, "
3018                               "default %d, current %d\n",
3019                               data_value[0], data_value[1], response);
3020         }
3021
3022         if (enhancements.overscan_v) {
3023                 if (!intel_sdvo_get_value(intel_sdvo,
3024                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
3025                                           &data_value, 4))
3026                         return false;
3027
3028                 if (!intel_sdvo_get_value(intel_sdvo,
3029                                           SDVO_CMD_GET_OVERSCAN_V,
3030                                           &response, 2))
3031                         return false;
3032
3033                 sdvo_state->tv.overscan_v = response;
3034
3035                 intel_sdvo_connector->max_vscan = data_value[0];
3036                 intel_sdvo_connector->top =
3037                         drm_property_create_range(dev, 0,
3038                                             "top_margin", 0, data_value[0]);
3039                 if (!intel_sdvo_connector->top)
3040                         return false;
3041
3042                 drm_object_attach_property(&connector->base,
3043                                            intel_sdvo_connector->top, 0);
3044
3045                 intel_sdvo_connector->bottom =
3046                         drm_property_create_range(dev, 0,
3047                                             "bottom_margin", 0, data_value[0]);
3048                 if (!intel_sdvo_connector->bottom)
3049                         return false;
3050
3051                 drm_object_attach_property(&connector->base,
3052                                               intel_sdvo_connector->bottom, 0);
3053                 DRM_DEBUG_KMS("v_overscan: max %d, "
3054                               "default %d, current %d\n",
3055                               data_value[0], data_value[1], response);
3056         }
3057
3058         ENHANCEMENT(&sdvo_state->tv, hpos, HPOS);
3059         ENHANCEMENT(&sdvo_state->tv, vpos, VPOS);
3060         ENHANCEMENT(&conn_state->tv, saturation, SATURATION);
3061         ENHANCEMENT(&conn_state->tv, contrast, CONTRAST);
3062         ENHANCEMENT(&conn_state->tv, hue, HUE);
3063         ENHANCEMENT(&conn_state->tv, brightness, BRIGHTNESS);
3064         ENHANCEMENT(&sdvo_state->tv, sharpness, SHARPNESS);
3065         ENHANCEMENT(&sdvo_state->tv, flicker_filter, FLICKER_FILTER);
3066         ENHANCEMENT(&sdvo_state->tv, flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
3067         ENHANCEMENT(&sdvo_state->tv, flicker_filter_2d, FLICKER_FILTER_2D);
3068         _ENHANCEMENT(sdvo_state->tv.chroma_filter, tv_chroma_filter, TV_CHROMA_FILTER);
3069         _ENHANCEMENT(sdvo_state->tv.luma_filter, tv_luma_filter, TV_LUMA_FILTER);
3070
3071         if (enhancements.dot_crawl) {
3072                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
3073                         return false;
3074
3075                 sdvo_state->tv.dot_crawl = response & 0x1;
3076                 intel_sdvo_connector->dot_crawl =
3077                         drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
3078                 if (!intel_sdvo_connector->dot_crawl)
3079                         return false;
3080
3081                 drm_object_attach_property(&connector->base,
3082                                            intel_sdvo_connector->dot_crawl, 0);
3083                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
3084         }
3085
3086         return true;
3087 }
3088
3089 static bool
3090 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
3091                                         struct intel_sdvo_connector *intel_sdvo_connector,
3092                                         struct intel_sdvo_enhancements_reply enhancements)
3093 {
3094         struct drm_device *dev = intel_sdvo->base.base.dev;
3095         struct drm_connector *connector = &intel_sdvo_connector->base.base;
3096         u16 response, data_value[2];
3097
3098         ENHANCEMENT(&connector->state->tv, brightness, BRIGHTNESS);
3099
3100         return true;
3101 }
3102 #undef ENHANCEMENT
3103 #undef _ENHANCEMENT
3104
3105 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
3106                                                struct intel_sdvo_connector *intel_sdvo_connector)
3107 {
3108         union {
3109                 struct intel_sdvo_enhancements_reply reply;
3110                 u16 response;
3111         } enhancements;
3112
3113         BUILD_BUG_ON(sizeof(enhancements) != 2);
3114
3115         if (!intel_sdvo_get_value(intel_sdvo,
3116                                   SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
3117                                   &enhancements, sizeof(enhancements)) ||
3118             enhancements.response == 0) {
3119                 DRM_DEBUG_KMS("No enhancement is supported\n");
3120                 return true;
3121         }
3122
3123         if (IS_TV(intel_sdvo_connector))
3124                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
3125         else if (IS_LVDS(intel_sdvo_connector))
3126                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
3127         else
3128                 return true;
3129 }
3130
3131 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
3132                                      struct i2c_msg *msgs,
3133                                      int num)
3134 {
3135         struct intel_sdvo *sdvo = adapter->algo_data;
3136
3137         if (!__intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
3138                 return -EIO;
3139
3140         return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
3141 }
3142
3143 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
3144 {
3145         struct intel_sdvo *sdvo = adapter->algo_data;
3146         return sdvo->i2c->algo->functionality(sdvo->i2c);
3147 }
3148
3149 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
3150         .master_xfer    = intel_sdvo_ddc_proxy_xfer,
3151         .functionality  = intel_sdvo_ddc_proxy_func
3152 };
3153
3154 static void proxy_lock_bus(struct i2c_adapter *adapter,
3155                            unsigned int flags)
3156 {
3157         struct intel_sdvo *sdvo = adapter->algo_data;
3158         sdvo->i2c->lock_ops->lock_bus(sdvo->i2c, flags);
3159 }
3160
3161 static int proxy_trylock_bus(struct i2c_adapter *adapter,
3162                              unsigned int flags)
3163 {
3164         struct intel_sdvo *sdvo = adapter->algo_data;
3165         return sdvo->i2c->lock_ops->trylock_bus(sdvo->i2c, flags);
3166 }
3167
3168 static void proxy_unlock_bus(struct i2c_adapter *adapter,
3169                              unsigned int flags)
3170 {
3171         struct intel_sdvo *sdvo = adapter->algo_data;
3172         sdvo->i2c->lock_ops->unlock_bus(sdvo->i2c, flags);
3173 }
3174
3175 static const struct i2c_lock_operations proxy_lock_ops = {
3176         .lock_bus =    proxy_lock_bus,
3177         .trylock_bus = proxy_trylock_bus,
3178         .unlock_bus =  proxy_unlock_bus,
3179 };
3180
3181 static bool
3182 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
3183                           struct drm_i915_private *dev_priv)
3184 {
3185         struct pci_dev *pdev = dev_priv->drm.pdev;
3186
3187         sdvo->ddc.owner = THIS_MODULE;
3188         sdvo->ddc.class = I2C_CLASS_DDC;
3189         snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
3190         sdvo->ddc.dev.parent = &pdev->dev;
3191         sdvo->ddc.algo_data = sdvo;
3192         sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
3193         sdvo->ddc.lock_ops = &proxy_lock_ops;
3194
3195         return i2c_add_adapter(&sdvo->ddc) == 0;
3196 }
3197
3198 static void assert_sdvo_port_valid(const struct drm_i915_private *dev_priv,
3199                                    enum port port)
3200 {
3201         if (HAS_PCH_SPLIT(dev_priv))
3202                 WARN_ON(port != PORT_B);
3203         else
3204                 WARN_ON(port != PORT_B && port != PORT_C);
3205 }
3206
3207 bool intel_sdvo_init(struct drm_i915_private *dev_priv,
3208                      i915_reg_t sdvo_reg, enum port port)
3209 {
3210         struct intel_encoder *intel_encoder;
3211         struct intel_sdvo *intel_sdvo;
3212         int i;
3213
3214         assert_sdvo_port_valid(dev_priv, port);
3215
3216         intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL);
3217         if (!intel_sdvo)
3218                 return false;
3219
3220         intel_sdvo->sdvo_reg = sdvo_reg;
3221         intel_sdvo->port = port;
3222         intel_sdvo->slave_addr =
3223                 intel_sdvo_get_slave_addr(dev_priv, intel_sdvo) >> 1;
3224         intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo);
3225         if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev_priv))
3226                 goto err_i2c_bus;
3227
3228         /* encoder type will be decided later */
3229         intel_encoder = &intel_sdvo->base;
3230         intel_encoder->type = INTEL_OUTPUT_SDVO;
3231         intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
3232         intel_encoder->port = port;
3233         drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
3234                          &intel_sdvo_enc_funcs, 0,
3235                          "SDVO %c", port_name(port));
3236
3237         /* Read the regs to test if we can talk to the device */
3238         for (i = 0; i < 0x40; i++) {
3239                 u8 byte;
3240
3241                 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
3242                         DRM_DEBUG_KMS("No SDVO device found on %s\n",
3243                                       SDVO_NAME(intel_sdvo));
3244                         goto err;
3245                 }
3246         }
3247
3248         intel_encoder->compute_config = intel_sdvo_compute_config;
3249         if (HAS_PCH_SPLIT(dev_priv)) {
3250                 intel_encoder->disable = pch_disable_sdvo;
3251                 intel_encoder->post_disable = pch_post_disable_sdvo;
3252         } else {
3253                 intel_encoder->disable = intel_disable_sdvo;
3254         }
3255         intel_encoder->pre_enable = intel_sdvo_pre_enable;
3256         intel_encoder->enable = intel_enable_sdvo;
3257         intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
3258         intel_encoder->get_config = intel_sdvo_get_config;
3259
3260         /* In default case sdvo lvds is false */
3261         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
3262                 goto err;
3263
3264         if (intel_sdvo_output_setup(intel_sdvo,
3265                                     intel_sdvo->caps.output_flags) != true) {
3266                 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
3267                               SDVO_NAME(intel_sdvo));
3268                 /* Output_setup can leave behind connectors! */
3269                 goto err_output;
3270         }
3271
3272         /*
3273          * Only enable the hotplug irq if we need it, to work around noisy
3274          * hotplug lines.
3275          */
3276         if (intel_sdvo->hotplug_active) {
3277                 if (intel_sdvo->port == PORT_B)
3278                         intel_encoder->hpd_pin = HPD_SDVO_B;
3279                 else
3280                         intel_encoder->hpd_pin = HPD_SDVO_C;
3281         }
3282
3283         /*
3284          * Cloning SDVO with anything is often impossible, since the SDVO
3285          * encoder can request a special input timing mode. And even if that's
3286          * not the case we have evidence that cloning a plain unscaled mode with
3287          * VGA doesn't really work. Furthermore the cloning flags are way too
3288          * simplistic anyway to express such constraints, so just give up on
3289          * cloning for SDVO encoders.
3290          */
3291         intel_sdvo->base.cloneable = 0;
3292
3293         intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo);
3294
3295         /* Set the input timing to the screen. Assume always input 0. */
3296         if (!intel_sdvo_set_target_input(intel_sdvo))
3297                 goto err_output;
3298
3299         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
3300                                                     &intel_sdvo->pixel_clock_min,
3301                                                     &intel_sdvo->pixel_clock_max))
3302                 goto err_output;
3303
3304         DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
3305                         "clock range %dMHz - %dMHz, "
3306                         "input 1: %c, input 2: %c, "
3307                         "output 1: %c, output 2: %c\n",
3308                         SDVO_NAME(intel_sdvo),
3309                         intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
3310                         intel_sdvo->caps.device_rev_id,
3311                         intel_sdvo->pixel_clock_min / 1000,
3312                         intel_sdvo->pixel_clock_max / 1000,
3313                         (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
3314                         (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
3315                         /* check currently supported outputs */
3316                         intel_sdvo->caps.output_flags &
3317                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
3318                         intel_sdvo->caps.output_flags &
3319                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
3320         return true;
3321
3322 err_output:
3323         intel_sdvo_output_cleanup(intel_sdvo);
3324
3325 err:
3326         drm_encoder_cleanup(&intel_encoder->base);
3327         i2c_del_adapter(&intel_sdvo->ddc);
3328 err_i2c_bus:
3329         intel_sdvo_unselect_i2c_bus(intel_sdvo);
3330         kfree(intel_sdvo);
3331
3332         return false;
3333 }