drm/i915/icl: Fixed Input CSC Co-efficients for BT601/709
[sfrench/cifs-2.6.git] / drivers / gpu / drm / i915 / display / intel_sdvo.c
1 /*
2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
3  * Copyright © 2006-2007 Intel Corporation
4  *   Jesse Barnes <jesse.barnes@intel.com>
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice (including the next
14  * paragraph) shall be included in all copies or substantial portions of the
15  * Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23  * DEALINGS IN THE SOFTWARE.
24  *
25  * Authors:
26  *      Eric Anholt <eric@anholt.net>
27  */
28
29 #include <linux/delay.h>
30 #include <linux/export.h>
31 #include <linux/i2c.h>
32 #include <linux/slab.h>
33
34 #include <drm/drm_atomic_helper.h>
35 #include <drm/drm_crtc.h>
36 #include <drm/drm_edid.h>
37 #include <drm/i915_drm.h>
38
39 #include "i915_drv.h"
40 #include "intel_atomic.h"
41 #include "intel_connector.h"
42 #include "intel_drv.h"
43 #include "intel_fifo_underrun.h"
44 #include "intel_gmbus.h"
45 #include "intel_hdmi.h"
46 #include "intel_hotplug.h"
47 #include "intel_panel.h"
48 #include "intel_sdvo.h"
49 #include "intel_sdvo_regs.h"
50
51 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
52 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
53 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
54 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
55
56 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
57                         SDVO_TV_MASK)
58
59 #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
60 #define IS_TMDS(c)      (c->output_flag & SDVO_TMDS_MASK)
61 #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
62 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
63 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
64
65
66 static const char * const tv_format_names[] = {
67         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
68         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
69         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
70         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
71         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
72         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
73         "SECAM_60"
74 };
75
76 #define TV_FORMAT_NUM  ARRAY_SIZE(tv_format_names)
77
78 struct intel_sdvo {
79         struct intel_encoder base;
80
81         struct i2c_adapter *i2c;
82         u8 slave_addr;
83
84         struct i2c_adapter ddc;
85
86         /* Register for the SDVO device: SDVOB or SDVOC */
87         i915_reg_t sdvo_reg;
88
89         /* Active outputs controlled by this SDVO output */
90         u16 controlled_output;
91
92         /*
93          * Capabilities of the SDVO device returned by
94          * intel_sdvo_get_capabilities()
95          */
96         struct intel_sdvo_caps caps;
97
98         /* Pixel clock limitations reported by the SDVO device, in kHz */
99         int pixel_clock_min, pixel_clock_max;
100
101         /*
102         * For multiple function SDVO device,
103         * this is for current attached outputs.
104         */
105         u16 attached_output;
106
107         /*
108          * Hotplug activation bits for this device
109          */
110         u16 hotplug_active;
111
112         enum port port;
113
114         bool has_hdmi_monitor;
115         bool has_hdmi_audio;
116
117         /* DDC bus used by this SDVO encoder */
118         u8 ddc_bus;
119
120         /*
121          * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
122          */
123         u8 dtd_sdvo_flags;
124 };
125
126 struct intel_sdvo_connector {
127         struct intel_connector base;
128
129         /* Mark the type of connector */
130         u16 output_flag;
131
132         /* This contains all current supported TV format */
133         u8 tv_format_supported[TV_FORMAT_NUM];
134         int   format_supported_num;
135         struct drm_property *tv_format;
136
137         /* add the property for the SDVO-TV */
138         struct drm_property *left;
139         struct drm_property *right;
140         struct drm_property *top;
141         struct drm_property *bottom;
142         struct drm_property *hpos;
143         struct drm_property *vpos;
144         struct drm_property *contrast;
145         struct drm_property *saturation;
146         struct drm_property *hue;
147         struct drm_property *sharpness;
148         struct drm_property *flicker_filter;
149         struct drm_property *flicker_filter_adaptive;
150         struct drm_property *flicker_filter_2d;
151         struct drm_property *tv_chroma_filter;
152         struct drm_property *tv_luma_filter;
153         struct drm_property *dot_crawl;
154
155         /* add the property for the SDVO-TV/LVDS */
156         struct drm_property *brightness;
157
158         /* this is to get the range of margin.*/
159         u32 max_hscan, max_vscan;
160
161         /**
162          * This is set if we treat the device as HDMI, instead of DVI.
163          */
164         bool is_hdmi;
165 };
166
167 struct intel_sdvo_connector_state {
168         /* base.base: tv.saturation/contrast/hue/brightness */
169         struct intel_digital_connector_state base;
170
171         struct {
172                 unsigned overscan_h, overscan_v, hpos, vpos, sharpness;
173                 unsigned flicker_filter, flicker_filter_2d, flicker_filter_adaptive;
174                 unsigned chroma_filter, luma_filter, dot_crawl;
175         } tv;
176 };
177
178 static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder)
179 {
180         return container_of(encoder, struct intel_sdvo, base);
181 }
182
183 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
184 {
185         return to_sdvo(intel_attached_encoder(connector));
186 }
187
188 static struct intel_sdvo_connector *
189 to_intel_sdvo_connector(struct drm_connector *connector)
190 {
191         return container_of(connector, struct intel_sdvo_connector, base.base);
192 }
193
194 #define to_intel_sdvo_connector_state(conn_state) \
195         container_of((conn_state), struct intel_sdvo_connector_state, base.base)
196
197 static bool
198 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, u16 flags);
199 static bool
200 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
201                               struct intel_sdvo_connector *intel_sdvo_connector,
202                               int type);
203 static bool
204 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
205                                    struct intel_sdvo_connector *intel_sdvo_connector);
206
207 /*
208  * Writes the SDVOB or SDVOC with the given value, but always writes both
209  * SDVOB and SDVOC to work around apparent hardware issues (according to
210  * comments in the BIOS).
211  */
212 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
213 {
214         struct drm_device *dev = intel_sdvo->base.base.dev;
215         struct drm_i915_private *dev_priv = to_i915(dev);
216         u32 bval = val, cval = val;
217         int i;
218
219         if (HAS_PCH_SPLIT(dev_priv)) {
220                 I915_WRITE(intel_sdvo->sdvo_reg, val);
221                 POSTING_READ(intel_sdvo->sdvo_reg);
222                 /*
223                  * HW workaround, need to write this twice for issue
224                  * that may result in first write getting masked.
225                  */
226                 if (HAS_PCH_IBX(dev_priv)) {
227                         I915_WRITE(intel_sdvo->sdvo_reg, val);
228                         POSTING_READ(intel_sdvo->sdvo_reg);
229                 }
230                 return;
231         }
232
233         if (intel_sdvo->port == PORT_B)
234                 cval = I915_READ(GEN3_SDVOC);
235         else
236                 bval = I915_READ(GEN3_SDVOB);
237
238         /*
239          * Write the registers twice for luck. Sometimes,
240          * writing them only once doesn't appear to 'stick'.
241          * The BIOS does this too. Yay, magic
242          */
243         for (i = 0; i < 2; i++) {
244                 I915_WRITE(GEN3_SDVOB, bval);
245                 POSTING_READ(GEN3_SDVOB);
246
247                 I915_WRITE(GEN3_SDVOC, cval);
248                 POSTING_READ(GEN3_SDVOC);
249         }
250 }
251
252 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
253 {
254         struct i2c_msg msgs[] = {
255                 {
256                         .addr = intel_sdvo->slave_addr,
257                         .flags = 0,
258                         .len = 1,
259                         .buf = &addr,
260                 },
261                 {
262                         .addr = intel_sdvo->slave_addr,
263                         .flags = I2C_M_RD,
264                         .len = 1,
265                         .buf = ch,
266                 }
267         };
268         int ret;
269
270         if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
271                 return true;
272
273         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
274         return false;
275 }
276
277 #define SDVO_CMD_NAME_ENTRY(cmd_) { .cmd = SDVO_CMD_ ## cmd_, .name = #cmd_ }
278
279 /** Mapping of command numbers to names, for debug output */
280 static const struct {
281         u8 cmd;
282         const char *name;
283 } __attribute__ ((packed)) sdvo_cmd_names[] = {
284         SDVO_CMD_NAME_ENTRY(RESET),
285         SDVO_CMD_NAME_ENTRY(GET_DEVICE_CAPS),
286         SDVO_CMD_NAME_ENTRY(GET_FIRMWARE_REV),
287         SDVO_CMD_NAME_ENTRY(GET_TRAINED_INPUTS),
288         SDVO_CMD_NAME_ENTRY(GET_ACTIVE_OUTPUTS),
289         SDVO_CMD_NAME_ENTRY(SET_ACTIVE_OUTPUTS),
290         SDVO_CMD_NAME_ENTRY(GET_IN_OUT_MAP),
291         SDVO_CMD_NAME_ENTRY(SET_IN_OUT_MAP),
292         SDVO_CMD_NAME_ENTRY(GET_ATTACHED_DISPLAYS),
293         SDVO_CMD_NAME_ENTRY(GET_HOT_PLUG_SUPPORT),
294         SDVO_CMD_NAME_ENTRY(SET_ACTIVE_HOT_PLUG),
295         SDVO_CMD_NAME_ENTRY(GET_ACTIVE_HOT_PLUG),
296         SDVO_CMD_NAME_ENTRY(GET_INTERRUPT_EVENT_SOURCE),
297         SDVO_CMD_NAME_ENTRY(SET_TARGET_INPUT),
298         SDVO_CMD_NAME_ENTRY(SET_TARGET_OUTPUT),
299         SDVO_CMD_NAME_ENTRY(GET_INPUT_TIMINGS_PART1),
300         SDVO_CMD_NAME_ENTRY(GET_INPUT_TIMINGS_PART2),
301         SDVO_CMD_NAME_ENTRY(SET_INPUT_TIMINGS_PART1),
302         SDVO_CMD_NAME_ENTRY(SET_INPUT_TIMINGS_PART2),
303         SDVO_CMD_NAME_ENTRY(SET_OUTPUT_TIMINGS_PART1),
304         SDVO_CMD_NAME_ENTRY(SET_OUTPUT_TIMINGS_PART2),
305         SDVO_CMD_NAME_ENTRY(GET_OUTPUT_TIMINGS_PART1),
306         SDVO_CMD_NAME_ENTRY(GET_OUTPUT_TIMINGS_PART2),
307         SDVO_CMD_NAME_ENTRY(CREATE_PREFERRED_INPUT_TIMING),
308         SDVO_CMD_NAME_ENTRY(GET_PREFERRED_INPUT_TIMING_PART1),
309         SDVO_CMD_NAME_ENTRY(GET_PREFERRED_INPUT_TIMING_PART2),
310         SDVO_CMD_NAME_ENTRY(GET_INPUT_PIXEL_CLOCK_RANGE),
311         SDVO_CMD_NAME_ENTRY(GET_OUTPUT_PIXEL_CLOCK_RANGE),
312         SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_CLOCK_RATE_MULTS),
313         SDVO_CMD_NAME_ENTRY(GET_CLOCK_RATE_MULT),
314         SDVO_CMD_NAME_ENTRY(SET_CLOCK_RATE_MULT),
315         SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_TV_FORMATS),
316         SDVO_CMD_NAME_ENTRY(GET_TV_FORMAT),
317         SDVO_CMD_NAME_ENTRY(SET_TV_FORMAT),
318         SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_POWER_STATES),
319         SDVO_CMD_NAME_ENTRY(GET_POWER_STATE),
320         SDVO_CMD_NAME_ENTRY(SET_ENCODER_POWER_STATE),
321         SDVO_CMD_NAME_ENTRY(SET_DISPLAY_POWER_STATE),
322         SDVO_CMD_NAME_ENTRY(SET_CONTROL_BUS_SWITCH),
323         SDVO_CMD_NAME_ENTRY(GET_SDTV_RESOLUTION_SUPPORT),
324         SDVO_CMD_NAME_ENTRY(GET_SCALED_HDTV_RESOLUTION_SUPPORT),
325         SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_ENHANCEMENTS),
326
327         /* Add the op code for SDVO enhancements */
328         SDVO_CMD_NAME_ENTRY(GET_MAX_HPOS),
329         SDVO_CMD_NAME_ENTRY(GET_HPOS),
330         SDVO_CMD_NAME_ENTRY(SET_HPOS),
331         SDVO_CMD_NAME_ENTRY(GET_MAX_VPOS),
332         SDVO_CMD_NAME_ENTRY(GET_VPOS),
333         SDVO_CMD_NAME_ENTRY(SET_VPOS),
334         SDVO_CMD_NAME_ENTRY(GET_MAX_SATURATION),
335         SDVO_CMD_NAME_ENTRY(GET_SATURATION),
336         SDVO_CMD_NAME_ENTRY(SET_SATURATION),
337         SDVO_CMD_NAME_ENTRY(GET_MAX_HUE),
338         SDVO_CMD_NAME_ENTRY(GET_HUE),
339         SDVO_CMD_NAME_ENTRY(SET_HUE),
340         SDVO_CMD_NAME_ENTRY(GET_MAX_CONTRAST),
341         SDVO_CMD_NAME_ENTRY(GET_CONTRAST),
342         SDVO_CMD_NAME_ENTRY(SET_CONTRAST),
343         SDVO_CMD_NAME_ENTRY(GET_MAX_BRIGHTNESS),
344         SDVO_CMD_NAME_ENTRY(GET_BRIGHTNESS),
345         SDVO_CMD_NAME_ENTRY(SET_BRIGHTNESS),
346         SDVO_CMD_NAME_ENTRY(GET_MAX_OVERSCAN_H),
347         SDVO_CMD_NAME_ENTRY(GET_OVERSCAN_H),
348         SDVO_CMD_NAME_ENTRY(SET_OVERSCAN_H),
349         SDVO_CMD_NAME_ENTRY(GET_MAX_OVERSCAN_V),
350         SDVO_CMD_NAME_ENTRY(GET_OVERSCAN_V),
351         SDVO_CMD_NAME_ENTRY(SET_OVERSCAN_V),
352         SDVO_CMD_NAME_ENTRY(GET_MAX_FLICKER_FILTER),
353         SDVO_CMD_NAME_ENTRY(GET_FLICKER_FILTER),
354         SDVO_CMD_NAME_ENTRY(SET_FLICKER_FILTER),
355         SDVO_CMD_NAME_ENTRY(GET_MAX_FLICKER_FILTER_ADAPTIVE),
356         SDVO_CMD_NAME_ENTRY(GET_FLICKER_FILTER_ADAPTIVE),
357         SDVO_CMD_NAME_ENTRY(SET_FLICKER_FILTER_ADAPTIVE),
358         SDVO_CMD_NAME_ENTRY(GET_MAX_FLICKER_FILTER_2D),
359         SDVO_CMD_NAME_ENTRY(GET_FLICKER_FILTER_2D),
360         SDVO_CMD_NAME_ENTRY(SET_FLICKER_FILTER_2D),
361         SDVO_CMD_NAME_ENTRY(GET_MAX_SHARPNESS),
362         SDVO_CMD_NAME_ENTRY(GET_SHARPNESS),
363         SDVO_CMD_NAME_ENTRY(SET_SHARPNESS),
364         SDVO_CMD_NAME_ENTRY(GET_DOT_CRAWL),
365         SDVO_CMD_NAME_ENTRY(SET_DOT_CRAWL),
366         SDVO_CMD_NAME_ENTRY(GET_MAX_TV_CHROMA_FILTER),
367         SDVO_CMD_NAME_ENTRY(GET_TV_CHROMA_FILTER),
368         SDVO_CMD_NAME_ENTRY(SET_TV_CHROMA_FILTER),
369         SDVO_CMD_NAME_ENTRY(GET_MAX_TV_LUMA_FILTER),
370         SDVO_CMD_NAME_ENTRY(GET_TV_LUMA_FILTER),
371         SDVO_CMD_NAME_ENTRY(SET_TV_LUMA_FILTER),
372
373         /* HDMI op code */
374         SDVO_CMD_NAME_ENTRY(GET_SUPP_ENCODE),
375         SDVO_CMD_NAME_ENTRY(GET_ENCODE),
376         SDVO_CMD_NAME_ENTRY(SET_ENCODE),
377         SDVO_CMD_NAME_ENTRY(SET_PIXEL_REPLI),
378         SDVO_CMD_NAME_ENTRY(GET_PIXEL_REPLI),
379         SDVO_CMD_NAME_ENTRY(GET_COLORIMETRY_CAP),
380         SDVO_CMD_NAME_ENTRY(SET_COLORIMETRY),
381         SDVO_CMD_NAME_ENTRY(GET_COLORIMETRY),
382         SDVO_CMD_NAME_ENTRY(GET_AUDIO_ENCRYPT_PREFER),
383         SDVO_CMD_NAME_ENTRY(SET_AUDIO_STAT),
384         SDVO_CMD_NAME_ENTRY(GET_AUDIO_STAT),
385         SDVO_CMD_NAME_ENTRY(GET_HBUF_INDEX),
386         SDVO_CMD_NAME_ENTRY(SET_HBUF_INDEX),
387         SDVO_CMD_NAME_ENTRY(GET_HBUF_INFO),
388         SDVO_CMD_NAME_ENTRY(GET_HBUF_AV_SPLIT),
389         SDVO_CMD_NAME_ENTRY(SET_HBUF_AV_SPLIT),
390         SDVO_CMD_NAME_ENTRY(GET_HBUF_TXRATE),
391         SDVO_CMD_NAME_ENTRY(SET_HBUF_TXRATE),
392         SDVO_CMD_NAME_ENTRY(SET_HBUF_DATA),
393         SDVO_CMD_NAME_ENTRY(GET_HBUF_DATA),
394 };
395
396 #undef SDVO_CMD_NAME_ENTRY
397
398 static const char *sdvo_cmd_name(u8 cmd)
399 {
400         int i;
401
402         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
403                 if (cmd == sdvo_cmd_names[i].cmd)
404                         return sdvo_cmd_names[i].name;
405         }
406
407         return NULL;
408 }
409
410 #define SDVO_NAME(svdo) ((svdo)->port == PORT_B ? "SDVOB" : "SDVOC")
411
412 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
413                                    const void *args, int args_len)
414 {
415         const char *cmd_name;
416         int i, pos = 0;
417 #define BUF_LEN 256
418         char buffer[BUF_LEN];
419
420 #define BUF_PRINT(args...) \
421         pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
422
423
424         for (i = 0; i < args_len; i++) {
425                 BUF_PRINT("%02X ", ((u8 *)args)[i]);
426         }
427         for (; i < 8; i++) {
428                 BUF_PRINT("   ");
429         }
430
431         cmd_name = sdvo_cmd_name(cmd);
432         if (cmd_name)
433                 BUF_PRINT("(%s)", cmd_name);
434         else
435                 BUF_PRINT("(%02X)", cmd);
436         BUG_ON(pos >= BUF_LEN - 1);
437 #undef BUF_PRINT
438 #undef BUF_LEN
439
440         DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer);
441 }
442
443 static const char * const cmd_status_names[] = {
444         [SDVO_CMD_STATUS_POWER_ON] = "Power on",
445         [SDVO_CMD_STATUS_SUCCESS] = "Success",
446         [SDVO_CMD_STATUS_NOTSUPP] = "Not supported",
447         [SDVO_CMD_STATUS_INVALID_ARG] = "Invalid arg",
448         [SDVO_CMD_STATUS_PENDING] = "Pending",
449         [SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED] = "Target not specified",
450         [SDVO_CMD_STATUS_SCALING_NOT_SUPP] = "Scaling not supported",
451 };
452
453 static const char *sdvo_cmd_status(u8 status)
454 {
455         if (status < ARRAY_SIZE(cmd_status_names))
456                 return cmd_status_names[status];
457         else
458                 return NULL;
459 }
460
461 static bool __intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
462                                    const void *args, int args_len,
463                                    bool unlocked)
464 {
465         u8 *buf, status;
466         struct i2c_msg *msgs;
467         int i, ret = true;
468
469         /* Would be simpler to allocate both in one go ? */
470         buf = kzalloc(args_len * 2 + 2, GFP_KERNEL);
471         if (!buf)
472                 return false;
473
474         msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
475         if (!msgs) {
476                 kfree(buf);
477                 return false;
478         }
479
480         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
481
482         for (i = 0; i < args_len; i++) {
483                 msgs[i].addr = intel_sdvo->slave_addr;
484                 msgs[i].flags = 0;
485                 msgs[i].len = 2;
486                 msgs[i].buf = buf + 2 *i;
487                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
488                 buf[2*i + 1] = ((u8*)args)[i];
489         }
490         msgs[i].addr = intel_sdvo->slave_addr;
491         msgs[i].flags = 0;
492         msgs[i].len = 2;
493         msgs[i].buf = buf + 2*i;
494         buf[2*i + 0] = SDVO_I2C_OPCODE;
495         buf[2*i + 1] = cmd;
496
497         /* the following two are to read the response */
498         status = SDVO_I2C_CMD_STATUS;
499         msgs[i+1].addr = intel_sdvo->slave_addr;
500         msgs[i+1].flags = 0;
501         msgs[i+1].len = 1;
502         msgs[i+1].buf = &status;
503
504         msgs[i+2].addr = intel_sdvo->slave_addr;
505         msgs[i+2].flags = I2C_M_RD;
506         msgs[i+2].len = 1;
507         msgs[i+2].buf = &status;
508
509         if (unlocked)
510                 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
511         else
512                 ret = __i2c_transfer(intel_sdvo->i2c, msgs, i+3);
513         if (ret < 0) {
514                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
515                 ret = false;
516                 goto out;
517         }
518         if (ret != i+3) {
519                 /* failure in I2C transfer */
520                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
521                 ret = false;
522         }
523
524 out:
525         kfree(msgs);
526         kfree(buf);
527         return ret;
528 }
529
530 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
531                                  const void *args, int args_len)
532 {
533         return __intel_sdvo_write_cmd(intel_sdvo, cmd, args, args_len, true);
534 }
535
536 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
537                                      void *response, int response_len)
538 {
539         const char *cmd_status;
540         u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
541         u8 status;
542         int i, pos = 0;
543 #define BUF_LEN 256
544         char buffer[BUF_LEN];
545
546         buffer[0] = '\0';
547
548         /*
549          * The documentation states that all commands will be
550          * processed within 15µs, and that we need only poll
551          * the status byte a maximum of 3 times in order for the
552          * command to be complete.
553          *
554          * Check 5 times in case the hardware failed to read the docs.
555          *
556          * Also beware that the first response by many devices is to
557          * reply PENDING and stall for time. TVs are notorious for
558          * requiring longer than specified to complete their replies.
559          * Originally (in the DDX long ago), the delay was only ever 15ms
560          * with an additional delay of 30ms applied for TVs added later after
561          * many experiments. To accommodate both sets of delays, we do a
562          * sequence of slow checks if the device is falling behind and fails
563          * to reply within 5*15µs.
564          */
565         if (!intel_sdvo_read_byte(intel_sdvo,
566                                   SDVO_I2C_CMD_STATUS,
567                                   &status))
568                 goto log_fail;
569
570         while ((status == SDVO_CMD_STATUS_PENDING ||
571                 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) {
572                 if (retry < 10)
573                         msleep(15);
574                 else
575                         udelay(15);
576
577                 if (!intel_sdvo_read_byte(intel_sdvo,
578                                           SDVO_I2C_CMD_STATUS,
579                                           &status))
580                         goto log_fail;
581         }
582
583 #define BUF_PRINT(args...) \
584         pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
585
586         cmd_status = sdvo_cmd_status(status);
587         if (cmd_status)
588                 BUF_PRINT("(%s)", cmd_status);
589         else
590                 BUF_PRINT("(??? %d)", status);
591
592         if (status != SDVO_CMD_STATUS_SUCCESS)
593                 goto log_fail;
594
595         /* Read the command response */
596         for (i = 0; i < response_len; i++) {
597                 if (!intel_sdvo_read_byte(intel_sdvo,
598                                           SDVO_I2C_RETURN_0 + i,
599                                           &((u8 *)response)[i]))
600                         goto log_fail;
601                 BUF_PRINT(" %02X", ((u8 *)response)[i]);
602         }
603         BUG_ON(pos >= BUF_LEN - 1);
604 #undef BUF_PRINT
605 #undef BUF_LEN
606
607         DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer);
608         return true;
609
610 log_fail:
611         DRM_DEBUG_KMS("%s: R: ... failed %s\n",
612                       SDVO_NAME(intel_sdvo), buffer);
613         return false;
614 }
615
616 static int intel_sdvo_get_pixel_multiplier(const struct drm_display_mode *adjusted_mode)
617 {
618         if (adjusted_mode->crtc_clock >= 100000)
619                 return 1;
620         else if (adjusted_mode->crtc_clock >= 50000)
621                 return 2;
622         else
623                 return 4;
624 }
625
626 static bool __intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
627                                                 u8 ddc_bus)
628 {
629         /* This must be the immediately preceding write before the i2c xfer */
630         return __intel_sdvo_write_cmd(intel_sdvo,
631                                       SDVO_CMD_SET_CONTROL_BUS_SWITCH,
632                                       &ddc_bus, 1, false);
633 }
634
635 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
636 {
637         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
638                 return false;
639
640         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
641 }
642
643 static bool
644 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
645 {
646         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
647                 return false;
648
649         return intel_sdvo_read_response(intel_sdvo, value, len);
650 }
651
652 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
653 {
654         struct intel_sdvo_set_target_input_args targets = {0};
655         return intel_sdvo_set_value(intel_sdvo,
656                                     SDVO_CMD_SET_TARGET_INPUT,
657                                     &targets, sizeof(targets));
658 }
659
660 /*
661  * Return whether each input is trained.
662  *
663  * This function is making an assumption about the layout of the response,
664  * which should be checked against the docs.
665  */
666 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
667 {
668         struct intel_sdvo_get_trained_inputs_response response;
669
670         BUILD_BUG_ON(sizeof(response) != 1);
671         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
672                                   &response, sizeof(response)))
673                 return false;
674
675         *input_1 = response.input0_trained;
676         *input_2 = response.input1_trained;
677         return true;
678 }
679
680 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
681                                           u16 outputs)
682 {
683         return intel_sdvo_set_value(intel_sdvo,
684                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
685                                     &outputs, sizeof(outputs));
686 }
687
688 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
689                                           u16 *outputs)
690 {
691         return intel_sdvo_get_value(intel_sdvo,
692                                     SDVO_CMD_GET_ACTIVE_OUTPUTS,
693                                     outputs, sizeof(*outputs));
694 }
695
696 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
697                                                int mode)
698 {
699         u8 state = SDVO_ENCODER_STATE_ON;
700
701         switch (mode) {
702         case DRM_MODE_DPMS_ON:
703                 state = SDVO_ENCODER_STATE_ON;
704                 break;
705         case DRM_MODE_DPMS_STANDBY:
706                 state = SDVO_ENCODER_STATE_STANDBY;
707                 break;
708         case DRM_MODE_DPMS_SUSPEND:
709                 state = SDVO_ENCODER_STATE_SUSPEND;
710                 break;
711         case DRM_MODE_DPMS_OFF:
712                 state = SDVO_ENCODER_STATE_OFF;
713                 break;
714         }
715
716         return intel_sdvo_set_value(intel_sdvo,
717                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
718 }
719
720 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
721                                                    int *clock_min,
722                                                    int *clock_max)
723 {
724         struct intel_sdvo_pixel_clock_range clocks;
725
726         BUILD_BUG_ON(sizeof(clocks) != 4);
727         if (!intel_sdvo_get_value(intel_sdvo,
728                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
729                                   &clocks, sizeof(clocks)))
730                 return false;
731
732         /* Convert the values from units of 10 kHz to kHz. */
733         *clock_min = clocks.min * 10;
734         *clock_max = clocks.max * 10;
735         return true;
736 }
737
738 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
739                                          u16 outputs)
740 {
741         return intel_sdvo_set_value(intel_sdvo,
742                                     SDVO_CMD_SET_TARGET_OUTPUT,
743                                     &outputs, sizeof(outputs));
744 }
745
746 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
747                                   struct intel_sdvo_dtd *dtd)
748 {
749         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
750                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
751 }
752
753 static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
754                                   struct intel_sdvo_dtd *dtd)
755 {
756         return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
757                 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
758 }
759
760 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
761                                          struct intel_sdvo_dtd *dtd)
762 {
763         return intel_sdvo_set_timing(intel_sdvo,
764                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
765 }
766
767 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
768                                          struct intel_sdvo_dtd *dtd)
769 {
770         return intel_sdvo_set_timing(intel_sdvo,
771                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
772 }
773
774 static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo,
775                                         struct intel_sdvo_dtd *dtd)
776 {
777         return intel_sdvo_get_timing(intel_sdvo,
778                                      SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd);
779 }
780
781 static bool
782 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
783                                          struct intel_sdvo_connector *intel_sdvo_connector,
784                                          u16 clock,
785                                          u16 width,
786                                          u16 height)
787 {
788         struct intel_sdvo_preferred_input_timing_args args;
789
790         memset(&args, 0, sizeof(args));
791         args.clock = clock;
792         args.width = width;
793         args.height = height;
794         args.interlace = 0;
795
796         if (IS_LVDS(intel_sdvo_connector)) {
797                 const struct drm_display_mode *fixed_mode =
798                         intel_sdvo_connector->base.panel.fixed_mode;
799
800                 if (fixed_mode->hdisplay != width ||
801                     fixed_mode->vdisplay != height)
802                         args.scaled = 1;
803         }
804
805         return intel_sdvo_set_value(intel_sdvo,
806                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
807                                     &args, sizeof(args));
808 }
809
810 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
811                                                   struct intel_sdvo_dtd *dtd)
812 {
813         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
814         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
815         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
816                                     &dtd->part1, sizeof(dtd->part1)) &&
817                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
818                                      &dtd->part2, sizeof(dtd->part2));
819 }
820
821 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
822 {
823         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
824 }
825
826 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
827                                          const struct drm_display_mode *mode)
828 {
829         u16 width, height;
830         u16 h_blank_len, h_sync_len, v_blank_len, v_sync_len;
831         u16 h_sync_offset, v_sync_offset;
832         int mode_clock;
833
834         memset(dtd, 0, sizeof(*dtd));
835
836         width = mode->hdisplay;
837         height = mode->vdisplay;
838
839         /* do some mode translations */
840         h_blank_len = mode->htotal - mode->hdisplay;
841         h_sync_len = mode->hsync_end - mode->hsync_start;
842
843         v_blank_len = mode->vtotal - mode->vdisplay;
844         v_sync_len = mode->vsync_end - mode->vsync_start;
845
846         h_sync_offset = mode->hsync_start - mode->hdisplay;
847         v_sync_offset = mode->vsync_start - mode->vdisplay;
848
849         mode_clock = mode->clock;
850         mode_clock /= 10;
851         dtd->part1.clock = mode_clock;
852
853         dtd->part1.h_active = width & 0xff;
854         dtd->part1.h_blank = h_blank_len & 0xff;
855         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
856                 ((h_blank_len >> 8) & 0xf);
857         dtd->part1.v_active = height & 0xff;
858         dtd->part1.v_blank = v_blank_len & 0xff;
859         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
860                 ((v_blank_len >> 8) & 0xf);
861
862         dtd->part2.h_sync_off = h_sync_offset & 0xff;
863         dtd->part2.h_sync_width = h_sync_len & 0xff;
864         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
865                 (v_sync_len & 0xf);
866         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
867                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
868                 ((v_sync_len & 0x30) >> 4);
869
870         dtd->part2.dtd_flags = 0x18;
871         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
872                 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
873         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
874                 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
875         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
876                 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
877
878         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
879 }
880
881 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode,
882                                          const struct intel_sdvo_dtd *dtd)
883 {
884         struct drm_display_mode mode = {};
885
886         mode.hdisplay = dtd->part1.h_active;
887         mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
888         mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off;
889         mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
890         mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width;
891         mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
892         mode.htotal = mode.hdisplay + dtd->part1.h_blank;
893         mode.htotal += (dtd->part1.h_high & 0xf) << 8;
894
895         mode.vdisplay = dtd->part1.v_active;
896         mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
897         mode.vsync_start = mode.vdisplay;
898         mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
899         mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
900         mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0;
901         mode.vsync_end = mode.vsync_start +
902                 (dtd->part2.v_sync_off_width & 0xf);
903         mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
904         mode.vtotal = mode.vdisplay + dtd->part1.v_blank;
905         mode.vtotal += (dtd->part1.v_high & 0xf) << 8;
906
907         mode.clock = dtd->part1.clock * 10;
908
909         if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
910                 mode.flags |= DRM_MODE_FLAG_INTERLACE;
911         if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
912                 mode.flags |= DRM_MODE_FLAG_PHSYNC;
913         else
914                 mode.flags |= DRM_MODE_FLAG_NHSYNC;
915         if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
916                 mode.flags |= DRM_MODE_FLAG_PVSYNC;
917         else
918                 mode.flags |= DRM_MODE_FLAG_NVSYNC;
919
920         drm_mode_set_crtcinfo(&mode, 0);
921
922         drm_mode_copy(pmode, &mode);
923 }
924
925 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
926 {
927         struct intel_sdvo_encode encode;
928
929         BUILD_BUG_ON(sizeof(encode) != 2);
930         return intel_sdvo_get_value(intel_sdvo,
931                                   SDVO_CMD_GET_SUPP_ENCODE,
932                                   &encode, sizeof(encode));
933 }
934
935 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
936                                   u8 mode)
937 {
938         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
939 }
940
941 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
942                                        u8 mode)
943 {
944         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
945 }
946
947 static bool intel_sdvo_set_audio_state(struct intel_sdvo *intel_sdvo,
948                                        u8 audio_state)
949 {
950         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_AUDIO_STAT,
951                                     &audio_state, 1);
952 }
953
954 #if 0
955 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
956 {
957         int i, j;
958         u8 set_buf_index[2];
959         u8 av_split;
960         u8 buf_size;
961         u8 buf[48];
962         u8 *pos;
963
964         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
965
966         for (i = 0; i <= av_split; i++) {
967                 set_buf_index[0] = i; set_buf_index[1] = 0;
968                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
969                                      set_buf_index, 2);
970                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
971                 intel_sdvo_read_response(encoder, &buf_size, 1);
972
973                 pos = buf;
974                 for (j = 0; j <= buf_size; j += 8) {
975                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
976                                              NULL, 0);
977                         intel_sdvo_read_response(encoder, pos, 8);
978                         pos += 8;
979                 }
980         }
981 }
982 #endif
983
984 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
985                                        unsigned int if_index, u8 tx_rate,
986                                        const u8 *data, unsigned int length)
987 {
988         u8 set_buf_index[2] = { if_index, 0 };
989         u8 hbuf_size, tmp[8];
990         int i;
991
992         if (!intel_sdvo_set_value(intel_sdvo,
993                                   SDVO_CMD_SET_HBUF_INDEX,
994                                   set_buf_index, 2))
995                 return false;
996
997         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
998                                   &hbuf_size, 1))
999                 return false;
1000
1001         /* Buffer size is 0 based, hooray! */
1002         hbuf_size++;
1003
1004         DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
1005                       if_index, length, hbuf_size);
1006
1007         if (hbuf_size < length)
1008                 return false;
1009
1010         for (i = 0; i < hbuf_size; i += 8) {
1011                 memset(tmp, 0, 8);
1012                 if (i < length)
1013                         memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
1014
1015                 if (!intel_sdvo_set_value(intel_sdvo,
1016                                           SDVO_CMD_SET_HBUF_DATA,
1017                                           tmp, 8))
1018                         return false;
1019         }
1020
1021         return intel_sdvo_set_value(intel_sdvo,
1022                                     SDVO_CMD_SET_HBUF_TXRATE,
1023                                     &tx_rate, 1);
1024 }
1025
1026 static ssize_t intel_sdvo_read_infoframe(struct intel_sdvo *intel_sdvo,
1027                                          unsigned int if_index,
1028                                          u8 *data, unsigned int length)
1029 {
1030         u8 set_buf_index[2] = { if_index, 0 };
1031         u8 hbuf_size, tx_rate, av_split;
1032         int i;
1033
1034         if (!intel_sdvo_get_value(intel_sdvo,
1035                                   SDVO_CMD_GET_HBUF_AV_SPLIT,
1036                                   &av_split, 1))
1037                 return -ENXIO;
1038
1039         if (av_split < if_index)
1040                 return 0;
1041
1042         if (!intel_sdvo_set_value(intel_sdvo,
1043                                   SDVO_CMD_SET_HBUF_INDEX,
1044                                   set_buf_index, 2))
1045                 return -ENXIO;
1046
1047         if (!intel_sdvo_get_value(intel_sdvo,
1048                                   SDVO_CMD_GET_HBUF_TXRATE,
1049                                   &tx_rate, 1))
1050                 return -ENXIO;
1051
1052         if (tx_rate == SDVO_HBUF_TX_DISABLED)
1053                 return 0;
1054
1055         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
1056                                   &hbuf_size, 1))
1057                 return -ENXIO;
1058
1059         /* Buffer size is 0 based, hooray! */
1060         hbuf_size++;
1061
1062         DRM_DEBUG_KMS("reading sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
1063                       if_index, length, hbuf_size);
1064
1065         hbuf_size = min_t(unsigned int, length, hbuf_size);
1066
1067         for (i = 0; i < hbuf_size; i += 8) {
1068                 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HBUF_DATA, NULL, 0))
1069                         return -ENXIO;
1070                 if (!intel_sdvo_read_response(intel_sdvo, &data[i],
1071                                               min_t(unsigned int, 8, hbuf_size - i)))
1072                         return -ENXIO;
1073         }
1074
1075         return hbuf_size;
1076 }
1077
1078 static bool intel_sdvo_compute_avi_infoframe(struct intel_sdvo *intel_sdvo,
1079                                              struct intel_crtc_state *crtc_state,
1080                                              struct drm_connector_state *conn_state)
1081 {
1082         struct hdmi_avi_infoframe *frame = &crtc_state->infoframes.avi.avi;
1083         const struct drm_display_mode *adjusted_mode =
1084                 &crtc_state->base.adjusted_mode;
1085         int ret;
1086
1087         if (!crtc_state->has_hdmi_sink)
1088                 return true;
1089
1090         crtc_state->infoframes.enable |=
1091                 intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI);
1092
1093         ret = drm_hdmi_avi_infoframe_from_display_mode(frame,
1094                                                        conn_state->connector,
1095                                                        adjusted_mode);
1096         if (ret)
1097                 return false;
1098
1099         drm_hdmi_avi_infoframe_quant_range(frame,
1100                                            conn_state->connector,
1101                                            adjusted_mode,
1102                                            crtc_state->limited_color_range ?
1103                                            HDMI_QUANTIZATION_RANGE_LIMITED :
1104                                            HDMI_QUANTIZATION_RANGE_FULL);
1105
1106         ret = hdmi_avi_infoframe_check(frame);
1107         if (WARN_ON(ret))
1108                 return false;
1109
1110         return true;
1111 }
1112
1113 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
1114                                          const struct intel_crtc_state *crtc_state)
1115 {
1116         u8 sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
1117         const union hdmi_infoframe *frame = &crtc_state->infoframes.avi;
1118         ssize_t len;
1119
1120         if ((crtc_state->infoframes.enable &
1121              intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI)) == 0)
1122                 return true;
1123
1124         if (WARN_ON(frame->any.type != HDMI_INFOFRAME_TYPE_AVI))
1125                 return false;
1126
1127         len = hdmi_infoframe_pack_only(frame, sdvo_data, sizeof(sdvo_data));
1128         if (WARN_ON(len < 0))
1129                 return false;
1130
1131         return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1132                                           SDVO_HBUF_TX_VSYNC,
1133                                           sdvo_data, len);
1134 }
1135
1136 static void intel_sdvo_get_avi_infoframe(struct intel_sdvo *intel_sdvo,
1137                                          struct intel_crtc_state *crtc_state)
1138 {
1139         u8 sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
1140         union hdmi_infoframe *frame = &crtc_state->infoframes.avi;
1141         ssize_t len;
1142         int ret;
1143
1144         if (!crtc_state->has_hdmi_sink)
1145                 return;
1146
1147         len = intel_sdvo_read_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1148                                         sdvo_data, sizeof(sdvo_data));
1149         if (len < 0) {
1150                 DRM_DEBUG_KMS("failed to read AVI infoframe\n");
1151                 return;
1152         } else if (len == 0) {
1153                 return;
1154         }
1155
1156         crtc_state->infoframes.enable |=
1157                 intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI);
1158
1159         ret = hdmi_infoframe_unpack(frame, sdvo_data, len);
1160         if (ret) {
1161                 DRM_DEBUG_KMS("Failed to unpack AVI infoframe\n");
1162                 return;
1163         }
1164
1165         if (frame->any.type != HDMI_INFOFRAME_TYPE_AVI)
1166                 DRM_DEBUG_KMS("Found the wrong infoframe type 0x%x (expected 0x%02x)\n",
1167                               frame->any.type, HDMI_INFOFRAME_TYPE_AVI);
1168 }
1169
1170 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo,
1171                                      const struct drm_connector_state *conn_state)
1172 {
1173         struct intel_sdvo_tv_format format;
1174         u32 format_map;
1175
1176         format_map = 1 << conn_state->tv.mode;
1177         memset(&format, 0, sizeof(format));
1178         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
1179
1180         BUILD_BUG_ON(sizeof(format) != 6);
1181         return intel_sdvo_set_value(intel_sdvo,
1182                                     SDVO_CMD_SET_TV_FORMAT,
1183                                     &format, sizeof(format));
1184 }
1185
1186 static bool
1187 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
1188                                         const struct drm_display_mode *mode)
1189 {
1190         struct intel_sdvo_dtd output_dtd;
1191
1192         if (!intel_sdvo_set_target_output(intel_sdvo,
1193                                           intel_sdvo->attached_output))
1194                 return false;
1195
1196         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1197         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1198                 return false;
1199
1200         return true;
1201 }
1202
1203 /*
1204  * Asks the sdvo controller for the preferred input mode given the output mode.
1205  * Unfortunately we have to set up the full output mode to do that.
1206  */
1207 static bool
1208 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
1209                                     struct intel_sdvo_connector *intel_sdvo_connector,
1210                                     const struct drm_display_mode *mode,
1211                                     struct drm_display_mode *adjusted_mode)
1212 {
1213         struct intel_sdvo_dtd input_dtd;
1214
1215         /* Reset the input timing to the screen. Assume always input 0. */
1216         if (!intel_sdvo_set_target_input(intel_sdvo))
1217                 return false;
1218
1219         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1220                                                       intel_sdvo_connector,
1221                                                       mode->clock / 10,
1222                                                       mode->hdisplay,
1223                                                       mode->vdisplay))
1224                 return false;
1225
1226         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1227                                                    &input_dtd))
1228                 return false;
1229
1230         intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1231         intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
1232
1233         return true;
1234 }
1235
1236 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config)
1237 {
1238         unsigned dotclock = pipe_config->port_clock;
1239         struct dpll *clock = &pipe_config->dpll;
1240
1241         /*
1242          * SDVO TV has fixed PLL values depend on its clock range,
1243          * this mirrors vbios setting.
1244          */
1245         if (dotclock >= 100000 && dotclock < 140500) {
1246                 clock->p1 = 2;
1247                 clock->p2 = 10;
1248                 clock->n = 3;
1249                 clock->m1 = 16;
1250                 clock->m2 = 8;
1251         } else if (dotclock >= 140500 && dotclock <= 200000) {
1252                 clock->p1 = 1;
1253                 clock->p2 = 10;
1254                 clock->n = 6;
1255                 clock->m1 = 12;
1256                 clock->m2 = 8;
1257         } else {
1258                 WARN(1, "SDVO TV clock out of range: %i\n", dotclock);
1259         }
1260
1261         pipe_config->clock_set = true;
1262 }
1263
1264 static int intel_sdvo_compute_config(struct intel_encoder *encoder,
1265                                      struct intel_crtc_state *pipe_config,
1266                                      struct drm_connector_state *conn_state)
1267 {
1268         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1269         struct intel_sdvo_connector_state *intel_sdvo_state =
1270                 to_intel_sdvo_connector_state(conn_state);
1271         struct intel_sdvo_connector *intel_sdvo_connector =
1272                 to_intel_sdvo_connector(conn_state->connector);
1273         struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
1274         struct drm_display_mode *mode = &pipe_config->base.mode;
1275
1276         DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1277         pipe_config->pipe_bpp = 8*3;
1278         pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
1279
1280         if (HAS_PCH_SPLIT(to_i915(encoder->base.dev)))
1281                 pipe_config->has_pch_encoder = true;
1282
1283         /*
1284          * We need to construct preferred input timings based on our
1285          * output timings.  To do that, we have to set the output
1286          * timings, even though this isn't really the right place in
1287          * the sequence to do it. Oh well.
1288          */
1289         if (IS_TV(intel_sdvo_connector)) {
1290                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1291                         return -EINVAL;
1292
1293                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1294                                                            intel_sdvo_connector,
1295                                                            mode,
1296                                                            adjusted_mode);
1297                 pipe_config->sdvo_tv_clock = true;
1298         } else if (IS_LVDS(intel_sdvo_connector)) {
1299                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1300                                                              intel_sdvo_connector->base.panel.fixed_mode))
1301                         return -EINVAL;
1302
1303                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1304                                                            intel_sdvo_connector,
1305                                                            mode,
1306                                                            adjusted_mode);
1307         }
1308
1309         if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
1310                 return -EINVAL;
1311
1312         /*
1313          * Make the CRTC code factor in the SDVO pixel multiplier.  The
1314          * SDVO device will factor out the multiplier during mode_set.
1315          */
1316         pipe_config->pixel_multiplier =
1317                 intel_sdvo_get_pixel_multiplier(adjusted_mode);
1318
1319         if (intel_sdvo_state->base.force_audio != HDMI_AUDIO_OFF_DVI)
1320                 pipe_config->has_hdmi_sink = intel_sdvo->has_hdmi_monitor;
1321
1322         if (intel_sdvo_state->base.force_audio == HDMI_AUDIO_ON ||
1323             (intel_sdvo_state->base.force_audio == HDMI_AUDIO_AUTO && intel_sdvo->has_hdmi_audio))
1324                 pipe_config->has_audio = true;
1325
1326         if (intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_AUTO) {
1327                 /*
1328                  * See CEA-861-E - 5.1 Default Encoding Parameters
1329                  *
1330                  * FIXME: This bit is only valid when using TMDS encoding and 8
1331                  * bit per color mode.
1332                  */
1333                 if (pipe_config->has_hdmi_sink &&
1334                     drm_match_cea_mode(adjusted_mode) > 1)
1335                         pipe_config->limited_color_range = true;
1336         } else {
1337                 if (pipe_config->has_hdmi_sink &&
1338                     intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_LIMITED)
1339                         pipe_config->limited_color_range = true;
1340         }
1341
1342         /* Clock computation needs to happen after pixel multiplier. */
1343         if (IS_TV(intel_sdvo_connector))
1344                 i9xx_adjust_sdvo_tv_clock(pipe_config);
1345
1346         /* Set user selected PAR to incoming mode's member */
1347         if (intel_sdvo_connector->is_hdmi)
1348                 adjusted_mode->picture_aspect_ratio = conn_state->picture_aspect_ratio;
1349
1350         if (!intel_sdvo_compute_avi_infoframe(intel_sdvo,
1351                                               pipe_config, conn_state)) {
1352                 DRM_DEBUG_KMS("bad AVI infoframe\n");
1353                 return -EINVAL;
1354         }
1355
1356         return 0;
1357 }
1358
1359 #define UPDATE_PROPERTY(input, NAME) \
1360         do { \
1361                 val = input; \
1362                 intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_##NAME, &val, sizeof(val)); \
1363         } while (0)
1364
1365 static void intel_sdvo_update_props(struct intel_sdvo *intel_sdvo,
1366                                     const struct intel_sdvo_connector_state *sdvo_state)
1367 {
1368         const struct drm_connector_state *conn_state = &sdvo_state->base.base;
1369         struct intel_sdvo_connector *intel_sdvo_conn =
1370                 to_intel_sdvo_connector(conn_state->connector);
1371         u16 val;
1372
1373         if (intel_sdvo_conn->left)
1374                 UPDATE_PROPERTY(sdvo_state->tv.overscan_h, OVERSCAN_H);
1375
1376         if (intel_sdvo_conn->top)
1377                 UPDATE_PROPERTY(sdvo_state->tv.overscan_v, OVERSCAN_V);
1378
1379         if (intel_sdvo_conn->hpos)
1380                 UPDATE_PROPERTY(sdvo_state->tv.hpos, HPOS);
1381
1382         if (intel_sdvo_conn->vpos)
1383                 UPDATE_PROPERTY(sdvo_state->tv.vpos, VPOS);
1384
1385         if (intel_sdvo_conn->saturation)
1386                 UPDATE_PROPERTY(conn_state->tv.saturation, SATURATION);
1387
1388         if (intel_sdvo_conn->contrast)
1389                 UPDATE_PROPERTY(conn_state->tv.contrast, CONTRAST);
1390
1391         if (intel_sdvo_conn->hue)
1392                 UPDATE_PROPERTY(conn_state->tv.hue, HUE);
1393
1394         if (intel_sdvo_conn->brightness)
1395                 UPDATE_PROPERTY(conn_state->tv.brightness, BRIGHTNESS);
1396
1397         if (intel_sdvo_conn->sharpness)
1398                 UPDATE_PROPERTY(sdvo_state->tv.sharpness, SHARPNESS);
1399
1400         if (intel_sdvo_conn->flicker_filter)
1401                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter, FLICKER_FILTER);
1402
1403         if (intel_sdvo_conn->flicker_filter_2d)
1404                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_2d, FLICKER_FILTER_2D);
1405
1406         if (intel_sdvo_conn->flicker_filter_adaptive)
1407                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
1408
1409         if (intel_sdvo_conn->tv_chroma_filter)
1410                 UPDATE_PROPERTY(sdvo_state->tv.chroma_filter, TV_CHROMA_FILTER);
1411
1412         if (intel_sdvo_conn->tv_luma_filter)
1413                 UPDATE_PROPERTY(sdvo_state->tv.luma_filter, TV_LUMA_FILTER);
1414
1415         if (intel_sdvo_conn->dot_crawl)
1416                 UPDATE_PROPERTY(sdvo_state->tv.dot_crawl, DOT_CRAWL);
1417
1418 #undef UPDATE_PROPERTY
1419 }
1420
1421 static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder,
1422                                   const struct intel_crtc_state *crtc_state,
1423                                   const struct drm_connector_state *conn_state)
1424 {
1425         struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
1426         struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
1427         const struct drm_display_mode *adjusted_mode = &crtc_state->base.adjusted_mode;
1428         const struct intel_sdvo_connector_state *sdvo_state =
1429                 to_intel_sdvo_connector_state(conn_state);
1430         const struct intel_sdvo_connector *intel_sdvo_connector =
1431                 to_intel_sdvo_connector(conn_state->connector);
1432         const struct drm_display_mode *mode = &crtc_state->base.mode;
1433         struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder);
1434         u32 sdvox;
1435         struct intel_sdvo_in_out_map in_out;
1436         struct intel_sdvo_dtd input_dtd, output_dtd;
1437         int rate;
1438
1439         intel_sdvo_update_props(intel_sdvo, sdvo_state);
1440
1441         /*
1442          * First, set the input mapping for the first input to our controlled
1443          * output. This is only correct if we're a single-input device, in
1444          * which case the first input is the output from the appropriate SDVO
1445          * channel on the motherboard.  In a two-input device, the first input
1446          * will be SDVOB and the second SDVOC.
1447          */
1448         in_out.in0 = intel_sdvo->attached_output;
1449         in_out.in1 = 0;
1450
1451         intel_sdvo_set_value(intel_sdvo,
1452                              SDVO_CMD_SET_IN_OUT_MAP,
1453                              &in_out, sizeof(in_out));
1454
1455         /* Set the output timings to the screen */
1456         if (!intel_sdvo_set_target_output(intel_sdvo,
1457                                           intel_sdvo->attached_output))
1458                 return;
1459
1460         /* lvds has a special fixed output timing. */
1461         if (IS_LVDS(intel_sdvo_connector))
1462                 intel_sdvo_get_dtd_from_mode(&output_dtd,
1463                                              intel_sdvo_connector->base.panel.fixed_mode);
1464         else
1465                 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1466         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1467                 DRM_INFO("Setting output timings on %s failed\n",
1468                          SDVO_NAME(intel_sdvo));
1469
1470         /* Set the input timing to the screen. Assume always input 0. */
1471         if (!intel_sdvo_set_target_input(intel_sdvo))
1472                 return;
1473
1474         if (crtc_state->has_hdmi_sink) {
1475                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1476                 intel_sdvo_set_colorimetry(intel_sdvo,
1477                                            SDVO_COLORIMETRY_RGB256);
1478                 intel_sdvo_set_avi_infoframe(intel_sdvo, crtc_state);
1479         } else
1480                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1481
1482         if (IS_TV(intel_sdvo_connector) &&
1483             !intel_sdvo_set_tv_format(intel_sdvo, conn_state))
1484                 return;
1485
1486         intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1487
1488         if (IS_TV(intel_sdvo_connector) || IS_LVDS(intel_sdvo_connector))
1489                 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1490         if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1491                 DRM_INFO("Setting input timings on %s failed\n",
1492                          SDVO_NAME(intel_sdvo));
1493
1494         switch (crtc_state->pixel_multiplier) {
1495         default:
1496                 WARN(1, "unknown pixel multiplier specified\n");
1497                 /* fall through */
1498         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1499         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1500         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1501         }
1502         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1503                 return;
1504
1505         /* Set the SDVO control regs. */
1506         if (INTEL_GEN(dev_priv) >= 4) {
1507                 /* The real mode polarity is set by the SDVO commands, using
1508                  * struct intel_sdvo_dtd. */
1509                 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1510                 if (!HAS_PCH_SPLIT(dev_priv) && crtc_state->limited_color_range)
1511                         sdvox |= HDMI_COLOR_RANGE_16_235;
1512                 if (INTEL_GEN(dev_priv) < 5)
1513                         sdvox |= SDVO_BORDER_ENABLE;
1514         } else {
1515                 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1516                 if (intel_sdvo->port == PORT_B)
1517                         sdvox &= SDVOB_PRESERVE_MASK;
1518                 else
1519                         sdvox &= SDVOC_PRESERVE_MASK;
1520                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1521         }
1522
1523         if (HAS_PCH_CPT(dev_priv))
1524                 sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe);
1525         else
1526                 sdvox |= SDVO_PIPE_SEL(crtc->pipe);
1527
1528         if (INTEL_GEN(dev_priv) >= 4) {
1529                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1530         } else if (IS_I945G(dev_priv) || IS_I945GM(dev_priv) ||
1531                    IS_G33(dev_priv) || IS_PINEVIEW(dev_priv)) {
1532                 /* done in crtc_mode_set as it lives inside the dpll register */
1533         } else {
1534                 sdvox |= (crtc_state->pixel_multiplier - 1)
1535                         << SDVO_PORT_MULTIPLY_SHIFT;
1536         }
1537
1538         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1539             INTEL_GEN(dev_priv) < 5)
1540                 sdvox |= SDVO_STALL_SELECT;
1541         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1542 }
1543
1544 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1545 {
1546         struct intel_sdvo_connector *intel_sdvo_connector =
1547                 to_intel_sdvo_connector(&connector->base);
1548         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1549         u16 active_outputs = 0;
1550
1551         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1552
1553         return active_outputs & intel_sdvo_connector->output_flag;
1554 }
1555
1556 bool intel_sdvo_port_enabled(struct drm_i915_private *dev_priv,
1557                              i915_reg_t sdvo_reg, enum pipe *pipe)
1558 {
1559         u32 val;
1560
1561         val = I915_READ(sdvo_reg);
1562
1563         /* asserts want to know the pipe even if the port is disabled */
1564         if (HAS_PCH_CPT(dev_priv))
1565                 *pipe = (val & SDVO_PIPE_SEL_MASK_CPT) >> SDVO_PIPE_SEL_SHIFT_CPT;
1566         else if (IS_CHERRYVIEW(dev_priv))
1567                 *pipe = (val & SDVO_PIPE_SEL_MASK_CHV) >> SDVO_PIPE_SEL_SHIFT_CHV;
1568         else
1569                 *pipe = (val & SDVO_PIPE_SEL_MASK) >> SDVO_PIPE_SEL_SHIFT;
1570
1571         return val & SDVO_ENABLE;
1572 }
1573
1574 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1575                                     enum pipe *pipe)
1576 {
1577         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1578         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1579         u16 active_outputs = 0;
1580         bool ret;
1581
1582         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1583
1584         ret = intel_sdvo_port_enabled(dev_priv, intel_sdvo->sdvo_reg, pipe);
1585
1586         return ret || active_outputs;
1587 }
1588
1589 static void intel_sdvo_get_config(struct intel_encoder *encoder,
1590                                   struct intel_crtc_state *pipe_config)
1591 {
1592         struct drm_device *dev = encoder->base.dev;
1593         struct drm_i915_private *dev_priv = to_i915(dev);
1594         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1595         struct intel_sdvo_dtd dtd;
1596         int encoder_pixel_multiplier = 0;
1597         int dotclock;
1598         u32 flags = 0, sdvox;
1599         u8 val;
1600         bool ret;
1601
1602         pipe_config->output_types |= BIT(INTEL_OUTPUT_SDVO);
1603
1604         sdvox = I915_READ(intel_sdvo->sdvo_reg);
1605
1606         ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
1607         if (!ret) {
1608                 /*
1609                  * Some sdvo encoders are not spec compliant and don't
1610                  * implement the mandatory get_timings function.
1611                  */
1612                 DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n");
1613                 pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS;
1614         } else {
1615                 if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
1616                         flags |= DRM_MODE_FLAG_PHSYNC;
1617                 else
1618                         flags |= DRM_MODE_FLAG_NHSYNC;
1619
1620                 if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
1621                         flags |= DRM_MODE_FLAG_PVSYNC;
1622                 else
1623                         flags |= DRM_MODE_FLAG_NVSYNC;
1624         }
1625
1626         pipe_config->base.adjusted_mode.flags |= flags;
1627
1628         /*
1629          * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
1630          * the sdvo port register, on all other platforms it is part of the dpll
1631          * state. Since the general pipe state readout happens before the
1632          * encoder->get_config we so already have a valid pixel multplier on all
1633          * other platfroms.
1634          */
1635         if (IS_I915G(dev_priv) || IS_I915GM(dev_priv)) {
1636                 pipe_config->pixel_multiplier =
1637                         ((sdvox & SDVO_PORT_MULTIPLY_MASK)
1638                          >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
1639         }
1640
1641         dotclock = pipe_config->port_clock;
1642
1643         if (pipe_config->pixel_multiplier)
1644                 dotclock /= pipe_config->pixel_multiplier;
1645
1646         pipe_config->base.adjusted_mode.crtc_clock = dotclock;
1647
1648         /* Cross check the port pixel multiplier with the sdvo encoder state. */
1649         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT,
1650                                  &val, 1)) {
1651                 switch (val) {
1652                 case SDVO_CLOCK_RATE_MULT_1X:
1653                         encoder_pixel_multiplier = 1;
1654                         break;
1655                 case SDVO_CLOCK_RATE_MULT_2X:
1656                         encoder_pixel_multiplier = 2;
1657                         break;
1658                 case SDVO_CLOCK_RATE_MULT_4X:
1659                         encoder_pixel_multiplier = 4;
1660                         break;
1661                 }
1662         }
1663
1664         WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier,
1665              "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1666              pipe_config->pixel_multiplier, encoder_pixel_multiplier);
1667
1668         if (sdvox & HDMI_COLOR_RANGE_16_235)
1669                 pipe_config->limited_color_range = true;
1670
1671         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_AUDIO_STAT,
1672                                  &val, 1)) {
1673                 u8 mask = SDVO_AUDIO_ELD_VALID | SDVO_AUDIO_PRESENCE_DETECT;
1674
1675                 if ((val & mask) == mask)
1676                         pipe_config->has_audio = true;
1677         }
1678
1679         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE,
1680                                  &val, 1)) {
1681                 if (val == SDVO_ENCODE_HDMI)
1682                         pipe_config->has_hdmi_sink = true;
1683         }
1684
1685         intel_sdvo_get_avi_infoframe(intel_sdvo, pipe_config);
1686 }
1687
1688 static void intel_sdvo_disable_audio(struct intel_sdvo *intel_sdvo)
1689 {
1690         intel_sdvo_set_audio_state(intel_sdvo, 0);
1691 }
1692
1693 static void intel_sdvo_enable_audio(struct intel_sdvo *intel_sdvo,
1694                                     const struct intel_crtc_state *crtc_state,
1695                                     const struct drm_connector_state *conn_state)
1696 {
1697         const struct drm_display_mode *adjusted_mode =
1698                 &crtc_state->base.adjusted_mode;
1699         struct drm_connector *connector = conn_state->connector;
1700         u8 *eld = connector->eld;
1701
1702         eld[6] = drm_av_sync_delay(connector, adjusted_mode) / 2;
1703
1704         intel_sdvo_set_audio_state(intel_sdvo, 0);
1705
1706         intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_ELD,
1707                                    SDVO_HBUF_TX_DISABLED,
1708                                    eld, drm_eld_size(eld));
1709
1710         intel_sdvo_set_audio_state(intel_sdvo, SDVO_AUDIO_ELD_VALID |
1711                                    SDVO_AUDIO_PRESENCE_DETECT);
1712 }
1713
1714 static void intel_disable_sdvo(struct intel_encoder *encoder,
1715                                const struct intel_crtc_state *old_crtc_state,
1716                                const struct drm_connector_state *conn_state)
1717 {
1718         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1719         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1720         struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
1721         u32 temp;
1722
1723         if (old_crtc_state->has_audio)
1724                 intel_sdvo_disable_audio(intel_sdvo);
1725
1726         intel_sdvo_set_active_outputs(intel_sdvo, 0);
1727         if (0)
1728                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1729                                                    DRM_MODE_DPMS_OFF);
1730
1731         temp = I915_READ(intel_sdvo->sdvo_reg);
1732
1733         temp &= ~SDVO_ENABLE;
1734         intel_sdvo_write_sdvox(intel_sdvo, temp);
1735
1736         /*
1737          * HW workaround for IBX, we need to move the port
1738          * to transcoder A after disabling it to allow the
1739          * matching DP port to be enabled on transcoder A.
1740          */
1741         if (HAS_PCH_IBX(dev_priv) && crtc->pipe == PIPE_B) {
1742                 /*
1743                  * We get CPU/PCH FIFO underruns on the other pipe when
1744                  * doing the workaround. Sweep them under the rug.
1745                  */
1746                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1747                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1748
1749                 temp &= ~SDVO_PIPE_SEL_MASK;
1750                 temp |= SDVO_ENABLE | SDVO_PIPE_SEL(PIPE_A);
1751                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1752
1753                 temp &= ~SDVO_ENABLE;
1754                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1755
1756                 intel_wait_for_vblank_if_active(dev_priv, PIPE_A);
1757                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1758                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1759         }
1760 }
1761
1762 static void pch_disable_sdvo(struct intel_encoder *encoder,
1763                              const struct intel_crtc_state *old_crtc_state,
1764                              const struct drm_connector_state *old_conn_state)
1765 {
1766 }
1767
1768 static void pch_post_disable_sdvo(struct intel_encoder *encoder,
1769                                   const struct intel_crtc_state *old_crtc_state,
1770                                   const struct drm_connector_state *old_conn_state)
1771 {
1772         intel_disable_sdvo(encoder, old_crtc_state, old_conn_state);
1773 }
1774
1775 static void intel_enable_sdvo(struct intel_encoder *encoder,
1776                               const struct intel_crtc_state *pipe_config,
1777                               const struct drm_connector_state *conn_state)
1778 {
1779         struct drm_device *dev = encoder->base.dev;
1780         struct drm_i915_private *dev_priv = to_i915(dev);
1781         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1782         struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);
1783         u32 temp;
1784         bool input1, input2;
1785         int i;
1786         bool success;
1787
1788         temp = I915_READ(intel_sdvo->sdvo_reg);
1789         temp |= SDVO_ENABLE;
1790         intel_sdvo_write_sdvox(intel_sdvo, temp);
1791
1792         for (i = 0; i < 2; i++)
1793                 intel_wait_for_vblank(dev_priv, intel_crtc->pipe);
1794
1795         success = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1796         /*
1797          * Warn if the device reported failure to sync.
1798          *
1799          * A lot of SDVO devices fail to notify of sync, but it's
1800          * a given it the status is a success, we succeeded.
1801          */
1802         if (success && !input1) {
1803                 DRM_DEBUG_KMS("First %s output reported failure to "
1804                                 "sync\n", SDVO_NAME(intel_sdvo));
1805         }
1806
1807         if (0)
1808                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1809                                                    DRM_MODE_DPMS_ON);
1810         intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1811
1812         if (pipe_config->has_audio)
1813                 intel_sdvo_enable_audio(intel_sdvo, pipe_config, conn_state);
1814 }
1815
1816 static enum drm_mode_status
1817 intel_sdvo_mode_valid(struct drm_connector *connector,
1818                       struct drm_display_mode *mode)
1819 {
1820         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1821         struct intel_sdvo_connector *intel_sdvo_connector =
1822                 to_intel_sdvo_connector(connector);
1823         int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
1824
1825         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1826                 return MODE_NO_DBLESCAN;
1827
1828         if (intel_sdvo->pixel_clock_min > mode->clock)
1829                 return MODE_CLOCK_LOW;
1830
1831         if (intel_sdvo->pixel_clock_max < mode->clock)
1832                 return MODE_CLOCK_HIGH;
1833
1834         if (mode->clock > max_dotclk)
1835                 return MODE_CLOCK_HIGH;
1836
1837         if (IS_LVDS(intel_sdvo_connector)) {
1838                 const struct drm_display_mode *fixed_mode =
1839                         intel_sdvo_connector->base.panel.fixed_mode;
1840
1841                 if (mode->hdisplay > fixed_mode->hdisplay)
1842                         return MODE_PANEL;
1843
1844                 if (mode->vdisplay > fixed_mode->vdisplay)
1845                         return MODE_PANEL;
1846         }
1847
1848         return MODE_OK;
1849 }
1850
1851 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1852 {
1853         BUILD_BUG_ON(sizeof(*caps) != 8);
1854         if (!intel_sdvo_get_value(intel_sdvo,
1855                                   SDVO_CMD_GET_DEVICE_CAPS,
1856                                   caps, sizeof(*caps)))
1857                 return false;
1858
1859         DRM_DEBUG_KMS("SDVO capabilities:\n"
1860                       "  vendor_id: %d\n"
1861                       "  device_id: %d\n"
1862                       "  device_rev_id: %d\n"
1863                       "  sdvo_version_major: %d\n"
1864                       "  sdvo_version_minor: %d\n"
1865                       "  sdvo_inputs_mask: %d\n"
1866                       "  smooth_scaling: %d\n"
1867                       "  sharp_scaling: %d\n"
1868                       "  up_scaling: %d\n"
1869                       "  down_scaling: %d\n"
1870                       "  stall_support: %d\n"
1871                       "  output_flags: %d\n",
1872                       caps->vendor_id,
1873                       caps->device_id,
1874                       caps->device_rev_id,
1875                       caps->sdvo_version_major,
1876                       caps->sdvo_version_minor,
1877                       caps->sdvo_inputs_mask,
1878                       caps->smooth_scaling,
1879                       caps->sharp_scaling,
1880                       caps->up_scaling,
1881                       caps->down_scaling,
1882                       caps->stall_support,
1883                       caps->output_flags);
1884
1885         return true;
1886 }
1887
1888 static u16 intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
1889 {
1890         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
1891         u16 hotplug;
1892
1893         if (!I915_HAS_HOTPLUG(dev_priv))
1894                 return 0;
1895
1896         /*
1897          * HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1898          * on the line.
1899          */
1900         if (IS_I945G(dev_priv) || IS_I945GM(dev_priv))
1901                 return 0;
1902
1903         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1904                                         &hotplug, sizeof(hotplug)))
1905                 return 0;
1906
1907         return hotplug;
1908 }
1909
1910 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1911 {
1912         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1913
1914         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1915                              &intel_sdvo->hotplug_active, 2);
1916 }
1917
1918 static bool intel_sdvo_hotplug(struct intel_encoder *encoder,
1919                                struct intel_connector *connector)
1920 {
1921         intel_sdvo_enable_hotplug(encoder);
1922
1923         return intel_encoder_hotplug(encoder, connector);
1924 }
1925
1926 static bool
1927 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1928 {
1929         /* Is there more than one type of output? */
1930         return hweight16(intel_sdvo->caps.output_flags) > 1;
1931 }
1932
1933 static struct edid *
1934 intel_sdvo_get_edid(struct drm_connector *connector)
1935 {
1936         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1937         return drm_get_edid(connector, &sdvo->ddc);
1938 }
1939
1940 /* Mac mini hack -- use the same DDC as the analog connector */
1941 static struct edid *
1942 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1943 {
1944         struct drm_i915_private *dev_priv = to_i915(connector->dev);
1945
1946         return drm_get_edid(connector,
1947                             intel_gmbus_get_adapter(dev_priv,
1948                                                     dev_priv->vbt.crt_ddc_pin));
1949 }
1950
1951 static enum drm_connector_status
1952 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1953 {
1954         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1955         struct intel_sdvo_connector *intel_sdvo_connector =
1956                 to_intel_sdvo_connector(connector);
1957         enum drm_connector_status status;
1958         struct edid *edid;
1959
1960         edid = intel_sdvo_get_edid(connector);
1961
1962         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1963                 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1964
1965                 /*
1966                  * Don't use the 1 as the argument of DDC bus switch to get
1967                  * the EDID. It is used for SDVO SPD ROM.
1968                  */
1969                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1970                         intel_sdvo->ddc_bus = ddc;
1971                         edid = intel_sdvo_get_edid(connector);
1972                         if (edid)
1973                                 break;
1974                 }
1975                 /*
1976                  * If we found the EDID on the other bus,
1977                  * assume that is the correct DDC bus.
1978                  */
1979                 if (edid == NULL)
1980                         intel_sdvo->ddc_bus = saved_ddc;
1981         }
1982
1983         /*
1984          * When there is no edid and no monitor is connected with VGA
1985          * port, try to use the CRT ddc to read the EDID for DVI-connector.
1986          */
1987         if (edid == NULL)
1988                 edid = intel_sdvo_get_analog_edid(connector);
1989
1990         status = connector_status_unknown;
1991         if (edid != NULL) {
1992                 /* DDC bus is shared, match EDID to connector type */
1993                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1994                         status = connector_status_connected;
1995                         if (intel_sdvo_connector->is_hdmi) {
1996                                 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1997                                 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1998                         }
1999                 } else
2000                         status = connector_status_disconnected;
2001                 kfree(edid);
2002         }
2003
2004         return status;
2005 }
2006
2007 static bool
2008 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
2009                                   struct edid *edid)
2010 {
2011         bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
2012         bool connector_is_digital = !!IS_DIGITAL(sdvo);
2013
2014         DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
2015                       connector_is_digital, monitor_is_digital);
2016         return connector_is_digital == monitor_is_digital;
2017 }
2018
2019 static enum drm_connector_status
2020 intel_sdvo_detect(struct drm_connector *connector, bool force)
2021 {
2022         u16 response;
2023         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
2024         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2025         enum drm_connector_status ret;
2026
2027         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2028                       connector->base.id, connector->name);
2029
2030         if (!intel_sdvo_get_value(intel_sdvo,
2031                                   SDVO_CMD_GET_ATTACHED_DISPLAYS,
2032                                   &response, 2))
2033                 return connector_status_unknown;
2034
2035         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
2036                       response & 0xff, response >> 8,
2037                       intel_sdvo_connector->output_flag);
2038
2039         if (response == 0)
2040                 return connector_status_disconnected;
2041
2042         intel_sdvo->attached_output = response;
2043
2044         intel_sdvo->has_hdmi_monitor = false;
2045         intel_sdvo->has_hdmi_audio = false;
2046
2047         if ((intel_sdvo_connector->output_flag & response) == 0)
2048                 ret = connector_status_disconnected;
2049         else if (IS_TMDS(intel_sdvo_connector))
2050                 ret = intel_sdvo_tmds_sink_detect(connector);
2051         else {
2052                 struct edid *edid;
2053
2054                 /* if we have an edid check it matches the connection */
2055                 edid = intel_sdvo_get_edid(connector);
2056                 if (edid == NULL)
2057                         edid = intel_sdvo_get_analog_edid(connector);
2058                 if (edid != NULL) {
2059                         if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
2060                                                               edid))
2061                                 ret = connector_status_connected;
2062                         else
2063                                 ret = connector_status_disconnected;
2064
2065                         kfree(edid);
2066                 } else
2067                         ret = connector_status_connected;
2068         }
2069
2070         return ret;
2071 }
2072
2073 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
2074 {
2075         struct edid *edid;
2076
2077         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2078                       connector->base.id, connector->name);
2079
2080         /* set the bus switch and get the modes */
2081         edid = intel_sdvo_get_edid(connector);
2082
2083         /*
2084          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
2085          * link between analog and digital outputs. So, if the regular SDVO
2086          * DDC fails, check to see if the analog output is disconnected, in
2087          * which case we'll look there for the digital DDC data.
2088          */
2089         if (edid == NULL)
2090                 edid = intel_sdvo_get_analog_edid(connector);
2091
2092         if (edid != NULL) {
2093                 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
2094                                                       edid)) {
2095                         drm_connector_update_edid_property(connector, edid);
2096                         drm_add_edid_modes(connector, edid);
2097                 }
2098
2099                 kfree(edid);
2100         }
2101 }
2102
2103 /*
2104  * Set of SDVO TV modes.
2105  * Note!  This is in reply order (see loop in get_tv_modes).
2106  * XXX: all 60Hz refresh?
2107  */
2108 static const struct drm_display_mode sdvo_tv_modes[] = {
2109         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
2110                    416, 0, 200, 201, 232, 233, 0,
2111                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2112         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
2113                    416, 0, 240, 241, 272, 273, 0,
2114                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2115         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
2116                    496, 0, 300, 301, 332, 333, 0,
2117                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2118         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
2119                    736, 0, 350, 351, 382, 383, 0,
2120                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2121         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
2122                    736, 0, 400, 401, 432, 433, 0,
2123                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2124         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
2125                    736, 0, 480, 481, 512, 513, 0,
2126                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2127         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
2128                    800, 0, 480, 481, 512, 513, 0,
2129                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2130         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
2131                    800, 0, 576, 577, 608, 609, 0,
2132                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2133         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
2134                    816, 0, 350, 351, 382, 383, 0,
2135                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2136         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
2137                    816, 0, 400, 401, 432, 433, 0,
2138                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2139         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
2140                    816, 0, 480, 481, 512, 513, 0,
2141                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2142         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
2143                    816, 0, 540, 541, 572, 573, 0,
2144                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2145         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
2146                    816, 0, 576, 577, 608, 609, 0,
2147                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2148         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
2149                    864, 0, 576, 577, 608, 609, 0,
2150                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2151         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
2152                    896, 0, 600, 601, 632, 633, 0,
2153                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2154         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
2155                    928, 0, 624, 625, 656, 657, 0,
2156                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2157         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
2158                    1016, 0, 766, 767, 798, 799, 0,
2159                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2160         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
2161                    1120, 0, 768, 769, 800, 801, 0,
2162                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2163         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
2164                    1376, 0, 1024, 1025, 1056, 1057, 0,
2165                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2166 };
2167
2168 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
2169 {
2170         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
2171         const struct drm_connector_state *conn_state = connector->state;
2172         struct intel_sdvo_sdtv_resolution_request tv_res;
2173         u32 reply = 0, format_map = 0;
2174         int i;
2175
2176         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2177                       connector->base.id, connector->name);
2178
2179         /*
2180          * Read the list of supported input resolutions for the selected TV
2181          * format.
2182          */
2183         format_map = 1 << conn_state->tv.mode;
2184         memcpy(&tv_res, &format_map,
2185                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
2186
2187         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
2188                 return;
2189
2190         BUILD_BUG_ON(sizeof(tv_res) != 3);
2191         if (!intel_sdvo_write_cmd(intel_sdvo,
2192                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
2193                                   &tv_res, sizeof(tv_res)))
2194                 return;
2195         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
2196                 return;
2197
2198         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
2199                 if (reply & (1 << i)) {
2200                         struct drm_display_mode *nmode;
2201                         nmode = drm_mode_duplicate(connector->dev,
2202                                                    &sdvo_tv_modes[i]);
2203                         if (nmode)
2204                                 drm_mode_probed_add(connector, nmode);
2205                 }
2206 }
2207
2208 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
2209 {
2210         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
2211         struct drm_i915_private *dev_priv = to_i915(connector->dev);
2212         struct drm_display_mode *newmode;
2213
2214         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2215                       connector->base.id, connector->name);
2216
2217         /*
2218          * Fetch modes from VBT. For SDVO prefer the VBT mode since some
2219          * SDVO->LVDS transcoders can't cope with the EDID mode.
2220          */
2221         if (dev_priv->vbt.sdvo_lvds_vbt_mode != NULL) {
2222                 newmode = drm_mode_duplicate(connector->dev,
2223                                              dev_priv->vbt.sdvo_lvds_vbt_mode);
2224                 if (newmode != NULL) {
2225                         /* Guarantee the mode is preferred */
2226                         newmode->type = (DRM_MODE_TYPE_PREFERRED |
2227                                          DRM_MODE_TYPE_DRIVER);
2228                         drm_mode_probed_add(connector, newmode);
2229                 }
2230         }
2231
2232         /*
2233          * Attempt to get the mode list from DDC.
2234          * Assume that the preferred modes are
2235          * arranged in priority order.
2236          */
2237         intel_ddc_get_modes(connector, &intel_sdvo->ddc);
2238 }
2239
2240 static int intel_sdvo_get_modes(struct drm_connector *connector)
2241 {
2242         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2243
2244         if (IS_TV(intel_sdvo_connector))
2245                 intel_sdvo_get_tv_modes(connector);
2246         else if (IS_LVDS(intel_sdvo_connector))
2247                 intel_sdvo_get_lvds_modes(connector);
2248         else
2249                 intel_sdvo_get_ddc_modes(connector);
2250
2251         return !list_empty(&connector->probed_modes);
2252 }
2253
2254 static int
2255 intel_sdvo_connector_atomic_get_property(struct drm_connector *connector,
2256                                          const struct drm_connector_state *state,
2257                                          struct drm_property *property,
2258                                          u64 *val)
2259 {
2260         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2261         const struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state((void *)state);
2262
2263         if (property == intel_sdvo_connector->tv_format) {
2264                 int i;
2265
2266                 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2267                         if (state->tv.mode == intel_sdvo_connector->tv_format_supported[i]) {
2268                                 *val = i;
2269
2270                                 return 0;
2271                         }
2272
2273                 WARN_ON(1);
2274                 *val = 0;
2275         } else if (property == intel_sdvo_connector->top ||
2276                    property == intel_sdvo_connector->bottom)
2277                 *val = intel_sdvo_connector->max_vscan - sdvo_state->tv.overscan_v;
2278         else if (property == intel_sdvo_connector->left ||
2279                  property == intel_sdvo_connector->right)
2280                 *val = intel_sdvo_connector->max_hscan - sdvo_state->tv.overscan_h;
2281         else if (property == intel_sdvo_connector->hpos)
2282                 *val = sdvo_state->tv.hpos;
2283         else if (property == intel_sdvo_connector->vpos)
2284                 *val = sdvo_state->tv.vpos;
2285         else if (property == intel_sdvo_connector->saturation)
2286                 *val = state->tv.saturation;
2287         else if (property == intel_sdvo_connector->contrast)
2288                 *val = state->tv.contrast;
2289         else if (property == intel_sdvo_connector->hue)
2290                 *val = state->tv.hue;
2291         else if (property == intel_sdvo_connector->brightness)
2292                 *val = state->tv.brightness;
2293         else if (property == intel_sdvo_connector->sharpness)
2294                 *val = sdvo_state->tv.sharpness;
2295         else if (property == intel_sdvo_connector->flicker_filter)
2296                 *val = sdvo_state->tv.flicker_filter;
2297         else if (property == intel_sdvo_connector->flicker_filter_2d)
2298                 *val = sdvo_state->tv.flicker_filter_2d;
2299         else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2300                 *val = sdvo_state->tv.flicker_filter_adaptive;
2301         else if (property == intel_sdvo_connector->tv_chroma_filter)
2302                 *val = sdvo_state->tv.chroma_filter;
2303         else if (property == intel_sdvo_connector->tv_luma_filter)
2304                 *val = sdvo_state->tv.luma_filter;
2305         else if (property == intel_sdvo_connector->dot_crawl)
2306                 *val = sdvo_state->tv.dot_crawl;
2307         else
2308                 return intel_digital_connector_atomic_get_property(connector, state, property, val);
2309
2310         return 0;
2311 }
2312
2313 static int
2314 intel_sdvo_connector_atomic_set_property(struct drm_connector *connector,
2315                                          struct drm_connector_state *state,
2316                                          struct drm_property *property,
2317                                          u64 val)
2318 {
2319         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2320         struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state(state);
2321
2322         if (property == intel_sdvo_connector->tv_format) {
2323                 state->tv.mode = intel_sdvo_connector->tv_format_supported[val];
2324
2325                 if (state->crtc) {
2326                         struct drm_crtc_state *crtc_state =
2327                                 drm_atomic_get_new_crtc_state(state->state, state->crtc);
2328
2329                         crtc_state->connectors_changed = true;
2330                 }
2331         } else if (property == intel_sdvo_connector->top ||
2332                    property == intel_sdvo_connector->bottom)
2333                 /* Cannot set these independent from each other */
2334                 sdvo_state->tv.overscan_v = intel_sdvo_connector->max_vscan - val;
2335         else if (property == intel_sdvo_connector->left ||
2336                  property == intel_sdvo_connector->right)
2337                 /* Cannot set these independent from each other */
2338                 sdvo_state->tv.overscan_h = intel_sdvo_connector->max_hscan - val;
2339         else if (property == intel_sdvo_connector->hpos)
2340                 sdvo_state->tv.hpos = val;
2341         else if (property == intel_sdvo_connector->vpos)
2342                 sdvo_state->tv.vpos = val;
2343         else if (property == intel_sdvo_connector->saturation)
2344                 state->tv.saturation = val;
2345         else if (property == intel_sdvo_connector->contrast)
2346                 state->tv.contrast = val;
2347         else if (property == intel_sdvo_connector->hue)
2348                 state->tv.hue = val;
2349         else if (property == intel_sdvo_connector->brightness)
2350                 state->tv.brightness = val;
2351         else if (property == intel_sdvo_connector->sharpness)
2352                 sdvo_state->tv.sharpness = val;
2353         else if (property == intel_sdvo_connector->flicker_filter)
2354                 sdvo_state->tv.flicker_filter = val;
2355         else if (property == intel_sdvo_connector->flicker_filter_2d)
2356                 sdvo_state->tv.flicker_filter_2d = val;
2357         else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2358                 sdvo_state->tv.flicker_filter_adaptive = val;
2359         else if (property == intel_sdvo_connector->tv_chroma_filter)
2360                 sdvo_state->tv.chroma_filter = val;
2361         else if (property == intel_sdvo_connector->tv_luma_filter)
2362                 sdvo_state->tv.luma_filter = val;
2363         else if (property == intel_sdvo_connector->dot_crawl)
2364                 sdvo_state->tv.dot_crawl = val;
2365         else
2366                 return intel_digital_connector_atomic_set_property(connector, state, property, val);
2367
2368         return 0;
2369 }
2370
2371 static int
2372 intel_sdvo_connector_register(struct drm_connector *connector)
2373 {
2374         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
2375         int ret;
2376
2377         ret = intel_connector_register(connector);
2378         if (ret)
2379                 return ret;
2380
2381         return sysfs_create_link(&connector->kdev->kobj,
2382                                  &sdvo->ddc.dev.kobj,
2383                                  sdvo->ddc.dev.kobj.name);
2384 }
2385
2386 static void
2387 intel_sdvo_connector_unregister(struct drm_connector *connector)
2388 {
2389         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
2390
2391         sysfs_remove_link(&connector->kdev->kobj,
2392                           sdvo->ddc.dev.kobj.name);
2393         intel_connector_unregister(connector);
2394 }
2395
2396 static struct drm_connector_state *
2397 intel_sdvo_connector_duplicate_state(struct drm_connector *connector)
2398 {
2399         struct intel_sdvo_connector_state *state;
2400
2401         state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL);
2402         if (!state)
2403                 return NULL;
2404
2405         __drm_atomic_helper_connector_duplicate_state(connector, &state->base.base);
2406         return &state->base.base;
2407 }
2408
2409 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
2410         .detect = intel_sdvo_detect,
2411         .fill_modes = drm_helper_probe_single_connector_modes,
2412         .atomic_get_property = intel_sdvo_connector_atomic_get_property,
2413         .atomic_set_property = intel_sdvo_connector_atomic_set_property,
2414         .late_register = intel_sdvo_connector_register,
2415         .early_unregister = intel_sdvo_connector_unregister,
2416         .destroy = intel_connector_destroy,
2417         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
2418         .atomic_duplicate_state = intel_sdvo_connector_duplicate_state,
2419 };
2420
2421 static int intel_sdvo_atomic_check(struct drm_connector *conn,
2422                                    struct drm_connector_state *new_conn_state)
2423 {
2424         struct drm_atomic_state *state = new_conn_state->state;
2425         struct drm_connector_state *old_conn_state =
2426                 drm_atomic_get_old_connector_state(state, conn);
2427         struct intel_sdvo_connector_state *old_state =
2428                 to_intel_sdvo_connector_state(old_conn_state);
2429         struct intel_sdvo_connector_state *new_state =
2430                 to_intel_sdvo_connector_state(new_conn_state);
2431
2432         if (new_conn_state->crtc &&
2433             (memcmp(&old_state->tv, &new_state->tv, sizeof(old_state->tv)) ||
2434              memcmp(&old_conn_state->tv, &new_conn_state->tv, sizeof(old_conn_state->tv)))) {
2435                 struct drm_crtc_state *crtc_state =
2436                         drm_atomic_get_new_crtc_state(new_conn_state->state,
2437                                                       new_conn_state->crtc);
2438
2439                 crtc_state->connectors_changed = true;
2440         }
2441
2442         return intel_digital_connector_atomic_check(conn, new_conn_state);
2443 }
2444
2445 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2446         .get_modes = intel_sdvo_get_modes,
2447         .mode_valid = intel_sdvo_mode_valid,
2448         .atomic_check = intel_sdvo_atomic_check,
2449 };
2450
2451 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
2452 {
2453         struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder));
2454
2455         i2c_del_adapter(&intel_sdvo->ddc);
2456         intel_encoder_destroy(encoder);
2457 }
2458
2459 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2460         .destroy = intel_sdvo_enc_destroy,
2461 };
2462
2463 static void
2464 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2465 {
2466         u16 mask = 0;
2467         unsigned int num_bits;
2468
2469         /*
2470          * Make a mask of outputs less than or equal to our own priority in the
2471          * list.
2472          */
2473         switch (sdvo->controlled_output) {
2474         case SDVO_OUTPUT_LVDS1:
2475                 mask |= SDVO_OUTPUT_LVDS1;
2476                 /* fall through */
2477         case SDVO_OUTPUT_LVDS0:
2478                 mask |= SDVO_OUTPUT_LVDS0;
2479                 /* fall through */
2480         case SDVO_OUTPUT_TMDS1:
2481                 mask |= SDVO_OUTPUT_TMDS1;
2482                 /* fall through */
2483         case SDVO_OUTPUT_TMDS0:
2484                 mask |= SDVO_OUTPUT_TMDS0;
2485                 /* fall through */
2486         case SDVO_OUTPUT_RGB1:
2487                 mask |= SDVO_OUTPUT_RGB1;
2488                 /* fall through */
2489         case SDVO_OUTPUT_RGB0:
2490                 mask |= SDVO_OUTPUT_RGB0;
2491                 break;
2492         }
2493
2494         /* Count bits to find what number we are in the priority list. */
2495         mask &= sdvo->caps.output_flags;
2496         num_bits = hweight16(mask);
2497         /* If more than 3 outputs, default to DDC bus 3 for now. */
2498         if (num_bits > 3)
2499                 num_bits = 3;
2500
2501         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2502         sdvo->ddc_bus = 1 << num_bits;
2503 }
2504
2505 /*
2506  * Choose the appropriate DDC bus for control bus switch command for this
2507  * SDVO output based on the controlled output.
2508  *
2509  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2510  * outputs, then LVDS outputs.
2511  */
2512 static void
2513 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2514                           struct intel_sdvo *sdvo)
2515 {
2516         struct sdvo_device_mapping *mapping;
2517
2518         if (sdvo->port == PORT_B)
2519                 mapping = &dev_priv->vbt.sdvo_mappings[0];
2520         else
2521                 mapping = &dev_priv->vbt.sdvo_mappings[1];
2522
2523         if (mapping->initialized)
2524                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2525         else
2526                 intel_sdvo_guess_ddc_bus(sdvo);
2527 }
2528
2529 static void
2530 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2531                           struct intel_sdvo *sdvo)
2532 {
2533         struct sdvo_device_mapping *mapping;
2534         u8 pin;
2535
2536         if (sdvo->port == PORT_B)
2537                 mapping = &dev_priv->vbt.sdvo_mappings[0];
2538         else
2539                 mapping = &dev_priv->vbt.sdvo_mappings[1];
2540
2541         if (mapping->initialized &&
2542             intel_gmbus_is_valid_pin(dev_priv, mapping->i2c_pin))
2543                 pin = mapping->i2c_pin;
2544         else
2545                 pin = GMBUS_PIN_DPB;
2546
2547         sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2548
2549         /*
2550          * With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2551          * our code totally fails once we start using gmbus. Hence fall back to
2552          * bit banging for now.
2553          */
2554         intel_gmbus_force_bit(sdvo->i2c, true);
2555 }
2556
2557 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2558 static void
2559 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2560 {
2561         intel_gmbus_force_bit(sdvo->i2c, false);
2562 }
2563
2564 static bool
2565 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
2566 {
2567         return intel_sdvo_check_supp_encode(intel_sdvo);
2568 }
2569
2570 static u8
2571 intel_sdvo_get_slave_addr(struct drm_i915_private *dev_priv,
2572                           struct intel_sdvo *sdvo)
2573 {
2574         struct sdvo_device_mapping *my_mapping, *other_mapping;
2575
2576         if (sdvo->port == PORT_B) {
2577                 my_mapping = &dev_priv->vbt.sdvo_mappings[0];
2578                 other_mapping = &dev_priv->vbt.sdvo_mappings[1];
2579         } else {
2580                 my_mapping = &dev_priv->vbt.sdvo_mappings[1];
2581                 other_mapping = &dev_priv->vbt.sdvo_mappings[0];
2582         }
2583
2584         /* If the BIOS described our SDVO device, take advantage of it. */
2585         if (my_mapping->slave_addr)
2586                 return my_mapping->slave_addr;
2587
2588         /*
2589          * If the BIOS only described a different SDVO device, use the
2590          * address that it isn't using.
2591          */
2592         if (other_mapping->slave_addr) {
2593                 if (other_mapping->slave_addr == 0x70)
2594                         return 0x72;
2595                 else
2596                         return 0x70;
2597         }
2598
2599         /*
2600          * No SDVO device info is found for another DVO port,
2601          * so use mapping assumption we had before BIOS parsing.
2602          */
2603         if (sdvo->port == PORT_B)
2604                 return 0x70;
2605         else
2606                 return 0x72;
2607 }
2608
2609 static int
2610 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2611                           struct intel_sdvo *encoder)
2612 {
2613         struct drm_connector *drm_connector;
2614         int ret;
2615
2616         drm_connector = &connector->base.base;
2617         ret = drm_connector_init(encoder->base.base.dev,
2618                            drm_connector,
2619                            &intel_sdvo_connector_funcs,
2620                            connector->base.base.connector_type);
2621         if (ret < 0)
2622                 return ret;
2623
2624         drm_connector_helper_add(drm_connector,
2625                                  &intel_sdvo_connector_helper_funcs);
2626
2627         connector->base.base.interlace_allowed = 1;
2628         connector->base.base.doublescan_allowed = 0;
2629         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2630         connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2631
2632         intel_connector_attach_encoder(&connector->base, &encoder->base);
2633
2634         return 0;
2635 }
2636
2637 static void
2638 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
2639                                struct intel_sdvo_connector *connector)
2640 {
2641         struct drm_i915_private *dev_priv = to_i915(connector->base.base.dev);
2642
2643         intel_attach_force_audio_property(&connector->base.base);
2644         if (INTEL_GEN(dev_priv) >= 4 && IS_MOBILE(dev_priv)) {
2645                 intel_attach_broadcast_rgb_property(&connector->base.base);
2646         }
2647         intel_attach_aspect_ratio_property(&connector->base.base);
2648         connector->base.base.state->picture_aspect_ratio = HDMI_PICTURE_ASPECT_NONE;
2649 }
2650
2651 static struct intel_sdvo_connector *intel_sdvo_connector_alloc(void)
2652 {
2653         struct intel_sdvo_connector *sdvo_connector;
2654         struct intel_sdvo_connector_state *conn_state;
2655
2656         sdvo_connector = kzalloc(sizeof(*sdvo_connector), GFP_KERNEL);
2657         if (!sdvo_connector)
2658                 return NULL;
2659
2660         conn_state = kzalloc(sizeof(*conn_state), GFP_KERNEL);
2661         if (!conn_state) {
2662                 kfree(sdvo_connector);
2663                 return NULL;
2664         }
2665
2666         __drm_atomic_helper_connector_reset(&sdvo_connector->base.base,
2667                                             &conn_state->base.base);
2668
2669         return sdvo_connector;
2670 }
2671
2672 static bool
2673 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2674 {
2675         struct drm_encoder *encoder = &intel_sdvo->base.base;
2676         struct drm_connector *connector;
2677         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2678         struct intel_connector *intel_connector;
2679         struct intel_sdvo_connector *intel_sdvo_connector;
2680
2681         DRM_DEBUG_KMS("initialising DVI device %d\n", device);
2682
2683         intel_sdvo_connector = intel_sdvo_connector_alloc();
2684         if (!intel_sdvo_connector)
2685                 return false;
2686
2687         if (device == 0) {
2688                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2689                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2690         } else if (device == 1) {
2691                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2692                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2693         }
2694
2695         intel_connector = &intel_sdvo_connector->base;
2696         connector = &intel_connector->base;
2697         if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2698                 intel_sdvo_connector->output_flag) {
2699                 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2700                 /*
2701                  * Some SDVO devices have one-shot hotplug interrupts.
2702                  * Ensure that they get re-enabled when an interrupt happens.
2703                  */
2704                 intel_encoder->hotplug = intel_sdvo_hotplug;
2705                 intel_sdvo_enable_hotplug(intel_encoder);
2706         } else {
2707                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2708         }
2709         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2710         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2711
2712         if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2713                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2714                 intel_sdvo_connector->is_hdmi = true;
2715         }
2716
2717         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2718                 kfree(intel_sdvo_connector);
2719                 return false;
2720         }
2721
2722         if (intel_sdvo_connector->is_hdmi)
2723                 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
2724
2725         return true;
2726 }
2727
2728 static bool
2729 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2730 {
2731         struct drm_encoder *encoder = &intel_sdvo->base.base;
2732         struct drm_connector *connector;
2733         struct intel_connector *intel_connector;
2734         struct intel_sdvo_connector *intel_sdvo_connector;
2735
2736         DRM_DEBUG_KMS("initialising TV type %d\n", type);
2737
2738         intel_sdvo_connector = intel_sdvo_connector_alloc();
2739         if (!intel_sdvo_connector)
2740                 return false;
2741
2742         intel_connector = &intel_sdvo_connector->base;
2743         connector = &intel_connector->base;
2744         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2745         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2746
2747         intel_sdvo->controlled_output |= type;
2748         intel_sdvo_connector->output_flag = type;
2749
2750         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2751                 kfree(intel_sdvo_connector);
2752                 return false;
2753         }
2754
2755         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2756                 goto err;
2757
2758         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2759                 goto err;
2760
2761         return true;
2762
2763 err:
2764         intel_connector_destroy(connector);
2765         return false;
2766 }
2767
2768 static bool
2769 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2770 {
2771         struct drm_encoder *encoder = &intel_sdvo->base.base;
2772         struct drm_connector *connector;
2773         struct intel_connector *intel_connector;
2774         struct intel_sdvo_connector *intel_sdvo_connector;
2775
2776         DRM_DEBUG_KMS("initialising analog device %d\n", device);
2777
2778         intel_sdvo_connector = intel_sdvo_connector_alloc();
2779         if (!intel_sdvo_connector)
2780                 return false;
2781
2782         intel_connector = &intel_sdvo_connector->base;
2783         connector = &intel_connector->base;
2784         intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2785         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2786         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2787
2788         if (device == 0) {
2789                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2790                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2791         } else if (device == 1) {
2792                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2793                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2794         }
2795
2796         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2797                 kfree(intel_sdvo_connector);
2798                 return false;
2799         }
2800
2801         return true;
2802 }
2803
2804 static bool
2805 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2806 {
2807         struct drm_encoder *encoder = &intel_sdvo->base.base;
2808         struct drm_connector *connector;
2809         struct intel_connector *intel_connector;
2810         struct intel_sdvo_connector *intel_sdvo_connector;
2811         struct drm_display_mode *mode;
2812
2813         DRM_DEBUG_KMS("initialising LVDS device %d\n", device);
2814
2815         intel_sdvo_connector = intel_sdvo_connector_alloc();
2816         if (!intel_sdvo_connector)
2817                 return false;
2818
2819         intel_connector = &intel_sdvo_connector->base;
2820         connector = &intel_connector->base;
2821         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2822         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2823
2824         if (device == 0) {
2825                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2826                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2827         } else if (device == 1) {
2828                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2829                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2830         }
2831
2832         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2833                 kfree(intel_sdvo_connector);
2834                 return false;
2835         }
2836
2837         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2838                 goto err;
2839
2840         intel_sdvo_get_lvds_modes(connector);
2841
2842         list_for_each_entry(mode, &connector->probed_modes, head) {
2843                 if (mode->type & DRM_MODE_TYPE_PREFERRED) {
2844                         struct drm_display_mode *fixed_mode =
2845                                 drm_mode_duplicate(connector->dev, mode);
2846
2847                         intel_panel_init(&intel_connector->panel,
2848                                          fixed_mode, NULL);
2849                         break;
2850                 }
2851         }
2852
2853         if (!intel_connector->panel.fixed_mode)
2854                 goto err;
2855
2856         return true;
2857
2858 err:
2859         intel_connector_destroy(connector);
2860         return false;
2861 }
2862
2863 static bool
2864 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, u16 flags)
2865 {
2866         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2867
2868         if (flags & SDVO_OUTPUT_TMDS0)
2869                 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2870                         return false;
2871
2872         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2873                 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2874                         return false;
2875
2876         /* TV has no XXX1 function block */
2877         if (flags & SDVO_OUTPUT_SVID0)
2878                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2879                         return false;
2880
2881         if (flags & SDVO_OUTPUT_CVBS0)
2882                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2883                         return false;
2884
2885         if (flags & SDVO_OUTPUT_YPRPB0)
2886                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2887                         return false;
2888
2889         if (flags & SDVO_OUTPUT_RGB0)
2890                 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2891                         return false;
2892
2893         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2894                 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2895                         return false;
2896
2897         if (flags & SDVO_OUTPUT_LVDS0)
2898                 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2899                         return false;
2900
2901         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2902                 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2903                         return false;
2904
2905         if ((flags & SDVO_OUTPUT_MASK) == 0) {
2906                 unsigned char bytes[2];
2907
2908                 intel_sdvo->controlled_output = 0;
2909                 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2910                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2911                               SDVO_NAME(intel_sdvo),
2912                               bytes[0], bytes[1]);
2913                 return false;
2914         }
2915         intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2916
2917         return true;
2918 }
2919
2920 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2921 {
2922         struct drm_device *dev = intel_sdvo->base.base.dev;
2923         struct drm_connector *connector, *tmp;
2924
2925         list_for_each_entry_safe(connector, tmp,
2926                                  &dev->mode_config.connector_list, head) {
2927                 if (intel_attached_encoder(connector) == &intel_sdvo->base) {
2928                         drm_connector_unregister(connector);
2929                         intel_connector_destroy(connector);
2930                 }
2931         }
2932 }
2933
2934 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2935                                           struct intel_sdvo_connector *intel_sdvo_connector,
2936                                           int type)
2937 {
2938         struct drm_device *dev = intel_sdvo->base.base.dev;
2939         struct intel_sdvo_tv_format format;
2940         u32 format_map, i;
2941
2942         if (!intel_sdvo_set_target_output(intel_sdvo, type))
2943                 return false;
2944
2945         BUILD_BUG_ON(sizeof(format) != 6);
2946         if (!intel_sdvo_get_value(intel_sdvo,
2947                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2948                                   &format, sizeof(format)))
2949                 return false;
2950
2951         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2952
2953         if (format_map == 0)
2954                 return false;
2955
2956         intel_sdvo_connector->format_supported_num = 0;
2957         for (i = 0 ; i < TV_FORMAT_NUM; i++)
2958                 if (format_map & (1 << i))
2959                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2960
2961
2962         intel_sdvo_connector->tv_format =
2963                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
2964                                             "mode", intel_sdvo_connector->format_supported_num);
2965         if (!intel_sdvo_connector->tv_format)
2966                 return false;
2967
2968         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2969                 drm_property_add_enum(intel_sdvo_connector->tv_format, i,
2970                                       tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2971
2972         intel_sdvo_connector->base.base.state->tv.mode = intel_sdvo_connector->tv_format_supported[0];
2973         drm_object_attach_property(&intel_sdvo_connector->base.base.base,
2974                                    intel_sdvo_connector->tv_format, 0);
2975         return true;
2976
2977 }
2978
2979 #define _ENHANCEMENT(state_assignment, name, NAME) do { \
2980         if (enhancements.name) { \
2981                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2982                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2983                         return false; \
2984                 intel_sdvo_connector->name = \
2985                         drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2986                 if (!intel_sdvo_connector->name) return false; \
2987                 state_assignment = response; \
2988                 drm_object_attach_property(&connector->base, \
2989                                            intel_sdvo_connector->name, 0); \
2990                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2991                               data_value[0], data_value[1], response); \
2992         } \
2993 } while (0)
2994
2995 #define ENHANCEMENT(state, name, NAME) _ENHANCEMENT((state)->name, name, NAME)
2996
2997 static bool
2998 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2999                                       struct intel_sdvo_connector *intel_sdvo_connector,
3000                                       struct intel_sdvo_enhancements_reply enhancements)
3001 {
3002         struct drm_device *dev = intel_sdvo->base.base.dev;
3003         struct drm_connector *connector = &intel_sdvo_connector->base.base;
3004         struct drm_connector_state *conn_state = connector->state;
3005         struct intel_sdvo_connector_state *sdvo_state =
3006                 to_intel_sdvo_connector_state(conn_state);
3007         u16 response, data_value[2];
3008
3009         /* when horizontal overscan is supported, Add the left/right property */
3010         if (enhancements.overscan_h) {
3011                 if (!intel_sdvo_get_value(intel_sdvo,
3012                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
3013                                           &data_value, 4))
3014                         return false;
3015
3016                 if (!intel_sdvo_get_value(intel_sdvo,
3017                                           SDVO_CMD_GET_OVERSCAN_H,
3018                                           &response, 2))
3019                         return false;
3020
3021                 sdvo_state->tv.overscan_h = response;