2 * Copyright © 2016 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
25 * Please use intel_vbt_defs.h for VBT private data, to hide and abstract away
26 * the VBT from the rest of the driver. Add the parsed, clean data to struct
27 * intel_vbt_data within struct drm_i915_private.
30 #ifndef _INTEL_BIOS_H_
31 #define _INTEL_BIOS_H_
33 #include <linux/types.h>
35 #include <drm/i915_drm.h>
37 struct drm_i915_private;
39 enum intel_backlight_type {
42 INTEL_BACKLIGHT_DISPLAY_DDI,
43 INTEL_BACKLIGHT_DSI_DCS,
44 INTEL_BACKLIGHT_PANEL_DRIVER_INTERFACE,
47 struct edp_power_seq {
56 * MIPI Sequence Block definitions
58 * Note the VBT spec has AssertReset / DeassertReset swapped from their
59 * usual naming, we use the proper names here to avoid confusion when
64 MIPI_SEQ_DEASSERT_RESET, /* Spec says MipiAssertResetPin */
68 MIPI_SEQ_ASSERT_RESET, /* Spec says MipiDeassertResetPin */
69 MIPI_SEQ_BACKLIGHT_ON, /* sequence block v2+ */
70 MIPI_SEQ_BACKLIGHT_OFF, /* sequence block v2+ */
71 MIPI_SEQ_TEAR_ON, /* sequence block v2+ */
72 MIPI_SEQ_TEAR_OFF, /* sequence block v3+ */
73 MIPI_SEQ_POWER_ON, /* sequence block v3+ */
74 MIPI_SEQ_POWER_OFF, /* sequence block v3+ */
78 enum mipi_seq_element {
79 MIPI_SEQ_ELEM_END = 0,
80 MIPI_SEQ_ELEM_SEND_PKT,
83 MIPI_SEQ_ELEM_I2C, /* sequence block v2+ */
84 MIPI_SEQ_ELEM_SPI, /* sequence block v3+ */
85 MIPI_SEQ_ELEM_PMIC, /* sequence block v3+ */
89 #define MIPI_DSI_UNDEFINED_PANEL_ID 0
90 #define MIPI_DSI_GENERIC_PANEL_ID 1
96 u32 enable_dithering:1;
100 u32 panel_arch_type:2;
103 #define NON_BURST_SYNC_PULSE 0x1
104 #define NON_BURST_SYNC_EVENTS 0x2
105 #define BURST_MODE 0x3
106 u32 video_transfer_mode:2;
108 u32 cabc_supported:1;
109 #define PPS_BLC_PMIC 0
110 #define PPS_BLC_SOC 1
114 #define PIXEL_FORMAT_RGB565 0x1
115 #define PIXEL_FORMAT_RGB666 0x2
116 #define PIXEL_FORMAT_RGB666_LOOSELY_PACKED 0x3
117 #define PIXEL_FORMAT_RGB888 0x4
118 u32 videomode_color_format:4;
121 #define ENABLE_ROTATION_0 0x0
122 #define ENABLE_ROTATION_90 0x1
123 #define ENABLE_ROTATION_180 0x2
124 #define ENABLE_ROTATION_270 0x3
129 /* 2 byte Port Description */
130 #define DUAL_LINK_NOT_SUPPORTED 0
131 #define DUAL_LINK_FRONT_BACK 1
132 #define DUAL_LINK_PIXEL_ALT 2
137 #define DL_DCS_PORT_A 0x00
138 #define DL_DCS_PORT_C 0x01
139 #define DL_DCS_PORT_A_AND_C 0x02
140 u16 dl_dcs_cabc_ports:2;
141 u16 dl_dcs_backlight_ports:2;
147 u32 target_burst_mode_freq;
151 #define BYTE_CLK_SEL_20MHZ 0
152 #define BYTE_CLK_SEL_10MHZ 1
153 #define BYTE_CLK_SEL_5MHZ 2
159 u16 dphy_param_valid:1;
160 u16 eot_pkt_disabled:1;
161 u16 enable_clk_stop:1;
166 u32 turn_around_timeout;
167 u32 device_reset_timer;
168 u32 master_init_timer;
172 /* 4 byte Dphy Params */
181 u32 clk_lane_switch_cnt;
186 /* timings based on dphy spec */
195 u16 tclk_prepare_clkzero;
201 u16 ths_prepare_hszero;
220 /* all delays have a unit of 100us */
221 struct mipi_pps_data {
224 u16 bl_disable_delay;
226 u16 panel_power_cycle_delay;
229 void intel_bios_init(struct drm_i915_private *dev_priv);
230 void intel_bios_cleanup(struct drm_i915_private *dev_priv);
231 bool intel_bios_is_valid_vbt(const void *buf, size_t size);
232 bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv);
233 bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin);
234 bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port);
235 bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port);
236 bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv, enum port port);
237 bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv, enum port *port);
238 bool intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915,
240 bool intel_bios_is_lspcon_present(const struct drm_i915_private *i915,
242 enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *dev_priv, enum port port);
244 #endif /* _INTEL_BIOS_H_ */